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ALSA: hda - Keep char arrays in input_mux items
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
2f2f4251
M		 35#include "hda_codec.h"
36#include "hda_local.h"
1cd2224c 37#include "hda_beep.h"
2f2f4251 38
c6e4c666
TI		 39enum {
40 STAC_VREF_EVENT = 1,
41 STAC_INSERT_EVENT,
42 STAC_PWR_EVENT,
43 STAC_HP_EVENT,
fefd67f3 44 STAC_LO_EVENT,
3d21d3f7 45 STAC_MIC_EVENT,
c6e4c666 46};
4e55096e 47
f5fcc13c 48enum {
1607b8ea 49 STAC_AUTO,
f5fcc13c 50 STAC_REF,
bf277785 51 STAC_9200_OQO,
dfe495d0
TI		 52 STAC_9200_DELL_D21,
53 STAC_9200_DELL_D22,
54 STAC_9200_DELL_D23,
55 STAC_9200_DELL_M21,
56 STAC_9200_DELL_M22,
57 STAC_9200_DELL_M23,
58 STAC_9200_DELL_M24,
59 STAC_9200_DELL_M25,
60 STAC_9200_DELL_M26,
61 STAC_9200_DELL_M27,
58eec423
MCC		 62 STAC_9200_M4,
63 STAC_9200_M4_2,
117f257d 64 STAC_9200_PANASONIC,
f5fcc13c
TI		 65 STAC_9200_MODELS
66};
67
68enum {
1607b8ea 69 STAC_9205_AUTO,
f5fcc13c 70 STAC_9205_REF,
dfe495d0 71 STAC_9205_DELL_M42,
ae0a8ed8
TD		 72 STAC_9205_DELL_M43,
73 STAC_9205_DELL_M44,
d9a4268e 74 STAC_9205_EAPD,
f5fcc13c
TI		 75 STAC_9205_MODELS
76};
77
e1f0d669 78enum {
1607b8ea 79 STAC_92HD73XX_AUTO,
9e43f0de 80 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 81 STAC_92HD73XX_REF,
ae709440 82 STAC_92HD73XX_INTEL,
661cd8fb
TI		 83 STAC_DELL_M6_AMIC,
84 STAC_DELL_M6_DMIC,
85 STAC_DELL_M6_BOTH,
6b3ab21e 86 STAC_DELL_EQ,
842ae638 87 STAC_ALIENWARE_M17X,
e1f0d669
MR		 88 STAC_92HD73XX_MODELS
89};
90
d0513fc6 91enum {
1607b8ea 92 STAC_92HD83XXX_AUTO,
d0513fc6 93 STAC_92HD83XXX_REF,
32ed3f46 94 STAC_92HD83XXX_PWR_REF,
8bb0ac55 95 STAC_DELL_S14,
b4e81876 96 STAC_92HD83XXX_HP,
48315590 97 STAC_HP_DV7_4000,
d0513fc6
MR		 98 STAC_92HD83XXX_MODELS
99};
100
e035b841 101enum {
1607b8ea 102 STAC_92HD71BXX_AUTO,
e035b841 103 STAC_92HD71BXX_REF,
a7662640
MR		 104 STAC_DELL_M4_1,
105 STAC_DELL_M4_2,
3a7abfd2 106 STAC_DELL_M4_3,
6a14f585 107 STAC_HP_M4,
2a6ce6e5 108 STAC_HP_DV4,
1b0652eb 109 STAC_HP_DV5,
ae6241fb 110 STAC_HP_HDX,
514bf54c 111 STAC_HP_DV4_1222NR,
e035b841
MR		 112 STAC_92HD71BXX_MODELS
113};
114
8e21c34c 115enum {
1607b8ea 116 STAC_925x_AUTO,
8e21c34c 117 STAC_925x_REF,
9cb36c2a
MCC		 118 STAC_M1,
119 STAC_M1_2,
120 STAC_M2,
8e21c34c 121 STAC_M2_2,
9cb36c2a
MCC		 122 STAC_M3,
123 STAC_M5,
124 STAC_M6,
8e21c34c
TD		 125 STAC_925x_MODELS
126};
127
f5fcc13c 128enum {
1607b8ea 129 STAC_922X_AUTO,
f5fcc13c
TI		 130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
5d5d3bc3
IZ		 133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
536319af
NB		 138 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
139 * is given, one of the above models will be
140 * chosen according to the subsystem id. */
dfe495d0 141 /* for backward compatibility */
f5fcc13c 142 STAC_MACMINI,
3fc24d85 143 STAC_MACBOOK,
6f0778d8
NB		 144 STAC_MACBOOK_PRO_V1,
145 STAC_MACBOOK_PRO_V2,
f16928fb 146 STAC_IMAC_INTEL,
0dae0f83 147 STAC_IMAC_INTEL_20,
8c650087 148 STAC_ECS_202,
dfe495d0
TI		 149 STAC_922X_DELL_D81,
150 STAC_922X_DELL_D82,
151 STAC_922X_DELL_M81,
152 STAC_922X_DELL_M82,
f5fcc13c
TI		 153 STAC_922X_MODELS
154};
155
156enum {
1607b8ea 157 STAC_927X_AUTO,
e28d8322 158 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 159 STAC_D965_REF,
160 STAC_D965_3ST,
161 STAC_D965_5ST,
679d92ed 162 STAC_D965_5ST_NO_FP,
4ff076e5 163 STAC_DELL_3ST,
8e9068b1 164 STAC_DELL_BIOS,
54930531 165 STAC_927X_VOLKNOB,
f5fcc13c
TI		 166 STAC_927X_MODELS
167};
403d1944 168
307282c8
TI		 169enum {
170 STAC_9872_AUTO,
171 STAC_9872_VAIO,
172 STAC_9872_MODELS
173};
174
74aeaabc
MR		 175struct sigmatel_event {
176 hda_nid_t nid;
c6e4c666
TI		 177 unsigned char type;
178 unsigned char tag;
74aeaabc
MR		 179 int data;
180};
181
182struct sigmatel_jack {
183 hda_nid_t nid;
184 int type;
185 struct snd_jack *jack;
186};
187
3d21d3f7
TI		 188struct sigmatel_mic_route {
189 hda_nid_t pin;
02d33322
TI		 190 signed char mux_idx;
191 signed char dmux_idx;
3d21d3f7
TI		 192};
193
263d0328
VK		 194struct unique_input_names {
195 int num;
196 char uname[HDA_MAX_NUM_INPUTS][32];
197};
198
2f2f4251 199struct sigmatel_spec {
c8b6bf9b 200 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 201 unsigned int num_mixers;
202
403d1944 203 int board_config;
c0cea0d0 204 unsigned int eapd_switch: 1;
c7d4b2fa 205 unsigned int surr_switch: 1;
3cc08dc6 206 unsigned int alt_switch: 1;
82bc955f 207 unsigned int hp_detect: 1;
00ef50c2 208 unsigned int spdif_mute: 1;
7c7767eb 209 unsigned int check_volume_offset:1;
3d21d3f7 210 unsigned int auto_mic:1;
1b0e372d 211 unsigned int linear_tone_beep:1;
c7d4b2fa 212
4fe5195c 213 /* gpio lines */
0fc9dec4 214 unsigned int eapd_mask;
4fe5195c
MR		 215 unsigned int gpio_mask;
216 unsigned int gpio_dir;
217 unsigned int gpio_data;
218 unsigned int gpio_mute;
86d190e7 219 unsigned int gpio_led;
c357aab0 220 unsigned int gpio_led_polarity;
4fe5195c 221
8daaaa97
MR		 222 /* stream */
223 unsigned int stream_delay;
224
4fe5195c 225 /* analog loopback */
d78d7a90 226 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 227 unsigned char aloopback_mask;
228 unsigned char aloopback_shift;
8259980e 229
a64135a2
MR		 230 /* power management */
231 unsigned int num_pwrs;
d0513fc6 232 unsigned int *pwr_mapping;
a64135a2 233 hda_nid_t *pwr_nids;
b76c850f 234 hda_nid_t *dac_list;
a64135a2 235
74aeaabc
MR		 236 /* jack detection */
237 struct snd_array jacks;
238
239 /* events */
240 struct snd_array events;
241
2f2f4251 242 /* playback */
b22b4821
MR		 243 struct hda_input_mux *mono_mux;
244 unsigned int cur_mmux;
2f2f4251 245 struct hda_multi_out multiout;
3cc08dc6 246 hda_nid_t dac_nids[5];
c21ca4a8
TI		 247 hda_nid_t hp_dacs[5];
248 hda_nid_t speaker_dacs[5];
2f2f4251 249
7c7767eb
TI		 250 int volume_offset;
251
2f2f4251
M		 252 /* capture */
253 hda_nid_t *adc_nids;
2f2f4251 254 unsigned int num_adcs;
dabbed6f
M		 255 hda_nid_t *mux_nids;
256 unsigned int num_muxes;
8b65727b
MP		 257 hda_nid_t *dmic_nids;
258 unsigned int num_dmics;
e1f0d669 259 hda_nid_t *dmux_nids;
1697055e 260 unsigned int num_dmuxes;
d9737751
MR		 261 hda_nid_t *smux_nids;
262 unsigned int num_smuxes;
5207e10e 263 unsigned int num_analog_muxes;
6479c631
TI		 264
265 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
266 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
267 unsigned int num_caps; /* number of capture volume/switch elements */
268
3d21d3f7
TI		 269 struct sigmatel_mic_route ext_mic;
270 struct sigmatel_mic_route int_mic;
271
65973632 272 const char **spdif_labels;
d9737751 273
dabbed6f 274 hda_nid_t dig_in_nid;
b22b4821 275 hda_nid_t mono_nid;
1cd2224c
MR		 276 hda_nid_t anabeep_nid;
277 hda_nid_t digbeep_nid;
2f2f4251 278
2f2f4251
M		 279 /* pin widgets */
280 hda_nid_t *pin_nids;
281 unsigned int num_pins;
2f2f4251
M		 282
283 /* codec specific stuff */
284 struct hda_verb *init;
c8b6bf9b 285 struct snd_kcontrol_new *mixer;
2f2f4251
M		 286
287 /* capture source */
8b65727b 288 struct hda_input_mux *dinput_mux;
e1f0d669 289 unsigned int cur_dmux[2];
c7d4b2fa 290 struct hda_input_mux *input_mux;
3cc08dc6 291 unsigned int cur_mux[3];
d9737751
MR		 292 struct hda_input_mux *sinput_mux;
293 unsigned int cur_smux[2];
2a9c7816
MR		 294 unsigned int cur_amux;
295 hda_nid_t *amp_nids;
8daaaa97 296 unsigned int powerdown_adcs;
2f2f4251 297
403d1944
MP		 298 /* i/o switches */
299 unsigned int io_switch[2];
0fb87bb4 300 unsigned int clfe_swap;
c21ca4a8
TI		 301 hda_nid_t line_switch; /* shared line-in for input and output */
302 hda_nid_t mic_switch; /* shared mic-in for input and output */
303 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 304 unsigned int aloopback;
2f2f4251 305
c7d4b2fa
M		 306 struct hda_pcm pcm_rec[2]; /* PCM information */
307
308 /* dynamic controls and input_mux */
309 struct auto_pin_cfg autocfg;
603c4019 310 struct snd_array kctls;
8b65727b 311 struct hda_input_mux private_dimux;
c7d4b2fa 312 struct hda_input_mux private_imux;
d9737751 313 struct hda_input_mux private_smux;
b22b4821 314 struct hda_input_mux private_mono_mux;
263d0328 315 struct unique_input_names private_u_inp_names;
2f2f4251
M		 316};
317
318static hda_nid_t stac9200_adc_nids[1] = {
319 0x03,
320};
321
322static hda_nid_t stac9200_mux_nids[1] = {
323 0x0c,
324};
325
326static hda_nid_t stac9200_dac_nids[1] = {
327 0x02,
328};
329
a64135a2
MR		 330static hda_nid_t stac92hd73xx_pwr_nids[8] = {
331 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
332 0x0f, 0x10, 0x11
333};
334
0ffa9807
MR		 335static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
336 0x26, 0,
337};
338
e1f0d669
MR		 339static hda_nid_t stac92hd73xx_adc_nids[2] = {
340 0x1a, 0x1b
341};
342
343#define STAC92HD73XX_NUM_DMICS 2
344static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
345 0x13, 0x14, 0
346};
347
348#define STAC92HD73_DAC_COUNT 5
e1f0d669 349
e2aec171
TI		 350static hda_nid_t stac92hd73xx_mux_nids[2] = {
351 0x20, 0x21,
e1f0d669
MR		 352};
353
354static hda_nid_t stac92hd73xx_dmux_nids[2] = {
355 0x20, 0x21,
356};
357
d9737751
MR		 358static hda_nid_t stac92hd73xx_smux_nids[2] = {
359 0x22, 0x23,
360};
361
6479c631
TI		 362#define STAC92HD73XX_NUM_CAPS 2
363static unsigned long stac92hd73xx_capvols[] = {
364 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
365 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
366};
367#define stac92hd73xx_capsws stac92hd73xx_capvols
368
d0513fc6 369#define STAC92HD83_DAC_COUNT 3
d0513fc6 370
667067d8 371static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR		 372 0x17, 0x18,
373};
374
375static hda_nid_t stac92hd83xxx_adc_nids[2] = {
376 0x15, 0x16,
377};
378
379static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
380 0xa, 0xb, 0xd, 0xe,
381};
382
0ffa9807
MR		 383static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
384 0x1e, 0,
385};
386
d0513fc6 387static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 388 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 389};
390
ab5a6ebe
VK		 391#define STAC92HD83XXX_NUM_DMICS 2
392static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
393 0x11, 0x20, 0
394};
395
6479c631
TI		 396#define STAC92HD83XXX_NUM_CAPS 2
397static unsigned long stac92hd83xxx_capvols[] = {
398 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
399 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
400};
401#define stac92hd83xxx_capsws stac92hd83xxx_capvols
402
a64135a2
MR		 403static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
404 0x0a, 0x0d, 0x0f
405};
406
e035b841
MR		 407static hda_nid_t stac92hd71bxx_adc_nids[2] = {
408 0x12, 0x13,
409};
410
411static hda_nid_t stac92hd71bxx_mux_nids[2] = {
412 0x1a, 0x1b
413};
414
4b33c767
MR		 415static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
416 0x1c, 0x1d,
e1f0d669
MR		 417};
418
d9737751
MR		 419static hda_nid_t stac92hd71bxx_smux_nids[2] = {
420 0x24, 0x25,
421};
422
e035b841
MR		 423#define STAC92HD71BXX_NUM_DMICS 2
424static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
425 0x18, 0x19, 0
426};
427
0ffa9807
MR		 428static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
429 0x22, 0
430};
431
6479c631
TI		 432#define STAC92HD71BXX_NUM_CAPS 2
433static unsigned long stac92hd71bxx_capvols[] = {
434 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
435 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
436};
437#define stac92hd71bxx_capsws stac92hd71bxx_capvols
438
8e21c34c
TD		 439static hda_nid_t stac925x_adc_nids[1] = {
440 0x03,
441};
442
443static hda_nid_t stac925x_mux_nids[1] = {
444 0x0f,
445};
446
447static hda_nid_t stac925x_dac_nids[1] = {
448 0x02,
449};
450
f6e9852a
TI		 451#define STAC925X_NUM_DMICS 1
452static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
453 0x15, 0
2c11f955
TD		 454};
455
1697055e
TI		 456static hda_nid_t stac925x_dmux_nids[1] = {
457 0x14,
458};
459
6479c631
TI		 460static unsigned long stac925x_capvols[] = {
461 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
462};
463static unsigned long stac925x_capsws[] = {
464 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
465};
466
2f2f4251
M		 467static hda_nid_t stac922x_adc_nids[2] = {
468 0x06, 0x07,
469};
470
471static hda_nid_t stac922x_mux_nids[2] = {
472 0x12, 0x13,
473};
474
6479c631
TI		 475#define STAC922X_NUM_CAPS 2
476static unsigned long stac922x_capvols[] = {
477 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
478 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
479};
480#define stac922x_capsws stac922x_capvols
481
45c1d85b
MR		 482static hda_nid_t stac927x_slave_dig_outs[2] = {
483 0x1f, 0,
484};
485
3cc08dc6
MP		 486static hda_nid_t stac927x_adc_nids[3] = {
487 0x07, 0x08, 0x09
488};
489
490static hda_nid_t stac927x_mux_nids[3] = {
491 0x15, 0x16, 0x17
492};
493
d9737751
MR		 494static hda_nid_t stac927x_smux_nids[1] = {
495 0x21,
496};
497
b76c850f
MR		 498static hda_nid_t stac927x_dac_nids[6] = {
499 0x02, 0x03, 0x04, 0x05, 0x06, 0
500};
501
e1f0d669
MR		 502static hda_nid_t stac927x_dmux_nids[1] = {
503 0x1b,
504};
505
7f16859a
MR		 506#define STAC927X_NUM_DMICS 2
507static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
508 0x13, 0x14, 0
509};
510
6479c631
TI		 511#define STAC927X_NUM_CAPS 3
512static unsigned long stac927x_capvols[] = {
513 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
514 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
515 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
516};
517static unsigned long stac927x_capsws[] = {
518 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
519 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
520 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
521};
522
65973632
MR		 523static const char *stac927x_spdif_labels[5] = {
524 "Digital Playback", "ADAT", "Analog Mux 1",
525 "Analog Mux 2", "Analog Mux 3"
526};
527
f3302a59
MP		 528static hda_nid_t stac9205_adc_nids[2] = {
529 0x12, 0x13
530};
531
532static hda_nid_t stac9205_mux_nids[2] = {
533 0x19, 0x1a
534};
535
e1f0d669 536static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 537 0x1d,
e1f0d669
MR		 538};
539
d9737751
MR		 540static hda_nid_t stac9205_smux_nids[1] = {
541 0x21,
542};
543
f6e9852a
TI		 544#define STAC9205_NUM_DMICS 2
545static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
546 0x17, 0x18, 0
8b65727b
MP		 547};
548
6479c631
TI		 549#define STAC9205_NUM_CAPS 2
550static unsigned long stac9205_capvols[] = {
551 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
552 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
553};
554static unsigned long stac9205_capsws[] = {
555 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
556 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
557};
558
c7d4b2fa 559static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 560 0x08, 0x09, 0x0d, 0x0e,
561 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 562};
563
8e21c34c
TD		 564static hda_nid_t stac925x_pin_nids[8] = {
565 0x07, 0x08, 0x0a, 0x0b,
566 0x0c, 0x0d, 0x10, 0x11,
567};
568
2f2f4251
M		 569static hda_nid_t stac922x_pin_nids[10] = {
570 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
571 0x0f, 0x10, 0x11, 0x15, 0x1b,
572};
573
a7662640 574static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 575 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
576 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 577 0x14, 0x22, 0x23
e1f0d669
MR		 578};
579
8bb0ac55 580static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 581 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 582 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 583};
616f89e7 584
36706005
CC		 585static hda_nid_t stac92hd88xxx_pin_nids[10] = {
586 0x0a, 0x0b, 0x0c, 0x0d,
587 0x0f, 0x11, 0x1f, 0x20,
588};
589
616f89e7
HRK		 590#define STAC92HD71BXX_NUM_PINS 13
591static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
592 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
593 0x00, 0x14, 0x18, 0x19, 0x1e,
594 0x1f, 0x20, 0x27
595};
596static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 597 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
598 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 599 0x1f, 0x20, 0x27
e035b841
MR		 600};
601
3cc08dc6
MP		 602static hda_nid_t stac927x_pin_nids[14] = {
603 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
604 0x0f, 0x10, 0x11, 0x12, 0x13,
605 0x14, 0x21, 0x22, 0x23,
606};
607
f3302a59
MP		 608static hda_nid_t stac9205_pin_nids[12] = {
609 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
610 0x0f, 0x14, 0x16, 0x17, 0x18,
611 0x21, 0x22,
f3302a59
MP		 612};
613
8b65727b
MP		 614static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_info *uinfo)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
620}
621
622static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
e1f0d669 627 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 628
e1f0d669 629 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 630 return 0;
631}
632
633static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
e1f0d669 638 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 639
640 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 641 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 642}
643
d9737751
MR		 644static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_info *uinfo)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
649 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
650}
651
652static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
658
659 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
660 return 0;
661}
662
663static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_value *ucontrol)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
00ef50c2 668 struct hda_input_mux *smux = &spec->private_smux;
d9737751 669 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 670 int err, val;
671 hda_nid_t nid;
d9737751 672
00ef50c2 673 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 674 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 675 if (err < 0)
676 return err;
677
678 if (spec->spdif_mute) {
679 if (smux_idx == 0)
680 nid = spec->multiout.dig_out_nid;
681 else
682 nid = codec->slave_dig_outs[smux_idx - 1];
683 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 684 val = HDA_AMP_MUTE;
00ef50c2 685 else
c9b46f91 686 val = 0;
00ef50c2 687 /* un/mute SPDIF out */
c9b46f91
TI		 688 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
689 HDA_AMP_MUTE, val);
00ef50c2
MR		 690 }
691 return 0;
d9737751
MR		 692}
693
2fc99890
NL		 694static unsigned int stac92xx_vref_set(struct hda_codec *codec,
695 hda_nid_t nid, unsigned int new_vref)
696{
b8621516 697 int error;
2fc99890
NL		 698 unsigned int pincfg;
699 pincfg = snd_hda_codec_read(codec, nid, 0,
700 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
701
702 pincfg &= 0xff;
703 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
704 pincfg |= new_vref;
705
706 if (new_vref == AC_PINCTL_VREF_HIZ)
707 pincfg |= AC_PINCTL_OUT_EN;
708 else
709 pincfg |= AC_PINCTL_IN_EN;
710
711 error = snd_hda_codec_write_cache(codec, nid, 0,
712 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
713 if (error < 0)
714 return error;
715 else
716 return 1;
717}
718
719static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
720{
721 unsigned int vref;
722 vref = snd_hda_codec_read(codec, nid, 0,
723 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
724 vref &= AC_PINCTL_VREFEN;
725 return vref;
726}
727
c8b6bf9b 728static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 729{
730 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
731 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 732 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 733}
734
c8b6bf9b 735static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 736{
737 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
738 struct sigmatel_spec *spec = codec->spec;
739 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
740
741 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
742 return 0;
743}
744
c8b6bf9b 745static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 746{
747 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
748 struct sigmatel_spec *spec = codec->spec;
749 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI		 750 const struct hda_input_mux *imux = spec->input_mux;
751 unsigned int idx, prev_idx;
752
753 idx = ucontrol->value.enumerated.item[0];
754 if (idx >= imux->num_items)
755 idx = imux->num_items - 1;
756 prev_idx = spec->cur_mux[adc_idx];
757 if (prev_idx == idx)
758 return 0;
759 if (idx < spec->num_analog_muxes) {
760 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
761 AC_VERB_SET_CONNECT_SEL,
762 imux->items[idx].index);
763 if (prev_idx >= spec->num_analog_muxes) {
764 imux = spec->dinput_mux;
765 /* 0 = analog */
766 snd_hda_codec_write_cache(codec,
767 spec->dmux_nids[adc_idx], 0,
768 AC_VERB_SET_CONNECT_SEL,
769 imux->items[0].index);
770 }
771 } else {
772 imux = spec->dinput_mux;
773 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
774 AC_VERB_SET_CONNECT_SEL,
775 imux->items[idx - 1].index);
776 }
777 spec->cur_mux[adc_idx] = idx;
778 return 1;
2f2f4251
M		 779}
780
b22b4821
MR		 781static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
782 struct snd_ctl_elem_info *uinfo)
783{
784 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
785 struct sigmatel_spec *spec = codec->spec;
786 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
787}
788
789static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
793 struct sigmatel_spec *spec = codec->spec;
794
795 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
796 return 0;
797}
798
799static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
800 struct snd_ctl_elem_value *ucontrol)
801{
802 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
803 struct sigmatel_spec *spec = codec->spec;
804
805 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
806 spec->mono_nid, &spec->cur_mmux);
807}
808
5f10c4a9
ML		 809#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
810
811static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
812 struct snd_ctl_elem_value *ucontrol)
813{
814 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 815 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 816 struct sigmatel_spec *spec = codec->spec;
817
e1f0d669
MR		 818 ucontrol->value.integer.value[0] = !!(spec->aloopback &
819 (spec->aloopback_mask << idx));
5f10c4a9
ML		 820 return 0;
821}
822
823static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
824 struct snd_ctl_elem_value *ucontrol)
825{
826 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
827 struct sigmatel_spec *spec = codec->spec;
e1f0d669 828 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 829 unsigned int dac_mode;
e1f0d669 830 unsigned int val, idx_val;
5f10c4a9 831
e1f0d669
MR		 832 idx_val = spec->aloopback_mask << idx;
833 if (ucontrol->value.integer.value[0])
834 val = spec->aloopback | idx_val;
835 else
836 val = spec->aloopback & ~idx_val;
68ea7b2f 837 if (spec->aloopback == val)
5f10c4a9
ML		 838 return 0;
839
68ea7b2f 840 spec->aloopback = val;
5f10c4a9 841
e1f0d669
MR		 842 /* Only return the bits defined by the shift value of the
843 * first two bytes of the mask
844 */
5f10c4a9 845 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 846 kcontrol->private_value & 0xFFFF, 0x0);
847 dac_mode >>= spec->aloopback_shift;
5f10c4a9 848
e1f0d669 849 if (spec->aloopback & idx_val) {
5f10c4a9 850 snd_hda_power_up(codec);
e1f0d669 851 dac_mode |= idx_val;
5f10c4a9
ML		 852 } else {
853 snd_hda_power_down(codec);
e1f0d669 854 dac_mode &= ~idx_val;
5f10c4a9
ML		 855 }
856
857 snd_hda_codec_write_cache(codec, codec->afg, 0,
858 kcontrol->private_value >> 16, dac_mode);
859
860 return 1;
861}
862
c7d4b2fa 863static struct hda_verb stac9200_core_init[] = {
2f2f4251 864 /* set dac0mux for dac converter */
c7d4b2fa 865 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 866 {}
867};
868
1194b5b7
TI		 869static struct hda_verb stac9200_eapd_init[] = {
870 /* set dac0mux for dac converter */
871 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
872 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
873 {}
874};
875
d654a660
MR		 876static struct hda_verb dell_eq_core_init[] = {
877 /* set master volume to max value without distortion
878 * and direct control */
879 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 880 {}
881};
882
e2aec171 883static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 884 /* set master volume and direct control */
885 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 886 {}
887};
888
d0513fc6 889static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 890 /* power state controls amps */
891 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 892 {}
d0513fc6
MR		 893};
894
e035b841 895static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 896 /* set master volume and direct control */
897 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 898 {}
541eee87
MR		 899};
900
ca8d33fc
MR		 901static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
902 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
903 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 904 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
905 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 906 {}
907};
908
8e21c34c
TD		 909static struct hda_verb stac925x_core_init[] = {
910 /* set dac0mux for dac converter */
911 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 912 /* mute the master volume */
913 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 914 {}
915};
916
c7d4b2fa 917static struct hda_verb stac922x_core_init[] = {
2f2f4251 918 /* set master volume and direct control */
c7d4b2fa 919 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 920 {}
921};
922
93ed1503 923static struct hda_verb d965_core_init[] = {
19039bd0 924 /* set master volume and direct control */
93ed1503 925 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 926 /* unmute node 0x1b */
927 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
928 /* select node 0x03 as DAC */
929 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
930 {}
931};
932
ccca7cdc
TI		 933static struct hda_verb dell_3st_core_init[] = {
934 /* don't set delta bit */
935 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
936 /* unmute node 0x1b */
937 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
938 /* select node 0x03 as DAC */
939 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
940 {}
941};
942
3cc08dc6
MP		 943static struct hda_verb stac927x_core_init[] = {
944 /* set master volume and direct control */
945 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 946 /* enable analog pc beep path */
947 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 948 {}
949};
950
54930531
TI		 951static struct hda_verb stac927x_volknob_core_init[] = {
952 /* don't set delta bit */
953 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
954 /* enable analog pc beep path */
955 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
956 {}
957};
958
f3302a59
MP		 959static struct hda_verb stac9205_core_init[] = {
960 /* set master volume and direct control */
961 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 962 /* enable analog pc beep path */
963 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 964 {}
965};
966
b22b4821
MR		 967#define STAC_MONO_MUX \
968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Mono Mux", \
971 .count = 1, \
972 .info = stac92xx_mono_mux_enum_info, \
973 .get = stac92xx_mono_mux_enum_get, \
974 .put = stac92xx_mono_mux_enum_put, \
975 }
976
e1f0d669 977#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 978 { \
979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
980 .name = "Analog Loopback", \
e1f0d669 981 .count = cnt, \
5f10c4a9
ML		 982 .info = stac92xx_aloopback_info, \
983 .get = stac92xx_aloopback_get, \
984 .put = stac92xx_aloopback_put, \
985 .private_value = verb_read | (verb_write << 16), \
986 }
987
2fc99890
NL		 988#define DC_BIAS(xname, idx, nid) \
989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = xname, \
992 .index = idx, \
993 .info = stac92xx_dc_bias_info, \
994 .get = stac92xx_dc_bias_get, \
995 .put = stac92xx_dc_bias_put, \
996 .private_value = nid, \
997 }
998
c8b6bf9b 999static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1000 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1001 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1002 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1003 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1004 { } /* end */
1005};
1006
d78d7a90
TI		 1007static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1008 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1009 {}
1010};
1011
1012static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1013 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1014 {}
1015};
e1f0d669 1016
d78d7a90
TI		 1017static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1019 {}
1020};
1021
d0513fc6 1022
d78d7a90
TI		 1023static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1024 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1025};
541eee87 1026
8e21c34c 1027static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1028 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1029 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1030 { } /* end */
1031};
1032
d78d7a90
TI		 1033static struct snd_kcontrol_new stac9205_loopback[] = {
1034 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1035 {}
1036};
1037
d78d7a90
TI		 1038static struct snd_kcontrol_new stac927x_loopback[] = {
1039 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1040 {}
1041};
1042
1697055e
TI		 1043static struct snd_kcontrol_new stac_dmux_mixer = {
1044 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1045 .name = "Digital Input Source",
1046 /* count set later */
1047 .info = stac92xx_dmux_enum_info,
1048 .get = stac92xx_dmux_enum_get,
1049 .put = stac92xx_dmux_enum_put,
1050};
1051
d9737751
MR		 1052static struct snd_kcontrol_new stac_smux_mixer = {
1053 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1054 .name = "IEC958 Playback Source",
d9737751
MR		 1055 /* count set later */
1056 .info = stac92xx_smux_enum_info,
1057 .get = stac92xx_smux_enum_get,
1058 .put = stac92xx_smux_enum_put,
1059};
1060
2134ea4f
TI		 1061static const char *slave_vols[] = {
1062 "Front Playback Volume",
1063 "Surround Playback Volume",
1064 "Center Playback Volume",
1065 "LFE Playback Volume",
1066 "Side Playback Volume",
1067 "Headphone Playback Volume",
2134ea4f 1068 "Speaker Playback Volume",
2134ea4f
TI		 1069 NULL
1070};
1071
1072static const char *slave_sws[] = {
1073 "Front Playback Switch",
1074 "Surround Playback Switch",
1075 "Center Playback Switch",
1076 "LFE Playback Switch",
1077 "Side Playback Switch",
1078 "Headphone Playback Switch",
2134ea4f 1079 "Speaker Playback Switch",
edb54a55 1080 "IEC958 Playback Switch",
2134ea4f
TI		 1081 NULL
1082};
1083
603c4019 1084static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1085static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1086
2f2f4251
M		 1087static int stac92xx_build_controls(struct hda_codec *codec)
1088{
1089 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1090 struct auto_pin_cfg *cfg = &spec->autocfg;
1091 hda_nid_t nid;
2f2f4251 1092 int err;
c7d4b2fa 1093 int i;
2f2f4251 1094
6479c631
TI		 1095 if (spec->mixer) {
1096 err = snd_hda_add_new_ctls(codec, spec->mixer);
1097 if (err < 0)
1098 return err;
1099 }
c7d4b2fa
M		 1100
1101 for (i = 0; i < spec->num_mixers; i++) {
1102 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1103 if (err < 0)
1104 return err;
1105 }
5207e10e
TI		 1106 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1107 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1108 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1109 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1110 snd_ctl_new1(&stac_dmux_mixer, codec));
1111 if (err < 0)
1112 return err;
1113 }
d9737751 1114 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1115 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1116 struct hda_input_mux *smux = &spec->private_smux;
1117 /* check for mute support on SPDIF out */
1118 if (wcaps & AC_WCAP_OUT_AMP) {
b5786e85 1119 strcpy(smux->items[smux->num_items].label, "Off");
00ef50c2
MR		 1120 smux->items[smux->num_items].index = 0;
1121 smux->num_items++;
1122 spec->spdif_mute = 1;
1123 }
d9737751 1124 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1125 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1126 snd_ctl_new1(&stac_smux_mixer, codec));
1127 if (err < 0)
1128 return err;
1129 }
c7d4b2fa 1130
dabbed6f
M		 1131 if (spec->multiout.dig_out_nid) {
1132 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1133 if (err < 0)
1134 return err;
9a08160b
TI		 1135 err = snd_hda_create_spdif_share_sw(codec,
1136 &spec->multiout);
1137 if (err < 0)
1138 return err;
1139 spec->multiout.share_spdif = 1;
dabbed6f 1140 }
da74ae3e 1141 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1142 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1143 if (err < 0)
1144 return err;
1145 }
2134ea4f
TI		 1146
1147 /* if we have no master control, let's create it */
1148 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1149 unsigned int vmaster_tlv[4];
2134ea4f 1150 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1151 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1152 /* correct volume offset */
1153 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1154 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1155 vmaster_tlv, slave_vols);
2134ea4f
TI		 1156 if (err < 0)
1157 return err;
1158 }
1159 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1160 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1161 NULL, slave_sws);
1162 if (err < 0)
1163 return err;
1164 }
1165
d78d7a90
TI		 1166 if (spec->aloopback_ctl &&
1167 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1168 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1169 if (err < 0)
1170 return err;
1171 }
1172
603c4019 1173 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1174
1175 /* create jack input elements */
1176 if (spec->hp_detect) {
1177 for (i = 0; i < cfg->hp_outs; i++) {
1178 int type = SND_JACK_HEADPHONE;
1179 nid = cfg->hp_pins[i];
1180 /* jack detection */
1181 if (cfg->hp_outs == i)
1182 type |= SND_JACK_LINEOUT;
1183 err = stac92xx_add_jack(codec, nid, type);
1184 if (err < 0)
1185 return err;
1186 }
1187 }
1188 for (i = 0; i < cfg->line_outs; i++) {
1189 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1190 SND_JACK_LINEOUT);
1191 if (err < 0)
1192 return err;
1193 }
eea7dc93
TI		 1194 for (i = 0; i < cfg->num_inputs; i++) {
1195 nid = cfg->inputs[i].pin;
1196 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1197 if (err < 0)
1198 return err;
e4973e1e
TI		 1199 }
1200
dabbed6f 1201 return 0;
2f2f4251
M		 1202}
1203
403d1944 1204static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1205 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1206 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1207};
1208
58eec423
MCC		 1209static unsigned int gateway9200_m4_pin_configs[8] = {
1210 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1211 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1212};
1213static unsigned int gateway9200_m4_2_pin_configs[8] = {
1214 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1215 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1216};
1217
1218/*
dfe495d0
TI		 1219 STAC 9200 pin configs for
1220 102801A8
1221 102801DE
1222 102801E8
1223*/
1224static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1225 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1226 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1227};
1228
1229/*
1230 STAC 9200 pin configs for
1231 102801C0
1232 102801C1
1233*/
1234static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1235 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1236 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1237};
1238
1239/*
1240 STAC 9200 pin configs for
1241 102801C4 (Dell Dimension E310)
1242 102801C5
1243 102801C7
1244 102801D9
1245 102801DA
1246 102801E3
1247*/
1248static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1249 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1250 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1251};
1252
1253
1254/*
1255 STAC 9200-32 pin configs for
1256 102801B5 (Dell Inspiron 630m)
1257 102801D8 (Dell Inspiron 640m)
1258*/
1259static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1260 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1261 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1262};
1263
1264/*
1265 STAC 9200-32 pin configs for
1266 102801C2 (Dell Latitude D620)
1267 102801C8
1268 102801CC (Dell Latitude D820)
1269 102801D4
1270 102801D6
1271*/
1272static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1273 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1274 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1275};
1276
1277/*
1278 STAC 9200-32 pin configs for
1279 102801CE (Dell XPS M1710)
1280 102801CF (Dell Precision M90)
1281*/
1282static unsigned int dell9200_m23_pin_configs[8] = {
1283 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1284 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1285};
1286
1287/*
1288 STAC 9200-32 pin configs for
1289 102801C9
1290 102801CA
1291 102801CB (Dell Latitude 120L)
1292 102801D3
1293*/
1294static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1295 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1296 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1297};
1298
1299/*
1300 STAC 9200-32 pin configs for
1301 102801BD (Dell Inspiron E1505n)
1302 102801EE
1303 102801EF
1304*/
1305static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1306 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1307 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1308};
1309
1310/*
1311 STAC 9200-32 pin configs for
1312 102801F5 (Dell Inspiron 1501)
1313 102801F6
1314*/
1315static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1316 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1317 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1318};
1319
1320/*
1321 STAC 9200-32
1322 102801CD (Dell Inspiron E1705/9400)
1323*/
1324static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1325 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1326 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1327};
1328
bf277785
TD		 1329static unsigned int oqo9200_pin_configs[8] = {
1330 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1331 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1332};
1333
dfe495d0 1334
f5fcc13c
TI		 1335static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1336 [STAC_REF] = ref9200_pin_configs,
bf277785 1337 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1338 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1339 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1340 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1341 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1342 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1343 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1344 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1345 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1346 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1347 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1348 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1349 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1350 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1351};
1352
f5fcc13c 1353static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1354 [STAC_AUTO] = "auto",
f5fcc13c 1355 [STAC_REF] = "ref",
bf277785 1356 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1357 [STAC_9200_DELL_D21] = "dell-d21",
1358 [STAC_9200_DELL_D22] = "dell-d22",
1359 [STAC_9200_DELL_D23] = "dell-d23",
1360 [STAC_9200_DELL_M21] = "dell-m21",
1361 [STAC_9200_DELL_M22] = "dell-m22",
1362 [STAC_9200_DELL_M23] = "dell-m23",
1363 [STAC_9200_DELL_M24] = "dell-m24",
1364 [STAC_9200_DELL_M25] = "dell-m25",
1365 [STAC_9200_DELL_M26] = "dell-m26",
1366 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1367 [STAC_9200_M4] = "gateway-m4",
1368 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1369 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1370};
1371
1372static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1373 /* SigmaTel reference board */
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1375 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1377 "DFI LanParty", STAC_REF),
e7377071 1378 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1380 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1382 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1384 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1386 "unknown Dell", STAC_9200_DELL_D22),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1388 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1390 "Dell Latitude D620", STAC_9200_DELL_M22),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1392 "unknown Dell", STAC_9200_DELL_D23),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1394 "unknown Dell", STAC_9200_DELL_D23),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1396 "unknown Dell", STAC_9200_DELL_M22),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1398 "unknown Dell", STAC_9200_DELL_M24),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1400 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1402 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1404 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1406 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1408 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1410 "Dell Precision M90", STAC_9200_DELL_M23),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1412 "unknown Dell", STAC_9200_DELL_M22),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1414 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1416 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1418 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1420 "unknown Dell", STAC_9200_DELL_D23),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1422 "unknown Dell", STAC_9200_DELL_D23),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1424 "unknown Dell", STAC_9200_DELL_D21),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1426 "unknown Dell", STAC_9200_DELL_D23),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1428 "unknown Dell", STAC_9200_DELL_D21),
1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1430 "unknown Dell", STAC_9200_DELL_M25),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1432 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1433 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1434 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1436 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1437 /* Panasonic */
117f257d 1438 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1439 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1440 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1441 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1442 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1443 /* OQO Mobile */
1444 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1445 {} /* terminator */
1446};
1447
8e21c34c
TD		 1448static unsigned int ref925x_pin_configs[8] = {
1449 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1450 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1451};
1452
9cb36c2a
MCC		 1453static unsigned int stac925xM1_pin_configs[8] = {
1454 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1455 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1456};
1457
9cb36c2a
MCC		 1458static unsigned int stac925xM1_2_pin_configs[8] = {
1459 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1460 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1461};
58eec423 1462
9cb36c2a
MCC		 1463static unsigned int stac925xM2_pin_configs[8] = {
1464 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1465 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1466};
1467
8e21c34c 1468static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1469 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1470 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1471};
1472
9cb36c2a
MCC		 1473static unsigned int stac925xM3_pin_configs[8] = {
1474 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1475 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1476};
58eec423 1477
9cb36c2a
MCC		 1478static unsigned int stac925xM5_pin_configs[8] = {
1479 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1480 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1481};
1482
9cb36c2a
MCC		 1483static unsigned int stac925xM6_pin_configs[8] = {
1484 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1485 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1486};
1487
1488static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1489 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1490 [STAC_M1] = stac925xM1_pin_configs,
1491 [STAC_M1_2] = stac925xM1_2_pin_configs,
1492 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1493 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1494 [STAC_M3] = stac925xM3_pin_configs,
1495 [STAC_M5] = stac925xM5_pin_configs,
1496 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1497};
1498
1499static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1500 [STAC_925x_AUTO] = "auto",
8e21c34c 1501 [STAC_REF] = "ref",
9cb36c2a
MCC		 1502 [STAC_M1] = "m1",
1503 [STAC_M1_2] = "m1-2",
1504 [STAC_M2] = "m2",
8e21c34c 1505 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1506 [STAC_M3] = "m3",
1507 [STAC_M5] = "m5",
1508 [STAC_M6] = "m6",
8e21c34c
TD		 1509};
1510
9cb36c2a 1511static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1512 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1513 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1514 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1515 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1516 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1517 /* Not sure about the brand name for those */
1518 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1519 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1520 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1521 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1522 {} /* terminator */
8e21c34c
TD		 1523};
1524
1525static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1526 /* SigmaTel reference board */
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1529 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1530
1531 /* Default table for unknown ID */
1532 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1533
8e21c34c
TD		 1534 {} /* terminator */
1535};
1536
a7662640 1537static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1538 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1539 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1540 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1541 0x01452050,
1542};
1543
1544static unsigned int dell_m6_pin_configs[13] = {
1545 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1546 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1547 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1548 0x4f0000f0,
e1f0d669
MR		 1549};
1550
842ae638
TI		 1551static unsigned int alienware_m17x_pin_configs[13] = {
1552 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1553 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1554 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1555 0x904601b0,
1556};
1557
4d26f446 1558static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1559 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1560 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1561};
1562
e1f0d669 1563static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1564 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1565 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1566 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1567 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1568 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1569 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1570 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1571};
1572
1573static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1574 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1575 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1576 [STAC_92HD73XX_REF] = "ref",
ae709440 1577 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1578 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1579 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1580 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1581 [STAC_DELL_EQ] = "dell-eq",
842ae638 1582 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1583};
1584
1585static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1586 /* SigmaTel reference board */
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1588 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1590 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1592 "Intel DG45ID", STAC_92HD73XX_INTEL),
1593 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1594 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1596 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1598 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1600 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1602 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1604 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1606 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1608 "unknown Dell", STAC_DELL_M6_DMIC),
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1610 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1612 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1614 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1616 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1618 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1620 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC		 1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1622 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR		 1623 {} /* terminator */
1624};
1625
842ae638
TI		 1626static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1628 "Alienware M17x", STAC_ALIENWARE_M17X),
1629 {} /* terminator */
1630};
1631
8bb0ac55 1632static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1633 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1634 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1635 0x01451160, 0x98560170,
1636};
1637
8bb0ac55 1638static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1639 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1640 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1641 0x40f000f0, 0x40f000f0,
1642};
1643
48315590
SE		 1644static unsigned int hp_dv7_4000_pin_configs[10] = {
1645 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1646 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1647 0x40f000f0, 0x40f000f0,
1648};
1649
d0513fc6
MR		 1650static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1651 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1652 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1653 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1654 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1655};
1656
1657static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1658 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1659 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1660 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1661 [STAC_DELL_S14] = "dell-s14",
b4e81876 1662 [STAC_92HD83XXX_HP] = "hp",
48315590 1663 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1664};
1665
1666static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1667 /* SigmaTel reference board */
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1669 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1671 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1673 "unknown Dell", STAC_DELL_S14),
b4e81876
TI		 1674 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1675 "HP", STAC_92HD83XXX_HP),
574f3c4f 1676 {} /* terminator */
d0513fc6
MR		 1677};
1678
616f89e7 1679static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1680 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1681 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1682 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1683 0x00000000
e035b841
MR		 1684};
1685
616f89e7 1686static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1687 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1688 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1689 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1690 0x00000000
a7662640
MR		 1691};
1692
616f89e7 1693static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1694 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1695 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1696 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1697 0x00000000
a7662640
MR		 1698};
1699
616f89e7 1700static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1701 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1702 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1703 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1704 0x00000000
3a7abfd2
MR		 1705};
1706
e035b841
MR		 1707static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1708 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1709 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1710 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1711 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1712 [STAC_HP_M4] = NULL,
2a6ce6e5 1713 [STAC_HP_DV4] = NULL,
1b0652eb 1714 [STAC_HP_DV5] = NULL,
ae6241fb 1715 [STAC_HP_HDX] = NULL,
514bf54c 1716 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1717};
1718
1719static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1720 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1721 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1722 [STAC_DELL_M4_1] = "dell-m4-1",
1723 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1724 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1725 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1726 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1727 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1728 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1729 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1730};
1731
1732static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1733 /* SigmaTel reference board */
1734 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1735 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1736 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1737 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1739 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1740 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1741 "HP", STAC_HP_DV5),
58d8395b
TI		 1742 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1743 "HP", STAC_HP_DV5),
2ae466f8 1744 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1745 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1746 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1747 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1749 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1751 "HP mini 1000", STAC_HP_M4),
ae6241fb 1752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1753 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1754 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1755 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1757 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
1972d025
TI		 1758 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1759 "HP", STAC_HP_DV5),
a7662640
MR		 1760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1761 "unknown Dell", STAC_DELL_M4_1),
1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1763 "unknown Dell", STAC_DELL_M4_1),
1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1765 "unknown Dell", STAC_DELL_M4_1),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1767 "unknown Dell", STAC_DELL_M4_1),
1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1769 "unknown Dell", STAC_DELL_M4_1),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1771 "unknown Dell", STAC_DELL_M4_1),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1773 "unknown Dell", STAC_DELL_M4_1),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1775 "unknown Dell", STAC_DELL_M4_2),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1777 "unknown Dell", STAC_DELL_M4_2),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1779 "unknown Dell", STAC_DELL_M4_2),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1781 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1783 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1784 {} /* terminator */
1785};
1786
403d1944
MP		 1787static unsigned int ref922x_pin_configs[10] = {
1788 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1789 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1790 0x40000100, 0x40000100,
1791};
1792
dfe495d0
TI		 1793/*
1794 STAC 922X pin configs for
1795 102801A7
1796 102801AB
1797 102801A9
1798 102801D1
1799 102801D2
1800*/
1801static unsigned int dell_922x_d81_pin_configs[10] = {
1802 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1803 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1804 0x01813122, 0x400001f2,
1805};
1806
1807/*
1808 STAC 922X pin configs for
1809 102801AC
1810 102801D0
1811*/
1812static unsigned int dell_922x_d82_pin_configs[10] = {
1813 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1814 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1815 0x01813122, 0x400001f1,
1816};
1817
1818/*
1819 STAC 922X pin configs for
1820 102801BF
1821*/
1822static unsigned int dell_922x_m81_pin_configs[10] = {
1823 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1824 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1825 0x40C003f1, 0x405003f0,
1826};
1827
1828/*
1829 STAC 9221 A1 pin configs for
1830 102801D7 (Dell XPS M1210)
1831*/
1832static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1833 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1834 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1835 0x508003f3, 0x405003f4,
1836};
1837
403d1944 1838static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1839 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1840 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1841 0x02a19120, 0x40000100,
1842};
1843
1844static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1845 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1846 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1847 0x02a19320, 0x40000100,
1848};
1849
5d5d3bc3
IZ		 1850static unsigned int intel_mac_v1_pin_configs[10] = {
1851 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1852 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1853 0x400000fc, 0x400000fb,
1854};
1855
1856static unsigned int intel_mac_v2_pin_configs[10] = {
1857 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1858 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1859 0x400000fc, 0x400000fb,
6f0778d8
NB		 1860};
1861
5d5d3bc3
IZ		 1862static unsigned int intel_mac_v3_pin_configs[10] = {
1863 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1864 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1865 0x400000fc, 0x400000fb,
1866};
1867
5d5d3bc3
IZ		 1868static unsigned int intel_mac_v4_pin_configs[10] = {
1869 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1870 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1871 0x400000fc, 0x400000fb,
1872};
1873
5d5d3bc3
IZ		 1874static unsigned int intel_mac_v5_pin_configs[10] = {
1875 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1876 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1877 0x400000fc, 0x400000fb,
0dae0f83
TI		 1878};
1879
8c650087
MCC		 1880static unsigned int ecs202_pin_configs[10] = {
1881 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1882 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1883 0x9037012e, 0x40e000f2,
1884};
76c08828 1885
19039bd0 1886static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1887 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1888 [STAC_D945GTP3] = d945gtp3_pin_configs,
1889 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1890 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1891 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1892 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1893 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1894 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1895 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1896 /* for backward compatibility */
5d5d3bc3
IZ		 1897 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1898 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1899 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1900 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1901 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1902 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1903 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1904 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1905 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1906 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1907 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1908};
1909
f5fcc13c 1910static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1911 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1912 [STAC_D945_REF] = "ref",
1913 [STAC_D945GTP5] = "5stack",
1914 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1915 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1916 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1917 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1918 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1919 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1920 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1921 /* for backward compatibility */
f5fcc13c 1922 [STAC_MACMINI] = "macmini",
3fc24d85 1923 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1924 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1925 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1926 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1927 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1928 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1929 [STAC_922X_DELL_D81] = "dell-d81",
1930 [STAC_922X_DELL_D82] = "dell-d82",
1931 [STAC_922X_DELL_M81] = "dell-m81",
1932 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1933};
1934
1935static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1936 /* SigmaTel reference board */
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1938 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1940 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1941 /* Intel 945G based systems */
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1943 "Intel D945G", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1945 "Intel D945G", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1967 "Intel D945G", STAC_D945GTP3),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1969 "Intel D945G", STAC_D945GTP3),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1971 "Intel D945G", STAC_D945GTP3),
1972 /* Intel D945G 5-stack systems */
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1974 "Intel D945G", STAC_D945GTP5),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1976 "Intel D945G", STAC_D945GTP5),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1978 "Intel D945G", STAC_D945GTP5),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1980 "Intel D945G", STAC_D945GTP5),
1981 /* Intel 945P based systems */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1983 "Intel D945P", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1985 "Intel D945P", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1987 "Intel D945P", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1989 "Intel D945P", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1991 "Intel D945P", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1993 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 1994 /* other intel */
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
1996 "Intel D945", STAC_D945_REF),
f5fcc13c 1997 /* other systems */
536319af 1998 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1999 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2000 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2001 /* Dell systems */
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2003 "unknown Dell", STAC_922X_DELL_D81),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2005 "unknown Dell", STAC_922X_DELL_D81),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2007 "unknown Dell", STAC_922X_DELL_D81),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2009 "unknown Dell", STAC_922X_DELL_D82),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2011 "unknown Dell", STAC_922X_DELL_M81),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2013 "unknown Dell", STAC_922X_DELL_D82),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2015 "unknown Dell", STAC_922X_DELL_D81),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2017 "unknown Dell", STAC_922X_DELL_D81),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2019 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2020 /* ECS/PC Chips boards */
dea0a509 2021 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2022 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2023 {} /* terminator */
2024};
2025
3cc08dc6 2026static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2027 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2028 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2029 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2030 0x01c42190, 0x40000100,
3cc08dc6
MP		 2031};
2032
93ed1503 2033static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2034 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2035 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2036 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2037 0x40000100, 0x40000100
2038};
2039
93ed1503
TD		 2040static unsigned int d965_5st_pin_configs[14] = {
2041 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2042 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2043 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2044 0x40000100, 0x40000100
2045};
2046
679d92ed
TI		 2047static unsigned int d965_5st_no_fp_pin_configs[14] = {
2048 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2049 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2050 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2051 0x40000100, 0x40000100
2052};
2053
4ff076e5
TD		 2054static unsigned int dell_3st_pin_configs[14] = {
2055 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2056 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2057 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2058 0x40c003fc, 0x40000100
2059};
2060
93ed1503 2061static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2062 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2063 [STAC_D965_REF] = ref927x_pin_configs,
2064 [STAC_D965_3ST] = d965_3st_pin_configs,
2065 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2066 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2067 [STAC_DELL_3ST] = dell_3st_pin_configs,
2068 [STAC_DELL_BIOS] = NULL,
54930531 2069 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2070};
2071
f5fcc13c 2072static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2073 [STAC_927X_AUTO] = "auto",
e28d8322 2074 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2075 [STAC_D965_REF] = "ref",
2076 [STAC_D965_3ST] = "3stack",
2077 [STAC_D965_5ST] = "5stack",
679d92ed 2078 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2079 [STAC_DELL_3ST] = "dell-3stack",
2080 [STAC_DELL_BIOS] = "dell-bios",
54930531 2081 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2082};
2083
2084static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2085 /* SigmaTel reference board */
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2087 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2089 "DFI LanParty", STAC_D965_REF),
81d3dbde 2090 /* Intel 946 based systems */
f5fcc13c
TI		 2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2093 /* 965 based 3 stack systems */
dea0a509
TI		 2094 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2095 "Intel D965", STAC_D965_3ST),
2096 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2097 "Intel D965", STAC_D965_3ST),
4ff076e5 2098 /* Dell 3 stack systems */
dfe495d0 2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2102 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2112 /* 965 based 5 stack systems */
dea0a509
TI		 2113 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2114 "Intel D965", STAC_D965_5ST),
2115 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2116 "Intel D965", STAC_D965_5ST),
54930531
TI		 2117 /* volume-knob fixes */
2118 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2119 {} /* terminator */
2120};
2121
f3302a59
MP		 2122static unsigned int ref9205_pin_configs[12] = {
2123 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2124 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2125 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2126};
2127
dfe495d0
TI		 2128/*
2129 STAC 9205 pin configs for
2130 102801F1
2131 102801F2
2132 102801FC
2133 102801FD
2134 10280204
2135 1028021F
3fa2ef74 2136 10280228 (Dell Vostro 1500)
95e70e87 2137 10280229 (Dell Vostro 1700)
dfe495d0
TI		 2138*/
2139static unsigned int dell_9205_m42_pin_configs[12] = {
2140 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2141 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2142 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2143};
2144
2145/*
2146 STAC 9205 pin configs for
2147 102801F9
2148 102801FA
2149 102801FE
2150 102801FF (Dell Precision M4300)
2151 10280206
2152 10280200
2153 10280201
2154*/
2155static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2156 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2157 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2158 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2159};
2160
dfe495d0 2161static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2162 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2163 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2164 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2165};
2166
f5fcc13c 2167static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2168 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2169 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2170 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2171 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2172 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2173};
2174
f5fcc13c 2175static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2176 [STAC_9205_AUTO] = "auto",
f5fcc13c 2177 [STAC_9205_REF] = "ref",
dfe495d0 2178 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2179 [STAC_9205_DELL_M43] = "dell-m43",
2180 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2181 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2182};
2183
2184static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2185 /* SigmaTel reference board */
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2187 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2189 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2190 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2191 "DFI LanParty", STAC_9205_REF),
d9a4268e 2192 /* Dell */
dfe495d0
TI		 2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2194 "unknown Dell", STAC_9205_DELL_M42),
2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2196 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2198 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2200 "Dell Precision", STAC_9205_DELL_M43),
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2202 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2204 "unknown Dell", STAC_9205_DELL_M42),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2206 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2208 "Dell Precision", STAC_9205_DELL_M43),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2210 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2212 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2214 "Dell Precision", STAC_9205_DELL_M43),
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2216 "Dell Precision", STAC_9205_DELL_M43),
2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2218 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2220 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2222 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2223 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2224 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2225 /* Gateway */
42b95f0c 2226 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2227 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2228 {} /* terminator */
2229};
2230
330ee995
TI		 2231static void stac92xx_set_config_regs(struct hda_codec *codec,
2232 unsigned int *pincfgs)
11b44bbd
RF		 2233{
2234 int i;
2235 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2236
330ee995
TI		 2237 if (!pincfgs)
2238 return;
11b44bbd 2239
87d48363 2240 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2241 if (spec->pin_nids[i] && pincfgs[i])
2242 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2243 pincfgs[i]);
af9f341a
TI		 2244}
2245
dabbed6f 2246/*
c7d4b2fa 2247 * Analog playback callbacks
dabbed6f 2248 */
c7d4b2fa
M		 2249static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2250 struct hda_codec *codec,
c8b6bf9b 2251 struct snd_pcm_substream *substream)
2f2f4251 2252{
dabbed6f 2253 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2254 if (spec->stream_delay)
2255 msleep(spec->stream_delay);
9a08160b
TI		 2256 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2257 hinfo);
2f2f4251
M		 2258}
2259
2f2f4251
M		 2260static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2261 struct hda_codec *codec,
2262 unsigned int stream_tag,
2263 unsigned int format,
c8b6bf9b 2264 struct snd_pcm_substream *substream)
2f2f4251
M		 2265{
2266 struct sigmatel_spec *spec = codec->spec;
403d1944 2267 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2268}
2269
2270static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2271 struct hda_codec *codec,
c8b6bf9b 2272 struct snd_pcm_substream *substream)
2f2f4251
M		 2273{
2274 struct sigmatel_spec *spec = codec->spec;
2275 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2276}
2277
dabbed6f
M		 2278/*
2279 * Digital playback callbacks
2280 */
2281static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2282 struct hda_codec *codec,
c8b6bf9b 2283 struct snd_pcm_substream *substream)
dabbed6f
M		 2284{
2285 struct sigmatel_spec *spec = codec->spec;
2286 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2287}
2288
2289static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2290 struct hda_codec *codec,
c8b6bf9b 2291 struct snd_pcm_substream *substream)
dabbed6f
M		 2292{
2293 struct sigmatel_spec *spec = codec->spec;
2294 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2295}
2296
6b97eb45
TI		 2297static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2298 struct hda_codec *codec,
2299 unsigned int stream_tag,
2300 unsigned int format,
2301 struct snd_pcm_substream *substream)
2302{
2303 struct sigmatel_spec *spec = codec->spec;
2304 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2305 stream_tag, format, substream);
2306}
2307
9411e21c
TI		 2308static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2309 struct hda_codec *codec,
2310 struct snd_pcm_substream *substream)
2311{
2312 struct sigmatel_spec *spec = codec->spec;
2313 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2314}
2315
dabbed6f 2316
2f2f4251
M		 2317/*
2318 * Analog capture callbacks
2319 */
2320static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2321 struct hda_codec *codec,
2322 unsigned int stream_tag,
2323 unsigned int format,
c8b6bf9b 2324 struct snd_pcm_substream *substream)
2f2f4251
M		 2325{
2326 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2327 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2328
8daaaa97
MR		 2329 if (spec->powerdown_adcs) {
2330 msleep(40);
8c2f767b 2331 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2332 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2333 }
2334 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2335 return 0;
2336}
2337
2338static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2339 struct hda_codec *codec,
c8b6bf9b 2340 struct snd_pcm_substream *substream)
2f2f4251
M		 2341{
2342 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2343 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2344
8daaaa97
MR		 2345 snd_hda_codec_cleanup_stream(codec, nid);
2346 if (spec->powerdown_adcs)
8c2f767b 2347 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2348 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2349 return 0;
2350}
2351
dabbed6f
M		 2352static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2353 .substreams = 1,
2354 .channels_min = 2,
2355 .channels_max = 2,
2356 /* NID is set in stac92xx_build_pcms */
2357 .ops = {
2358 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2359 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2360 .prepare = stac92xx_dig_playback_pcm_prepare,
2361 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2362 },
2363};
2364
2365static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2366 .substreams = 1,
2367 .channels_min = 2,
2368 .channels_max = 2,
2369 /* NID is set in stac92xx_build_pcms */
2370};
2371
2f2f4251
M		 2372static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2373 .substreams = 1,
2374 .channels_min = 2,
c7d4b2fa 2375 .channels_max = 8,
2f2f4251
M		 2376 .nid = 0x02, /* NID to query formats and rates */
2377 .ops = {
2378 .open = stac92xx_playback_pcm_open,
2379 .prepare = stac92xx_playback_pcm_prepare,
2380 .cleanup = stac92xx_playback_pcm_cleanup
2381 },
2382};
2383
3cc08dc6
MP		 2384static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2385 .substreams = 1,
2386 .channels_min = 2,
2387 .channels_max = 2,
2388 .nid = 0x06, /* NID to query formats and rates */
2389 .ops = {
2390 .open = stac92xx_playback_pcm_open,
2391 .prepare = stac92xx_playback_pcm_prepare,
2392 .cleanup = stac92xx_playback_pcm_cleanup
2393 },
2394};
2395
2f2f4251 2396static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2397 .channels_min = 2,
2398 .channels_max = 2,
9e05b7a3 2399 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2400 .ops = {
2401 .prepare = stac92xx_capture_pcm_prepare,
2402 .cleanup = stac92xx_capture_pcm_cleanup
2403 },
2404};
2405
2406static int stac92xx_build_pcms(struct hda_codec *codec)
2407{
2408 struct sigmatel_spec *spec = codec->spec;
2409 struct hda_pcm *info = spec->pcm_rec;
2410
2411 codec->num_pcms = 1;
2412 codec->pcm_info = info;
2413
c7d4b2fa 2414 info->name = "STAC92xx Analog";
2f2f4251 2415 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2416 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2417 spec->multiout.dac_nids[0];
2f2f4251 2418 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2419 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2420 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2421
2422 if (spec->alt_switch) {
2423 codec->num_pcms++;
2424 info++;
2425 info->name = "STAC92xx Analog Alt";
2426 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2427 }
2f2f4251 2428
dabbed6f
M		 2429 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2430 codec->num_pcms++;
2431 info++;
2432 info->name = "STAC92xx Digital";
0852d7a6 2433 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2434 if (spec->multiout.dig_out_nid) {
2435 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2436 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2437 }
2438 if (spec->dig_in_nid) {
2439 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2440 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2441 }
2442 }
2443
2f2f4251
M		 2444 return 0;
2445}
2446
7c922de7
NL		 2447static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2448 hda_nid_t nid)
c960a03b 2449{
1327a32b 2450 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2451 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2452 if (pincap & AC_PINCAP_VREF_100)
2453 return AC_PINCTL_VREF_100;
2454 if (pincap & AC_PINCAP_VREF_80)
2455 return AC_PINCTL_VREF_80;
2456 if (pincap & AC_PINCAP_VREF_50)
2457 return AC_PINCTL_VREF_50;
2458 if (pincap & AC_PINCAP_VREF_GRD)
2459 return AC_PINCTL_VREF_GRD;
2460 return 0;
2461}
2462
403d1944
MP		 2463static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2464
2465{
82beb8fd
TI		 2466 snd_hda_codec_write_cache(codec, nid, 0,
2467 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2468}
2469
7c2ba97b
MR		 2470#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2471
2472static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2473 struct snd_ctl_elem_value *ucontrol)
2474{
2475 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2476 struct sigmatel_spec *spec = codec->spec;
2477
d7a89436 2478 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2479 return 0;
2480}
2481
62558ce1 2482static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2483
7c2ba97b
MR		 2484static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2485 struct snd_ctl_elem_value *ucontrol)
2486{
2487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2488 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2489 int nid = kcontrol->private_value;
2490
2491 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2492
2493 /* check to be sure that the ports are upto date with
2494 * switch changes
2495 */
62558ce1 2496 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2497
2498 return 1;
2499}
2500
7c922de7
NL		 2501static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2502 struct snd_ctl_elem_info *uinfo)
2503{
2504 int i;
2505 static char *texts[] = {
2506 "Mic In", "Line In", "Line Out"
2507 };
2508
2509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2510 struct sigmatel_spec *spec = codec->spec;
2511 hda_nid_t nid = kcontrol->private_value;
2512
2513 if (nid == spec->mic_switch || nid == spec->line_switch)
2514 i = 3;
2515 else
2516 i = 2;
2517
2518 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2519 uinfo->value.enumerated.items = i;
2520 uinfo->count = 1;
2521 if (uinfo->value.enumerated.item >= i)
2522 uinfo->value.enumerated.item = i-1;
2523 strcpy(uinfo->value.enumerated.name,
2524 texts[uinfo->value.enumerated.item]);
2525
2526 return 0;
2527}
2528
2529static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2530 struct snd_ctl_elem_value *ucontrol)
2531{
2532 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2533 hda_nid_t nid = kcontrol->private_value;
2534 unsigned int vref = stac92xx_vref_get(codec, nid);
2535
2536 if (vref == stac92xx_get_default_vref(codec, nid))
2537 ucontrol->value.enumerated.item[0] = 0;
2538 else if (vref == AC_PINCTL_VREF_GRD)
2539 ucontrol->value.enumerated.item[0] = 1;
2540 else if (vref == AC_PINCTL_VREF_HIZ)
2541 ucontrol->value.enumerated.item[0] = 2;
2542
2543 return 0;
2544}
2545
2546static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2547 struct snd_ctl_elem_value *ucontrol)
2548{
2549 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2550 unsigned int new_vref = 0;
b8621516 2551 int error;
7c922de7
NL		 2552 hda_nid_t nid = kcontrol->private_value;
2553
2554 if (ucontrol->value.enumerated.item[0] == 0)
2555 new_vref = stac92xx_get_default_vref(codec, nid);
2556 else if (ucontrol->value.enumerated.item[0] == 1)
2557 new_vref = AC_PINCTL_VREF_GRD;
2558 else if (ucontrol->value.enumerated.item[0] == 2)
2559 new_vref = AC_PINCTL_VREF_HIZ;
2560 else
2561 return 0;
2562
2563 if (new_vref != stac92xx_vref_get(codec, nid)) {
2564 error = stac92xx_vref_set(codec, nid, new_vref);
2565 return error;
2566 }
2567
2568 return 0;
2569}
2570
2571static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2572 struct snd_ctl_elem_info *uinfo)
2573{
2574 static char *texts[2];
2575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2576 struct sigmatel_spec *spec = codec->spec;
2577
2578 if (kcontrol->private_value == spec->line_switch)
2579 texts[0] = "Line In";
2580 else
2581 texts[0] = "Mic In";
2582 texts[1] = "Line Out";
2583 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2584 uinfo->value.enumerated.items = 2;
2585 uinfo->count = 1;
2586
2587 if (uinfo->value.enumerated.item >= 2)
2588 uinfo->value.enumerated.item = 1;
2589 strcpy(uinfo->value.enumerated.name,
2590 texts[uinfo->value.enumerated.item]);
2591
2592 return 0;
2593}
403d1944
MP		 2594
2595static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2596{
2597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2598 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2599 hda_nid_t nid = kcontrol->private_value;
2600 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2601
7c922de7 2602 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2603 return 0;
2604}
2605
2606static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2607{
2608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2609 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2610 hda_nid_t nid = kcontrol->private_value;
2611 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2612 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2613
2614 spec->io_switch[io_idx] = val;
2615
2616 if (val)
2617 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2618 else {
2619 unsigned int pinctl = AC_PINCTL_IN_EN;
2620 if (io_idx) /* set VREF for mic */
7c922de7 2621 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2622 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2623 }
40c1d308
JZ		 2624
2625 /* check the auto-mute again: we need to mute/unmute the speaker
2626 * appropriately according to the pin direction
2627 */
2628 if (spec->hp_detect)
62558ce1 2629 stac_issue_unsol_event(codec, nid);
40c1d308 2630
403d1944
MP		 2631 return 1;
2632}
2633
0fb87bb4
ML		 2634#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2635
2636static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2640 struct sigmatel_spec *spec = codec->spec;
2641
2642 ucontrol->value.integer.value[0] = spec->clfe_swap;
2643 return 0;
2644}
2645
2646static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2647 struct snd_ctl_elem_value *ucontrol)
2648{
2649 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2650 struct sigmatel_spec *spec = codec->spec;
2651 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2652 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2653
68ea7b2f 2654 if (spec->clfe_swap == val)
0fb87bb4
ML		 2655 return 0;
2656
68ea7b2f 2657 spec->clfe_swap = val;
0fb87bb4
ML		 2658
2659 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2660 spec->clfe_swap ? 0x4 : 0x0);
2661
2662 return 1;
2663}
2664
7c2ba97b
MR		 2665#define STAC_CODEC_HP_SWITCH(xname) \
2666 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2667 .name = xname, \
2668 .index = 0, \
2669 .info = stac92xx_hp_switch_info, \
2670 .get = stac92xx_hp_switch_get, \
2671 .put = stac92xx_hp_switch_put, \
2672 }
2673
403d1944
MP		 2674#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2675 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2676 .name = xname, \
2677 .index = 0, \
2678 .info = stac92xx_io_switch_info, \
2679 .get = stac92xx_io_switch_get, \
2680 .put = stac92xx_io_switch_put, \
2681 .private_value = xpval, \
2682 }
2683
0fb87bb4
ML		 2684#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2685 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2686 .name = xname, \
2687 .index = 0, \
2688 .info = stac92xx_clfe_switch_info, \
2689 .get = stac92xx_clfe_switch_get, \
2690 .put = stac92xx_clfe_switch_put, \
2691 .private_value = xpval, \
2692 }
403d1944 2693
c7d4b2fa
M		 2694enum {
2695 STAC_CTL_WIDGET_VOL,
2696 STAC_CTL_WIDGET_MUTE,
123c07ae 2697 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2698 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2699 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2700 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2701 STAC_CTL_WIDGET_CLFE_SWITCH,
2702 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2703};
2704
c8b6bf9b 2705static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2706 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2707 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2708 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2709 STAC_MONO_MUX,
7c2ba97b 2710 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2711 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2712 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2713 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2714};
2715
2716/* add dynamic controls */
e3c75964
TI		 2717static struct snd_kcontrol_new *
2718stac_control_new(struct sigmatel_spec *spec,
2719 struct snd_kcontrol_new *ktemp,
4d02d1b6 2720 const char *name,
5e26dfd0 2721 unsigned int subdev)
c7d4b2fa 2722{
c8b6bf9b 2723 struct snd_kcontrol_new *knew;
c7d4b2fa 2724
603c4019
TI		 2725 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2726 knew = snd_array_new(&spec->kctls);
2727 if (!knew)
e3c75964 2728 return NULL;
4d4e9bb3 2729 *knew = *ktemp;
82fe0c58 2730 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2731 if (!knew->name) {
2732 /* roolback */
2733 memset(knew, 0, sizeof(*knew));
2734 spec->kctls.alloced--;
2735 return NULL;
2736 }
5e26dfd0 2737 knew->subdevice = subdev;
e3c75964
TI		 2738 return knew;
2739}
2740
2741static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2742 struct snd_kcontrol_new *ktemp,
2743 int idx, const char *name,
2744 unsigned long val)
2745{
4d02d1b6 2746 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2747 HDA_SUBDEV_AMP_FLAG);
e3c75964 2748 if (!knew)
c7d4b2fa 2749 return -ENOMEM;
e3c75964 2750 knew->index = idx;
c7d4b2fa 2751 knew->private_value = val;
c7d4b2fa
M		 2752 return 0;
2753}
2754
4d4e9bb3
TI		 2755static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2756 int type, int idx, const char *name,
2757 unsigned long val)
2758{
2759 return stac92xx_add_control_temp(spec,
2760 &stac92xx_control_templates[type],
2761 idx, name, val);
2762}
2763
4682eee0
MR		 2764
2765/* add dynamic controls */
4d4e9bb3
TI		 2766static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2767 const char *name, unsigned long val)
4682eee0
MR		 2768{
2769 return stac92xx_add_control_idx(spec, type, 0, name, val);
2770}
2771
e3c75964
TI		 2772static struct snd_kcontrol_new stac_input_src_temp = {
2773 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2774 .name = "Input Source",
2775 .info = stac92xx_mux_enum_info,
2776 .get = stac92xx_mux_enum_get,
2777 .put = stac92xx_mux_enum_put,
2778};
2779
7c922de7
NL		 2780static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2781 hda_nid_t nid, int idx)
2782{
2783 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2784 int control = 0;
2785 struct sigmatel_spec *spec = codec->spec;
2786 char name[22];
2787
2788 if (!((get_defcfg_connect(def_conf)) & AC_JACK_PORT_FIXED)) {
2789 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2790 && nid == spec->line_switch)
2791 control = STAC_CTL_WIDGET_IO_SWITCH;
2792 else if (snd_hda_query_pin_caps(codec, nid)
2793 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2794 control = STAC_CTL_WIDGET_DC_BIAS;
2795 else if (nid == spec->mic_switch)
2796 control = STAC_CTL_WIDGET_IO_SWITCH;
2797 }
2798
2799 if (control) {
2800 strcpy(name, auto_pin_cfg_labels[idx]);
2801 return stac92xx_add_control(codec->spec, control,
2802 strcat(name, " Jack Mode"), nid);
2803 }
2804
2805 return 0;
2806}
2807
e3c75964
TI		 2808static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2809{
2810 struct snd_kcontrol_new *knew;
2811 struct hda_input_mux *imux = &spec->private_imux;
2812
3d21d3f7
TI		 2813 if (spec->auto_mic)
2814 return 0; /* no need for input source */
e3c75964
TI		 2815 if (!spec->num_adcs || imux->num_items <= 1)
2816 return 0; /* no need for input source control */
2817 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2818 stac_input_src_temp.name, 0);
e3c75964
TI		 2819 if (!knew)
2820 return -ENOMEM;
2821 knew->count = spec->num_adcs;
2822 return 0;
2823}
2824
c21ca4a8
TI		 2825/* check whether the line-input can be used as line-out */
2826static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2827{
2828 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2829 struct auto_pin_cfg *cfg = &spec->autocfg;
2830 hda_nid_t nid;
2831 unsigned int pincap;
eea7dc93 2832 int i;
8e9068b1 2833
c21ca4a8
TI		 2834 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2835 return 0;
eea7dc93
TI		 2836 for (i = 0; i < cfg->num_inputs; i++) {
2837 if (cfg->inputs[i].type == AUTO_PIN_LINE) {
2838 nid = cfg->inputs[i].pin;
2839 pincap = snd_hda_query_pin_caps(codec, nid);
2840 if (pincap & AC_PINCAP_OUT)
2841 return nid;
2842 }
2843 }
c21ca4a8
TI		 2844 return 0;
2845}
403d1944 2846
eea7dc93
TI		 2847static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2848
c21ca4a8 2849/* check whether the mic-input can be used as line-out */
eea7dc93 2850static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2851{
2852 struct sigmatel_spec *spec = codec->spec;
2853 struct auto_pin_cfg *cfg = &spec->autocfg;
2854 unsigned int def_conf, pincap;
eea7dc93 2855 int i, mic_type;
c21ca4a8 2856
eea7dc93 2857 *dac = 0;
c21ca4a8
TI		 2858 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2859 return 0;
eea7dc93
TI		 2860 mic_type = AUTO_PIN_MIC;
2861 again:
2862 for (i = 0; i < cfg->num_inputs; i++) {
2863 hda_nid_t nid = cfg->inputs[i].pin;
2864 if (cfg->inputs[i].type != mic_type)
2865 continue;
330ee995 2866 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2867 /* some laptops have an internal analog microphone
2868 * which can't be used as a output */
2869 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
1327a32b 2870 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2871 if (pincap & AC_PINCAP_OUT) {
2872 *dac = get_unassigned_dac(codec, nid);
2873 if (*dac)
2874 return nid;
2875 }
403d1944 2876 }
eea7dc93
TI		 2877 }
2878 if (mic_type == AUTO_PIN_MIC) {
2879 mic_type = AUTO_PIN_FRONT_MIC;
2880 goto again;
403d1944 2881 }
403d1944
MP		 2882 return 0;
2883}
2884
7b043899
SL		 2885static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2886{
2887 int i;
2888
2889 for (i = 0; i < spec->multiout.num_dacs; i++) {
2890 if (spec->multiout.dac_nids[i] == nid)
2891 return 1;
2892 }
2893
2894 return 0;
2895}
2896
c21ca4a8
TI		 2897static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2898{
2899 int i;
2900 if (is_in_dac_nids(spec, nid))
2901 return 1;
2902 for (i = 0; i < spec->autocfg.hp_outs; i++)
2903 if (spec->hp_dacs[i] == nid)
2904 return 1;
2905 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2906 if (spec->speaker_dacs[i] == nid)
2907 return 1;
2908 return 0;
2909}
2910
2911static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2912{
2913 struct sigmatel_spec *spec = codec->spec;
2914 int j, conn_len;
2915 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2916 unsigned int wcaps, wtype;
2917
2918 conn_len = snd_hda_get_connections(codec, nid, conn,
2919 HDA_MAX_CONNECTIONS);
36706005
CC		 2920 /* 92HD88: trace back up the link of nids to find the DAC */
2921 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2922 != AC_WID_AUD_OUT)) {
2923 nid = conn[0];
2924 conn_len = snd_hda_get_connections(codec, nid, conn,
2925 HDA_MAX_CONNECTIONS);
2926 }
c21ca4a8 2927 for (j = 0; j < conn_len; j++) {
14bafe32 2928 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2929 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2930 /* we check only analog outputs */
2931 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2932 continue;
2933 /* if this route has a free DAC, assign it */
2934 if (!check_all_dac_nids(spec, conn[j])) {
2935 if (conn_len > 1) {
2936 /* select this DAC in the pin's input mux */
2937 snd_hda_codec_write_cache(codec, nid, 0,
2938 AC_VERB_SET_CONNECT_SEL, j);
2939 }
2940 return conn[j];
2941 }
2942 }
ee58a7ca
TI		 2943 /* if all DACs are already assigned, connect to the primary DAC */
2944 if (conn_len > 1) {
2945 for (j = 0; j < conn_len; j++) {
2946 if (conn[j] == spec->multiout.dac_nids[0]) {
2947 snd_hda_codec_write_cache(codec, nid, 0,
2948 AC_VERB_SET_CONNECT_SEL, j);
2949 break;
2950 }
2951 }
2952 }
c21ca4a8
TI		 2953 return 0;
2954}
2955
2956static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2957static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2958
3cc08dc6 2959/*
7b043899
SL		 2960 * Fill in the dac_nids table from the parsed pin configuration
2961 * This function only works when every pin in line_out_pins[]
2962 * contains atleast one DAC in its connection list. Some 92xx
2963 * codecs are not connected directly to a DAC, such as the 9200
2964 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2965 */
c21ca4a8 2966static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2967{
2968 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2969 struct auto_pin_cfg *cfg = &spec->autocfg;
2970 int i;
2971 hda_nid_t nid, dac;
7b043899 2972
c7d4b2fa
M		 2973 for (i = 0; i < cfg->line_outs; i++) {
2974 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2975 dac = get_unassigned_dac(codec, nid);
2976 if (!dac) {
df802952
TI		 2977 if (spec->multiout.num_dacs > 0) {
2978 /* we have already working output pins,
2979 * so let's drop the broken ones again
2980 */
2981 cfg->line_outs = spec->multiout.num_dacs;
2982 break;
2983 }
7b043899
SL		 2984 /* error out, no available DAC found */
2985 snd_printk(KERN_ERR
2986 "%s: No available DAC for pin 0x%x\n",
2987 __func__, nid);
2988 return -ENODEV;
2989 }
c21ca4a8
TI		 2990 add_spec_dacs(spec, dac);
2991 }
7b043899 2992
139e071b
TI		 2993 for (i = 0; i < cfg->hp_outs; i++) {
2994 nid = cfg->hp_pins[i];
2995 dac = get_unassigned_dac(codec, nid);
2996 if (dac) {
2997 if (!spec->multiout.hp_nid)
2998 spec->multiout.hp_nid = dac;
2999 else
3000 add_spec_extra_dacs(spec, dac);
3001 }
3002 spec->hp_dacs[i] = dac;
3003 }
3004
3005 for (i = 0; i < cfg->speaker_outs; i++) {
3006 nid = cfg->speaker_pins[i];
3007 dac = get_unassigned_dac(codec, nid);
3008 if (dac)
3009 add_spec_extra_dacs(spec, dac);
3010 spec->speaker_dacs[i] = dac;
3011 }
3012
c21ca4a8
TI		 3013 /* add line-in as output */
3014 nid = check_line_out_switch(codec);
3015 if (nid) {
3016 dac = get_unassigned_dac(codec, nid);
3017 if (dac) {
3018 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3019 nid, cfg->line_outs);
3020 cfg->line_out_pins[cfg->line_outs] = nid;
3021 cfg->line_outs++;
3022 spec->line_switch = nid;
3023 add_spec_dacs(spec, dac);
3024 }
3025 }
3026 /* add mic as output */
eea7dc93
TI		 3027 nid = check_mic_out_switch(codec, &dac);
3028 if (nid && dac) {
3029 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3030 nid, cfg->line_outs);
3031 cfg->line_out_pins[cfg->line_outs] = nid;
3032 cfg->line_outs++;
3033 spec->mic_switch = nid;
3034 add_spec_dacs(spec, dac);
c21ca4a8 3035 }
c7d4b2fa 3036
c21ca4a8 3037 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3038 spec->multiout.num_dacs,
3039 spec->multiout.dac_nids[0],
3040 spec->multiout.dac_nids[1],
3041 spec->multiout.dac_nids[2],
3042 spec->multiout.dac_nids[3],
3043 spec->multiout.dac_nids[4]);
c21ca4a8 3044
c7d4b2fa
M		 3045 return 0;
3046}
3047
eb06ed8f 3048/* create volume control/switch for the given prefx type */
668b9652
TI		 3049static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3050 int idx, hda_nid_t nid, int chs)
eb06ed8f 3051{
7c7767eb 3052 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3053 char name[32];
3054 int err;
3055
7c7767eb
TI		 3056 if (!spec->check_volume_offset) {
3057 unsigned int caps, step, nums, db_scale;
3058 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3059 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3060 AC_AMPCAP_STEP_SIZE_SHIFT;
3061 step = (step + 1) * 25; /* in .01dB unit */
3062 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3063 AC_AMPCAP_NUM_STEPS_SHIFT;
3064 db_scale = nums * step;
3065 /* if dB scale is over -64dB, and finer enough,
3066 * let's reduce it to half
3067 */
3068 if (db_scale > 6400 && nums >= 0x1f)
3069 spec->volume_offset = nums / 2;
3070 spec->check_volume_offset = 1;
3071 }
3072
eb06ed8f 3073 sprintf(name, "%s Playback Volume", pfx);
668b9652 3074 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3075 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3076 spec->volume_offset));
eb06ed8f
TI		 3077 if (err < 0)
3078 return err;
3079 sprintf(name, "%s Playback Switch", pfx);
668b9652 3080 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3081 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3082 if (err < 0)
3083 return err;
3084 return 0;
3085}
3086
668b9652
TI		 3087#define create_controls(codec, pfx, nid, chs) \
3088 create_controls_idx(codec, pfx, 0, nid, chs)
3089
ae0afd81
MR		 3090static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3091{
c21ca4a8 3092 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3093 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3094 return 1;
3095 } else {
3096 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3097 spec->multiout.num_dacs++;
3098 }
3099 return 0;
3100}
3101
c21ca4a8 3102static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3103{
c21ca4a8
TI		 3104 int i;
3105 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3106 if (!spec->multiout.extra_out_nid[i]) {
3107 spec->multiout.extra_out_nid[i] = nid;
3108 return 0;
3109 }
3110 }
3111 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3112 return 1;
ae0afd81
MR		 3113}
3114
dc04d1b4
TI		 3115/* Create output controls
3116 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3117 */
3118static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3119 const hda_nid_t *pins,
3120 const hda_nid_t *dac_nids,
3121 int type)
c7d4b2fa 3122{
76624534 3123 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3124 static const char *chname[4] = {
3125 "Front", "Surround", NULL /*CLFE*/, "Side"
3126 };
dc04d1b4 3127 hda_nid_t nid;
91589232
TI		 3128 int i, err;
3129 unsigned int wid_caps;
0fb87bb4 3130
dc04d1b4 3131 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI		 3132 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3133 wid_caps = get_wcaps(codec, pins[i]);
3134 if (wid_caps & AC_WCAP_UNSOL_CAP)
3135 spec->hp_detect = 1;
3136 }
dc04d1b4
TI		 3137 nid = dac_nids[i];
3138 if (!nid)
3139 continue;
3140 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3141 /* Center/LFE */
7c7767eb 3142 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3143 if (err < 0)
c7d4b2fa 3144 return err;
7c7767eb 3145 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3146 if (err < 0)
c7d4b2fa 3147 return err;
0fb87bb4
ML		 3148
3149 wid_caps = get_wcaps(codec, nid);
3150
3151 if (wid_caps & AC_WCAP_LR_SWAP) {
3152 err = stac92xx_add_control(spec,
3153 STAC_CTL_WIDGET_CLFE_SWITCH,
3154 "Swap Center/LFE Playback Switch", nid);
3155
3156 if (err < 0)
3157 return err;
3158 }
3159
c7d4b2fa 3160 } else {
dc04d1b4 3161 const char *name;
668b9652 3162 int idx;
dc04d1b4
TI		 3163 switch (type) {
3164 case AUTO_PIN_HP_OUT:
668b9652
TI		 3165 name = "Headphone";
3166 idx = i;
dc04d1b4
TI		 3167 break;
3168 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3169 name = "Speaker";
3170 idx = i;
dc04d1b4
TI		 3171 break;
3172 default:
3173 name = chname[i];
668b9652 3174 idx = 0;
dc04d1b4 3175 break;
76624534 3176 }
668b9652 3177 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3178 if (err < 0)
c7d4b2fa
M		 3179 return err;
3180 }
3181 }
dc04d1b4
TI		 3182 return 0;
3183}
3184
6479c631
TI		 3185static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3186 unsigned long sw, int idx)
3187{
3188 int err;
3189 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3190 "Capture Volume", vol);
6479c631
TI		 3191 if (err < 0)
3192 return err;
3193 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3194 "Capture Switch", sw);
6479c631
TI		 3195 if (err < 0)
3196 return err;
3197 return 0;
3198}
3199
dc04d1b4
TI		 3200/* add playback controls from the parsed DAC table */
3201static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3202 const struct auto_pin_cfg *cfg)
3203{
3204 struct sigmatel_spec *spec = codec->spec;
7c922de7 3205 hda_nid_t nid;
dc04d1b4 3206 int err;
7c922de7 3207 int idx;
dc04d1b4
TI		 3208
3209 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3210 spec->multiout.dac_nids,
3211 cfg->line_out_type);
3212 if (err < 0)
3213 return err;
c7d4b2fa 3214
a9cb5c90 3215 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3216 err = stac92xx_add_control(spec,
3217 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3218 "Headphone as Line Out Switch",
3219 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3220 if (err < 0)
3221 return err;
3222 }
3223
eea7dc93
TI		 3224 for (idx = 0; idx < cfg->num_inputs; idx++) {
3225 if (cfg->inputs[idx].type > AUTO_PIN_FRONT_LINE)
3226 break;
3227 nid = cfg->inputs[idx].pin;
3228 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3229 if (err < 0)
3230 return err;
b5895dc8 3231 }
403d1944 3232
c7d4b2fa
M		 3233 return 0;
3234}
3235
eb06ed8f
TI		 3236/* add playback controls for Speaker and HP outputs */
3237static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3238 struct auto_pin_cfg *cfg)
3239{
3240 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3241 int err;
3242
3243 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3244 spec->hp_dacs, AUTO_PIN_HP_OUT);
3245 if (err < 0)
3246 return err;
3247
3248 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3249 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3250 if (err < 0)
3251 return err;
eb06ed8f 3252
c7d4b2fa
M		 3253 return 0;
3254}
3255
b22b4821 3256/* labels for mono mux outputs */
d0513fc6
MR		 3257static const char *stac92xx_mono_labels[4] = {
3258 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3259};
3260
3261/* create mono mux for mono out on capable codecs */
3262static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3263{
3264 struct sigmatel_spec *spec = codec->spec;
3265 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3266 int i, num_cons;
3267 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3268
3269 num_cons = snd_hda_get_connections(codec,
3270 spec->mono_nid,
3271 con_lst,
3272 HDA_MAX_NUM_INPUTS);
16a433d8 3273 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3274 return -EINVAL;
3275
3276 for (i = 0; i < num_cons; i++) {
b5786e85
TI		 3277 strcpy(mono_mux->items[mono_mux->num_items].label,
3278 stac92xx_mono_labels[i]);
b22b4821
MR		 3279 mono_mux->items[mono_mux->num_items].index = i;
3280 mono_mux->num_items++;
3281 }
09a99959
MR		 3282
3283 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3284 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3285}
3286
1cd2224c
MR		 3287/* create PC beep volume controls */
3288static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3289 hda_nid_t nid)
3290{
3291 struct sigmatel_spec *spec = codec->spec;
3292 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3293 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3294
3295 if (spec->anabeep_nid == nid)
3296 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3297
3298 /* check for mute support for the the amp */
3299 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3300 err = stac92xx_add_control(spec, type,
d355c82a 3301 "Beep Playback Switch",
1cd2224c
MR		 3302 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3303 if (err < 0)
3304 return err;
3305 }
3306
3307 /* check to see if there is volume support for the amp */
3308 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3309 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3310 "Beep Playback Volume",
1cd2224c
MR		 3311 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3312 if (err < 0)
3313 return err;
3314 }
3315 return 0;
3316}
3317
4d4e9bb3
TI		 3318#ifdef CONFIG_SND_HDA_INPUT_BEEP
3319#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3320
3321static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3322 struct snd_ctl_elem_value *ucontrol)
3323{
3324 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3325 ucontrol->value.integer.value[0] = codec->beep->enabled;
3326 return 0;
3327}
3328
3329static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3330 struct snd_ctl_elem_value *ucontrol)
3331{
3332 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3333 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3334}
3335
3336static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3337 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3338 .info = stac92xx_dig_beep_switch_info,
3339 .get = stac92xx_dig_beep_switch_get,
3340 .put = stac92xx_dig_beep_switch_put,
3341};
3342
3343static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3344{
3345 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3346 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3347}
3348#endif
3349
4682eee0
MR		 3350static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3351{
3352 struct sigmatel_spec *spec = codec->spec;
667067d8 3353 int i, j, err = 0;
4682eee0
MR		 3354
3355 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3356 hda_nid_t nid;
3357 unsigned int wcaps;
3358 unsigned long val;
3359
4682eee0
MR		 3360 nid = spec->mux_nids[i];
3361 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3362 if (!(wcaps & AC_WCAP_OUT_AMP))
3363 continue;
4682eee0 3364
667067d8
TI		 3365 /* check whether already the same control was created as
3366 * normal Capture Volume.
3367 */
3368 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3369 for (j = 0; j < spec->num_caps; j++) {
3370 if (spec->capvols[j] == val)
3371 break;
4682eee0 3372 }
667067d8
TI		 3373 if (j < spec->num_caps)
3374 continue;
3375
3376 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3377 "Mux Capture Volume", val);
3378 if (err < 0)
3379 return err;
4682eee0
MR		 3380 }
3381 return 0;
3382};
3383
d9737751 3384static const char *stac92xx_spdif_labels[3] = {
65973632 3385 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3386};
3387
3388static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3389{
3390 struct sigmatel_spec *spec = codec->spec;
3391 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3392 const char **labels = spec->spdif_labels;
d9737751 3393 int i, num_cons;
65973632 3394 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3395
3396 num_cons = snd_hda_get_connections(codec,
3397 spec->smux_nids[0],
3398 con_lst,
3399 HDA_MAX_NUM_INPUTS);
16a433d8 3400 if (num_cons <= 0)
d9737751
MR		 3401 return -EINVAL;
3402
65973632
MR		 3403 if (!labels)
3404 labels = stac92xx_spdif_labels;
3405
d9737751 3406 for (i = 0; i < num_cons; i++) {
b5786e85 3407 strcpy(spdif_mux->items[spdif_mux->num_items].label, labels[i]);
d9737751
MR		 3408 spdif_mux->items[spdif_mux->num_items].index = i;
3409 spdif_mux->num_items++;
3410 }
3411
3412 return 0;
3413}
3414
8b65727b 3415/* labels for dmic mux inputs */
ddc2cec4 3416static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3417 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3418 "Digital Mic 3", "Digital Mic 4"
3419};
3420
3d21d3f7
TI		 3421static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3422 hda_nid_t nid)
3423{
3424 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3425 int i, nums;
3426
3427 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3428 for (i = 0; i < nums; i++)
3429 if (conn[i] == nid)
3430 return i;
3431 return -1;
3432}
3433
667067d8 3434/* create a volume assigned to the given pin (only if supported) */
96f845de 3435/* return 1 if the volume control is created */
667067d8 3436static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3437 const char *label, int idx, int direction)
667067d8
TI		 3438{
3439 unsigned int caps, nums;
3440 char name[32];
96f845de 3441 int err;
667067d8 3442
96f845de
TI		 3443 if (direction == HDA_OUTPUT)
3444 caps = AC_WCAP_OUT_AMP;
3445 else
3446 caps = AC_WCAP_IN_AMP;
3447 if (!(get_wcaps(codec, nid) & caps))
667067d8 3448 return 0;
96f845de 3449 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3450 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3451 if (!nums)
3452 return 0;
3453 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3454 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3455 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3456 if (err < 0)
3457 return err;
3458 return 1;
667067d8
TI		 3459}
3460
263d0328
VK		 3461static const char *get_input_src_label(struct hda_codec *codec, hda_nid_t nid)
3462{
3463 unsigned int def_conf;
3464
3465 def_conf = snd_hda_codec_get_pincfg(codec, nid);
3466
3467 switch (get_defcfg_device(def_conf)) {
3468 case AC_JACK_MIC_IN:
3469 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_FIXED ||
3470 ((get_defcfg_location(def_conf) & 0xf0)
3471 == AC_JACK_LOC_INTERNAL))
3472 return "Internal Mic";
3473 if ((get_defcfg_location(def_conf) & 0xf0)
3474 == AC_JACK_LOC_SEPARATE)
3475 return "Dock Mic";
3476 if (get_defcfg_location(def_conf) == AC_JACK_LOC_REAR)
3477 return "Rear Mic";
3478 return "Mic";
3479 case AC_JACK_LINE_IN:
3480 if ((get_defcfg_location(def_conf) & 0xf0)
3481 == AC_JACK_LOC_SEPARATE)
3482 return "Dock Line";
3483 return "Line";
3484 case AC_JACK_AUX:
3485 return "Aux";
3486 case AC_JACK_CD:
3487 return "CD";
3488 case AC_JACK_SPDIF_IN:
3489 return "SPDIF In";
3490 case AC_JACK_DIG_OTHER_IN:
3491 return "Digital In";
3492 }
3493
3494 snd_printd("invalid inp pin %02x device config %08x", nid, def_conf);
3495 return NULL;
3496}
3497
3498static const char *get_unique_inp_src_label(struct hda_codec *codec,
3499 hda_nid_t nid)
3500{
3501 int i, n;
3502 const char *label;
3503 struct sigmatel_spec *spec = codec->spec;
3504 struct hda_input_mux *imux = &spec->private_imux;
3505 struct hda_input_mux *dimux = &spec->private_dimux;
3506 struct unique_input_names *unames = &spec->private_u_inp_names;
3507
3508 label = get_input_src_label(codec, nid);
3509 n = 0;
3510
3511 for (i = 0; i < imux->num_items; i++) {
3512 if (!strncmp(label, imux->items[i].label, strlen(label)))
3513 n++;
3514 }
3515 if (snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
3516 for (i = 0; i < dimux->num_items; i++) {
3517 if (!strncmp(label, dimux->items[i].label,
3518 strlen(label)))
3519 n++;
3520 }
3521 }
3522 if (n > 0 && unames->num < HDA_MAX_NUM_INPUTS) {
3523 sprintf(&unames->uname[unames->num][0], "%.28s %d", label, n);
3524 label = &unames->uname[unames->num][0];
3525 unames->num++;
3526 }
3527
3528 return label;
3529}
3530
8b65727b
MP		 3531/* create playback/capture controls for input pins on dmic capable codecs */
3532static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3533 const struct auto_pin_cfg *cfg)
3534{
3535 struct sigmatel_spec *spec = codec->spec;
5207e10e 3536 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3537 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3538 int err, i;
5207e10e 3539 unsigned int def_conf;
8b65727b 3540
b5786e85 3541 strcpy(dimux->items[dimux->num_items].label, stac92xx_dmic_labels[0]);
8b65727b
MP		 3542 dimux->items[dimux->num_items].index = 0;
3543 dimux->num_items++;
3544
3545 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3546 hda_nid_t nid;
8b65727b 3547 int index;
5207e10e 3548 const char *label;
8b65727b 3549
667067d8
TI		 3550 nid = spec->dmic_nids[i];
3551 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3552 continue;
3553 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3554 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3555 continue;
3556
3d21d3f7
TI		 3557 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3558 if (index < 0)
3559 continue;
3560
263d0328
VK		 3561 label = get_unique_inp_src_label(codec, nid);
3562 if (label == NULL)
3563 return -EINVAL;
5207e10e 3564
eea7dc93 3565 err = create_elem_capture_vol(codec, nid, label, 0, HDA_INPUT);
667067d8
TI		 3566 if (err < 0)
3567 return err;
96f845de 3568 if (!err) {
eea7dc93 3569 err = create_elem_capture_vol(codec, nid, label, 0,
96f845de
TI		 3570 HDA_OUTPUT);
3571 if (err < 0)
3572 return err;
3573 }
0678accd 3574
b5786e85 3575 strcpy(dimux->items[dimux->num_items].label, label);
8b65727b
MP		 3576 dimux->items[dimux->num_items].index = index;
3577 dimux->num_items++;
5207e10e 3578 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1) {
b5786e85 3579 strcpy(imux->items[imux->num_items].label, label);
5207e10e
TI		 3580 imux->items[imux->num_items].index = index;
3581 imux->num_items++;
3582 }
8b65727b
MP		 3583 }
3584
3585 return 0;
3586}
3587
3d21d3f7
TI		 3588static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
3589 hda_nid_t *fixed, hda_nid_t *ext)
3590{
3591 unsigned int cfg;
3592
3593 if (!nid)
3594 return 0;
3595 cfg = snd_hda_codec_get_pincfg(codec, nid);
3596 switch (get_defcfg_connect(cfg)) {
3597 case AC_JACK_PORT_FIXED:
3598 if (*fixed)
3599 return 1; /* already occupied */
3600 *fixed = nid;
3601 break;
3602 case AC_JACK_PORT_COMPLEX:
3603 if (*ext)
3604 return 1; /* already occupied */
3605 *ext = nid;
3606 break;
3607 }
3608 return 0;
3609}
3610
3611static int set_mic_route(struct hda_codec *codec,
3612 struct sigmatel_mic_route *mic,
3613 hda_nid_t pin)
3614{
3615 struct sigmatel_spec *spec = codec->spec;
3616 struct auto_pin_cfg *cfg = &spec->autocfg;
3617 int i;
3618
3619 mic->pin = pin;
eea7dc93
TI		 3620 for (i = 0; i < cfg->num_inputs; i++) {
3621 if (pin == cfg->inputs[i].pin)
3d21d3f7 3622 break;
eea7dc93
TI		 3623 }
3624 if (i < cfg->num_inputs && cfg->inputs[i].type <= AUTO_PIN_FRONT_MIC) {
3d21d3f7 3625 /* analog pin */
3d21d3f7
TI		 3626 i = get_connection_index(codec, spec->mux_nids[0], pin);
3627 if (i < 0)
3628 return -1;
3629 mic->mux_idx = i;
02d33322
TI		 3630 mic->dmux_idx = -1;
3631 if (spec->dmux_nids)
3632 mic->dmux_idx = get_connection_index(codec,
3633 spec->dmux_nids[0],
3634 spec->mux_nids[0]);
da2a2aaa 3635 } else if (spec->dmux_nids) {
3d21d3f7 3636 /* digital pin */
3d21d3f7
TI		 3637 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3638 if (i < 0)
3639 return -1;
3640 mic->dmux_idx = i;
02d33322
TI		 3641 mic->mux_idx = -1;
3642 if (spec->mux_nids)
3643 mic->mux_idx = get_connection_index(codec,
3644 spec->mux_nids[0],
3645 spec->dmux_nids[0]);
3d21d3f7
TI		 3646 }
3647 return 0;
3648}
3649
3650/* return non-zero if the device is for automatic mic switch */
3651static int stac_check_auto_mic(struct hda_codec *codec)
3652{
3653 struct sigmatel_spec *spec = codec->spec;
3654 struct auto_pin_cfg *cfg = &spec->autocfg;
3655 hda_nid_t fixed, ext;
3656 int i;
3657
eea7dc93
TI		 3658 for (i = 0; i < cfg->num_inputs; i++) {
3659 if (cfg->inputs[i].type >= AUTO_PIN_LINE)
3d21d3f7
TI		 3660 return 0; /* must be exclusively mics */
3661 }
3662 fixed = ext = 0;
eea7dc93
TI		 3663 for (i = 0; i < cfg->num_inputs; i++)
3664 if (check_mic_pin(codec, cfg->inputs[i].pin, &fixed, &ext))
3d21d3f7
TI		 3665 return 0;
3666 for (i = 0; i < spec->num_dmics; i++)
3667 if (check_mic_pin(codec, spec->dmic_nids[i], &fixed, &ext))
3668 return 0;
3669 if (!fixed || !ext)
3670 return 0;
3671 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3672 return 0; /* no unsol support */
3673 if (set_mic_route(codec, &spec->ext_mic, ext) ||
3674 set_mic_route(codec, &spec->int_mic, fixed))
3675 return 0; /* something is wrong */
3676 return 1;
3677}
3678
c7d4b2fa
M		 3679/* create playback/capture controls for input pins */
3680static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3681{
3682 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3683 struct hda_input_mux *imux = &spec->private_imux;
eea7dc93 3684 int i, j, type_idx = 0;
263d0328 3685 const char *label;
c7d4b2fa 3686
eea7dc93
TI		 3687 for (i = 0; i < cfg->num_inputs; i++) {
3688 hda_nid_t nid = cfg->inputs[i].pin;
667067d8 3689 int index, err;
314634bc 3690
314634bc
TI		 3691 index = -1;
3692 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3693 index = get_connection_index(codec, spec->mux_nids[j],
3694 nid);
3695 if (index >= 0)
3696 break;
c7d4b2fa 3697 }
667067d8
TI		 3698 if (index < 0)
3699 continue;
3700
eea7dc93
TI		 3701 if (i > 0 && cfg->inputs[i].type == cfg->inputs[i - 1].type)
3702 type_idx++;
3703 else
3704 type_idx = 0;
263d0328
VK		 3705
3706 label = get_unique_inp_src_label(codec, nid);
3707 if (label == NULL)
3708 return -EINVAL;
3709
667067d8 3710 err = create_elem_capture_vol(codec, nid,
263d0328 3711 label, type_idx,
96f845de 3712 HDA_INPUT);
667067d8
TI		 3713 if (err < 0)
3714 return err;
3715
b5786e85 3716 strcpy(imux->items[imux->num_items].label, label);
314634bc
TI		 3717 imux->items[imux->num_items].index = index;
3718 imux->num_items++;
c7d4b2fa 3719 }
5207e10e 3720 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3721
7b043899 3722 if (imux->num_items) {
62fe78e9
SR		 3723 /*
3724 * Set the current input for the muxes.
3725 * The STAC9221 has two input muxes with identical source
3726 * NID lists. Hopefully this won't get confused.
3727 */
3728 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3729 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3730 AC_VERB_SET_CONNECT_SEL,
3731 imux->items[0].index);
62fe78e9
SR		 3732 }
3733 }
3734
c7d4b2fa
M		 3735 return 0;
3736}
3737
c7d4b2fa
M		 3738static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3739{
3740 struct sigmatel_spec *spec = codec->spec;
3741 int i;
3742
3743 for (i = 0; i < spec->autocfg.line_outs; i++) {
3744 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3745 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3746 }
3747}
3748
3749static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3750{
3751 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3752 int i;
c7d4b2fa 3753
eb06ed8f
TI		 3754 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3755 hda_nid_t pin;
3756 pin = spec->autocfg.hp_pins[i];
3757 if (pin) /* connect to front */
3758 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3759 }
3760 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3761 hda_nid_t pin;
3762 pin = spec->autocfg.speaker_pins[i];
3763 if (pin) /* connect to front */
3764 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3765 }
c7d4b2fa
M		 3766}
3767
8af3aeb4
TI		 3768static int is_dual_headphones(struct hda_codec *codec)
3769{
3770 struct sigmatel_spec *spec = codec->spec;
3771 int i, valid_hps;
3772
3773 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3774 spec->autocfg.hp_outs <= 1)
3775 return 0;
3776 valid_hps = 0;
3777 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3778 hda_nid_t nid = spec->autocfg.hp_pins[i];
3779 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3780 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3781 continue;
3782 valid_hps++;
3783 }
3784 return (valid_hps > 1);
3785}
3786
3787
3cc08dc6 3788static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3789{
3790 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3791 int hp_swap = 0;
6479c631 3792 int i, err;
c7d4b2fa 3793
8b65727b
MP		 3794 if ((err = snd_hda_parse_pin_def_config(codec,
3795 &spec->autocfg,
3796 spec->dmic_nids)) < 0)
c7d4b2fa 3797 return err;
82bc955f 3798 if (! spec->autocfg.line_outs)
869264c4 3799 return 0; /* can't find valid pin config */
19039bd0 3800
bcecd9bd
JZ		 3801 /* If we have no real line-out pin and multiple hp-outs, HPs should
3802 * be set up as multi-channel outputs.
3803 */
8af3aeb4 3804 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3805 /* Copy hp_outs to line_outs, backup line_outs in
3806 * speaker_outs so that the following routines can handle
3807 * HP pins as primary outputs.
3808 */
c21ca4a8 3809 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3810 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3811 sizeof(spec->autocfg.line_out_pins));
3812 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3813 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3814 sizeof(spec->autocfg.hp_pins));
3815 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3816 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3817 spec->autocfg.hp_outs = 0;
dc04d1b4 3818 hp_swap = 1;
bcecd9bd 3819 }
09a99959 3820 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3821 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3822 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3823 u32 caps = query_amp_caps(codec,
3824 spec->autocfg.mono_out_pin, dir);
3825 hda_nid_t conn_list[1];
3826
3827 /* get the mixer node and then the mono mux if it exists */
3828 if (snd_hda_get_connections(codec,
3829 spec->autocfg.mono_out_pin, conn_list, 1) &&
3830 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3831 conn_list, 1) > 0) {
09a99959
MR		 3832
3833 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3834 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3835 /* LR swap check, some stac925x have a mux that
3836 * changes the DACs output path instead of the
3837 * mono-mux path.
3838 */
3839 if (wid_type == AC_WID_AUD_SEL &&
3840 !(wcaps & AC_WCAP_LR_SWAP))
3841 spec->mono_nid = conn_list[0];
3842 }
d0513fc6
MR		 3843 if (dir) {
3844 hda_nid_t nid = spec->autocfg.mono_out_pin;
3845
3846 /* most mono outs have a least a mute/unmute switch */
3847 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3848 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3849 "Mono Playback Switch",
3850 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3851 if (err < 0)
3852 return err;
d0513fc6
MR		 3853 /* check for volume support for the amp */
3854 if ((caps & AC_AMPCAP_NUM_STEPS)
3855 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3856 err = stac92xx_add_control(spec,
3857 STAC_CTL_WIDGET_VOL,
3858 "Mono Playback Volume",
3859 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3860 if (err < 0)
3861 return err;
3862 }
09a99959
MR		 3863 }
3864
3865 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3866 AC_PINCTL_OUT_EN);
3867 }
bcecd9bd 3868
c21ca4a8
TI		 3869 if (!spec->multiout.num_dacs) {
3870 err = stac92xx_auto_fill_dac_nids(codec);
3871 if (err < 0)
19039bd0 3872 return err;
c9280d68
TI		 3873 err = stac92xx_auto_create_multi_out_ctls(codec,
3874 &spec->autocfg);
3875 if (err < 0)
3876 return err;
c21ca4a8 3877 }
c7d4b2fa 3878
1cd2224c
MR		 3879 /* setup analog beep controls */
3880 if (spec->anabeep_nid > 0) {
3881 err = stac92xx_auto_create_beep_ctls(codec,
3882 spec->anabeep_nid);
3883 if (err < 0)
3884 return err;
3885 }
3886
3887 /* setup digital beep controls and input device */
3888#ifdef CONFIG_SND_HDA_INPUT_BEEP
3889 if (spec->digbeep_nid > 0) {
3890 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3891 unsigned int caps;
1cd2224c
MR		 3892
3893 err = stac92xx_auto_create_beep_ctls(codec, nid);
3894 if (err < 0)
3895 return err;
3896 err = snd_hda_attach_beep_device(codec, nid);
3897 if (err < 0)
3898 return err;
d8d881dd
TI		 3899 if (codec->beep) {
3900 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3901 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3902 /* if no beep switch is available, make its own one */
3903 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3904 if (!(caps & AC_AMPCAP_MUTE)) {
3905 err = stac92xx_beep_switch_ctl(codec);
3906 if (err < 0)
3907 return err;
3908 }
4d4e9bb3 3909 }
1cd2224c
MR		 3910 }
3911#endif
3912
0fb87bb4 3913 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3914 if (err < 0)
3915 return err;
3916
dc04d1b4
TI		 3917 /* All output parsing done, now restore the swapped hp pins */
3918 if (hp_swap) {
3919 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3920 sizeof(spec->autocfg.hp_pins));
3921 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3922 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3923 spec->autocfg.line_outs = 0;
3924 }
0fb87bb4 3925
3d21d3f7
TI		 3926 if (stac_check_auto_mic(codec)) {
3927 spec->auto_mic = 1;
3928 /* only one capture for auto-mic */
3929 spec->num_adcs = 1;
3930 spec->num_caps = 1;
3931 spec->num_muxes = 1;
3932 }
3933
6479c631
TI		 3934 for (i = 0; i < spec->num_caps; i++) {
3935 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3936 spec->capsws[i], i);
3937 if (err < 0)
3938 return err;
3939 }
3940
dc04d1b4 3941 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3942 if (err < 0)
c7d4b2fa
M		 3943 return err;
3944
b22b4821
MR		 3945 if (spec->mono_nid > 0) {
3946 err = stac92xx_auto_create_mono_output_ctls(codec);
3947 if (err < 0)
3948 return err;
3949 }
2a9c7816 3950 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3951 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3952 &spec->autocfg)) < 0)
3953 return err;
4682eee0
MR		 3954 if (spec->num_muxes > 0) {
3955 err = stac92xx_auto_create_mux_input_ctls(codec);
3956 if (err < 0)
3957 return err;
3958 }
d9737751
MR		 3959 if (spec->num_smuxes > 0) {
3960 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3961 if (err < 0)
3962 return err;
3963 }
8b65727b 3964
e3c75964
TI		 3965 err = stac92xx_add_input_source(spec);
3966 if (err < 0)
3967 return err;
3968
c7d4b2fa 3969 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3970 if (spec->multiout.max_channels > 2)
c7d4b2fa 3971 spec->surr_switch = 1;
c7d4b2fa 3972
0852d7a6 3973 if (spec->autocfg.dig_outs)
3cc08dc6 3974 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3975 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3976 spec->dig_in_nid = dig_in;
c7d4b2fa 3977
603c4019
TI		 3978 if (spec->kctls.list)
3979 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3980
3981 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3982 if (!spec->dinput_mux)
3983 spec->dinput_mux = &spec->private_dimux;
d9737751 3984 spec->sinput_mux = &spec->private_smux;
b22b4821 3985 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3986 return 1;
3987}
3988
82bc955f
TI		 3989/* add playback controls for HP output */
3990static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3991 struct auto_pin_cfg *cfg)
3992{
3993 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3994 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3995 unsigned int wid_caps;
3996
3997 if (! pin)
3998 return 0;
3999
4000 wid_caps = get_wcaps(codec, pin);
505cb341 4001 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 4002 spec->hp_detect = 1;
82bc955f
TI		 4003
4004 return 0;
4005}
4006
160ea0dc
RF		 4007/* add playback controls for LFE output */
4008static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4009 struct auto_pin_cfg *cfg)
4010{
4011 struct sigmatel_spec *spec = codec->spec;
4012 int err;
4013 hda_nid_t lfe_pin = 0x0;
4014 int i;
4015
4016 /*
4017 * search speaker outs and line outs for a mono speaker pin
4018 * with an amp. If one is found, add LFE controls
4019 * for it.
4020 */
4021 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4022 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4023 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4024 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4025 if (wcaps == AC_WCAP_OUT_AMP)
4026 /* found a mono speaker with an amp, must be lfe */
4027 lfe_pin = pin;
4028 }
4029
4030 /* if speaker_outs is 0, then speakers may be in line_outs */
4031 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4032 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4033 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4034 unsigned int defcfg;
330ee995 4035 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4036 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4037 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4038 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4039 if (wcaps == AC_WCAP_OUT_AMP)
4040 /* found a mono speaker with an amp,
4041 must be lfe */
4042 lfe_pin = pin;
4043 }
4044 }
4045 }
4046
4047 if (lfe_pin) {
7c7767eb 4048 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4049 if (err < 0)
4050 return err;
4051 }
4052
4053 return 0;
4054}
4055
c7d4b2fa
M		 4056static int stac9200_parse_auto_config(struct hda_codec *codec)
4057{
4058 struct sigmatel_spec *spec = codec->spec;
4059 int err;
4060
df694daa 4061 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4062 return err;
4063
4064 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4065 return err;
4066
82bc955f
TI		 4067 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4068 return err;
4069
160ea0dc
RF		 4070 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4071 return err;
4072
355a0ec4
TI		 4073 if (spec->num_muxes > 0) {
4074 err = stac92xx_auto_create_mux_input_ctls(codec);
4075 if (err < 0)
4076 return err;
4077 }
4078
e3c75964
TI		 4079 err = stac92xx_add_input_source(spec);
4080 if (err < 0)
4081 return err;
4082
0852d7a6 4083 if (spec->autocfg.dig_outs)
c7d4b2fa 4084 spec->multiout.dig_out_nid = 0x05;
82bc955f 4085 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4086 spec->dig_in_nid = 0x04;
c7d4b2fa 4087
603c4019
TI		 4088 if (spec->kctls.list)
4089 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4090
4091 spec->input_mux = &spec->private_imux;
8b65727b 4092 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4093
4094 return 1;
4095}
4096
62fe78e9
SR		 4097/*
4098 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4099 * funky external mute control using GPIO pins.
4100 */
4101
76e1ddfb 4102static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4103 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4104{
4105 unsigned int gpiostate, gpiomask, gpiodir;
4106
4107 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4108 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4109 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4110
4111 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4112 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4113 gpiomask |= mask;
62fe78e9
SR		 4114
4115 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4116 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4117 gpiodir |= dir_mask;
62fe78e9 4118
76e1ddfb 4119 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4120 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4121
4122 snd_hda_codec_write(codec, codec->afg, 0,
4123 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4124 snd_hda_codec_read(codec, codec->afg, 0,
4125 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4126
4127 msleep(1);
4128
76e1ddfb
TI		 4129 snd_hda_codec_read(codec, codec->afg, 0,
4130 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4131}
4132
8c8145b8 4133#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI		 4134static void stac92xx_free_jack_priv(struct snd_jack *jack)
4135{
4136 struct sigmatel_jack *jacks = jack->private_data;
4137 jacks->nid = 0;
4138 jacks->jack = NULL;
4139}
4140#endif
4141
74aeaabc
MR		 4142static int stac92xx_add_jack(struct hda_codec *codec,
4143 hda_nid_t nid, int type)
4144{
8c8145b8 4145#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR		 4146 struct sigmatel_spec *spec = codec->spec;
4147 struct sigmatel_jack *jack;
330ee995 4148 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 4149 int connectivity = get_defcfg_connect(def_conf);
4150 char name[32];
95c09099 4151 int err;
74aeaabc
MR		 4152
4153 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4154 return 0;
4155
4156 snd_array_init(&spec->jacks, sizeof(*jack), 32);
4157 jack = snd_array_new(&spec->jacks);
4158 if (!jack)
4159 return -ENOMEM;
4160 jack->nid = nid;
4161 jack->type = type;
4162
86de7416 4163 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 4164 snd_hda_get_jack_type(def_conf),
4165 snd_hda_get_jack_connectivity(def_conf),
4166 snd_hda_get_jack_location(def_conf));
4167
95c09099
TI		 4168 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
4169 if (err < 0) {
4170 jack->nid = 0;
4171 return err;
4172 }
4173 jack->jack->private_data = jack;
4174 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 4175#endif
95c09099 4176 return 0;
74aeaabc
MR		 4177}
4178
c6e4c666
TI		 4179static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4180 unsigned char type, int data)
74aeaabc
MR		 4181{
4182 struct sigmatel_event *event;
4183
4184 snd_array_init(&spec->events, sizeof(*event), 32);
4185 event = snd_array_new(&spec->events);
4186 if (!event)
4187 return -ENOMEM;
4188 event->nid = nid;
c6e4c666
TI		 4189 event->type = type;
4190 event->tag = spec->events.used;
74aeaabc
MR		 4191 event->data = data;
4192
c6e4c666 4193 return event->tag;
74aeaabc
MR		 4194}
4195
c6e4c666 4196static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4197 hda_nid_t nid)
74aeaabc
MR		 4198{
4199 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4200 struct sigmatel_event *event = spec->events.list;
4201 int i;
4202
4203 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4204 if (event->nid == nid)
c6e4c666 4205 return event;
74aeaabc 4206 }
c6e4c666 4207 return NULL;
74aeaabc
MR		 4208}
4209
c6e4c666
TI		 4210static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4211 unsigned char tag)
314634bc 4212{
c6e4c666
TI		 4213 struct sigmatel_spec *spec = codec->spec;
4214 struct sigmatel_event *event = spec->events.list;
4215 int i;
4216
4217 for (i = 0; i < spec->events.used; i++, event++) {
4218 if (event->tag == tag)
4219 return event;
74aeaabc 4220 }
c6e4c666
TI		 4221 return NULL;
4222}
4223
62558ce1
TI		 4224/* check if given nid is a valid pin and no other events are assigned
4225 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4226 * Otherwise, returns zero.
4227 */
4228static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4229 unsigned int type)
c6e4c666
TI		 4230{
4231 struct sigmatel_event *event;
4232 int tag;
4233
4234 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI		 4235 return 0;
4236 event = stac_get_event(codec, nid);
4237 if (event) {
4238 if (event->type != type)
4239 return 0;
c6e4c666 4240 tag = event->tag;
62558ce1 4241 } else {
c6e4c666 4242 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4243 if (tag < 0)
4244 return 0;
4245 }
c6e4c666
TI		 4246 snd_hda_codec_write_cache(codec, nid, 0,
4247 AC_VERB_SET_UNSOLICITED_ENABLE,
4248 AC_USRSP_EN | tag);
62558ce1 4249 return 1;
314634bc
TI		 4250}
4251
a64135a2
MR		 4252static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4253{
4254 int i;
4255 for (i = 0; i < cfg->hp_outs; i++)
4256 if (cfg->hp_pins[i] == nid)
4257 return 1; /* nid is a HP-Out */
4258
4259 return 0; /* nid is not a HP-Out */
4260};
4261
b76c850f
MR		 4262static void stac92xx_power_down(struct hda_codec *codec)
4263{
4264 struct sigmatel_spec *spec = codec->spec;
4265
4266 /* power down inactive DACs */
4267 hda_nid_t *dac;
4268 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4269 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4270 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4271 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4272}
4273
f73d3585
TI		 4274static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4275 int enable);
4276
014c41fc
TI		 4277static inline int get_int_hint(struct hda_codec *codec, const char *key,
4278 int *valp)
4279{
4280 const char *p;
4281 p = snd_hda_get_hint(codec, key);
4282 if (p) {
4283 unsigned long val;
4284 if (!strict_strtoul(p, 0, &val)) {
4285 *valp = val;
4286 return 1;
4287 }
4288 }
4289 return 0;
4290}
4291
6565e4fa
TI		 4292/* override some hints from the hwdep entry */
4293static void stac_store_hints(struct hda_codec *codec)
4294{
4295 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4296 int val;
4297
4298 val = snd_hda_get_bool_hint(codec, "hp_detect");
4299 if (val >= 0)
4300 spec->hp_detect = val;
014c41fc 4301 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4302 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4303 spec->gpio_mask;
4304 }
014c41fc
TI		 4305 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4306 spec->gpio_mask &= spec->gpio_mask;
4307 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4308 spec->gpio_dir &= spec->gpio_mask;
4309 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4310 spec->eapd_mask &= spec->gpio_mask;
4311 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4312 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4313 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4314 if (val >= 0)
4315 spec->eapd_switch = val;
014c41fc
TI		 4316 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4317 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI		 4318 spec->gpio_mask |= spec->gpio_led;
4319 spec->gpio_dir |= spec->gpio_led;
4320 if (spec->gpio_led_polarity)
4321 spec->gpio_data |= spec->gpio_led;
4322 }
6565e4fa
TI		 4323}
4324
c7d4b2fa
M		 4325static int stac92xx_init(struct hda_codec *codec)
4326{
4327 struct sigmatel_spec *spec = codec->spec;
82bc955f 4328 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4329 unsigned int gpio;
e4973e1e 4330 int i;
c7d4b2fa 4331
c7d4b2fa
M		 4332 snd_hda_sequence_write(codec, spec->init);
4333
8daaaa97
MR		 4334 /* power down adcs initially */
4335 if (spec->powerdown_adcs)
4336 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4337 snd_hda_codec_write(codec,
8daaaa97
MR		 4338 spec->adc_nids[i], 0,
4339 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4340
6565e4fa
TI		 4341 /* override some hints */
4342 stac_store_hints(codec);
4343
f73d3585
TI		 4344 /* set up GPIO */
4345 gpio = spec->gpio_data;
4346 /* turn on EAPD statically when spec->eapd_switch isn't set.
4347 * otherwise, unsol event will turn it on/off dynamically
4348 */
4349 if (!spec->eapd_switch)
4350 gpio |= spec->eapd_mask;
4351 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4352
82bc955f
TI		 4353 /* set up pins */
4354 if (spec->hp_detect) {
505cb341 4355 /* Enable unsolicited responses on the HP widget */
74aeaabc 4356 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4357 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4358 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4359 }
1c4bdf9b
TI		 4360 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4361 cfg->speaker_outs > 0) {
fefd67f3 4362 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4363 for (i = 0; i < cfg->line_outs; i++) {
4364 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4365 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4366 }
4367 }
4368
0a07acaf
TI		 4369 /* force to enable the first line-out; the others are set up
4370 * in unsol_event
4371 */
4372 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4373 AC_PINCTL_OUT_EN);
82bc955f 4374 /* fake event to set up pins */
5f380eb1
TI		 4375 if (cfg->hp_pins[0])
4376 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4377 else if (cfg->line_out_pins[0])
4378 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4379 } else {
4380 stac92xx_auto_init_multi_out(codec);
4381 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4382 for (i = 0; i < cfg->hp_outs; i++)
4383 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4384 }
3d21d3f7 4385 if (spec->auto_mic) {
15b4f296 4386 /* initialize connection to analog input */
da2a2aaa
TI		 4387 if (spec->dmux_nids)
4388 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4389 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4390 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4391 stac_issue_unsol_event(codec, spec->ext_mic.pin);
4392 }
eea7dc93
TI		 4393 for (i = 0; i < cfg->num_inputs; i++) {
4394 hda_nid_t nid = cfg->inputs[i].pin;
4395 int type = cfg->inputs[i].type;
4396 unsigned int pinctl, conf;
4397 if (type == AUTO_PIN_MIC || type == AUTO_PIN_FRONT_MIC) {
4398 /* for mic pins, force to initialize */
4399 pinctl = stac92xx_get_default_vref(codec, nid);
4400 pinctl |= AC_PINCTL_IN_EN;
4401 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4402 } else {
4403 pinctl = snd_hda_codec_read(codec, nid, 0,
4404 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4405 /* if PINCTL already set then skip */
4406 /* Also, if both INPUT and OUTPUT are set,
4407 * it must be a BIOS bug; need to override, too
4408 */
4409 if (!(pinctl & AC_PINCTL_IN_EN) ||
4410 (pinctl & AC_PINCTL_OUT_EN)) {
4411 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4412 pinctl |= AC_PINCTL_IN_EN;
4413 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4414 }
c960a03b 4415 }
eea7dc93
TI		 4416 conf = snd_hda_codec_get_pincfg(codec, nid);
4417 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4418 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4419 stac_issue_unsol_event(codec, nid);
4420 }
82bc955f 4421 }
a64135a2
MR		 4422 for (i = 0; i < spec->num_dmics; i++)
4423 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4424 AC_PINCTL_IN_EN);
0852d7a6
TI		 4425 if (cfg->dig_out_pins[0])
4426 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4427 AC_PINCTL_OUT_EN);
4428 if (cfg->dig_in_pin)
4429 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4430 AC_PINCTL_IN_EN);
a64135a2 4431 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4432 hda_nid_t nid = spec->pwr_nids[i];
4433 int pinctl, def_conf;
f73d3585 4434
eb632128
TI		 4435 /* power on when no jack detection is available */
4436 if (!spec->hp_detect) {
4437 stac_toggle_power_map(codec, nid, 1);
4438 continue;
4439 }
4440
4441 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4442 continue; /* already has an unsol event */
4443
4444 pinctl = snd_hda_codec_read(codec, nid, 0,
4445 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4446 /* outputs are only ports capable of power management
4447 * any attempts on powering down a input port cause the
4448 * referenced VREF to act quirky.
4449 */
eb632128
TI		 4450 if (pinctl & AC_PINCTL_IN_EN) {
4451 stac_toggle_power_map(codec, nid, 1);
a64135a2 4452 continue;
eb632128 4453 }
330ee995 4454 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4455 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4456 /* skip any ports that don't have jacks since presence
4457 * detection is useless */
f73d3585
TI		 4458 if (def_conf != AC_JACK_PORT_COMPLEX) {
4459 if (def_conf != AC_JACK_PORT_NONE)
4460 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4461 continue;
f73d3585 4462 }
62558ce1
TI		 4463 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4464 stac_issue_unsol_event(codec, nid);
a64135a2 4465 }
c21bd025
TI		 4466
4467#ifdef CONFIG_SND_HDA_POWER_SAVE
4468 /* sync mute LED */
4469 if (spec->gpio_led && codec->patch_ops.check_power_status)
4470 codec->patch_ops.check_power_status(codec, 0x01);
4471#endif
b76c850f
MR		 4472 if (spec->dac_list)
4473 stac92xx_power_down(codec);
c7d4b2fa
M		 4474 return 0;
4475}
4476
74aeaabc
MR		 4477static void stac92xx_free_jacks(struct hda_codec *codec)
4478{
8c8145b8 4479#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4480 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4481 struct sigmatel_spec *spec = codec->spec;
b94d3539 4482 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4483 struct sigmatel_jack *jacks = spec->jacks.list;
4484 int i;
95c09099
TI		 4485 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4486 if (jacks->jack)
4487 snd_device_free(codec->bus->card, jacks->jack);
4488 }
74aeaabc
MR		 4489 }
4490 snd_array_free(&spec->jacks);
e4973e1e 4491#endif
74aeaabc
MR		 4492}
4493
603c4019
TI		 4494static void stac92xx_free_kctls(struct hda_codec *codec)
4495{
4496 struct sigmatel_spec *spec = codec->spec;
4497
4498 if (spec->kctls.list) {
4499 struct snd_kcontrol_new *kctl = spec->kctls.list;
4500 int i;
4501 for (i = 0; i < spec->kctls.used; i++)
4502 kfree(kctl[i].name);
4503 }
4504 snd_array_free(&spec->kctls);
4505}
4506
167eae5a
TI		 4507static void stac92xx_shutup(struct hda_codec *codec)
4508{
4509 struct sigmatel_spec *spec = codec->spec;
167eae5a 4510
92ee6162 4511 snd_hda_shutup_pins(codec);
167eae5a
TI		 4512
4513 if (spec->eapd_mask)
4514 stac_gpio_set(codec, spec->gpio_mask,
4515 spec->gpio_dir, spec->gpio_data &
4516 ~spec->eapd_mask);
4517}
4518
2f2f4251
M		 4519static void stac92xx_free(struct hda_codec *codec)
4520{
c7d4b2fa 4521 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4522
4523 if (! spec)
4524 return;
4525
167eae5a 4526 stac92xx_shutup(codec);
74aeaabc
MR		 4527 stac92xx_free_jacks(codec);
4528 snd_array_free(&spec->events);
11b44bbd 4529
c7d4b2fa 4530 kfree(spec);
1cd2224c 4531 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4532}
4533
4e55096e
M		 4534static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4535 unsigned int flag)
4536{
8ce84198
TI		 4537 unsigned int old_ctl, pin_ctl;
4538
4539 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4540 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4541
f9acba43
TI		 4542 if (pin_ctl & AC_PINCTL_IN_EN) {
4543 /*
4544 * we need to check the current set-up direction of
4545 * shared input pins since they can be switched via
4546 * "xxx as Output" mixer switch
4547 */
4548 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4549 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4550 return;
4551 }
4552
8ce84198 4553 old_ctl = pin_ctl;
7b043899
SL		 4554 /* if setting pin direction bits, clear the current
4555 direction bits first */
4556 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4557 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4558
8ce84198
TI		 4559 pin_ctl |= flag;
4560 if (old_ctl != pin_ctl)
4561 snd_hda_codec_write_cache(codec, nid, 0,
4562 AC_VERB_SET_PIN_WIDGET_CONTROL,
4563 pin_ctl);
4e55096e
M		 4564}
4565
4566static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4567 unsigned int flag)
4568{
4569 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4570 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4571 if (pin_ctl & flag)
4572 snd_hda_codec_write_cache(codec, nid, 0,
4573 AC_VERB_SET_PIN_WIDGET_CONTROL,
4574 pin_ctl & ~flag);
4e55096e
M		 4575}
4576
d56757ab 4577static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4578{
4579 if (!nid)
4580 return 0;
a252c81a 4581 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4582}
4583
fefd67f3
TI		 4584static void stac92xx_line_out_detect(struct hda_codec *codec,
4585 int presence)
4586{
4587 struct sigmatel_spec *spec = codec->spec;
4588 struct auto_pin_cfg *cfg = &spec->autocfg;
4589 int i;
4590
4591 for (i = 0; i < cfg->line_outs; i++) {
4592 if (presence)
4593 break;
4594 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4595 if (presence) {
4596 unsigned int pinctl;
4597 pinctl = snd_hda_codec_read(codec,
4598 cfg->line_out_pins[i], 0,
4599 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4600 if (pinctl & AC_PINCTL_IN_EN)
4601 presence = 0; /* mic- or line-input */
4602 }
4603 }
4604
4605 if (presence) {
4606 /* disable speakers */
4607 for (i = 0; i < cfg->speaker_outs; i++)
4608 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4609 AC_PINCTL_OUT_EN);
4610 if (spec->eapd_mask && spec->eapd_switch)
4611 stac_gpio_set(codec, spec->gpio_mask,
4612 spec->gpio_dir, spec->gpio_data &
4613 ~spec->eapd_mask);
4614 } else {
4615 /* enable speakers */
4616 for (i = 0; i < cfg->speaker_outs; i++)
4617 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4618 AC_PINCTL_OUT_EN);
4619 if (spec->eapd_mask && spec->eapd_switch)
4620 stac_gpio_set(codec, spec->gpio_mask,
4621 spec->gpio_dir, spec->gpio_data |
4622 spec->eapd_mask);
4623 }
4624}
4625
d7a89436
TI		 4626/* return non-zero if the hp-pin of the given array index isn't
4627 * a jack-detection target
4628 */
4629static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4630{
4631 struct auto_pin_cfg *cfg = &spec->autocfg;
4632
4633 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4634 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4635 return 1;
c21ca4a8 4636 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4637 return 1;
4638 /* ignore if the pin is set as line-out */
4639 if (cfg->hp_pins[i] == spec->hp_switch)
4640 return 1;
4641 return 0;
4642}
4643
c6e4c666 4644static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4645{
4646 struct sigmatel_spec *spec = codec->spec;
4647 struct auto_pin_cfg *cfg = &spec->autocfg;
4648 int i, presence;
4649
eb06ed8f 4650 presence = 0;
4fe5195c
MR		 4651 if (spec->gpio_mute)
4652 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4653 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4654
eb06ed8f 4655 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4656 if (presence)
4657 break;
d7a89436
TI		 4658 if (no_hp_sensing(spec, i))
4659 continue;
e6e3ea25
TI		 4660 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4661 if (presence) {
4662 unsigned int pinctl;
4663 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4664 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4665 if (pinctl & AC_PINCTL_IN_EN)
4666 presence = 0; /* mic- or line-input */
4667 }
eb06ed8f 4668 }
4e55096e
M		 4669
4670 if (presence) {
d7a89436 4671 /* disable lineouts */
7c2ba97b 4672 if (spec->hp_switch)
d7a89436
TI		 4673 stac92xx_reset_pinctl(codec, spec->hp_switch,
4674 AC_PINCTL_OUT_EN);
4e55096e
M		 4675 for (i = 0; i < cfg->line_outs; i++)
4676 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4677 AC_PINCTL_OUT_EN);
4e55096e 4678 } else {
d7a89436 4679 /* enable lineouts */
7c2ba97b 4680 if (spec->hp_switch)
d7a89436
TI		 4681 stac92xx_set_pinctl(codec, spec->hp_switch,
4682 AC_PINCTL_OUT_EN);
4e55096e
M		 4683 for (i = 0; i < cfg->line_outs; i++)
4684 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4685 AC_PINCTL_OUT_EN);
4e55096e 4686 }
fefd67f3 4687 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4688 /* toggle hp outs */
4689 for (i = 0; i < cfg->hp_outs; i++) {
4690 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4691 if (no_hp_sensing(spec, i))
4692 continue;
4693 if (presence)
4694 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4695#if 0 /* FIXME */
4696/* Resetting the pinctl like below may lead to (a sort of) regressions
4697 * on some devices since they use the HP pin actually for line/speaker
4698 * outs although the default pin config shows a different pin (that is
4699 * wrong and useless).
4700 *
4701 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4702 * But, disabling the code below just works around it, and I'm too tired of
4703 * bug reports with such devices...
4704 */
d7a89436
TI		 4705 else
4706 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4707#endif /* FIXME */
d7a89436 4708 }
4e55096e
M		 4709}
4710
f73d3585
TI		 4711static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4712 int enable)
a64135a2
MR		 4713{
4714 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4715 unsigned int idx, val;
4716
4717 for (idx = 0; idx < spec->num_pwrs; idx++) {
4718 if (spec->pwr_nids[idx] == nid)
4719 break;
4720 }
4721 if (idx >= spec->num_pwrs)
4722 return;
d0513fc6
MR		 4723
4724 /* several codecs have two power down bits */
4725 if (spec->pwr_mapping)
4726 idx = spec->pwr_mapping[idx];
4727 else
4728 idx = 1 << idx;
a64135a2 4729
f73d3585
TI		 4730 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4731 if (enable)
a64135a2
MR		 4732 val &= ~idx;
4733 else
4734 val |= idx;
4735
4736 /* power down unused output ports */
4737 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4738}
4739
f73d3585
TI		 4740static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4741{
e6e3ea25 4742 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4743}
a64135a2 4744
74aeaabc
MR		 4745static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4746{
4747 struct sigmatel_spec *spec = codec->spec;
4748 struct sigmatel_jack *jacks = spec->jacks.list;
4749
4750 if (jacks) {
4751 int i;
4752 for (i = 0; i < spec->jacks.used; i++) {
4753 if (jacks->nid == nid) {
4754 unsigned int pin_ctl =
4755 snd_hda_codec_read(codec, nid,
4756 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4757 0x00);
4758 int type = jacks->type;
4759 if (type == (SND_JACK_LINEOUT
4760 | SND_JACK_HEADPHONE))
4761 type = (pin_ctl & AC_PINCTL_HP_EN)
4762 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4763 snd_jack_report(jacks->jack,
e6e3ea25 4764 get_pin_presence(codec, nid)
74aeaabc
MR		 4765 ? type : 0);
4766 }
4767 jacks++;
4768 }
4769 }
4770}
a64135a2 4771
ab5a6ebe
VK		 4772/* get the pin connection (fixed, none, etc) */
4773static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4774{
4775 struct sigmatel_spec *spec = codec->spec;
4776 unsigned int cfg;
4777
4778 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4779 return get_defcfg_connect(cfg);
4780}
4781
4782static int stac92xx_connected_ports(struct hda_codec *codec,
4783 hda_nid_t *nids, int num_nids)
4784{
4785 struct sigmatel_spec *spec = codec->spec;
4786 int idx, num;
4787 unsigned int def_conf;
4788
4789 for (num = 0; num < num_nids; num++) {
4790 for (idx = 0; idx < spec->num_pins; idx++)
4791 if (spec->pin_nids[idx] == nids[num])
4792 break;
4793 if (idx >= spec->num_pins)
4794 break;
4795 def_conf = stac_get_defcfg_connect(codec, idx);
4796 if (def_conf == AC_JACK_PORT_NONE)
4797 break;
4798 }
4799 return num;
4800}
4801
3d21d3f7
TI		 4802static void stac92xx_mic_detect(struct hda_codec *codec)
4803{
4804 struct sigmatel_spec *spec = codec->spec;
4805 struct sigmatel_mic_route *mic;
4806
4807 if (get_pin_presence(codec, spec->ext_mic.pin))
4808 mic = &spec->ext_mic;
4809 else
4810 mic = &spec->int_mic;
02d33322 4811 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4812 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4813 AC_VERB_SET_CONNECT_SEL,
4814 mic->dmux_idx);
02d33322 4815 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4816 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4817 AC_VERB_SET_CONNECT_SEL,
4818 mic->mux_idx);
4819}
4820
62558ce1 4821static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4822{
62558ce1 4823 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4824 if (!event)
4825 return;
4826 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4827}
4828
314634bc
TI		 4829static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4830{
a64135a2 4831 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4832 struct sigmatel_event *event;
4833 int tag, data;
a64135a2 4834
c6e4c666
TI		 4835 tag = (res >> 26) & 0x7f;
4836 event = stac_get_event_from_tag(codec, tag);
4837 if (!event)
4838 return;
4839
4840 switch (event->type) {
314634bc 4841 case STAC_HP_EVENT:
fefd67f3 4842 case STAC_LO_EVENT:
16ffe32c 4843 stac92xx_hp_detect(codec);
fefd67f3 4844 break;
3d21d3f7
TI		 4845 case STAC_MIC_EVENT:
4846 stac92xx_mic_detect(codec);
4847 break;
4848 }
4849
4850 switch (event->type) {
4851 case STAC_HP_EVENT:
fefd67f3 4852 case STAC_LO_EVENT:
3d21d3f7 4853 case STAC_MIC_EVENT:
74aeaabc 4854 case STAC_INSERT_EVENT:
a64135a2 4855 case STAC_PWR_EVENT:
c6e4c666
TI		 4856 if (spec->num_pwrs > 0)
4857 stac92xx_pin_sense(codec, event->nid);
4858 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR		 4859
4860 switch (codec->subsystem_id) {
4861 case 0x103c308f:
4862 if (event->nid == 0xb) {
4863 int pin = AC_PINCTL_IN_EN;
4864
4865 if (get_pin_presence(codec, 0xa)
4866 && get_pin_presence(codec, 0xb))
4867 pin |= AC_PINCTL_VREF_80;
4868 if (!get_pin_presence(codec, 0xb))
4869 pin |= AC_PINCTL_VREF_80;
4870
4871 /* toggle VREF state based on mic + hp pin
4872 * status
4873 */
4874 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4875 }
4876 }
72474be6 4877 break;
c6e4c666
TI		 4878 case STAC_VREF_EVENT:
4879 data = snd_hda_codec_read(codec, codec->afg, 0,
4880 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4881 /* toggle VREF state based on GPIOx status */
4882 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4883 !!(data & (1 << event->data)));
72474be6 4884 break;
314634bc
TI		 4885 }
4886}
4887
d38cce70
KG		 4888static int hp_blike_system(u32 subsystem_id);
4889
4890static void set_hp_led_gpio(struct hda_codec *codec)
4891{
4892 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4893 unsigned int gpio;
4894
26ebe0a2
TI		 4895 if (spec->gpio_led)
4896 return;
4897
07f80449
TI		 4898 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4899 gpio &= AC_GPIO_IO_COUNT;
4900 if (gpio > 3)
4901 spec->gpio_led = 0x08; /* GPIO 3 */
4902 else
4903 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4904}
4905
c357aab0
VK		 4906/*
4907 * This method searches for the mute LED GPIO configuration
4908 * provided as OEM string in SMBIOS. The format of that string
4909 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4910 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4911 * that corresponds to the NOT muted state of the master volume
4912 * and G is the index of the GPIO to use as the mute LED control (0..9)
4913 * If _G portion is missing it is assigned based on the codec ID
4914 *
4915 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4916 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4917 *
4918 *
4919 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4920 * SMBIOS - at least the ones I have seen do not have them - which include
4921 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4922 * HP Pavilion dv9500t CTO.
4923 * Need more information on whether it is true across the entire series.
4924 * -- kunal
c357aab0 4925 */
dce17d4f 4926static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4927{
4928 struct sigmatel_spec *spec = codec->spec;
4929 const struct dmi_device *dev = NULL;
4930
4931 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4932 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4933 NULL, dev))) {
4934 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG		 4935 &spec->gpio_led_polarity,
4936 &spec->gpio_led) == 2) {
c357aab0
VK		 4937 spec->gpio_led = 1 << spec->gpio_led;
4938 return 1;
4939 }
4940 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4941 &spec->gpio_led_polarity) == 1) {
4942 set_hp_led_gpio(codec);
4943 return 1;
c357aab0
VK		 4944 }
4945 }
d38cce70
KG		 4946
4947 /*
4948 * Fallback case - if we don't find the DMI strings,
4949 * we statically set the GPIO - if not a B-series system.
4950 */
4951 if (!hp_blike_system(codec->subsystem_id)) {
4952 set_hp_led_gpio(codec);
dce17d4f 4953 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4954 return 1;
4955 }
c357aab0
VK		 4956 }
4957 return 0;
4958}
4959
4960static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4961{
4962 switch (subsystem_id) {
c357aab0
VK		 4963 case 0x103c1520:
4964 case 0x103c1521:
4965 case 0x103c1523:
4966 case 0x103c1524:
4967 case 0x103c1525:
78987bdc
RD		 4968 case 0x103c1722:
4969 case 0x103c1723:
4970 case 0x103c1724:
4971 case 0x103c1725:
4972 case 0x103c1726:
4973 case 0x103c1727:
4974 case 0x103c1728:
4975 case 0x103c1729:
c357aab0
VK		 4976 case 0x103c172a:
4977 case 0x103c172b:
4978 case 0x103c307e:
4979 case 0x103c307f:
4980 case 0x103c3080:
4981 case 0x103c3081:
4982 case 0x103c7007:
4983 case 0x103c7008:
78987bdc
RD		 4984 return 1;
4985 }
4986 return 0;
4987}
4988
2d34e1b3
TI		 4989#ifdef CONFIG_PROC_FS
4990static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4991 struct hda_codec *codec, hda_nid_t nid)
4992{
4993 if (nid == codec->afg)
4994 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4995 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4996}
4997
4998static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4999 struct hda_codec *codec,
5000 unsigned int verb)
5001{
5002 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
5003 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
5004}
5005
5006/* stac92hd71bxx, stac92hd73xx */
5007static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
5008 struct hda_codec *codec, hda_nid_t nid)
5009{
5010 stac92hd_proc_hook(buffer, codec, nid);
5011 if (nid == codec->afg)
5012 analog_loop_proc_hook(buffer, codec, 0xfa0);
5013}
5014
5015static void stac9205_proc_hook(struct snd_info_buffer *buffer,
5016 struct hda_codec *codec, hda_nid_t nid)
5017{
5018 if (nid == codec->afg)
5019 analog_loop_proc_hook(buffer, codec, 0xfe0);
5020}
5021
5022static void stac927x_proc_hook(struct snd_info_buffer *buffer,
5023 struct hda_codec *codec, hda_nid_t nid)
5024{
5025 if (nid == codec->afg)
5026 analog_loop_proc_hook(buffer, codec, 0xfeb);
5027}
5028#else
5029#define stac92hd_proc_hook NULL
5030#define stac92hd7x_proc_hook NULL
5031#define stac9205_proc_hook NULL
5032#define stac927x_proc_hook NULL
5033#endif
5034
cb53c626 5035#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 5036static int stac92xx_resume(struct hda_codec *codec)
5037{
dc81bed1
TI		 5038 struct sigmatel_spec *spec = codec->spec;
5039
2c885878 5040 stac92xx_init(codec);
82beb8fd
TI		 5041 snd_hda_codec_resume_amp(codec);
5042 snd_hda_codec_resume_cache(codec);
2c885878 5043 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 5044 if (spec->hp_detect) {
5045 if (spec->autocfg.hp_pins[0])
5046 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
5047 else if (spec->autocfg.line_out_pins[0])
5048 stac_issue_unsol_event(codec,
5049 spec->autocfg.line_out_pins[0]);
5050 }
c21bd025
TI		 5051#ifdef CONFIG_SND_HDA_POWER_SAVE
5052 /* sync mute LED */
5053 if (spec->gpio_led && codec->patch_ops.check_power_status)
5054 codec->patch_ops.check_power_status(codec, 0x01);
5055#endif
ff6fdc37
M		 5056 return 0;
5057}
c6798d2b 5058
ae6241fb 5059/*
514bf54c 5060 * using power check for controlling mute led of HP notebooks
ae6241fb
CP		 5061 * check for mute state only on Speakers (nid = 0x10)
5062 *
5063 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
5064 * the LED is NOT working properly !
514bf54c
JG		 5065 *
5066 * Changed name to reflect that it now works for any designated
5067 * model, not just HP HDX.
ae6241fb
CP		 5068 */
5069
5070#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 5071static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 5072 hda_nid_t nid)
ae6241fb
CP		 5073{
5074 struct sigmatel_spec *spec = codec->spec;
c21bd025 5075 int i, muted = 1;
6fce61ae 5076
c21bd025
TI		 5077 for (i = 0; i < spec->multiout.num_dacs; i++) {
5078 nid = spec->multiout.dac_nids[i];
5079 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5080 HDA_AMP_MUTE)) {
5081 muted = 0; /* something heard */
5082 break;
5bdaaada 5083 }
ae6241fb 5084 }
c21bd025
TI		 5085 if (muted)
5086 spec->gpio_data &= ~spec->gpio_led; /* orange */
5087 else
5088 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5089
c21bd025
TI		 5090 if (!spec->gpio_led_polarity) {
5091 /* LED state is inverted on these systems */
5092 spec->gpio_data ^= spec->gpio_led;
5093 }
b4e81876 5094
b4e81876 5095 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI		 5096 return 0;
5097}
ae6241fb
CP		 5098#endif
5099
c6798d2b
MR		 5100static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
5101{
167eae5a 5102 stac92xx_shutup(codec);
c6798d2b
MR		 5103 return 0;
5104}
ff6fdc37
M		 5105#endif
5106
2f2f4251
M		 5107static struct hda_codec_ops stac92xx_patch_ops = {
5108 .build_controls = stac92xx_build_controls,
5109 .build_pcms = stac92xx_build_pcms,
5110 .init = stac92xx_init,
5111 .free = stac92xx_free,
4e55096e 5112 .unsol_event = stac92xx_unsol_event,
cb53c626 5113#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 5114 .suspend = stac92xx_suspend,
ff6fdc37
M		 5115 .resume = stac92xx_resume,
5116#endif
fb8d1a34 5117 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5118};
5119
5120static int patch_stac9200(struct hda_codec *codec)
5121{
5122 struct sigmatel_spec *spec;
c7d4b2fa 5123 int err;
2f2f4251 5124
e560d8d8 5125 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5126 if (spec == NULL)
5127 return -ENOMEM;
5128
a252c81a 5129 codec->no_trigger_sense = 1;
2f2f4251 5130 codec->spec = spec;
1b0e372d 5131 spec->linear_tone_beep = 1;
a4eed138 5132 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5133 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5134 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5135 stac9200_models,
5136 stac9200_cfg_tbl);
330ee995 5137 if (spec->board_config < 0)
9a11f1aa
TI		 5138 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5139 codec->chip_name);
330ee995
TI		 5140 else
5141 stac92xx_set_config_regs(codec,
af9f341a 5142 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5143
5144 spec->multiout.max_channels = 2;
5145 spec->multiout.num_dacs = 1;
5146 spec->multiout.dac_nids = stac9200_dac_nids;
5147 spec->adc_nids = stac9200_adc_nids;
5148 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5149 spec->num_muxes = 1;
8b65727b 5150 spec->num_dmics = 0;
9e05b7a3 5151 spec->num_adcs = 1;
a64135a2 5152 spec->num_pwrs = 0;
c7d4b2fa 5153
58eec423
MCC		 5154 if (spec->board_config == STAC_9200_M4 ||
5155 spec->board_config == STAC_9200_M4_2 ||
bf277785 5156 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5157 spec->init = stac9200_eapd_init;
5158 else
5159 spec->init = stac9200_core_init;
2f2f4251 5160 spec->mixer = stac9200_mixer;
c7d4b2fa 5161
117f257d
TI		 5162 if (spec->board_config == STAC_9200_PANASONIC) {
5163 spec->gpio_mask = spec->gpio_dir = 0x09;
5164 spec->gpio_data = 0x00;
5165 }
5166
c7d4b2fa
M		 5167 err = stac9200_parse_auto_config(codec);
5168 if (err < 0) {
5169 stac92xx_free(codec);
5170 return err;
5171 }
2f2f4251 5172
2acc9dcb
TI		 5173 /* CF-74 has no headphone detection, and the driver should *NOT*
5174 * do detection and HP/speaker toggle because the hardware does it.
5175 */
5176 if (spec->board_config == STAC_9200_PANASONIC)
5177 spec->hp_detect = 0;
5178
2f2f4251
M		 5179 codec->patch_ops = stac92xx_patch_ops;
5180
5181 return 0;
5182}
5183
8e21c34c
TD		 5184static int patch_stac925x(struct hda_codec *codec)
5185{
5186 struct sigmatel_spec *spec;
5187 int err;
5188
5189 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5190 if (spec == NULL)
5191 return -ENOMEM;
5192
a252c81a 5193 codec->no_trigger_sense = 1;
8e21c34c 5194 codec->spec = spec;
1b0e372d 5195 spec->linear_tone_beep = 1;
a4eed138 5196 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5197 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5198
5199 /* Check first for codec ID */
5200 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5201 STAC_925x_MODELS,
5202 stac925x_models,
5203 stac925x_codec_id_cfg_tbl);
5204
5205 /* Now checks for PCI ID, if codec ID is not found */
5206 if (spec->board_config < 0)
5207 spec->board_config = snd_hda_check_board_config(codec,
5208 STAC_925x_MODELS,
8e21c34c
TD		 5209 stac925x_models,
5210 stac925x_cfg_tbl);
9e507abd 5211 again:
330ee995 5212 if (spec->board_config < 0)
9a11f1aa
TI		 5213 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5214 codec->chip_name);
330ee995
TI		 5215 else
5216 stac92xx_set_config_regs(codec,
af9f341a 5217 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5218
5219 spec->multiout.max_channels = 2;
5220 spec->multiout.num_dacs = 1;
5221 spec->multiout.dac_nids = stac925x_dac_nids;
5222 spec->adc_nids = stac925x_adc_nids;
5223 spec->mux_nids = stac925x_mux_nids;
5224 spec->num_muxes = 1;
9e05b7a3 5225 spec->num_adcs = 1;
a64135a2 5226 spec->num_pwrs = 0;
2c11f955
TD		 5227 switch (codec->vendor_id) {
5228 case 0x83847632: /* STAC9202 */
5229 case 0x83847633: /* STAC9202D */
5230 case 0x83847636: /* STAC9251 */
5231 case 0x83847637: /* STAC9251D */
f6e9852a 5232 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5233 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5234 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5235 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5236 break;
5237 default:
5238 spec->num_dmics = 0;
5239 break;
5240 }
8e21c34c
TD		 5241
5242 spec->init = stac925x_core_init;
5243 spec->mixer = stac925x_mixer;
6479c631
TI		 5244 spec->num_caps = 1;
5245 spec->capvols = stac925x_capvols;
5246 spec->capsws = stac925x_capsws;
8e21c34c
TD		 5247
5248 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 5249 if (!err) {
5250 if (spec->board_config < 0) {
5251 printk(KERN_WARNING "hda_codec: No auto-config is "
5252 "available, default to model=ref\n");
5253 spec->board_config = STAC_925x_REF;
5254 goto again;
5255 }
5256 err = -EINVAL;
5257 }
8e21c34c
TD		 5258 if (err < 0) {
5259 stac92xx_free(codec);
5260 return err;
5261 }
5262
5263 codec->patch_ops = stac92xx_patch_ops;
5264
5265 return 0;
5266}
5267
e1f0d669
MR		 5268static int patch_stac92hd73xx(struct hda_codec *codec)
5269{
5270 struct sigmatel_spec *spec;
5271 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5272 int err = 0;
c21ca4a8 5273 int num_dacs;
e1f0d669
MR		 5274
5275 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5276 if (spec == NULL)
5277 return -ENOMEM;
5278
a252c81a 5279 codec->no_trigger_sense = 1;
e1f0d669 5280 codec->spec = spec;
1b0e372d 5281 spec->linear_tone_beep = 0;
e99d32b3 5282 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5283 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5284 spec->pin_nids = stac92hd73xx_pin_nids;
5285 spec->board_config = snd_hda_check_board_config(codec,
5286 STAC_92HD73XX_MODELS,
5287 stac92hd73xx_models,
5288 stac92hd73xx_cfg_tbl);
842ae638
TI		 5289 /* check codec subsystem id if not found */
5290 if (spec->board_config < 0)
5291 spec->board_config =
5292 snd_hda_check_board_codec_sid_config(codec,
5293 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5294 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5295again:
330ee995 5296 if (spec->board_config < 0)
9a11f1aa
TI		 5297 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5298 codec->chip_name);
330ee995
TI		 5299 else
5300 stac92xx_set_config_regs(codec,
af9f341a 5301 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5302
c21ca4a8 5303 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5304 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5305
c21ca4a8 5306 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5307 printk(KERN_WARNING "hda_codec: Could not determine "
5308 "number of channels defaulting to DAC count\n");
c21ca4a8 5309 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5310 }
e2aec171 5311 spec->init = stac92hd73xx_core_init;
c21ca4a8 5312 switch (num_dacs) {
e1f0d669 5313 case 0x3: /* 6 Channel */
d78d7a90 5314 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5315 break;
5316 case 0x4: /* 8 Channel */
d78d7a90 5317 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5318 break;
5319 case 0x5: /* 10 Channel */
d78d7a90
TI		 5320 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5321 break;
c21ca4a8
TI		 5322 }
5323 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5324
e1f0d669
MR		 5325 spec->aloopback_mask = 0x01;
5326 spec->aloopback_shift = 8;
5327
1cd2224c 5328 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5329 spec->mux_nids = stac92hd73xx_mux_nids;
5330 spec->adc_nids = stac92hd73xx_adc_nids;
5331 spec->dmic_nids = stac92hd73xx_dmic_nids;
5332 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5333 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5334
5335 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5336 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5337 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5338
6479c631
TI		 5339 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5340 spec->capvols = stac92hd73xx_capvols;
5341 spec->capsws = stac92hd73xx_capsws;
5342
a7662640 5343 switch (spec->board_config) {
6b3ab21e 5344 case STAC_DELL_EQ:
d654a660 5345 spec->init = dell_eq_core_init;
6b3ab21e 5346 /* fallthru */
661cd8fb
TI		 5347 case STAC_DELL_M6_AMIC:
5348 case STAC_DELL_M6_DMIC:
5349 case STAC_DELL_M6_BOTH:
2a9c7816 5350 spec->num_smuxes = 0;
c0cea0d0 5351 spec->eapd_switch = 0;
6b3ab21e 5352
661cd8fb
TI		 5353 switch (spec->board_config) {
5354 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5355 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5356 spec->num_dmics = 0;
5357 break;
661cd8fb 5358 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5359 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5360 spec->num_dmics = 1;
5361 break;
661cd8fb 5362 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5363 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5364 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5365 spec->num_dmics = 1;
5366 break;
5367 }
5368 break;
842ae638
TI		 5369 case STAC_ALIENWARE_M17X:
5370 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5371 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5372 spec->eapd_switch = 0;
5373 break;
a7662640
MR		 5374 default:
5375 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5376 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5377 spec->eapd_switch = 1;
5207e10e 5378 break;
a7662640 5379 }
af6ee302 5380 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5381 /* GPIO0 High = Enable EAPD */
5382 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5383 spec->gpio_data = 0x01;
5384 }
a7662640 5385
a64135a2
MR		 5386 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5387 spec->pwr_nids = stac92hd73xx_pwr_nids;
5388
d9737751 5389 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5390
5391 if (!err) {
5392 if (spec->board_config < 0) {
5393 printk(KERN_WARNING "hda_codec: No auto-config is "
5394 "available, default to model=ref\n");
5395 spec->board_config = STAC_92HD73XX_REF;
5396 goto again;
5397 }
5398 err = -EINVAL;
5399 }
5400
5401 if (err < 0) {
5402 stac92xx_free(codec);
5403 return err;
5404 }
5405
9e43f0de
TI		 5406 if (spec->board_config == STAC_92HD73XX_NO_JD)
5407 spec->hp_detect = 0;
5408
e1f0d669
MR		 5409 codec->patch_ops = stac92xx_patch_ops;
5410
2d34e1b3
TI		 5411 codec->proc_widget_hook = stac92hd7x_proc_hook;
5412
e1f0d669
MR		 5413 return 0;
5414}
5415
d0513fc6
MR		 5416static int patch_stac92hd83xxx(struct hda_codec *codec)
5417{
5418 struct sigmatel_spec *spec;
65557f35 5419 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5420 int err;
65557f35 5421 int num_dacs;
d0513fc6
MR		 5422
5423 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5424 if (spec == NULL)
5425 return -ENOMEM;
5426
a252c81a 5427 codec->no_trigger_sense = 1;
d0513fc6 5428 codec->spec = spec;
1b0e372d 5429 spec->linear_tone_beep = 1;
0ffa9807 5430 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5431 spec->digbeep_nid = 0x21;
ab5a6ebe
VK		 5432 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5433 spec->dmux_nids = stac92hd83xxx_mux_nids;
667067d8
TI		 5434 spec->mux_nids = stac92hd83xxx_mux_nids;
5435 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5436 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5437 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR		 5438 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5439 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5440 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5441 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 5442
5443 spec->init = stac92hd83xxx_core_init;
d0513fc6 5444 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5445 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI		 5446 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5447 spec->capvols = stac92hd83xxx_capvols;
5448 spec->capsws = stac92hd83xxx_capsws;
5449
d0513fc6
MR		 5450 spec->board_config = snd_hda_check_board_config(codec,
5451 STAC_92HD83XXX_MODELS,
5452 stac92hd83xxx_models,
5453 stac92hd83xxx_cfg_tbl);
5454again:
330ee995 5455 if (spec->board_config < 0)
9a11f1aa
TI		 5456 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5457 codec->chip_name);
330ee995
TI		 5458 else
5459 stac92xx_set_config_regs(codec,
af9f341a 5460 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5461
32ed3f46 5462 switch (codec->vendor_id) {
36706005
CC		 5463 case 0x111d7666:
5464 case 0x111d7667:
5465 case 0x111d7668:
5466 case 0x111d7669:
8a345a04
CC		 5467 case 0x111d76d1:
5468 case 0x111d76d9:
36706005
CC		 5469 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5470 spec->pin_nids = stac92hd88xxx_pin_nids;
5471 spec->mono_nid = 0;
5472 spec->digbeep_nid = 0;
5473 spec->num_pwrs = 0;
5474 break;
32ed3f46 5475 case 0x111d7604:
a9694faa 5476 case 0x111d76d4:
32ed3f46 5477 case 0x111d7605:
ff2e7337 5478 case 0x111d76d5:
ab5a6ebe 5479 case 0x111d76e7:
32ed3f46
MR		 5480 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5481 break;
5482 spec->num_pwrs = 0;
ab5a6ebe
VK		 5483 spec->num_dmics = stac92xx_connected_ports(codec,
5484 stac92hd83xxx_dmic_nids,
5485 STAC92HD83XXX_NUM_DMICS);
32ed3f46
MR		 5486 break;
5487 }
5488
b4e81876
TI		 5489 codec->patch_ops = stac92xx_patch_ops;
5490
dce17d4f 5491 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5492 snd_printd("mute LED gpio %d polarity %d\n",
5493 spec->gpio_led,
5494 spec->gpio_led_polarity);
5495
b4e81876
TI		 5496#ifdef CONFIG_SND_HDA_POWER_SAVE
5497 if (spec->gpio_led) {
5498 spec->gpio_mask |= spec->gpio_led;
5499 spec->gpio_dir |= spec->gpio_led;
5500 spec->gpio_data |= spec->gpio_led;
5501 /* register check_power_status callback. */
5502 codec->patch_ops.check_power_status =
c21bd025 5503 stac92xx_hp_check_power_status;
b4e81876
TI		 5504 }
5505#endif
5506
d0513fc6
MR		 5507 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5508 if (!err) {
5509 if (spec->board_config < 0) {
5510 printk(KERN_WARNING "hda_codec: No auto-config is "
5511 "available, default to model=ref\n");
5512 spec->board_config = STAC_92HD83XXX_REF;
5513 goto again;
5514 }
5515 err = -EINVAL;
5516 }
5517
5518 if (err < 0) {
5519 stac92xx_free(codec);
5520 return err;
5521 }
5522
04b5efe5
CC		 5523 /* docking output support */
5524 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5525 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC		 5526 /* skip non-DAC connections */
5527 while (num_dacs >= 0 &&
5528 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5529 != AC_WID_AUD_OUT))
5530 num_dacs--;
5531 /* set port E and F to select the last DAC */
5532 if (num_dacs >= 0) {
5533 snd_hda_codec_write_cache(codec, 0xE, 0,
5534 AC_VERB_SET_CONNECT_SEL, num_dacs);
5535 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5536 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5537 }
8bb0ac55 5538
2d34e1b3
TI		 5539 codec->proc_widget_hook = stac92hd_proc_hook;
5540
d0513fc6
MR		 5541 return 0;
5542}
5543
6df703ae
HRK		 5544static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5545 hda_nid_t dig0pin)
5546{
5547 struct sigmatel_spec *spec = codec->spec;
5548 int idx;
5549
5550 for (idx = 0; idx < spec->num_pins; idx++)
5551 if (spec->pin_nids[idx] == dig0pin)
5552 break;
5553 if ((idx + 2) >= spec->num_pins)
5554 return 0;
5555
5556 /* dig1pin case */
330ee995 5557 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5558 return 2;
5559
5560 /* dig0pin + dig2pin case */
330ee995 5561 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5562 return 2;
330ee995 5563 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5564 return 1;
5565 else
5566 return 0;
5567}
5568
75d1aeb9
TI		 5569/* HP dv7 bass switch - GPIO5 */
5570#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5571static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5572 struct snd_ctl_elem_value *ucontrol)
5573{
5574 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5575 struct sigmatel_spec *spec = codec->spec;
5576 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5577 return 0;
5578}
5579
5580static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5581 struct snd_ctl_elem_value *ucontrol)
5582{
5583 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5584 struct sigmatel_spec *spec = codec->spec;
5585 unsigned int gpio_data;
5586
5587 gpio_data = (spec->gpio_data & ~0x20) |
5588 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5589 if (gpio_data == spec->gpio_data)
5590 return 0;
5591 spec->gpio_data = gpio_data;
5592 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5593 return 1;
5594}
5595
5596static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5597 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5598 .info = stac_hp_bass_gpio_info,
5599 .get = stac_hp_bass_gpio_get,
5600 .put = stac_hp_bass_gpio_put,
5601};
5602
5603static int stac_add_hp_bass_switch(struct hda_codec *codec)
5604{
5605 struct sigmatel_spec *spec = codec->spec;
5606
5607 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5608 "Bass Speaker Playback Switch", 0))
5609 return -ENOMEM;
5610
5611 spec->gpio_mask |= 0x20;
5612 spec->gpio_dir |= 0x20;
5613 spec->gpio_data |= 0x20;
5614 return 0;
5615}
5616
e035b841
MR		 5617static int patch_stac92hd71bxx(struct hda_codec *codec)
5618{
5619 struct sigmatel_spec *spec;
ca8d33fc 5620 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5621 unsigned int pin_cfg;
e035b841
MR		 5622 int err = 0;
5623
5624 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5625 if (spec == NULL)
5626 return -ENOMEM;
5627
a252c81a 5628 codec->no_trigger_sense = 1;
e035b841 5629 codec->spec = spec;
1b0e372d 5630 spec->linear_tone_beep = 0;
8daaaa97 5631 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5632 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5633 switch (codec->vendor_id) {
5634 case 0x111d76b6:
5635 case 0x111d76b7:
5636 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5637 break;
5638 case 0x111d7603:
5639 case 0x111d7608:
5640 /* On 92HD75Bx 0x27 isn't a pin nid */
5641 spec->num_pins--;
5642 /* fallthrough */
5643 default:
5644 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5645 }
aafc4412 5646 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5647 spec->board_config = snd_hda_check_board_config(codec,
5648 STAC_92HD71BXX_MODELS,
5649 stac92hd71bxx_models,
5650 stac92hd71bxx_cfg_tbl);
5651again:
330ee995 5652 if (spec->board_config < 0)
9a11f1aa
TI		 5653 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5654 codec->chip_name);
330ee995
TI		 5655 else
5656 stac92xx_set_config_regs(codec,
af9f341a 5657 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5658
fc64b26c 5659 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5660 /* GPIO0 = EAPD */
5661 spec->gpio_mask = 0x01;
5662 spec->gpio_dir = 0x01;
5663 spec->gpio_data = 0x01;
5664 }
5665
6df703ae
HRK		 5666 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5667 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5668
6479c631
TI		 5669 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5670 spec->capvols = stac92hd71bxx_capvols;
5671 spec->capsws = stac92hd71bxx_capsws;
5672
541eee87
MR		 5673 switch (codec->vendor_id) {
5674 case 0x111d76b6: /* 4 Port without Analog Mixer */
5675 case 0x111d76b7:
23c7b521
HRK		 5676 unmute_init++;
5677 /* fallthru */
541eee87
MR		 5678 case 0x111d76b4: /* 6 Port without Analog Mixer */
5679 case 0x111d76b5:
541eee87 5680 spec->init = stac92hd71bxx_core_init;
0ffa9807 5681 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5682 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5683 stac92hd71bxx_dmic_nids,
5684 STAC92HD71BXX_NUM_DMICS);
541eee87 5685 break;
aafc4412 5686 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5687 switch (spec->board_config) {
5688 case STAC_HP_M4:
72474be6 5689 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5690 err = stac_add_event(spec, codec->afg,
5691 STAC_VREF_EVENT, 0x02);
5692 if (err < 0)
5693 return err;
c5d08bb5 5694 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5695 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5696 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5697 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5698 AC_USRSP_EN | err);
72474be6
MR		 5699 spec->gpio_mask |= 0x02;
5700 break;
5701 }
8daaaa97 5702 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5703 (codec->revision_id & 0xf) == 1)
8daaaa97 5704 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5705
aafc4412
MR		 5706 /* no output amps */
5707 spec->num_pwrs = 0;
aafc4412 5708 /* disable VSW */
26a27980 5709 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5710 unmute_init++;
330ee995
TI		 5711 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5712 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae 5713 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
ab5a6ebe 5714 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5715 stac92hd71bxx_dmic_nids,
5716 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5717 break;
5718 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5719 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5720 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5721
aafc4412
MR		 5722 /* no output amps */
5723 spec->num_pwrs = 0;
5724 /* fallthru */
541eee87 5725 default:
26a27980 5726 spec->init = stac92hd71bxx_core_init;
0ffa9807 5727 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5728 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5729 stac92hd71bxx_dmic_nids,
5730 STAC92HD71BXX_NUM_DMICS);
5207e10e 5731 break;
541eee87
MR		 5732 }
5733
ca8d33fc
MR		 5734 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5735 snd_hda_sequence_write_cache(codec, unmute_init);
5736
b20f3b83
TI		 5737 /* Some HP machines seem to have unstable codec communications
5738 * especially with ATI fglrx driver. For recovering from the
5739 * CORB/RIRB stall, allow the BUS reset and keep always sync
5740 */
5741 if (spec->board_config == STAC_HP_DV5) {
5742 codec->bus->sync_write = 1;
5743 codec->bus->allow_bus_reset = 1;
5744 }
5745
d78d7a90 5746 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5747 spec->aloopback_mask = 0x50;
541eee87
MR		 5748 spec->aloopback_shift = 0;
5749
8daaaa97 5750 spec->powerdown_adcs = 1;
1cd2224c 5751 spec->digbeep_nid = 0x26;
e035b841
MR		 5752 spec->mux_nids = stac92hd71bxx_mux_nids;
5753 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5754 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5755 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5756
5757 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5758 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5759 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5760 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5761
d38cce70
KG		 5762 snd_printdd("Found board config: %d\n", spec->board_config);
5763
6a14f585
MR		 5764 switch (spec->board_config) {
5765 case STAC_HP_M4:
6a14f585 5766 /* enable internal microphone */
330ee995 5767 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5768 stac92xx_auto_set_pinctl(codec, 0x0e,
5769 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5770 /* fallthru */
5771 case STAC_DELL_M4_2:
5772 spec->num_dmics = 0;
5773 spec->num_smuxes = 0;
5774 spec->num_dmuxes = 0;
5775 break;
5776 case STAC_DELL_M4_1:
5777 case STAC_DELL_M4_3:
5778 spec->num_dmics = 1;
5779 spec->num_smuxes = 0;
ea18aa46 5780 spec->num_dmuxes = 1;
6a14f585 5781 break;
514bf54c
JG		 5782 case STAC_HP_DV4_1222NR:
5783 spec->num_dmics = 1;
5784 /* I don't know if it needs 1 or 2 smuxes - will wait for
5785 * bug reports to fix if needed
5786 */
5787 spec->num_smuxes = 1;
5788 spec->num_dmuxes = 1;
514bf54c 5789 /* fallthrough */
2a6ce6e5
TI		 5790 case STAC_HP_DV4:
5791 spec->gpio_led = 0x01;
5792 /* fallthrough */
e2ea57a8 5793 case STAC_HP_DV5:
330ee995 5794 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5795 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5796 /* HP dv6 gives the headphone pin as a line-out. Thus we
5797 * need to set hp_detect flag here to force to enable HP
5798 * detection.
5799 */
5800 spec->hp_detect = 1;
e2ea57a8 5801 break;
ae6241fb
CP		 5802 case STAC_HP_HDX:
5803 spec->num_dmics = 1;
5804 spec->num_dmuxes = 1;
5805 spec->num_smuxes = 1;
26ebe0a2 5806 spec->gpio_led = 0x08;
86d190e7
TI		 5807 break;
5808 }
443e26d0 5809
c357aab0 5810 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5811 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5812 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5813 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5814 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5815 /* It was changed in the BIOS to just satisfy MS DTM.
5816 * Lets turn it back into slaved HP
5817 */
5818 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5819 | (AC_JACK_HP_OUT <<
5820 AC_DEFCFG_DEVICE_SHIFT);
5821 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5822 | AC_DEFCFG_SEQUENCE)))
5823 | 0x1f;
5824 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5825 }
5826 }
5827
dce17d4f 5828 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5829 snd_printd("mute LED gpio %d polarity %d\n",
5830 spec->gpio_led,
5831 spec->gpio_led_polarity);
5bdaaada 5832
86d190e7
TI		 5833#ifdef CONFIG_SND_HDA_POWER_SAVE
5834 if (spec->gpio_led) {
5835 spec->gpio_mask |= spec->gpio_led;
5836 spec->gpio_dir |= spec->gpio_led;
5837 spec->gpio_data |= spec->gpio_led;
443e26d0 5838 /* register check_power_status callback. */
6fce61ae 5839 codec->patch_ops.check_power_status =
86d190e7
TI		 5840 stac92xx_hp_check_power_status;
5841 }
443e26d0 5842#endif
6a14f585 5843
c21ca4a8 5844 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5845
29d4ab4d 5846 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 5847 if (!err) {
5848 if (spec->board_config < 0) {
5849 printk(KERN_WARNING "hda_codec: No auto-config is "
5850 "available, default to model=ref\n");
5851 spec->board_config = STAC_92HD71BXX_REF;
5852 goto again;
5853 }
5854 err = -EINVAL;
5855 }
5856
5857 if (err < 0) {
5858 stac92xx_free(codec);
5859 return err;
5860 }
5861
75d1aeb9 5862 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5863 if (spec->board_config == STAC_HP_DV4 ||
5864 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5865 unsigned int cap;
5866 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5867 cap &= AC_GPIO_IO_COUNT;
5868 if (cap >= 6)
5869 stac_add_hp_bass_switch(codec);
5870 }
5871
2d34e1b3
TI		 5872 codec->proc_widget_hook = stac92hd7x_proc_hook;
5873
e035b841 5874 return 0;
86d190e7 5875}
e035b841 5876
2f2f4251
M		 5877static int patch_stac922x(struct hda_codec *codec)
5878{
5879 struct sigmatel_spec *spec;
c7d4b2fa 5880 int err;
2f2f4251 5881
e560d8d8 5882 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5883 if (spec == NULL)
5884 return -ENOMEM;
5885
a252c81a 5886 codec->no_trigger_sense = 1;
2f2f4251 5887 codec->spec = spec;
1b0e372d 5888 spec->linear_tone_beep = 1;
a4eed138 5889 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5890 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5891 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5892 stac922x_models,
5893 stac922x_cfg_tbl);
536319af 5894 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5895 spec->gpio_mask = spec->gpio_dir = 0x03;
5896 spec->gpio_data = 0x03;
3fc24d85
TI		 5897 /* Intel Macs have all same PCI SSID, so we need to check
5898 * codec SSID to distinguish the exact models
5899 */
6f0778d8 5900 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5901 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5902
5903 case 0x106b0800:
5904 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5905 break;
5d5d3bc3
IZ		 5906 case 0x106b0600:
5907 case 0x106b0700:
5908 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5909 break;
5d5d3bc3
IZ		 5910 case 0x106b0e00:
5911 case 0x106b0f00:
5912 case 0x106b1600:
5913 case 0x106b1700:
5914 case 0x106b0200:
5915 case 0x106b1e00:
5916 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5917 break;
5d5d3bc3
IZ		 5918 case 0x106b1a00:
5919 case 0x00000100:
5920 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5921 break;
5d5d3bc3
IZ		 5922 case 0x106b0a00:
5923 case 0x106b2200:
5924 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5925 break;
536319af
NB		 5926 default:
5927 spec->board_config = STAC_INTEL_MAC_V3;
5928 break;
3fc24d85
TI		 5929 }
5930 }
5931
9e507abd 5932 again:
330ee995 5933 if (spec->board_config < 0)
9a11f1aa
TI		 5934 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5935 codec->chip_name);
330ee995
TI		 5936 else
5937 stac92xx_set_config_regs(codec,
af9f341a 5938 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5939
c7d4b2fa
M		 5940 spec->adc_nids = stac922x_adc_nids;
5941 spec->mux_nids = stac922x_mux_nids;
2549413e 5942 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5943 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5944 spec->num_dmics = 0;
a64135a2 5945 spec->num_pwrs = 0;
c7d4b2fa
M		 5946
5947 spec->init = stac922x_core_init;
6479c631
TI		 5948
5949 spec->num_caps = STAC922X_NUM_CAPS;
5950 spec->capvols = stac922x_capvols;
5951 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 5952
5953 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5954
3cc08dc6 5955 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5956 if (!err) {
5957 if (spec->board_config < 0) {
5958 printk(KERN_WARNING "hda_codec: No auto-config is "
5959 "available, default to model=ref\n");
5960 spec->board_config = STAC_D945_REF;
5961 goto again;
5962 }
5963 err = -EINVAL;
5964 }
3cc08dc6
MP		 5965 if (err < 0) {
5966 stac92xx_free(codec);
5967 return err;
5968 }
5969
5970 codec->patch_ops = stac92xx_patch_ops;
5971
807a4636
TI		 5972 /* Fix Mux capture level; max to 2 */
5973 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5974 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5975 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5976 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5977 (0 << AC_AMPCAP_MUTE_SHIFT));
5978
3cc08dc6
MP		 5979 return 0;
5980}
5981
5982static int patch_stac927x(struct hda_codec *codec)
5983{
5984 struct sigmatel_spec *spec;
5985 int err;
5986
5987 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5988 if (spec == NULL)
5989 return -ENOMEM;
5990
a252c81a 5991 codec->no_trigger_sense = 1;
3cc08dc6 5992 codec->spec = spec;
1b0e372d 5993 spec->linear_tone_beep = 1;
45c1d85b 5994 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5995 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5996 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5997 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5998 stac927x_models,
5999 stac927x_cfg_tbl);
9e507abd 6000 again:
330ee995 6001 if (spec->board_config < 0)
9a11f1aa
TI		 6002 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6003 codec->chip_name);
330ee995
TI		 6004 else
6005 stac92xx_set_config_regs(codec,
af9f341a 6006 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6007
1cd2224c 6008 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6009 spec->adc_nids = stac927x_adc_nids;
6010 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6011 spec->mux_nids = stac927x_mux_nids;
6012 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6013 spec->smux_nids = stac927x_smux_nids;
6014 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6015 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6016 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6017 spec->multiout.dac_nids = spec->dac_nids;
6018
af6ee302
TI		 6019 if (spec->board_config != STAC_D965_REF) {
6020 /* GPIO0 High = Enable EAPD */
6021 spec->eapd_mask = spec->gpio_mask = 0x01;
6022 spec->gpio_dir = spec->gpio_data = 0x01;
6023 }
6024
81d3dbde 6025 switch (spec->board_config) {
93ed1503 6026 case STAC_D965_3ST:
93ed1503 6027 case STAC_D965_5ST:
8e9068b1 6028 /* GPIO0 High = Enable EAPD */
8e9068b1 6029 spec->num_dmics = 0;
93ed1503 6030 spec->init = d965_core_init;
81d3dbde 6031 break;
8e9068b1 6032 case STAC_DELL_BIOS:
780c8be4
MR		 6033 switch (codec->subsystem_id) {
6034 case 0x10280209:
6035 case 0x1028022e:
6036 /* correct the device field to SPDIF out */
330ee995 6037 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6038 break;
86d190e7 6039 }
03d7ca17 6040 /* configure the analog microphone on some laptops */
330ee995 6041 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6042 /* correct the front output jack as a hp out */
330ee995 6043 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6044 /* correct the front input jack as a mic */
330ee995 6045 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6046 /* fallthru */
8e9068b1 6047 case STAC_DELL_3ST:
af6ee302
TI		 6048 if (codec->subsystem_id != 0x1028022f) {
6049 /* GPIO2 High = Enable EAPD */
6050 spec->eapd_mask = spec->gpio_mask = 0x04;
6051 spec->gpio_dir = spec->gpio_data = 0x04;
6052 }
7f16859a
MR		 6053 spec->dmic_nids = stac927x_dmic_nids;
6054 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6055
ccca7cdc 6056 spec->init = dell_3st_core_init;
8e9068b1 6057 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6058 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6059 break;
54930531
TI		 6060 case STAC_927X_VOLKNOB:
6061 spec->num_dmics = 0;
6062 spec->init = stac927x_volknob_core_init;
6063 break;
7f16859a 6064 default:
8e9068b1 6065 spec->num_dmics = 0;
8e9068b1 6066 spec->init = stac927x_core_init;
af6ee302 6067 break;
7f16859a
MR		 6068 }
6069
6479c631
TI		 6070 spec->num_caps = STAC927X_NUM_CAPS;
6071 spec->capvols = stac927x_capvols;
6072 spec->capsws = stac927x_capsws;
6073
a64135a2 6074 spec->num_pwrs = 0;
d78d7a90 6075 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6076 spec->aloopback_mask = 0x40;
6077 spec->aloopback_shift = 0;
c0cea0d0 6078 spec->eapd_switch = 1;
8e9068b1 6079
3cc08dc6 6080 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 6081 if (!err) {
6082 if (spec->board_config < 0) {
6083 printk(KERN_WARNING "hda_codec: No auto-config is "
6084 "available, default to model=ref\n");
6085 spec->board_config = STAC_D965_REF;
6086 goto again;
6087 }
6088 err = -EINVAL;
6089 }
c7d4b2fa
M		 6090 if (err < 0) {
6091 stac92xx_free(codec);
6092 return err;
6093 }
2f2f4251
M		 6094
6095 codec->patch_ops = stac92xx_patch_ops;
6096
2d34e1b3
TI		 6097 codec->proc_widget_hook = stac927x_proc_hook;
6098
52987656
TI		 6099 /*
6100 * !!FIXME!!
6101 * The STAC927x seem to require fairly long delays for certain
6102 * command sequences. With too short delays (even if the answer
6103 * is set to RIRB properly), it results in the silence output
6104 * on some hardwares like Dell.
6105 *
6106 * The below flag enables the longer delay (see get_response
6107 * in hda_intel.c).
6108 */
6109 codec->bus->needs_damn_long_delay = 1;
6110
e28d8322
TI		 6111 /* no jack detecion for ref-no-jd model */
6112 if (spec->board_config == STAC_D965_REF_NO_JD)
6113 spec->hp_detect = 0;
6114
2f2f4251
M		 6115 return 0;
6116}
6117
f3302a59
MP		 6118static int patch_stac9205(struct hda_codec *codec)
6119{
6120 struct sigmatel_spec *spec;
8259980e 6121 int err;
f3302a59
MP		 6122
6123 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6124 if (spec == NULL)
6125 return -ENOMEM;
6126
a252c81a 6127 codec->no_trigger_sense = 1;
f3302a59 6128 codec->spec = spec;
1b0e372d 6129 spec->linear_tone_beep = 1;
a4eed138 6130 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6131 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6132 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6133 stac9205_models,
6134 stac9205_cfg_tbl);
9e507abd 6135 again:
330ee995 6136 if (spec->board_config < 0)
9a11f1aa
TI		 6137 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6138 codec->chip_name);
330ee995
TI		 6139 else
6140 stac92xx_set_config_regs(codec,
af9f341a 6141 stac9205_brd_tbl[spec->board_config]);
f3302a59 6142
1cd2224c 6143 spec->digbeep_nid = 0x23;
f3302a59 6144 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6145 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6146 spec->mux_nids = stac9205_mux_nids;
2549413e 6147 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6148 spec->smux_nids = stac9205_smux_nids;
6149 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6150 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6151 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6152 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6153 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6154 spec->num_pwrs = 0;
f3302a59
MP		 6155
6156 spec->init = stac9205_core_init;
d78d7a90 6157 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6158
6479c631
TI		 6159 spec->num_caps = STAC9205_NUM_CAPS;
6160 spec->capvols = stac9205_capvols;
6161 spec->capsws = stac9205_capsws;
6162
e1f0d669
MR		 6163 spec->aloopback_mask = 0x40;
6164 spec->aloopback_shift = 0;
d9a4268e
TI		 6165 /* Turn on/off EAPD per HP plugging */
6166 if (spec->board_config != STAC_9205_EAPD)
6167 spec->eapd_switch = 1;
f3302a59 6168 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6169
ae0a8ed8 6170 switch (spec->board_config){
ae0a8ed8 6171 case STAC_9205_DELL_M43:
87d48363 6172 /* Enable SPDIF in/out */
330ee995
TI		 6173 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6174 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6175
4fe5195c 6176 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6177 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6178 if (err < 0)
6179 return err;
c5d08bb5 6180 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6181 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6182 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6183 AC_VERB_SET_UNSOLICITED_ENABLE,
6184 AC_USRSP_EN | err);
4fe5195c
MR		 6185
6186 spec->gpio_dir = 0x0b;
0fc9dec4 6187 spec->eapd_mask = 0x01;
4fe5195c
MR		 6188 spec->gpio_mask = 0x1b;
6189 spec->gpio_mute = 0x10;
e2e7d624 6190 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6191 * GPIO3 Low = DRM
87d48363 6192 */
4fe5195c 6193 spec->gpio_data = 0x01;
ae0a8ed8 6194 break;
b2c4f4d7
MR		 6195 case STAC_9205_REF:
6196 /* SPDIF-In enabled */
6197 break;
ae0a8ed8
TD		 6198 default:
6199 /* GPIO0 High = EAPD */
0fc9dec4 6200 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6201 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6202 break;
6203 }
33382403 6204
f3302a59 6205 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 6206 if (!err) {
6207 if (spec->board_config < 0) {
6208 printk(KERN_WARNING "hda_codec: No auto-config is "
6209 "available, default to model=ref\n");
6210 spec->board_config = STAC_9205_REF;
6211 goto again;
6212 }
6213 err = -EINVAL;
6214 }
f3302a59
MP		 6215 if (err < 0) {
6216 stac92xx_free(codec);
6217 return err;
6218 }
6219
6220 codec->patch_ops = stac92xx_patch_ops;
6221
2d34e1b3
TI		 6222 codec->proc_widget_hook = stac9205_proc_hook;
6223
f3302a59
MP		 6224 return 0;
6225}
6226
db064e50 6227/*
6d859065 6228 * STAC9872 hack
db064e50
TI		 6229 */
6230
1e137f92 6231static struct hda_verb stac9872_core_init[] = {
1624cb9a 6232 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6233 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6234 {}
6235};
6236
caa10b6e
TI		 6237static hda_nid_t stac9872_pin_nids[] = {
6238 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6239 0x11, 0x13, 0x14,
6240};
6241
6242static hda_nid_t stac9872_adc_nids[] = {
6243 0x8 /*,0x6*/
6244};
6245
6246static hda_nid_t stac9872_mux_nids[] = {
6247 0x15
6248};
6249
6479c631
TI		 6250static unsigned long stac9872_capvols[] = {
6251 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6252};
6253#define stac9872_capsws stac9872_capvols
6254
307282c8
TI		 6255static unsigned int stac9872_vaio_pin_configs[9] = {
6256 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6257 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6258 0x90a7013e
6259};
6260
6261static const char *stac9872_models[STAC_9872_MODELS] = {
6262 [STAC_9872_AUTO] = "auto",
6263 [STAC_9872_VAIO] = "vaio",
6264};
6265
6266static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6267 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6268};
6269
6270static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6271 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6272 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6273 {} /* terminator */
6274};
6275
6d859065 6276static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6277{
6278 struct sigmatel_spec *spec;
1e137f92 6279 int err;
db064e50 6280
db064e50
TI		 6281 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6282 if (spec == NULL)
6283 return -ENOMEM;
a252c81a 6284 codec->no_trigger_sense = 1;
db064e50 6285 codec->spec = spec;
1b0e372d 6286 spec->linear_tone_beep = 1;
b04add95
TI		 6287 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6288 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6289
6290 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6291 stac9872_models,
6292 stac9872_cfg_tbl);
307282c8 6293 if (spec->board_config < 0)
9a11f1aa
TI		 6294 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6295 codec->chip_name);
307282c8
TI		 6296 else
6297 stac92xx_set_config_regs(codec,
6298 stac9872_brd_tbl[spec->board_config]);
db064e50 6299
1e137f92
TI		 6300 spec->multiout.dac_nids = spec->dac_nids;
6301 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6302 spec->adc_nids = stac9872_adc_nids;
6303 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6304 spec->mux_nids = stac9872_mux_nids;
1e137f92 6305 spec->init = stac9872_core_init;
6479c631
TI		 6306 spec->num_caps = 1;
6307 spec->capvols = stac9872_capvols;
6308 spec->capsws = stac9872_capsws;
1e137f92
TI		 6309
6310 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6311 if (err < 0) {
6312 stac92xx_free(codec);
6313 return -EINVAL;
6314 }
6315 spec->input_mux = &spec->private_imux;
6316 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6317 return 0;
6318}
6319
6320
2f2f4251
M		 6321/*
6322 * patch entries
6323 */
1289e9e8 6324static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6325 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6326 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6327 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6328 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6329 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6330 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6331 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6332 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6333 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6334 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6335 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6336 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6337 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6338 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6339 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6340 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6341 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6342 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6343 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6344 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6345 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6346 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6347 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6348 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6349 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6350 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6351 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6352 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6353 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6354 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6355 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6356 /* The following does not take into account .id=0x83847661 when subsys =
6357 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6358 * currently not fully supported.
6359 */
6360 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6361 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6362 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6363 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6364 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6365 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6366 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6367 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6368 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6369 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6370 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6371 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6372 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6373 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6374 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6375 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6376 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6377 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6378 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6379 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6380 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6381 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6382 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6383 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6384 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6385 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6386 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6387 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6388 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6389 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6390 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6391 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6392 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6393 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6394 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6395 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6396 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6397 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6398 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6399 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6400 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6401 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6402 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6403 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6404 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6405 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6406 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6407 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6408 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6409 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe
VK		 6410 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
6411 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6412 {} /* terminator */
6413};
1289e9e8
TI		 6414
6415MODULE_ALIAS("snd-hda-codec-id:8384*");
6416MODULE_ALIAS("snd-hda-codec-id:111d*");
6417
6418MODULE_LICENSE("GPL");
6419MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6420
6421static struct hda_codec_preset_list sigmatel_list = {
6422 .preset = snd_hda_preset_sigmatel,
6423 .owner = THIS_MODULE,
6424};
6425
6426static int __init patch_sigmatel_init(void)
6427{
6428 return snd_hda_add_codec_preset(&sigmatel_list);
6429}
6430
6431static void __exit patch_sigmatel_exit(void)
6432{
6433 snd_hda_delete_codec_preset(&sigmatel_list);
6434}
6435
6436module_init(patch_sigmatel_init)
6437module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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