projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[ALSA] hda-codec - Add missing eeepc-p701 model for ALC662
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
0fb87bb4 149 unsigned int clfe_swap;
5f10c4a9 150 unsigned int aloopback;
2f2f4251 151
c7d4b2fa
M		 152 struct hda_pcm pcm_rec[2]; /* PCM information */
153
154 /* dynamic controls and input_mux */
155 struct auto_pin_cfg autocfg;
156 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 157 struct snd_kcontrol_new *kctl_alloc;
8b65727b 158 struct hda_input_mux private_dimux;
c7d4b2fa 159 struct hda_input_mux private_imux;
2f2f4251
M		 160};
161
162static hda_nid_t stac9200_adc_nids[1] = {
163 0x03,
164};
165
166static hda_nid_t stac9200_mux_nids[1] = {
167 0x0c,
168};
169
170static hda_nid_t stac9200_dac_nids[1] = {
171 0x02,
172};
173
8e21c34c
TD		 174static hda_nid_t stac925x_adc_nids[1] = {
175 0x03,
176};
177
178static hda_nid_t stac925x_mux_nids[1] = {
179 0x0f,
180};
181
182static hda_nid_t stac925x_dac_nids[1] = {
183 0x02,
184};
185
f6e9852a
TI		 186#define STAC925X_NUM_DMICS 1
187static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
188 0x15, 0
2c11f955
TD		 189};
190
2f2f4251
M		 191static hda_nid_t stac922x_adc_nids[2] = {
192 0x06, 0x07,
193};
194
195static hda_nid_t stac922x_mux_nids[2] = {
196 0x12, 0x13,
197};
198
3cc08dc6
MP		 199static hda_nid_t stac927x_adc_nids[3] = {
200 0x07, 0x08, 0x09
201};
202
203static hda_nid_t stac927x_mux_nids[3] = {
204 0x15, 0x16, 0x17
205};
206
f3302a59
MP		 207static hda_nid_t stac9205_adc_nids[2] = {
208 0x12, 0x13
209};
210
211static hda_nid_t stac9205_mux_nids[2] = {
212 0x19, 0x1a
213};
214
f6e9852a
TI		 215#define STAC9205_NUM_DMICS 2
216static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
217 0x17, 0x18, 0
8b65727b
MP		 218};
219
c7d4b2fa 220static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 221 0x08, 0x09, 0x0d, 0x0e,
222 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 223};
224
8e21c34c
TD		 225static hda_nid_t stac925x_pin_nids[8] = {
226 0x07, 0x08, 0x0a, 0x0b,
227 0x0c, 0x0d, 0x10, 0x11,
228};
229
2f2f4251
M		 230static hda_nid_t stac922x_pin_nids[10] = {
231 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
232 0x0f, 0x10, 0x11, 0x15, 0x1b,
233};
234
3cc08dc6
MP		 235static hda_nid_t stac927x_pin_nids[14] = {
236 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
237 0x0f, 0x10, 0x11, 0x12, 0x13,
238 0x14, 0x21, 0x22, 0x23,
239};
240
f3302a59
MP		 241static hda_nid_t stac9205_pin_nids[12] = {
242 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
243 0x0f, 0x14, 0x16, 0x17, 0x18,
244 0x21, 0x22,
f3302a59
MP		 245};
246
8b65727b
MP		 247static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
248 struct snd_ctl_elem_info *uinfo)
249{
250 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
251 struct sigmatel_spec *spec = codec->spec;
252 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
253}
254
255static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
256 struct snd_ctl_elem_value *ucontrol)
257{
258 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
259 struct sigmatel_spec *spec = codec->spec;
260
261 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
262 return 0;
263}
264
265static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
266 struct snd_ctl_elem_value *ucontrol)
267{
268 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
269 struct sigmatel_spec *spec = codec->spec;
270
271 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
272 spec->dmux_nid, &spec->cur_dmux);
273}
274
c8b6bf9b 275static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 276{
277 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
278 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 279 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 280}
281
c8b6bf9b 282static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 283{
284 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
285 struct sigmatel_spec *spec = codec->spec;
286 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
287
288 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
289 return 0;
290}
291
c8b6bf9b 292static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 293{
294 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
295 struct sigmatel_spec *spec = codec->spec;
296 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
297
c7d4b2fa 298 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 299 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
300}
301
5f10c4a9
ML		 302#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
303
304static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
305 struct snd_ctl_elem_value *ucontrol)
306{
307 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
308 struct sigmatel_spec *spec = codec->spec;
309
310 ucontrol->value.integer.value[0] = spec->aloopback;
311 return 0;
312}
313
314static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
315 struct snd_ctl_elem_value *ucontrol)
316{
317 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
318 struct sigmatel_spec *spec = codec->spec;
319 unsigned int dac_mode;
320
321 if (spec->aloopback == ucontrol->value.integer.value[0])
322 return 0;
323
324 spec->aloopback = ucontrol->value.integer.value[0];
325
326
327 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
328 kcontrol->private_value & 0xFFFF, 0x0);
329
330 if (spec->aloopback) {
331 snd_hda_power_up(codec);
332 dac_mode |= 0x40;
333 } else {
334 snd_hda_power_down(codec);
335 dac_mode &= ~0x40;
336 }
337
338 snd_hda_codec_write_cache(codec, codec->afg, 0,
339 kcontrol->private_value >> 16, dac_mode);
340
341 return 1;
342}
343
c7d4b2fa 344static struct hda_verb stac9200_core_init[] = {
2f2f4251 345 /* set dac0mux for dac converter */
c7d4b2fa 346 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 347 {}
348};
349
1194b5b7
TI		 350static struct hda_verb stac9200_eapd_init[] = {
351 /* set dac0mux for dac converter */
352 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
353 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
354 {}
355};
356
8e21c34c
TD		 357static struct hda_verb stac925x_core_init[] = {
358 /* set dac0mux for dac converter */
359 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
360 {}
361};
362
c7d4b2fa 363static struct hda_verb stac922x_core_init[] = {
2f2f4251 364 /* set master volume and direct control */
c7d4b2fa 365 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 366 {}
367};
368
93ed1503 369static struct hda_verb d965_core_init[] = {
19039bd0 370 /* set master volume and direct control */
93ed1503 371 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 372 /* unmute node 0x1b */
373 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
374 /* select node 0x03 as DAC */
375 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
376 {}
377};
378
3cc08dc6
MP		 379static struct hda_verb stac927x_core_init[] = {
380 /* set master volume and direct control */
381 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
382 {}
383};
384
f3302a59
MP		 385static struct hda_verb stac9205_core_init[] = {
386 /* set master volume and direct control */
387 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
388 {}
389};
390
9e05b7a3 391#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 392 { \
393 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
394 .name = "Input Source", \
9e05b7a3 395 .count = cnt, \
ca7c5a8b
ML		 396 .info = stac92xx_mux_enum_info, \
397 .get = stac92xx_mux_enum_get, \
398 .put = stac92xx_mux_enum_put, \
399 }
400
5f10c4a9
ML		 401#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
402 { \
403 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
404 .name = "Analog Loopback", \
405 .count = 1, \
406 .info = stac92xx_aloopback_info, \
407 .get = stac92xx_aloopback_get, \
408 .put = stac92xx_aloopback_put, \
409 .private_value = verb_read | (verb_write << 16), \
410 }
411
c8b6bf9b 412static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 413 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
414 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 415 STAC_INPUT_SOURCE(1),
2f2f4251
M		 416 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
417 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 418 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 419 { } /* end */
420};
421
8e21c34c 422static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 423 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 424 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
425 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
426 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
427 { } /* end */
428};
429
9e05b7a3
ML		 430static struct snd_kcontrol_new stac9205_mixer[] = {
431 {
432 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
433 .name = "Digital Input Source",
434 .count = 1,
435 .info = stac92xx_dmux_enum_info,
436 .get = stac92xx_dmux_enum_get,
437 .put = stac92xx_dmux_enum_put,
438 },
439 STAC_INPUT_SOURCE(2),
440 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
9e05b7a3
ML		 441
442 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
443 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
444 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
445
446 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
447 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
448 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
449
2f2f4251
M		 450 { } /* end */
451};
452
19039bd0 453/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 454static struct snd_kcontrol_new stac922x_mixer[] = {
455 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 456 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
457 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
458 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
459
460 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
461 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
462 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 463 { } /* end */
464};
465
9e05b7a3 466
d1d985f0 467static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 468 STAC_INPUT_SOURCE(3),
5f10c4a9 469 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6 470
9e05b7a3
ML		 471 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
472 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
473 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
474
475 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
476 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
477 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
478
479 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
480 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
481 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 482 { } /* end */
483};
484
2f2f4251
M		 485static int stac92xx_build_controls(struct hda_codec *codec)
486{
487 struct sigmatel_spec *spec = codec->spec;
488 int err;
c7d4b2fa 489 int i;
2f2f4251
M		 490
491 err = snd_hda_add_new_ctls(codec, spec->mixer);
492 if (err < 0)
493 return err;
c7d4b2fa
M		 494
495 for (i = 0; i < spec->num_mixers; i++) {
496 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
497 if (err < 0)
498 return err;
499 }
500
dabbed6f
M		 501 if (spec->multiout.dig_out_nid) {
502 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
503 if (err < 0)
504 return err;
505 }
506 if (spec->dig_in_nid) {
507 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
508 if (err < 0)
509 return err;
510 }
511 return 0;
2f2f4251
M		 512}
513
403d1944 514static unsigned int ref9200_pin_configs[8] = {
dabbed6f 515 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 516 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
517};
518
dfe495d0
TI		 519/*
520 STAC 9200 pin configs for
521 102801A8
522 102801DE
523 102801E8
524*/
525static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 526 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
527 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 528};
529
530/*
531 STAC 9200 pin configs for
532 102801C0
533 102801C1
534*/
535static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 536 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
537 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 538};
539
540/*
541 STAC 9200 pin configs for
542 102801C4 (Dell Dimension E310)
543 102801C5
544 102801C7
545 102801D9
546 102801DA
547 102801E3
548*/
549static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 550 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
551 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 552};
553
554
555/*
556 STAC 9200-32 pin configs for
557 102801B5 (Dell Inspiron 630m)
558 102801D8 (Dell Inspiron 640m)
559*/
560static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 561 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
562 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 563};
564
565/*
566 STAC 9200-32 pin configs for
567 102801C2 (Dell Latitude D620)
568 102801C8
569 102801CC (Dell Latitude D820)
570 102801D4
571 102801D6
572*/
573static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 574 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
575 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 576};
577
578/*
579 STAC 9200-32 pin configs for
580 102801CE (Dell XPS M1710)
581 102801CF (Dell Precision M90)
582*/
583static unsigned int dell9200_m23_pin_configs[8] = {
584 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
585 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
586};
587
588/*
589 STAC 9200-32 pin configs for
590 102801C9
591 102801CA
592 102801CB (Dell Latitude 120L)
593 102801D3
594*/
595static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 596 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
597 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 598};
599
600/*
601 STAC 9200-32 pin configs for
602 102801BD (Dell Inspiron E1505n)
603 102801EE
604 102801EF
605*/
606static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 607 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
608 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 609};
610
611/*
612 STAC 9200-32 pin configs for
613 102801F5 (Dell Inspiron 1501)
614 102801F6
615*/
616static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 617 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
618 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 619};
620
621/*
622 STAC 9200-32
623 102801CD (Dell Inspiron E1705/9400)
624*/
625static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 626 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
627 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 628};
629
630
f5fcc13c
TI		 631static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
632 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 633 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
634 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
635 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
636 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
637 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
638 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
639 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
640 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
641 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
642 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 643};
644
f5fcc13c
TI		 645static const char *stac9200_models[STAC_9200_MODELS] = {
646 [STAC_REF] = "ref",
dfe495d0
TI		 647 [STAC_9200_DELL_D21] = "dell-d21",
648 [STAC_9200_DELL_D22] = "dell-d22",
649 [STAC_9200_DELL_D23] = "dell-d23",
650 [STAC_9200_DELL_M21] = "dell-m21",
651 [STAC_9200_DELL_M22] = "dell-m22",
652 [STAC_9200_DELL_M23] = "dell-m23",
653 [STAC_9200_DELL_M24] = "dell-m24",
654 [STAC_9200_DELL_M25] = "dell-m25",
655 [STAC_9200_DELL_M26] = "dell-m26",
656 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 657 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 658};
659
660static struct snd_pci_quirk stac9200_cfg_tbl[] = {
661 /* SigmaTel reference board */
662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
663 "DFI LanParty", STAC_REF),
e7377071 664 /* Dell laptops have BIOS problem */
dfe495d0
TI		 665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
666 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 668 "Dell Inspiron 630m", STAC_9200_DELL_M21),
669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
670 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
672 "unknown Dell", STAC_9200_DELL_D22),
673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
674 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 675 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 676 "Dell Latitude D620", STAC_9200_DELL_M22),
677 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
678 "unknown Dell", STAC_9200_DELL_D23),
679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
680 "unknown Dell", STAC_9200_DELL_D23),
681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
682 "unknown Dell", STAC_9200_DELL_M22),
683 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
684 "unknown Dell", STAC_9200_DELL_M24),
685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
686 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 688 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 690 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 692 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 694 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 696 "Dell Precision M90", STAC_9200_DELL_M23),
697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
698 "unknown Dell", STAC_9200_DELL_M22),
699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
700 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 702 "unknown Dell", STAC_9200_DELL_M22),
49c605db 703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 704 "Dell Inspiron 640m", STAC_9200_DELL_M21),
705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
706 "unknown Dell", STAC_9200_DELL_D23),
707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
708 "unknown Dell", STAC_9200_DELL_D23),
709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
710 "unknown Dell", STAC_9200_DELL_D21),
711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
712 "unknown Dell", STAC_9200_DELL_D23),
713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
714 "unknown Dell", STAC_9200_DELL_D21),
715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
716 "unknown Dell", STAC_9200_DELL_M25),
717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
718 "unknown Dell", STAC_9200_DELL_M25),
49c605db 719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 720 "Dell Inspiron 1501", STAC_9200_DELL_M26),
721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
722 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 723 /* Panasonic */
724 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 725 /* Gateway machines needs EAPD to be set on resume */
726 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
727 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
728 STAC_9200_GATEWAY),
729 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
730 STAC_9200_GATEWAY),
403d1944
MP		 731 {} /* terminator */
732};
733
8e21c34c
TD		 734static unsigned int ref925x_pin_configs[8] = {
735 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
736 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
737};
738
739static unsigned int stac925x_MA6_pin_configs[8] = {
740 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
741 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
742};
743
2c11f955
TD		 744static unsigned int stac925x_PA6_pin_configs[8] = {
745 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
746 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
747};
748
8e21c34c 749static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 750 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
751 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 752};
753
754static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
755 [STAC_REF] = ref925x_pin_configs,
756 [STAC_M2_2] = stac925xM2_2_pin_configs,
757 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 758 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 759};
760
761static const char *stac925x_models[STAC_925x_MODELS] = {
762 [STAC_REF] = "ref",
763 [STAC_M2_2] = "m2-2",
764 [STAC_MA6] = "m6",
2c11f955 765 [STAC_PA6] = "pa6",
8e21c34c
TD		 766};
767
768static struct snd_pci_quirk stac925x_cfg_tbl[] = {
769 /* SigmaTel reference board */
770 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 771 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 772 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
773 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
774 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 775 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 776 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
777 {} /* terminator */
778};
779
403d1944
MP		 780static unsigned int ref922x_pin_configs[10] = {
781 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
782 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 783 0x40000100, 0x40000100,
784};
785
dfe495d0
TI		 786/*
787 STAC 922X pin configs for
788 102801A7
789 102801AB
790 102801A9
791 102801D1
792 102801D2
793*/
794static unsigned int dell_922x_d81_pin_configs[10] = {
795 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
796 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
797 0x01813122, 0x400001f2,
798};
799
800/*
801 STAC 922X pin configs for
802 102801AC
803 102801D0
804*/
805static unsigned int dell_922x_d82_pin_configs[10] = {
806 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
807 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
808 0x01813122, 0x400001f1,
809};
810
811/*
812 STAC 922X pin configs for
813 102801BF
814*/
815static unsigned int dell_922x_m81_pin_configs[10] = {
816 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
817 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
818 0x40C003f1, 0x405003f0,
819};
820
821/*
822 STAC 9221 A1 pin configs for
823 102801D7 (Dell XPS M1210)
824*/
825static unsigned int dell_922x_m82_pin_configs[10] = {
826 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
827 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
828 0x508003f3, 0x405003f4,
829};
830
403d1944 831static unsigned int d945gtp3_pin_configs[10] = {
869264c4 832 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 833 0x40000100, 0x40000100, 0x40000100, 0x40000100,
834 0x02a19120, 0x40000100,
835};
836
837static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 838 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
839 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 840 0x02a19320, 0x40000100,
841};
842
5d5d3bc3
IZ		 843static unsigned int intel_mac_v1_pin_configs[10] = {
844 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
845 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
846 0x400000fc, 0x400000fb,
847};
848
849static unsigned int intel_mac_v2_pin_configs[10] = {
850 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
851 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
852 0x400000fc, 0x400000fb,
6f0778d8
NB		 853};
854
5d5d3bc3
IZ		 855static unsigned int intel_mac_v3_pin_configs[10] = {
856 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
857 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 858 0x400000fc, 0x400000fb,
859};
860
5d5d3bc3
IZ		 861static unsigned int intel_mac_v4_pin_configs[10] = {
862 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
863 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 864 0x400000fc, 0x400000fb,
865};
866
5d5d3bc3
IZ		 867static unsigned int intel_mac_v5_pin_configs[10] = {
868 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
869 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
870 0x400000fc, 0x400000fb,
0dae0f83
TI		 871};
872
76c08828 873
19039bd0 874static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 875 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 876 [STAC_D945GTP3] = d945gtp3_pin_configs,
877 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 878 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
879 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
880 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
881 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
882 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 883 /* for backward compatibility */
5d5d3bc3
IZ		 884 [STAC_MACMINI] = intel_mac_v3_pin_configs,
885 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
886 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
887 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
888 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
889 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 890 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
891 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
892 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
893 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 894};
895
f5fcc13c
TI		 896static const char *stac922x_models[STAC_922X_MODELS] = {
897 [STAC_D945_REF] = "ref",
898 [STAC_D945GTP5] = "5stack",
899 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 900 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
901 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
902 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
903 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
904 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 905 /* for backward compatibility */
f5fcc13c 906 [STAC_MACMINI] = "macmini",
3fc24d85 907 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 908 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
909 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 910 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 911 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 912 [STAC_922X_DELL_D81] = "dell-d81",
913 [STAC_922X_DELL_D82] = "dell-d82",
914 [STAC_922X_DELL_M81] = "dell-m81",
915 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 916};
917
918static struct snd_pci_quirk stac922x_cfg_tbl[] = {
919 /* SigmaTel reference board */
920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
921 "DFI LanParty", STAC_D945_REF),
922 /* Intel 945G based systems */
923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
924 "Intel D945G", STAC_D945GTP3),
925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
926 "Intel D945G", STAC_D945GTP3),
927 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
928 "Intel D945G", STAC_D945GTP3),
929 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
930 "Intel D945G", STAC_D945GTP3),
931 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
932 "Intel D945G", STAC_D945GTP3),
933 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
934 "Intel D945G", STAC_D945GTP3),
935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
936 "Intel D945G", STAC_D945GTP3),
937 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
938 "Intel D945G", STAC_D945GTP3),
939 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
940 "Intel D945G", STAC_D945GTP3),
941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
942 "Intel D945G", STAC_D945GTP3),
943 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
944 "Intel D945G", STAC_D945GTP3),
945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
946 "Intel D945G", STAC_D945GTP3),
947 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
948 "Intel D945G", STAC_D945GTP3),
949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
950 "Intel D945G", STAC_D945GTP3),
951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
952 "Intel D945G", STAC_D945GTP3),
953 /* Intel D945G 5-stack systems */
954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
955 "Intel D945G", STAC_D945GTP5),
956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
957 "Intel D945G", STAC_D945GTP5),
958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
959 "Intel D945G", STAC_D945GTP5),
960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
961 "Intel D945G", STAC_D945GTP5),
962 /* Intel 945P based systems */
963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
964 "Intel D945P", STAC_D945GTP3),
965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
966 "Intel D945P", STAC_D945GTP3),
967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
968 "Intel D945P", STAC_D945GTP3),
969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
970 "Intel D945P", STAC_D945GTP3),
971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
972 "Intel D945P", STAC_D945GTP3),
973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
974 "Intel D945P", STAC_D945GTP5),
975 /* other systems */
976 /* Apple Mac Mini (early 2006) */
977 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 978 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 979 /* Dell systems */
980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
981 "unknown Dell", STAC_922X_DELL_D81),
982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
983 "unknown Dell", STAC_922X_DELL_D81),
984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
985 "unknown Dell", STAC_922X_DELL_D81),
986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
987 "unknown Dell", STAC_922X_DELL_D82),
988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
989 "unknown Dell", STAC_922X_DELL_M81),
990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
991 "unknown Dell", STAC_922X_DELL_D82),
992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
993 "unknown Dell", STAC_922X_DELL_D81),
994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
995 "unknown Dell", STAC_922X_DELL_D81),
996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
997 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 998 {} /* terminator */
999};
1000
3cc08dc6 1001static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1002 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1003 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1004 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1005 0x01c42190, 0x40000100,
3cc08dc6
MP		 1006};
1007
93ed1503 1008static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1009 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1010 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1011 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1012 0x40000100, 0x40000100
1013};
1014
93ed1503
TD		 1015static unsigned int d965_5st_pin_configs[14] = {
1016 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1017 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1018 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1019 0x40000100, 0x40000100
1020};
1021
4ff076e5
TD		 1022static unsigned int dell_3st_pin_configs[14] = {
1023 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1024 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1025 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1026 0x40c003fc, 0x40000100
1027};
1028
93ed1503 1029static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1030 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1031 [STAC_D965_3ST] = d965_3st_pin_configs,
1032 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1033 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1034};
1035
f5fcc13c
TI		 1036static const char *stac927x_models[STAC_927X_MODELS] = {
1037 [STAC_D965_REF] = "ref",
1038 [STAC_D965_3ST] = "3stack",
1039 [STAC_D965_5ST] = "5stack",
4ff076e5 1040 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1041};
1042
1043static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1044 /* SigmaTel reference board */
1045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1046 "DFI LanParty", STAC_D965_REF),
81d3dbde 1047 /* Intel 946 based systems */
f5fcc13c
TI		 1048 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1050 /* 965 based 3 stack systems */
f5fcc13c
TI		 1051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
5e915bb3 1067 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
4ff076e5 1068 /* Dell 3 stack systems */
dfe495d0 1069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1072 /* 965 based 5 stack systems */
5e915bb3 1073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
f5fcc13c
TI		 1074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1082 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1083 {} /* terminator */
1084};
1085
f3302a59
MP		 1086static unsigned int ref9205_pin_configs[12] = {
1087 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1088 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1089 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1090};
1091
dfe495d0
TI		 1092/*
1093 STAC 9205 pin configs for
1094 102801F1
1095 102801F2
1096 102801FC
1097 102801FD
1098 10280204
1099 1028021F
1100*/
1101static unsigned int dell_9205_m42_pin_configs[12] = {
1102 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1103 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1104 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1105};
1106
1107/*
1108 STAC 9205 pin configs for
1109 102801F9
1110 102801FA
1111 102801FE
1112 102801FF (Dell Precision M4300)
1113 10280206
1114 10280200
1115 10280201
1116*/
1117static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1118 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1119 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1120 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1121};
1122
dfe495d0 1123static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1124 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1125 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1126 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1127};
1128
f5fcc13c 1129static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1130 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1131 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1132 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1133 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1134};
1135
f5fcc13c
TI		 1136static const char *stac9205_models[STAC_9205_MODELS] = {
1137 [STAC_9205_REF] = "ref",
dfe495d0 1138 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1139 [STAC_9205_DELL_M43] = "dell-m43",
1140 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1141};
1142
1143static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1144 /* SigmaTel reference board */
1145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1146 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1148 "unknown Dell", STAC_9205_DELL_M42),
1149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1150 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1152 "Dell Precision", STAC_9205_DELL_M43),
1153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1154 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1156 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1158 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1160 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1162 "unknown Dell", STAC_9205_DELL_M42),
1163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1164 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1166 "Dell Precision", STAC_9205_DELL_M43),
1167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1168 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1170 "Dell Precision", STAC_9205_DELL_M43),
1171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1172 "Dell Inspiron", STAC_9205_DELL_M44),
1173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1174 "Dell Inspiron", STAC_9205_DELL_M44),
1175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1176 "Dell Inspiron", STAC_9205_DELL_M44),
1177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1178 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1180 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1182 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1183 {} /* terminator */
1184};
1185
11b44bbd
RF		 1186static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1187{
1188 int i;
1189 struct sigmatel_spec *spec = codec->spec;
1190
1191 if (! spec->bios_pin_configs) {
1192 spec->bios_pin_configs = kcalloc(spec->num_pins,
1193 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1194 if (! spec->bios_pin_configs)
1195 return -ENOMEM;
1196 }
1197
1198 for (i = 0; i < spec->num_pins; i++) {
1199 hda_nid_t nid = spec->pin_nids[i];
1200 unsigned int pin_cfg;
1201
1202 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1203 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1204 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1205 nid, pin_cfg);
1206 spec->bios_pin_configs[i] = pin_cfg;
1207 }
1208
1209 return 0;
1210}
1211
87d48363
MR		 1212static void stac92xx_set_config_reg(struct hda_codec *codec,
1213 hda_nid_t pin_nid, unsigned int pin_config)
1214{
1215 int i;
1216 snd_hda_codec_write(codec, pin_nid, 0,
1217 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1218 pin_config & 0x000000ff);
1219 snd_hda_codec_write(codec, pin_nid, 0,
1220 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1221 (pin_config & 0x0000ff00) >> 8);
1222 snd_hda_codec_write(codec, pin_nid, 0,
1223 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1224 (pin_config & 0x00ff0000) >> 16);
1225 snd_hda_codec_write(codec, pin_nid, 0,
1226 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1227 pin_config >> 24);
1228 i = snd_hda_codec_read(codec, pin_nid, 0,
1229 AC_VERB_GET_CONFIG_DEFAULT,
1230 0x00);
1231 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1232 pin_nid, i);
1233}
1234
2f2f4251
M		 1235static void stac92xx_set_config_regs(struct hda_codec *codec)
1236{
1237 int i;
1238 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1239
87d48363
MR		 1240 if (!spec->pin_configs)
1241 return;
11b44bbd 1242
87d48363
MR		 1243 for (i = 0; i < spec->num_pins; i++)
1244 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1245 spec->pin_configs[i]);
2f2f4251 1246}
2f2f4251 1247
8259980e 1248static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1249{
8259980e 1250 struct sigmatel_spec *spec = codec->spec;
87d48363 1251 /* Configure GPIOx as output */
82beb8fd
TI		 1252 snd_hda_codec_write_cache(codec, codec->afg, 0,
1253 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1254 /* Configure GPIOx as CMOS */
82beb8fd 1255 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1256 /* Assert GPIOx */
82beb8fd
TI		 1257 snd_hda_codec_write_cache(codec, codec->afg, 0,
1258 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1259 /* Enable GPIOx */
82beb8fd
TI		 1260 snd_hda_codec_write_cache(codec, codec->afg, 0,
1261 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1262}
1263
dabbed6f 1264/*
c7d4b2fa 1265 * Analog playback callbacks
dabbed6f 1266 */
c7d4b2fa
M		 1267static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1268 struct hda_codec *codec,
c8b6bf9b 1269 struct snd_pcm_substream *substream)
2f2f4251 1270{
dabbed6f 1271 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1272 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1273}
1274
2f2f4251
M		 1275static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1276 struct hda_codec *codec,
1277 unsigned int stream_tag,
1278 unsigned int format,
c8b6bf9b 1279 struct snd_pcm_substream *substream)
2f2f4251
M		 1280{
1281 struct sigmatel_spec *spec = codec->spec;
403d1944 1282 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1283}
1284
1285static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1286 struct hda_codec *codec,
c8b6bf9b 1287 struct snd_pcm_substream *substream)
2f2f4251
M		 1288{
1289 struct sigmatel_spec *spec = codec->spec;
1290 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1291}
1292
dabbed6f
M		 1293/*
1294 * Digital playback callbacks
1295 */
1296static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1297 struct hda_codec *codec,
c8b6bf9b 1298 struct snd_pcm_substream *substream)
dabbed6f
M		 1299{
1300 struct sigmatel_spec *spec = codec->spec;
1301 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1302}
1303
1304static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1305 struct hda_codec *codec,
c8b6bf9b 1306 struct snd_pcm_substream *substream)
dabbed6f
M		 1307{
1308 struct sigmatel_spec *spec = codec->spec;
1309 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1310}
1311
6b97eb45
TI		 1312static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1313 struct hda_codec *codec,
1314 unsigned int stream_tag,
1315 unsigned int format,
1316 struct snd_pcm_substream *substream)
1317{
1318 struct sigmatel_spec *spec = codec->spec;
1319 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1320 stream_tag, format, substream);
1321}
1322
dabbed6f 1323
2f2f4251
M		 1324/*
1325 * Analog capture callbacks
1326 */
1327static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1328 struct hda_codec *codec,
1329 unsigned int stream_tag,
1330 unsigned int format,
c8b6bf9b 1331 struct snd_pcm_substream *substream)
2f2f4251
M		 1332{
1333 struct sigmatel_spec *spec = codec->spec;
1334
1335 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1336 stream_tag, 0, format);
1337 return 0;
1338}
1339
1340static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1341 struct hda_codec *codec,
c8b6bf9b 1342 struct snd_pcm_substream *substream)
2f2f4251
M		 1343{
1344 struct sigmatel_spec *spec = codec->spec;
1345
1346 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1347 return 0;
1348}
1349
dabbed6f
M		 1350static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1351 .substreams = 1,
1352 .channels_min = 2,
1353 .channels_max = 2,
1354 /* NID is set in stac92xx_build_pcms */
1355 .ops = {
1356 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1357 .close = stac92xx_dig_playback_pcm_close,
1358 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1359 },
1360};
1361
1362static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1363 .substreams = 1,
1364 .channels_min = 2,
1365 .channels_max = 2,
1366 /* NID is set in stac92xx_build_pcms */
1367};
1368
2f2f4251
M		 1369static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1370 .substreams = 1,
1371 .channels_min = 2,
c7d4b2fa 1372 .channels_max = 8,
2f2f4251
M		 1373 .nid = 0x02, /* NID to query formats and rates */
1374 .ops = {
1375 .open = stac92xx_playback_pcm_open,
1376 .prepare = stac92xx_playback_pcm_prepare,
1377 .cleanup = stac92xx_playback_pcm_cleanup
1378 },
1379};
1380
3cc08dc6
MP		 1381static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1382 .substreams = 1,
1383 .channels_min = 2,
1384 .channels_max = 2,
1385 .nid = 0x06, /* NID to query formats and rates */
1386 .ops = {
1387 .open = stac92xx_playback_pcm_open,
1388 .prepare = stac92xx_playback_pcm_prepare,
1389 .cleanup = stac92xx_playback_pcm_cleanup
1390 },
1391};
1392
2f2f4251 1393static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1394 .channels_min = 2,
1395 .channels_max = 2,
9e05b7a3 1396 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1397 .ops = {
1398 .prepare = stac92xx_capture_pcm_prepare,
1399 .cleanup = stac92xx_capture_pcm_cleanup
1400 },
1401};
1402
1403static int stac92xx_build_pcms(struct hda_codec *codec)
1404{
1405 struct sigmatel_spec *spec = codec->spec;
1406 struct hda_pcm *info = spec->pcm_rec;
1407
1408 codec->num_pcms = 1;
1409 codec->pcm_info = info;
1410
c7d4b2fa 1411 info->name = "STAC92xx Analog";
2f2f4251 1412 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1413 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1414 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1415 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1416
1417 if (spec->alt_switch) {
1418 codec->num_pcms++;
1419 info++;
1420 info->name = "STAC92xx Analog Alt";
1421 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1422 }
2f2f4251 1423
dabbed6f
M		 1424 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1425 codec->num_pcms++;
1426 info++;
1427 info->name = "STAC92xx Digital";
1428 if (spec->multiout.dig_out_nid) {
1429 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1430 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1431 }
1432 if (spec->dig_in_nid) {
1433 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1434 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1435 }
1436 }
1437
2f2f4251
M		 1438 return 0;
1439}
1440
c960a03b
TI		 1441static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1442{
1443 unsigned int pincap = snd_hda_param_read(codec, nid,
1444 AC_PAR_PIN_CAP);
1445 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1446 if (pincap & AC_PINCAP_VREF_100)
1447 return AC_PINCTL_VREF_100;
1448 if (pincap & AC_PINCAP_VREF_80)
1449 return AC_PINCTL_VREF_80;
1450 if (pincap & AC_PINCAP_VREF_50)
1451 return AC_PINCTL_VREF_50;
1452 if (pincap & AC_PINCAP_VREF_GRD)
1453 return AC_PINCTL_VREF_GRD;
1454 return 0;
1455}
1456
403d1944
MP		 1457static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1458
1459{
82beb8fd
TI		 1460 snd_hda_codec_write_cache(codec, nid, 0,
1461 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1462}
1463
a5ce8890 1464#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1465
1466static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1467{
1468 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1469 struct sigmatel_spec *spec = codec->spec;
1470 int io_idx = kcontrol-> private_value & 0xff;
1471
1472 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1473 return 0;
1474}
1475
1476static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1477{
1478 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1479 struct sigmatel_spec *spec = codec->spec;
1480 hda_nid_t nid = kcontrol->private_value >> 8;
1481 int io_idx = kcontrol-> private_value & 0xff;
1482 unsigned short val = ucontrol->value.integer.value[0];
1483
1484 spec->io_switch[io_idx] = val;
1485
1486 if (val)
1487 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1488 else {
1489 unsigned int pinctl = AC_PINCTL_IN_EN;
1490 if (io_idx) /* set VREF for mic */
1491 pinctl |= stac92xx_get_vref(codec, nid);
1492 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1493 }
403d1944
MP		 1494 return 1;
1495}
1496
0fb87bb4
ML		 1497#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1498
1499static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1500 struct snd_ctl_elem_value *ucontrol)
1501{
1502 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1503 struct sigmatel_spec *spec = codec->spec;
1504
1505 ucontrol->value.integer.value[0] = spec->clfe_swap;
1506 return 0;
1507}
1508
1509static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1510 struct snd_ctl_elem_value *ucontrol)
1511{
1512 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1513 struct sigmatel_spec *spec = codec->spec;
1514 hda_nid_t nid = kcontrol->private_value & 0xff;
1515
1516 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1517 return 0;
1518
1519 spec->clfe_swap = ucontrol->value.integer.value[0];
1520
1521 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1522 spec->clfe_swap ? 0x4 : 0x0);
1523
1524 return 1;
1525}
1526
403d1944
MP		 1527#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1528 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1529 .name = xname, \
1530 .index = 0, \
1531 .info = stac92xx_io_switch_info, \
1532 .get = stac92xx_io_switch_get, \
1533 .put = stac92xx_io_switch_put, \
1534 .private_value = xpval, \
1535 }
1536
0fb87bb4
ML		 1537#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1538 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1539 .name = xname, \
1540 .index = 0, \
1541 .info = stac92xx_clfe_switch_info, \
1542 .get = stac92xx_clfe_switch_get, \
1543 .put = stac92xx_clfe_switch_put, \
1544 .private_value = xpval, \
1545 }
403d1944 1546
c7d4b2fa
M		 1547enum {
1548 STAC_CTL_WIDGET_VOL,
1549 STAC_CTL_WIDGET_MUTE,
403d1944 1550 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1551 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1552};
1553
c8b6bf9b 1554static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1555 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1556 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1557 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1558 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1559};
1560
1561/* add dynamic controls */
1562static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1563{
c8b6bf9b 1564 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1565
1566 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1567 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1568
1569 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1570 if (! knew)
1571 return -ENOMEM;
1572 if (spec->kctl_alloc) {
1573 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1574 kfree(spec->kctl_alloc);
1575 }
1576 spec->kctl_alloc = knew;
1577 spec->num_kctl_alloc = num;
1578 }
1579
1580 knew = &spec->kctl_alloc[spec->num_kctl_used];
1581 *knew = stac92xx_control_templates[type];
82fe0c58 1582 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1583 if (! knew->name)
1584 return -ENOMEM;
1585 knew->private_value = val;
1586 spec->num_kctl_used++;
1587 return 0;
1588}
1589
403d1944
MP		 1590/* flag inputs as additional dynamic lineouts */
1591static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1592{
1593 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1594 unsigned int wcaps, wtype;
1595 int i, num_dacs = 0;
1596
1597 /* use the wcaps cache to count all DACs available for line-outs */
1598 for (i = 0; i < codec->num_nodes; i++) {
1599 wcaps = codec->wcaps[i];
1600 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1601 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1602 num_dacs++;
1603 }
403d1944 1604
7b043899
SL		 1605 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1606
403d1944
MP		 1607 switch (cfg->line_outs) {
1608 case 3:
1609 /* add line-in as side */
7b043899 1610 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1611 cfg->line_out_pins[cfg->line_outs] =
1612 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1613 spec->line_switch = 1;
1614 cfg->line_outs++;
1615 }
1616 break;
1617 case 2:
1618 /* add line-in as clfe and mic as side */
7b043899 1619 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1620 cfg->line_out_pins[cfg->line_outs] =
1621 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1622 spec->line_switch = 1;
1623 cfg->line_outs++;
1624 }
7b043899 1625 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1626 cfg->line_out_pins[cfg->line_outs] =
1627 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1628 spec->mic_switch = 1;
1629 cfg->line_outs++;
1630 }
1631 break;
1632 case 1:
1633 /* add line-in as surr and mic as clfe */
7b043899 1634 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1635 cfg->line_out_pins[cfg->line_outs] =
1636 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1637 spec->line_switch = 1;
1638 cfg->line_outs++;
1639 }
7b043899 1640 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1641 cfg->line_out_pins[cfg->line_outs] =
1642 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1643 spec->mic_switch = 1;
1644 cfg->line_outs++;
1645 }
1646 break;
1647 }
1648
1649 return 0;
1650}
1651
7b043899
SL		 1652
1653static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1654{
1655 int i;
1656
1657 for (i = 0; i < spec->multiout.num_dacs; i++) {
1658 if (spec->multiout.dac_nids[i] == nid)
1659 return 1;
1660 }
1661
1662 return 0;
1663}
1664
3cc08dc6 1665/*
7b043899
SL		 1666 * Fill in the dac_nids table from the parsed pin configuration
1667 * This function only works when every pin in line_out_pins[]
1668 * contains atleast one DAC in its connection list. Some 92xx
1669 * codecs are not connected directly to a DAC, such as the 9200
1670 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1671 */
19039bd0 1672static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1673 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1674{
1675 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1676 int i, j, conn_len = 0;
1677 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1678 unsigned int wcaps, wtype;
1679
c7d4b2fa
M		 1680 for (i = 0; i < cfg->line_outs; i++) {
1681 nid = cfg->line_out_pins[i];
7b043899
SL		 1682 conn_len = snd_hda_get_connections(codec, nid, conn,
1683 HDA_MAX_CONNECTIONS);
1684 for (j = 0; j < conn_len; j++) {
1685 wcaps = snd_hda_param_read(codec, conn[j],
1686 AC_PAR_AUDIO_WIDGET_CAP);
1687 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1688
1689 if (wtype != AC_WID_AUD_OUT ||
1690 (wcaps & AC_WCAP_DIGITAL))
1691 continue;
1692 /* conn[j] is a DAC routed to this line-out */
1693 if (!is_in_dac_nids(spec, conn[j]))
1694 break;
1695 }
1696
1697 if (j == conn_len) {
df802952
TI		 1698 if (spec->multiout.num_dacs > 0) {
1699 /* we have already working output pins,
1700 * so let's drop the broken ones again
1701 */
1702 cfg->line_outs = spec->multiout.num_dacs;
1703 break;
1704 }
7b043899
SL		 1705 /* error out, no available DAC found */
1706 snd_printk(KERN_ERR
1707 "%s: No available DAC for pin 0x%x\n",
1708 __func__, nid);
1709 return -ENODEV;
1710 }
1711
1712 spec->multiout.dac_nids[i] = conn[j];
1713 spec->multiout.num_dacs++;
1714 if (conn_len > 1) {
1715 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1716 snd_hda_codec_write_cache(codec, nid, 0,
1717 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1718
7b043899
SL		 1719 }
1720 }
c7d4b2fa 1721
7b043899
SL		 1722 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1723 spec->multiout.num_dacs,
1724 spec->multiout.dac_nids[0],
1725 spec->multiout.dac_nids[1],
1726 spec->multiout.dac_nids[2],
1727 spec->multiout.dac_nids[3],
1728 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1729 return 0;
1730}
1731
eb06ed8f
TI		 1732/* create volume control/switch for the given prefx type */
1733static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1734{
1735 char name[32];
1736 int err;
1737
1738 sprintf(name, "%s Playback Volume", pfx);
1739 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1740 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1741 if (err < 0)
1742 return err;
1743 sprintf(name, "%s Playback Switch", pfx);
1744 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1745 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1746 if (err < 0)
1747 return err;
1748 return 0;
1749}
1750
c7d4b2fa 1751/* add playback controls from the parsed DAC table */
0fb87bb4 1752static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1753 const struct auto_pin_cfg *cfg)
c7d4b2fa 1754{
19039bd0
TI		 1755 static const char *chname[4] = {
1756 "Front", "Surround", NULL /*CLFE*/, "Side"
1757 };
c7d4b2fa
M		 1758 hda_nid_t nid;
1759 int i, err;
1760
0fb87bb4
ML		 1761 struct sigmatel_spec *spec = codec->spec;
1762 unsigned int wid_caps;
1763
1764
c7d4b2fa 1765 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1766 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1767 continue;
1768
1769 nid = spec->multiout.dac_nids[i];
1770
1771 if (i == 2) {
1772 /* Center/LFE */
eb06ed8f
TI		 1773 err = create_controls(spec, "Center", nid, 1);
1774 if (err < 0)
c7d4b2fa 1775 return err;
eb06ed8f
TI		 1776 err = create_controls(spec, "LFE", nid, 2);
1777 if (err < 0)
c7d4b2fa 1778 return err;
0fb87bb4
ML		 1779
1780 wid_caps = get_wcaps(codec, nid);
1781
1782 if (wid_caps & AC_WCAP_LR_SWAP) {
1783 err = stac92xx_add_control(spec,
1784 STAC_CTL_WIDGET_CLFE_SWITCH,
1785 "Swap Center/LFE Playback Switch", nid);
1786
1787 if (err < 0)
1788 return err;
1789 }
1790
c7d4b2fa 1791 } else {
eb06ed8f
TI		 1792 err = create_controls(spec, chname[i], nid, 3);
1793 if (err < 0)
c7d4b2fa
M		 1794 return err;
1795 }
1796 }
1797
403d1944
MP		 1798 if (spec->line_switch)
1799 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1800 return err;
1801
1802 if (spec->mic_switch)
1803 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1804 return err;
1805
c7d4b2fa
M		 1806 return 0;
1807}
1808
eb06ed8f 1809static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1810{
7b043899
SL		 1811 if (is_in_dac_nids(spec, nid))
1812 return 1;
eb06ed8f
TI		 1813 if (spec->multiout.hp_nid == nid)
1814 return 1;
1815 return 0;
1816}
c7d4b2fa 1817
eb06ed8f
TI		 1818static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1819{
1820 if (!spec->multiout.hp_nid)
1821 spec->multiout.hp_nid = nid;
1822 else if (spec->multiout.num_dacs > 4) {
1823 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1824 return 1;
1825 } else {
1826 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1827 spec->multiout.num_dacs++;
1828 }
1829 return 0;
1830}
4e55096e 1831
eb06ed8f
TI		 1832/* add playback controls for Speaker and HP outputs */
1833static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1834 struct auto_pin_cfg *cfg)
1835{
1836 struct sigmatel_spec *spec = codec->spec;
1837 hda_nid_t nid;
1838 int i, old_num_dacs, err;
1839
1840 old_num_dacs = spec->multiout.num_dacs;
1841 for (i = 0; i < cfg->hp_outs; i++) {
1842 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1843 if (wid_caps & AC_WCAP_UNSOL_CAP)
1844 spec->hp_detect = 1;
1845 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1846 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1847 if (check_in_dac_nids(spec, nid))
1848 nid = 0;
1849 if (! nid)
c7d4b2fa 1850 continue;
eb06ed8f
TI		 1851 add_spec_dacs(spec, nid);
1852 }
1853 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1854 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1855 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1856 if (check_in_dac_nids(spec, nid))
1857 nid = 0;
eb06ed8f
TI		 1858 if (! nid)
1859 continue;
1860 add_spec_dacs(spec, nid);
c7d4b2fa 1861 }
1b290a51
MR		 1862 for (i = 0; i < cfg->line_outs; i++) {
1863 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1864 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1865 if (check_in_dac_nids(spec, nid))
1866 nid = 0;
1867 if (! nid)
1868 continue;
1869 add_spec_dacs(spec, nid);
1870 }
eb06ed8f
TI		 1871 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1872 static const char *pfxs[] = {
1873 "Speaker", "External Speaker", "Speaker2",
1874 };
1875 err = create_controls(spec, pfxs[i - old_num_dacs],
1876 spec->multiout.dac_nids[i], 3);
1877 if (err < 0)
1878 return err;
1879 }
1880 if (spec->multiout.hp_nid) {
1881 const char *pfx;
6020c008 1882 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 1883 pfx = "Master";
1884 else
1885 pfx = "Headphone";
1886 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1887 if (err < 0)
1888 return err;
1889 }
c7d4b2fa
M		 1890
1891 return 0;
1892}
1893
8b65727b 1894/* labels for dmic mux inputs */
ddc2cec4 1895static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1896 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1897 "Digital Mic 3", "Digital Mic 4"
1898};
1899
1900/* create playback/capture controls for input pins on dmic capable codecs */
1901static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1902 const struct auto_pin_cfg *cfg)
1903{
1904 struct sigmatel_spec *spec = codec->spec;
1905 struct hda_input_mux *dimux = &spec->private_dimux;
1906 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1907 int i, j;
1908
1909 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1910 dimux->items[dimux->num_items].index = 0;
1911 dimux->num_items++;
1912
1913 for (i = 0; i < spec->num_dmics; i++) {
1914 int index;
1915 int num_cons;
1916 unsigned int def_conf;
1917
1918 def_conf = snd_hda_codec_read(codec,
1919 spec->dmic_nids[i],
1920 0,
1921 AC_VERB_GET_CONFIG_DEFAULT,
1922 0);
1923 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1924 continue;
1925
1926 num_cons = snd_hda_get_connections(codec,
1927 spec->dmux_nid,
1928 con_lst,
1929 HDA_MAX_NUM_INPUTS);
1930 for (j = 0; j < num_cons; j++)
1931 if (con_lst[j] == spec->dmic_nids[i]) {
1932 index = j;
1933 goto found;
1934 }
1935 continue;
1936found:
1937 dimux->items[dimux->num_items].label =
1938 stac92xx_dmic_labels[dimux->num_items];
1939 dimux->items[dimux->num_items].index = index;
1940 dimux->num_items++;
1941 }
1942
1943 return 0;
1944}
1945
c7d4b2fa
M		 1946/* create playback/capture controls for input pins */
1947static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1948{
1949 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1950 struct hda_input_mux *imux = &spec->private_imux;
1951 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1952 int i, j, k;
1953
1954 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1955 int index;
1956
1957 if (!cfg->input_pins[i])
1958 continue;
1959 index = -1;
1960 for (j = 0; j < spec->num_muxes; j++) {
1961 int num_cons;
1962 num_cons = snd_hda_get_connections(codec,
1963 spec->mux_nids[j],
1964 con_lst,
1965 HDA_MAX_NUM_INPUTS);
1966 for (k = 0; k < num_cons; k++)
1967 if (con_lst[k] == cfg->input_pins[i]) {
1968 index = k;
1969 goto found;
1970 }
c7d4b2fa 1971 }
314634bc
TI		 1972 continue;
1973 found:
1974 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1975 imux->items[imux->num_items].index = index;
1976 imux->num_items++;
c7d4b2fa
M		 1977 }
1978
7b043899 1979 if (imux->num_items) {
62fe78e9
SR		 1980 /*
1981 * Set the current input for the muxes.
1982 * The STAC9221 has two input muxes with identical source
1983 * NID lists. Hopefully this won't get confused.
1984 */
1985 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 1986 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1987 AC_VERB_SET_CONNECT_SEL,
1988 imux->items[0].index);
62fe78e9
SR		 1989 }
1990 }
1991
c7d4b2fa
M		 1992 return 0;
1993}
1994
c7d4b2fa
M		 1995static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1996{
1997 struct sigmatel_spec *spec = codec->spec;
1998 int i;
1999
2000 for (i = 0; i < spec->autocfg.line_outs; i++) {
2001 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2002 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2003 }
2004}
2005
2006static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2007{
2008 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2009 int i;
c7d4b2fa 2010
eb06ed8f
TI		 2011 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2012 hda_nid_t pin;
2013 pin = spec->autocfg.hp_pins[i];
2014 if (pin) /* connect to front */
2015 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2016 }
2017 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2018 hda_nid_t pin;
2019 pin = spec->autocfg.speaker_pins[i];
2020 if (pin) /* connect to front */
2021 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2022 }
c7d4b2fa
M		 2023}
2024
3cc08dc6 2025static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2026{
2027 struct sigmatel_spec *spec = codec->spec;
2028 int err;
2029
8b65727b
MP		 2030 if ((err = snd_hda_parse_pin_def_config(codec,
2031 &spec->autocfg,
2032 spec->dmic_nids)) < 0)
c7d4b2fa 2033 return err;
82bc955f 2034 if (! spec->autocfg.line_outs)
869264c4 2035 return 0; /* can't find valid pin config */
19039bd0 2036
403d1944
MP		 2037 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2038 return err;
19039bd0
TI		 2039 if (spec->multiout.num_dacs == 0)
2040 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2041 return err;
c7d4b2fa 2042
0fb87bb4
ML		 2043 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2044
2045 if (err < 0)
2046 return err;
2047
2048 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2049
2050 if (err < 0)
2051 return err;
2052
2053 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2054
2055 if (err < 0)
c7d4b2fa
M		 2056 return err;
2057
8b65727b
MP		 2058 if (spec->num_dmics > 0)
2059 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2060 &spec->autocfg)) < 0)
2061 return err;
2062
c7d4b2fa 2063 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2064 if (spec->multiout.max_channels > 2)
c7d4b2fa 2065 spec->surr_switch = 1;
c7d4b2fa 2066
82bc955f 2067 if (spec->autocfg.dig_out_pin)
3cc08dc6 2068 spec->multiout.dig_out_nid = dig_out;
82bc955f 2069 if (spec->autocfg.dig_in_pin)
3cc08dc6 2070 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2071
2072 if (spec->kctl_alloc)
2073 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2074
2075 spec->input_mux = &spec->private_imux;
8b65727b 2076 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2077
2078 return 1;
2079}
2080
82bc955f
TI		 2081/* add playback controls for HP output */
2082static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2083 struct auto_pin_cfg *cfg)
2084{
2085 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2086 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2087 unsigned int wid_caps;
2088
2089 if (! pin)
2090 return 0;
2091
2092 wid_caps = get_wcaps(codec, pin);
505cb341 2093 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2094 spec->hp_detect = 1;
82bc955f
TI		 2095
2096 return 0;
2097}
2098
160ea0dc
RF		 2099/* add playback controls for LFE output */
2100static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2101 struct auto_pin_cfg *cfg)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
2104 int err;
2105 hda_nid_t lfe_pin = 0x0;
2106 int i;
2107
2108 /*
2109 * search speaker outs and line outs for a mono speaker pin
2110 * with an amp. If one is found, add LFE controls
2111 * for it.
2112 */
2113 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2114 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2115 unsigned long wcaps = get_wcaps(codec, pin);
2116 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2117 if (wcaps == AC_WCAP_OUT_AMP)
2118 /* found a mono speaker with an amp, must be lfe */
2119 lfe_pin = pin;
2120 }
2121
2122 /* if speaker_outs is 0, then speakers may be in line_outs */
2123 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2124 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2125 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2126 unsigned long cfg;
2127 cfg = snd_hda_codec_read(codec, pin, 0,
2128 AC_VERB_GET_CONFIG_DEFAULT,
2129 0x00);
2130 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2131 unsigned long wcaps = get_wcaps(codec, pin);
2132 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2133 if (wcaps == AC_WCAP_OUT_AMP)
2134 /* found a mono speaker with an amp,
2135 must be lfe */
2136 lfe_pin = pin;
2137 }
2138 }
2139 }
2140
2141 if (lfe_pin) {
eb06ed8f 2142 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2143 if (err < 0)
2144 return err;
2145 }
2146
2147 return 0;
2148}
2149
c7d4b2fa
M		 2150static int stac9200_parse_auto_config(struct hda_codec *codec)
2151{
2152 struct sigmatel_spec *spec = codec->spec;
2153 int err;
2154
df694daa 2155 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2156 return err;
2157
2158 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2159 return err;
2160
82bc955f
TI		 2161 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2162 return err;
2163
160ea0dc
RF		 2164 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2165 return err;
2166
82bc955f 2167 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2168 spec->multiout.dig_out_nid = 0x05;
82bc955f 2169 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2170 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2171
2172 if (spec->kctl_alloc)
2173 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2174
2175 spec->input_mux = &spec->private_imux;
8b65727b 2176 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2177
2178 return 1;
2179}
2180
62fe78e9
SR		 2181/*
2182 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2183 * funky external mute control using GPIO pins.
2184 */
2185
2186static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2187{
2188 unsigned int gpiostate, gpiomask, gpiodir;
2189
2190 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2191 AC_VERB_GET_GPIO_DATA, 0);
2192
2193 if (!muted)
2194 gpiostate |= (1 << pin);
2195 else
2196 gpiostate &= ~(1 << pin);
2197
2198 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2199 AC_VERB_GET_GPIO_MASK, 0);
2200 gpiomask |= (1 << pin);
2201
2202 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2203 AC_VERB_GET_GPIO_DIRECTION, 0);
2204 gpiodir |= (1 << pin);
2205
2206 /* AppleHDA seems to do this -- WTF is this verb?? */
2207 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2208
2209 snd_hda_codec_write(codec, codec->afg, 0,
2210 AC_VERB_SET_GPIO_MASK, gpiomask);
2211 snd_hda_codec_write(codec, codec->afg, 0,
2212 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2213
2214 msleep(1);
2215
2216 snd_hda_codec_write(codec, codec->afg, 0,
2217 AC_VERB_SET_GPIO_DATA, gpiostate);
2218}
2219
314634bc
TI		 2220static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2221 unsigned int event)
2222{
2223 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2224 snd_hda_codec_write_cache(codec, nid, 0,
2225 AC_VERB_SET_UNSOLICITED_ENABLE,
2226 (AC_USRSP_EN | event));
314634bc
TI		 2227}
2228
c7d4b2fa
M		 2229static int stac92xx_init(struct hda_codec *codec)
2230{
2231 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2232 struct auto_pin_cfg *cfg = &spec->autocfg;
2233 int i;
c7d4b2fa 2234
c7d4b2fa
M		 2235 snd_hda_sequence_write(codec, spec->init);
2236
82bc955f
TI		 2237 /* set up pins */
2238 if (spec->hp_detect) {
505cb341 2239 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2240 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2241 enable_pin_detect(codec, cfg->hp_pins[i],
2242 STAC_HP_EVENT);
0a07acaf
TI		 2243 /* force to enable the first line-out; the others are set up
2244 * in unsol_event
2245 */
2246 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2247 AC_PINCTL_OUT_EN);
eb995a8c 2248 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2249 /* fake event to set up pins */
2250 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2251 } else {
2252 stac92xx_auto_init_multi_out(codec);
2253 stac92xx_auto_init_hp_out(codec);
2254 }
2255 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2256 hda_nid_t nid = cfg->input_pins[i];
2257 if (nid) {
2258 unsigned int pinctl = AC_PINCTL_IN_EN;
2259 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2260 pinctl |= stac92xx_get_vref(codec, nid);
2261 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2262 }
82bc955f 2263 }
8b65727b
MP		 2264 if (spec->num_dmics > 0)
2265 for (i = 0; i < spec->num_dmics; i++)
2266 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2267 AC_PINCTL_IN_EN);
2268
82bc955f
TI		 2269 if (cfg->dig_out_pin)
2270 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2271 AC_PINCTL_OUT_EN);
2272 if (cfg->dig_in_pin)
2273 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2274 AC_PINCTL_IN_EN);
2275
62fe78e9
SR		 2276 if (spec->gpio_mute) {
2277 stac922x_gpio_mute(codec, 0, 0);
2278 stac922x_gpio_mute(codec, 1, 0);
2279 }
2280
c7d4b2fa
M		 2281 return 0;
2282}
2283
2f2f4251
M		 2284static void stac92xx_free(struct hda_codec *codec)
2285{
c7d4b2fa
M		 2286 struct sigmatel_spec *spec = codec->spec;
2287 int i;
2288
2289 if (! spec)
2290 return;
2291
2292 if (spec->kctl_alloc) {
2293 for (i = 0; i < spec->num_kctl_used; i++)
2294 kfree(spec->kctl_alloc[i].name);
2295 kfree(spec->kctl_alloc);
2296 }
2297
11b44bbd
RF		 2298 if (spec->bios_pin_configs)
2299 kfree(spec->bios_pin_configs);
2300
c7d4b2fa 2301 kfree(spec);
2f2f4251
M		 2302}
2303
4e55096e
M		 2304static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2305 unsigned int flag)
2306{
2307 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2308 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2309
f9acba43
TI		 2310 if (pin_ctl & AC_PINCTL_IN_EN) {
2311 /*
2312 * we need to check the current set-up direction of
2313 * shared input pins since they can be switched via
2314 * "xxx as Output" mixer switch
2315 */
2316 struct sigmatel_spec *spec = codec->spec;
2317 struct auto_pin_cfg *cfg = &spec->autocfg;
2318 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2319 spec->line_switch) ||
2320 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2321 spec->mic_switch))
2322 return;
2323 }
2324
7b043899
SL		 2325 /* if setting pin direction bits, clear the current
2326 direction bits first */
2327 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2328 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2329
82beb8fd 2330 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2331 AC_VERB_SET_PIN_WIDGET_CONTROL,
2332 pin_ctl | flag);
2333}
2334
2335static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2336 unsigned int flag)
2337{
2338 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2339 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2340 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2341 AC_VERB_SET_PIN_WIDGET_CONTROL,
2342 pin_ctl & ~flag);
2343}
2344
314634bc
TI		 2345static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2346{
2347 if (!nid)
2348 return 0;
2349 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2350 & (1 << 31))
2351 return 1;
2352 return 0;
2353}
2354
2355static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2356{
2357 struct sigmatel_spec *spec = codec->spec;
2358 struct auto_pin_cfg *cfg = &spec->autocfg;
2359 int i, presence;
2360
eb06ed8f
TI		 2361 presence = 0;
2362 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2363 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2364 if (presence)
2365 break;
eb06ed8f 2366 }
4e55096e
M		 2367
2368 if (presence) {
2369 /* disable lineouts, enable hp */
2370 for (i = 0; i < cfg->line_outs; i++)
2371 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2372 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2373 for (i = 0; i < cfg->speaker_outs; i++)
2374 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2375 AC_PINCTL_OUT_EN);
4e55096e
M		 2376 } else {
2377 /* enable lineouts, disable hp */
2378 for (i = 0; i < cfg->line_outs; i++)
2379 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2380 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2381 for (i = 0; i < cfg->speaker_outs; i++)
2382 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2383 AC_PINCTL_OUT_EN);
4e55096e
M		 2384 }
2385}
2386
314634bc
TI		 2387static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2388{
2389 switch (res >> 26) {
2390 case STAC_HP_EVENT:
2391 stac92xx_hp_detect(codec, res);
2392 break;
2393 }
2394}
2395
cb53c626 2396#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2397static int stac92xx_resume(struct hda_codec *codec)
2398{
dc81bed1
TI		 2399 struct sigmatel_spec *spec = codec->spec;
2400
11b44bbd 2401 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2402 snd_hda_sequence_write(codec, spec->init);
2403 if (spec->gpio_mute) {
2404 stac922x_gpio_mute(codec, 0, 0);
2405 stac922x_gpio_mute(codec, 1, 0);
2406 }
82beb8fd
TI		 2407 snd_hda_codec_resume_amp(codec);
2408 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2409 /* invoke unsolicited event to reset the HP state */
2410 if (spec->hp_detect)
2411 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2412 return 0;
2413}
2414#endif
2415
2f2f4251
M		 2416static struct hda_codec_ops stac92xx_patch_ops = {
2417 .build_controls = stac92xx_build_controls,
2418 .build_pcms = stac92xx_build_pcms,
2419 .init = stac92xx_init,
2420 .free = stac92xx_free,
4e55096e 2421 .unsol_event = stac92xx_unsol_event,
cb53c626 2422#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2423 .resume = stac92xx_resume,
2424#endif
2f2f4251
M		 2425};
2426
2427static int patch_stac9200(struct hda_codec *codec)
2428{
2429 struct sigmatel_spec *spec;
c7d4b2fa 2430 int err;
2f2f4251 2431
e560d8d8 2432 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2433 if (spec == NULL)
2434 return -ENOMEM;
2435
2436 codec->spec = spec;
a4eed138 2437 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2438 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2439 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2440 stac9200_models,
2441 stac9200_cfg_tbl);
11b44bbd
RF		 2442 if (spec->board_config < 0) {
2443 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2444 err = stac92xx_save_bios_config_regs(codec);
2445 if (err < 0) {
2446 stac92xx_free(codec);
2447 return err;
2448 }
2449 spec->pin_configs = spec->bios_pin_configs;
2450 } else {
403d1944
MP		 2451 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2452 stac92xx_set_config_regs(codec);
2453 }
2f2f4251
M		 2454
2455 spec->multiout.max_channels = 2;
2456 spec->multiout.num_dacs = 1;
2457 spec->multiout.dac_nids = stac9200_dac_nids;
2458 spec->adc_nids = stac9200_adc_nids;
2459 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2460 spec->num_muxes = 1;
8b65727b 2461 spec->num_dmics = 0;
9e05b7a3 2462 spec->num_adcs = 1;
c7d4b2fa 2463
1194b5b7
TI		 2464 if (spec->board_config == STAC_9200_GATEWAY)
2465 spec->init = stac9200_eapd_init;
2466 else
2467 spec->init = stac9200_core_init;
2f2f4251 2468 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2469
2470 err = stac9200_parse_auto_config(codec);
2471 if (err < 0) {
2472 stac92xx_free(codec);
2473 return err;
2474 }
2f2f4251
M		 2475
2476 codec->patch_ops = stac92xx_patch_ops;
2477
2478 return 0;
2479}
2480
8e21c34c
TD		 2481static int patch_stac925x(struct hda_codec *codec)
2482{
2483 struct sigmatel_spec *spec;
2484 int err;
2485
2486 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2487 if (spec == NULL)
2488 return -ENOMEM;
2489
2490 codec->spec = spec;
a4eed138 2491 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2492 spec->pin_nids = stac925x_pin_nids;
2493 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2494 stac925x_models,
2495 stac925x_cfg_tbl);
9e507abd 2496 again:
8e21c34c 2497 if (spec->board_config < 0) {
2c11f955
TD		 2498 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2499 "using BIOS defaults\n");
8e21c34c
TD		 2500 err = stac92xx_save_bios_config_regs(codec);
2501 if (err < 0) {
2502 stac92xx_free(codec);
2503 return err;
2504 }
2505 spec->pin_configs = spec->bios_pin_configs;
2506 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2507 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2508 stac92xx_set_config_regs(codec);
2509 }
2510
2511 spec->multiout.max_channels = 2;
2512 spec->multiout.num_dacs = 1;
2513 spec->multiout.dac_nids = stac925x_dac_nids;
2514 spec->adc_nids = stac925x_adc_nids;
2515 spec->mux_nids = stac925x_mux_nids;
2516 spec->num_muxes = 1;
9e05b7a3 2517 spec->num_adcs = 1;
2c11f955
TD		 2518 switch (codec->vendor_id) {
2519 case 0x83847632: /* STAC9202 */
2520 case 0x83847633: /* STAC9202D */
2521 case 0x83847636: /* STAC9251 */
2522 case 0x83847637: /* STAC9251D */
f6e9852a 2523 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955
TD		 2524 spec->dmic_nids = stac925x_dmic_nids;
2525 break;
2526 default:
2527 spec->num_dmics = 0;
2528 break;
2529 }
8e21c34c
TD		 2530
2531 spec->init = stac925x_core_init;
2532 spec->mixer = stac925x_mixer;
2533
2534 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2535 if (!err) {
2536 if (spec->board_config < 0) {
2537 printk(KERN_WARNING "hda_codec: No auto-config is "
2538 "available, default to model=ref\n");
2539 spec->board_config = STAC_925x_REF;
2540 goto again;
2541 }
2542 err = -EINVAL;
2543 }
8e21c34c
TD		 2544 if (err < 0) {
2545 stac92xx_free(codec);
2546 return err;
2547 }
2548
2549 codec->patch_ops = stac92xx_patch_ops;
2550
2551 return 0;
2552}
2553
2f2f4251
M		 2554static int patch_stac922x(struct hda_codec *codec)
2555{
2556 struct sigmatel_spec *spec;
c7d4b2fa 2557 int err;
2f2f4251 2558
e560d8d8 2559 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2560 if (spec == NULL)
2561 return -ENOMEM;
2562
2563 codec->spec = spec;
a4eed138 2564 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2565 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2566 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2567 stac922x_models,
2568 stac922x_cfg_tbl);
5d5d3bc3 2569 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2570 spec->gpio_mute = 1;
2571 /* Intel Macs have all same PCI SSID, so we need to check
2572 * codec SSID to distinguish the exact models
2573 */
6f0778d8 2574 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2575 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2576
2577 case 0x106b0800:
2578 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2579 break;
5d5d3bc3
IZ		 2580 case 0x106b0600:
2581 case 0x106b0700:
2582 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2583 break;
5d5d3bc3
IZ		 2584 case 0x106b0e00:
2585 case 0x106b0f00:
2586 case 0x106b1600:
2587 case 0x106b1700:
2588 case 0x106b0200:
2589 case 0x106b1e00:
2590 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2591 break;
5d5d3bc3
IZ		 2592 case 0x106b1a00:
2593 case 0x00000100:
2594 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2595 break;
5d5d3bc3
IZ		 2596 case 0x106b0a00:
2597 case 0x106b2200:
2598 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2599 break;
3fc24d85
TI		 2600 }
2601 }
2602
9e507abd 2603 again:
11b44bbd
RF		 2604 if (spec->board_config < 0) {
2605 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2606 "using BIOS defaults\n");
2607 err = stac92xx_save_bios_config_regs(codec);
2608 if (err < 0) {
2609 stac92xx_free(codec);
2610 return err;
2611 }
2612 spec->pin_configs = spec->bios_pin_configs;
2613 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2614 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2615 stac92xx_set_config_regs(codec);
2616 }
2f2f4251 2617
c7d4b2fa
M		 2618 spec->adc_nids = stac922x_adc_nids;
2619 spec->mux_nids = stac922x_mux_nids;
2549413e 2620 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 2621 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 2622 spec->num_dmics = 0;
c7d4b2fa
M		 2623
2624 spec->init = stac922x_core_init;
2f2f4251 2625 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2626
2627 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2628
3cc08dc6 2629 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2630 if (!err) {
2631 if (spec->board_config < 0) {
2632 printk(KERN_WARNING "hda_codec: No auto-config is "
2633 "available, default to model=ref\n");
2634 spec->board_config = STAC_D945_REF;
2635 goto again;
2636 }
2637 err = -EINVAL;
2638 }
3cc08dc6
MP		 2639 if (err < 0) {
2640 stac92xx_free(codec);
2641 return err;
2642 }
2643
2644 codec->patch_ops = stac92xx_patch_ops;
2645
807a4636
TI		 2646 /* Fix Mux capture level; max to 2 */
2647 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2648 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2649 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2650 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2651 (0 << AC_AMPCAP_MUTE_SHIFT));
2652
3cc08dc6
MP		 2653 return 0;
2654}
2655
2656static int patch_stac927x(struct hda_codec *codec)
2657{
2658 struct sigmatel_spec *spec;
2659 int err;
2660
2661 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2662 if (spec == NULL)
2663 return -ENOMEM;
2664
2665 codec->spec = spec;
a4eed138 2666 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2667 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2668 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2669 stac927x_models,
2670 stac927x_cfg_tbl);
9e507abd 2671 again:
11b44bbd 2672 if (spec->board_config < 0) {
3cc08dc6 2673 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2674 err = stac92xx_save_bios_config_regs(codec);
2675 if (err < 0) {
2676 stac92xx_free(codec);
2677 return err;
2678 }
2679 spec->pin_configs = spec->bios_pin_configs;
2680 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2681 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2682 stac92xx_set_config_regs(codec);
2683 }
2684
81d3dbde 2685 switch (spec->board_config) {
93ed1503 2686 case STAC_D965_3ST:
81d3dbde
TD		 2687 spec->adc_nids = stac927x_adc_nids;
2688 spec->mux_nids = stac927x_mux_nids;
2549413e 2689 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2690 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2691 spec->num_dmics = 0;
93ed1503 2692 spec->init = d965_core_init;
9e05b7a3 2693 spec->mixer = stac927x_mixer;
81d3dbde 2694 break;
93ed1503
TD		 2695 case STAC_D965_5ST:
2696 spec->adc_nids = stac927x_adc_nids;
2697 spec->mux_nids = stac927x_mux_nids;
2549413e 2698 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2699 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2700 spec->num_dmics = 0;
93ed1503 2701 spec->init = d965_core_init;
9e05b7a3 2702 spec->mixer = stac927x_mixer;
81d3dbde
TD		 2703 break;
2704 default:
2705 spec->adc_nids = stac927x_adc_nids;
2706 spec->mux_nids = stac927x_mux_nids;
2549413e 2707 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2708 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2709 spec->num_dmics = 0;
81d3dbde
TD		 2710 spec->init = stac927x_core_init;
2711 spec->mixer = stac927x_mixer;
2712 }
3cc08dc6
MP		 2713
2714 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2715 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2716 spec->gpio_mask = spec->gpio_data = 0x00000001;
2717 stac92xx_enable_gpio_mask(codec);
92a22beb 2718
3cc08dc6 2719 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2720 if (!err) {
2721 if (spec->board_config < 0) {
2722 printk(KERN_WARNING "hda_codec: No auto-config is "
2723 "available, default to model=ref\n");
2724 spec->board_config = STAC_D965_REF;
2725 goto again;
2726 }
2727 err = -EINVAL;
2728 }
c7d4b2fa
M		 2729 if (err < 0) {
2730 stac92xx_free(codec);
2731 return err;
2732 }
2f2f4251
M		 2733
2734 codec->patch_ops = stac92xx_patch_ops;
2735
2736 return 0;
2737}
2738
f3302a59
MP		 2739static int patch_stac9205(struct hda_codec *codec)
2740{
2741 struct sigmatel_spec *spec;
8259980e 2742 int err;
f3302a59
MP		 2743
2744 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2745 if (spec == NULL)
2746 return -ENOMEM;
2747
2748 codec->spec = spec;
a4eed138 2749 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2750 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2751 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2752 stac9205_models,
2753 stac9205_cfg_tbl);
9e507abd 2754 again:
11b44bbd
RF		 2755 if (spec->board_config < 0) {
2756 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2757 err = stac92xx_save_bios_config_regs(codec);
2758 if (err < 0) {
2759 stac92xx_free(codec);
2760 return err;
2761 }
2762 spec->pin_configs = spec->bios_pin_configs;
2763 } else {
f3302a59
MP		 2764 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2765 stac92xx_set_config_regs(codec);
2766 }
2767
2768 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 2769 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 2770 spec->mux_nids = stac9205_mux_nids;
2549413e 2771 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2772 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 2773 spec->num_dmics = STAC9205_NUM_DMICS;
8b65727b 2774 spec->dmux_nid = 0x1d;
f3302a59
MP		 2775
2776 spec->init = stac9205_core_init;
2777 spec->mixer = stac9205_mixer;
2778
2779 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2780
ae0a8ed8 2781 switch (spec->board_config){
ae0a8ed8 2782 case STAC_9205_DELL_M43:
87d48363
MR		 2783 /* Enable SPDIF in/out */
2784 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2785 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2786
8259980e 2787 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2788 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2789 * GPIO2 High = Headphone Mute
2790 */
8259980e 2791 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2792 break;
2793 default:
2794 /* GPIO0 High = EAPD */
2795 spec->gpio_mask = spec->gpio_data = 0x00000001;
2796 break;
2797 }
33382403 2798
8259980e 2799 stac92xx_enable_gpio_mask(codec);
f3302a59 2800 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2801 if (!err) {
2802 if (spec->board_config < 0) {
2803 printk(KERN_WARNING "hda_codec: No auto-config is "
2804 "available, default to model=ref\n");
2805 spec->board_config = STAC_9205_REF;
2806 goto again;
2807 }
2808 err = -EINVAL;
2809 }
f3302a59
MP		 2810 if (err < 0) {
2811 stac92xx_free(codec);
2812 return err;
2813 }
2814
2815 codec->patch_ops = stac92xx_patch_ops;
2816
2817 return 0;
2818}
2819
db064e50 2820/*
6d859065 2821 * STAC9872 hack
db064e50
TI		 2822 */
2823
99ccc560 2824/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2825static hda_nid_t vaio_dacs[] = { 0x2 };
2826#define VAIO_HP_DAC 0x5
2827static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2828static hda_nid_t vaio_mux_nids[] = { 0x15 };
2829
2830static struct hda_input_mux vaio_mux = {
a3a2f429 2831 .num_items = 3,
db064e50 2832 .items = {
d773781c 2833 /* { "HP", 0x0 }, */
1624cb9a
TI		 2834 { "Mic Jack", 0x1 },
2835 { "Internal Mic", 0x2 },
db064e50
TI		 2836 { "PCM", 0x3 },
2837 }
2838};
2839
2840static struct hda_verb vaio_init[] = {
2841 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2842 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2843 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2844 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2845 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2846 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2847 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2848 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2849 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2850 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2851 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2852 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2853 {}
2854};
2855
6d859065
GM		 2856static struct hda_verb vaio_ar_init[] = {
2857 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2858 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2859 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2860 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2861/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2862 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2863 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2864 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2865 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2866/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2867 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2868 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2869 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2870 {}
2871};
2872
db064e50 2873/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2874static struct hda_bind_ctls vaio_bind_master_vol = {
2875 .ops = &snd_hda_bind_vol,
2876 .values = {
2877 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2878 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2879 0
2880 },
2881};
db064e50
TI		 2882
2883/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2884static struct hda_bind_ctls vaio_bind_master_sw = {
2885 .ops = &snd_hda_bind_sw,
2886 .values = {
2887 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2888 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2889 0,
2890 },
2891};
db064e50
TI		 2892
2893static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2894 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2895 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2896 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2897 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2898 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2899 {
2900 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2901 .name = "Capture Source",
2902 .count = 1,
2903 .info = stac92xx_mux_enum_info,
2904 .get = stac92xx_mux_enum_get,
2905 .put = stac92xx_mux_enum_put,
2906 },
2907 {}
2908};
2909
6d859065 2910static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2911 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2912 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2913 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2914 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2915 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2916 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2917 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2918 {
2919 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2920 .name = "Capture Source",
2921 .count = 1,
2922 .info = stac92xx_mux_enum_info,
2923 .get = stac92xx_mux_enum_get,
2924 .put = stac92xx_mux_enum_put,
2925 },
2926 {}
2927};
2928
2929static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2930 .build_controls = stac92xx_build_controls,
2931 .build_pcms = stac92xx_build_pcms,
2932 .init = stac92xx_init,
2933 .free = stac92xx_free,
cb53c626 2934#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2935 .resume = stac92xx_resume,
2936#endif
2937};
2938
72e7b0dd
TI		 2939static int stac9872_vaio_init(struct hda_codec *codec)
2940{
2941 int err;
2942
2943 err = stac92xx_init(codec);
2944 if (err < 0)
2945 return err;
2946 if (codec->patch_ops.unsol_event)
2947 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2948 return 0;
2949}
2950
2951static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
2952{
2953 if (get_pin_presence(codec, 0x0a)) {
2954 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2955 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2956 } else {
2957 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2958 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2959 }
2960}
2961
2962static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
2963{
2964 switch (res >> 26) {
2965 case STAC_HP_EVENT:
2966 stac9872_vaio_hp_detect(codec, res);
2967 break;
2968 }
2969}
2970
2971static struct hda_codec_ops stac9872_vaio_patch_ops = {
2972 .build_controls = stac92xx_build_controls,
2973 .build_pcms = stac92xx_build_pcms,
2974 .init = stac9872_vaio_init,
2975 .free = stac92xx_free,
2976 .unsol_event = stac9872_vaio_unsol_event,
2977#ifdef CONFIG_PM
2978 .resume = stac92xx_resume,
2979#endif
2980};
2981
6d859065
GM		 2982enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2983 CXD9872RD_VAIO,
2984 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2985 STAC9872AK_VAIO,
2986 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2987 STAC9872K_VAIO,
2988 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2989 CXD9872AKD_VAIO,
2990 STAC_9872_MODELS,
2991};
2992
2993static const char *stac9872_models[STAC_9872_MODELS] = {
2994 [CXD9872RD_VAIO] = "vaio",
2995 [CXD9872AKD_VAIO] = "vaio-ar",
2996};
2997
2998static struct snd_pci_quirk stac9872_cfg_tbl[] = {
2999 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3000 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3001 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3002 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3003 {}
3004};
3005
6d859065 3006static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3007{
3008 struct sigmatel_spec *spec;
3009 int board_config;
3010
f5fcc13c
TI		 3011 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3012 stac9872_models,
3013 stac9872_cfg_tbl);
db064e50
TI		 3014 if (board_config < 0)
3015 /* unknown config, let generic-parser do its job... */
3016 return snd_hda_parse_generic_codec(codec);
3017
3018 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3019 if (spec == NULL)
3020 return -ENOMEM;
3021
3022 codec->spec = spec;
3023 switch (board_config) {
6d859065
GM		 3024 case CXD9872RD_VAIO:
3025 case STAC9872AK_VAIO:
3026 case STAC9872K_VAIO:
db064e50
TI		 3027 spec->mixer = vaio_mixer;
3028 spec->init = vaio_init;
3029 spec->multiout.max_channels = 2;
3030 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3031 spec->multiout.dac_nids = vaio_dacs;
3032 spec->multiout.hp_nid = VAIO_HP_DAC;
3033 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3034 spec->adc_nids = vaio_adcs;
3035 spec->input_mux = &vaio_mux;
3036 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3037 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3038 break;
6d859065
GM		 3039
3040 case CXD9872AKD_VAIO:
3041 spec->mixer = vaio_ar_mixer;
3042 spec->init = vaio_ar_init;
3043 spec->multiout.max_channels = 2;
3044 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3045 spec->multiout.dac_nids = vaio_dacs;
3046 spec->multiout.hp_nid = VAIO_HP_DAC;
3047 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3048 spec->adc_nids = vaio_adcs;
3049 spec->input_mux = &vaio_mux;
3050 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3051 codec->patch_ops = stac9872_patch_ops;
6d859065 3052 break;
db064e50
TI		 3053 }
3054
db064e50
TI		 3055 return 0;
3056}
3057
3058
2f2f4251
M		 3059/*
3060 * patch entries
3061 */
3062struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3063 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3064 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3065 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3066 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3067 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3068 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3069 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3070 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3071 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3072 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3073 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3074 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3075 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3076 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3077 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3078 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3079 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3080 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3081 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3082 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3083 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3084 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3085 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3086 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3087 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3088 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3089 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3090 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3091 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3092 /* The following does not take into account .id=0x83847661 when subsys =
3093 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3094 * currently not fully supported.
3095 */
3096 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3097 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3098 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3099 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3100 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3101 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3102 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3103 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3104 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3105 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3106 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 3107 {} /* terminator */
3108};
Linux kernel - Deliverables
This page took 0.452396 seconds and 5 git commands to generate.