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ALSA: hda - Rework on STAC/IDT auto-configuration code
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669 71enum {
9e43f0de 72 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 73 STAC_92HD73XX_REF,
661cd8fb
TI		 74 STAC_DELL_M6_AMIC,
75 STAC_DELL_M6_DMIC,
76 STAC_DELL_M6_BOTH,
6b3ab21e 77 STAC_DELL_EQ,
e1f0d669
MR		 78 STAC_92HD73XX_MODELS
79};
80
d0513fc6
MR		 81enum {
82 STAC_92HD83XXX_REF,
83 STAC_92HD83XXX_MODELS
84};
85
e035b841
MR		 86enum {
87 STAC_92HD71BXX_REF,
a7662640
MR		 88 STAC_DELL_M4_1,
89 STAC_DELL_M4_2,
3a7abfd2 90 STAC_DELL_M4_3,
6a14f585 91 STAC_HP_M4,
e035b841
MR		 92 STAC_92HD71BXX_MODELS
93};
94
8e21c34c
TD		 95enum {
96 STAC_925x_REF,
97 STAC_M2_2,
98 STAC_MA6,
2c11f955 99 STAC_PA6,
8e21c34c
TD		 100 STAC_925x_MODELS
101};
102
f5fcc13c
TI		 103enum {
104 STAC_D945_REF,
105 STAC_D945GTP3,
106 STAC_D945GTP5,
5d5d3bc3
IZ		 107 STAC_INTEL_MAC_V1,
108 STAC_INTEL_MAC_V2,
109 STAC_INTEL_MAC_V3,
110 STAC_INTEL_MAC_V4,
111 STAC_INTEL_MAC_V5,
536319af
NB		 112 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
113 * is given, one of the above models will be
114 * chosen according to the subsystem id. */
dfe495d0 115 /* for backward compatibility */
f5fcc13c 116 STAC_MACMINI,
3fc24d85 117 STAC_MACBOOK,
6f0778d8
NB		 118 STAC_MACBOOK_PRO_V1,
119 STAC_MACBOOK_PRO_V2,
f16928fb 120 STAC_IMAC_INTEL,
0dae0f83 121 STAC_IMAC_INTEL_20,
8c650087 122 STAC_ECS_202,
dfe495d0
TI		 123 STAC_922X_DELL_D81,
124 STAC_922X_DELL_D82,
125 STAC_922X_DELL_M81,
126 STAC_922X_DELL_M82,
f5fcc13c
TI		 127 STAC_922X_MODELS
128};
129
130enum {
e28d8322 131 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 132 STAC_D965_REF,
133 STAC_D965_3ST,
134 STAC_D965_5ST,
4ff076e5 135 STAC_DELL_3ST,
8e9068b1 136 STAC_DELL_BIOS,
f5fcc13c
TI		 137 STAC_927X_MODELS
138};
403d1944 139
74aeaabc
MR		 140struct sigmatel_event {
141 hda_nid_t nid;
c6e4c666
TI		 142 unsigned char type;
143 unsigned char tag;
74aeaabc
MR		 144 int data;
145};
146
147struct sigmatel_jack {
148 hda_nid_t nid;
149 int type;
150 struct snd_jack *jack;
151};
152
2f2f4251 153struct sigmatel_spec {
c8b6bf9b 154 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 155 unsigned int num_mixers;
156
403d1944 157 int board_config;
c0cea0d0 158 unsigned int eapd_switch: 1;
c7d4b2fa 159 unsigned int surr_switch: 1;
3cc08dc6 160 unsigned int alt_switch: 1;
82bc955f 161 unsigned int hp_detect: 1;
00ef50c2 162 unsigned int spdif_mute: 1;
c7d4b2fa 163
4fe5195c 164 /* gpio lines */
0fc9dec4 165 unsigned int eapd_mask;
4fe5195c
MR		 166 unsigned int gpio_mask;
167 unsigned int gpio_dir;
168 unsigned int gpio_data;
169 unsigned int gpio_mute;
170
8daaaa97
MR		 171 /* stream */
172 unsigned int stream_delay;
173
4fe5195c 174 /* analog loopback */
e1f0d669
MR		 175 unsigned char aloopback_mask;
176 unsigned char aloopback_shift;
8259980e 177
a64135a2
MR		 178 /* power management */
179 unsigned int num_pwrs;
d0513fc6 180 unsigned int *pwr_mapping;
a64135a2 181 hda_nid_t *pwr_nids;
b76c850f 182 hda_nid_t *dac_list;
a64135a2 183
74aeaabc
MR		 184 /* jack detection */
185 struct snd_array jacks;
186
187 /* events */
188 struct snd_array events;
189
2f2f4251 190 /* playback */
b22b4821 191 struct hda_input_mux *mono_mux;
89385035 192 struct hda_input_mux *amp_mux;
b22b4821 193 unsigned int cur_mmux;
2f2f4251 194 struct hda_multi_out multiout;
3cc08dc6 195 hda_nid_t dac_nids[5];
c21ca4a8
TI		 196 hda_nid_t hp_dacs[5];
197 hda_nid_t speaker_dacs[5];
2f2f4251
M		 198
199 /* capture */
200 hda_nid_t *adc_nids;
2f2f4251 201 unsigned int num_adcs;
dabbed6f
M		 202 hda_nid_t *mux_nids;
203 unsigned int num_muxes;
8b65727b
MP		 204 hda_nid_t *dmic_nids;
205 unsigned int num_dmics;
e1f0d669 206 hda_nid_t *dmux_nids;
1697055e 207 unsigned int num_dmuxes;
d9737751
MR		 208 hda_nid_t *smux_nids;
209 unsigned int num_smuxes;
65973632 210 const char **spdif_labels;
d9737751 211
dabbed6f 212 hda_nid_t dig_in_nid;
b22b4821 213 hda_nid_t mono_nid;
1cd2224c
MR		 214 hda_nid_t anabeep_nid;
215 hda_nid_t digbeep_nid;
2f2f4251 216
2f2f4251
M		 217 /* pin widgets */
218 hda_nid_t *pin_nids;
219 unsigned int num_pins;
2f2f4251 220 unsigned int *pin_configs;
2f2f4251
M		 221
222 /* codec specific stuff */
223 struct hda_verb *init;
c8b6bf9b 224 struct snd_kcontrol_new *mixer;
2f2f4251
M		 225
226 /* capture source */
8b65727b 227 struct hda_input_mux *dinput_mux;
e1f0d669 228 unsigned int cur_dmux[2];
c7d4b2fa 229 struct hda_input_mux *input_mux;
3cc08dc6 230 unsigned int cur_mux[3];
d9737751
MR		 231 struct hda_input_mux *sinput_mux;
232 unsigned int cur_smux[2];
2a9c7816
MR		 233 unsigned int cur_amux;
234 hda_nid_t *amp_nids;
235 unsigned int num_amps;
8daaaa97 236 unsigned int powerdown_adcs;
2f2f4251 237
403d1944
MP		 238 /* i/o switches */
239 unsigned int io_switch[2];
0fb87bb4 240 unsigned int clfe_swap;
c21ca4a8
TI		 241 hda_nid_t line_switch; /* shared line-in for input and output */
242 hda_nid_t mic_switch; /* shared mic-in for input and output */
243 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 244 unsigned int aloopback;
2f2f4251 245
c7d4b2fa
M		 246 struct hda_pcm pcm_rec[2]; /* PCM information */
247
248 /* dynamic controls and input_mux */
249 struct auto_pin_cfg autocfg;
603c4019 250 struct snd_array kctls;
8b65727b 251 struct hda_input_mux private_dimux;
c7d4b2fa 252 struct hda_input_mux private_imux;
d9737751 253 struct hda_input_mux private_smux;
89385035 254 struct hda_input_mux private_amp_mux;
b22b4821 255 struct hda_input_mux private_mono_mux;
2f2f4251
M		 256};
257
258static hda_nid_t stac9200_adc_nids[1] = {
259 0x03,
260};
261
262static hda_nid_t stac9200_mux_nids[1] = {
263 0x0c,
264};
265
266static hda_nid_t stac9200_dac_nids[1] = {
267 0x02,
268};
269
a64135a2
MR		 270static hda_nid_t stac92hd73xx_pwr_nids[8] = {
271 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
272 0x0f, 0x10, 0x11
273};
274
0ffa9807
MR		 275static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
276 0x26, 0,
277};
278
e1f0d669
MR		 279static hda_nid_t stac92hd73xx_adc_nids[2] = {
280 0x1a, 0x1b
281};
282
2a9c7816
MR		 283#define DELL_M6_AMP 2
284static hda_nid_t stac92hd73xx_amp_nids[3] = {
285 0x0b, 0x0c, 0x0e
89385035
MR		 286};
287
e1f0d669
MR		 288#define STAC92HD73XX_NUM_DMICS 2
289static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
290 0x13, 0x14, 0
291};
292
293#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 294
295static hda_nid_t stac92hd73xx_mux_nids[4] = {
296 0x28, 0x29, 0x2a, 0x2b,
297};
298
299static hda_nid_t stac92hd73xx_dmux_nids[2] = {
300 0x20, 0x21,
301};
302
d9737751
MR		 303static hda_nid_t stac92hd73xx_smux_nids[2] = {
304 0x22, 0x23,
305};
306
d0513fc6
MR		 307#define STAC92HD83XXX_NUM_DMICS 2
308static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
309 0x11, 0x12, 0
310};
311
d0513fc6 312#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 313
314static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
315 0x17, 0x18,
316};
317
318static hda_nid_t stac92hd83xxx_adc_nids[2] = {
319 0x15, 0x16,
320};
321
322static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
323 0xa, 0xb, 0xd, 0xe,
324};
325
0ffa9807
MR		 326static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
327 0x1e, 0,
328};
329
d0513fc6
MR		 330static unsigned int stac92hd83xxx_pwr_mapping[4] = {
331 0x03, 0x0c, 0x10, 0x40,
332};
333
a64135a2
MR		 334static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
335 0x0a, 0x0d, 0x0f
336};
337
e035b841
MR		 338static hda_nid_t stac92hd71bxx_adc_nids[2] = {
339 0x12, 0x13,
340};
341
342static hda_nid_t stac92hd71bxx_mux_nids[2] = {
343 0x1a, 0x1b
344};
345
4b33c767
MR		 346static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
347 0x1c, 0x1d,
e1f0d669
MR		 348};
349
d9737751
MR		 350static hda_nid_t stac92hd71bxx_smux_nids[2] = {
351 0x24, 0x25,
352};
353
e035b841
MR		 354#define STAC92HD71BXX_NUM_DMICS 2
355static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
356 0x18, 0x19, 0
357};
358
0ffa9807
MR		 359static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
360 0x22, 0
361};
362
8e21c34c
TD		 363static hda_nid_t stac925x_adc_nids[1] = {
364 0x03,
365};
366
367static hda_nid_t stac925x_mux_nids[1] = {
368 0x0f,
369};
370
371static hda_nid_t stac925x_dac_nids[1] = {
372 0x02,
373};
374
f6e9852a
TI		 375#define STAC925X_NUM_DMICS 1
376static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
377 0x15, 0
2c11f955
TD		 378};
379
1697055e
TI		 380static hda_nid_t stac925x_dmux_nids[1] = {
381 0x14,
382};
383
2f2f4251
M		 384static hda_nid_t stac922x_adc_nids[2] = {
385 0x06, 0x07,
386};
387
388static hda_nid_t stac922x_mux_nids[2] = {
389 0x12, 0x13,
390};
391
3cc08dc6
MP		 392static hda_nid_t stac927x_adc_nids[3] = {
393 0x07, 0x08, 0x09
394};
395
396static hda_nid_t stac927x_mux_nids[3] = {
397 0x15, 0x16, 0x17
398};
399
d9737751
MR		 400static hda_nid_t stac927x_smux_nids[1] = {
401 0x21,
402};
403
b76c850f
MR		 404static hda_nid_t stac927x_dac_nids[6] = {
405 0x02, 0x03, 0x04, 0x05, 0x06, 0
406};
407
e1f0d669
MR		 408static hda_nid_t stac927x_dmux_nids[1] = {
409 0x1b,
410};
411
7f16859a
MR		 412#define STAC927X_NUM_DMICS 2
413static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
414 0x13, 0x14, 0
415};
416
65973632
MR		 417static const char *stac927x_spdif_labels[5] = {
418 "Digital Playback", "ADAT", "Analog Mux 1",
419 "Analog Mux 2", "Analog Mux 3"
420};
421
f3302a59
MP		 422static hda_nid_t stac9205_adc_nids[2] = {
423 0x12, 0x13
424};
425
426static hda_nid_t stac9205_mux_nids[2] = {
427 0x19, 0x1a
428};
429
e1f0d669 430static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 431 0x1d,
e1f0d669
MR		 432};
433
d9737751
MR		 434static hda_nid_t stac9205_smux_nids[1] = {
435 0x21,
436};
437
f6e9852a
TI		 438#define STAC9205_NUM_DMICS 2
439static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
440 0x17, 0x18, 0
8b65727b
MP		 441};
442
c7d4b2fa 443static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 444 0x08, 0x09, 0x0d, 0x0e,
445 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 446};
447
8e21c34c
TD		 448static hda_nid_t stac925x_pin_nids[8] = {
449 0x07, 0x08, 0x0a, 0x0b,
450 0x0c, 0x0d, 0x10, 0x11,
451};
452
2f2f4251
M		 453static hda_nid_t stac922x_pin_nids[10] = {
454 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
455 0x0f, 0x10, 0x11, 0x15, 0x1b,
456};
457
a7662640 458static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 459 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 461 0x14, 0x22, 0x23
e1f0d669
MR		 462};
463
d0513fc6
MR		 464static hda_nid_t stac92hd83xxx_pin_nids[14] = {
465 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
466 0x0f, 0x10, 0x11, 0x12, 0x13,
467 0x1d, 0x1e, 0x1f, 0x20
468};
0ffa9807 469static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 472 0x1f,
e035b841
MR		 473};
474
3cc08dc6
MP		 475static hda_nid_t stac927x_pin_nids[14] = {
476 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
477 0x0f, 0x10, 0x11, 0x12, 0x13,
478 0x14, 0x21, 0x22, 0x23,
479};
480
f3302a59
MP		 481static hda_nid_t stac9205_pin_nids[12] = {
482 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
483 0x0f, 0x14, 0x16, 0x17, 0x18,
484 0x21, 0x22,
f3302a59
MP		 485};
486
89385035
MR		 487#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
488
489static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
490 struct snd_ctl_elem_value *ucontrol)
491{
492 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
493 struct sigmatel_spec *spec = codec->spec;
494 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
495
496 kcontrol->private_value ^= get_amp_nid(kcontrol);
497 kcontrol->private_value |= nid;
498
499 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
500}
501
502static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_value *ucontrol)
504{
505 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
506 struct sigmatel_spec *spec = codec->spec;
507 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
508
509 kcontrol->private_value ^= get_amp_nid(kcontrol);
510 kcontrol->private_value |= nid;
511
512 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
513}
514
8b65727b
MP		 515static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_info *uinfo)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
520 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
521}
522
523static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol)
525{
526 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
527 struct sigmatel_spec *spec = codec->spec;
e1f0d669 528 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 529
e1f0d669 530 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 531 return 0;
532}
533
534static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
e1f0d669 539 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 540
541 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 542 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 543}
544
d9737751
MR		 545static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_info *uinfo)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
550 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
551}
552
553static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_value *ucontrol)
555{
556 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
557 struct sigmatel_spec *spec = codec->spec;
558 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
559
560 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
561 return 0;
562}
563
564static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566{
567 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
568 struct sigmatel_spec *spec = codec->spec;
00ef50c2 569 struct hda_input_mux *smux = &spec->private_smux;
d9737751 570 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 571 int err, val;
572 hda_nid_t nid;
d9737751 573
00ef50c2 574 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 575 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 576 if (err < 0)
577 return err;
578
579 if (spec->spdif_mute) {
580 if (smux_idx == 0)
581 nid = spec->multiout.dig_out_nid;
582 else
583 nid = codec->slave_dig_outs[smux_idx - 1];
584 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 585 val = HDA_AMP_MUTE;
00ef50c2 586 else
c9b46f91 587 val = 0;
00ef50c2 588 /* un/mute SPDIF out */
c9b46f91
TI		 589 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
590 HDA_AMP_MUTE, val);
00ef50c2
MR		 591 }
592 return 0;
d9737751
MR		 593}
594
c8b6bf9b 595static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 596{
597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
598 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 599 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 600}
601
c8b6bf9b 602static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
606 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
607
608 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
609 return 0;
610}
611
c8b6bf9b 612static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 613{
614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
615 struct sigmatel_spec *spec = codec->spec;
616 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
617
c7d4b2fa 618 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 619 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
620}
621
b22b4821
MR		 622static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_info *uinfo)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
628}
629
630static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
631 struct snd_ctl_elem_value *ucontrol)
632{
633 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
634 struct sigmatel_spec *spec = codec->spec;
635
636 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
637 return 0;
638}
639
640static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
645
646 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
647 spec->mono_nid, &spec->cur_mmux);
648}
649
89385035
MR		 650static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_info *uinfo)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
655 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
656}
657
658static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
659 struct snd_ctl_elem_value *ucontrol)
660{
661 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
662 struct sigmatel_spec *spec = codec->spec;
663
664 ucontrol->value.enumerated.item[0] = spec->cur_amux;
665 return 0;
666}
667
668static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
669 struct snd_ctl_elem_value *ucontrol)
670{
671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
672 struct sigmatel_spec *spec = codec->spec;
673 struct snd_kcontrol *ctl =
674 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
675 if (!ctl)
676 return -EINVAL;
677
678 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
679 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
680
681 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
682 0, &spec->cur_amux);
683}
684
5f10c4a9
ML		 685#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
686
687static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
688 struct snd_ctl_elem_value *ucontrol)
689{
690 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 691 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 692 struct sigmatel_spec *spec = codec->spec;
693
e1f0d669
MR		 694 ucontrol->value.integer.value[0] = !!(spec->aloopback &
695 (spec->aloopback_mask << idx));
5f10c4a9
ML		 696 return 0;
697}
698
699static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
700 struct snd_ctl_elem_value *ucontrol)
701{
702 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
703 struct sigmatel_spec *spec = codec->spec;
e1f0d669 704 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 705 unsigned int dac_mode;
e1f0d669 706 unsigned int val, idx_val;
5f10c4a9 707
e1f0d669
MR		 708 idx_val = spec->aloopback_mask << idx;
709 if (ucontrol->value.integer.value[0])
710 val = spec->aloopback | idx_val;
711 else
712 val = spec->aloopback & ~idx_val;
68ea7b2f 713 if (spec->aloopback == val)
5f10c4a9
ML		 714 return 0;
715
68ea7b2f 716 spec->aloopback = val;
5f10c4a9 717
e1f0d669
MR		 718 /* Only return the bits defined by the shift value of the
719 * first two bytes of the mask
720 */
5f10c4a9 721 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 722 kcontrol->private_value & 0xFFFF, 0x0);
723 dac_mode >>= spec->aloopback_shift;
5f10c4a9 724
e1f0d669 725 if (spec->aloopback & idx_val) {
5f10c4a9 726 snd_hda_power_up(codec);
e1f0d669 727 dac_mode |= idx_val;
5f10c4a9
ML		 728 } else {
729 snd_hda_power_down(codec);
e1f0d669 730 dac_mode &= ~idx_val;
5f10c4a9
ML		 731 }
732
733 snd_hda_codec_write_cache(codec, codec->afg, 0,
734 kcontrol->private_value >> 16, dac_mode);
735
736 return 1;
737}
738
c7d4b2fa 739static struct hda_verb stac9200_core_init[] = {
2f2f4251 740 /* set dac0mux for dac converter */
c7d4b2fa 741 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 742 {}
743};
744
1194b5b7
TI		 745static struct hda_verb stac9200_eapd_init[] = {
746 /* set dac0mux for dac converter */
747 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
748 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
749 {}
750};
751
e1f0d669
MR		 752static struct hda_verb stac92hd73xx_6ch_core_init[] = {
753 /* set master volume and direct control */
754 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 755 /* setup adcs to point to mixer */
756 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
757 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 758 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
759 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
760 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
761 /* setup import muxs */
762 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
763 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
764 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
765 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
766 {}
767};
768
d654a660
MR		 769static struct hda_verb dell_eq_core_init[] = {
770 /* set master volume to max value without distortion
771 * and direct control */
772 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 773 /* setup adcs to point to mixer */
774 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
775 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
52fe0f9d 784static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 785 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 786 /* setup adcs to point to mixer */
787 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
788 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
789 /* setup import muxs */
790 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
794 {}
795};
796
e1f0d669
MR		 797static struct hda_verb stac92hd73xx_8ch_core_init[] = {
798 /* set master volume and direct control */
799 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 800 /* setup adcs to point to mixer */
801 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 803 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
804 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
805 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
806 /* setup import muxs */
807 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
808 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
809 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
810 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
811 {}
812};
813
814static struct hda_verb stac92hd73xx_10ch_core_init[] = {
815 /* set master volume and direct control */
816 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 817 /* dac3 is connected to import3 mux */
818 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 819 /* setup adcs to point to mixer */
820 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
821 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 822 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
823 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
824 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
825 /* setup import muxs */
826 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
827 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
828 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
829 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
830 {}
831};
832
d0513fc6
MR		 833static struct hda_verb stac92hd83xxx_core_init[] = {
834 /* start of config #1 */
835 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
836
837 /* start of config #2 */
838 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
839 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
840 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
841
842 /* power state controls amps */
843 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
844};
845
e035b841 846static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 847 /* set master volume and direct control */
848 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 849 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
850 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
851 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
852 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 853};
854
4b33c767 855#define HD_DISABLE_PORTF 2
541eee87 856static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 857 /* start of config #1 */
858
859 /* connect port 0f to audio mixer */
860 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 861 /* unmute right and left channels for node 0x0f */
862 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 /* start of config #2 */
864
e035b841
MR		 865 /* set master volume and direct control */
866 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 867 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 868 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
869 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 870 {}
871};
872
8e21c34c
TD		 873static struct hda_verb stac925x_core_init[] = {
874 /* set dac0mux for dac converter */
875 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
876 {}
877};
878
c7d4b2fa 879static struct hda_verb stac922x_core_init[] = {
2f2f4251 880 /* set master volume and direct control */
c7d4b2fa 881 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 882 {}
883};
884
93ed1503 885static struct hda_verb d965_core_init[] = {
19039bd0 886 /* set master volume and direct control */
93ed1503 887 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 888 /* unmute node 0x1b */
889 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
890 /* select node 0x03 as DAC */
891 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
892 {}
893};
894
3cc08dc6
MP		 895static struct hda_verb stac927x_core_init[] = {
896 /* set master volume and direct control */
897 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 898 /* enable analog pc beep path */
899 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 900 {}
901};
902
f3302a59
MP		 903static struct hda_verb stac9205_core_init[] = {
904 /* set master volume and direct control */
905 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 906 /* enable analog pc beep path */
907 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 908 {}
909};
910
b22b4821
MR		 911#define STAC_MONO_MUX \
912 { \
913 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
914 .name = "Mono Mux", \
915 .count = 1, \
916 .info = stac92xx_mono_mux_enum_info, \
917 .get = stac92xx_mono_mux_enum_get, \
918 .put = stac92xx_mono_mux_enum_put, \
919 }
920
89385035
MR		 921#define STAC_AMP_MUX \
922 { \
923 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
924 .name = "Amp Selector Capture Switch", \
925 .count = 1, \
926 .info = stac92xx_amp_mux_enum_info, \
927 .get = stac92xx_amp_mux_enum_get, \
928 .put = stac92xx_amp_mux_enum_put, \
929 }
930
931#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
932 { \
933 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
934 .name = xname, \
935 .index = 0, \
936 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
937 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
938 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
939 .info = stac92xx_amp_volume_info, \
940 .get = stac92xx_amp_volume_get, \
941 .put = stac92xx_amp_volume_put, \
942 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
943 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
944 }
945
9e05b7a3 946#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = "Input Source", \
9e05b7a3 950 .count = cnt, \
ca7c5a8b
ML		 951 .info = stac92xx_mux_enum_info, \
952 .get = stac92xx_mux_enum_get, \
953 .put = stac92xx_mux_enum_put, \
954 }
955
e1f0d669 956#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 957 { \
958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
959 .name = "Analog Loopback", \
e1f0d669 960 .count = cnt, \
5f10c4a9
ML		 961 .info = stac92xx_aloopback_info, \
962 .get = stac92xx_aloopback_get, \
963 .put = stac92xx_aloopback_put, \
964 .private_value = verb_read | (verb_write << 16), \
965 }
966
c8b6bf9b 967static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 968 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
969 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 970 STAC_INPUT_SOURCE(1),
2f2f4251
M		 971 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
972 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 973 { } /* end */
974};
975
2a9c7816 976#define DELL_M6_MIXER 6
e1f0d669 977static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 978 /* start of config #1 */
e1f0d669
MR		 979 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
980 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
981
e1f0d669
MR		 982 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
983 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
984
2a9c7816
MR		 985 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
986 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
987
988 /* start of config #2 */
989 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
990 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
991
e1f0d669
MR		 992 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
993 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
994
2a9c7816
MR		 995 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
996
997 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
998 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
999
1000 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1001 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1002
e1f0d669
MR		 1003 { } /* end */
1004};
1005
1006static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1007 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1008
e1f0d669
MR		 1009 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1011
1012 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1014
1015 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1016 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1017
1018 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1019 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1020
1021 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1022 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1023
1024 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1025 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1026
1027 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1028 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1029 { } /* end */
1030};
1031
1032static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1033 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1034
e1f0d669
MR		 1035 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1036 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1037
1038 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1039 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1040
1041 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1042 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1043
1044 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1045 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1046
1047 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1048 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1049
1050 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1051 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1052
1053 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1054 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1055 { } /* end */
1056};
1057
d0513fc6
MR		 1058
1059static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1060 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1061 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1062
1063 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1064 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1065
1066 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1067 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1068
1069 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1070 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1071
1072 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1073 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1074
1075 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1076 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1077
1078 /*
1079 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1080 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1081 */
1082 { } /* end */
1083};
1084
541eee87 1085static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1086 STAC_INPUT_SOURCE(2),
4b33c767 1087 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1088
9b35947f
MR		 1089 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1090 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1091
1092 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1093 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1094 /* analog pc-beep replaced with digital beep support */
1095 /*
f7c5dda2
MR		 1096 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1097 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1098 */
f7c5dda2 1099
687cb98e
MR		 1100 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1101 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1102
687cb98e
MR		 1103 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1104 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1105
1106 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1107 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1108
1109 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1110 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1111 { } /* end */
1112};
1113
541eee87 1114static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1115 STAC_INPUT_SOURCE(2),
1116 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1117
541eee87
MR		 1118 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1119 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1120
1121 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1122 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1123 { } /* end */
1124};
1125
8e21c34c 1126static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1127 STAC_INPUT_SOURCE(1),
8e21c34c 1128 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1129 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1130 { } /* end */
1131};
1132
9e05b7a3 1133static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1134 STAC_INPUT_SOURCE(2),
e1f0d669 1135 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1136
1137 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1138 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1139
1140 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1141 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1142 { } /* end */
1143};
1144
19039bd0 1145/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1146static struct snd_kcontrol_new stac922x_mixer[] = {
1147 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1148 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1149 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1150
1151 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1152 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1153 { } /* end */
1154};
1155
9e05b7a3 1156
d1d985f0 1157static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1158 STAC_INPUT_SOURCE(3),
e1f0d669 1159 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1160
9e05b7a3
ML		 1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1166
1167 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1168 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1169 { } /* end */
1170};
1171
1697055e
TI		 1172static struct snd_kcontrol_new stac_dmux_mixer = {
1173 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1174 .name = "Digital Input Source",
1175 /* count set later */
1176 .info = stac92xx_dmux_enum_info,
1177 .get = stac92xx_dmux_enum_get,
1178 .put = stac92xx_dmux_enum_put,
1179};
1180
d9737751
MR		 1181static struct snd_kcontrol_new stac_smux_mixer = {
1182 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1183 .name = "IEC958 Playback Source",
d9737751
MR		 1184 /* count set later */
1185 .info = stac92xx_smux_enum_info,
1186 .get = stac92xx_smux_enum_get,
1187 .put = stac92xx_smux_enum_put,
1188};
1189
2134ea4f
TI		 1190static const char *slave_vols[] = {
1191 "Front Playback Volume",
1192 "Surround Playback Volume",
1193 "Center Playback Volume",
1194 "LFE Playback Volume",
1195 "Side Playback Volume",
1196 "Headphone Playback Volume",
1197 "Headphone Playback Volume",
1198 "Speaker Playback Volume",
1199 "External Speaker Playback Volume",
1200 "Speaker2 Playback Volume",
1201 NULL
1202};
1203
1204static const char *slave_sws[] = {
1205 "Front Playback Switch",
1206 "Surround Playback Switch",
1207 "Center Playback Switch",
1208 "LFE Playback Switch",
1209 "Side Playback Switch",
1210 "Headphone Playback Switch",
1211 "Headphone Playback Switch",
1212 "Speaker Playback Switch",
1213 "External Speaker Playback Switch",
1214 "Speaker2 Playback Switch",
edb54a55 1215 "IEC958 Playback Switch",
2134ea4f
TI		 1216 NULL
1217};
1218
603c4019 1219static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1220static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1221
2f2f4251
M		 1222static int stac92xx_build_controls(struct hda_codec *codec)
1223{
1224 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1225 struct auto_pin_cfg *cfg = &spec->autocfg;
1226 hda_nid_t nid;
2f2f4251 1227 int err;
c7d4b2fa 1228 int i;
2f2f4251
M		 1229
1230 err = snd_hda_add_new_ctls(codec, spec->mixer);
1231 if (err < 0)
1232 return err;
c7d4b2fa
M		 1233
1234 for (i = 0; i < spec->num_mixers; i++) {
1235 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1236 if (err < 0)
1237 return err;
1238 }
1697055e
TI		 1239 if (spec->num_dmuxes > 0) {
1240 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1241 err = snd_hda_ctl_add(codec,
1697055e
TI		 1242 snd_ctl_new1(&stac_dmux_mixer, codec));
1243 if (err < 0)
1244 return err;
1245 }
d9737751 1246 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1247 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1248 struct hda_input_mux *smux = &spec->private_smux;
1249 /* check for mute support on SPDIF out */
1250 if (wcaps & AC_WCAP_OUT_AMP) {
1251 smux->items[smux->num_items].label = "Off";
1252 smux->items[smux->num_items].index = 0;
1253 smux->num_items++;
1254 spec->spdif_mute = 1;
1255 }
d9737751 1256 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1257 err = snd_hda_ctl_add(codec,
d9737751
MR		 1258 snd_ctl_new1(&stac_smux_mixer, codec));
1259 if (err < 0)
1260 return err;
1261 }
c7d4b2fa 1262
dabbed6f
M		 1263 if (spec->multiout.dig_out_nid) {
1264 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1265 if (err < 0)
1266 return err;
9a08160b
TI		 1267 err = snd_hda_create_spdif_share_sw(codec,
1268 &spec->multiout);
1269 if (err < 0)
1270 return err;
1271 spec->multiout.share_spdif = 1;
dabbed6f 1272 }
da74ae3e 1273 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1274 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1275 if (err < 0)
1276 return err;
1277 }
2134ea4f
TI		 1278
1279 /* if we have no master control, let's create it */
1280 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1281 unsigned int vmaster_tlv[4];
2134ea4f 1282 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1283 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1284 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1285 vmaster_tlv, slave_vols);
2134ea4f
TI		 1286 if (err < 0)
1287 return err;
1288 }
1289 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1290 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1291 NULL, slave_sws);
1292 if (err < 0)
1293 return err;
1294 }
1295
603c4019 1296 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1297
1298 /* create jack input elements */
1299 if (spec->hp_detect) {
1300 for (i = 0; i < cfg->hp_outs; i++) {
1301 int type = SND_JACK_HEADPHONE;
1302 nid = cfg->hp_pins[i];
1303 /* jack detection */
1304 if (cfg->hp_outs == i)
1305 type |= SND_JACK_LINEOUT;
1306 err = stac92xx_add_jack(codec, nid, type);
1307 if (err < 0)
1308 return err;
1309 }
1310 }
1311 for (i = 0; i < cfg->line_outs; i++) {
1312 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1313 SND_JACK_LINEOUT);
1314 if (err < 0)
1315 return err;
1316 }
1317 for (i = 0; i < AUTO_PIN_LAST; i++) {
1318 nid = cfg->input_pins[i];
1319 if (nid) {
1320 err = stac92xx_add_jack(codec, nid,
1321 SND_JACK_MICROPHONE);
1322 if (err < 0)
1323 return err;
1324 }
1325 }
1326
dabbed6f 1327 return 0;
2f2f4251
M		 1328}
1329
403d1944 1330static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1331 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1332 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1333};
1334
dfe495d0
TI		 1335/*
1336 STAC 9200 pin configs for
1337 102801A8
1338 102801DE
1339 102801E8
1340*/
1341static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1342 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1343 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1344};
1345
1346/*
1347 STAC 9200 pin configs for
1348 102801C0
1349 102801C1
1350*/
1351static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1352 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1353 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1354};
1355
1356/*
1357 STAC 9200 pin configs for
1358 102801C4 (Dell Dimension E310)
1359 102801C5
1360 102801C7
1361 102801D9
1362 102801DA
1363 102801E3
1364*/
1365static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1366 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1367 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1368};
1369
1370
1371/*
1372 STAC 9200-32 pin configs for
1373 102801B5 (Dell Inspiron 630m)
1374 102801D8 (Dell Inspiron 640m)
1375*/
1376static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1377 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1378 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1379};
1380
1381/*
1382 STAC 9200-32 pin configs for
1383 102801C2 (Dell Latitude D620)
1384 102801C8
1385 102801CC (Dell Latitude D820)
1386 102801D4
1387 102801D6
1388*/
1389static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1390 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1391 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1392};
1393
1394/*
1395 STAC 9200-32 pin configs for
1396 102801CE (Dell XPS M1710)
1397 102801CF (Dell Precision M90)
1398*/
1399static unsigned int dell9200_m23_pin_configs[8] = {
1400 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1401 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1402};
1403
1404/*
1405 STAC 9200-32 pin configs for
1406 102801C9
1407 102801CA
1408 102801CB (Dell Latitude 120L)
1409 102801D3
1410*/
1411static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1412 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1413 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1414};
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801BD (Dell Inspiron E1505n)
1419 102801EE
1420 102801EF
1421*/
1422static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1423 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1424 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1425};
1426
1427/*
1428 STAC 9200-32 pin configs for
1429 102801F5 (Dell Inspiron 1501)
1430 102801F6
1431*/
1432static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1433 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1434 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1435};
1436
1437/*
1438 STAC 9200-32
1439 102801CD (Dell Inspiron E1705/9400)
1440*/
1441static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1442 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1443 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1444};
1445
bf277785
TD		 1446static unsigned int oqo9200_pin_configs[8] = {
1447 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1448 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1449};
1450
dfe495d0 1451
f5fcc13c
TI		 1452static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1453 [STAC_REF] = ref9200_pin_configs,
bf277785 1454 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1455 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1456 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1457 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1458 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1459 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1460 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1461 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1462 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1463 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1464 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1465 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1466};
1467
f5fcc13c
TI		 1468static const char *stac9200_models[STAC_9200_MODELS] = {
1469 [STAC_REF] = "ref",
bf277785 1470 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1471 [STAC_9200_DELL_D21] = "dell-d21",
1472 [STAC_9200_DELL_D22] = "dell-d22",
1473 [STAC_9200_DELL_D23] = "dell-d23",
1474 [STAC_9200_DELL_M21] = "dell-m21",
1475 [STAC_9200_DELL_M22] = "dell-m22",
1476 [STAC_9200_DELL_M23] = "dell-m23",
1477 [STAC_9200_DELL_M24] = "dell-m24",
1478 [STAC_9200_DELL_M25] = "dell-m25",
1479 [STAC_9200_DELL_M26] = "dell-m26",
1480 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1481 [STAC_9200_GATEWAY] = "gateway",
117f257d 1482 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1483};
1484
1485static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1486 /* SigmaTel reference board */
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1488 "DFI LanParty", STAC_REF),
e7377071 1489 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1491 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1493 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1495 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1497 "unknown Dell", STAC_9200_DELL_D22),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1499 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1501 "Dell Latitude D620", STAC_9200_DELL_M22),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1503 "unknown Dell", STAC_9200_DELL_D23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1505 "unknown Dell", STAC_9200_DELL_D23),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1507 "unknown Dell", STAC_9200_DELL_M22),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1509 "unknown Dell", STAC_9200_DELL_M24),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1511 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1513 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1515 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1517 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1519 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1521 "Dell Precision M90", STAC_9200_DELL_M23),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1523 "unknown Dell", STAC_9200_DELL_M22),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1525 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1527 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1529 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1531 "unknown Dell", STAC_9200_DELL_D23),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1533 "unknown Dell", STAC_9200_DELL_D23),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1535 "unknown Dell", STAC_9200_DELL_D21),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1537 "unknown Dell", STAC_9200_DELL_D23),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1539 "unknown Dell", STAC_9200_DELL_D21),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1541 "unknown Dell", STAC_9200_DELL_M25),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1543 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1545 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1547 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1548 /* Panasonic */
117f257d 1549 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1550 /* Gateway machines needs EAPD to be set on resume */
1551 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1552 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1553 STAC_9200_GATEWAY),
1554 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1555 STAC_9200_GATEWAY),
bf277785
TD		 1556 /* OQO Mobile */
1557 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1558 {} /* terminator */
1559};
1560
8e21c34c
TD		 1561static unsigned int ref925x_pin_configs[8] = {
1562 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1563 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1564};
1565
1566static unsigned int stac925x_MA6_pin_configs[8] = {
1567 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1568 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1569};
1570
2c11f955
TD		 1571static unsigned int stac925x_PA6_pin_configs[8] = {
1572 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1573 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1574};
1575
8e21c34c 1576static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1577 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1578 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1579};
1580
1581static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1582 [STAC_REF] = ref925x_pin_configs,
1583 [STAC_M2_2] = stac925xM2_2_pin_configs,
1584 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1585 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1586};
1587
1588static const char *stac925x_models[STAC_925x_MODELS] = {
1589 [STAC_REF] = "ref",
1590 [STAC_M2_2] = "m2-2",
1591 [STAC_MA6] = "m6",
2c11f955 1592 [STAC_PA6] = "pa6",
8e21c34c
TD		 1593};
1594
1595static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1596 /* SigmaTel reference board */
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1598 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1599 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1600 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1601 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1602 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1603 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1604 {} /* terminator */
1605};
1606
a7662640 1607static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1608 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1609 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1610 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1611 0x01452050,
1612};
1613
1614static unsigned int dell_m6_pin_configs[13] = {
1615 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1616 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1617 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1618 0x4f0000f0,
e1f0d669
MR		 1619};
1620
1621static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1622 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1623 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1624 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1625 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1626 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1627};
1628
1629static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1630 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1631 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1632 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1633 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1634 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1635 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1636};
1637
1638static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1639 /* SigmaTel reference board */
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1641 "DFI LanParty", STAC_92HD73XX_REF),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1643 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1645 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1647 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1649 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1651 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1652 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1653 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1654 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1655 "unknown Dell", STAC_DELL_M6_DMIC),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1657 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1658 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1659 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1660 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1661 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1662 {} /* terminator */
1663};
1664
d0513fc6
MR		 1665static unsigned int ref92hd83xxx_pin_configs[14] = {
1666 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1667 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1668 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1669 0x01451160, 0x98560170,
1670};
1671
1672static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1673 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1674};
1675
1676static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1677 [STAC_92HD83XXX_REF] = "ref",
1678};
1679
1680static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1681 /* SigmaTel reference board */
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1683 "DFI LanParty", STAC_92HD71BXX_REF),
1684};
1685
0ffa9807 1686static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1687 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1688 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1689 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1690};
1691
0ffa9807 1692static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1693 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1694 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1695 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1696};
1697
0ffa9807 1698static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1699 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1700 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1701 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1702};
1703
3a7abfd2
MR		 1704static unsigned int dell_m4_3_pin_configs[11] = {
1705 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1706 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1707 0x40f000f0, 0x044413b0, 0x044413b0,
1708};
1709
e035b841
MR		 1710static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1711 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1712 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1713 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1714 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1715 [STAC_HP_M4] = NULL,
e035b841
MR		 1716};
1717
1718static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1719 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1720 [STAC_DELL_M4_1] = "dell-m4-1",
1721 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1722 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1723 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1724};
1725
1726static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1727 /* SigmaTel reference board */
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1729 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1731 "HP dv5", STAC_HP_M4),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1733 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1735 "unknown HP", STAC_HP_M4),
a7662640
MR		 1736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1737 "unknown Dell", STAC_DELL_M4_1),
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1739 "unknown Dell", STAC_DELL_M4_1),
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1741 "unknown Dell", STAC_DELL_M4_1),
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1743 "unknown Dell", STAC_DELL_M4_1),
1744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1745 "unknown Dell", STAC_DELL_M4_1),
1746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1747 "unknown Dell", STAC_DELL_M4_1),
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1749 "unknown Dell", STAC_DELL_M4_1),
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1751 "unknown Dell", STAC_DELL_M4_2),
1752 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1753 "unknown Dell", STAC_DELL_M4_2),
1754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1755 "unknown Dell", STAC_DELL_M4_2),
1756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1757 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1759 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1760 {} /* terminator */
1761};
1762
403d1944
MP		 1763static unsigned int ref922x_pin_configs[10] = {
1764 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1765 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1766 0x40000100, 0x40000100,
1767};
1768
dfe495d0
TI		 1769/*
1770 STAC 922X pin configs for
1771 102801A7
1772 102801AB
1773 102801A9
1774 102801D1
1775 102801D2
1776*/
1777static unsigned int dell_922x_d81_pin_configs[10] = {
1778 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1779 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1780 0x01813122, 0x400001f2,
1781};
1782
1783/*
1784 STAC 922X pin configs for
1785 102801AC
1786 102801D0
1787*/
1788static unsigned int dell_922x_d82_pin_configs[10] = {
1789 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1790 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1791 0x01813122, 0x400001f1,
1792};
1793
1794/*
1795 STAC 922X pin configs for
1796 102801BF
1797*/
1798static unsigned int dell_922x_m81_pin_configs[10] = {
1799 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1800 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1801 0x40C003f1, 0x405003f0,
1802};
1803
1804/*
1805 STAC 9221 A1 pin configs for
1806 102801D7 (Dell XPS M1210)
1807*/
1808static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1809 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1810 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1811 0x508003f3, 0x405003f4,
1812};
1813
403d1944 1814static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1815 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1816 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1817 0x02a19120, 0x40000100,
1818};
1819
1820static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1821 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1822 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1823 0x02a19320, 0x40000100,
1824};
1825
5d5d3bc3
IZ		 1826static unsigned int intel_mac_v1_pin_configs[10] = {
1827 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1828 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1829 0x400000fc, 0x400000fb,
1830};
1831
1832static unsigned int intel_mac_v2_pin_configs[10] = {
1833 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1834 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1835 0x400000fc, 0x400000fb,
6f0778d8
NB		 1836};
1837
5d5d3bc3
IZ		 1838static unsigned int intel_mac_v3_pin_configs[10] = {
1839 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1840 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1841 0x400000fc, 0x400000fb,
1842};
1843
5d5d3bc3
IZ		 1844static unsigned int intel_mac_v4_pin_configs[10] = {
1845 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1846 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1847 0x400000fc, 0x400000fb,
1848};
1849
5d5d3bc3
IZ		 1850static unsigned int intel_mac_v5_pin_configs[10] = {
1851 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1852 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1853 0x400000fc, 0x400000fb,
0dae0f83
TI		 1854};
1855
8c650087
MCC		 1856static unsigned int ecs202_pin_configs[10] = {
1857 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1858 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1859 0x9037012e, 0x40e000f2,
1860};
76c08828 1861
19039bd0 1862static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1863 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1864 [STAC_D945GTP3] = d945gtp3_pin_configs,
1865 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1866 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1867 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1868 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1869 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1870 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1871 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1872 /* for backward compatibility */
5d5d3bc3
IZ		 1873 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1874 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1875 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1876 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1877 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1878 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1879 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1880 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1881 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1882 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1883 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1884};
1885
f5fcc13c
TI		 1886static const char *stac922x_models[STAC_922X_MODELS] = {
1887 [STAC_D945_REF] = "ref",
1888 [STAC_D945GTP5] = "5stack",
1889 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1890 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1891 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1892 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1893 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1894 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1895 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1896 /* for backward compatibility */
f5fcc13c 1897 [STAC_MACMINI] = "macmini",
3fc24d85 1898 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1899 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1900 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1901 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1902 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1903 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1904 [STAC_922X_DELL_D81] = "dell-d81",
1905 [STAC_922X_DELL_D82] = "dell-d82",
1906 [STAC_922X_DELL_M81] = "dell-m81",
1907 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1908};
1909
1910static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1911 /* SigmaTel reference board */
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1913 "DFI LanParty", STAC_D945_REF),
1914 /* Intel 945G based systems */
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1916 "Intel D945G", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1918 "Intel D945G", STAC_D945GTP3),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1920 "Intel D945G", STAC_D945GTP3),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1922 "Intel D945G", STAC_D945GTP3),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1924 "Intel D945G", STAC_D945GTP3),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1926 "Intel D945G", STAC_D945GTP3),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1928 "Intel D945G", STAC_D945GTP3),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1930 "Intel D945G", STAC_D945GTP3),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1932 "Intel D945G", STAC_D945GTP3),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1934 "Intel D945G", STAC_D945GTP3),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1936 "Intel D945G", STAC_D945GTP3),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1938 "Intel D945G", STAC_D945GTP3),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1940 "Intel D945G", STAC_D945GTP3),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1942 "Intel D945G", STAC_D945GTP3),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1944 "Intel D945G", STAC_D945GTP3),
1945 /* Intel D945G 5-stack systems */
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1947 "Intel D945G", STAC_D945GTP5),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1949 "Intel D945G", STAC_D945GTP5),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1951 "Intel D945G", STAC_D945GTP5),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1953 "Intel D945G", STAC_D945GTP5),
1954 /* Intel 945P based systems */
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1956 "Intel D945P", STAC_D945GTP3),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1958 "Intel D945P", STAC_D945GTP3),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1960 "Intel D945P", STAC_D945GTP3),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1962 "Intel D945P", STAC_D945GTP3),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1964 "Intel D945P", STAC_D945GTP3),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1966 "Intel D945P", STAC_D945GTP5),
1967 /* other systems */
536319af 1968 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1969 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1970 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1971 /* Dell systems */
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1973 "unknown Dell", STAC_922X_DELL_D81),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1975 "unknown Dell", STAC_922X_DELL_D81),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1977 "unknown Dell", STAC_922X_DELL_D81),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1979 "unknown Dell", STAC_922X_DELL_D82),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1981 "unknown Dell", STAC_922X_DELL_M81),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1983 "unknown Dell", STAC_922X_DELL_D82),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1985 "unknown Dell", STAC_922X_DELL_D81),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1987 "unknown Dell", STAC_922X_DELL_D81),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1989 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1990 /* ECS/PC Chips boards */
1991 SND_PCI_QUIRK(0x1019, 0x2144,
1992 "ECS/PC chips", STAC_ECS_202),
1993 SND_PCI_QUIRK(0x1019, 0x2608,
1994 "ECS/PC chips", STAC_ECS_202),
1995 SND_PCI_QUIRK(0x1019, 0x2633,
1996 "ECS/PC chips P17G/1333", STAC_ECS_202),
1997 SND_PCI_QUIRK(0x1019, 0x2811,
1998 "ECS/PC chips", STAC_ECS_202),
1999 SND_PCI_QUIRK(0x1019, 0x2812,
2000 "ECS/PC chips", STAC_ECS_202),
2001 SND_PCI_QUIRK(0x1019, 0x2813,
2002 "ECS/PC chips", STAC_ECS_202),
2003 SND_PCI_QUIRK(0x1019, 0x2814,
2004 "ECS/PC chips", STAC_ECS_202),
2005 SND_PCI_QUIRK(0x1019, 0x2815,
2006 "ECS/PC chips", STAC_ECS_202),
2007 SND_PCI_QUIRK(0x1019, 0x2816,
2008 "ECS/PC chips", STAC_ECS_202),
2009 SND_PCI_QUIRK(0x1019, 0x2817,
2010 "ECS/PC chips", STAC_ECS_202),
2011 SND_PCI_QUIRK(0x1019, 0x2818,
2012 "ECS/PC chips", STAC_ECS_202),
2013 SND_PCI_QUIRK(0x1019, 0x2819,
2014 "ECS/PC chips", STAC_ECS_202),
2015 SND_PCI_QUIRK(0x1019, 0x2820,
2016 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2017 {} /* terminator */
2018};
2019
3cc08dc6 2020static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2021 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2022 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2023 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2024 0x01c42190, 0x40000100,
3cc08dc6
MP		 2025};
2026
93ed1503 2027static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2028 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2029 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2030 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2031 0x40000100, 0x40000100
2032};
2033
93ed1503
TD		 2034static unsigned int d965_5st_pin_configs[14] = {
2035 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2036 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2037 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2038 0x40000100, 0x40000100
2039};
2040
4ff076e5
TD		 2041static unsigned int dell_3st_pin_configs[14] = {
2042 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2043 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2044 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2045 0x40c003fc, 0x40000100
2046};
2047
93ed1503 2048static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2049 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2050 [STAC_D965_REF] = ref927x_pin_configs,
2051 [STAC_D965_3ST] = d965_3st_pin_configs,
2052 [STAC_D965_5ST] = d965_5st_pin_configs,
2053 [STAC_DELL_3ST] = dell_3st_pin_configs,
2054 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2055};
2056
f5fcc13c 2057static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2058 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2059 [STAC_D965_REF] = "ref",
2060 [STAC_D965_3ST] = "3stack",
2061 [STAC_D965_5ST] = "5stack",
2062 [STAC_DELL_3ST] = "dell-3stack",
2063 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2064};
2065
2066static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2067 /* SigmaTel reference board */
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2069 "DFI LanParty", STAC_D965_REF),
81d3dbde 2070 /* Intel 946 based systems */
f5fcc13c
TI		 2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2073 /* 965 based 3 stack systems */
f5fcc13c
TI		 2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2090 /* Dell 3 stack systems */
8e9068b1 2091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2095 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2104 /* 965 based 5 stack systems */
f5fcc13c
TI		 2105 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2112 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2114 {} /* terminator */
2115};
2116
f3302a59
MP		 2117static unsigned int ref9205_pin_configs[12] = {
2118 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2119 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2120 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2121};
2122
dfe495d0
TI		 2123/*
2124 STAC 9205 pin configs for
2125 102801F1
2126 102801F2
2127 102801FC
2128 102801FD
2129 10280204
2130 1028021F
3fa2ef74 2131 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2132*/
2133static unsigned int dell_9205_m42_pin_configs[12] = {
2134 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2135 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2136 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2137};
2138
2139/*
2140 STAC 9205 pin configs for
2141 102801F9
2142 102801FA
2143 102801FE
2144 102801FF (Dell Precision M4300)
2145 10280206
2146 10280200
2147 10280201
2148*/
2149static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2150 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2151 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2152 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2153};
2154
dfe495d0 2155static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2156 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2157 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2158 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2159};
2160
f5fcc13c 2161static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2162 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2163 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2164 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2165 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2166};
2167
f5fcc13c
TI		 2168static const char *stac9205_models[STAC_9205_MODELS] = {
2169 [STAC_9205_REF] = "ref",
dfe495d0 2170 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2171 [STAC_9205_DELL_M43] = "dell-m43",
2172 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2173};
2174
2175static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2176 /* SigmaTel reference board */
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2178 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2180 "unknown Dell", STAC_9205_DELL_M42),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2182 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2184 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2186 "Dell Precision", STAC_9205_DELL_M43),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2188 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2190 "unknown Dell", STAC_9205_DELL_M42),
2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2192 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2194 "Dell Precision", STAC_9205_DELL_M43),
2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2196 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2198 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2200 "Dell Precision", STAC_9205_DELL_M43),
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2202 "Dell Precision", STAC_9205_DELL_M43),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2204 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2206 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2208 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2209 {} /* terminator */
2210};
2211
11b44bbd
RF		 2212static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2213{
2214 int i;
2215 struct sigmatel_spec *spec = codec->spec;
2216
af9f341a
TI		 2217 kfree(spec->pin_configs);
2218 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2219 GFP_KERNEL);
2220 if (!spec->pin_configs)
2221 return -ENOMEM;
11b44bbd
RF		 2222
2223 for (i = 0; i < spec->num_pins; i++) {
2224 hda_nid_t nid = spec->pin_nids[i];
2225 unsigned int pin_cfg;
2226
2227 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2228 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2229 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2230 nid, pin_cfg);
af9f341a 2231 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2232 }
2233
2234 return 0;
2235}
2236
87d48363
MR		 2237static void stac92xx_set_config_reg(struct hda_codec *codec,
2238 hda_nid_t pin_nid, unsigned int pin_config)
2239{
2240 int i;
2241 snd_hda_codec_write(codec, pin_nid, 0,
2242 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2243 pin_config & 0x000000ff);
2244 snd_hda_codec_write(codec, pin_nid, 0,
2245 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2246 (pin_config & 0x0000ff00) >> 8);
2247 snd_hda_codec_write(codec, pin_nid, 0,
2248 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2249 (pin_config & 0x00ff0000) >> 16);
2250 snd_hda_codec_write(codec, pin_nid, 0,
2251 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2252 pin_config >> 24);
2253 i = snd_hda_codec_read(codec, pin_nid, 0,
2254 AC_VERB_GET_CONFIG_DEFAULT,
2255 0x00);
2256 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2257 pin_nid, i);
2258}
2259
2f2f4251
M		 2260static void stac92xx_set_config_regs(struct hda_codec *codec)
2261{
2262 int i;
2263 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2264
87d48363
MR		 2265 if (!spec->pin_configs)
2266 return;
11b44bbd 2267
87d48363
MR		 2268 for (i = 0; i < spec->num_pins; i++)
2269 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2270 spec->pin_configs[i]);
2f2f4251 2271}
2f2f4251 2272
af9f341a
TI		 2273static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2274{
2275 struct sigmatel_spec *spec = codec->spec;
2276
2277 if (!pins)
2278 return stac92xx_save_bios_config_regs(codec);
2279
2280 kfree(spec->pin_configs);
2281 spec->pin_configs = kmemdup(pins,
2282 spec->num_pins * sizeof(*pins),
2283 GFP_KERNEL);
2284 if (!spec->pin_configs)
2285 return -ENOMEM;
2286
2287 stac92xx_set_config_regs(codec);
2288 return 0;
2289}
2290
2291static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2292 unsigned int cfg)
2293{
2294 struct sigmatel_spec *spec = codec->spec;
2295 int i;
2296
2297 for (i = 0; i < spec->num_pins; i++) {
2298 if (spec->pin_nids[i] == nid) {
2299 spec->pin_configs[i] = cfg;
2300 stac92xx_set_config_reg(codec, nid, cfg);
2301 break;
2302 }
2303 }
2304}
2305
dabbed6f 2306/*
c7d4b2fa 2307 * Analog playback callbacks
dabbed6f 2308 */
c7d4b2fa
M		 2309static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2310 struct hda_codec *codec,
c8b6bf9b 2311 struct snd_pcm_substream *substream)
2f2f4251 2312{
dabbed6f 2313 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2314 if (spec->stream_delay)
2315 msleep(spec->stream_delay);
9a08160b
TI		 2316 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2317 hinfo);
2f2f4251
M		 2318}
2319
2f2f4251
M		 2320static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2321 struct hda_codec *codec,
2322 unsigned int stream_tag,
2323 unsigned int format,
c8b6bf9b 2324 struct snd_pcm_substream *substream)
2f2f4251
M		 2325{
2326 struct sigmatel_spec *spec = codec->spec;
403d1944 2327 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2328}
2329
2330static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2331 struct hda_codec *codec,
c8b6bf9b 2332 struct snd_pcm_substream *substream)
2f2f4251
M		 2333{
2334 struct sigmatel_spec *spec = codec->spec;
2335 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2336}
2337
dabbed6f
M		 2338/*
2339 * Digital playback callbacks
2340 */
2341static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2342 struct hda_codec *codec,
c8b6bf9b 2343 struct snd_pcm_substream *substream)
dabbed6f
M		 2344{
2345 struct sigmatel_spec *spec = codec->spec;
2346 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2347}
2348
2349static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2350 struct hda_codec *codec,
c8b6bf9b 2351 struct snd_pcm_substream *substream)
dabbed6f
M		 2352{
2353 struct sigmatel_spec *spec = codec->spec;
2354 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2355}
2356
6b97eb45
TI		 2357static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2358 struct hda_codec *codec,
2359 unsigned int stream_tag,
2360 unsigned int format,
2361 struct snd_pcm_substream *substream)
2362{
2363 struct sigmatel_spec *spec = codec->spec;
2364 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2365 stream_tag, format, substream);
2366}
2367
dabbed6f 2368
2f2f4251
M		 2369/*
2370 * Analog capture callbacks
2371 */
2372static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2373 struct hda_codec *codec,
2374 unsigned int stream_tag,
2375 unsigned int format,
c8b6bf9b 2376 struct snd_pcm_substream *substream)
2f2f4251
M		 2377{
2378 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2379 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2380
8daaaa97
MR		 2381 if (spec->powerdown_adcs) {
2382 msleep(40);
8c2f767b 2383 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2384 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2385 }
2386 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2387 return 0;
2388}
2389
2390static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
c8b6bf9b 2392 struct snd_pcm_substream *substream)
2f2f4251
M		 2393{
2394 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2395 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2396
8daaaa97
MR		 2397 snd_hda_codec_cleanup_stream(codec, nid);
2398 if (spec->powerdown_adcs)
8c2f767b 2399 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2400 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2401 return 0;
2402}
2403
dabbed6f
M		 2404static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2405 .substreams = 1,
2406 .channels_min = 2,
2407 .channels_max = 2,
2408 /* NID is set in stac92xx_build_pcms */
2409 .ops = {
2410 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2411 .close = stac92xx_dig_playback_pcm_close,
2412 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2413 },
2414};
2415
2416static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2417 .substreams = 1,
2418 .channels_min = 2,
2419 .channels_max = 2,
2420 /* NID is set in stac92xx_build_pcms */
2421};
2422
2f2f4251
M		 2423static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2424 .substreams = 1,
2425 .channels_min = 2,
c7d4b2fa 2426 .channels_max = 8,
2f2f4251
M		 2427 .nid = 0x02, /* NID to query formats and rates */
2428 .ops = {
2429 .open = stac92xx_playback_pcm_open,
2430 .prepare = stac92xx_playback_pcm_prepare,
2431 .cleanup = stac92xx_playback_pcm_cleanup
2432 },
2433};
2434
3cc08dc6
MP		 2435static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2436 .substreams = 1,
2437 .channels_min = 2,
2438 .channels_max = 2,
2439 .nid = 0x06, /* NID to query formats and rates */
2440 .ops = {
2441 .open = stac92xx_playback_pcm_open,
2442 .prepare = stac92xx_playback_pcm_prepare,
2443 .cleanup = stac92xx_playback_pcm_cleanup
2444 },
2445};
2446
2f2f4251 2447static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2448 .channels_min = 2,
2449 .channels_max = 2,
9e05b7a3 2450 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2451 .ops = {
2452 .prepare = stac92xx_capture_pcm_prepare,
2453 .cleanup = stac92xx_capture_pcm_cleanup
2454 },
2455};
2456
2457static int stac92xx_build_pcms(struct hda_codec *codec)
2458{
2459 struct sigmatel_spec *spec = codec->spec;
2460 struct hda_pcm *info = spec->pcm_rec;
2461
2462 codec->num_pcms = 1;
2463 codec->pcm_info = info;
2464
c7d4b2fa 2465 info->name = "STAC92xx Analog";
2f2f4251 2466 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2467 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2468 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2469 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2470
2471 if (spec->alt_switch) {
2472 codec->num_pcms++;
2473 info++;
2474 info->name = "STAC92xx Analog Alt";
2475 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2476 }
2f2f4251 2477
dabbed6f
M		 2478 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2479 codec->num_pcms++;
2480 info++;
2481 info->name = "STAC92xx Digital";
7ba72ba1 2482 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2483 if (spec->multiout.dig_out_nid) {
2484 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2485 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2486 }
2487 if (spec->dig_in_nid) {
2488 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2489 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2490 }
2491 }
2492
2f2f4251
M		 2493 return 0;
2494}
2495
c960a03b
TI		 2496static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2497{
2498 unsigned int pincap = snd_hda_param_read(codec, nid,
2499 AC_PAR_PIN_CAP);
2500 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2501 if (pincap & AC_PINCAP_VREF_100)
2502 return AC_PINCTL_VREF_100;
2503 if (pincap & AC_PINCAP_VREF_80)
2504 return AC_PINCTL_VREF_80;
2505 if (pincap & AC_PINCAP_VREF_50)
2506 return AC_PINCTL_VREF_50;
2507 if (pincap & AC_PINCAP_VREF_GRD)
2508 return AC_PINCTL_VREF_GRD;
2509 return 0;
2510}
2511
403d1944
MP		 2512static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2513
2514{
82beb8fd
TI		 2515 snd_hda_codec_write_cache(codec, nid, 0,
2516 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2517}
2518
7c2ba97b
MR		 2519#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2520
2521static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2522 struct snd_ctl_elem_value *ucontrol)
2523{
2524 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2525 struct sigmatel_spec *spec = codec->spec;
2526
d7a89436 2527 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2528 return 0;
2529}
2530
c6e4c666
TI		 2531static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2532 unsigned char type);
2533
7c2ba97b
MR		 2534static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2535 struct snd_ctl_elem_value *ucontrol)
2536{
2537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2538 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2539 int nid = kcontrol->private_value;
2540
2541 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2542
2543 /* check to be sure that the ports are upto date with
2544 * switch changes
2545 */
c6e4c666 2546 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2547
2548 return 1;
2549}
2550
a5ce8890 2551#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2552
2553static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2554{
2555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2556 struct sigmatel_spec *spec = codec->spec;
2557 int io_idx = kcontrol-> private_value & 0xff;
2558
2559 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2560 return 0;
2561}
2562
2563static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2564{
2565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2566 struct sigmatel_spec *spec = codec->spec;
2567 hda_nid_t nid = kcontrol->private_value >> 8;
2568 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2569 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2570
2571 spec->io_switch[io_idx] = val;
2572
2573 if (val)
2574 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2575 else {
2576 unsigned int pinctl = AC_PINCTL_IN_EN;
2577 if (io_idx) /* set VREF for mic */
2578 pinctl |= stac92xx_get_vref(codec, nid);
2579 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2580 }
40c1d308
JZ		 2581
2582 /* check the auto-mute again: we need to mute/unmute the speaker
2583 * appropriately according to the pin direction
2584 */
2585 if (spec->hp_detect)
c6e4c666 2586 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2587
403d1944
MP		 2588 return 1;
2589}
2590
0fb87bb4
ML		 2591#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2592
2593static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2594 struct snd_ctl_elem_value *ucontrol)
2595{
2596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2597 struct sigmatel_spec *spec = codec->spec;
2598
2599 ucontrol->value.integer.value[0] = spec->clfe_swap;
2600 return 0;
2601}
2602
2603static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2604 struct snd_ctl_elem_value *ucontrol)
2605{
2606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2607 struct sigmatel_spec *spec = codec->spec;
2608 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2609 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2610
68ea7b2f 2611 if (spec->clfe_swap == val)
0fb87bb4
ML		 2612 return 0;
2613
68ea7b2f 2614 spec->clfe_swap = val;
0fb87bb4
ML		 2615
2616 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2617 spec->clfe_swap ? 0x4 : 0x0);
2618
2619 return 1;
2620}
2621
7c2ba97b
MR		 2622#define STAC_CODEC_HP_SWITCH(xname) \
2623 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2624 .name = xname, \
2625 .index = 0, \
2626 .info = stac92xx_hp_switch_info, \
2627 .get = stac92xx_hp_switch_get, \
2628 .put = stac92xx_hp_switch_put, \
2629 }
2630
403d1944
MP		 2631#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2632 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2633 .name = xname, \
2634 .index = 0, \
2635 .info = stac92xx_io_switch_info, \
2636 .get = stac92xx_io_switch_get, \
2637 .put = stac92xx_io_switch_put, \
2638 .private_value = xpval, \
2639 }
2640
0fb87bb4
ML		 2641#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2642 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2643 .name = xname, \
2644 .index = 0, \
2645 .info = stac92xx_clfe_switch_info, \
2646 .get = stac92xx_clfe_switch_get, \
2647 .put = stac92xx_clfe_switch_put, \
2648 .private_value = xpval, \
2649 }
403d1944 2650
c7d4b2fa
M		 2651enum {
2652 STAC_CTL_WIDGET_VOL,
2653 STAC_CTL_WIDGET_MUTE,
09a99959 2654 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2655 STAC_CTL_WIDGET_AMP_MUX,
2656 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2657 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2658 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2659 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2660};
2661
c8b6bf9b 2662static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2663 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2664 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2665 STAC_MONO_MUX,
89385035
MR		 2666 STAC_AMP_MUX,
2667 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2668 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2669 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2670 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2671};
2672
2673/* add dynamic controls */
4d4e9bb3
TI		 2674static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2675 struct snd_kcontrol_new *ktemp,
2676 int idx, const char *name,
2677 unsigned long val)
c7d4b2fa 2678{
c8b6bf9b 2679 struct snd_kcontrol_new *knew;
c7d4b2fa 2680
603c4019
TI		 2681 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2682 knew = snd_array_new(&spec->kctls);
2683 if (!knew)
2684 return -ENOMEM;
4d4e9bb3 2685 *knew = *ktemp;
4682eee0 2686 knew->index = idx;
82fe0c58 2687 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2688 if (!knew->name)
c7d4b2fa
M		 2689 return -ENOMEM;
2690 knew->private_value = val;
c7d4b2fa
M		 2691 return 0;
2692}
2693
4d4e9bb3
TI		 2694static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2695 int type, int idx, const char *name,
2696 unsigned long val)
2697{
2698 return stac92xx_add_control_temp(spec,
2699 &stac92xx_control_templates[type],
2700 idx, name, val);
2701}
2702
4682eee0
MR		 2703
2704/* add dynamic controls */
4d4e9bb3
TI		 2705static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2706 const char *name, unsigned long val)
4682eee0
MR		 2707{
2708 return stac92xx_add_control_idx(spec, type, 0, name, val);
2709}
2710
c21ca4a8
TI		 2711/* check whether the line-input can be used as line-out */
2712static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2713{
2714 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2715 struct auto_pin_cfg *cfg = &spec->autocfg;
2716 hda_nid_t nid;
2717 unsigned int pincap;
8e9068b1 2718
c21ca4a8
TI		 2719 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2720 return 0;
2721 nid = cfg->input_pins[AUTO_PIN_LINE];
2722 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2723 if (pincap & AC_PINCAP_OUT)
2724 return nid;
2725 return 0;
2726}
403d1944 2727
c21ca4a8
TI		 2728/* check whether the mic-input can be used as line-out */
2729static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2730{
2731 struct sigmatel_spec *spec = codec->spec;
2732 struct auto_pin_cfg *cfg = &spec->autocfg;
2733 unsigned int def_conf, pincap;
2734 unsigned int mic_pin;
2735
2736 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2737 return 0;
2738 mic_pin = AUTO_PIN_MIC;
2739 for (;;) {
2740 hda_nid_t nid = cfg->input_pins[mic_pin];
2741 def_conf = snd_hda_codec_read(codec, nid, 0,
2742 AC_VERB_GET_CONFIG_DEFAULT, 0);
2743 /* some laptops have an internal analog microphone
2744 * which can't be used as a output */
2745 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2746 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2747 if (pincap & AC_PINCAP_OUT)
2748 return nid;
403d1944 2749 }
c21ca4a8
TI		 2750 if (mic_pin == AUTO_PIN_MIC)
2751 mic_pin = AUTO_PIN_FRONT_MIC;
2752 else
2753 break;
403d1944 2754 }
403d1944
MP		 2755 return 0;
2756}
2757
7b043899
SL		 2758static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2759{
2760 int i;
2761
2762 for (i = 0; i < spec->multiout.num_dacs; i++) {
2763 if (spec->multiout.dac_nids[i] == nid)
2764 return 1;
2765 }
2766
2767 return 0;
2768}
2769
c21ca4a8
TI		 2770static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2771{
2772 int i;
2773 if (is_in_dac_nids(spec, nid))
2774 return 1;
2775 for (i = 0; i < spec->autocfg.hp_outs; i++)
2776 if (spec->hp_dacs[i] == nid)
2777 return 1;
2778 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2779 if (spec->speaker_dacs[i] == nid)
2780 return 1;
2781 return 0;
2782}
2783
2784static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2785{
2786 struct sigmatel_spec *spec = codec->spec;
2787 int j, conn_len;
2788 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2789 unsigned int wcaps, wtype;
2790
2791 conn_len = snd_hda_get_connections(codec, nid, conn,
2792 HDA_MAX_CONNECTIONS);
2793 for (j = 0; j < conn_len; j++) {
2794 wcaps = snd_hda_param_read(codec, conn[j],
2795 AC_PAR_AUDIO_WIDGET_CAP);
2796 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2797 /* we check only analog outputs */
2798 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2799 continue;
2800 /* if this route has a free DAC, assign it */
2801 if (!check_all_dac_nids(spec, conn[j])) {
2802 if (conn_len > 1) {
2803 /* select this DAC in the pin's input mux */
2804 snd_hda_codec_write_cache(codec, nid, 0,
2805 AC_VERB_SET_CONNECT_SEL, j);
2806 }
2807 return conn[j];
2808 }
2809 }
2810 return 0;
2811}
2812
2813static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2814static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2815
3cc08dc6 2816/*
7b043899
SL		 2817 * Fill in the dac_nids table from the parsed pin configuration
2818 * This function only works when every pin in line_out_pins[]
2819 * contains atleast one DAC in its connection list. Some 92xx
2820 * codecs are not connected directly to a DAC, such as the 9200
2821 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2822 */
c21ca4a8 2823static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2824{
2825 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2826 struct auto_pin_cfg *cfg = &spec->autocfg;
2827 int i;
2828 hda_nid_t nid, dac;
7b043899 2829
c7d4b2fa
M		 2830 for (i = 0; i < cfg->line_outs; i++) {
2831 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2832 dac = get_unassigned_dac(codec, nid);
2833 if (!dac) {
df802952
TI		 2834 if (spec->multiout.num_dacs > 0) {
2835 /* we have already working output pins,
2836 * so let's drop the broken ones again
2837 */
2838 cfg->line_outs = spec->multiout.num_dacs;
2839 break;
2840 }
7b043899
SL		 2841 /* error out, no available DAC found */
2842 snd_printk(KERN_ERR
2843 "%s: No available DAC for pin 0x%x\n",
2844 __func__, nid);
2845 return -ENODEV;
2846 }
c21ca4a8
TI		 2847 add_spec_dacs(spec, dac);
2848 }
7b043899 2849
c21ca4a8
TI		 2850 /* add line-in as output */
2851 nid = check_line_out_switch(codec);
2852 if (nid) {
2853 dac = get_unassigned_dac(codec, nid);
2854 if (dac) {
2855 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2856 nid, cfg->line_outs);
2857 cfg->line_out_pins[cfg->line_outs] = nid;
2858 cfg->line_outs++;
2859 spec->line_switch = nid;
2860 add_spec_dacs(spec, dac);
2861 }
2862 }
2863 /* add mic as output */
2864 nid = check_mic_out_switch(codec);
2865 if (nid) {
2866 dac = get_unassigned_dac(codec, nid);
2867 if (dac) {
2868 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2869 nid, cfg->line_outs);
2870 cfg->line_out_pins[cfg->line_outs] = nid;
2871 cfg->line_outs++;
2872 spec->mic_switch = nid;
2873 add_spec_dacs(spec, dac);
2874 }
2875 }
c7d4b2fa 2876
c21ca4a8
TI		 2877 for (i = 0; i < cfg->hp_outs; i++) {
2878 nid = cfg->hp_pins[i];
2879 dac = get_unassigned_dac(codec, nid);
2880 if (dac) {
2881 if (!spec->multiout.hp_nid)
2882 spec->multiout.hp_nid = dac;
2883 else
2884 add_spec_extra_dacs(spec, dac);
7b043899 2885 }
c21ca4a8
TI		 2886 spec->hp_dacs[i] = dac;
2887 }
2888
2889 for (i = 0; i < cfg->speaker_outs; i++) {
2890 nid = cfg->speaker_pins[i];
2891 dac = get_unassigned_dac(codec, nid);
2892 if (dac)
2893 add_spec_extra_dacs(spec, dac);
2894 spec->speaker_dacs[i] = dac;
7b043899 2895 }
c7d4b2fa 2896
c21ca4a8 2897 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2898 spec->multiout.num_dacs,
2899 spec->multiout.dac_nids[0],
2900 spec->multiout.dac_nids[1],
2901 spec->multiout.dac_nids[2],
2902 spec->multiout.dac_nids[3],
2903 spec->multiout.dac_nids[4]);
c21ca4a8 2904
c7d4b2fa
M		 2905 return 0;
2906}
2907
eb06ed8f
TI		 2908/* create volume control/switch for the given prefx type */
2909static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2910{
2911 char name[32];
2912 int err;
2913
2914 sprintf(name, "%s Playback Volume", pfx);
2915 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2916 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2917 if (err < 0)
2918 return err;
2919 sprintf(name, "%s Playback Switch", pfx);
2920 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2921 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2922 if (err < 0)
2923 return err;
2924 return 0;
2925}
2926
ae0afd81
MR		 2927static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2928{
c21ca4a8 2929 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 2930 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2931 return 1;
2932 } else {
2933 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2934 spec->multiout.num_dacs++;
2935 }
2936 return 0;
2937}
2938
c21ca4a8 2939static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 2940{
c21ca4a8
TI		 2941 int i;
2942 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
2943 if (!spec->multiout.extra_out_nid[i]) {
2944 spec->multiout.extra_out_nid[i] = nid;
2945 return 0;
2946 }
2947 }
2948 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
2949 return 1;
ae0afd81
MR		 2950}
2951
c7d4b2fa 2952/* add playback controls from the parsed DAC table */
0fb87bb4 2953static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2954 const struct auto_pin_cfg *cfg)
c7d4b2fa 2955{
19039bd0
TI		 2956 static const char *chname[4] = {
2957 "Front", "Surround", NULL /*CLFE*/, "Side"
2958 };
d21995e3 2959 hda_nid_t nid = 0;
c7d4b2fa
M		 2960 int i, err;
2961
0fb87bb4 2962 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2963 unsigned int wid_caps, pincap;
0fb87bb4 2964
c21ca4a8 2965 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 2966 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 2967 if (i == 2) {
2968 /* Center/LFE */
eb06ed8f
TI		 2969 err = create_controls(spec, "Center", nid, 1);
2970 if (err < 0)
c7d4b2fa 2971 return err;
eb06ed8f
TI		 2972 err = create_controls(spec, "LFE", nid, 2);
2973 if (err < 0)
c7d4b2fa 2974 return err;
0fb87bb4
ML		 2975
2976 wid_caps = get_wcaps(codec, nid);
2977
2978 if (wid_caps & AC_WCAP_LR_SWAP) {
2979 err = stac92xx_add_control(spec,
2980 STAC_CTL_WIDGET_CLFE_SWITCH,
2981 "Swap Center/LFE Playback Switch", nid);
2982
2983 if (err < 0)
2984 return err;
2985 }
2986
c7d4b2fa 2987 } else {
eb06ed8f
TI		 2988 err = create_controls(spec, chname[i], nid, 3);
2989 if (err < 0)
c7d4b2fa
M		 2990 return err;
2991 }
2992 }
2993
a9cb5c90 2994 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2995 err = stac92xx_add_control(spec,
2996 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2997 "Headphone as Line Out Switch",
2998 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2999 if (err < 0)
3000 return err;
3001 }
3002
b5895dc8 3003 if (spec->line_switch) {
c21ca4a8
TI		 3004 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3005 "Line In as Output Switch",
3006 spec->line_switch << 8);
3007 if (err < 0)
3008 return err;
b5895dc8 3009 }
403d1944 3010
b5895dc8 3011 if (spec->mic_switch) {
c21ca4a8
TI		 3012 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3013 "Mic as Output Switch",
3014 (spec->mic_switch << 8) | 1);
3015 if (err < 0)
3016 return err;
b5895dc8 3017 }
403d1944 3018
c7d4b2fa
M		 3019 return 0;
3020}
3021
eb06ed8f
TI		 3022/* add playback controls for Speaker and HP outputs */
3023static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3024 struct auto_pin_cfg *cfg)
3025{
3026 struct sigmatel_spec *spec = codec->spec;
3027 hda_nid_t nid;
c21ca4a8 3028 int i, err, nums;
eb06ed8f 3029
c21ca4a8 3030 nums = 0;
eb06ed8f 3031 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3032 static const char *pfxs[] = {
3033 "Headphone", "Headphone2", "Headphone3",
3034 };
eb06ed8f
TI		 3035 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3036 if (wid_caps & AC_WCAP_UNSOL_CAP)
3037 spec->hp_detect = 1;
c21ca4a8 3038 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3039 continue;
c21ca4a8
TI		 3040 nid = spec->hp_dacs[i];
3041 if (!nid)
eb06ed8f 3042 continue;
c21ca4a8
TI		 3043 err = create_controls(spec, pfxs[nums++], nid, 3);
3044 if (err < 0)
3045 return err;
1b290a51 3046 }
c21ca4a8
TI		 3047 nums = 0;
3048 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3049 static const char *pfxs[] = {
3050 "Speaker", "External Speaker", "Speaker2",
3051 };
c21ca4a8
TI		 3052 if (nums >= ARRAY_SIZE(pfxs))
3053 continue;
3054 nid = spec->speaker_dacs[i];
3055 if (!nid)
3056 continue;
3057 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3058 if (err < 0)
3059 return err;
3060 }
c7d4b2fa
M		 3061 return 0;
3062}
3063
b22b4821 3064/* labels for mono mux outputs */
d0513fc6
MR		 3065static const char *stac92xx_mono_labels[4] = {
3066 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3067};
3068
3069/* create mono mux for mono out on capable codecs */
3070static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3071{
3072 struct sigmatel_spec *spec = codec->spec;
3073 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3074 int i, num_cons;
3075 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3076
3077 num_cons = snd_hda_get_connections(codec,
3078 spec->mono_nid,
3079 con_lst,
3080 HDA_MAX_NUM_INPUTS);
3081 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3082 return -EINVAL;
3083
3084 for (i = 0; i < num_cons; i++) {
3085 mono_mux->items[mono_mux->num_items].label =
3086 stac92xx_mono_labels[i];
3087 mono_mux->items[mono_mux->num_items].index = i;
3088 mono_mux->num_items++;
3089 }
09a99959
MR		 3090
3091 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3092 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3093}
3094
89385035
MR		 3095/* labels for amp mux outputs */
3096static const char *stac92xx_amp_labels[3] = {
4b33c767 3097 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3098};
3099
3100/* create amp out controls mux on capable codecs */
3101static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3102{
3103 struct sigmatel_spec *spec = codec->spec;
3104 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3105 int i, err;
3106
2a9c7816 3107 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3108 amp_mux->items[amp_mux->num_items].label =
3109 stac92xx_amp_labels[i];
3110 amp_mux->items[amp_mux->num_items].index = i;
3111 amp_mux->num_items++;
3112 }
3113
2a9c7816
MR		 3114 if (spec->num_amps > 1) {
3115 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3116 "Amp Selector Capture Switch", 0);
3117 if (err < 0)
3118 return err;
3119 }
89385035
MR		 3120 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3121 "Amp Capture Volume",
3122 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3123}
3124
3125
1cd2224c
MR		 3126/* create PC beep volume controls */
3127static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3128 hda_nid_t nid)
3129{
3130 struct sigmatel_spec *spec = codec->spec;
3131 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3132 int err;
3133
3134 /* check for mute support for the the amp */
3135 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3136 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3137 "PC Beep Playback Switch",
3138 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3139 if (err < 0)
3140 return err;
3141 }
3142
3143 /* check to see if there is volume support for the amp */
3144 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3145 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3146 "PC Beep Playback Volume",
3147 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3148 if (err < 0)
3149 return err;
3150 }
3151 return 0;
3152}
3153
4d4e9bb3
TI		 3154#ifdef CONFIG_SND_HDA_INPUT_BEEP
3155#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3156
3157static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3158 struct snd_ctl_elem_value *ucontrol)
3159{
3160 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3161 ucontrol->value.integer.value[0] = codec->beep->enabled;
3162 return 0;
3163}
3164
3165static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3166 struct snd_ctl_elem_value *ucontrol)
3167{
3168 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3169 int enabled = !!ucontrol->value.integer.value[0];
3170 if (codec->beep->enabled != enabled) {
3171 codec->beep->enabled = enabled;
3172 return 1;
3173 }
3174 return 0;
3175}
3176
3177static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3178 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3179 .info = stac92xx_dig_beep_switch_info,
3180 .get = stac92xx_dig_beep_switch_get,
3181 .put = stac92xx_dig_beep_switch_put,
3182};
3183
3184static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3185{
3186 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3187 0, "PC Beep Playback Switch", 0);
3188}
3189#endif
3190
4682eee0
MR		 3191static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3192{
3193 struct sigmatel_spec *spec = codec->spec;
3194 int wcaps, nid, i, err = 0;
3195
3196 for (i = 0; i < spec->num_muxes; i++) {
3197 nid = spec->mux_nids[i];
3198 wcaps = get_wcaps(codec, nid);
3199
3200 if (wcaps & AC_WCAP_OUT_AMP) {
3201 err = stac92xx_add_control_idx(spec,
3202 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3203 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3204 if (err < 0)
3205 return err;
3206 }
3207 }
3208 return 0;
3209};
3210
d9737751 3211static const char *stac92xx_spdif_labels[3] = {
65973632 3212 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3213};
3214
3215static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3216{
3217 struct sigmatel_spec *spec = codec->spec;
3218 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3219 const char **labels = spec->spdif_labels;
d9737751 3220 int i, num_cons;
65973632 3221 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3222
3223 num_cons = snd_hda_get_connections(codec,
3224 spec->smux_nids[0],
3225 con_lst,
3226 HDA_MAX_NUM_INPUTS);
65973632 3227 if (!num_cons)
d9737751
MR		 3228 return -EINVAL;
3229
65973632
MR		 3230 if (!labels)
3231 labels = stac92xx_spdif_labels;
3232
d9737751 3233 for (i = 0; i < num_cons; i++) {
65973632 3234 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3235 spdif_mux->items[spdif_mux->num_items].index = i;
3236 spdif_mux->num_items++;
3237 }
3238
3239 return 0;
3240}
3241
8b65727b 3242/* labels for dmic mux inputs */
ddc2cec4 3243static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3244 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3245 "Digital Mic 3", "Digital Mic 4"
3246};
3247
3248/* create playback/capture controls for input pins on dmic capable codecs */
3249static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3250 const struct auto_pin_cfg *cfg)
3251{
3252 struct sigmatel_spec *spec = codec->spec;
3253 struct hda_input_mux *dimux = &spec->private_dimux;
3254 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3255 int err, i, j;
3256 char name[32];
8b65727b
MP		 3257
3258 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3259 dimux->items[dimux->num_items].index = 0;
3260 dimux->num_items++;
3261
3262 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3263 hda_nid_t nid;
8b65727b
MP		 3264 int index;
3265 int num_cons;
0678accd 3266 unsigned int wcaps;
8b65727b
MP		 3267 unsigned int def_conf;
3268
3269 def_conf = snd_hda_codec_read(codec,
3270 spec->dmic_nids[i],
3271 0,
3272 AC_VERB_GET_CONFIG_DEFAULT,
3273 0);
3274 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3275 continue;
3276
0678accd 3277 nid = spec->dmic_nids[i];
8b65727b 3278 num_cons = snd_hda_get_connections(codec,
e1f0d669 3279 spec->dmux_nids[0],
8b65727b
MP		 3280 con_lst,
3281 HDA_MAX_NUM_INPUTS);
3282 for (j = 0; j < num_cons; j++)
0678accd 3283 if (con_lst[j] == nid) {
8b65727b
MP		 3284 index = j;
3285 goto found;
3286 }
3287 continue;
3288found:
d0513fc6
MR		 3289 wcaps = get_wcaps(codec, nid) &
3290 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3291
d0513fc6 3292 if (wcaps) {
0678accd
MR		 3293 sprintf(name, "%s Capture Volume",
3294 stac92xx_dmic_labels[dimux->num_items]);
3295
3296 err = stac92xx_add_control(spec,
3297 STAC_CTL_WIDGET_VOL,
3298 name,
d0513fc6
MR		 3299 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3300 (wcaps & AC_WCAP_OUT_AMP) ?
3301 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3302 if (err < 0)
3303 return err;
3304 }
3305
8b65727b
MP		 3306 dimux->items[dimux->num_items].label =
3307 stac92xx_dmic_labels[dimux->num_items];
3308 dimux->items[dimux->num_items].index = index;
3309 dimux->num_items++;
3310 }
3311
3312 return 0;
3313}
3314
c7d4b2fa
M		 3315/* create playback/capture controls for input pins */
3316static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3317{
3318 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3319 struct hda_input_mux *imux = &spec->private_imux;
3320 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3321 int i, j, k;
3322
3323 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3324 int index;
3325
3326 if (!cfg->input_pins[i])
3327 continue;
3328 index = -1;
3329 for (j = 0; j < spec->num_muxes; j++) {
3330 int num_cons;
3331 num_cons = snd_hda_get_connections(codec,
3332 spec->mux_nids[j],
3333 con_lst,
3334 HDA_MAX_NUM_INPUTS);
3335 for (k = 0; k < num_cons; k++)
3336 if (con_lst[k] == cfg->input_pins[i]) {
3337 index = k;
3338 goto found;
3339 }
c7d4b2fa 3340 }
314634bc
TI		 3341 continue;
3342 found:
3343 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3344 imux->items[imux->num_items].index = index;
3345 imux->num_items++;
c7d4b2fa
M		 3346 }
3347
7b043899 3348 if (imux->num_items) {
62fe78e9
SR		 3349 /*
3350 * Set the current input for the muxes.
3351 * The STAC9221 has two input muxes with identical source
3352 * NID lists. Hopefully this won't get confused.
3353 */
3354 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3355 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3356 AC_VERB_SET_CONNECT_SEL,
3357 imux->items[0].index);
62fe78e9
SR		 3358 }
3359 }
3360
c7d4b2fa
M		 3361 return 0;
3362}
3363
c7d4b2fa
M		 3364static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3365{
3366 struct sigmatel_spec *spec = codec->spec;
3367 int i;
3368
3369 for (i = 0; i < spec->autocfg.line_outs; i++) {
3370 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3371 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3372 }
3373}
3374
3375static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3376{
3377 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3378 int i;
c7d4b2fa 3379
eb06ed8f
TI		 3380 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3381 hda_nid_t pin;
3382 pin = spec->autocfg.hp_pins[i];
3383 if (pin) /* connect to front */
3384 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3385 }
3386 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3387 hda_nid_t pin;
3388 pin = spec->autocfg.speaker_pins[i];
3389 if (pin) /* connect to front */
3390 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3391 }
c7d4b2fa
M		 3392}
3393
3cc08dc6 3394static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3395{
3396 struct sigmatel_spec *spec = codec->spec;
3397 int err;
3398
8b65727b
MP		 3399 if ((err = snd_hda_parse_pin_def_config(codec,
3400 &spec->autocfg,
3401 spec->dmic_nids)) < 0)
c7d4b2fa 3402 return err;
82bc955f 3403 if (! spec->autocfg.line_outs)
869264c4 3404 return 0; /* can't find valid pin config */
19039bd0 3405
bcecd9bd
JZ		 3406 /* If we have no real line-out pin and multiple hp-outs, HPs should
3407 * be set up as multi-channel outputs.
3408 */
3409 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3410 spec->autocfg.hp_outs > 1) {
3411 /* Copy hp_outs to line_outs, backup line_outs in
3412 * speaker_outs so that the following routines can handle
3413 * HP pins as primary outputs.
3414 */
c21ca4a8 3415 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3416 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3417 sizeof(spec->autocfg.line_out_pins));
3418 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3419 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3420 sizeof(spec->autocfg.hp_pins));
3421 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3422 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3423 spec->autocfg.hp_outs = 0;
bcecd9bd 3424 }
09a99959 3425 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3426 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3427 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3428 u32 caps = query_amp_caps(codec,
3429 spec->autocfg.mono_out_pin, dir);
3430 hda_nid_t conn_list[1];
3431
3432 /* get the mixer node and then the mono mux if it exists */
3433 if (snd_hda_get_connections(codec,
3434 spec->autocfg.mono_out_pin, conn_list, 1) &&
3435 snd_hda_get_connections(codec, conn_list[0],
3436 conn_list, 1)) {
3437
3438 int wcaps = get_wcaps(codec, conn_list[0]);
3439 int wid_type = (wcaps & AC_WCAP_TYPE)
3440 >> AC_WCAP_TYPE_SHIFT;
3441 /* LR swap check, some stac925x have a mux that
3442 * changes the DACs output path instead of the
3443 * mono-mux path.
3444 */
3445 if (wid_type == AC_WID_AUD_SEL &&
3446 !(wcaps & AC_WCAP_LR_SWAP))
3447 spec->mono_nid = conn_list[0];
3448 }
d0513fc6
MR		 3449 if (dir) {
3450 hda_nid_t nid = spec->autocfg.mono_out_pin;
3451
3452 /* most mono outs have a least a mute/unmute switch */
3453 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3454 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3455 "Mono Playback Switch",
3456 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3457 if (err < 0)
3458 return err;
d0513fc6
MR		 3459 /* check for volume support for the amp */
3460 if ((caps & AC_AMPCAP_NUM_STEPS)
3461 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3462 err = stac92xx_add_control(spec,
3463 STAC_CTL_WIDGET_VOL,
3464 "Mono Playback Volume",
3465 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3466 if (err < 0)
3467 return err;
3468 }
09a99959
MR		 3469 }
3470
3471 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3472 AC_PINCTL_OUT_EN);
3473 }
bcecd9bd 3474
c21ca4a8
TI		 3475 if (!spec->multiout.num_dacs) {
3476 err = stac92xx_auto_fill_dac_nids(codec);
3477 if (err < 0)
19039bd0 3478 return err;
c21ca4a8 3479 }
c7d4b2fa 3480
0fb87bb4
ML		 3481 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3482
3483 if (err < 0)
3484 return err;
3485
1cd2224c
MR		 3486 /* setup analog beep controls */
3487 if (spec->anabeep_nid > 0) {
3488 err = stac92xx_auto_create_beep_ctls(codec,
3489 spec->anabeep_nid);
3490 if (err < 0)
3491 return err;
3492 }
3493
3494 /* setup digital beep controls and input device */
3495#ifdef CONFIG_SND_HDA_INPUT_BEEP
3496 if (spec->digbeep_nid > 0) {
3497 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3498 unsigned int caps;
1cd2224c
MR		 3499
3500 err = stac92xx_auto_create_beep_ctls(codec, nid);
3501 if (err < 0)
3502 return err;
3503 err = snd_hda_attach_beep_device(codec, nid);
3504 if (err < 0)
3505 return err;
4d4e9bb3
TI		 3506 /* if no beep switch is available, make its own one */
3507 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3508 if (codec->beep &&
3509 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3510 err = stac92xx_beep_switch_ctl(codec);
3511 if (err < 0)
3512 return err;
3513 }
1cd2224c
MR		 3514 }
3515#endif
3516
0fb87bb4
ML		 3517 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3518
3519 if (err < 0)
3520 return err;
3521
3522 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3523
3524 if (err < 0)
c7d4b2fa
M		 3525 return err;
3526
b22b4821
MR		 3527 if (spec->mono_nid > 0) {
3528 err = stac92xx_auto_create_mono_output_ctls(codec);
3529 if (err < 0)
3530 return err;
3531 }
2a9c7816 3532 if (spec->num_amps > 0) {
89385035
MR		 3533 err = stac92xx_auto_create_amp_output_ctls(codec);
3534 if (err < 0)
3535 return err;
3536 }
2a9c7816 3537 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3538 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3539 &spec->autocfg)) < 0)
3540 return err;
4682eee0
MR		 3541 if (spec->num_muxes > 0) {
3542 err = stac92xx_auto_create_mux_input_ctls(codec);
3543 if (err < 0)
3544 return err;
3545 }
d9737751
MR		 3546 if (spec->num_smuxes > 0) {
3547 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3548 if (err < 0)
3549 return err;
3550 }
8b65727b 3551
c7d4b2fa 3552 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3553 if (spec->multiout.max_channels > 2)
c7d4b2fa 3554 spec->surr_switch = 1;
c7d4b2fa 3555
82bc955f 3556 if (spec->autocfg.dig_out_pin)
3cc08dc6 3557 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3558 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3559 spec->dig_in_nid = dig_in;
c7d4b2fa 3560
603c4019
TI		 3561 if (spec->kctls.list)
3562 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3563
3564 spec->input_mux = &spec->private_imux;
2a9c7816 3565 spec->dinput_mux = &spec->private_dimux;
d9737751 3566 spec->sinput_mux = &spec->private_smux;
b22b4821 3567 spec->mono_mux = &spec->private_mono_mux;
89385035 3568 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3569 return 1;
3570}
3571
82bc955f
TI		 3572/* add playback controls for HP output */
3573static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3574 struct auto_pin_cfg *cfg)
3575{
3576 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3577 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3578 unsigned int wid_caps;
3579
3580 if (! pin)
3581 return 0;
3582
3583 wid_caps = get_wcaps(codec, pin);
505cb341 3584 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3585 spec->hp_detect = 1;
82bc955f
TI		 3586
3587 return 0;
3588}
3589
160ea0dc
RF		 3590/* add playback controls for LFE output */
3591static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3592 struct auto_pin_cfg *cfg)
3593{
3594 struct sigmatel_spec *spec = codec->spec;
3595 int err;
3596 hda_nid_t lfe_pin = 0x0;
3597 int i;
3598
3599 /*
3600 * search speaker outs and line outs for a mono speaker pin
3601 * with an amp. If one is found, add LFE controls
3602 * for it.
3603 */
3604 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3605 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3606 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3607 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3608 if (wcaps == AC_WCAP_OUT_AMP)
3609 /* found a mono speaker with an amp, must be lfe */
3610 lfe_pin = pin;
3611 }
3612
3613 /* if speaker_outs is 0, then speakers may be in line_outs */
3614 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3615 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3616 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3617 unsigned int defcfg;
8b551785 3618 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3619 AC_VERB_GET_CONFIG_DEFAULT,
3620 0x00);
8b551785 3621 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3622 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3623 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3624 if (wcaps == AC_WCAP_OUT_AMP)
3625 /* found a mono speaker with an amp,
3626 must be lfe */
3627 lfe_pin = pin;
3628 }
3629 }
3630 }
3631
3632 if (lfe_pin) {
eb06ed8f 3633 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3634 if (err < 0)
3635 return err;
3636 }
3637
3638 return 0;
3639}
3640
c7d4b2fa
M		 3641static int stac9200_parse_auto_config(struct hda_codec *codec)
3642{
3643 struct sigmatel_spec *spec = codec->spec;
3644 int err;
3645
df694daa 3646 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3647 return err;
3648
3649 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3650 return err;
3651
82bc955f
TI		 3652 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3653 return err;
3654
160ea0dc
RF		 3655 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3656 return err;
3657
355a0ec4
TI		 3658 if (spec->num_muxes > 0) {
3659 err = stac92xx_auto_create_mux_input_ctls(codec);
3660 if (err < 0)
3661 return err;
3662 }
3663
82bc955f 3664 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3665 spec->multiout.dig_out_nid = 0x05;
82bc955f 3666 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3667 spec->dig_in_nid = 0x04;
c7d4b2fa 3668
603c4019
TI		 3669 if (spec->kctls.list)
3670 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3671
3672 spec->input_mux = &spec->private_imux;
8b65727b 3673 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3674
3675 return 1;
3676}
3677
62fe78e9
SR		 3678/*
3679 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3680 * funky external mute control using GPIO pins.
3681 */
3682
76e1ddfb 3683static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3684 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3685{
3686 unsigned int gpiostate, gpiomask, gpiodir;
3687
3688 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3689 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3690 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3691
3692 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3693 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3694 gpiomask |= mask;
62fe78e9
SR		 3695
3696 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3697 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3698 gpiodir |= dir_mask;
62fe78e9 3699
76e1ddfb 3700 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3701 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3702
3703 snd_hda_codec_write(codec, codec->afg, 0,
3704 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3705 snd_hda_codec_read(codec, codec->afg, 0,
3706 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3707
3708 msleep(1);
3709
76e1ddfb
TI		 3710 snd_hda_codec_read(codec, codec->afg, 0,
3711 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3712}
3713
74aeaabc
MR		 3714static int stac92xx_add_jack(struct hda_codec *codec,
3715 hda_nid_t nid, int type)
3716{
e4973e1e 3717#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3718 struct sigmatel_spec *spec = codec->spec;
3719 struct sigmatel_jack *jack;
3720 int def_conf = snd_hda_codec_read(codec, nid,
3721 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3722 int connectivity = get_defcfg_connect(def_conf);
3723 char name[32];
3724
3725 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3726 return 0;
3727
3728 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3729 jack = snd_array_new(&spec->jacks);
3730 if (!jack)
3731 return -ENOMEM;
3732 jack->nid = nid;
3733 jack->type = type;
3734
3735 sprintf(name, "%s at %s %s Jack",
3736 snd_hda_get_jack_type(def_conf),
3737 snd_hda_get_jack_connectivity(def_conf),
3738 snd_hda_get_jack_location(def_conf));
3739
3740 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3741#else
3742 return 0;
3743#endif
74aeaabc
MR		 3744}
3745
c6e4c666
TI		 3746static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3747 unsigned char type, int data)
74aeaabc
MR		 3748{
3749 struct sigmatel_event *event;
3750
3751 snd_array_init(&spec->events, sizeof(*event), 32);
3752 event = snd_array_new(&spec->events);
3753 if (!event)
3754 return -ENOMEM;
3755 event->nid = nid;
c6e4c666
TI		 3756 event->type = type;
3757 event->tag = spec->events.used;
74aeaabc
MR		 3758 event->data = data;
3759
c6e4c666 3760 return event->tag;
74aeaabc
MR		 3761}
3762
c6e4c666
TI		 3763static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3764 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3765{
3766 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3767 struct sigmatel_event *event = spec->events.list;
3768 int i;
3769
3770 for (i = 0; i < spec->events.used; i++, event++) {
3771 if (event->nid == nid && event->type == type)
3772 return event;
74aeaabc 3773 }
c6e4c666 3774 return NULL;
74aeaabc
MR		 3775}
3776
c6e4c666
TI		 3777static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3778 unsigned char tag)
314634bc 3779{
c6e4c666
TI		 3780 struct sigmatel_spec *spec = codec->spec;
3781 struct sigmatel_event *event = spec->events.list;
3782 int i;
3783
3784 for (i = 0; i < spec->events.used; i++, event++) {
3785 if (event->tag == tag)
3786 return event;
74aeaabc 3787 }
c6e4c666
TI		 3788 return NULL;
3789}
3790
3791static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3792 unsigned int type)
3793{
3794 struct sigmatel_event *event;
3795 int tag;
3796
3797 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3798 return;
3799 event = stac_get_event(codec, nid, type);
3800 if (event)
3801 tag = event->tag;
3802 else
3803 tag = stac_add_event(codec->spec, nid, type, 0);
3804 if (tag < 0)
3805 return;
3806 snd_hda_codec_write_cache(codec, nid, 0,
3807 AC_VERB_SET_UNSOLICITED_ENABLE,
3808 AC_USRSP_EN | tag);
314634bc
TI		 3809}
3810
a64135a2
MR		 3811static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3812{
3813 int i;
3814 for (i = 0; i < cfg->hp_outs; i++)
3815 if (cfg->hp_pins[i] == nid)
3816 return 1; /* nid is a HP-Out */
3817
3818 return 0; /* nid is not a HP-Out */
3819};
3820
b76c850f
MR		 3821static void stac92xx_power_down(struct hda_codec *codec)
3822{
3823 struct sigmatel_spec *spec = codec->spec;
3824
3825 /* power down inactive DACs */
3826 hda_nid_t *dac;
3827 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3828 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3829 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3830 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3831}
3832
f73d3585
TI		 3833static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3834 int enable);
3835
c7d4b2fa
M		 3836static int stac92xx_init(struct hda_codec *codec)
3837{
3838 struct sigmatel_spec *spec = codec->spec;
82bc955f 3839 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3840 unsigned int gpio;
e4973e1e 3841 int i;
c7d4b2fa 3842
c7d4b2fa
M		 3843 snd_hda_sequence_write(codec, spec->init);
3844
8daaaa97
MR		 3845 /* power down adcs initially */
3846 if (spec->powerdown_adcs)
3847 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3848 snd_hda_codec_write(codec,
8daaaa97
MR		 3849 spec->adc_nids[i], 0,
3850 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3851
3852 /* set up GPIO */
3853 gpio = spec->gpio_data;
3854 /* turn on EAPD statically when spec->eapd_switch isn't set.
3855 * otherwise, unsol event will turn it on/off dynamically
3856 */
3857 if (!spec->eapd_switch)
3858 gpio |= spec->eapd_mask;
3859 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3860
82bc955f
TI		 3861 /* set up pins */
3862 if (spec->hp_detect) {
505cb341 3863 /* Enable unsolicited responses on the HP widget */
74aeaabc 3864 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3865 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3866 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3867 }
0a07acaf
TI		 3868 /* force to enable the first line-out; the others are set up
3869 * in unsol_event
3870 */
3871 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3872 AC_PINCTL_OUT_EN);
82bc955f 3873 /* fake event to set up pins */
c6e4c666
TI		 3874 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3875 STAC_HP_EVENT);
82bc955f
TI		 3876 } else {
3877 stac92xx_auto_init_multi_out(codec);
3878 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3879 for (i = 0; i < cfg->hp_outs; i++)
3880 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 3881 }
3882 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3883 hda_nid_t nid = cfg->input_pins[i];
3884 if (nid) {
12dde4c6 3885 unsigned int pinctl, conf;
4f1e6bc3
TI		 3886 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3887 /* for mic pins, force to initialize */
3888 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 3889 pinctl |= AC_PINCTL_IN_EN;
3890 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 3891 } else {
3892 pinctl = snd_hda_codec_read(codec, nid, 0,
3893 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3894 /* if PINCTL already set then skip */
12dde4c6
TI		 3895 if (!(pinctl & AC_PINCTL_IN_EN)) {
3896 pinctl |= AC_PINCTL_IN_EN;
3897 stac92xx_auto_set_pinctl(codec, nid,
3898 pinctl);
3899 }
3900 }
3901 conf = snd_hda_codec_read(codec, nid, 0,
3902 AC_VERB_GET_CONFIG_DEFAULT, 0);
3903 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
3904 enable_pin_detect(codec, nid,
3905 STAC_INSERT_EVENT);
3906 stac_issue_unsol_event(codec, nid,
3907 STAC_INSERT_EVENT);
4f1e6bc3 3908 }
c960a03b 3909 }
82bc955f 3910 }
a64135a2
MR		 3911 for (i = 0; i < spec->num_dmics; i++)
3912 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3913 AC_PINCTL_IN_EN);
f73d3585
TI		 3914 if (cfg->dig_out_pin)
3915 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3916 AC_PINCTL_OUT_EN);
3917 if (cfg->dig_in_pin)
3918 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3919 AC_PINCTL_IN_EN);
a64135a2 3920 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3921 hda_nid_t nid = spec->pwr_nids[i];
3922 int pinctl, def_conf;
f73d3585
TI		 3923
3924 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3925 continue; /* already has an unsol event */
3926
3927 pinctl = snd_hda_codec_read(codec, nid, 0,
3928 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3929 /* outputs are only ports capable of power management
3930 * any attempts on powering down a input port cause the
3931 * referenced VREF to act quirky.
3932 */
3933 if (pinctl & AC_PINCTL_IN_EN)
3934 continue;
f73d3585
TI		 3935 def_conf = snd_hda_codec_read(codec, nid, 0,
3936 AC_VERB_GET_CONFIG_DEFAULT, 0);
3937 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3938 /* skip any ports that don't have jacks since presence
3939 * detection is useless */
f73d3585
TI		 3940 if (def_conf != AC_JACK_PORT_COMPLEX) {
3941 if (def_conf != AC_JACK_PORT_NONE)
3942 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3943 continue;
f73d3585 3944 }
12dde4c6
TI		 3945 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
3946 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
3947 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
3948 }
a64135a2 3949 }
b76c850f
MR		 3950 if (spec->dac_list)
3951 stac92xx_power_down(codec);
c7d4b2fa
M		 3952 return 0;
3953}
3954
74aeaabc
MR		 3955static void stac92xx_free_jacks(struct hda_codec *codec)
3956{
e4973e1e 3957#ifdef CONFIG_SND_JACK
b94d3539 3958 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 3959 struct sigmatel_spec *spec = codec->spec;
b94d3539 3960 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 3961 struct sigmatel_jack *jacks = spec->jacks.list;
3962 int i;
3963 for (i = 0; i < spec->jacks.used; i++)
3964 snd_device_free(codec->bus->card, &jacks[i].jack);
3965 }
3966 snd_array_free(&spec->jacks);
e4973e1e 3967#endif
74aeaabc
MR		 3968}
3969
603c4019
TI		 3970static void stac92xx_free_kctls(struct hda_codec *codec)
3971{
3972 struct sigmatel_spec *spec = codec->spec;
3973
3974 if (spec->kctls.list) {
3975 struct snd_kcontrol_new *kctl = spec->kctls.list;
3976 int i;
3977 for (i = 0; i < spec->kctls.used; i++)
3978 kfree(kctl[i].name);
3979 }
3980 snd_array_free(&spec->kctls);
3981}
3982
2f2f4251
M		 3983static void stac92xx_free(struct hda_codec *codec)
3984{
c7d4b2fa 3985 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3986
3987 if (! spec)
3988 return;
3989
af9f341a 3990 kfree(spec->pin_configs);
74aeaabc
MR		 3991 stac92xx_free_jacks(codec);
3992 snd_array_free(&spec->events);
11b44bbd 3993
c7d4b2fa 3994 kfree(spec);
1cd2224c 3995 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3996}
3997
4e55096e
M		 3998static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3999 unsigned int flag)
4000{
4001 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4002 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4003
f9acba43
TI		 4004 if (pin_ctl & AC_PINCTL_IN_EN) {
4005 /*
4006 * we need to check the current set-up direction of
4007 * shared input pins since they can be switched via
4008 * "xxx as Output" mixer switch
4009 */
4010 struct sigmatel_spec *spec = codec->spec;
4011 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 4012 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4013 return;
4014 }
4015
7b043899
SL		 4016 /* if setting pin direction bits, clear the current
4017 direction bits first */
4018 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4019 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4020
82beb8fd 4021 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4022 AC_VERB_SET_PIN_WIDGET_CONTROL,
4023 pin_ctl | flag);
4024}
4025
4026static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4027 unsigned int flag)
4028{
4029 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4030 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4031 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4032 AC_VERB_SET_PIN_WIDGET_CONTROL,
4033 pin_ctl & ~flag);
4034}
4035
e6e3ea25 4036static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4037{
4038 if (!nid)
4039 return 0;
4040 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4041 & (1 << 31))
4042 return 1;
314634bc
TI		 4043 return 0;
4044}
4045
d7a89436
TI		 4046/* return non-zero if the hp-pin of the given array index isn't
4047 * a jack-detection target
4048 */
4049static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4050{
4051 struct auto_pin_cfg *cfg = &spec->autocfg;
4052
4053 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4054 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4055 return 1;
c21ca4a8 4056 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4057 return 1;
4058 /* ignore if the pin is set as line-out */
4059 if (cfg->hp_pins[i] == spec->hp_switch)
4060 return 1;
4061 return 0;
4062}
4063
c6e4c666 4064static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4065{
4066 struct sigmatel_spec *spec = codec->spec;
4067 struct auto_pin_cfg *cfg = &spec->autocfg;
4068 int i, presence;
4069
eb06ed8f 4070 presence = 0;
4fe5195c
MR		 4071 if (spec->gpio_mute)
4072 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4073 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4074
eb06ed8f 4075 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4076 if (presence)
4077 break;
d7a89436
TI		 4078 if (no_hp_sensing(spec, i))
4079 continue;
e6e3ea25
TI		 4080 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4081 if (presence) {
4082 unsigned int pinctl;
4083 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4084 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4085 if (pinctl & AC_PINCTL_IN_EN)
4086 presence = 0; /* mic- or line-input */
4087 }
eb06ed8f 4088 }
4e55096e
M		 4089
4090 if (presence) {
d7a89436 4091 /* disable lineouts */
7c2ba97b 4092 if (spec->hp_switch)
d7a89436
TI		 4093 stac92xx_reset_pinctl(codec, spec->hp_switch,
4094 AC_PINCTL_OUT_EN);
4e55096e
M		 4095 for (i = 0; i < cfg->line_outs; i++)
4096 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4097 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4098 for (i = 0; i < cfg->speaker_outs; i++)
4099 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4100 AC_PINCTL_OUT_EN);
c0cea0d0 4101 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4102 stac_gpio_set(codec, spec->gpio_mask,
4103 spec->gpio_dir, spec->gpio_data &
4104 ~spec->eapd_mask);
4e55096e 4105 } else {
d7a89436 4106 /* enable lineouts */
7c2ba97b 4107 if (spec->hp_switch)
d7a89436
TI		 4108 stac92xx_set_pinctl(codec, spec->hp_switch,
4109 AC_PINCTL_OUT_EN);
4e55096e
M		 4110 for (i = 0; i < cfg->line_outs; i++)
4111 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4112 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4113 for (i = 0; i < cfg->speaker_outs; i++)
4114 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4115 AC_PINCTL_OUT_EN);
c0cea0d0 4116 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4117 stac_gpio_set(codec, spec->gpio_mask,
4118 spec->gpio_dir, spec->gpio_data |
4119 spec->eapd_mask);
4e55096e 4120 }
d7a89436
TI		 4121 /* toggle hp outs */
4122 for (i = 0; i < cfg->hp_outs; i++) {
4123 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4124 if (no_hp_sensing(spec, i))
4125 continue;
4126 if (presence)
4127 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4128 else
4129 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4130 }
4e55096e
M		 4131}
4132
f73d3585
TI		 4133static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4134 int enable)
a64135a2
MR		 4135{
4136 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4137 unsigned int idx, val;
4138
4139 for (idx = 0; idx < spec->num_pwrs; idx++) {
4140 if (spec->pwr_nids[idx] == nid)
4141 break;
4142 }
4143 if (idx >= spec->num_pwrs)
4144 return;
d0513fc6
MR		 4145
4146 /* several codecs have two power down bits */
4147 if (spec->pwr_mapping)
4148 idx = spec->pwr_mapping[idx];
4149 else
4150 idx = 1 << idx;
a64135a2 4151
f73d3585
TI		 4152 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4153 if (enable)
a64135a2
MR		 4154 val &= ~idx;
4155 else
4156 val |= idx;
4157
4158 /* power down unused output ports */
4159 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4160}
4161
f73d3585
TI		 4162static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4163{
e6e3ea25 4164 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4165}
a64135a2 4166
74aeaabc
MR		 4167static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4168{
4169 struct sigmatel_spec *spec = codec->spec;
4170 struct sigmatel_jack *jacks = spec->jacks.list;
4171
4172 if (jacks) {
4173 int i;
4174 for (i = 0; i < spec->jacks.used; i++) {
4175 if (jacks->nid == nid) {
4176 unsigned int pin_ctl =
4177 snd_hda_codec_read(codec, nid,
4178 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4179 0x00);
4180 int type = jacks->type;
4181 if (type == (SND_JACK_LINEOUT
4182 | SND_JACK_HEADPHONE))
4183 type = (pin_ctl & AC_PINCTL_HP_EN)
4184 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4185 snd_jack_report(jacks->jack,
e6e3ea25 4186 get_pin_presence(codec, nid)
74aeaabc
MR		 4187 ? type : 0);
4188 }
4189 jacks++;
4190 }
4191 }
4192}
a64135a2 4193
c6e4c666
TI		 4194static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4195 unsigned char type)
4196{
4197 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4198 if (!event)
4199 return;
4200 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4201}
4202
314634bc
TI		 4203static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4204{
a64135a2 4205 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4206 struct sigmatel_event *event;
4207 int tag, data;
a64135a2 4208
c6e4c666
TI		 4209 tag = (res >> 26) & 0x7f;
4210 event = stac_get_event_from_tag(codec, tag);
4211 if (!event)
4212 return;
4213
4214 switch (event->type) {
314634bc 4215 case STAC_HP_EVENT:
c6e4c666 4216 stac92xx_hp_detect(codec);
a64135a2 4217 /* fallthru */
74aeaabc 4218 case STAC_INSERT_EVENT:
a64135a2 4219 case STAC_PWR_EVENT:
c6e4c666
TI		 4220 if (spec->num_pwrs > 0)
4221 stac92xx_pin_sense(codec, event->nid);
4222 stac92xx_report_jack(codec, event->nid);
72474be6 4223 break;
c6e4c666
TI		 4224 case STAC_VREF_EVENT:
4225 data = snd_hda_codec_read(codec, codec->afg, 0,
4226 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4227 /* toggle VREF state based on GPIOx status */
4228 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4229 !!(data & (1 << event->data)));
72474be6 4230 break;
314634bc
TI		 4231 }
4232}
4233
2d34e1b3
TI		 4234#ifdef CONFIG_PROC_FS
4235static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4236 struct hda_codec *codec, hda_nid_t nid)
4237{
4238 if (nid == codec->afg)
4239 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4240 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4241}
4242
4243static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4244 struct hda_codec *codec,
4245 unsigned int verb)
4246{
4247 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4248 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4249}
4250
4251/* stac92hd71bxx, stac92hd73xx */
4252static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4253 struct hda_codec *codec, hda_nid_t nid)
4254{
4255 stac92hd_proc_hook(buffer, codec, nid);
4256 if (nid == codec->afg)
4257 analog_loop_proc_hook(buffer, codec, 0xfa0);
4258}
4259
4260static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4261 struct hda_codec *codec, hda_nid_t nid)
4262{
4263 if (nid == codec->afg)
4264 analog_loop_proc_hook(buffer, codec, 0xfe0);
4265}
4266
4267static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4268 struct hda_codec *codec, hda_nid_t nid)
4269{
4270 if (nid == codec->afg)
4271 analog_loop_proc_hook(buffer, codec, 0xfeb);
4272}
4273#else
4274#define stac92hd_proc_hook NULL
4275#define stac92hd7x_proc_hook NULL
4276#define stac9205_proc_hook NULL
4277#define stac927x_proc_hook NULL
4278#endif
4279
cb53c626 4280#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4281static int stac92xx_resume(struct hda_codec *codec)
4282{
dc81bed1
TI		 4283 struct sigmatel_spec *spec = codec->spec;
4284
11b44bbd 4285 stac92xx_set_config_regs(codec);
2c885878 4286 stac92xx_init(codec);
82beb8fd
TI		 4287 snd_hda_codec_resume_amp(codec);
4288 snd_hda_codec_resume_cache(codec);
2c885878 4289 /* fake event to set up pins again to override cached values */
dc81bed1 4290 if (spec->hp_detect)
c6e4c666
TI		 4291 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4292 STAC_HP_EVENT);
ff6fdc37
M		 4293 return 0;
4294}
c6798d2b
MR		 4295
4296static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4297{
4298 struct sigmatel_spec *spec = codec->spec;
4299 if (spec->eapd_mask)
4300 stac_gpio_set(codec, spec->gpio_mask,
4301 spec->gpio_dir, spec->gpio_data &
4302 ~spec->eapd_mask);
4303 return 0;
4304}
ff6fdc37
M		 4305#endif
4306
2f2f4251
M		 4307static struct hda_codec_ops stac92xx_patch_ops = {
4308 .build_controls = stac92xx_build_controls,
4309 .build_pcms = stac92xx_build_pcms,
4310 .init = stac92xx_init,
4311 .free = stac92xx_free,
4e55096e 4312 .unsol_event = stac92xx_unsol_event,
cb53c626 4313#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4314 .suspend = stac92xx_suspend,
ff6fdc37
M		 4315 .resume = stac92xx_resume,
4316#endif
2f2f4251
M		 4317};
4318
4319static int patch_stac9200(struct hda_codec *codec)
4320{
4321 struct sigmatel_spec *spec;
c7d4b2fa 4322 int err;
2f2f4251 4323
e560d8d8 4324 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4325 if (spec == NULL)
4326 return -ENOMEM;
4327
4328 codec->spec = spec;
a4eed138 4329 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4330 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4331 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4332 stac9200_models,
4333 stac9200_cfg_tbl);
11b44bbd
RF		 4334 if (spec->board_config < 0) {
4335 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4336 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4337 } else
4338 err = stac_save_pin_cfgs(codec,
4339 stac9200_brd_tbl[spec->board_config]);
4340 if (err < 0) {
4341 stac92xx_free(codec);
4342 return err;
403d1944 4343 }
2f2f4251
M		 4344
4345 spec->multiout.max_channels = 2;
4346 spec->multiout.num_dacs = 1;
4347 spec->multiout.dac_nids = stac9200_dac_nids;
4348 spec->adc_nids = stac9200_adc_nids;
4349 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4350 spec->num_muxes = 1;
8b65727b 4351 spec->num_dmics = 0;
9e05b7a3 4352 spec->num_adcs = 1;
a64135a2 4353 spec->num_pwrs = 0;
c7d4b2fa 4354
bf277785
TD		 4355 if (spec->board_config == STAC_9200_GATEWAY ||
4356 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4357 spec->init = stac9200_eapd_init;
4358 else
4359 spec->init = stac9200_core_init;
2f2f4251 4360 spec->mixer = stac9200_mixer;
c7d4b2fa 4361
117f257d
TI		 4362 if (spec->board_config == STAC_9200_PANASONIC) {
4363 spec->gpio_mask = spec->gpio_dir = 0x09;
4364 spec->gpio_data = 0x00;
4365 }
4366
c7d4b2fa
M		 4367 err = stac9200_parse_auto_config(codec);
4368 if (err < 0) {
4369 stac92xx_free(codec);
4370 return err;
4371 }
2f2f4251
M		 4372
4373 codec->patch_ops = stac92xx_patch_ops;
4374
4375 return 0;
4376}
4377
8e21c34c
TD		 4378static int patch_stac925x(struct hda_codec *codec)
4379{
4380 struct sigmatel_spec *spec;
4381 int err;
4382
4383 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4384 if (spec == NULL)
4385 return -ENOMEM;
4386
4387 codec->spec = spec;
a4eed138 4388 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4389 spec->pin_nids = stac925x_pin_nids;
4390 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4391 stac925x_models,
4392 stac925x_cfg_tbl);
9e507abd 4393 again:
8e21c34c 4394 if (spec->board_config < 0) {
2c11f955
TD		 4395 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4396 "using BIOS defaults\n");
8e21c34c 4397 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4398 } else
4399 err = stac_save_pin_cfgs(codec,
4400 stac925x_brd_tbl[spec->board_config]);
4401 if (err < 0) {
4402 stac92xx_free(codec);
4403 return err;
8e21c34c
TD		 4404 }
4405
4406 spec->multiout.max_channels = 2;
4407 spec->multiout.num_dacs = 1;
4408 spec->multiout.dac_nids = stac925x_dac_nids;
4409 spec->adc_nids = stac925x_adc_nids;
4410 spec->mux_nids = stac925x_mux_nids;
4411 spec->num_muxes = 1;
9e05b7a3 4412 spec->num_adcs = 1;
a64135a2 4413 spec->num_pwrs = 0;
2c11f955
TD		 4414 switch (codec->vendor_id) {
4415 case 0x83847632: /* STAC9202 */
4416 case 0x83847633: /* STAC9202D */
4417 case 0x83847636: /* STAC9251 */
4418 case 0x83847637: /* STAC9251D */
f6e9852a 4419 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4420 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4421 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4422 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4423 break;
4424 default:
4425 spec->num_dmics = 0;
4426 break;
4427 }
8e21c34c
TD		 4428
4429 spec->init = stac925x_core_init;
4430 spec->mixer = stac925x_mixer;
4431
4432 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4433 if (!err) {
4434 if (spec->board_config < 0) {
4435 printk(KERN_WARNING "hda_codec: No auto-config is "
4436 "available, default to model=ref\n");
4437 spec->board_config = STAC_925x_REF;
4438 goto again;
4439 }
4440 err = -EINVAL;
4441 }
8e21c34c
TD		 4442 if (err < 0) {
4443 stac92xx_free(codec);
4444 return err;
4445 }
4446
4447 codec->patch_ops = stac92xx_patch_ops;
4448
4449 return 0;
4450}
4451
e1f0d669
MR		 4452static struct hda_input_mux stac92hd73xx_dmux = {
4453 .num_items = 4,
4454 .items = {
4455 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4456 { "Digital Mic 1", 0x09 },
4457 { "Digital Mic 2", 0x0a },
2a9c7816 4458 { "CD", 0x08 },
e1f0d669
MR		 4459 }
4460};
4461
4462static int patch_stac92hd73xx(struct hda_codec *codec)
4463{
4464 struct sigmatel_spec *spec;
4465 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4466 int err = 0;
c21ca4a8 4467 int num_dacs;
e1f0d669
MR		 4468
4469 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4470 if (spec == NULL)
4471 return -ENOMEM;
4472
4473 codec->spec = spec;
e99d32b3 4474 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4475 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4476 spec->pin_nids = stac92hd73xx_pin_nids;
4477 spec->board_config = snd_hda_check_board_config(codec,
4478 STAC_92HD73XX_MODELS,
4479 stac92hd73xx_models,
4480 stac92hd73xx_cfg_tbl);
4481again:
4482 if (spec->board_config < 0) {
4483 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4484 " STAC92HD73XX, using BIOS defaults\n");
4485 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4486 } else
4487 err = stac_save_pin_cfgs(codec,
4488 stac92hd73xx_brd_tbl[spec->board_config]);
4489 if (err < 0) {
4490 stac92xx_free(codec);
4491 return err;
e1f0d669
MR		 4492 }
4493
c21ca4a8 4494 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4495 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4496
c21ca4a8 4497 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4498 printk(KERN_WARNING "hda_codec: Could not determine "
4499 "number of channels defaulting to DAC count\n");
c21ca4a8 4500 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4501 }
c21ca4a8 4502 switch (num_dacs) {
e1f0d669
MR		 4503 case 0x3: /* 6 Channel */
4504 spec->mixer = stac92hd73xx_6ch_mixer;
4505 spec->init = stac92hd73xx_6ch_core_init;
4506 break;
4507 case 0x4: /* 8 Channel */
e1f0d669
MR		 4508 spec->mixer = stac92hd73xx_8ch_mixer;
4509 spec->init = stac92hd73xx_8ch_core_init;
4510 break;
4511 case 0x5: /* 10 Channel */
e1f0d669
MR		 4512 spec->mixer = stac92hd73xx_10ch_mixer;
4513 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4514 }
4515 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4516
e1f0d669
MR		 4517 spec->aloopback_mask = 0x01;
4518 spec->aloopback_shift = 8;
4519
1cd2224c 4520 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4521 spec->mux_nids = stac92hd73xx_mux_nids;
4522 spec->adc_nids = stac92hd73xx_adc_nids;
4523 spec->dmic_nids = stac92hd73xx_dmic_nids;
4524 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4525 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4526 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4527 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4528
4529 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4530 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4531 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4532 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4533 sizeof(stac92hd73xx_dmux));
4534
a7662640 4535 switch (spec->board_config) {
6b3ab21e 4536 case STAC_DELL_EQ:
d654a660 4537 spec->init = dell_eq_core_init;
6b3ab21e 4538 /* fallthru */
661cd8fb
TI		 4539 case STAC_DELL_M6_AMIC:
4540 case STAC_DELL_M6_DMIC:
4541 case STAC_DELL_M6_BOTH:
2a9c7816 4542 spec->num_smuxes = 0;
2a9c7816
MR		 4543 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4544 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4545 spec->eapd_switch = 0;
2a9c7816 4546 spec->num_amps = 1;
6b3ab21e 4547
c21ca4a8 4548 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4549 spec->init = dell_m6_core_init;
661cd8fb
TI		 4550 switch (spec->board_config) {
4551 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4552 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4553 spec->num_dmics = 0;
2a9c7816 4554 spec->private_dimux.num_items = 1;
a7662640 4555 break;
661cd8fb 4556 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4557 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4558 spec->num_dmics = 1;
2a9c7816 4559 spec->private_dimux.num_items = 2;
a7662640 4560 break;
661cd8fb 4561 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4562 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4563 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4564 spec->num_dmics = 1;
2a9c7816 4565 spec->private_dimux.num_items = 2;
a7662640
MR		 4566 break;
4567 }
4568 break;
4569 default:
4570 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4571 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4572 spec->eapd_switch = 1;
a7662640 4573 }
b2c4f4d7
MR		 4574 if (spec->board_config > STAC_92HD73XX_REF) {
4575 /* GPIO0 High = Enable EAPD */
4576 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4577 spec->gpio_data = 0x01;
4578 }
2a9c7816 4579 spec->dinput_mux = &spec->private_dimux;
a7662640 4580
a64135a2
MR		 4581 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4582 spec->pwr_nids = stac92hd73xx_pwr_nids;
4583
d9737751 4584 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4585
4586 if (!err) {
4587 if (spec->board_config < 0) {
4588 printk(KERN_WARNING "hda_codec: No auto-config is "
4589 "available, default to model=ref\n");
4590 spec->board_config = STAC_92HD73XX_REF;
4591 goto again;
4592 }
4593 err = -EINVAL;
4594 }
4595
4596 if (err < 0) {
4597 stac92xx_free(codec);
4598 return err;
4599 }
4600
9e43f0de
TI		 4601 if (spec->board_config == STAC_92HD73XX_NO_JD)
4602 spec->hp_detect = 0;
4603
e1f0d669
MR		 4604 codec->patch_ops = stac92xx_patch_ops;
4605
2d34e1b3
TI		 4606 codec->proc_widget_hook = stac92hd7x_proc_hook;
4607
e1f0d669
MR		 4608 return 0;
4609}
4610
d0513fc6
MR		 4611static struct hda_input_mux stac92hd83xxx_dmux = {
4612 .num_items = 3,
4613 .items = {
4614 { "Analog Inputs", 0x03 },
4615 { "Digital Mic 1", 0x04 },
4616 { "Digital Mic 2", 0x05 },
4617 }
4618};
4619
4620static int patch_stac92hd83xxx(struct hda_codec *codec)
4621{
4622 struct sigmatel_spec *spec;
4623 int err;
4624
4625 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4626 if (spec == NULL)
4627 return -ENOMEM;
4628
4629 codec->spec = spec;
0ffa9807 4630 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4631 spec->mono_nid = 0x19;
4632 spec->digbeep_nid = 0x21;
4633 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4634 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4635 spec->adc_nids = stac92hd83xxx_adc_nids;
4636 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4637 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4638 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4639 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 4640
4641 spec->init = stac92hd83xxx_core_init;
4642 switch (codec->vendor_id) {
4643 case 0x111d7605:
d0513fc6
MR		 4644 break;
4645 default:
4646 spec->num_pwrs--;
4647 spec->init++; /* switch to config #2 */
d0513fc6
MR		 4648 }
4649
4650 spec->mixer = stac92hd83xxx_mixer;
4651 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4652 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4653 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4654 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4655 spec->dinput_mux = &stac92hd83xxx_dmux;
4656 spec->pin_nids = stac92hd83xxx_pin_nids;
4657 spec->board_config = snd_hda_check_board_config(codec,
4658 STAC_92HD83XXX_MODELS,
4659 stac92hd83xxx_models,
4660 stac92hd83xxx_cfg_tbl);
4661again:
4662 if (spec->board_config < 0) {
4663 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4664 " STAC92HD83XXX, using BIOS defaults\n");
4665 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4666 } else
4667 err = stac_save_pin_cfgs(codec,
4668 stac92hd83xxx_brd_tbl[spec->board_config]);
4669 if (err < 0) {
4670 stac92xx_free(codec);
4671 return err;
d0513fc6
MR		 4672 }
4673
4674 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4675 if (!err) {
4676 if (spec->board_config < 0) {
4677 printk(KERN_WARNING "hda_codec: No auto-config is "
4678 "available, default to model=ref\n");
4679 spec->board_config = STAC_92HD83XXX_REF;
4680 goto again;
4681 }
4682 err = -EINVAL;
4683 }
4684
4685 if (err < 0) {
4686 stac92xx_free(codec);
4687 return err;
4688 }
4689
4690 codec->patch_ops = stac92xx_patch_ops;
4691
2d34e1b3
TI		 4692 codec->proc_widget_hook = stac92hd_proc_hook;
4693
d0513fc6
MR		 4694 return 0;
4695}
4696
4b33c767
MR		 4697static struct hda_input_mux stac92hd71bxx_dmux = {
4698 .num_items = 4,
4699 .items = {
4700 { "Analog Inputs", 0x00 },
4701 { "Mixer", 0x01 },
4702 { "Digital Mic 1", 0x02 },
4703 { "Digital Mic 2", 0x03 },
4704 }
4705};
4706
e035b841
MR		 4707static int patch_stac92hd71bxx(struct hda_codec *codec)
4708{
4709 struct sigmatel_spec *spec;
4710 int err = 0;
4711
4712 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4713 if (spec == NULL)
4714 return -ENOMEM;
4715
4716 codec->spec = spec;
8daaaa97 4717 codec->patch_ops = stac92xx_patch_ops;
e035b841 4718 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4719 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4720 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4721 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4722 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4723 spec->board_config = snd_hda_check_board_config(codec,
4724 STAC_92HD71BXX_MODELS,
4725 stac92hd71bxx_models,
4726 stac92hd71bxx_cfg_tbl);
4727again:
4728 if (spec->board_config < 0) {
4729 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4730 " STAC92HD71BXX, using BIOS defaults\n");
4731 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4732 } else
4733 err = stac_save_pin_cfgs(codec,
4734 stac92hd71bxx_brd_tbl[spec->board_config]);
4735 if (err < 0) {
4736 stac92xx_free(codec);
4737 return err;
e035b841
MR		 4738 }
4739
41c3b648
TI		 4740 if (spec->board_config > STAC_92HD71BXX_REF) {
4741 /* GPIO0 = EAPD */
4742 spec->gpio_mask = 0x01;
4743 spec->gpio_dir = 0x01;
4744 spec->gpio_data = 0x01;
4745 }
4746
541eee87
MR		 4747 switch (codec->vendor_id) {
4748 case 0x111d76b6: /* 4 Port without Analog Mixer */
4749 case 0x111d76b7:
4750 case 0x111d76b4: /* 6 Port without Analog Mixer */
4751 case 0x111d76b5:
4752 spec->mixer = stac92hd71bxx_mixer;
4753 spec->init = stac92hd71bxx_core_init;
0ffa9807 4754 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4755 break;
aafc4412 4756 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4757 switch (spec->board_config) {
4758 case STAC_HP_M4:
72474be6 4759 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4760 err = stac_add_event(spec, codec->afg,
4761 STAC_VREF_EVENT, 0x02);
4762 if (err < 0)
4763 return err;
c5d08bb5 4764 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4765 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4766 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4767 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4768 AC_USRSP_EN | err);
72474be6
MR		 4769 spec->gpio_mask |= 0x02;
4770 break;
4771 }
8daaaa97 4772 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4773 (codec->revision_id & 0xf) == 1)
8daaaa97 4774 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4775
aafc4412
MR		 4776 /* no output amps */
4777 spec->num_pwrs = 0;
4778 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4779 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4780
4781 /* disable VSW */
4782 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4783 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4784 break;
4785 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4786 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4787 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4788
aafc4412
MR		 4789 /* no output amps */
4790 spec->num_pwrs = 0;
4791 /* fallthru */
541eee87 4792 default:
4b33c767 4793 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4794 spec->mixer = stac92hd71bxx_analog_mixer;
4795 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4796 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4797 }
4798
4b33c767 4799 spec->aloopback_mask = 0x50;
541eee87
MR		 4800 spec->aloopback_shift = 0;
4801
8daaaa97 4802 spec->powerdown_adcs = 1;
1cd2224c 4803 spec->digbeep_nid = 0x26;
e035b841
MR		 4804 spec->mux_nids = stac92hd71bxx_mux_nids;
4805 spec->adc_nids = stac92hd71bxx_adc_nids;
4806 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4807 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4808 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4809 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4810
4811 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4812 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4813
6a14f585
MR		 4814 switch (spec->board_config) {
4815 case STAC_HP_M4:
6a14f585 4816 /* enable internal microphone */
af9f341a 4817 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4818 stac92xx_auto_set_pinctl(codec, 0x0e,
4819 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4820 /* fallthru */
4821 case STAC_DELL_M4_2:
4822 spec->num_dmics = 0;
4823 spec->num_smuxes = 0;
4824 spec->num_dmuxes = 0;
4825 break;
4826 case STAC_DELL_M4_1:
4827 case STAC_DELL_M4_3:
4828 spec->num_dmics = 1;
4829 spec->num_smuxes = 0;
4830 spec->num_dmuxes = 0;
6a14f585
MR		 4831 break;
4832 default:
4833 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4834 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4835 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4836 };
4837
c21ca4a8 4838 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 4839 if (spec->dinput_mux)
4840 spec->private_dimux.num_items +=
4841 spec->num_dmics -
4842 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4843
4844 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4845 if (!err) {
4846 if (spec->board_config < 0) {
4847 printk(KERN_WARNING "hda_codec: No auto-config is "
4848 "available, default to model=ref\n");
4849 spec->board_config = STAC_92HD71BXX_REF;
4850 goto again;
4851 }
4852 err = -EINVAL;
4853 }
4854
4855 if (err < 0) {
4856 stac92xx_free(codec);
4857 return err;
4858 }
4859
2d34e1b3
TI		 4860 codec->proc_widget_hook = stac92hd7x_proc_hook;
4861
e035b841
MR		 4862 return 0;
4863};
4864
2f2f4251
M		 4865static int patch_stac922x(struct hda_codec *codec)
4866{
4867 struct sigmatel_spec *spec;
c7d4b2fa 4868 int err;
2f2f4251 4869
e560d8d8 4870 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4871 if (spec == NULL)
4872 return -ENOMEM;
4873
4874 codec->spec = spec;
a4eed138 4875 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4876 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4877 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4878 stac922x_models,
4879 stac922x_cfg_tbl);
536319af 4880 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4881 spec->gpio_mask = spec->gpio_dir = 0x03;
4882 spec->gpio_data = 0x03;
3fc24d85
TI		 4883 /* Intel Macs have all same PCI SSID, so we need to check
4884 * codec SSID to distinguish the exact models
4885 */
6f0778d8 4886 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4887 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4888
4889 case 0x106b0800:
4890 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4891 break;
5d5d3bc3
IZ		 4892 case 0x106b0600:
4893 case 0x106b0700:
4894 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4895 break;
5d5d3bc3
IZ		 4896 case 0x106b0e00:
4897 case 0x106b0f00:
4898 case 0x106b1600:
4899 case 0x106b1700:
4900 case 0x106b0200:
4901 case 0x106b1e00:
4902 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4903 break;
5d5d3bc3
IZ		 4904 case 0x106b1a00:
4905 case 0x00000100:
4906 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4907 break;
5d5d3bc3
IZ		 4908 case 0x106b0a00:
4909 case 0x106b2200:
4910 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4911 break;
536319af
NB		 4912 default:
4913 spec->board_config = STAC_INTEL_MAC_V3;
4914 break;
3fc24d85
TI		 4915 }
4916 }
4917
9e507abd 4918 again:
11b44bbd
RF		 4919 if (spec->board_config < 0) {
4920 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4921 "using BIOS defaults\n");
4922 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4923 } else
4924 err = stac_save_pin_cfgs(codec,
4925 stac922x_brd_tbl[spec->board_config]);
4926 if (err < 0) {
4927 stac92xx_free(codec);
4928 return err;
403d1944 4929 }
2f2f4251 4930
c7d4b2fa
M		 4931 spec->adc_nids = stac922x_adc_nids;
4932 spec->mux_nids = stac922x_mux_nids;
2549413e 4933 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4934 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4935 spec->num_dmics = 0;
a64135a2 4936 spec->num_pwrs = 0;
c7d4b2fa
M		 4937
4938 spec->init = stac922x_core_init;
2f2f4251 4939 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4940
4941 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4942
3cc08dc6 4943 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4944 if (!err) {
4945 if (spec->board_config < 0) {
4946 printk(KERN_WARNING "hda_codec: No auto-config is "
4947 "available, default to model=ref\n");
4948 spec->board_config = STAC_D945_REF;
4949 goto again;
4950 }
4951 err = -EINVAL;
4952 }
3cc08dc6
MP		 4953 if (err < 0) {
4954 stac92xx_free(codec);
4955 return err;
4956 }
4957
4958 codec->patch_ops = stac92xx_patch_ops;
4959
807a4636
TI		 4960 /* Fix Mux capture level; max to 2 */
4961 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4962 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4963 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4964 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4965 (0 << AC_AMPCAP_MUTE_SHIFT));
4966
3cc08dc6
MP		 4967 return 0;
4968}
4969
4970static int patch_stac927x(struct hda_codec *codec)
4971{
4972 struct sigmatel_spec *spec;
4973 int err;
4974
4975 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4976 if (spec == NULL)
4977 return -ENOMEM;
4978
4979 codec->spec = spec;
a4eed138 4980 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4981 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4982 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4983 stac927x_models,
4984 stac927x_cfg_tbl);
9e507abd 4985 again:
8e9068b1
MR		 4986 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4987 if (spec->board_config < 0)
4988 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4989 "STAC927x, using BIOS defaults\n");
11b44bbd 4990 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4991 } else
4992 err = stac_save_pin_cfgs(codec,
4993 stac927x_brd_tbl[spec->board_config]);
4994 if (err < 0) {
4995 stac92xx_free(codec);
4996 return err;
3cc08dc6
MP		 4997 }
4998
1cd2224c 4999 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5000 spec->adc_nids = stac927x_adc_nids;
5001 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5002 spec->mux_nids = stac927x_mux_nids;
5003 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5004 spec->smux_nids = stac927x_smux_nids;
5005 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5006 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5007 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5008 spec->multiout.dac_nids = spec->dac_nids;
5009
81d3dbde 5010 switch (spec->board_config) {
93ed1503 5011 case STAC_D965_3ST:
93ed1503 5012 case STAC_D965_5ST:
8e9068b1 5013 /* GPIO0 High = Enable EAPD */
0fc9dec4 5014 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5015 spec->gpio_data = 0x01;
8e9068b1
MR		 5016 spec->num_dmics = 0;
5017
93ed1503 5018 spec->init = d965_core_init;
9e05b7a3 5019 spec->mixer = stac927x_mixer;
81d3dbde 5020 break;
8e9068b1 5021 case STAC_DELL_BIOS:
780c8be4
MR		 5022 switch (codec->subsystem_id) {
5023 case 0x10280209:
5024 case 0x1028022e:
5025 /* correct the device field to SPDIF out */
af9f341a 5026 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5027 break;
5028 };
03d7ca17 5029 /* configure the analog microphone on some laptops */
af9f341a 5030 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5031 /* correct the front output jack as a hp out */
af9f341a 5032 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5033 /* correct the front input jack as a mic */
af9f341a 5034 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5035 /* fallthru */
8e9068b1
MR		 5036 case STAC_DELL_3ST:
5037 /* GPIO2 High = Enable EAPD */
0fc9dec4 5038 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5039 spec->gpio_data = 0x04;
7f16859a
MR		 5040 spec->dmic_nids = stac927x_dmic_nids;
5041 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5042
8e9068b1
MR		 5043 spec->init = d965_core_init;
5044 spec->mixer = stac927x_mixer;
5045 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5046 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5047 break;
5048 default:
b2c4f4d7
MR		 5049 if (spec->board_config > STAC_D965_REF) {
5050 /* GPIO0 High = Enable EAPD */
5051 spec->eapd_mask = spec->gpio_mask = 0x01;
5052 spec->gpio_dir = spec->gpio_data = 0x01;
5053 }
8e9068b1
MR		 5054 spec->num_dmics = 0;
5055
5056 spec->init = stac927x_core_init;
5057 spec->mixer = stac927x_mixer;
7f16859a
MR		 5058 }
5059
a64135a2 5060 spec->num_pwrs = 0;
e1f0d669
MR		 5061 spec->aloopback_mask = 0x40;
5062 spec->aloopback_shift = 0;
c0cea0d0 5063 spec->eapd_switch = 1;
8e9068b1 5064
3cc08dc6 5065 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5066 if (!err) {
5067 if (spec->board_config < 0) {
5068 printk(KERN_WARNING "hda_codec: No auto-config is "
5069 "available, default to model=ref\n");
5070 spec->board_config = STAC_D965_REF;
5071 goto again;
5072 }
5073 err = -EINVAL;
5074 }
c7d4b2fa
M		 5075 if (err < 0) {
5076 stac92xx_free(codec);
5077 return err;
5078 }
2f2f4251
M		 5079
5080 codec->patch_ops = stac92xx_patch_ops;
5081
2d34e1b3
TI		 5082 codec->proc_widget_hook = stac927x_proc_hook;
5083
52987656
TI		 5084 /*
5085 * !!FIXME!!
5086 * The STAC927x seem to require fairly long delays for certain
5087 * command sequences. With too short delays (even if the answer
5088 * is set to RIRB properly), it results in the silence output
5089 * on some hardwares like Dell.
5090 *
5091 * The below flag enables the longer delay (see get_response
5092 * in hda_intel.c).
5093 */
5094 codec->bus->needs_damn_long_delay = 1;
5095
e28d8322
TI		 5096 /* no jack detecion for ref-no-jd model */
5097 if (spec->board_config == STAC_D965_REF_NO_JD)
5098 spec->hp_detect = 0;
5099
2f2f4251
M		 5100 return 0;
5101}
5102
f3302a59
MP		 5103static int patch_stac9205(struct hda_codec *codec)
5104{
5105 struct sigmatel_spec *spec;
8259980e 5106 int err;
f3302a59
MP		 5107
5108 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5109 if (spec == NULL)
5110 return -ENOMEM;
5111
5112 codec->spec = spec;
a4eed138 5113 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5114 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5115 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5116 stac9205_models,
5117 stac9205_cfg_tbl);
9e507abd 5118 again:
11b44bbd
RF		 5119 if (spec->board_config < 0) {
5120 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5121 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5122 } else
5123 err = stac_save_pin_cfgs(codec,
5124 stac9205_brd_tbl[spec->board_config]);
5125 if (err < 0) {
5126 stac92xx_free(codec);
5127 return err;
f3302a59
MP		 5128 }
5129
1cd2224c 5130 spec->digbeep_nid = 0x23;
f3302a59 5131 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5132 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5133 spec->mux_nids = stac9205_mux_nids;
2549413e 5134 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5135 spec->smux_nids = stac9205_smux_nids;
5136 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5137 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5138 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5139 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5140 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5141 spec->num_pwrs = 0;
f3302a59
MP		 5142
5143 spec->init = stac9205_core_init;
5144 spec->mixer = stac9205_mixer;
5145
e1f0d669
MR		 5146 spec->aloopback_mask = 0x40;
5147 spec->aloopback_shift = 0;
c0cea0d0 5148 spec->eapd_switch = 1;
f3302a59 5149 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5150
ae0a8ed8 5151 switch (spec->board_config){
ae0a8ed8 5152 case STAC_9205_DELL_M43:
87d48363 5153 /* Enable SPDIF in/out */
af9f341a
TI		 5154 stac_change_pin_config(codec, 0x1f, 0x01441030);
5155 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5156
4fe5195c 5157 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5158 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5159 if (err < 0)
5160 return err;
c5d08bb5 5161 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5162 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5163 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5164 AC_VERB_SET_UNSOLICITED_ENABLE,
5165 AC_USRSP_EN | err);
4fe5195c
MR		 5166
5167 spec->gpio_dir = 0x0b;
0fc9dec4 5168 spec->eapd_mask = 0x01;
4fe5195c
MR		 5169 spec->gpio_mask = 0x1b;
5170 spec->gpio_mute = 0x10;
e2e7d624 5171 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5172 * GPIO3 Low = DRM
87d48363 5173 */
4fe5195c 5174 spec->gpio_data = 0x01;
ae0a8ed8 5175 break;
b2c4f4d7
MR		 5176 case STAC_9205_REF:
5177 /* SPDIF-In enabled */
5178 break;
ae0a8ed8
TD		 5179 default:
5180 /* GPIO0 High = EAPD */
0fc9dec4 5181 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5182 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5183 break;
5184 }
33382403 5185
f3302a59 5186 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5187 if (!err) {
5188 if (spec->board_config < 0) {
5189 printk(KERN_WARNING "hda_codec: No auto-config is "
5190 "available, default to model=ref\n");
5191 spec->board_config = STAC_9205_REF;
5192 goto again;
5193 }
5194 err = -EINVAL;
5195 }
f3302a59
MP		 5196 if (err < 0) {
5197 stac92xx_free(codec);
5198 return err;
5199 }
5200
5201 codec->patch_ops = stac92xx_patch_ops;
5202
2d34e1b3
TI		 5203 codec->proc_widget_hook = stac9205_proc_hook;
5204
f3302a59
MP		 5205 return 0;
5206}
5207
db064e50 5208/*
6d859065 5209 * STAC9872 hack
db064e50
TI		 5210 */
5211
99ccc560 5212/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5213static hda_nid_t vaio_dacs[] = { 0x2 };
5214#define VAIO_HP_DAC 0x5
5215static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5216static hda_nid_t vaio_mux_nids[] = { 0x15 };
5217
5218static struct hda_input_mux vaio_mux = {
a3a2f429 5219 .num_items = 3,
db064e50 5220 .items = {
d773781c 5221 /* { "HP", 0x0 }, */
1624cb9a
TI		 5222 { "Mic Jack", 0x1 },
5223 { "Internal Mic", 0x2 },
db064e50
TI		 5224 { "PCM", 0x3 },
5225 }
5226};
5227
5228static struct hda_verb vaio_init[] = {
5229 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5230 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5231 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5232 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5233 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5234 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5235 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5236 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5237 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5238 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5239 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5240 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5241 {}
5242};
5243
6d859065
GM		 5244static struct hda_verb vaio_ar_init[] = {
5245 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5246 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5247 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5248 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5249/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5250 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5251 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5252 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5253 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5254/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5255 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5256 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5257 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5258 {}
5259};
5260
db064e50 5261static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5262 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5263 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5264 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5265 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5266 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5267 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5268 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5269 {
5270 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5271 .name = "Capture Source",
5272 .count = 1,
5273 .info = stac92xx_mux_enum_info,
5274 .get = stac92xx_mux_enum_get,
5275 .put = stac92xx_mux_enum_put,
5276 },
5277 {}
5278};
5279
6d859065 5280static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5281 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5282 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5283 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5284 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5285 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5286 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5287 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5288 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5289 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5290 {
5291 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5292 .name = "Capture Source",
5293 .count = 1,
5294 .info = stac92xx_mux_enum_info,
5295 .get = stac92xx_mux_enum_get,
5296 .put = stac92xx_mux_enum_put,
5297 },
5298 {}
5299};
5300
5301static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5302 .build_controls = stac92xx_build_controls,
5303 .build_pcms = stac92xx_build_pcms,
5304 .init = stac92xx_init,
5305 .free = stac92xx_free,
cb53c626 5306#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5307 .resume = stac92xx_resume,
5308#endif
5309};
5310
72e7b0dd
TI		 5311static int stac9872_vaio_init(struct hda_codec *codec)
5312{
5313 int err;
5314
5315 err = stac92xx_init(codec);
5316 if (err < 0)
5317 return err;
5318 if (codec->patch_ops.unsol_event)
5319 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5320 return 0;
5321}
5322
5323static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5324{
e6e3ea25 5325 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5326 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5327 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5328 } else {
5329 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5330 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5331 }
5332}
5333
5334static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5335{
5336 switch (res >> 26) {
5337 case STAC_HP_EVENT:
5338 stac9872_vaio_hp_detect(codec, res);
5339 break;
5340 }
5341}
5342
5343static struct hda_codec_ops stac9872_vaio_patch_ops = {
5344 .build_controls = stac92xx_build_controls,
5345 .build_pcms = stac92xx_build_pcms,
5346 .init = stac9872_vaio_init,
5347 .free = stac92xx_free,
5348 .unsol_event = stac9872_vaio_unsol_event,
5349#ifdef CONFIG_PM
5350 .resume = stac92xx_resume,
5351#endif
5352};
5353
6d859065
GM		 5354enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5355 CXD9872RD_VAIO,
5356 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5357 STAC9872AK_VAIO,
5358 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5359 STAC9872K_VAIO,
5360 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5361 CXD9872AKD_VAIO,
5362 STAC_9872_MODELS,
5363};
5364
5365static const char *stac9872_models[STAC_9872_MODELS] = {
5366 [CXD9872RD_VAIO] = "vaio",
5367 [CXD9872AKD_VAIO] = "vaio-ar",
5368};
5369
5370static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5371 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5372 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5373 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5374 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5375 {}
5376};
5377
6d859065 5378static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5379{
5380 struct sigmatel_spec *spec;
5381 int board_config;
5382
f5fcc13c
TI		 5383 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5384 stac9872_models,
5385 stac9872_cfg_tbl);
db064e50
TI		 5386 if (board_config < 0)
5387 /* unknown config, let generic-parser do its job... */
5388 return snd_hda_parse_generic_codec(codec);
5389
5390 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5391 if (spec == NULL)
5392 return -ENOMEM;
5393
5394 codec->spec = spec;
5395 switch (board_config) {
6d859065
GM		 5396 case CXD9872RD_VAIO:
5397 case STAC9872AK_VAIO:
5398 case STAC9872K_VAIO:
db064e50
TI		 5399 spec->mixer = vaio_mixer;
5400 spec->init = vaio_init;
5401 spec->multiout.max_channels = 2;
5402 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5403 spec->multiout.dac_nids = vaio_dacs;
5404 spec->multiout.hp_nid = VAIO_HP_DAC;
5405 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5406 spec->adc_nids = vaio_adcs;
a64135a2 5407 spec->num_pwrs = 0;
db064e50
TI		 5408 spec->input_mux = &vaio_mux;
5409 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5410 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5411 break;
6d859065
GM		 5412
5413 case CXD9872AKD_VAIO:
5414 spec->mixer = vaio_ar_mixer;
5415 spec->init = vaio_ar_init;
5416 spec->multiout.max_channels = 2;
5417 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5418 spec->multiout.dac_nids = vaio_dacs;
5419 spec->multiout.hp_nid = VAIO_HP_DAC;
5420 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5421 spec->num_pwrs = 0;
6d859065
GM		 5422 spec->adc_nids = vaio_adcs;
5423 spec->input_mux = &vaio_mux;
5424 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5425 codec->patch_ops = stac9872_patch_ops;
6d859065 5426 break;
db064e50
TI		 5427 }
5428
db064e50
TI		 5429 return 0;
5430}
5431
5432
2f2f4251
M		 5433/*
5434 * patch entries
5435 */
1289e9e8 5436static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5437 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5438 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5439 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5440 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5441 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5442 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5443 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5444 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5445 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5446 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5447 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5448 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5449 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5450 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5451 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5452 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5453 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5454 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5455 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5456 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5457 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5458 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5459 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5460 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5461 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5462 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5463 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5464 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5465 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5466 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5467 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5468 /* The following does not take into account .id=0x83847661 when subsys =
5469 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5470 * currently not fully supported.
5471 */
5472 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5473 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5474 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5475 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5476 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5477 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5478 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5479 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5480 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5481 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5482 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5483 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5484 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5485 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5486 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5487 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5488 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5489 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5490 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5491 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5492 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5493 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5494 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5495 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5496 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5497 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5498 {} /* terminator */
5499};
1289e9e8
TI		 5500
5501MODULE_ALIAS("snd-hda-codec-id:8384*");
5502MODULE_ALIAS("snd-hda-codec-id:111d*");
5503
5504MODULE_LICENSE("GPL");
5505MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5506
5507static struct hda_codec_preset_list sigmatel_list = {
5508 .preset = snd_hda_preset_sigmatel,
5509 .owner = THIS_MODULE,
5510};
5511
5512static int __init patch_sigmatel_init(void)
5513{
5514 return snd_hda_add_codec_preset(&sigmatel_list);
5515}
5516
5517static void __exit patch_sigmatel_exit(void)
5518{
5519 snd_hda_delete_codec_preset(&sigmatel_list);
5520}
5521
5522module_init(patch_sigmatel_init)
5523module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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