ALSA: hda - Fix unused variable compile warning
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI
38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
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45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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TI
61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
d9a4268e 69 STAC_9205_EAPD,
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TI
70 STAC_9205_MODELS
71};
72
e1f0d669 73enum {
9e43f0de 74 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 75 STAC_92HD73XX_REF,
661cd8fb
TI
76 STAC_DELL_M6_AMIC,
77 STAC_DELL_M6_DMIC,
78 STAC_DELL_M6_BOTH,
6b3ab21e 79 STAC_DELL_EQ,
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80 STAC_92HD73XX_MODELS
81};
82
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83enum {
84 STAC_92HD83XXX_REF,
32ed3f46 85 STAC_92HD83XXX_PWR_REF,
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86 STAC_92HD83XXX_MODELS
87};
88
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89enum {
90 STAC_92HD71BXX_REF,
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91 STAC_DELL_M4_1,
92 STAC_DELL_M4_2,
3a7abfd2 93 STAC_DELL_M4_3,
6a14f585 94 STAC_HP_M4,
1b0652eb 95 STAC_HP_DV5,
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96 STAC_92HD71BXX_MODELS
97};
98
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99enum {
100 STAC_925x_REF,
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101 STAC_M1,
102 STAC_M1_2,
103 STAC_M2,
8e21c34c 104 STAC_M2_2,
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105 STAC_M3,
106 STAC_M5,
107 STAC_M6,
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TD
108 STAC_925x_MODELS
109};
110
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111enum {
112 STAC_D945_REF,
113 STAC_D945GTP3,
114 STAC_D945GTP5,
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115 STAC_INTEL_MAC_V1,
116 STAC_INTEL_MAC_V2,
117 STAC_INTEL_MAC_V3,
118 STAC_INTEL_MAC_V4,
119 STAC_INTEL_MAC_V5,
536319af
NB
120 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
121 * is given, one of the above models will be
122 * chosen according to the subsystem id. */
dfe495d0 123 /* for backward compatibility */
f5fcc13c 124 STAC_MACMINI,
3fc24d85 125 STAC_MACBOOK,
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NB
126 STAC_MACBOOK_PRO_V1,
127 STAC_MACBOOK_PRO_V2,
f16928fb 128 STAC_IMAC_INTEL,
0dae0f83 129 STAC_IMAC_INTEL_20,
8c650087 130 STAC_ECS_202,
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131 STAC_922X_DELL_D81,
132 STAC_922X_DELL_D82,
133 STAC_922X_DELL_M81,
134 STAC_922X_DELL_M82,
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TI
135 STAC_922X_MODELS
136};
137
138enum {
e28d8322 139 STAC_D965_REF_NO_JD, /* no jack-detection */
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140 STAC_D965_REF,
141 STAC_D965_3ST,
142 STAC_D965_5ST,
4ff076e5 143 STAC_DELL_3ST,
8e9068b1 144 STAC_DELL_BIOS,
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145 STAC_927X_MODELS
146};
403d1944 147
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148struct sigmatel_event {
149 hda_nid_t nid;
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150 unsigned char type;
151 unsigned char tag;
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152 int data;
153};
154
155struct sigmatel_jack {
156 hda_nid_t nid;
157 int type;
158 struct snd_jack *jack;
159};
160
2f2f4251 161struct sigmatel_spec {
c8b6bf9b 162 struct snd_kcontrol_new *mixers[4];
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163 unsigned int num_mixers;
164
403d1944 165 int board_config;
c0cea0d0 166 unsigned int eapd_switch: 1;
c7d4b2fa 167 unsigned int surr_switch: 1;
3cc08dc6 168 unsigned int alt_switch: 1;
82bc955f 169 unsigned int hp_detect: 1;
00ef50c2 170 unsigned int spdif_mute: 1;
7c7767eb 171 unsigned int check_volume_offset:1;
c7d4b2fa 172
4fe5195c 173 /* gpio lines */
0fc9dec4 174 unsigned int eapd_mask;
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MR
175 unsigned int gpio_mask;
176 unsigned int gpio_dir;
177 unsigned int gpio_data;
178 unsigned int gpio_mute;
179
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180 /* stream */
181 unsigned int stream_delay;
182
4fe5195c 183 /* analog loopback */
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184 unsigned char aloopback_mask;
185 unsigned char aloopback_shift;
8259980e 186
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187 /* power management */
188 unsigned int num_pwrs;
d0513fc6 189 unsigned int *pwr_mapping;
a64135a2 190 hda_nid_t *pwr_nids;
b76c850f 191 hda_nid_t *dac_list;
a64135a2 192
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MR
193 /* jack detection */
194 struct snd_array jacks;
195
196 /* events */
197 struct snd_array events;
198
2f2f4251 199 /* playback */
b22b4821 200 struct hda_input_mux *mono_mux;
89385035 201 struct hda_input_mux *amp_mux;
b22b4821 202 unsigned int cur_mmux;
2f2f4251 203 struct hda_multi_out multiout;
3cc08dc6 204 hda_nid_t dac_nids[5];
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TI
205 hda_nid_t hp_dacs[5];
206 hda_nid_t speaker_dacs[5];
2f2f4251 207
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208 int volume_offset;
209
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210 /* capture */
211 hda_nid_t *adc_nids;
2f2f4251 212 unsigned int num_adcs;
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213 hda_nid_t *mux_nids;
214 unsigned int num_muxes;
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215 hda_nid_t *dmic_nids;
216 unsigned int num_dmics;
e1f0d669 217 hda_nid_t *dmux_nids;
1697055e 218 unsigned int num_dmuxes;
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MR
219 hda_nid_t *smux_nids;
220 unsigned int num_smuxes;
65973632 221 const char **spdif_labels;
d9737751 222
dabbed6f 223 hda_nid_t dig_in_nid;
b22b4821 224 hda_nid_t mono_nid;
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225 hda_nid_t anabeep_nid;
226 hda_nid_t digbeep_nid;
2f2f4251 227
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228 /* pin widgets */
229 hda_nid_t *pin_nids;
230 unsigned int num_pins;
2f2f4251 231 unsigned int *pin_configs;
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232
233 /* codec specific stuff */
234 struct hda_verb *init;
c8b6bf9b 235 struct snd_kcontrol_new *mixer;
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236
237 /* capture source */
8b65727b 238 struct hda_input_mux *dinput_mux;
e1f0d669 239 unsigned int cur_dmux[2];
c7d4b2fa 240 struct hda_input_mux *input_mux;
3cc08dc6 241 unsigned int cur_mux[3];
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MR
242 struct hda_input_mux *sinput_mux;
243 unsigned int cur_smux[2];
2a9c7816
MR
244 unsigned int cur_amux;
245 hda_nid_t *amp_nids;
246 unsigned int num_amps;
8daaaa97 247 unsigned int powerdown_adcs;
2f2f4251 248
403d1944
MP
249 /* i/o switches */
250 unsigned int io_switch[2];
0fb87bb4 251 unsigned int clfe_swap;
c21ca4a8
TI
252 hda_nid_t line_switch; /* shared line-in for input and output */
253 hda_nid_t mic_switch; /* shared mic-in for input and output */
254 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 255 unsigned int aloopback;
2f2f4251 256
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257 struct hda_pcm pcm_rec[2]; /* PCM information */
258
259 /* dynamic controls and input_mux */
260 struct auto_pin_cfg autocfg;
603c4019 261 struct snd_array kctls;
8b65727b 262 struct hda_input_mux private_dimux;
c7d4b2fa 263 struct hda_input_mux private_imux;
d9737751 264 struct hda_input_mux private_smux;
89385035 265 struct hda_input_mux private_amp_mux;
b22b4821 266 struct hda_input_mux private_mono_mux;
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267};
268
269static hda_nid_t stac9200_adc_nids[1] = {
270 0x03,
271};
272
273static hda_nid_t stac9200_mux_nids[1] = {
274 0x0c,
275};
276
277static hda_nid_t stac9200_dac_nids[1] = {
278 0x02,
279};
280
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MR
281static hda_nid_t stac92hd73xx_pwr_nids[8] = {
282 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
283 0x0f, 0x10, 0x11
284};
285
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MR
286static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
287 0x26, 0,
288};
289
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290static hda_nid_t stac92hd73xx_adc_nids[2] = {
291 0x1a, 0x1b
292};
293
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294#define DELL_M6_AMP 2
295static hda_nid_t stac92hd73xx_amp_nids[3] = {
296 0x0b, 0x0c, 0x0e
89385035
MR
297};
298
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299#define STAC92HD73XX_NUM_DMICS 2
300static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
301 0x13, 0x14, 0
302};
303
304#define STAC92HD73_DAC_COUNT 5
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MR
305
306static hda_nid_t stac92hd73xx_mux_nids[4] = {
307 0x28, 0x29, 0x2a, 0x2b,
308};
309
310static hda_nid_t stac92hd73xx_dmux_nids[2] = {
311 0x20, 0x21,
312};
313
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314static hda_nid_t stac92hd73xx_smux_nids[2] = {
315 0x22, 0x23,
316};
317
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318#define STAC92HD83XXX_NUM_DMICS 2
319static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
320 0x11, 0x12, 0
321};
322
d0513fc6 323#define STAC92HD83_DAC_COUNT 3
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MR
324
325static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
326 0x17, 0x18,
327};
328
329static hda_nid_t stac92hd83xxx_adc_nids[2] = {
330 0x15, 0x16,
331};
332
333static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
334 0xa, 0xb, 0xd, 0xe,
335};
336
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MR
337static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
338 0x1e, 0,
339};
340
d0513fc6 341static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 342 0x03, 0x0c, 0x20, 0x40,
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MR
343};
344
9248f269 345static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR
346 0xc,
347};
348
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349static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
350 0x0a, 0x0d, 0x0f
351};
352
e035b841
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353static hda_nid_t stac92hd71bxx_adc_nids[2] = {
354 0x12, 0x13,
355};
356
357static hda_nid_t stac92hd71bxx_mux_nids[2] = {
358 0x1a, 0x1b
359};
360
4b33c767
MR
361static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
362 0x1c, 0x1d,
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363};
364
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365static hda_nid_t stac92hd71bxx_smux_nids[2] = {
366 0x24, 0x25,
367};
368
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369#define STAC92HD71BXX_NUM_DMICS 2
370static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
371 0x18, 0x19, 0
372};
373
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MR
374static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
375 0x22, 0
376};
377
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TD
378static hda_nid_t stac925x_adc_nids[1] = {
379 0x03,
380};
381
382static hda_nid_t stac925x_mux_nids[1] = {
383 0x0f,
384};
385
386static hda_nid_t stac925x_dac_nids[1] = {
387 0x02,
388};
389
f6e9852a
TI
390#define STAC925X_NUM_DMICS 1
391static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
392 0x15, 0
2c11f955
TD
393};
394
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TI
395static hda_nid_t stac925x_dmux_nids[1] = {
396 0x14,
397};
398
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M
399static hda_nid_t stac922x_adc_nids[2] = {
400 0x06, 0x07,
401};
402
403static hda_nid_t stac922x_mux_nids[2] = {
404 0x12, 0x13,
405};
406
45c1d85b
MR
407static hda_nid_t stac927x_slave_dig_outs[2] = {
408 0x1f, 0,
409};
410
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MP
411static hda_nid_t stac927x_adc_nids[3] = {
412 0x07, 0x08, 0x09
413};
414
415static hda_nid_t stac927x_mux_nids[3] = {
416 0x15, 0x16, 0x17
417};
418
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419static hda_nid_t stac927x_smux_nids[1] = {
420 0x21,
421};
422
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423static hda_nid_t stac927x_dac_nids[6] = {
424 0x02, 0x03, 0x04, 0x05, 0x06, 0
425};
426
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427static hda_nid_t stac927x_dmux_nids[1] = {
428 0x1b,
429};
430
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431#define STAC927X_NUM_DMICS 2
432static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
433 0x13, 0x14, 0
434};
435
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MR
436static const char *stac927x_spdif_labels[5] = {
437 "Digital Playback", "ADAT", "Analog Mux 1",
438 "Analog Mux 2", "Analog Mux 3"
439};
440
f3302a59
MP
441static hda_nid_t stac9205_adc_nids[2] = {
442 0x12, 0x13
443};
444
445static hda_nid_t stac9205_mux_nids[2] = {
446 0x19, 0x1a
447};
448
e1f0d669 449static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 450 0x1d,
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451};
452
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453static hda_nid_t stac9205_smux_nids[1] = {
454 0x21,
455};
456
f6e9852a
TI
457#define STAC9205_NUM_DMICS 2
458static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
459 0x17, 0x18, 0
8b65727b
MP
460};
461
c7d4b2fa 462static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
463 0x08, 0x09, 0x0d, 0x0e,
464 0x0f, 0x10, 0x11, 0x12,
2f2f4251
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465};
466
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TD
467static hda_nid_t stac925x_pin_nids[8] = {
468 0x07, 0x08, 0x0a, 0x0b,
469 0x0c, 0x0d, 0x10, 0x11,
470};
471
2f2f4251
M
472static hda_nid_t stac922x_pin_nids[10] = {
473 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
474 0x0f, 0x10, 0x11, 0x15, 0x1b,
475};
476
a7662640 477static hda_nid_t stac92hd73xx_pin_nids[13] = {
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MR
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 480 0x14, 0x22, 0x23
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MR
481};
482
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MR
483static hda_nid_t stac92hd83xxx_pin_nids[14] = {
484 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
485 0x0f, 0x10, 0x11, 0x12, 0x13,
486 0x1d, 0x1e, 0x1f, 0x20
487};
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HRK
488
489#define STAC92HD71BXX_NUM_PINS 13
490static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
492 0x00, 0x14, 0x18, 0x19, 0x1e,
493 0x1f, 0x20, 0x27
494};
495static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
496 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
497 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 498 0x1f, 0x20, 0x27
e035b841
MR
499};
500
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MP
501static hda_nid_t stac927x_pin_nids[14] = {
502 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
503 0x0f, 0x10, 0x11, 0x12, 0x13,
504 0x14, 0x21, 0x22, 0x23,
505};
506
f3302a59
MP
507static hda_nid_t stac9205_pin_nids[12] = {
508 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
509 0x0f, 0x14, 0x16, 0x17, 0x18,
510 0x21, 0x22,
f3302a59
MP
511};
512
89385035
MR
513#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
514
515static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
520 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
521
522 kcontrol->private_value ^= get_amp_nid(kcontrol);
523 kcontrol->private_value |= nid;
524
525 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
526}
527
528static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_value *ucontrol)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
534
535 kcontrol->private_value ^= get_amp_nid(kcontrol);
536 kcontrol->private_value |= nid;
537
538 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
539}
540
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MP
541static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_info *uinfo)
543{
544 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
545 struct sigmatel_spec *spec = codec->spec;
546 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
547}
548
549static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *ucontrol)
551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
e1f0d669 554 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 555
e1f0d669 556 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
557 return 0;
558}
559
560static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
561 struct snd_ctl_elem_value *ucontrol)
562{
563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
564 struct sigmatel_spec *spec = codec->spec;
e1f0d669 565 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
566
567 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 568 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
569}
570
d9737751
MR
571static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
572 struct snd_ctl_elem_info *uinfo)
573{
574 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
575 struct sigmatel_spec *spec = codec->spec;
576 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
577}
578
579static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581{
582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
583 struct sigmatel_spec *spec = codec->spec;
584 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
585
586 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
587 return 0;
588}
589
590static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
591 struct snd_ctl_elem_value *ucontrol)
592{
593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
594 struct sigmatel_spec *spec = codec->spec;
00ef50c2 595 struct hda_input_mux *smux = &spec->private_smux;
d9737751 596 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
597 int err, val;
598 hda_nid_t nid;
d9737751 599
00ef50c2 600 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 601 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
602 if (err < 0)
603 return err;
604
605 if (spec->spdif_mute) {
606 if (smux_idx == 0)
607 nid = spec->multiout.dig_out_nid;
608 else
609 nid = codec->slave_dig_outs[smux_idx - 1];
610 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 611 val = HDA_AMP_MUTE;
00ef50c2 612 else
c9b46f91 613 val = 0;
00ef50c2 614 /* un/mute SPDIF out */
c9b46f91
TI
615 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
616 HDA_AMP_MUTE, val);
00ef50c2
MR
617 }
618 return 0;
d9737751
MR
619}
620
c8b6bf9b 621static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 625 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
626}
627
c8b6bf9b 628static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
629{
630 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
631 struct sigmatel_spec *spec = codec->spec;
632 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
633
634 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
635 return 0;
636}
637
c8b6bf9b 638static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
643
c7d4b2fa 644 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
645 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
646}
647
b22b4821
MR
648static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_info *uinfo)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
652 struct sigmatel_spec *spec = codec->spec;
653 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
654}
655
656static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_value *ucontrol)
658{
659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
660 struct sigmatel_spec *spec = codec->spec;
661
662 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
663 return 0;
664}
665
666static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
668{
669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
670 struct sigmatel_spec *spec = codec->spec;
671
672 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
673 spec->mono_nid, &spec->cur_mmux);
674}
675
89385035
MR
676static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
677 struct snd_ctl_elem_info *uinfo)
678{
679 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
680 struct sigmatel_spec *spec = codec->spec;
681 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
682}
683
684static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
685 struct snd_ctl_elem_value *ucontrol)
686{
687 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
688 struct sigmatel_spec *spec = codec->spec;
689
690 ucontrol->value.enumerated.item[0] = spec->cur_amux;
691 return 0;
692}
693
694static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
695 struct snd_ctl_elem_value *ucontrol)
696{
697 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
698 struct sigmatel_spec *spec = codec->spec;
699 struct snd_kcontrol *ctl =
700 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
701 if (!ctl)
702 return -EINVAL;
703
704 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
705 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
706
707 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
708 0, &spec->cur_amux);
709}
710
5f10c4a9
ML
711#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
712
713static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
714 struct snd_ctl_elem_value *ucontrol)
715{
716 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 717 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
718 struct sigmatel_spec *spec = codec->spec;
719
e1f0d669
MR
720 ucontrol->value.integer.value[0] = !!(spec->aloopback &
721 (spec->aloopback_mask << idx));
5f10c4a9
ML
722 return 0;
723}
724
725static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
726 struct snd_ctl_elem_value *ucontrol)
727{
728 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
729 struct sigmatel_spec *spec = codec->spec;
e1f0d669 730 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 731 unsigned int dac_mode;
e1f0d669 732 unsigned int val, idx_val;
5f10c4a9 733
e1f0d669
MR
734 idx_val = spec->aloopback_mask << idx;
735 if (ucontrol->value.integer.value[0])
736 val = spec->aloopback | idx_val;
737 else
738 val = spec->aloopback & ~idx_val;
68ea7b2f 739 if (spec->aloopback == val)
5f10c4a9
ML
740 return 0;
741
68ea7b2f 742 spec->aloopback = val;
5f10c4a9 743
e1f0d669
MR
744 /* Only return the bits defined by the shift value of the
745 * first two bytes of the mask
746 */
5f10c4a9 747 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
748 kcontrol->private_value & 0xFFFF, 0x0);
749 dac_mode >>= spec->aloopback_shift;
5f10c4a9 750
e1f0d669 751 if (spec->aloopback & idx_val) {
5f10c4a9 752 snd_hda_power_up(codec);
e1f0d669 753 dac_mode |= idx_val;
5f10c4a9
ML
754 } else {
755 snd_hda_power_down(codec);
e1f0d669 756 dac_mode &= ~idx_val;
5f10c4a9
ML
757 }
758
759 snd_hda_codec_write_cache(codec, codec->afg, 0,
760 kcontrol->private_value >> 16, dac_mode);
761
762 return 1;
763}
764
c7d4b2fa 765static struct hda_verb stac9200_core_init[] = {
2f2f4251 766 /* set dac0mux for dac converter */
c7d4b2fa 767 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
768 {}
769};
770
1194b5b7
TI
771static struct hda_verb stac9200_eapd_init[] = {
772 /* set dac0mux for dac converter */
773 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
774 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
775 {}
776};
777
e1f0d669
MR
778static struct hda_verb stac92hd73xx_6ch_core_init[] = {
779 /* set master volume and direct control */
780 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
781 /* setup adcs to point to mixer */
782 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
783 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
784 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
785 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
786 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
d654a660
MR
795static struct hda_verb dell_eq_core_init[] = {
796 /* set master volume to max value without distortion
797 * and direct control */
798 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
799 /* setup adcs to point to mixer */
800 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
801 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 /* setup import muxs */
803 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
807 {}
808};
809
52fe0f9d 810static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 811 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
812 /* setup adcs to point to mixer */
813 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
814 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
815 /* setup import muxs */
816 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
820 {}
821};
822
e1f0d669
MR
823static struct hda_verb stac92hd73xx_8ch_core_init[] = {
824 /* set master volume and direct control */
825 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
826 /* setup adcs to point to mixer */
827 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
828 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
829 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
830 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
831 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
832 /* setup import muxs */
833 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
834 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
835 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
836 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
837 {}
838};
839
840static struct hda_verb stac92hd73xx_10ch_core_init[] = {
841 /* set master volume and direct control */
842 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
843 /* dac3 is connected to import3 mux */
844 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
845 /* setup adcs to point to mixer */
846 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
847 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
848 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
849 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
850 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
851 /* setup import muxs */
852 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
853 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
854 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
855 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
856 {}
857};
858
d0513fc6 859static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
860 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
861 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
862 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
863
864 /* power state controls amps */
865 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 866 {}
d0513fc6
MR
867};
868
e035b841 869static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
870 /* set master volume and direct control */
871 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 872 {}
541eee87
MR
873};
874
ca8d33fc 875#define HD_DISABLE_PORTF 1
541eee87 876static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
877 /* start of config #1 */
878
879 /* connect port 0f to audio mixer */
880 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
881 /* start of config #2 */
882
e035b841
MR
883 /* set master volume and direct control */
884 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
ca8d33fc
MR
885 {}
886};
887
888static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
889 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
890 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
891 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
892 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
893 {}
894};
895
8e21c34c
TD
896static struct hda_verb stac925x_core_init[] = {
897 /* set dac0mux for dac converter */
898 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
899 /* mute the master volume */
900 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
901 {}
902};
903
c7d4b2fa 904static struct hda_verb stac922x_core_init[] = {
2f2f4251 905 /* set master volume and direct control */
c7d4b2fa 906 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
907 {}
908};
909
93ed1503 910static struct hda_verb d965_core_init[] = {
19039bd0 911 /* set master volume and direct control */
93ed1503 912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
913 /* unmute node 0x1b */
914 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
915 /* select node 0x03 as DAC */
916 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
917 {}
918};
919
3cc08dc6
MP
920static struct hda_verb stac927x_core_init[] = {
921 /* set master volume and direct control */
922 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
923 /* enable analog pc beep path */
924 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
925 {}
926};
927
f3302a59
MP
928static struct hda_verb stac9205_core_init[] = {
929 /* set master volume and direct control */
930 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
931 /* enable analog pc beep path */
932 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
933 {}
934};
935
b22b4821
MR
936#define STAC_MONO_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Mono Mux", \
940 .count = 1, \
941 .info = stac92xx_mono_mux_enum_info, \
942 .get = stac92xx_mono_mux_enum_get, \
943 .put = stac92xx_mono_mux_enum_put, \
944 }
945
89385035
MR
946#define STAC_AMP_MUX \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = "Amp Selector Capture Switch", \
950 .count = 1, \
951 .info = stac92xx_amp_mux_enum_info, \
952 .get = stac92xx_amp_mux_enum_get, \
953 .put = stac92xx_amp_mux_enum_put, \
954 }
955
956#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
957 { \
958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
959 .name = xname, \
960 .index = 0, \
961 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
962 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
963 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
964 .info = stac92xx_amp_volume_info, \
965 .get = stac92xx_amp_volume_get, \
966 .put = stac92xx_amp_volume_put, \
967 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
968 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
969 }
970
e1f0d669 971#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Analog Loopback", \
e1f0d669 975 .count = cnt, \
5f10c4a9
ML
976 .info = stac92xx_aloopback_info, \
977 .get = stac92xx_aloopback_get, \
978 .put = stac92xx_aloopback_put, \
979 .private_value = verb_read | (verb_write << 16), \
980 }
981
c8b6bf9b 982static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
983 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
984 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
985 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
986 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
987 { } /* end */
988};
989
2a9c7816 990#define DELL_M6_MIXER 6
e1f0d669 991static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 992 /* start of config #1 */
e1f0d669
MR
993 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
994 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
995
e1f0d669
MR
996 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
997 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
998
2a9c7816
MR
999 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1000 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1001
1002 /* start of config #2 */
1003 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1004 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1005
e1f0d669
MR
1006 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1007 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1008
2a9c7816
MR
1009 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013
1014 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016
e1f0d669
MR
1017 { } /* end */
1018};
1019
1020static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1021 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1022
e1f0d669
MR
1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028
1029 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1030 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1033 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1036 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1039 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1040
1041 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1042 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1043 { } /* end */
1044};
1045
1046static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1047 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1048
e1f0d669
MR
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054
1055 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1056 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1059 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1062 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1065 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1068 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1069 { } /* end */
1070};
1071
d0513fc6
MR
1072
1073static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076
1077 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079
74b7ff48
MR
1080 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR
1083 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1084 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR
1086 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1087 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1088
74b7ff48
MR
1089 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1090 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1091
1092 /*
74b7ff48
MR
1093 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1094 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1095 */
1096 { } /* end */
1097};
1098
541eee87 1099static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
4b33c767 1100 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1101
9b35947f
MR
1102 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1103 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1104
1105 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1106 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1107 /* analog pc-beep replaced with digital beep support */
1108 /*
f7c5dda2
MR
1109 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1110 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1111 */
f7c5dda2 1112
687cb98e
MR
1113 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1114 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1115
687cb98e
MR
1116 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1117 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1118
1119 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1120 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1121
1122 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1123 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1124 { } /* end */
1125};
1126
541eee87 1127static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1128 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1129
541eee87
MR
1130 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1131 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1132
1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1135 { } /* end */
1136};
1137
8e21c34c 1138static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1139 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1140 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
8e21c34c 1141 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1142 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1143 { } /* end */
1144};
1145
9e05b7a3 1146static struct snd_kcontrol_new stac9205_mixer[] = {
e1f0d669 1147 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1148
1149 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1150 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1154 { } /* end */
1155};
1156
19039bd0 1157/* This needs to be generated dynamically based on sequence */
9e05b7a3 1158static struct snd_kcontrol_new stac922x_mixer[] = {
9e05b7a3
ML
1159 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1160 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1161
1162 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1163 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1164 { } /* end */
1165};
1166
9e05b7a3 1167
d1d985f0 1168static struct snd_kcontrol_new stac927x_mixer[] = {
e1f0d669 1169 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1170
9e05b7a3
ML
1171 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1172 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1173
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1179 { } /* end */
1180};
1181
1697055e
TI
1182static struct snd_kcontrol_new stac_dmux_mixer = {
1183 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1184 .name = "Digital Input Source",
1185 /* count set later */
1186 .info = stac92xx_dmux_enum_info,
1187 .get = stac92xx_dmux_enum_get,
1188 .put = stac92xx_dmux_enum_put,
1189};
1190
d9737751
MR
1191static struct snd_kcontrol_new stac_smux_mixer = {
1192 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1193 .name = "IEC958 Playback Source",
d9737751
MR
1194 /* count set later */
1195 .info = stac92xx_smux_enum_info,
1196 .get = stac92xx_smux_enum_get,
1197 .put = stac92xx_smux_enum_put,
1198};
1199
2134ea4f
TI
1200static const char *slave_vols[] = {
1201 "Front Playback Volume",
1202 "Surround Playback Volume",
1203 "Center Playback Volume",
1204 "LFE Playback Volume",
1205 "Side Playback Volume",
1206 "Headphone Playback Volume",
1207 "Headphone Playback Volume",
1208 "Speaker Playback Volume",
1209 "External Speaker Playback Volume",
1210 "Speaker2 Playback Volume",
1211 NULL
1212};
1213
1214static const char *slave_sws[] = {
1215 "Front Playback Switch",
1216 "Surround Playback Switch",
1217 "Center Playback Switch",
1218 "LFE Playback Switch",
1219 "Side Playback Switch",
1220 "Headphone Playback Switch",
1221 "Headphone Playback Switch",
1222 "Speaker Playback Switch",
1223 "External Speaker Playback Switch",
1224 "Speaker2 Playback Switch",
edb54a55 1225 "IEC958 Playback Switch",
2134ea4f
TI
1226 NULL
1227};
1228
603c4019 1229static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1230static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1231
2f2f4251
M
1232static int stac92xx_build_controls(struct hda_codec *codec)
1233{
1234 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1235 struct auto_pin_cfg *cfg = &spec->autocfg;
1236 hda_nid_t nid;
2f2f4251 1237 int err;
c7d4b2fa 1238 int i;
2f2f4251
M
1239
1240 err = snd_hda_add_new_ctls(codec, spec->mixer);
1241 if (err < 0)
1242 return err;
c7d4b2fa
M
1243
1244 for (i = 0; i < spec->num_mixers; i++) {
1245 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1246 if (err < 0)
1247 return err;
1248 }
1697055e
TI
1249 if (spec->num_dmuxes > 0) {
1250 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1251 err = snd_hda_ctl_add(codec,
1697055e
TI
1252 snd_ctl_new1(&stac_dmux_mixer, codec));
1253 if (err < 0)
1254 return err;
1255 }
d9737751 1256 if (spec->num_smuxes > 0) {
00ef50c2
MR
1257 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1258 struct hda_input_mux *smux = &spec->private_smux;
1259 /* check for mute support on SPDIF out */
1260 if (wcaps & AC_WCAP_OUT_AMP) {
1261 smux->items[smux->num_items].label = "Off";
1262 smux->items[smux->num_items].index = 0;
1263 smux->num_items++;
1264 spec->spdif_mute = 1;
1265 }
d9737751 1266 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1267 err = snd_hda_ctl_add(codec,
d9737751
MR
1268 snd_ctl_new1(&stac_smux_mixer, codec));
1269 if (err < 0)
1270 return err;
1271 }
c7d4b2fa 1272
dabbed6f
M
1273 if (spec->multiout.dig_out_nid) {
1274 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1275 if (err < 0)
1276 return err;
9a08160b
TI
1277 err = snd_hda_create_spdif_share_sw(codec,
1278 &spec->multiout);
1279 if (err < 0)
1280 return err;
1281 spec->multiout.share_spdif = 1;
dabbed6f 1282 }
da74ae3e 1283 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1284 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1285 if (err < 0)
1286 return err;
1287 }
2134ea4f
TI
1288
1289 /* if we have no master control, let's create it */
1290 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1291 unsigned int vmaster_tlv[4];
2134ea4f 1292 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1293 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1294 /* correct volume offset */
1295 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1296 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1297 vmaster_tlv, slave_vols);
2134ea4f
TI
1298 if (err < 0)
1299 return err;
1300 }
1301 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1302 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1303 NULL, slave_sws);
1304 if (err < 0)
1305 return err;
1306 }
1307
603c4019 1308 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1309
1310 /* create jack input elements */
1311 if (spec->hp_detect) {
1312 for (i = 0; i < cfg->hp_outs; i++) {
1313 int type = SND_JACK_HEADPHONE;
1314 nid = cfg->hp_pins[i];
1315 /* jack detection */
1316 if (cfg->hp_outs == i)
1317 type |= SND_JACK_LINEOUT;
1318 err = stac92xx_add_jack(codec, nid, type);
1319 if (err < 0)
1320 return err;
1321 }
1322 }
1323 for (i = 0; i < cfg->line_outs; i++) {
1324 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1325 SND_JACK_LINEOUT);
1326 if (err < 0)
1327 return err;
1328 }
1329 for (i = 0; i < AUTO_PIN_LAST; i++) {
1330 nid = cfg->input_pins[i];
1331 if (nid) {
1332 err = stac92xx_add_jack(codec, nid,
1333 SND_JACK_MICROPHONE);
1334 if (err < 0)
1335 return err;
1336 }
1337 }
1338
dabbed6f 1339 return 0;
2f2f4251
M
1340}
1341
403d1944 1342static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1343 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1344 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1345};
1346
58eec423
MCC
1347static unsigned int gateway9200_m4_pin_configs[8] = {
1348 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1349 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1350};
1351static unsigned int gateway9200_m4_2_pin_configs[8] = {
1352 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1353 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1354};
1355
1356/*
dfe495d0
TI
1357 STAC 9200 pin configs for
1358 102801A8
1359 102801DE
1360 102801E8
1361*/
1362static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1363 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1364 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1365};
1366
1367/*
1368 STAC 9200 pin configs for
1369 102801C0
1370 102801C1
1371*/
1372static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1373 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1374 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1375};
1376
1377/*
1378 STAC 9200 pin configs for
1379 102801C4 (Dell Dimension E310)
1380 102801C5
1381 102801C7
1382 102801D9
1383 102801DA
1384 102801E3
1385*/
1386static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1387 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1388 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1389};
1390
1391
1392/*
1393 STAC 9200-32 pin configs for
1394 102801B5 (Dell Inspiron 630m)
1395 102801D8 (Dell Inspiron 640m)
1396*/
1397static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1398 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1399 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1400};
1401
1402/*
1403 STAC 9200-32 pin configs for
1404 102801C2 (Dell Latitude D620)
1405 102801C8
1406 102801CC (Dell Latitude D820)
1407 102801D4
1408 102801D6
1409*/
1410static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1411 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1412 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1413};
1414
1415/*
1416 STAC 9200-32 pin configs for
1417 102801CE (Dell XPS M1710)
1418 102801CF (Dell Precision M90)
1419*/
1420static unsigned int dell9200_m23_pin_configs[8] = {
1421 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1422 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1423};
1424
1425/*
1426 STAC 9200-32 pin configs for
1427 102801C9
1428 102801CA
1429 102801CB (Dell Latitude 120L)
1430 102801D3
1431*/
1432static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1433 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1434 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1435};
1436
1437/*
1438 STAC 9200-32 pin configs for
1439 102801BD (Dell Inspiron E1505n)
1440 102801EE
1441 102801EF
1442*/
1443static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1444 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1445 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1446};
1447
1448/*
1449 STAC 9200-32 pin configs for
1450 102801F5 (Dell Inspiron 1501)
1451 102801F6
1452*/
1453static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1454 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1455 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1456};
1457
1458/*
1459 STAC 9200-32
1460 102801CD (Dell Inspiron E1705/9400)
1461*/
1462static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1463 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1464 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1465};
1466
bf277785
TD
1467static unsigned int oqo9200_pin_configs[8] = {
1468 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1469 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1470};
1471
dfe495d0 1472
f5fcc13c
TI
1473static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1474 [STAC_REF] = ref9200_pin_configs,
bf277785 1475 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1476 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1477 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1478 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1479 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1480 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1481 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1482 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1483 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1484 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1485 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1486 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1487 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1488 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1489};
1490
f5fcc13c
TI
1491static const char *stac9200_models[STAC_9200_MODELS] = {
1492 [STAC_REF] = "ref",
bf277785 1493 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1494 [STAC_9200_DELL_D21] = "dell-d21",
1495 [STAC_9200_DELL_D22] = "dell-d22",
1496 [STAC_9200_DELL_D23] = "dell-d23",
1497 [STAC_9200_DELL_M21] = "dell-m21",
1498 [STAC_9200_DELL_M22] = "dell-m22",
1499 [STAC_9200_DELL_M23] = "dell-m23",
1500 [STAC_9200_DELL_M24] = "dell-m24",
1501 [STAC_9200_DELL_M25] = "dell-m25",
1502 [STAC_9200_DELL_M26] = "dell-m26",
1503 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1504 [STAC_9200_M4] = "gateway-m4",
1505 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1506 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1507};
1508
1509static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1510 /* SigmaTel reference board */
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1512 "DFI LanParty", STAC_REF),
577aa2c1
MR
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1514 "DFI LanParty", STAC_REF),
e7377071 1515 /* Dell laptops have BIOS problem */
dfe495d0
TI
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1517 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1519 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1521 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1523 "unknown Dell", STAC_9200_DELL_D22),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1525 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1527 "Dell Latitude D620", STAC_9200_DELL_M22),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1529 "unknown Dell", STAC_9200_DELL_D23),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1531 "unknown Dell", STAC_9200_DELL_D23),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1533 "unknown Dell", STAC_9200_DELL_M22),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1535 "unknown Dell", STAC_9200_DELL_M24),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1537 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1539 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1541 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1543 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1545 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1547 "Dell Precision M90", STAC_9200_DELL_M23),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1549 "unknown Dell", STAC_9200_DELL_M22),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1551 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1553 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1555 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1557 "unknown Dell", STAC_9200_DELL_D23),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1559 "unknown Dell", STAC_9200_DELL_D23),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1561 "unknown Dell", STAC_9200_DELL_D21),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1563 "unknown Dell", STAC_9200_DELL_D23),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1565 "unknown Dell", STAC_9200_DELL_D21),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1567 "unknown Dell", STAC_9200_DELL_M25),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1569 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1571 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1573 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1574 /* Panasonic */
117f257d 1575 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1576 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1577 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1578 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1579 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1580 /* OQO Mobile */
1581 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1582 {} /* terminator */
1583};
1584
8e21c34c
TD
1585static unsigned int ref925x_pin_configs[8] = {
1586 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1587 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1588};
1589
9cb36c2a
MCC
1590static unsigned int stac925xM1_pin_configs[8] = {
1591 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1592 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1593};
1594
9cb36c2a
MCC
1595static unsigned int stac925xM1_2_pin_configs[8] = {
1596 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1597 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1598};
58eec423 1599
9cb36c2a
MCC
1600static unsigned int stac925xM2_pin_configs[8] = {
1601 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1602 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1603};
1604
8e21c34c 1605static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1606 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1607 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1608};
1609
9cb36c2a
MCC
1610static unsigned int stac925xM3_pin_configs[8] = {
1611 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1612 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1613};
58eec423 1614
9cb36c2a
MCC
1615static unsigned int stac925xM5_pin_configs[8] = {
1616 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1617 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1618};
1619
9cb36c2a
MCC
1620static unsigned int stac925xM6_pin_configs[8] = {
1621 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1622 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1623};
1624
1625static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1626 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1627 [STAC_M1] = stac925xM1_pin_configs,
1628 [STAC_M1_2] = stac925xM1_2_pin_configs,
1629 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1630 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1631 [STAC_M3] = stac925xM3_pin_configs,
1632 [STAC_M5] = stac925xM5_pin_configs,
1633 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1634};
1635
1636static const char *stac925x_models[STAC_925x_MODELS] = {
1637 [STAC_REF] = "ref",
9cb36c2a
MCC
1638 [STAC_M1] = "m1",
1639 [STAC_M1_2] = "m1-2",
1640 [STAC_M2] = "m2",
8e21c34c 1641 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1642 [STAC_M3] = "m3",
1643 [STAC_M5] = "m5",
1644 [STAC_M6] = "m6",
8e21c34c
TD
1645};
1646
9cb36c2a 1647static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1648 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1649 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1650 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1651 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1652 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1653 /* Not sure about the brand name for those */
1654 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1655 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1656 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1657 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1658 {} /* terminator */
8e21c34c
TD
1659};
1660
1661static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1662 /* SigmaTel reference board */
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1664 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1665 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1666
1667 /* Default table for unknown ID */
1668 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1669
8e21c34c
TD
1670 {} /* terminator */
1671};
1672
a7662640 1673static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1674 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1675 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1676 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1677 0x01452050,
1678};
1679
1680static unsigned int dell_m6_pin_configs[13] = {
1681 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1682 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1683 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1684 0x4f0000f0,
e1f0d669
MR
1685};
1686
1687static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1688 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1689 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1690 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1691 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1692 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1693};
1694
1695static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1696 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1697 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1698 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1699 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1700 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1701 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1702};
1703
1704static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1705 /* SigmaTel reference board */
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1707 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1709 "DFI LanParty", STAC_92HD73XX_REF),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1711 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1719 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1721 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1723 "unknown Dell", STAC_DELL_M6_DMIC),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1725 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1727 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1729 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1730 {} /* terminator */
1731};
1732
d0513fc6
MR
1733static unsigned int ref92hd83xxx_pin_configs[14] = {
1734 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1735 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1736 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1737 0x01451160, 0x98560170,
1738};
1739
1740static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1741 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1742 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR
1743};
1744
1745static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1746 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1747 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR
1748};
1749
1750static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1751 /* SigmaTel reference board */
1752 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1753 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1754 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1755 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1756 {} /* terminator */
d0513fc6
MR
1757};
1758
616f89e7 1759static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1760 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1761 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1762 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1763 0x00000000
e035b841
MR
1764};
1765
616f89e7 1766static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1767 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1768 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1769 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1770 0x00000000
a7662640
MR
1771};
1772
616f89e7 1773static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1774 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1775 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1776 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1777 0x00000000
a7662640
MR
1778};
1779
616f89e7 1780static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1781 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1782 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1783 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1784 0x00000000
3a7abfd2
MR
1785};
1786
e035b841
MR
1787static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1788 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1789 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1790 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1791 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1792 [STAC_HP_M4] = NULL,
1b0652eb 1793 [STAC_HP_DV5] = NULL,
e035b841
MR
1794};
1795
1796static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1797 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1798 [STAC_DELL_M4_1] = "dell-m4-1",
1799 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1800 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1801 [STAC_HP_M4] = "hp-m4",
1b0652eb 1802 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1803};
1804
1805static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1806 /* SigmaTel reference board */
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1808 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1810 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1812 "HP dv5", STAC_HP_M4),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1814 "HP dv7", STAC_HP_M4),
e0c0e943
TI
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1816 "HP dv4", STAC_HP_DV5),
69dfaefe
TI
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1818 "HP dv7", STAC_HP_M4),
42de55cb
TI
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3600,
1820 "HP dv5", STAC_HP_DV5),
dafb70ce 1821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1822 "HP dv5", STAC_HP_DV5),
9a9e2359
MR
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1824 "unknown HP", STAC_HP_M4),
a7662640
MR
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1826 "unknown Dell", STAC_DELL_M4_1),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1828 "unknown Dell", STAC_DELL_M4_1),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1830 "unknown Dell", STAC_DELL_M4_1),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1832 "unknown Dell", STAC_DELL_M4_1),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1834 "unknown Dell", STAC_DELL_M4_1),
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1836 "unknown Dell", STAC_DELL_M4_1),
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1838 "unknown Dell", STAC_DELL_M4_1),
1839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1840 "unknown Dell", STAC_DELL_M4_2),
1841 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1842 "unknown Dell", STAC_DELL_M4_2),
1843 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1844 "unknown Dell", STAC_DELL_M4_2),
1845 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1846 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1847 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1848 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1849 {} /* terminator */
1850};
1851
403d1944
MP
1852static unsigned int ref922x_pin_configs[10] = {
1853 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1854 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1855 0x40000100, 0x40000100,
1856};
1857
dfe495d0
TI
1858/*
1859 STAC 922X pin configs for
1860 102801A7
1861 102801AB
1862 102801A9
1863 102801D1
1864 102801D2
1865*/
1866static unsigned int dell_922x_d81_pin_configs[10] = {
1867 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1868 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1869 0x01813122, 0x400001f2,
1870};
1871
1872/*
1873 STAC 922X pin configs for
1874 102801AC
1875 102801D0
1876*/
1877static unsigned int dell_922x_d82_pin_configs[10] = {
1878 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1879 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1880 0x01813122, 0x400001f1,
1881};
1882
1883/*
1884 STAC 922X pin configs for
1885 102801BF
1886*/
1887static unsigned int dell_922x_m81_pin_configs[10] = {
1888 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1889 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1890 0x40C003f1, 0x405003f0,
1891};
1892
1893/*
1894 STAC 9221 A1 pin configs for
1895 102801D7 (Dell XPS M1210)
1896*/
1897static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1898 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1899 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1900 0x508003f3, 0x405003f4,
1901};
1902
403d1944 1903static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1904 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1905 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1906 0x02a19120, 0x40000100,
1907};
1908
1909static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1910 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1911 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1912 0x02a19320, 0x40000100,
1913};
1914
5d5d3bc3
IZ
1915static unsigned int intel_mac_v1_pin_configs[10] = {
1916 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1917 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1918 0x400000fc, 0x400000fb,
1919};
1920
1921static unsigned int intel_mac_v2_pin_configs[10] = {
1922 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1923 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1924 0x400000fc, 0x400000fb,
6f0778d8
NB
1925};
1926
5d5d3bc3
IZ
1927static unsigned int intel_mac_v3_pin_configs[10] = {
1928 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1929 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1930 0x400000fc, 0x400000fb,
1931};
1932
5d5d3bc3
IZ
1933static unsigned int intel_mac_v4_pin_configs[10] = {
1934 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1935 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1936 0x400000fc, 0x400000fb,
1937};
1938
5d5d3bc3
IZ
1939static unsigned int intel_mac_v5_pin_configs[10] = {
1940 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1941 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1942 0x400000fc, 0x400000fb,
0dae0f83
TI
1943};
1944
8c650087
MCC
1945static unsigned int ecs202_pin_configs[10] = {
1946 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1947 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1948 0x9037012e, 0x40e000f2,
1949};
76c08828 1950
19039bd0 1951static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1952 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1953 [STAC_D945GTP3] = d945gtp3_pin_configs,
1954 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1955 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1956 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1957 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1958 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1959 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1960 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1961 /* for backward compatibility */
5d5d3bc3
IZ
1962 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1963 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1964 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1965 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1966 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1967 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1968 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1969 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1970 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1971 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1972 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1973};
1974
f5fcc13c
TI
1975static const char *stac922x_models[STAC_922X_MODELS] = {
1976 [STAC_D945_REF] = "ref",
1977 [STAC_D945GTP5] = "5stack",
1978 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1979 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1980 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1981 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1982 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1983 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1984 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1985 /* for backward compatibility */
f5fcc13c 1986 [STAC_MACMINI] = "macmini",
3fc24d85 1987 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1988 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1989 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1990 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1991 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1992 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1993 [STAC_922X_DELL_D81] = "dell-d81",
1994 [STAC_922X_DELL_D82] = "dell-d82",
1995 [STAC_922X_DELL_M81] = "dell-m81",
1996 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1997};
1998
1999static struct snd_pci_quirk stac922x_cfg_tbl[] = {
2000 /* SigmaTel reference board */
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2002 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2004 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
2005 /* Intel 945G based systems */
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2025 "Intel D945G", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2027 "Intel D945G", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2029 "Intel D945G", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2031 "Intel D945G", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2033 "Intel D945G", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2035 "Intel D945G", STAC_D945GTP3),
2036 /* Intel D945G 5-stack systems */
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2038 "Intel D945G", STAC_D945GTP5),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2040 "Intel D945G", STAC_D945GTP5),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2042 "Intel D945G", STAC_D945GTP5),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2044 "Intel D945G", STAC_D945GTP5),
2045 /* Intel 945P based systems */
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2047 "Intel D945P", STAC_D945GTP3),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2049 "Intel D945P", STAC_D945GTP3),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2051 "Intel D945P", STAC_D945GTP3),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2053 "Intel D945P", STAC_D945GTP3),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2055 "Intel D945P", STAC_D945GTP3),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2057 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
2058 /* other intel */
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2060 "Intel D945", STAC_D945_REF),
f5fcc13c 2061 /* other systems */
536319af 2062 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2063 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2064 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2065 /* Dell systems */
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2067 "unknown Dell", STAC_922X_DELL_D81),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2069 "unknown Dell", STAC_922X_DELL_D81),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2071 "unknown Dell", STAC_922X_DELL_D81),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2073 "unknown Dell", STAC_922X_DELL_D82),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2075 "unknown Dell", STAC_922X_DELL_M81),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2077 "unknown Dell", STAC_922X_DELL_D82),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2079 "unknown Dell", STAC_922X_DELL_D81),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2081 "unknown Dell", STAC_922X_DELL_D81),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2083 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2084 /* ECS/PC Chips boards */
2085 SND_PCI_QUIRK(0x1019, 0x2144,
2086 "ECS/PC chips", STAC_ECS_202),
2087 SND_PCI_QUIRK(0x1019, 0x2608,
2088 "ECS/PC chips", STAC_ECS_202),
2089 SND_PCI_QUIRK(0x1019, 0x2633,
2090 "ECS/PC chips P17G/1333", STAC_ECS_202),
2091 SND_PCI_QUIRK(0x1019, 0x2811,
2092 "ECS/PC chips", STAC_ECS_202),
2093 SND_PCI_QUIRK(0x1019, 0x2812,
2094 "ECS/PC chips", STAC_ECS_202),
2095 SND_PCI_QUIRK(0x1019, 0x2813,
2096 "ECS/PC chips", STAC_ECS_202),
2097 SND_PCI_QUIRK(0x1019, 0x2814,
2098 "ECS/PC chips", STAC_ECS_202),
2099 SND_PCI_QUIRK(0x1019, 0x2815,
2100 "ECS/PC chips", STAC_ECS_202),
2101 SND_PCI_QUIRK(0x1019, 0x2816,
2102 "ECS/PC chips", STAC_ECS_202),
2103 SND_PCI_QUIRK(0x1019, 0x2817,
2104 "ECS/PC chips", STAC_ECS_202),
2105 SND_PCI_QUIRK(0x1019, 0x2818,
2106 "ECS/PC chips", STAC_ECS_202),
2107 SND_PCI_QUIRK(0x1019, 0x2819,
2108 "ECS/PC chips", STAC_ECS_202),
2109 SND_PCI_QUIRK(0x1019, 0x2820,
2110 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2111 {} /* terminator */
2112};
2113
3cc08dc6 2114static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2115 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2116 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2117 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2118 0x01c42190, 0x40000100,
3cc08dc6
MP
2119};
2120
93ed1503 2121static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2122 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2123 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2124 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2125 0x40000100, 0x40000100
2126};
2127
93ed1503
TD
2128static unsigned int d965_5st_pin_configs[14] = {
2129 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2130 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2131 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2132 0x40000100, 0x40000100
2133};
2134
4ff076e5
TD
2135static unsigned int dell_3st_pin_configs[14] = {
2136 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2137 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2138 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2139 0x40c003fc, 0x40000100
2140};
2141
93ed1503 2142static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2143 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2144 [STAC_D965_REF] = ref927x_pin_configs,
2145 [STAC_D965_3ST] = d965_3st_pin_configs,
2146 [STAC_D965_5ST] = d965_5st_pin_configs,
2147 [STAC_DELL_3ST] = dell_3st_pin_configs,
2148 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2149};
2150
f5fcc13c 2151static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2152 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2153 [STAC_D965_REF] = "ref",
2154 [STAC_D965_3ST] = "3stack",
2155 [STAC_D965_5ST] = "5stack",
2156 [STAC_DELL_3ST] = "dell-3stack",
2157 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2158};
2159
2160static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2161 /* SigmaTel reference board */
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2163 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2165 "DFI LanParty", STAC_D965_REF),
81d3dbde 2166 /* Intel 946 based systems */
f5fcc13c
TI
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2169 /* 965 based 3 stack systems */
f5fcc13c
TI
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2186 /* Dell 3 stack systems */
8e9068b1 2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2191 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2200 /* 965 based 5 stack systems */
f5fcc13c
TI
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2202 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2204 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2206 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2208 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2210 {} /* terminator */
2211};
2212
f3302a59
MP
2213static unsigned int ref9205_pin_configs[12] = {
2214 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2215 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2216 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2217};
2218
dfe495d0
TI
2219/*
2220 STAC 9205 pin configs for
2221 102801F1
2222 102801F2
2223 102801FC
2224 102801FD
2225 10280204
2226 1028021F
3fa2ef74 2227 10280228 (Dell Vostro 1500)
dfe495d0
TI
2228*/
2229static unsigned int dell_9205_m42_pin_configs[12] = {
2230 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2231 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2232 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2233};
2234
2235/*
2236 STAC 9205 pin configs for
2237 102801F9
2238 102801FA
2239 102801FE
2240 102801FF (Dell Precision M4300)
2241 10280206
2242 10280200
2243 10280201
2244*/
2245static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2246 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2247 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2248 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2249};
2250
dfe495d0 2251static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2252 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2253 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2254 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2255};
2256
f5fcc13c 2257static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2258 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2259 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2260 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2261 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2262 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2263};
2264
f5fcc13c
TI
2265static const char *stac9205_models[STAC_9205_MODELS] = {
2266 [STAC_9205_REF] = "ref",
dfe495d0 2267 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2268 [STAC_9205_DELL_M43] = "dell-m43",
2269 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2270 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2271};
2272
2273static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2274 /* SigmaTel reference board */
2275 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2276 "DFI LanParty", STAC_9205_REF),
577aa2c1
MR
2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2278 "DFI LanParty", STAC_9205_REF),
d9a4268e 2279 /* Dell */
dfe495d0
TI
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2281 "unknown Dell", STAC_9205_DELL_M42),
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2283 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2285 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2287 "Dell Precision", STAC_9205_DELL_M43),
2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2289 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2291 "unknown Dell", STAC_9205_DELL_M42),
2292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2293 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2295 "Dell Precision", STAC_9205_DELL_M43),
2296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2297 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2299 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2301 "Dell Precision", STAC_9205_DELL_M43),
2302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2303 "Dell Precision", STAC_9205_DELL_M43),
2304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2305 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2307 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2309 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e
TI
2310 /* Gateway */
2311 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2312 {} /* terminator */
2313};
2314
11b44bbd
RF
2315static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2316{
2317 int i;
2318 struct sigmatel_spec *spec = codec->spec;
2319
af9f341a
TI
2320 kfree(spec->pin_configs);
2321 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2322 GFP_KERNEL);
2323 if (!spec->pin_configs)
2324 return -ENOMEM;
11b44bbd
RF
2325
2326 for (i = 0; i < spec->num_pins; i++) {
2327 hda_nid_t nid = spec->pin_nids[i];
2328 unsigned int pin_cfg;
616f89e7
HRK
2329
2330 if (!nid)
2331 continue;
11b44bbd
RF
2332 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2333 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2334 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2335 nid, pin_cfg);
af9f341a 2336 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2337 }
2338
2339 return 0;
2340}
2341
87d48363
MR
2342static void stac92xx_set_config_reg(struct hda_codec *codec,
2343 hda_nid_t pin_nid, unsigned int pin_config)
2344{
2345 int i;
2346 snd_hda_codec_write(codec, pin_nid, 0,
2347 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2348 pin_config & 0x000000ff);
2349 snd_hda_codec_write(codec, pin_nid, 0,
2350 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2351 (pin_config & 0x0000ff00) >> 8);
2352 snd_hda_codec_write(codec, pin_nid, 0,
2353 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2354 (pin_config & 0x00ff0000) >> 16);
2355 snd_hda_codec_write(codec, pin_nid, 0,
2356 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2357 pin_config >> 24);
2358 i = snd_hda_codec_read(codec, pin_nid, 0,
2359 AC_VERB_GET_CONFIG_DEFAULT,
2360 0x00);
2361 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2362 pin_nid, i);
2363}
2364
2f2f4251
M
2365static void stac92xx_set_config_regs(struct hda_codec *codec)
2366{
2367 int i;
2368 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2369
87d48363
MR
2370 if (!spec->pin_configs)
2371 return;
11b44bbd 2372
87d48363 2373 for (i = 0; i < spec->num_pins; i++)
616f89e7
HRK
2374 if (spec->pin_nids[i] && spec->pin_configs[i])
2375 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2376 spec->pin_configs[i]);
2f2f4251 2377}
2f2f4251 2378
af9f341a
TI
2379static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2380{
2381 struct sigmatel_spec *spec = codec->spec;
2382
2383 if (!pins)
2384 return stac92xx_save_bios_config_regs(codec);
2385
2386 kfree(spec->pin_configs);
2387 spec->pin_configs = kmemdup(pins,
2388 spec->num_pins * sizeof(*pins),
2389 GFP_KERNEL);
2390 if (!spec->pin_configs)
2391 return -ENOMEM;
2392
2393 stac92xx_set_config_regs(codec);
2394 return 0;
2395}
2396
2397static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2398 unsigned int cfg)
2399{
2400 struct sigmatel_spec *spec = codec->spec;
2401 int i;
2402
2403 for (i = 0; i < spec->num_pins; i++) {
2404 if (spec->pin_nids[i] == nid) {
2405 spec->pin_configs[i] = cfg;
2406 stac92xx_set_config_reg(codec, nid, cfg);
2407 break;
2408 }
2409 }
2410}
2411
dabbed6f 2412/*
c7d4b2fa 2413 * Analog playback callbacks
dabbed6f 2414 */
c7d4b2fa
M
2415static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2416 struct hda_codec *codec,
c8b6bf9b 2417 struct snd_pcm_substream *substream)
2f2f4251 2418{
dabbed6f 2419 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2420 if (spec->stream_delay)
2421 msleep(spec->stream_delay);
9a08160b
TI
2422 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2423 hinfo);
2f2f4251
M
2424}
2425
2f2f4251
M
2426static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2427 struct hda_codec *codec,
2428 unsigned int stream_tag,
2429 unsigned int format,
c8b6bf9b 2430 struct snd_pcm_substream *substream)
2f2f4251
M
2431{
2432 struct sigmatel_spec *spec = codec->spec;
403d1944 2433 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2434}
2435
2436static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2437 struct hda_codec *codec,
c8b6bf9b 2438 struct snd_pcm_substream *substream)
2f2f4251
M
2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2442}
2443
dabbed6f
M
2444/*
2445 * Digital playback callbacks
2446 */
2447static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2448 struct hda_codec *codec,
c8b6bf9b 2449 struct snd_pcm_substream *substream)
dabbed6f
M
2450{
2451 struct sigmatel_spec *spec = codec->spec;
2452 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2453}
2454
2455static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2456 struct hda_codec *codec,
c8b6bf9b 2457 struct snd_pcm_substream *substream)
dabbed6f
M
2458{
2459 struct sigmatel_spec *spec = codec->spec;
2460 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2461}
2462
6b97eb45
TI
2463static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2464 struct hda_codec *codec,
2465 unsigned int stream_tag,
2466 unsigned int format,
2467 struct snd_pcm_substream *substream)
2468{
2469 struct sigmatel_spec *spec = codec->spec;
2470 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2471 stream_tag, format, substream);
2472}
2473
dabbed6f 2474
2f2f4251
M
2475/*
2476 * Analog capture callbacks
2477 */
2478static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2479 struct hda_codec *codec,
2480 unsigned int stream_tag,
2481 unsigned int format,
c8b6bf9b 2482 struct snd_pcm_substream *substream)
2f2f4251
M
2483{
2484 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2485 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2486
8daaaa97
MR
2487 if (spec->powerdown_adcs) {
2488 msleep(40);
8c2f767b 2489 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2490 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2491 }
2492 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2493 return 0;
2494}
2495
2496static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2497 struct hda_codec *codec,
c8b6bf9b 2498 struct snd_pcm_substream *substream)
2f2f4251
M
2499{
2500 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2501 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2502
8daaaa97
MR
2503 snd_hda_codec_cleanup_stream(codec, nid);
2504 if (spec->powerdown_adcs)
8c2f767b 2505 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2506 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2507 return 0;
2508}
2509
dabbed6f
M
2510static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2511 .substreams = 1,
2512 .channels_min = 2,
2513 .channels_max = 2,
2514 /* NID is set in stac92xx_build_pcms */
2515 .ops = {
2516 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2517 .close = stac92xx_dig_playback_pcm_close,
2518 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2519 },
2520};
2521
2522static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2523 .substreams = 1,
2524 .channels_min = 2,
2525 .channels_max = 2,
2526 /* NID is set in stac92xx_build_pcms */
2527};
2528
2f2f4251
M
2529static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2530 .substreams = 1,
2531 .channels_min = 2,
c7d4b2fa 2532 .channels_max = 8,
2f2f4251
M
2533 .nid = 0x02, /* NID to query formats and rates */
2534 .ops = {
2535 .open = stac92xx_playback_pcm_open,
2536 .prepare = stac92xx_playback_pcm_prepare,
2537 .cleanup = stac92xx_playback_pcm_cleanup
2538 },
2539};
2540
3cc08dc6
MP
2541static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2542 .substreams = 1,
2543 .channels_min = 2,
2544 .channels_max = 2,
2545 .nid = 0x06, /* NID to query formats and rates */
2546 .ops = {
2547 .open = stac92xx_playback_pcm_open,
2548 .prepare = stac92xx_playback_pcm_prepare,
2549 .cleanup = stac92xx_playback_pcm_cleanup
2550 },
2551};
2552
2f2f4251 2553static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2554 .channels_min = 2,
2555 .channels_max = 2,
9e05b7a3 2556 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2557 .ops = {
2558 .prepare = stac92xx_capture_pcm_prepare,
2559 .cleanup = stac92xx_capture_pcm_cleanup
2560 },
2561};
2562
2563static int stac92xx_build_pcms(struct hda_codec *codec)
2564{
2565 struct sigmatel_spec *spec = codec->spec;
2566 struct hda_pcm *info = spec->pcm_rec;
2567
2568 codec->num_pcms = 1;
2569 codec->pcm_info = info;
2570
c7d4b2fa 2571 info->name = "STAC92xx Analog";
2f2f4251 2572 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2573 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2574 spec->multiout.dac_nids[0];
2f2f4251 2575 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2576 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2577 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2578
2579 if (spec->alt_switch) {
2580 codec->num_pcms++;
2581 info++;
2582 info->name = "STAC92xx Analog Alt";
2583 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2584 }
2f2f4251 2585
dabbed6f
M
2586 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2587 codec->num_pcms++;
2588 info++;
2589 info->name = "STAC92xx Digital";
8c441982 2590 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M
2591 if (spec->multiout.dig_out_nid) {
2592 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2593 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2594 }
2595 if (spec->dig_in_nid) {
2596 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2597 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2598 }
2599 }
2600
2f2f4251
M
2601 return 0;
2602}
2603
c960a03b
TI
2604static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2605{
2606 unsigned int pincap = snd_hda_param_read(codec, nid,
2607 AC_PAR_PIN_CAP);
2608 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2609 if (pincap & AC_PINCAP_VREF_100)
2610 return AC_PINCTL_VREF_100;
2611 if (pincap & AC_PINCAP_VREF_80)
2612 return AC_PINCTL_VREF_80;
2613 if (pincap & AC_PINCAP_VREF_50)
2614 return AC_PINCTL_VREF_50;
2615 if (pincap & AC_PINCAP_VREF_GRD)
2616 return AC_PINCTL_VREF_GRD;
2617 return 0;
2618}
2619
403d1944
MP
2620static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2621
2622{
82beb8fd
TI
2623 snd_hda_codec_write_cache(codec, nid, 0,
2624 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2625}
2626
7c2ba97b
MR
2627#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2628
2629static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2630 struct snd_ctl_elem_value *ucontrol)
2631{
2632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2633 struct sigmatel_spec *spec = codec->spec;
2634
d7a89436 2635 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2636 return 0;
2637}
2638
c6e4c666
TI
2639static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2640 unsigned char type);
2641
7c2ba97b
MR
2642static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2643 struct snd_ctl_elem_value *ucontrol)
2644{
2645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2646 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2647 int nid = kcontrol->private_value;
2648
2649 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2650
2651 /* check to be sure that the ports are upto date with
2652 * switch changes
2653 */
c6e4c666 2654 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2655
2656 return 1;
2657}
2658
a5ce8890 2659#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2660
2661static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2662{
2663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2664 struct sigmatel_spec *spec = codec->spec;
2665 int io_idx = kcontrol-> private_value & 0xff;
2666
2667 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2668 return 0;
2669}
2670
2671static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2672{
2673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2674 struct sigmatel_spec *spec = codec->spec;
2675 hda_nid_t nid = kcontrol->private_value >> 8;
2676 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2677 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2678
2679 spec->io_switch[io_idx] = val;
2680
2681 if (val)
2682 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2683 else {
2684 unsigned int pinctl = AC_PINCTL_IN_EN;
2685 if (io_idx) /* set VREF for mic */
2686 pinctl |= stac92xx_get_vref(codec, nid);
2687 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2688 }
40c1d308
JZ
2689
2690 /* check the auto-mute again: we need to mute/unmute the speaker
2691 * appropriately according to the pin direction
2692 */
2693 if (spec->hp_detect)
c6e4c666 2694 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2695
403d1944
MP
2696 return 1;
2697}
2698
0fb87bb4
ML
2699#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2700
2701static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2702 struct snd_ctl_elem_value *ucontrol)
2703{
2704 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2705 struct sigmatel_spec *spec = codec->spec;
2706
2707 ucontrol->value.integer.value[0] = spec->clfe_swap;
2708 return 0;
2709}
2710
2711static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2712 struct snd_ctl_elem_value *ucontrol)
2713{
2714 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2715 struct sigmatel_spec *spec = codec->spec;
2716 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2717 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2718
68ea7b2f 2719 if (spec->clfe_swap == val)
0fb87bb4
ML
2720 return 0;
2721
68ea7b2f 2722 spec->clfe_swap = val;
0fb87bb4
ML
2723
2724 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2725 spec->clfe_swap ? 0x4 : 0x0);
2726
2727 return 1;
2728}
2729
7c2ba97b
MR
2730#define STAC_CODEC_HP_SWITCH(xname) \
2731 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2732 .name = xname, \
2733 .index = 0, \
2734 .info = stac92xx_hp_switch_info, \
2735 .get = stac92xx_hp_switch_get, \
2736 .put = stac92xx_hp_switch_put, \
2737 }
2738
403d1944
MP
2739#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2740 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2741 .name = xname, \
2742 .index = 0, \
2743 .info = stac92xx_io_switch_info, \
2744 .get = stac92xx_io_switch_get, \
2745 .put = stac92xx_io_switch_put, \
2746 .private_value = xpval, \
2747 }
2748
0fb87bb4
ML
2749#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2750 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2751 .name = xname, \
2752 .index = 0, \
2753 .info = stac92xx_clfe_switch_info, \
2754 .get = stac92xx_clfe_switch_get, \
2755 .put = stac92xx_clfe_switch_put, \
2756 .private_value = xpval, \
2757 }
403d1944 2758
c7d4b2fa
M
2759enum {
2760 STAC_CTL_WIDGET_VOL,
2761 STAC_CTL_WIDGET_MUTE,
09a99959 2762 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2763 STAC_CTL_WIDGET_AMP_MUX,
2764 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2765 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2766 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2767 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2768};
2769
c8b6bf9b 2770static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2771 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2772 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2773 STAC_MONO_MUX,
89385035
MR
2774 STAC_AMP_MUX,
2775 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2776 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2777 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2778 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2779};
2780
2781/* add dynamic controls */
e3c75964
TI
2782static struct snd_kcontrol_new *
2783stac_control_new(struct sigmatel_spec *spec,
2784 struct snd_kcontrol_new *ktemp,
2785 const char *name)
c7d4b2fa 2786{
c8b6bf9b 2787 struct snd_kcontrol_new *knew;
c7d4b2fa 2788
603c4019
TI
2789 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2790 knew = snd_array_new(&spec->kctls);
2791 if (!knew)
e3c75964 2792 return NULL;
4d4e9bb3 2793 *knew = *ktemp;
82fe0c58 2794 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2795 if (!knew->name) {
2796 /* roolback */
2797 memset(knew, 0, sizeof(*knew));
2798 spec->kctls.alloced--;
2799 return NULL;
2800 }
2801 return knew;
2802}
2803
2804static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2805 struct snd_kcontrol_new *ktemp,
2806 int idx, const char *name,
2807 unsigned long val)
2808{
2809 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
2810 if (!knew)
c7d4b2fa 2811 return -ENOMEM;
e3c75964 2812 knew->index = idx;
c7d4b2fa 2813 knew->private_value = val;
c7d4b2fa
M
2814 return 0;
2815}
2816
4d4e9bb3
TI
2817static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2818 int type, int idx, const char *name,
2819 unsigned long val)
2820{
2821 return stac92xx_add_control_temp(spec,
2822 &stac92xx_control_templates[type],
2823 idx, name, val);
2824}
2825
4682eee0
MR
2826
2827/* add dynamic controls */
4d4e9bb3
TI
2828static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2829 const char *name, unsigned long val)
4682eee0
MR
2830{
2831 return stac92xx_add_control_idx(spec, type, 0, name, val);
2832}
2833
e3c75964
TI
2834static struct snd_kcontrol_new stac_input_src_temp = {
2835 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2836 .name = "Input Source",
2837 .info = stac92xx_mux_enum_info,
2838 .get = stac92xx_mux_enum_get,
2839 .put = stac92xx_mux_enum_put,
2840};
2841
2842static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2843{
2844 struct snd_kcontrol_new *knew;
2845 struct hda_input_mux *imux = &spec->private_imux;
2846
2847 if (!spec->num_adcs || imux->num_items <= 1)
2848 return 0; /* no need for input source control */
2849 knew = stac_control_new(spec, &stac_input_src_temp,
2850 stac_input_src_temp.name);
2851 if (!knew)
2852 return -ENOMEM;
2853 knew->count = spec->num_adcs;
2854 return 0;
2855}
2856
c21ca4a8
TI
2857/* check whether the line-input can be used as line-out */
2858static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2859{
2860 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2861 struct auto_pin_cfg *cfg = &spec->autocfg;
2862 hda_nid_t nid;
2863 unsigned int pincap;
8e9068b1 2864
c21ca4a8
TI
2865 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2866 return 0;
2867 nid = cfg->input_pins[AUTO_PIN_LINE];
2868 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2869 if (pincap & AC_PINCAP_OUT)
2870 return nid;
2871 return 0;
2872}
403d1944 2873
c21ca4a8
TI
2874/* check whether the mic-input can be used as line-out */
2875static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2876{
2877 struct sigmatel_spec *spec = codec->spec;
2878 struct auto_pin_cfg *cfg = &spec->autocfg;
2879 unsigned int def_conf, pincap;
2880 unsigned int mic_pin;
2881
2882 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2883 return 0;
2884 mic_pin = AUTO_PIN_MIC;
2885 for (;;) {
2886 hda_nid_t nid = cfg->input_pins[mic_pin];
2887 def_conf = snd_hda_codec_read(codec, nid, 0,
2888 AC_VERB_GET_CONFIG_DEFAULT, 0);
2889 /* some laptops have an internal analog microphone
2890 * which can't be used as a output */
2891 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2892 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2893 if (pincap & AC_PINCAP_OUT)
2894 return nid;
403d1944 2895 }
c21ca4a8
TI
2896 if (mic_pin == AUTO_PIN_MIC)
2897 mic_pin = AUTO_PIN_FRONT_MIC;
2898 else
2899 break;
403d1944 2900 }
403d1944
MP
2901 return 0;
2902}
2903
7b043899
SL
2904static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2905{
2906 int i;
2907
2908 for (i = 0; i < spec->multiout.num_dacs; i++) {
2909 if (spec->multiout.dac_nids[i] == nid)
2910 return 1;
2911 }
2912
2913 return 0;
2914}
2915
c21ca4a8
TI
2916static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2917{
2918 int i;
2919 if (is_in_dac_nids(spec, nid))
2920 return 1;
2921 for (i = 0; i < spec->autocfg.hp_outs; i++)
2922 if (spec->hp_dacs[i] == nid)
2923 return 1;
2924 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2925 if (spec->speaker_dacs[i] == nid)
2926 return 1;
2927 return 0;
2928}
2929
2930static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2931{
2932 struct sigmatel_spec *spec = codec->spec;
2933 int j, conn_len;
2934 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2935 unsigned int wcaps, wtype;
2936
2937 conn_len = snd_hda_get_connections(codec, nid, conn,
2938 HDA_MAX_CONNECTIONS);
2939 for (j = 0; j < conn_len; j++) {
2940 wcaps = snd_hda_param_read(codec, conn[j],
2941 AC_PAR_AUDIO_WIDGET_CAP);
2942 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2943 /* we check only analog outputs */
2944 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2945 continue;
2946 /* if this route has a free DAC, assign it */
2947 if (!check_all_dac_nids(spec, conn[j])) {
2948 if (conn_len > 1) {
2949 /* select this DAC in the pin's input mux */
2950 snd_hda_codec_write_cache(codec, nid, 0,
2951 AC_VERB_SET_CONNECT_SEL, j);
2952 }
2953 return conn[j];
2954 }
2955 }
2956 return 0;
2957}
2958
2959static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2960static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2961
3cc08dc6 2962/*
7b043899
SL
2963 * Fill in the dac_nids table from the parsed pin configuration
2964 * This function only works when every pin in line_out_pins[]
2965 * contains atleast one DAC in its connection list. Some 92xx
2966 * codecs are not connected directly to a DAC, such as the 9200
2967 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2968 */
c21ca4a8 2969static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2970{
2971 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2972 struct auto_pin_cfg *cfg = &spec->autocfg;
2973 int i;
2974 hda_nid_t nid, dac;
7b043899 2975
c7d4b2fa
M
2976 for (i = 0; i < cfg->line_outs; i++) {
2977 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2978 dac = get_unassigned_dac(codec, nid);
2979 if (!dac) {
df802952
TI
2980 if (spec->multiout.num_dacs > 0) {
2981 /* we have already working output pins,
2982 * so let's drop the broken ones again
2983 */
2984 cfg->line_outs = spec->multiout.num_dacs;
2985 break;
2986 }
7b043899
SL
2987 /* error out, no available DAC found */
2988 snd_printk(KERN_ERR
2989 "%s: No available DAC for pin 0x%x\n",
2990 __func__, nid);
2991 return -ENODEV;
2992 }
c21ca4a8
TI
2993 add_spec_dacs(spec, dac);
2994 }
7b043899 2995
c21ca4a8
TI
2996 /* add line-in as output */
2997 nid = check_line_out_switch(codec);
2998 if (nid) {
2999 dac = get_unassigned_dac(codec, nid);
3000 if (dac) {
3001 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3002 nid, cfg->line_outs);
3003 cfg->line_out_pins[cfg->line_outs] = nid;
3004 cfg->line_outs++;
3005 spec->line_switch = nid;
3006 add_spec_dacs(spec, dac);
3007 }
3008 }
3009 /* add mic as output */
3010 nid = check_mic_out_switch(codec);
3011 if (nid) {
3012 dac = get_unassigned_dac(codec, nid);
3013 if (dac) {
3014 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3015 nid, cfg->line_outs);
3016 cfg->line_out_pins[cfg->line_outs] = nid;
3017 cfg->line_outs++;
3018 spec->mic_switch = nid;
3019 add_spec_dacs(spec, dac);
3020 }
3021 }
c7d4b2fa 3022
c21ca4a8
TI
3023 for (i = 0; i < cfg->hp_outs; i++) {
3024 nid = cfg->hp_pins[i];
3025 dac = get_unassigned_dac(codec, nid);
3026 if (dac) {
3027 if (!spec->multiout.hp_nid)
3028 spec->multiout.hp_nid = dac;
3029 else
3030 add_spec_extra_dacs(spec, dac);
7b043899 3031 }
c21ca4a8
TI
3032 spec->hp_dacs[i] = dac;
3033 }
3034
3035 for (i = 0; i < cfg->speaker_outs; i++) {
3036 nid = cfg->speaker_pins[i];
3037 dac = get_unassigned_dac(codec, nid);
3038 if (dac)
3039 add_spec_extra_dacs(spec, dac);
3040 spec->speaker_dacs[i] = dac;
7b043899 3041 }
c7d4b2fa 3042
c21ca4a8 3043 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
3044 spec->multiout.num_dacs,
3045 spec->multiout.dac_nids[0],
3046 spec->multiout.dac_nids[1],
3047 spec->multiout.dac_nids[2],
3048 spec->multiout.dac_nids[3],
3049 spec->multiout.dac_nids[4]);
c21ca4a8 3050
c7d4b2fa
M
3051 return 0;
3052}
3053
eb06ed8f 3054/* create volume control/switch for the given prefx type */
7c7767eb
TI
3055static int create_controls(struct hda_codec *codec, const char *pfx,
3056 hda_nid_t nid, int chs)
eb06ed8f 3057{
7c7767eb 3058 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
3059 char name[32];
3060 int err;
3061
7c7767eb
TI
3062 if (!spec->check_volume_offset) {
3063 unsigned int caps, step, nums, db_scale;
3064 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3065 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3066 AC_AMPCAP_STEP_SIZE_SHIFT;
3067 step = (step + 1) * 25; /* in .01dB unit */
3068 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3069 AC_AMPCAP_NUM_STEPS_SHIFT;
3070 db_scale = nums * step;
3071 /* if dB scale is over -64dB, and finer enough,
3072 * let's reduce it to half
3073 */
3074 if (db_scale > 6400 && nums >= 0x1f)
3075 spec->volume_offset = nums / 2;
3076 spec->check_volume_offset = 1;
3077 }
3078
eb06ed8f
TI
3079 sprintf(name, "%s Playback Volume", pfx);
3080 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI
3081 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3082 spec->volume_offset));
eb06ed8f
TI
3083 if (err < 0)
3084 return err;
3085 sprintf(name, "%s Playback Switch", pfx);
3086 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3087 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3088 if (err < 0)
3089 return err;
3090 return 0;
3091}
3092
ae0afd81
MR
3093static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3094{
c21ca4a8 3095 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3096 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3097 return 1;
3098 } else {
3099 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3100 spec->multiout.num_dacs++;
3101 }
3102 return 0;
3103}
3104
c21ca4a8 3105static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3106{
c21ca4a8
TI
3107 int i;
3108 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3109 if (!spec->multiout.extra_out_nid[i]) {
3110 spec->multiout.extra_out_nid[i] = nid;
3111 return 0;
3112 }
3113 }
3114 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3115 return 1;
ae0afd81
MR
3116}
3117
76624534
TI
3118static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3119{
3120 int i;
3121
3122 if (spec->autocfg.line_outs != 1)
3123 return 0;
3124 if (spec->multiout.hp_nid == nid)
3125 return 0;
3126 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3127 if (spec->multiout.extra_out_nid[i] == nid)
3128 return 0;
3129 return 1;
3130}
3131
c7d4b2fa 3132/* add playback controls from the parsed DAC table */
0fb87bb4 3133static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3134 const struct auto_pin_cfg *cfg)
c7d4b2fa 3135{
76624534 3136 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3137 static const char *chname[4] = {
3138 "Front", "Surround", NULL /*CLFE*/, "Side"
3139 };
d21995e3 3140 hda_nid_t nid = 0;
91589232
TI
3141 int i, err;
3142 unsigned int wid_caps;
0fb87bb4 3143
c21ca4a8 3144 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3145 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3146 if (i == 2) {
3147 /* Center/LFE */
7c7767eb 3148 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3149 if (err < 0)
c7d4b2fa 3150 return err;
7c7767eb 3151 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3152 if (err < 0)
c7d4b2fa 3153 return err;
0fb87bb4
ML
3154
3155 wid_caps = get_wcaps(codec, nid);
3156
3157 if (wid_caps & AC_WCAP_LR_SWAP) {
3158 err = stac92xx_add_control(spec,
3159 STAC_CTL_WIDGET_CLFE_SWITCH,
3160 "Swap Center/LFE Playback Switch", nid);
3161
3162 if (err < 0)
3163 return err;
3164 }
3165
c7d4b2fa 3166 } else {
76624534
TI
3167 const char *name = chname[i];
3168 /* if it's a single DAC, assign a better name */
3169 if (!i && is_unique_dac(spec, nid)) {
3170 switch (cfg->line_out_type) {
3171 case AUTO_PIN_HP_OUT:
3172 name = "Headphone";
3173 break;
3174 case AUTO_PIN_SPEAKER_OUT:
3175 name = "Speaker";
3176 break;
3177 }
3178 }
7c7767eb 3179 err = create_controls(codec, name, nid, 3);
eb06ed8f 3180 if (err < 0)
c7d4b2fa
M
3181 return err;
3182 }
3183 }
3184
a9cb5c90 3185 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3186 err = stac92xx_add_control(spec,
3187 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3188 "Headphone as Line Out Switch",
3189 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3190 if (err < 0)
3191 return err;
3192 }
3193
b5895dc8 3194 if (spec->line_switch) {
c21ca4a8
TI
3195 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3196 "Line In as Output Switch",
3197 spec->line_switch << 8);
3198 if (err < 0)
3199 return err;
b5895dc8 3200 }
403d1944 3201
b5895dc8 3202 if (spec->mic_switch) {
c21ca4a8
TI
3203 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3204 "Mic as Output Switch",
3205 (spec->mic_switch << 8) | 1);
3206 if (err < 0)
3207 return err;
b5895dc8 3208 }
403d1944 3209
c7d4b2fa
M
3210 return 0;
3211}
3212
eb06ed8f
TI
3213/* add playback controls for Speaker and HP outputs */
3214static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3215 struct auto_pin_cfg *cfg)
3216{
3217 struct sigmatel_spec *spec = codec->spec;
3218 hda_nid_t nid;
c21ca4a8 3219 int i, err, nums;
eb06ed8f 3220
c21ca4a8 3221 nums = 0;
eb06ed8f 3222 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3223 static const char *pfxs[] = {
3224 "Headphone", "Headphone2", "Headphone3",
3225 };
eb06ed8f
TI
3226 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3227 if (wid_caps & AC_WCAP_UNSOL_CAP)
3228 spec->hp_detect = 1;
c21ca4a8 3229 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3230 continue;
c21ca4a8
TI
3231 nid = spec->hp_dacs[i];
3232 if (!nid)
eb06ed8f 3233 continue;
7c7767eb 3234 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI
3235 if (err < 0)
3236 return err;
1b290a51 3237 }
c21ca4a8
TI
3238 nums = 0;
3239 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3240 static const char *pfxs[] = {
3241 "Speaker", "External Speaker", "Speaker2",
3242 };
c21ca4a8
TI
3243 if (nums >= ARRAY_SIZE(pfxs))
3244 continue;
3245 nid = spec->speaker_dacs[i];
3246 if (!nid)
3247 continue;
7c7767eb 3248 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3249 if (err < 0)
3250 return err;
3251 }
c7d4b2fa
M
3252 return 0;
3253}
3254
b22b4821 3255/* labels for mono mux outputs */
d0513fc6
MR
3256static const char *stac92xx_mono_labels[4] = {
3257 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3258};
3259
3260/* create mono mux for mono out on capable codecs */
3261static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3262{
3263 struct sigmatel_spec *spec = codec->spec;
3264 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3265 int i, num_cons;
3266 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3267
3268 num_cons = snd_hda_get_connections(codec,
3269 spec->mono_nid,
3270 con_lst,
3271 HDA_MAX_NUM_INPUTS);
3272 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3273 return -EINVAL;
3274
3275 for (i = 0; i < num_cons; i++) {
3276 mono_mux->items[mono_mux->num_items].label =
3277 stac92xx_mono_labels[i];
3278 mono_mux->items[mono_mux->num_items].index = i;
3279 mono_mux->num_items++;
3280 }
09a99959
MR
3281
3282 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3283 "Mono Mux", spec->mono_nid);
b22b4821
MR
3284}
3285
89385035
MR
3286/* labels for amp mux outputs */
3287static const char *stac92xx_amp_labels[3] = {
4b33c767 3288 "Front Microphone", "Microphone", "Line In",
89385035
MR
3289};
3290
3291/* create amp out controls mux on capable codecs */
3292static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3293{
3294 struct sigmatel_spec *spec = codec->spec;
3295 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3296 int i, err;
3297
2a9c7816 3298 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3299 amp_mux->items[amp_mux->num_items].label =
3300 stac92xx_amp_labels[i];
3301 amp_mux->items[amp_mux->num_items].index = i;
3302 amp_mux->num_items++;
3303 }
3304
2a9c7816
MR
3305 if (spec->num_amps > 1) {
3306 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3307 "Amp Selector Capture Switch", 0);
3308 if (err < 0)
3309 return err;
3310 }
89385035
MR
3311 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3312 "Amp Capture Volume",
3313 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3314}
3315
3316
1cd2224c
MR
3317/* create PC beep volume controls */
3318static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3319 hda_nid_t nid)
3320{
3321 struct sigmatel_spec *spec = codec->spec;
3322 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3323 int err;
3324
3325 /* check for mute support for the the amp */
3326 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3327 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3328 "PC Beep Playback Switch",
3329 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3330 if (err < 0)
3331 return err;
3332 }
3333
3334 /* check to see if there is volume support for the amp */
3335 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3336 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3337 "PC Beep Playback Volume",
3338 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3339 if (err < 0)
3340 return err;
3341 }
3342 return 0;
3343}
3344
4d4e9bb3
TI
3345#ifdef CONFIG_SND_HDA_INPUT_BEEP
3346#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3347
3348static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3349 struct snd_ctl_elem_value *ucontrol)
3350{
3351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3352 ucontrol->value.integer.value[0] = codec->beep->enabled;
3353 return 0;
3354}
3355
3356static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3357 struct snd_ctl_elem_value *ucontrol)
3358{
3359 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3360 int enabled = !!ucontrol->value.integer.value[0];
3361 if (codec->beep->enabled != enabled) {
3362 codec->beep->enabled = enabled;
3363 return 1;
3364 }
3365 return 0;
3366}
3367
3368static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3369 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3370 .info = stac92xx_dig_beep_switch_info,
3371 .get = stac92xx_dig_beep_switch_get,
3372 .put = stac92xx_dig_beep_switch_put,
3373};
3374
3375static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3376{
3377 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3378 0, "PC Beep Playback Switch", 0);
3379}
3380#endif
3381
4682eee0
MR
3382static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3383{
3384 struct sigmatel_spec *spec = codec->spec;
3385 int wcaps, nid, i, err = 0;
3386
3387 for (i = 0; i < spec->num_muxes; i++) {
3388 nid = spec->mux_nids[i];
3389 wcaps = get_wcaps(codec, nid);
3390
3391 if (wcaps & AC_WCAP_OUT_AMP) {
3392 err = stac92xx_add_control_idx(spec,
3393 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3394 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3395 if (err < 0)
3396 return err;
3397 }
3398 }
3399 return 0;
3400};
3401
d9737751 3402static const char *stac92xx_spdif_labels[3] = {
65973632 3403 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3404};
3405
3406static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3407{
3408 struct sigmatel_spec *spec = codec->spec;
3409 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3410 const char **labels = spec->spdif_labels;
d9737751 3411 int i, num_cons;
65973632 3412 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3413
3414 num_cons = snd_hda_get_connections(codec,
3415 spec->smux_nids[0],
3416 con_lst,
3417 HDA_MAX_NUM_INPUTS);
65973632 3418 if (!num_cons)
d9737751
MR
3419 return -EINVAL;
3420
65973632
MR
3421 if (!labels)
3422 labels = stac92xx_spdif_labels;
3423
d9737751 3424 for (i = 0; i < num_cons; i++) {
65973632 3425 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3426 spdif_mux->items[spdif_mux->num_items].index = i;
3427 spdif_mux->num_items++;
3428 }
3429
3430 return 0;
3431}
3432
8b65727b 3433/* labels for dmic mux inputs */
ddc2cec4 3434static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3435 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3436 "Digital Mic 3", "Digital Mic 4"
3437};
3438
3439/* create playback/capture controls for input pins on dmic capable codecs */
3440static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3441 const struct auto_pin_cfg *cfg)
3442{
3443 struct sigmatel_spec *spec = codec->spec;
3444 struct hda_input_mux *dimux = &spec->private_dimux;
3445 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3446 int err, i, j;
3447 char name[32];
8b65727b
MP
3448
3449 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3450 dimux->items[dimux->num_items].index = 0;
3451 dimux->num_items++;
3452
3453 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3454 hda_nid_t nid;
8b65727b
MP
3455 int index;
3456 int num_cons;
0678accd 3457 unsigned int wcaps;
8b65727b
MP
3458 unsigned int def_conf;
3459
3460 def_conf = snd_hda_codec_read(codec,
3461 spec->dmic_nids[i],
3462 0,
3463 AC_VERB_GET_CONFIG_DEFAULT,
3464 0);
3465 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3466 continue;
3467
0678accd 3468 nid = spec->dmic_nids[i];
8b65727b 3469 num_cons = snd_hda_get_connections(codec,
e1f0d669 3470 spec->dmux_nids[0],
8b65727b
MP
3471 con_lst,
3472 HDA_MAX_NUM_INPUTS);
3473 for (j = 0; j < num_cons; j++)
0678accd 3474 if (con_lst[j] == nid) {
8b65727b
MP
3475 index = j;
3476 goto found;
3477 }
3478 continue;
3479found:
d0513fc6
MR
3480 wcaps = get_wcaps(codec, nid) &
3481 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3482
d0513fc6 3483 if (wcaps) {
0678accd
MR
3484 sprintf(name, "%s Capture Volume",
3485 stac92xx_dmic_labels[dimux->num_items]);
3486
3487 err = stac92xx_add_control(spec,
3488 STAC_CTL_WIDGET_VOL,
3489 name,
d0513fc6
MR
3490 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3491 (wcaps & AC_WCAP_OUT_AMP) ?
3492 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3493 if (err < 0)
3494 return err;
3495 }
3496
8b65727b
MP
3497 dimux->items[dimux->num_items].label =
3498 stac92xx_dmic_labels[dimux->num_items];
3499 dimux->items[dimux->num_items].index = index;
3500 dimux->num_items++;
3501 }
3502
3503 return 0;
3504}
3505
c7d4b2fa
M
3506/* create playback/capture controls for input pins */
3507static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3508{
3509 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3510 struct hda_input_mux *imux = &spec->private_imux;
3511 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3512 int i, j, k;
3513
3514 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3515 int index;
3516
3517 if (!cfg->input_pins[i])
3518 continue;
3519 index = -1;
3520 for (j = 0; j < spec->num_muxes; j++) {
3521 int num_cons;
3522 num_cons = snd_hda_get_connections(codec,
3523 spec->mux_nids[j],
3524 con_lst,
3525 HDA_MAX_NUM_INPUTS);
3526 for (k = 0; k < num_cons; k++)
3527 if (con_lst[k] == cfg->input_pins[i]) {
3528 index = k;
3529 goto found;
3530 }
c7d4b2fa 3531 }
314634bc
TI
3532 continue;
3533 found:
3534 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3535 imux->items[imux->num_items].index = index;
3536 imux->num_items++;
c7d4b2fa
M
3537 }
3538
7b043899 3539 if (imux->num_items) {
62fe78e9
SR
3540 /*
3541 * Set the current input for the muxes.
3542 * The STAC9221 has two input muxes with identical source
3543 * NID lists. Hopefully this won't get confused.
3544 */
3545 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3546 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3547 AC_VERB_SET_CONNECT_SEL,
3548 imux->items[0].index);
62fe78e9
SR
3549 }
3550 }
3551
c7d4b2fa
M
3552 return 0;
3553}
3554
c7d4b2fa
M
3555static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3556{
3557 struct sigmatel_spec *spec = codec->spec;
3558 int i;
3559
3560 for (i = 0; i < spec->autocfg.line_outs; i++) {
3561 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3562 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3563 }
3564}
3565
3566static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3567{
3568 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3569 int i;
c7d4b2fa 3570
eb06ed8f
TI
3571 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3572 hda_nid_t pin;
3573 pin = spec->autocfg.hp_pins[i];
3574 if (pin) /* connect to front */
3575 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3576 }
3577 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3578 hda_nid_t pin;
3579 pin = spec->autocfg.speaker_pins[i];
3580 if (pin) /* connect to front */
3581 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3582 }
c7d4b2fa
M
3583}
3584
3cc08dc6 3585static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3586{
3587 struct sigmatel_spec *spec = codec->spec;
3588 int err;
3589
8b65727b
MP
3590 if ((err = snd_hda_parse_pin_def_config(codec,
3591 &spec->autocfg,
3592 spec->dmic_nids)) < 0)
c7d4b2fa 3593 return err;
82bc955f 3594 if (! spec->autocfg.line_outs)
869264c4 3595 return 0; /* can't find valid pin config */
19039bd0 3596
bcecd9bd
JZ
3597 /* If we have no real line-out pin and multiple hp-outs, HPs should
3598 * be set up as multi-channel outputs.
3599 */
3600 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3601 spec->autocfg.hp_outs > 1) {
3602 /* Copy hp_outs to line_outs, backup line_outs in
3603 * speaker_outs so that the following routines can handle
3604 * HP pins as primary outputs.
3605 */
c21ca4a8 3606 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3607 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3608 sizeof(spec->autocfg.line_out_pins));
3609 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3610 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3611 sizeof(spec->autocfg.hp_pins));
3612 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3613 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3614 spec->autocfg.hp_outs = 0;
bcecd9bd 3615 }
09a99959 3616 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3617 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3618 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3619 u32 caps = query_amp_caps(codec,
3620 spec->autocfg.mono_out_pin, dir);
3621 hda_nid_t conn_list[1];
3622
3623 /* get the mixer node and then the mono mux if it exists */
3624 if (snd_hda_get_connections(codec,
3625 spec->autocfg.mono_out_pin, conn_list, 1) &&
3626 snd_hda_get_connections(codec, conn_list[0],
3627 conn_list, 1)) {
3628
3629 int wcaps = get_wcaps(codec, conn_list[0]);
3630 int wid_type = (wcaps & AC_WCAP_TYPE)
3631 >> AC_WCAP_TYPE_SHIFT;
3632 /* LR swap check, some stac925x have a mux that
3633 * changes the DACs output path instead of the
3634 * mono-mux path.
3635 */
3636 if (wid_type == AC_WID_AUD_SEL &&
3637 !(wcaps & AC_WCAP_LR_SWAP))
3638 spec->mono_nid = conn_list[0];
3639 }
d0513fc6
MR
3640 if (dir) {
3641 hda_nid_t nid = spec->autocfg.mono_out_pin;
3642
3643 /* most mono outs have a least a mute/unmute switch */
3644 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3645 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3646 "Mono Playback Switch",
3647 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3648 if (err < 0)
3649 return err;
d0513fc6
MR
3650 /* check for volume support for the amp */
3651 if ((caps & AC_AMPCAP_NUM_STEPS)
3652 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3653 err = stac92xx_add_control(spec,
3654 STAC_CTL_WIDGET_VOL,
3655 "Mono Playback Volume",
3656 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3657 if (err < 0)
3658 return err;
3659 }
09a99959
MR
3660 }
3661
3662 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3663 AC_PINCTL_OUT_EN);
3664 }
bcecd9bd 3665
c21ca4a8
TI
3666 if (!spec->multiout.num_dacs) {
3667 err = stac92xx_auto_fill_dac_nids(codec);
3668 if (err < 0)
19039bd0 3669 return err;
c9280d68
TI
3670 err = stac92xx_auto_create_multi_out_ctls(codec,
3671 &spec->autocfg);
3672 if (err < 0)
3673 return err;
c21ca4a8 3674 }
c7d4b2fa 3675
1cd2224c
MR
3676 /* setup analog beep controls */
3677 if (spec->anabeep_nid > 0) {
3678 err = stac92xx_auto_create_beep_ctls(codec,
3679 spec->anabeep_nid);
3680 if (err < 0)
3681 return err;
3682 }
3683
3684 /* setup digital beep controls and input device */
3685#ifdef CONFIG_SND_HDA_INPUT_BEEP
3686 if (spec->digbeep_nid > 0) {
3687 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3688 unsigned int caps;
1cd2224c
MR
3689
3690 err = stac92xx_auto_create_beep_ctls(codec, nid);
3691 if (err < 0)
3692 return err;
3693 err = snd_hda_attach_beep_device(codec, nid);
3694 if (err < 0)
3695 return err;
4d4e9bb3
TI
3696 /* if no beep switch is available, make its own one */
3697 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3698 if (codec->beep &&
3699 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3700 err = stac92xx_beep_switch_ctl(codec);
3701 if (err < 0)
3702 return err;
3703 }
1cd2224c
MR
3704 }
3705#endif
3706
0fb87bb4
ML
3707 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3708
3709 if (err < 0)
3710 return err;
3711
3712 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3713
3714 if (err < 0)
c7d4b2fa
M
3715 return err;
3716
b22b4821
MR
3717 if (spec->mono_nid > 0) {
3718 err = stac92xx_auto_create_mono_output_ctls(codec);
3719 if (err < 0)
3720 return err;
3721 }
2a9c7816 3722 if (spec->num_amps > 0) {
89385035
MR
3723 err = stac92xx_auto_create_amp_output_ctls(codec);
3724 if (err < 0)
3725 return err;
3726 }
2a9c7816 3727 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3728 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3729 &spec->autocfg)) < 0)
3730 return err;
4682eee0
MR
3731 if (spec->num_muxes > 0) {
3732 err = stac92xx_auto_create_mux_input_ctls(codec);
3733 if (err < 0)
3734 return err;
3735 }
d9737751
MR
3736 if (spec->num_smuxes > 0) {
3737 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3738 if (err < 0)
3739 return err;
3740 }
8b65727b 3741
e3c75964
TI
3742 err = stac92xx_add_input_source(spec);
3743 if (err < 0)
3744 return err;
3745
c7d4b2fa 3746 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3747 if (spec->multiout.max_channels > 2)
c7d4b2fa 3748 spec->surr_switch = 1;
c7d4b2fa 3749
82bc955f 3750 if (spec->autocfg.dig_out_pin)
3cc08dc6 3751 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3752 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3753 spec->dig_in_nid = dig_in;
c7d4b2fa 3754
603c4019
TI
3755 if (spec->kctls.list)
3756 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3757
3758 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3759 if (!spec->dinput_mux)
3760 spec->dinput_mux = &spec->private_dimux;
d9737751 3761 spec->sinput_mux = &spec->private_smux;
b22b4821 3762 spec->mono_mux = &spec->private_mono_mux;
89385035 3763 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3764 return 1;
3765}
3766
82bc955f
TI
3767/* add playback controls for HP output */
3768static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3769 struct auto_pin_cfg *cfg)
3770{
3771 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3772 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3773 unsigned int wid_caps;
3774
3775 if (! pin)
3776 return 0;
3777
3778 wid_caps = get_wcaps(codec, pin);
505cb341 3779 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3780 spec->hp_detect = 1;
82bc955f
TI
3781
3782 return 0;
3783}
3784
160ea0dc
RF
3785/* add playback controls for LFE output */
3786static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3787 struct auto_pin_cfg *cfg)
3788{
3789 struct sigmatel_spec *spec = codec->spec;
3790 int err;
3791 hda_nid_t lfe_pin = 0x0;
3792 int i;
3793
3794 /*
3795 * search speaker outs and line outs for a mono speaker pin
3796 * with an amp. If one is found, add LFE controls
3797 * for it.
3798 */
3799 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3800 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3801 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3802 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3803 if (wcaps == AC_WCAP_OUT_AMP)
3804 /* found a mono speaker with an amp, must be lfe */
3805 lfe_pin = pin;
3806 }
3807
3808 /* if speaker_outs is 0, then speakers may be in line_outs */
3809 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3810 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3811 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3812 unsigned int defcfg;
8b551785 3813 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3814 AC_VERB_GET_CONFIG_DEFAULT,
3815 0x00);
8b551785 3816 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3817 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3818 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3819 if (wcaps == AC_WCAP_OUT_AMP)
3820 /* found a mono speaker with an amp,
3821 must be lfe */
3822 lfe_pin = pin;
3823 }
3824 }
3825 }
3826
3827 if (lfe_pin) {
7c7767eb 3828 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3829 if (err < 0)
3830 return err;
3831 }
3832
3833 return 0;
3834}
3835
c7d4b2fa
M
3836static int stac9200_parse_auto_config(struct hda_codec *codec)
3837{
3838 struct sigmatel_spec *spec = codec->spec;
3839 int err;
3840
df694daa 3841 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3842 return err;
3843
3844 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3845 return err;
3846
82bc955f
TI
3847 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3848 return err;
3849
160ea0dc
RF
3850 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3851 return err;
3852
355a0ec4
TI
3853 if (spec->num_muxes > 0) {
3854 err = stac92xx_auto_create_mux_input_ctls(codec);
3855 if (err < 0)
3856 return err;
3857 }
3858
e3c75964
TI
3859 err = stac92xx_add_input_source(spec);
3860 if (err < 0)
3861 return err;
3862
82bc955f 3863 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3864 spec->multiout.dig_out_nid = 0x05;
82bc955f 3865 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3866 spec->dig_in_nid = 0x04;
c7d4b2fa 3867
603c4019
TI
3868 if (spec->kctls.list)
3869 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3870
3871 spec->input_mux = &spec->private_imux;
8b65727b 3872 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3873
3874 return 1;
3875}
3876
62fe78e9
SR
3877/*
3878 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3879 * funky external mute control using GPIO pins.
3880 */
3881
76e1ddfb 3882static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3883 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3884{
3885 unsigned int gpiostate, gpiomask, gpiodir;
3886
3887 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3888 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3889 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3890
3891 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3892 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3893 gpiomask |= mask;
62fe78e9
SR
3894
3895 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3896 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3897 gpiodir |= dir_mask;
62fe78e9 3898
76e1ddfb 3899 /* Configure GPIOx as CMOS */
62fe78e9
SR
3900 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3901
3902 snd_hda_codec_write(codec, codec->afg, 0,
3903 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3904 snd_hda_codec_read(codec, codec->afg, 0,
3905 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3906
3907 msleep(1);
3908
76e1ddfb
TI
3909 snd_hda_codec_read(codec, codec->afg, 0,
3910 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3911}
3912
74aeaabc
MR
3913static int stac92xx_add_jack(struct hda_codec *codec,
3914 hda_nid_t nid, int type)
3915{
e4973e1e 3916#ifdef CONFIG_SND_JACK
74aeaabc
MR
3917 struct sigmatel_spec *spec = codec->spec;
3918 struct sigmatel_jack *jack;
3919 int def_conf = snd_hda_codec_read(codec, nid,
3920 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3921 int connectivity = get_defcfg_connect(def_conf);
3922 char name[32];
3923
3924 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3925 return 0;
3926
3927 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3928 jack = snd_array_new(&spec->jacks);
3929 if (!jack)
3930 return -ENOMEM;
3931 jack->nid = nid;
3932 jack->type = type;
3933
3934 sprintf(name, "%s at %s %s Jack",
3935 snd_hda_get_jack_type(def_conf),
3936 snd_hda_get_jack_connectivity(def_conf),
3937 snd_hda_get_jack_location(def_conf));
3938
3939 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3940#else
3941 return 0;
3942#endif
74aeaabc
MR
3943}
3944
c6e4c666
TI
3945static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3946 unsigned char type, int data)
74aeaabc
MR
3947{
3948 struct sigmatel_event *event;
3949
3950 snd_array_init(&spec->events, sizeof(*event), 32);
3951 event = snd_array_new(&spec->events);
3952 if (!event)
3953 return -ENOMEM;
3954 event->nid = nid;
c6e4c666
TI
3955 event->type = type;
3956 event->tag = spec->events.used;
74aeaabc
MR
3957 event->data = data;
3958
c6e4c666 3959 return event->tag;
74aeaabc
MR
3960}
3961
c6e4c666
TI
3962static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3963 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3964{
3965 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3966 struct sigmatel_event *event = spec->events.list;
3967 int i;
3968
3969 for (i = 0; i < spec->events.used; i++, event++) {
3970 if (event->nid == nid && event->type == type)
3971 return event;
74aeaabc 3972 }
c6e4c666 3973 return NULL;
74aeaabc
MR
3974}
3975
c6e4c666
TI
3976static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3977 unsigned char tag)
314634bc 3978{
c6e4c666
TI
3979 struct sigmatel_spec *spec = codec->spec;
3980 struct sigmatel_event *event = spec->events.list;
3981 int i;
3982
3983 for (i = 0; i < spec->events.used; i++, event++) {
3984 if (event->tag == tag)
3985 return event;
74aeaabc 3986 }
c6e4c666
TI
3987 return NULL;
3988}
3989
3990static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3991 unsigned int type)
3992{
3993 struct sigmatel_event *event;
3994 int tag;
3995
3996 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3997 return;
3998 event = stac_get_event(codec, nid, type);
3999 if (event)
4000 tag = event->tag;
4001 else
4002 tag = stac_add_event(codec->spec, nid, type, 0);
4003 if (tag < 0)
4004 return;
4005 snd_hda_codec_write_cache(codec, nid, 0,
4006 AC_VERB_SET_UNSOLICITED_ENABLE,
4007 AC_USRSP_EN | tag);
314634bc
TI
4008}
4009
a64135a2
MR
4010static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4011{
4012 int i;
4013 for (i = 0; i < cfg->hp_outs; i++)
4014 if (cfg->hp_pins[i] == nid)
4015 return 1; /* nid is a HP-Out */
4016
4017 return 0; /* nid is not a HP-Out */
4018};
4019
b76c850f
MR
4020static void stac92xx_power_down(struct hda_codec *codec)
4021{
4022 struct sigmatel_spec *spec = codec->spec;
4023
4024 /* power down inactive DACs */
4025 hda_nid_t *dac;
4026 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4027 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4028 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4029 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4030}
4031
f73d3585
TI
4032static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4033 int enable);
4034
c7d4b2fa
M
4035static int stac92xx_init(struct hda_codec *codec)
4036{
4037 struct sigmatel_spec *spec = codec->spec;
82bc955f 4038 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4039 unsigned int gpio;
e4973e1e 4040 int i;
c7d4b2fa 4041
c7d4b2fa
M
4042 snd_hda_sequence_write(codec, spec->init);
4043
8daaaa97
MR
4044 /* power down adcs initially */
4045 if (spec->powerdown_adcs)
4046 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4047 snd_hda_codec_write(codec,
8daaaa97
MR
4048 spec->adc_nids[i], 0,
4049 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
4050
4051 /* set up GPIO */
4052 gpio = spec->gpio_data;
4053 /* turn on EAPD statically when spec->eapd_switch isn't set.
4054 * otherwise, unsol event will turn it on/off dynamically
4055 */
4056 if (!spec->eapd_switch)
4057 gpio |= spec->eapd_mask;
4058 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4059
82bc955f
TI
4060 /* set up pins */
4061 if (spec->hp_detect) {
505cb341 4062 /* Enable unsolicited responses on the HP widget */
74aeaabc 4063 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4064 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4065 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4066 }
0a07acaf
TI
4067 /* force to enable the first line-out; the others are set up
4068 * in unsol_event
4069 */
4070 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4071 AC_PINCTL_OUT_EN);
82bc955f 4072 /* fake event to set up pins */
c6e4c666
TI
4073 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4074 STAC_HP_EVENT);
82bc955f
TI
4075 } else {
4076 stac92xx_auto_init_multi_out(codec);
4077 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4078 for (i = 0; i < cfg->hp_outs; i++)
4079 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
4080 }
4081 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4082 hda_nid_t nid = cfg->input_pins[i];
4083 if (nid) {
12dde4c6 4084 unsigned int pinctl, conf;
4f1e6bc3
TI
4085 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4086 /* for mic pins, force to initialize */
4087 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
4088 pinctl |= AC_PINCTL_IN_EN;
4089 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4090 } else {
4091 pinctl = snd_hda_codec_read(codec, nid, 0,
4092 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4093 /* if PINCTL already set then skip */
12dde4c6
TI
4094 if (!(pinctl & AC_PINCTL_IN_EN)) {
4095 pinctl |= AC_PINCTL_IN_EN;
4096 stac92xx_auto_set_pinctl(codec, nid,
4097 pinctl);
4098 }
4099 }
4100 conf = snd_hda_codec_read(codec, nid, 0,
4101 AC_VERB_GET_CONFIG_DEFAULT, 0);
4102 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4103 enable_pin_detect(codec, nid,
4104 STAC_INSERT_EVENT);
4105 stac_issue_unsol_event(codec, nid,
4106 STAC_INSERT_EVENT);
4f1e6bc3 4107 }
c960a03b 4108 }
82bc955f 4109 }
a64135a2
MR
4110 for (i = 0; i < spec->num_dmics; i++)
4111 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4112 AC_PINCTL_IN_EN);
f73d3585
TI
4113 if (cfg->dig_out_pin)
4114 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4115 AC_PINCTL_OUT_EN);
4116 if (cfg->dig_in_pin)
4117 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4118 AC_PINCTL_IN_EN);
a64135a2 4119 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4120 hda_nid_t nid = spec->pwr_nids[i];
4121 int pinctl, def_conf;
f73d3585 4122
eb632128
TI
4123 /* power on when no jack detection is available */
4124 if (!spec->hp_detect) {
4125 stac_toggle_power_map(codec, nid, 1);
4126 continue;
4127 }
4128
4129 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4130 continue; /* already has an unsol event */
4131
4132 pinctl = snd_hda_codec_read(codec, nid, 0,
4133 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4134 /* outputs are only ports capable of power management
4135 * any attempts on powering down a input port cause the
4136 * referenced VREF to act quirky.
4137 */
eb632128
TI
4138 if (pinctl & AC_PINCTL_IN_EN) {
4139 stac_toggle_power_map(codec, nid, 1);
a64135a2 4140 continue;
eb632128 4141 }
f73d3585
TI
4142 def_conf = snd_hda_codec_read(codec, nid, 0,
4143 AC_VERB_GET_CONFIG_DEFAULT, 0);
4144 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4145 /* skip any ports that don't have jacks since presence
4146 * detection is useless */
f73d3585
TI
4147 if (def_conf != AC_JACK_PORT_COMPLEX) {
4148 if (def_conf != AC_JACK_PORT_NONE)
4149 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4150 continue;
f73d3585 4151 }
12dde4c6
TI
4152 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4153 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4154 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4155 }
a64135a2 4156 }
b76c850f
MR
4157 if (spec->dac_list)
4158 stac92xx_power_down(codec);
c7d4b2fa
M
4159 return 0;
4160}
4161
74aeaabc
MR
4162static void stac92xx_free_jacks(struct hda_codec *codec)
4163{
e4973e1e 4164#ifdef CONFIG_SND_JACK
b94d3539 4165 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4166 struct sigmatel_spec *spec = codec->spec;
b94d3539 4167 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4168 struct sigmatel_jack *jacks = spec->jacks.list;
4169 int i;
4170 for (i = 0; i < spec->jacks.used; i++)
4171 snd_device_free(codec->bus->card, &jacks[i].jack);
4172 }
4173 snd_array_free(&spec->jacks);
e4973e1e 4174#endif
74aeaabc
MR
4175}
4176
603c4019
TI
4177static void stac92xx_free_kctls(struct hda_codec *codec)
4178{
4179 struct sigmatel_spec *spec = codec->spec;
4180
4181 if (spec->kctls.list) {
4182 struct snd_kcontrol_new *kctl = spec->kctls.list;
4183 int i;
4184 for (i = 0; i < spec->kctls.used; i++)
4185 kfree(kctl[i].name);
4186 }
4187 snd_array_free(&spec->kctls);
4188}
4189
2f2f4251
M
4190static void stac92xx_free(struct hda_codec *codec)
4191{
c7d4b2fa 4192 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4193
4194 if (! spec)
4195 return;
4196
af9f341a 4197 kfree(spec->pin_configs);
74aeaabc
MR
4198 stac92xx_free_jacks(codec);
4199 snd_array_free(&spec->events);
11b44bbd 4200
c7d4b2fa 4201 kfree(spec);
1cd2224c 4202 snd_hda_detach_beep_device(codec);
2f2f4251
M
4203}
4204
4e55096e
M
4205static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4206 unsigned int flag)
4207{
8ce84198
TI
4208 unsigned int old_ctl, pin_ctl;
4209
4210 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4211 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4212
f9acba43
TI
4213 if (pin_ctl & AC_PINCTL_IN_EN) {
4214 /*
4215 * we need to check the current set-up direction of
4216 * shared input pins since they can be switched via
4217 * "xxx as Output" mixer switch
4218 */
4219 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4220 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4221 return;
4222 }
4223
8ce84198 4224 old_ctl = pin_ctl;
7b043899
SL
4225 /* if setting pin direction bits, clear the current
4226 direction bits first */
4227 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4228 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4229
8ce84198
TI
4230 pin_ctl |= flag;
4231 if (old_ctl != pin_ctl)
4232 snd_hda_codec_write_cache(codec, nid, 0,
4233 AC_VERB_SET_PIN_WIDGET_CONTROL,
4234 pin_ctl);
4e55096e
M
4235}
4236
4237static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4238 unsigned int flag)
4239{
4240 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4241 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4242 if (pin_ctl & flag)
4243 snd_hda_codec_write_cache(codec, nid, 0,
4244 AC_VERB_SET_PIN_WIDGET_CONTROL,
4245 pin_ctl & ~flag);
4e55096e
M
4246}
4247
e6e3ea25 4248static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4249{
4250 if (!nid)
4251 return 0;
4252 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4253 & (1 << 31))
4254 return 1;
314634bc
TI
4255 return 0;
4256}
4257
d7a89436
TI
4258/* return non-zero if the hp-pin of the given array index isn't
4259 * a jack-detection target
4260 */
4261static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4262{
4263 struct auto_pin_cfg *cfg = &spec->autocfg;
4264
4265 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4266 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4267 return 1;
c21ca4a8 4268 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4269 return 1;
4270 /* ignore if the pin is set as line-out */
4271 if (cfg->hp_pins[i] == spec->hp_switch)
4272 return 1;
4273 return 0;
4274}
4275
c6e4c666 4276static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4277{
4278 struct sigmatel_spec *spec = codec->spec;
4279 struct auto_pin_cfg *cfg = &spec->autocfg;
4280 int i, presence;
4281
eb06ed8f 4282 presence = 0;
4fe5195c
MR
4283 if (spec->gpio_mute)
4284 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4285 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4286
eb06ed8f 4287 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4288 if (presence)
4289 break;
d7a89436
TI
4290 if (no_hp_sensing(spec, i))
4291 continue;
e6e3ea25
TI
4292 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4293 if (presence) {
4294 unsigned int pinctl;
4295 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4296 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4297 if (pinctl & AC_PINCTL_IN_EN)
4298 presence = 0; /* mic- or line-input */
4299 }
eb06ed8f 4300 }
4e55096e
M
4301
4302 if (presence) {
d7a89436 4303 /* disable lineouts */
7c2ba97b 4304 if (spec->hp_switch)
d7a89436
TI
4305 stac92xx_reset_pinctl(codec, spec->hp_switch,
4306 AC_PINCTL_OUT_EN);
4e55096e
M
4307 for (i = 0; i < cfg->line_outs; i++)
4308 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4309 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4310 for (i = 0; i < cfg->speaker_outs; i++)
4311 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4312 AC_PINCTL_OUT_EN);
c0cea0d0 4313 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4314 stac_gpio_set(codec, spec->gpio_mask,
4315 spec->gpio_dir, spec->gpio_data &
4316 ~spec->eapd_mask);
4e55096e 4317 } else {
d7a89436 4318 /* enable lineouts */
7c2ba97b 4319 if (spec->hp_switch)
d7a89436
TI
4320 stac92xx_set_pinctl(codec, spec->hp_switch,
4321 AC_PINCTL_OUT_EN);
4e55096e
M
4322 for (i = 0; i < cfg->line_outs; i++)
4323 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4324 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4325 for (i = 0; i < cfg->speaker_outs; i++)
4326 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4327 AC_PINCTL_OUT_EN);
c0cea0d0 4328 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4329 stac_gpio_set(codec, spec->gpio_mask,
4330 spec->gpio_dir, spec->gpio_data |
4331 spec->eapd_mask);
4e55096e 4332 }
d7a89436
TI
4333 /* toggle hp outs */
4334 for (i = 0; i < cfg->hp_outs; i++) {
4335 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4336 if (no_hp_sensing(spec, i))
4337 continue;
4338 if (presence)
4339 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4340#if 0 /* FIXME */
4341/* Resetting the pinctl like below may lead to (a sort of) regressions
4342 * on some devices since they use the HP pin actually for line/speaker
4343 * outs although the default pin config shows a different pin (that is
4344 * wrong and useless).
4345 *
4346 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4347 * But, disabling the code below just works around it, and I'm too tired of
4348 * bug reports with such devices...
4349 */
d7a89436
TI
4350 else
4351 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4352#endif /* FIXME */
d7a89436 4353 }
4e55096e
M
4354}
4355
f73d3585
TI
4356static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4357 int enable)
a64135a2
MR
4358{
4359 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4360 unsigned int idx, val;
4361
4362 for (idx = 0; idx < spec->num_pwrs; idx++) {
4363 if (spec->pwr_nids[idx] == nid)
4364 break;
4365 }
4366 if (idx >= spec->num_pwrs)
4367 return;
d0513fc6
MR
4368
4369 /* several codecs have two power down bits */
4370 if (spec->pwr_mapping)
4371 idx = spec->pwr_mapping[idx];
4372 else
4373 idx = 1 << idx;
a64135a2 4374
f73d3585
TI
4375 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4376 if (enable)
a64135a2
MR
4377 val &= ~idx;
4378 else
4379 val |= idx;
4380
4381 /* power down unused output ports */
4382 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4383}
4384
f73d3585
TI
4385static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4386{
e6e3ea25 4387 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4388}
a64135a2 4389
74aeaabc
MR
4390static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4391{
4392 struct sigmatel_spec *spec = codec->spec;
4393 struct sigmatel_jack *jacks = spec->jacks.list;
4394
4395 if (jacks) {
4396 int i;
4397 for (i = 0; i < spec->jacks.used; i++) {
4398 if (jacks->nid == nid) {
4399 unsigned int pin_ctl =
4400 snd_hda_codec_read(codec, nid,
4401 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4402 0x00);
4403 int type = jacks->type;
4404 if (type == (SND_JACK_LINEOUT
4405 | SND_JACK_HEADPHONE))
4406 type = (pin_ctl & AC_PINCTL_HP_EN)
4407 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4408 snd_jack_report(jacks->jack,
e6e3ea25 4409 get_pin_presence(codec, nid)
74aeaabc
MR
4410 ? type : 0);
4411 }
4412 jacks++;
4413 }
4414 }
4415}
a64135a2 4416
c6e4c666
TI
4417static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4418 unsigned char type)
4419{
4420 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4421 if (!event)
4422 return;
4423 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4424}
4425
314634bc
TI
4426static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4427{
a64135a2 4428 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4429 struct sigmatel_event *event;
4430 int tag, data;
a64135a2 4431
c6e4c666
TI
4432 tag = (res >> 26) & 0x7f;
4433 event = stac_get_event_from_tag(codec, tag);
4434 if (!event)
4435 return;
4436
4437 switch (event->type) {
314634bc 4438 case STAC_HP_EVENT:
c6e4c666 4439 stac92xx_hp_detect(codec);
a64135a2 4440 /* fallthru */
74aeaabc 4441 case STAC_INSERT_EVENT:
a64135a2 4442 case STAC_PWR_EVENT:
c6e4c666
TI
4443 if (spec->num_pwrs > 0)
4444 stac92xx_pin_sense(codec, event->nid);
4445 stac92xx_report_jack(codec, event->nid);
72474be6 4446 break;
c6e4c666
TI
4447 case STAC_VREF_EVENT:
4448 data = snd_hda_codec_read(codec, codec->afg, 0,
4449 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4450 /* toggle VREF state based on GPIOx status */
4451 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4452 !!(data & (1 << event->data)));
72474be6 4453 break;
314634bc
TI
4454 }
4455}
4456
2d34e1b3
TI
4457#ifdef CONFIG_PROC_FS
4458static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4459 struct hda_codec *codec, hda_nid_t nid)
4460{
4461 if (nid == codec->afg)
4462 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4463 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4464}
4465
4466static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4467 struct hda_codec *codec,
4468 unsigned int verb)
4469{
4470 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4471 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4472}
4473
4474/* stac92hd71bxx, stac92hd73xx */
4475static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4476 struct hda_codec *codec, hda_nid_t nid)
4477{
4478 stac92hd_proc_hook(buffer, codec, nid);
4479 if (nid == codec->afg)
4480 analog_loop_proc_hook(buffer, codec, 0xfa0);
4481}
4482
4483static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4484 struct hda_codec *codec, hda_nid_t nid)
4485{
4486 if (nid == codec->afg)
4487 analog_loop_proc_hook(buffer, codec, 0xfe0);
4488}
4489
4490static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4491 struct hda_codec *codec, hda_nid_t nid)
4492{
4493 if (nid == codec->afg)
4494 analog_loop_proc_hook(buffer, codec, 0xfeb);
4495}
4496#else
4497#define stac92hd_proc_hook NULL
4498#define stac92hd7x_proc_hook NULL
4499#define stac9205_proc_hook NULL
4500#define stac927x_proc_hook NULL
4501#endif
4502
cb53c626 4503#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4504static int stac92xx_resume(struct hda_codec *codec)
4505{
dc81bed1
TI
4506 struct sigmatel_spec *spec = codec->spec;
4507
11b44bbd 4508 stac92xx_set_config_regs(codec);
2c885878 4509 stac92xx_init(codec);
82beb8fd
TI
4510 snd_hda_codec_resume_amp(codec);
4511 snd_hda_codec_resume_cache(codec);
2c885878 4512 /* fake event to set up pins again to override cached values */
dc81bed1 4513 if (spec->hp_detect)
c6e4c666
TI
4514 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4515 STAC_HP_EVENT);
ff6fdc37
M
4516 return 0;
4517}
c6798d2b
MR
4518
4519static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4520{
4521 struct sigmatel_spec *spec = codec->spec;
4522 if (spec->eapd_mask)
4523 stac_gpio_set(codec, spec->gpio_mask,
4524 spec->gpio_dir, spec->gpio_data &
4525 ~spec->eapd_mask);
4526 return 0;
4527}
ff6fdc37
M
4528#endif
4529
2f2f4251
M
4530static struct hda_codec_ops stac92xx_patch_ops = {
4531 .build_controls = stac92xx_build_controls,
4532 .build_pcms = stac92xx_build_pcms,
4533 .init = stac92xx_init,
4534 .free = stac92xx_free,
4e55096e 4535 .unsol_event = stac92xx_unsol_event,
cb53c626 4536#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4537 .suspend = stac92xx_suspend,
ff6fdc37
M
4538 .resume = stac92xx_resume,
4539#endif
2f2f4251
M
4540};
4541
4542static int patch_stac9200(struct hda_codec *codec)
4543{
4544 struct sigmatel_spec *spec;
c7d4b2fa 4545 int err;
2f2f4251 4546
e560d8d8 4547 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4548 if (spec == NULL)
4549 return -ENOMEM;
4550
4551 codec->spec = spec;
a4eed138 4552 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4553 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4554 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4555 stac9200_models,
4556 stac9200_cfg_tbl);
11b44bbd
RF
4557 if (spec->board_config < 0) {
4558 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4559 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4560 } else
4561 err = stac_save_pin_cfgs(codec,
4562 stac9200_brd_tbl[spec->board_config]);
4563 if (err < 0) {
4564 stac92xx_free(codec);
4565 return err;
403d1944 4566 }
2f2f4251
M
4567
4568 spec->multiout.max_channels = 2;
4569 spec->multiout.num_dacs = 1;
4570 spec->multiout.dac_nids = stac9200_dac_nids;
4571 spec->adc_nids = stac9200_adc_nids;
4572 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4573 spec->num_muxes = 1;
8b65727b 4574 spec->num_dmics = 0;
9e05b7a3 4575 spec->num_adcs = 1;
a64135a2 4576 spec->num_pwrs = 0;
c7d4b2fa 4577
58eec423
MCC
4578 if (spec->board_config == STAC_9200_M4 ||
4579 spec->board_config == STAC_9200_M4_2 ||
bf277785 4580 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4581 spec->init = stac9200_eapd_init;
4582 else
4583 spec->init = stac9200_core_init;
2f2f4251 4584 spec->mixer = stac9200_mixer;
c7d4b2fa 4585
117f257d
TI
4586 if (spec->board_config == STAC_9200_PANASONIC) {
4587 spec->gpio_mask = spec->gpio_dir = 0x09;
4588 spec->gpio_data = 0x00;
4589 }
4590
c7d4b2fa
M
4591 err = stac9200_parse_auto_config(codec);
4592 if (err < 0) {
4593 stac92xx_free(codec);
4594 return err;
4595 }
2f2f4251 4596
2acc9dcb
TI
4597 /* CF-74 has no headphone detection, and the driver should *NOT*
4598 * do detection and HP/speaker toggle because the hardware does it.
4599 */
4600 if (spec->board_config == STAC_9200_PANASONIC)
4601 spec->hp_detect = 0;
4602
2f2f4251
M
4603 codec->patch_ops = stac92xx_patch_ops;
4604
4605 return 0;
4606}
4607
8e21c34c
TD
4608static int patch_stac925x(struct hda_codec *codec)
4609{
4610 struct sigmatel_spec *spec;
4611 int err;
4612
4613 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4614 if (spec == NULL)
4615 return -ENOMEM;
4616
4617 codec->spec = spec;
a4eed138 4618 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4619 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4620
4621 /* Check first for codec ID */
4622 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4623 STAC_925x_MODELS,
4624 stac925x_models,
4625 stac925x_codec_id_cfg_tbl);
4626
4627 /* Now checks for PCI ID, if codec ID is not found */
4628 if (spec->board_config < 0)
4629 spec->board_config = snd_hda_check_board_config(codec,
4630 STAC_925x_MODELS,
8e21c34c
TD
4631 stac925x_models,
4632 stac925x_cfg_tbl);
9e507abd 4633 again:
8e21c34c 4634 if (spec->board_config < 0) {
9cb36c2a 4635 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4636 "using BIOS defaults\n");
8e21c34c 4637 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4638 } else
4639 err = stac_save_pin_cfgs(codec,
4640 stac925x_brd_tbl[spec->board_config]);
4641 if (err < 0) {
4642 stac92xx_free(codec);
4643 return err;
8e21c34c
TD
4644 }
4645
4646 spec->multiout.max_channels = 2;
4647 spec->multiout.num_dacs = 1;
4648 spec->multiout.dac_nids = stac925x_dac_nids;
4649 spec->adc_nids = stac925x_adc_nids;
4650 spec->mux_nids = stac925x_mux_nids;
4651 spec->num_muxes = 1;
9e05b7a3 4652 spec->num_adcs = 1;
a64135a2 4653 spec->num_pwrs = 0;
2c11f955
TD
4654 switch (codec->vendor_id) {
4655 case 0x83847632: /* STAC9202 */
4656 case 0x83847633: /* STAC9202D */
4657 case 0x83847636: /* STAC9251 */
4658 case 0x83847637: /* STAC9251D */
f6e9852a 4659 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4660 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4661 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4662 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4663 break;
4664 default:
4665 spec->num_dmics = 0;
4666 break;
4667 }
8e21c34c
TD
4668
4669 spec->init = stac925x_core_init;
4670 spec->mixer = stac925x_mixer;
4671
4672 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4673 if (!err) {
4674 if (spec->board_config < 0) {
4675 printk(KERN_WARNING "hda_codec: No auto-config is "
4676 "available, default to model=ref\n");
4677 spec->board_config = STAC_925x_REF;
4678 goto again;
4679 }
4680 err = -EINVAL;
4681 }
8e21c34c
TD
4682 if (err < 0) {
4683 stac92xx_free(codec);
4684 return err;
4685 }
4686
4687 codec->patch_ops = stac92xx_patch_ops;
4688
4689 return 0;
4690}
4691
e1f0d669
MR
4692static struct hda_input_mux stac92hd73xx_dmux = {
4693 .num_items = 4,
4694 .items = {
4695 { "Analog Inputs", 0x0b },
e1f0d669
MR
4696 { "Digital Mic 1", 0x09 },
4697 { "Digital Mic 2", 0x0a },
2a9c7816 4698 { "CD", 0x08 },
e1f0d669
MR
4699 }
4700};
4701
4702static int patch_stac92hd73xx(struct hda_codec *codec)
4703{
4704 struct sigmatel_spec *spec;
4705 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4706 int err = 0;
c21ca4a8 4707 int num_dacs;
e1f0d669
MR
4708
4709 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4710 if (spec == NULL)
4711 return -ENOMEM;
4712
4713 codec->spec = spec;
e99d32b3 4714 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4715 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4716 spec->pin_nids = stac92hd73xx_pin_nids;
4717 spec->board_config = snd_hda_check_board_config(codec,
4718 STAC_92HD73XX_MODELS,
4719 stac92hd73xx_models,
4720 stac92hd73xx_cfg_tbl);
4721again:
4722 if (spec->board_config < 0) {
4723 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4724 " STAC92HD73XX, using BIOS defaults\n");
4725 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4726 } else
4727 err = stac_save_pin_cfgs(codec,
4728 stac92hd73xx_brd_tbl[spec->board_config]);
4729 if (err < 0) {
4730 stac92xx_free(codec);
4731 return err;
e1f0d669
MR
4732 }
4733
c21ca4a8 4734 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4735 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4736
c21ca4a8 4737 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4738 printk(KERN_WARNING "hda_codec: Could not determine "
4739 "number of channels defaulting to DAC count\n");
c21ca4a8 4740 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4741 }
c21ca4a8 4742 switch (num_dacs) {
e1f0d669
MR
4743 case 0x3: /* 6 Channel */
4744 spec->mixer = stac92hd73xx_6ch_mixer;
4745 spec->init = stac92hd73xx_6ch_core_init;
4746 break;
4747 case 0x4: /* 8 Channel */
e1f0d669
MR
4748 spec->mixer = stac92hd73xx_8ch_mixer;
4749 spec->init = stac92hd73xx_8ch_core_init;
4750 break;
4751 case 0x5: /* 10 Channel */
e1f0d669
MR
4752 spec->mixer = stac92hd73xx_10ch_mixer;
4753 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4754 }
4755 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4756
e1f0d669
MR
4757 spec->aloopback_mask = 0x01;
4758 spec->aloopback_shift = 8;
4759
1cd2224c 4760 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4761 spec->mux_nids = stac92hd73xx_mux_nids;
4762 spec->adc_nids = stac92hd73xx_adc_nids;
4763 spec->dmic_nids = stac92hd73xx_dmic_nids;
4764 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4765 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4766 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4767 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4768
4769 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4770 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4771 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4772 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4773 sizeof(stac92hd73xx_dmux));
4774
a7662640 4775 switch (spec->board_config) {
6b3ab21e 4776 case STAC_DELL_EQ:
d654a660 4777 spec->init = dell_eq_core_init;
6b3ab21e 4778 /* fallthru */
661cd8fb
TI
4779 case STAC_DELL_M6_AMIC:
4780 case STAC_DELL_M6_DMIC:
4781 case STAC_DELL_M6_BOTH:
2a9c7816 4782 spec->num_smuxes = 0;
2a9c7816
MR
4783 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4784 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4785 spec->eapd_switch = 0;
2a9c7816 4786 spec->num_amps = 1;
6b3ab21e 4787
c21ca4a8 4788 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4789 spec->init = dell_m6_core_init;
661cd8fb
TI
4790 switch (spec->board_config) {
4791 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4792 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4793 spec->num_dmics = 0;
2a9c7816 4794 spec->private_dimux.num_items = 1;
a7662640 4795 break;
661cd8fb 4796 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4797 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4798 spec->num_dmics = 1;
2a9c7816 4799 spec->private_dimux.num_items = 2;
a7662640 4800 break;
661cd8fb 4801 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4802 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4803 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4804 spec->num_dmics = 1;
2a9c7816 4805 spec->private_dimux.num_items = 2;
a7662640
MR
4806 break;
4807 }
4808 break;
4809 default:
4810 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4811 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4812 spec->eapd_switch = 1;
a7662640 4813 }
b2c4f4d7
MR
4814 if (spec->board_config > STAC_92HD73XX_REF) {
4815 /* GPIO0 High = Enable EAPD */
4816 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4817 spec->gpio_data = 0x01;
4818 }
2a9c7816 4819 spec->dinput_mux = &spec->private_dimux;
a7662640 4820
a64135a2
MR
4821 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4822 spec->pwr_nids = stac92hd73xx_pwr_nids;
4823
d9737751 4824 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4825
4826 if (!err) {
4827 if (spec->board_config < 0) {
4828 printk(KERN_WARNING "hda_codec: No auto-config is "
4829 "available, default to model=ref\n");
4830 spec->board_config = STAC_92HD73XX_REF;
4831 goto again;
4832 }
4833 err = -EINVAL;
4834 }
4835
4836 if (err < 0) {
4837 stac92xx_free(codec);
4838 return err;
4839 }
4840
9e43f0de
TI
4841 if (spec->board_config == STAC_92HD73XX_NO_JD)
4842 spec->hp_detect = 0;
4843
e1f0d669
MR
4844 codec->patch_ops = stac92xx_patch_ops;
4845
2d34e1b3
TI
4846 codec->proc_widget_hook = stac92hd7x_proc_hook;
4847
e1f0d669
MR
4848 return 0;
4849}
4850
d0513fc6
MR
4851static struct hda_input_mux stac92hd83xxx_dmux = {
4852 .num_items = 3,
4853 .items = {
4854 { "Analog Inputs", 0x03 },
4855 { "Digital Mic 1", 0x04 },
4856 { "Digital Mic 2", 0x05 },
4857 }
4858};
4859
4860static int patch_stac92hd83xxx(struct hda_codec *codec)
4861{
4862 struct sigmatel_spec *spec;
65557f35 4863 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4864 int err;
65557f35 4865 int num_dacs;
d0513fc6
MR
4866
4867 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4868 if (spec == NULL)
4869 return -ENOMEM;
4870
4871 codec->spec = spec;
0ffa9807 4872 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4873 spec->mono_nid = 0x19;
4874 spec->digbeep_nid = 0x21;
4875 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4876 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4877 spec->adc_nids = stac92hd83xxx_adc_nids;
4878 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4879 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4880 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4881 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4882 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4883
65557f35
MR
4884
4885 /* set port 0xe to select the last DAC
4886 */
4887 num_dacs = snd_hda_get_connections(codec, 0x0e,
4888 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4889
4890 snd_hda_codec_write_cache(codec, 0xe, 0,
4891 AC_VERB_SET_CONNECT_SEL, num_dacs);
4892
d0513fc6 4893 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR
4894 spec->mixer = stac92hd83xxx_mixer;
4895 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4896 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4897 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4898 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4899 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4900 spec->dinput_mux = &stac92hd83xxx_dmux;
4901 spec->pin_nids = stac92hd83xxx_pin_nids;
4902 spec->board_config = snd_hda_check_board_config(codec,
4903 STAC_92HD83XXX_MODELS,
4904 stac92hd83xxx_models,
4905 stac92hd83xxx_cfg_tbl);
4906again:
4907 if (spec->board_config < 0) {
4908 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4909 " STAC92HD83XXX, using BIOS defaults\n");
4910 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4911 } else
4912 err = stac_save_pin_cfgs(codec,
4913 stac92hd83xxx_brd_tbl[spec->board_config]);
4914 if (err < 0) {
4915 stac92xx_free(codec);
4916 return err;
d0513fc6
MR
4917 }
4918
32ed3f46
MR
4919 switch (codec->vendor_id) {
4920 case 0x111d7604:
4921 case 0x111d7605:
4922 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4923 break;
4924 spec->num_pwrs = 0;
4925 break;
4926 }
4927
d0513fc6
MR
4928 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4929 if (!err) {
4930 if (spec->board_config < 0) {
4931 printk(KERN_WARNING "hda_codec: No auto-config is "
4932 "available, default to model=ref\n");
4933 spec->board_config = STAC_92HD83XXX_REF;
4934 goto again;
4935 }
4936 err = -EINVAL;
4937 }
4938
4939 if (err < 0) {
4940 stac92xx_free(codec);
4941 return err;
4942 }
4943
4944 codec->patch_ops = stac92xx_patch_ops;
4945
2d34e1b3
TI
4946 codec->proc_widget_hook = stac92hd_proc_hook;
4947
d0513fc6
MR
4948 return 0;
4949}
4950
6df703ae
HRK
4951static struct hda_input_mux stac92hd71bxx_dmux_nomixer = {
4952 .num_items = 3,
4953 .items = {
4954 { "Analog Inputs", 0x00 },
4955 { "Digital Mic 1", 0x02 },
4956 { "Digital Mic 2", 0x03 },
4957 }
4958};
4959
4960static struct hda_input_mux stac92hd71bxx_dmux_amixer = {
4b33c767
MR
4961 .num_items = 4,
4962 .items = {
4963 { "Analog Inputs", 0x00 },
4964 { "Mixer", 0x01 },
4965 { "Digital Mic 1", 0x02 },
4966 { "Digital Mic 2", 0x03 },
4967 }
4968};
4969
6df703ae
HRK
4970static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
4971 hda_nid_t *nids, int num_nids)
4972{
4973 struct sigmatel_spec *spec = codec->spec;
4974 int idx, num;
4975 unsigned int def_conf;
4976
4977 for (num = 0; num < num_nids; num++) {
4978 for (idx = 0; idx < spec->num_pins; idx++)
4979 if (spec->pin_nids[idx] == nids[num])
4980 break;
4981 if (idx >= spec->num_pins)
4982 break;
4983 def_conf = get_defcfg_connect(spec->pin_configs[idx]);
4984 if (def_conf == AC_JACK_PORT_NONE)
4985 break;
4986 }
4987 return num;
4988}
4989
4990static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
4991 hda_nid_t dig0pin)
4992{
4993 struct sigmatel_spec *spec = codec->spec;
4994 int idx;
4995
4996 for (idx = 0; idx < spec->num_pins; idx++)
4997 if (spec->pin_nids[idx] == dig0pin)
4998 break;
4999 if ((idx + 2) >= spec->num_pins)
5000 return 0;
5001
5002 /* dig1pin case */
5003 if (get_defcfg_connect(spec->pin_configs[idx+1]) != AC_JACK_PORT_NONE)
5004 return 2;
5005
5006 /* dig0pin + dig2pin case */
5007 if (get_defcfg_connect(spec->pin_configs[idx+2]) != AC_JACK_PORT_NONE)
5008 return 2;
5009 if (get_defcfg_connect(spec->pin_configs[idx]) != AC_JACK_PORT_NONE)
5010 return 1;
5011 else
5012 return 0;
5013}
5014
e035b841
MR
5015static int patch_stac92hd71bxx(struct hda_codec *codec)
5016{
5017 struct sigmatel_spec *spec;
ca8d33fc 5018 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
e035b841 5019 int err = 0;
6df703ae 5020 unsigned int ndmic_nids = 0;
e035b841
MR
5021
5022 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5023 if (spec == NULL)
5024 return -ENOMEM;
5025
5026 codec->spec = spec;
8daaaa97 5027 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
5028 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5029 switch (codec->vendor_id) {
5030 case 0x111d76b6:
5031 case 0x111d76b7:
5032 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5033 break;
5034 case 0x111d7603:
5035 case 0x111d7608:
5036 /* On 92HD75Bx 0x27 isn't a pin nid */
5037 spec->num_pins--;
5038 /* fallthrough */
5039 default:
5040 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5041 }
aafc4412 5042 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5043 spec->board_config = snd_hda_check_board_config(codec,
5044 STAC_92HD71BXX_MODELS,
5045 stac92hd71bxx_models,
5046 stac92hd71bxx_cfg_tbl);
5047again:
5048 if (spec->board_config < 0) {
5049 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5050 " STAC92HD71BXX, using BIOS defaults\n");
5051 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5052 } else
5053 err = stac_save_pin_cfgs(codec,
5054 stac92hd71bxx_brd_tbl[spec->board_config]);
5055 if (err < 0) {
5056 stac92xx_free(codec);
5057 return err;
e035b841
MR
5058 }
5059
41c3b648
TI
5060 if (spec->board_config > STAC_92HD71BXX_REF) {
5061 /* GPIO0 = EAPD */
5062 spec->gpio_mask = 0x01;
5063 spec->gpio_dir = 0x01;
5064 spec->gpio_data = 0x01;
5065 }
5066
6df703ae
HRK
5067 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5068 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5069
541eee87
MR
5070 switch (codec->vendor_id) {
5071 case 0x111d76b6: /* 4 Port without Analog Mixer */
5072 case 0x111d76b7:
5073 case 0x111d76b4: /* 6 Port without Analog Mixer */
5074 case 0x111d76b5:
6df703ae
HRK
5075 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_nomixer,
5076 sizeof(stac92hd71bxx_dmux_nomixer));
541eee87
MR
5077 spec->mixer = stac92hd71bxx_mixer;
5078 spec->init = stac92hd71bxx_core_init;
0ffa9807 5079 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5080 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5081 stac92hd71bxx_dmic_nids,
5082 STAC92HD71BXX_NUM_DMICS);
5083 if (spec->num_dmics) {
5084 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5085 spec->dinput_mux = &spec->private_dimux;
5086 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
5087 }
541eee87 5088 break;
aafc4412 5089 case 0x111d7608: /* 5 Port with Analog Mixer */
6df703ae
HRK
5090 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
5091 sizeof(stac92hd71bxx_dmux_amixer));
5092 spec->private_dimux.num_items--;
8e5f262b
TI
5093 switch (spec->board_config) {
5094 case STAC_HP_M4:
72474be6 5095 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
5096 err = stac_add_event(spec, codec->afg,
5097 STAC_VREF_EVENT, 0x02);
5098 if (err < 0)
5099 return err;
c5d08bb5 5100 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5101 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5102 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5103 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5104 AC_USRSP_EN | err);
72474be6
MR
5105 spec->gpio_mask |= 0x02;
5106 break;
5107 }
8daaaa97 5108 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5109 (codec->revision_id & 0xf) == 1)
8daaaa97 5110 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5111
aafc4412
MR
5112 /* no output amps */
5113 spec->num_pwrs = 0;
5114 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 5115 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
5116
5117 /* disable VSW */
5118 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
ca8d33fc 5119 unmute_init++;
616f89e7
HRK
5120 stac_change_pin_config(codec, 0x0f, 0x40f000f0);
5121 stac_change_pin_config(codec, 0x19, 0x40f000f3);
6df703ae
HRK
5122 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
5123 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5124 stac92hd71bxx_dmic_nids,
5125 STAC92HD71BXX_NUM_DMICS - 1);
5126 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5127 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 2;
aafc4412
MR
5128 break;
5129 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5130 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5131 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5132
aafc4412
MR
5133 /* no output amps */
5134 spec->num_pwrs = 0;
5135 /* fallthru */
541eee87 5136 default:
6df703ae
HRK
5137 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
5138 sizeof(stac92hd71bxx_dmux_amixer));
4b33c767 5139 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
5140 spec->mixer = stac92hd71bxx_analog_mixer;
5141 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 5142 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5143 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5144 stac92hd71bxx_dmic_nids,
5145 STAC92HD71BXX_NUM_DMICS);
5146 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5147 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
541eee87
MR
5148 }
5149
ca8d33fc
MR
5150 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5151 snd_hda_sequence_write_cache(codec, unmute_init);
5152
4b33c767 5153 spec->aloopback_mask = 0x50;
541eee87
MR
5154 spec->aloopback_shift = 0;
5155
8daaaa97 5156 spec->powerdown_adcs = 1;
1cd2224c 5157 spec->digbeep_nid = 0x26;
e035b841
MR
5158 spec->mux_nids = stac92hd71bxx_mux_nids;
5159 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5160 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5161 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5162
5163 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5164 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
6df703ae 5165 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5166
6a14f585
MR
5167 switch (spec->board_config) {
5168 case STAC_HP_M4:
6a14f585 5169 /* enable internal microphone */
af9f341a 5170 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
5171 stac92xx_auto_set_pinctl(codec, 0x0e,
5172 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5173 /* fallthru */
5174 case STAC_DELL_M4_2:
5175 spec->num_dmics = 0;
5176 spec->num_smuxes = 0;
5177 spec->num_dmuxes = 0;
5178 break;
5179 case STAC_DELL_M4_1:
5180 case STAC_DELL_M4_3:
5181 spec->num_dmics = 1;
5182 spec->num_smuxes = 0;
5183 spec->num_dmuxes = 0;
6a14f585 5184 break;
6a14f585
MR
5185 };
5186
c21ca4a8 5187 spec->multiout.dac_nids = spec->dac_nids;
4b33c767 5188 if (spec->dinput_mux)
6df703ae 5189 spec->private_dimux.num_items += spec->num_dmics - ndmic_nids;
e035b841 5190
29d4ab4d 5191 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR
5192 if (!err) {
5193 if (spec->board_config < 0) {
5194 printk(KERN_WARNING "hda_codec: No auto-config is "
5195 "available, default to model=ref\n");
5196 spec->board_config = STAC_92HD71BXX_REF;
5197 goto again;
5198 }
5199 err = -EINVAL;
5200 }
5201
5202 if (err < 0) {
5203 stac92xx_free(codec);
5204 return err;
5205 }
5206
2d34e1b3
TI
5207 codec->proc_widget_hook = stac92hd7x_proc_hook;
5208
e035b841
MR
5209 return 0;
5210};
5211
2f2f4251
M
5212static int patch_stac922x(struct hda_codec *codec)
5213{
5214 struct sigmatel_spec *spec;
c7d4b2fa 5215 int err;
2f2f4251 5216
e560d8d8 5217 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5218 if (spec == NULL)
5219 return -ENOMEM;
5220
5221 codec->spec = spec;
a4eed138 5222 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5223 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5224 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5225 stac922x_models,
5226 stac922x_cfg_tbl);
536319af 5227 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5228 spec->gpio_mask = spec->gpio_dir = 0x03;
5229 spec->gpio_data = 0x03;
3fc24d85
TI
5230 /* Intel Macs have all same PCI SSID, so we need to check
5231 * codec SSID to distinguish the exact models
5232 */
6f0778d8 5233 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5234 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5235
5236 case 0x106b0800:
5237 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5238 break;
5d5d3bc3
IZ
5239 case 0x106b0600:
5240 case 0x106b0700:
5241 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5242 break;
5d5d3bc3
IZ
5243 case 0x106b0e00:
5244 case 0x106b0f00:
5245 case 0x106b1600:
5246 case 0x106b1700:
5247 case 0x106b0200:
5248 case 0x106b1e00:
5249 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5250 break;
5d5d3bc3
IZ
5251 case 0x106b1a00:
5252 case 0x00000100:
5253 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5254 break;
5d5d3bc3
IZ
5255 case 0x106b0a00:
5256 case 0x106b2200:
5257 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5258 break;
536319af
NB
5259 default:
5260 spec->board_config = STAC_INTEL_MAC_V3;
5261 break;
3fc24d85
TI
5262 }
5263 }
5264
9e507abd 5265 again:
11b44bbd
RF
5266 if (spec->board_config < 0) {
5267 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5268 "using BIOS defaults\n");
5269 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5270 } else
5271 err = stac_save_pin_cfgs(codec,
5272 stac922x_brd_tbl[spec->board_config]);
5273 if (err < 0) {
5274 stac92xx_free(codec);
5275 return err;
403d1944 5276 }
2f2f4251 5277
c7d4b2fa
M
5278 spec->adc_nids = stac922x_adc_nids;
5279 spec->mux_nids = stac922x_mux_nids;
2549413e 5280 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5281 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5282 spec->num_dmics = 0;
a64135a2 5283 spec->num_pwrs = 0;
c7d4b2fa
M
5284
5285 spec->init = stac922x_core_init;
2f2f4251 5286 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5287
5288 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5289
3cc08dc6 5290 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5291 if (!err) {
5292 if (spec->board_config < 0) {
5293 printk(KERN_WARNING "hda_codec: No auto-config is "
5294 "available, default to model=ref\n");
5295 spec->board_config = STAC_D945_REF;
5296 goto again;
5297 }
5298 err = -EINVAL;
5299 }
3cc08dc6
MP
5300 if (err < 0) {
5301 stac92xx_free(codec);
5302 return err;
5303 }
5304
5305 codec->patch_ops = stac92xx_patch_ops;
5306
807a4636
TI
5307 /* Fix Mux capture level; max to 2 */
5308 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5309 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5310 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5311 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5312 (0 << AC_AMPCAP_MUTE_SHIFT));
5313
3cc08dc6
MP
5314 return 0;
5315}
5316
5317static int patch_stac927x(struct hda_codec *codec)
5318{
5319 struct sigmatel_spec *spec;
5320 int err;
5321
5322 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5323 if (spec == NULL)
5324 return -ENOMEM;
5325
5326 codec->spec = spec;
45c1d85b 5327 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5328 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5329 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5330 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5331 stac927x_models,
5332 stac927x_cfg_tbl);
9e507abd 5333 again:
8e9068b1
MR
5334 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5335 if (spec->board_config < 0)
5336 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5337 "STAC927x, using BIOS defaults\n");
11b44bbd 5338 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5339 } else
5340 err = stac_save_pin_cfgs(codec,
5341 stac927x_brd_tbl[spec->board_config]);
5342 if (err < 0) {
5343 stac92xx_free(codec);
5344 return err;
3cc08dc6
MP
5345 }
5346
1cd2224c 5347 spec->digbeep_nid = 0x23;
8e9068b1
MR
5348 spec->adc_nids = stac927x_adc_nids;
5349 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5350 spec->mux_nids = stac927x_mux_nids;
5351 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5352 spec->smux_nids = stac927x_smux_nids;
5353 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5354 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5355 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5356 spec->multiout.dac_nids = spec->dac_nids;
5357
81d3dbde 5358 switch (spec->board_config) {
93ed1503 5359 case STAC_D965_3ST:
93ed1503 5360 case STAC_D965_5ST:
8e9068b1 5361 /* GPIO0 High = Enable EAPD */
0fc9dec4 5362 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5363 spec->gpio_data = 0x01;
8e9068b1
MR
5364 spec->num_dmics = 0;
5365
93ed1503 5366 spec->init = d965_core_init;
9e05b7a3 5367 spec->mixer = stac927x_mixer;
81d3dbde 5368 break;
8e9068b1 5369 case STAC_DELL_BIOS:
780c8be4
MR
5370 switch (codec->subsystem_id) {
5371 case 0x10280209:
5372 case 0x1028022e:
5373 /* correct the device field to SPDIF out */
af9f341a 5374 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5375 break;
5376 };
03d7ca17 5377 /* configure the analog microphone on some laptops */
af9f341a 5378 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5379 /* correct the front output jack as a hp out */
af9f341a 5380 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5381 /* correct the front input jack as a mic */
af9f341a 5382 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5383 /* fallthru */
8e9068b1
MR
5384 case STAC_DELL_3ST:
5385 /* GPIO2 High = Enable EAPD */
0fc9dec4 5386 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5387 spec->gpio_data = 0x04;
7f16859a
MR
5388 spec->dmic_nids = stac927x_dmic_nids;
5389 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5390
8e9068b1
MR
5391 spec->init = d965_core_init;
5392 spec->mixer = stac927x_mixer;
5393 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5394 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5395 break;
5396 default:
b2c4f4d7
MR
5397 if (spec->board_config > STAC_D965_REF) {
5398 /* GPIO0 High = Enable EAPD */
5399 spec->eapd_mask = spec->gpio_mask = 0x01;
5400 spec->gpio_dir = spec->gpio_data = 0x01;
5401 }
8e9068b1
MR
5402 spec->num_dmics = 0;
5403
5404 spec->init = stac927x_core_init;
5405 spec->mixer = stac927x_mixer;
7f16859a
MR
5406 }
5407
a64135a2 5408 spec->num_pwrs = 0;
e1f0d669
MR
5409 spec->aloopback_mask = 0x40;
5410 spec->aloopback_shift = 0;
c0cea0d0 5411 spec->eapd_switch = 1;
8e9068b1 5412
3cc08dc6 5413 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5414 if (!err) {
5415 if (spec->board_config < 0) {
5416 printk(KERN_WARNING "hda_codec: No auto-config is "
5417 "available, default to model=ref\n");
5418 spec->board_config = STAC_D965_REF;
5419 goto again;
5420 }
5421 err = -EINVAL;
5422 }
c7d4b2fa
M
5423 if (err < 0) {
5424 stac92xx_free(codec);
5425 return err;
5426 }
2f2f4251
M
5427
5428 codec->patch_ops = stac92xx_patch_ops;
5429
2d34e1b3
TI
5430 codec->proc_widget_hook = stac927x_proc_hook;
5431
52987656
TI
5432 /*
5433 * !!FIXME!!
5434 * The STAC927x seem to require fairly long delays for certain
5435 * command sequences. With too short delays (even if the answer
5436 * is set to RIRB properly), it results in the silence output
5437 * on some hardwares like Dell.
5438 *
5439 * The below flag enables the longer delay (see get_response
5440 * in hda_intel.c).
5441 */
5442 codec->bus->needs_damn_long_delay = 1;
5443
e28d8322
TI
5444 /* no jack detecion for ref-no-jd model */
5445 if (spec->board_config == STAC_D965_REF_NO_JD)
5446 spec->hp_detect = 0;
5447
2f2f4251
M
5448 return 0;
5449}
5450
f3302a59
MP
5451static int patch_stac9205(struct hda_codec *codec)
5452{
5453 struct sigmatel_spec *spec;
8259980e 5454 int err;
f3302a59
MP
5455
5456 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5457 if (spec == NULL)
5458 return -ENOMEM;
5459
5460 codec->spec = spec;
a4eed138 5461 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5462 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5463 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5464 stac9205_models,
5465 stac9205_cfg_tbl);
9e507abd 5466 again:
11b44bbd
RF
5467 if (spec->board_config < 0) {
5468 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5469 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5470 } else
5471 err = stac_save_pin_cfgs(codec,
5472 stac9205_brd_tbl[spec->board_config]);
5473 if (err < 0) {
5474 stac92xx_free(codec);
5475 return err;
f3302a59
MP
5476 }
5477
1cd2224c 5478 spec->digbeep_nid = 0x23;
f3302a59 5479 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5480 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5481 spec->mux_nids = stac9205_mux_nids;
2549413e 5482 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5483 spec->smux_nids = stac9205_smux_nids;
5484 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5485 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5486 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5487 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5488 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5489 spec->num_pwrs = 0;
f3302a59
MP
5490
5491 spec->init = stac9205_core_init;
5492 spec->mixer = stac9205_mixer;
5493
e1f0d669
MR
5494 spec->aloopback_mask = 0x40;
5495 spec->aloopback_shift = 0;
d9a4268e
TI
5496 /* Turn on/off EAPD per HP plugging */
5497 if (spec->board_config != STAC_9205_EAPD)
5498 spec->eapd_switch = 1;
f3302a59 5499 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5500
ae0a8ed8 5501 switch (spec->board_config){
ae0a8ed8 5502 case STAC_9205_DELL_M43:
87d48363 5503 /* Enable SPDIF in/out */
af9f341a
TI
5504 stac_change_pin_config(codec, 0x1f, 0x01441030);
5505 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5506
4fe5195c 5507 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5508 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5509 if (err < 0)
5510 return err;
c5d08bb5 5511 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5512 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5513 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5514 AC_VERB_SET_UNSOLICITED_ENABLE,
5515 AC_USRSP_EN | err);
4fe5195c
MR
5516
5517 spec->gpio_dir = 0x0b;
0fc9dec4 5518 spec->eapd_mask = 0x01;
4fe5195c
MR
5519 spec->gpio_mask = 0x1b;
5520 spec->gpio_mute = 0x10;
e2e7d624 5521 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5522 * GPIO3 Low = DRM
87d48363 5523 */
4fe5195c 5524 spec->gpio_data = 0x01;
ae0a8ed8 5525 break;
b2c4f4d7
MR
5526 case STAC_9205_REF:
5527 /* SPDIF-In enabled */
5528 break;
ae0a8ed8
TD
5529 default:
5530 /* GPIO0 High = EAPD */
0fc9dec4 5531 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5532 spec->gpio_data = 0x01;
ae0a8ed8
TD
5533 break;
5534 }
33382403 5535
f3302a59 5536 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5537 if (!err) {
5538 if (spec->board_config < 0) {
5539 printk(KERN_WARNING "hda_codec: No auto-config is "
5540 "available, default to model=ref\n");
5541 spec->board_config = STAC_9205_REF;
5542 goto again;
5543 }
5544 err = -EINVAL;
5545 }
f3302a59
MP
5546 if (err < 0) {
5547 stac92xx_free(codec);
5548 return err;
5549 }
5550
5551 codec->patch_ops = stac92xx_patch_ops;
5552
2d34e1b3
TI
5553 codec->proc_widget_hook = stac9205_proc_hook;
5554
f3302a59
MP
5555 return 0;
5556}
5557
db064e50 5558/*
6d859065 5559 * STAC9872 hack
db064e50
TI
5560 */
5561
1e137f92 5562static struct hda_verb stac9872_core_init[] = {
1624cb9a 5563 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5564 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5565 {}
5566};
5567
caa10b6e
TI
5568static struct snd_kcontrol_new stac9872_mixer[] = {
5569 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5570 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
caa10b6e
TI
5571 { } /* end */
5572};
5573
5574static hda_nid_t stac9872_pin_nids[] = {
5575 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5576 0x11, 0x13, 0x14,
5577};
5578
5579static hda_nid_t stac9872_adc_nids[] = {
5580 0x8 /*,0x6*/
5581};
5582
5583static hda_nid_t stac9872_mux_nids[] = {
5584 0x15
5585};
5586
6d859065 5587static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5588{
5589 struct sigmatel_spec *spec;
1e137f92 5590 int err;
db064e50 5591
db064e50
TI
5592 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5593 if (spec == NULL)
5594 return -ENOMEM;
db064e50 5595 codec->spec = spec;
caa10b6e 5596
1e137f92 5597#if 0 /* no model right now */
caa10b6e
TI
5598 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5599 stac9872_models,
5600 stac9872_cfg_tbl);
1e137f92 5601#endif
db064e50 5602
1e137f92
TI
5603 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5604 spec->pin_nids = stac9872_pin_nids;
5605 spec->multiout.dac_nids = spec->dac_nids;
5606 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5607 spec->adc_nids = stac9872_adc_nids;
5608 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5609 spec->mux_nids = stac9872_mux_nids;
5610 spec->mixer = stac9872_mixer;
5611 spec->init = stac9872_core_init;
5612
5613 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5614 if (err < 0) {
5615 stac92xx_free(codec);
5616 return -EINVAL;
5617 }
5618 spec->input_mux = &spec->private_imux;
5619 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
5620 return 0;
5621}
5622
5623
2f2f4251
M
5624/*
5625 * patch entries
5626 */
1289e9e8 5627static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5628 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5629 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5630 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5631 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5632 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5633 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5634 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5635 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5636 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5637 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5638 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5639 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5640 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5641 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5642 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5643 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5644 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5645 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5646 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5647 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5648 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5649 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5650 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5651 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5652 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5653 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5654 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5655 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5656 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5657 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5658 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5659 /* The following does not take into account .id=0x83847661 when subsys =
5660 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5661 * currently not fully supported.
5662 */
5663 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5664 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5665 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5666 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5667 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5668 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5669 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5670 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5671 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5672 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5673 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5674 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5675 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5676 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5677 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5678 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5679 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5680 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5681 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5682 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5683 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5684 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5685 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5686 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5687 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5688 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5689 {} /* terminator */
5690};
1289e9e8
TI
5691
5692MODULE_ALIAS("snd-hda-codec-id:8384*");
5693MODULE_ALIAS("snd-hda-codec-id:111d*");
5694
5695MODULE_LICENSE("GPL");
5696MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5697
5698static struct hda_codec_preset_list sigmatel_list = {
5699 .preset = snd_hda_preset_sigmatel,
5700 .owner = THIS_MODULE,
5701};
5702
5703static int __init patch_sigmatel_init(void)
5704{
5705 return snd_hda_add_codec_preset(&sigmatel_list);
5706}
5707
5708static void __exit patch_sigmatel_exit(void)
5709{
5710 snd_hda_delete_codec_preset(&sigmatel_list);
5711}
5712
5713module_init(patch_sigmatel_init)
5714module_exit(patch_sigmatel_exit)
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