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[ALSA] ice1712 - Fix hoontech MIDI input
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
bf277785 42 STAC_9200_OQO,
dfe495d0
TI		 43 STAC_9200_DELL_D21,
44 STAC_9200_DELL_D22,
45 STAC_9200_DELL_D23,
46 STAC_9200_DELL_M21,
47 STAC_9200_DELL_M22,
48 STAC_9200_DELL_M23,
49 STAC_9200_DELL_M24,
50 STAC_9200_DELL_M25,
51 STAC_9200_DELL_M26,
52 STAC_9200_DELL_M27,
1194b5b7 53 STAC_9200_GATEWAY,
f5fcc13c
TI		 54 STAC_9200_MODELS
55};
56
57enum {
58 STAC_9205_REF,
dfe495d0 59 STAC_9205_DELL_M42,
ae0a8ed8
TD		 60 STAC_9205_DELL_M43,
61 STAC_9205_DELL_M44,
f5fcc13c
TI		 62 STAC_9205_MODELS
63};
64
e1f0d669
MR		 65enum {
66 STAC_92HD73XX_REF,
67 STAC_92HD73XX_MODELS
68};
69
e035b841
MR		 70enum {
71 STAC_92HD71BXX_REF,
72 STAC_92HD71BXX_MODELS
73};
74
8e21c34c
TD		 75enum {
76 STAC_925x_REF,
77 STAC_M2_2,
78 STAC_MA6,
2c11f955 79 STAC_PA6,
8e21c34c
TD		 80 STAC_925x_MODELS
81};
82
f5fcc13c
TI		 83enum {
84 STAC_D945_REF,
85 STAC_D945GTP3,
86 STAC_D945GTP5,
5d5d3bc3
IZ		 87 STAC_INTEL_MAC_V1,
88 STAC_INTEL_MAC_V2,
89 STAC_INTEL_MAC_V3,
90 STAC_INTEL_MAC_V4,
91 STAC_INTEL_MAC_V5,
dfe495d0 92 /* for backward compatibility */
f5fcc13c 93 STAC_MACMINI,
3fc24d85 94 STAC_MACBOOK,
6f0778d8
NB		 95 STAC_MACBOOK_PRO_V1,
96 STAC_MACBOOK_PRO_V2,
f16928fb 97 STAC_IMAC_INTEL,
0dae0f83 98 STAC_IMAC_INTEL_20,
dfe495d0
TI		 99 STAC_922X_DELL_D81,
100 STAC_922X_DELL_D82,
101 STAC_922X_DELL_M81,
102 STAC_922X_DELL_M82,
f5fcc13c
TI		 103 STAC_922X_MODELS
104};
105
106enum {
107 STAC_D965_REF,
108 STAC_D965_3ST,
109 STAC_D965_5ST,
4ff076e5 110 STAC_DELL_3ST,
8e9068b1 111 STAC_DELL_BIOS,
f5fcc13c
TI		 112 STAC_927X_MODELS
113};
403d1944 114
2f2f4251 115struct sigmatel_spec {
c8b6bf9b 116 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 117 unsigned int num_mixers;
118
403d1944 119 int board_config;
c7d4b2fa 120 unsigned int surr_switch: 1;
403d1944
MP		 121 unsigned int line_switch: 1;
122 unsigned int mic_switch: 1;
3cc08dc6 123 unsigned int alt_switch: 1;
82bc955f 124 unsigned int hp_detect: 1;
c7d4b2fa 125
4fe5195c
MR		 126 /* gpio lines */
127 unsigned int gpio_mask;
128 unsigned int gpio_dir;
129 unsigned int gpio_data;
130 unsigned int gpio_mute;
131
132 /* analog loopback */
e1f0d669
MR		 133 unsigned char aloopback_mask;
134 unsigned char aloopback_shift;
8259980e 135
a64135a2
MR		 136 /* power management */
137 unsigned int num_pwrs;
138 hda_nid_t *pwr_nids;
139
2f2f4251 140 /* playback */
b22b4821
MR		 141 struct hda_input_mux *mono_mux;
142 unsigned int cur_mmux;
2f2f4251 143 struct hda_multi_out multiout;
3cc08dc6 144 hda_nid_t dac_nids[5];
2f2f4251
M		 145
146 /* capture */
147 hda_nid_t *adc_nids;
2f2f4251 148 unsigned int num_adcs;
dabbed6f
M		 149 hda_nid_t *mux_nids;
150 unsigned int num_muxes;
8b65727b
MP		 151 hda_nid_t *dmic_nids;
152 unsigned int num_dmics;
e1f0d669 153 hda_nid_t *dmux_nids;
1697055e 154 unsigned int num_dmuxes;
dabbed6f 155 hda_nid_t dig_in_nid;
b22b4821 156 hda_nid_t mono_nid;
2f2f4251 157
2f2f4251
M		 158 /* pin widgets */
159 hda_nid_t *pin_nids;
160 unsigned int num_pins;
2f2f4251 161 unsigned int *pin_configs;
11b44bbd 162 unsigned int *bios_pin_configs;
2f2f4251
M		 163
164 /* codec specific stuff */
165 struct hda_verb *init;
c8b6bf9b 166 struct snd_kcontrol_new *mixer;
2f2f4251
M		 167
168 /* capture source */
8b65727b 169 struct hda_input_mux *dinput_mux;
e1f0d669 170 unsigned int cur_dmux[2];
c7d4b2fa 171 struct hda_input_mux *input_mux;
3cc08dc6 172 unsigned int cur_mux[3];
2f2f4251 173
403d1944
MP		 174 /* i/o switches */
175 unsigned int io_switch[2];
0fb87bb4 176 unsigned int clfe_swap;
5f10c4a9 177 unsigned int aloopback;
2f2f4251 178
c7d4b2fa
M		 179 struct hda_pcm pcm_rec[2]; /* PCM information */
180
181 /* dynamic controls and input_mux */
182 struct auto_pin_cfg autocfg;
183 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 184 struct snd_kcontrol_new *kctl_alloc;
8b65727b 185 struct hda_input_mux private_dimux;
c7d4b2fa 186 struct hda_input_mux private_imux;
b22b4821 187 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 188
189 /* virtual master */
190 unsigned int vmaster_tlv[4];
2f2f4251
M		 191};
192
193static hda_nid_t stac9200_adc_nids[1] = {
194 0x03,
195};
196
197static hda_nid_t stac9200_mux_nids[1] = {
198 0x0c,
199};
200
201static hda_nid_t stac9200_dac_nids[1] = {
202 0x02,
203};
204
a64135a2
MR		 205static hda_nid_t stac92hd73xx_pwr_nids[8] = {
206 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
207 0x0f, 0x10, 0x11
208};
209
e1f0d669
MR		 210static hda_nid_t stac92hd73xx_adc_nids[2] = {
211 0x1a, 0x1b
212};
213
214#define STAC92HD73XX_NUM_DMICS 2
215static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
216 0x13, 0x14, 0
217};
218
219#define STAC92HD73_DAC_COUNT 5
220static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
221 0x15, 0x16, 0x17, 0x18, 0x19,
222};
223
224static hda_nid_t stac92hd73xx_mux_nids[4] = {
225 0x28, 0x29, 0x2a, 0x2b,
226};
227
228static hda_nid_t stac92hd73xx_dmux_nids[2] = {
229 0x20, 0x21,
230};
231
a64135a2
MR		 232static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
233 0x0a, 0x0d, 0x0f
234};
235
e035b841
MR		 236static hda_nid_t stac92hd71bxx_adc_nids[2] = {
237 0x12, 0x13,
238};
239
240static hda_nid_t stac92hd71bxx_mux_nids[2] = {
241 0x1a, 0x1b
242};
243
e1f0d669
MR		 244static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
245 0x1c,
246};
247
e035b841
MR		 248static hda_nid_t stac92hd71bxx_dac_nids[2] = {
249 0x10, /*0x11, */
250};
251
252#define STAC92HD71BXX_NUM_DMICS 2
253static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
254 0x18, 0x19, 0
255};
256
8e21c34c
TD		 257static hda_nid_t stac925x_adc_nids[1] = {
258 0x03,
259};
260
261static hda_nid_t stac925x_mux_nids[1] = {
262 0x0f,
263};
264
265static hda_nid_t stac925x_dac_nids[1] = {
266 0x02,
267};
268
f6e9852a
TI		 269#define STAC925X_NUM_DMICS 1
270static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
271 0x15, 0
2c11f955
TD		 272};
273
1697055e
TI		 274static hda_nid_t stac925x_dmux_nids[1] = {
275 0x14,
276};
277
2f2f4251
M		 278static hda_nid_t stac922x_adc_nids[2] = {
279 0x06, 0x07,
280};
281
282static hda_nid_t stac922x_mux_nids[2] = {
283 0x12, 0x13,
284};
285
3cc08dc6
MP		 286static hda_nid_t stac927x_adc_nids[3] = {
287 0x07, 0x08, 0x09
288};
289
290static hda_nid_t stac927x_mux_nids[3] = {
291 0x15, 0x16, 0x17
292};
293
e1f0d669
MR		 294static hda_nid_t stac927x_dmux_nids[1] = {
295 0x1b,
296};
297
7f16859a
MR		 298#define STAC927X_NUM_DMICS 2
299static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
300 0x13, 0x14, 0
301};
302
f3302a59
MP		 303static hda_nid_t stac9205_adc_nids[2] = {
304 0x12, 0x13
305};
306
307static hda_nid_t stac9205_mux_nids[2] = {
308 0x19, 0x1a
309};
310
e1f0d669 311static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 312 0x1d,
e1f0d669
MR		 313};
314
f6e9852a
TI		 315#define STAC9205_NUM_DMICS 2
316static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
317 0x17, 0x18, 0
8b65727b
MP		 318};
319
c7d4b2fa 320static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 321 0x08, 0x09, 0x0d, 0x0e,
322 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 323};
324
8e21c34c
TD		 325static hda_nid_t stac925x_pin_nids[8] = {
326 0x07, 0x08, 0x0a, 0x0b,
327 0x0c, 0x0d, 0x10, 0x11,
328};
329
2f2f4251
M		 330static hda_nid_t stac922x_pin_nids[10] = {
331 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
332 0x0f, 0x10, 0x11, 0x15, 0x1b,
333};
334
e1f0d669
MR		 335static hda_nid_t stac92hd73xx_pin_nids[12] = {
336 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
337 0x0f, 0x10, 0x11, 0x12, 0x13,
338 0x14, 0x22
339};
340
e035b841
MR		 341static hda_nid_t stac92hd71bxx_pin_nids[10] = {
342 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
343 0x0f, 0x14, 0x18, 0x19, 0x1e,
344};
345
3cc08dc6
MP		 346static hda_nid_t stac927x_pin_nids[14] = {
347 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
348 0x0f, 0x10, 0x11, 0x12, 0x13,
349 0x14, 0x21, 0x22, 0x23,
350};
351
f3302a59
MP		 352static hda_nid_t stac9205_pin_nids[12] = {
353 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
354 0x0f, 0x14, 0x16, 0x17, 0x18,
355 0x21, 0x22,
f3302a59
MP		 356};
357
8b65727b
MP		 358static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
359 struct snd_ctl_elem_info *uinfo)
360{
361 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
362 struct sigmatel_spec *spec = codec->spec;
363 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
364}
365
366static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
367 struct snd_ctl_elem_value *ucontrol)
368{
369 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
370 struct sigmatel_spec *spec = codec->spec;
e1f0d669 371 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 372
e1f0d669 373 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 374 return 0;
375}
376
377static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_value *ucontrol)
379{
380 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
381 struct sigmatel_spec *spec = codec->spec;
e1f0d669 382 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 383
384 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 385 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 386}
387
c8b6bf9b 388static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 389{
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 392 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 393}
394
c8b6bf9b 395static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 396{
397 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
398 struct sigmatel_spec *spec = codec->spec;
399 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
400
401 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
402 return 0;
403}
404
c8b6bf9b 405static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 406{
407 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
408 struct sigmatel_spec *spec = codec->spec;
409 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
410
c7d4b2fa 411 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 412 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
413}
414
b22b4821
MR		 415static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
416 struct snd_ctl_elem_info *uinfo)
417{
418 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
419 struct sigmatel_spec *spec = codec->spec;
420 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
421}
422
423static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
424 struct snd_ctl_elem_value *ucontrol)
425{
426 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
427 struct sigmatel_spec *spec = codec->spec;
428
429 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
430 return 0;
431}
432
433static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
434 struct snd_ctl_elem_value *ucontrol)
435{
436 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
437 struct sigmatel_spec *spec = codec->spec;
438
439 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
440 spec->mono_nid, &spec->cur_mmux);
441}
442
5f10c4a9
ML		 443#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
444
445static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
446 struct snd_ctl_elem_value *ucontrol)
447{
448 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 449 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 450 struct sigmatel_spec *spec = codec->spec;
451
e1f0d669
MR		 452 ucontrol->value.integer.value[0] = !!(spec->aloopback &
453 (spec->aloopback_mask << idx));
5f10c4a9
ML		 454 return 0;
455}
456
457static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
458 struct snd_ctl_elem_value *ucontrol)
459{
460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
461 struct sigmatel_spec *spec = codec->spec;
e1f0d669 462 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 463 unsigned int dac_mode;
e1f0d669 464 unsigned int val, idx_val;
5f10c4a9 465
e1f0d669
MR		 466 idx_val = spec->aloopback_mask << idx;
467 if (ucontrol->value.integer.value[0])
468 val = spec->aloopback | idx_val;
469 else
470 val = spec->aloopback & ~idx_val;
68ea7b2f 471 if (spec->aloopback == val)
5f10c4a9
ML		 472 return 0;
473
68ea7b2f 474 spec->aloopback = val;
5f10c4a9 475
e1f0d669
MR		 476 /* Only return the bits defined by the shift value of the
477 * first two bytes of the mask
478 */
5f10c4a9 479 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 480 kcontrol->private_value & 0xFFFF, 0x0);
481 dac_mode >>= spec->aloopback_shift;
5f10c4a9 482
e1f0d669 483 if (spec->aloopback & idx_val) {
5f10c4a9 484 snd_hda_power_up(codec);
e1f0d669 485 dac_mode |= idx_val;
5f10c4a9
ML		 486 } else {
487 snd_hda_power_down(codec);
e1f0d669 488 dac_mode &= ~idx_val;
5f10c4a9
ML		 489 }
490
491 snd_hda_codec_write_cache(codec, codec->afg, 0,
492 kcontrol->private_value >> 16, dac_mode);
493
494 return 1;
495}
496
c7d4b2fa 497static struct hda_verb stac9200_core_init[] = {
2f2f4251 498 /* set dac0mux for dac converter */
c7d4b2fa 499 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 500 {}
501};
502
1194b5b7
TI		 503static struct hda_verb stac9200_eapd_init[] = {
504 /* set dac0mux for dac converter */
505 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
506 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
507 {}
508};
509
e1f0d669
MR		 510static struct hda_verb stac92hd73xx_6ch_core_init[] = {
511 /* set master volume and direct control */
512 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
513 /* setup audio connections */
514 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
515 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
516 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
517 /* setup adcs to point to mixer */
518 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
519 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 520 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
521 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
522 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
523 /* setup import muxs */
524 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
526 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
527 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
528 {}
529};
530
531static struct hda_verb stac92hd73xx_8ch_core_init[] = {
532 /* set master volume and direct control */
533 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
534 /* setup audio connections */
535 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
536 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
537 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
538 /* connect hp ports to dac3 */
539 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
540 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
541 /* setup adcs to point to mixer */
542 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
543 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 544 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
545 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
546 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
547 /* setup import muxs */
548 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
549 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
552 {}
553};
554
555static struct hda_verb stac92hd73xx_10ch_core_init[] = {
556 /* set master volume and direct control */
557 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
558 /* setup audio connections */
559 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
560 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
561 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
562 /* dac3 is connected to import3 mux */
563 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
564 /* connect hp ports to dac4 */
565 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
566 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
567 /* setup adcs to point to mixer */
568 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
569 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 570 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
571 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
572 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
573 /* setup import muxs */
574 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
576 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
577 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
578 {}
579};
580
e035b841 581static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 582 /* set master volume and direct control */
583 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
584 /* connect headphone jack to dac1 */
585 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
586 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
587 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
588 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
589 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
590 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 591};
592
593static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 594 /* set master volume and direct control */
595 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
596 /* connect headphone jack to dac1 */
597 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 598 /* connect ports 0d and 0f to audio mixer */
599 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
600 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 601 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 602 /* unmute dac0 input in audio mixer */
603 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 604 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
605 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
606 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
607 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 608 {}
609};
610
8e21c34c
TD		 611static struct hda_verb stac925x_core_init[] = {
612 /* set dac0mux for dac converter */
613 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
614 {}
615};
616
c7d4b2fa 617static struct hda_verb stac922x_core_init[] = {
2f2f4251 618 /* set master volume and direct control */
c7d4b2fa 619 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 620 {}
621};
622
93ed1503 623static struct hda_verb d965_core_init[] = {
19039bd0 624 /* set master volume and direct control */
93ed1503 625 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 626 /* unmute node 0x1b */
627 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
628 /* select node 0x03 as DAC */
629 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
630 {}
631};
632
3cc08dc6
MP		 633static struct hda_verb stac927x_core_init[] = {
634 /* set master volume and direct control */
635 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
636 {}
637};
638
f3302a59
MP		 639static struct hda_verb stac9205_core_init[] = {
640 /* set master volume and direct control */
641 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
642 {}
643};
644
b22b4821
MR		 645#define STAC_MONO_MUX \
646 { \
647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
648 .name = "Mono Mux", \
649 .count = 1, \
650 .info = stac92xx_mono_mux_enum_info, \
651 .get = stac92xx_mono_mux_enum_get, \
652 .put = stac92xx_mono_mux_enum_put, \
653 }
654
9e05b7a3 655#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 656 { \
657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
658 .name = "Input Source", \
9e05b7a3 659 .count = cnt, \
ca7c5a8b
ML		 660 .info = stac92xx_mux_enum_info, \
661 .get = stac92xx_mux_enum_get, \
662 .put = stac92xx_mux_enum_put, \
663 }
664
e1f0d669 665#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 666 { \
667 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
668 .name = "Analog Loopback", \
e1f0d669 669 .count = cnt, \
5f10c4a9
ML		 670 .info = stac92xx_aloopback_info, \
671 .get = stac92xx_aloopback_get, \
672 .put = stac92xx_aloopback_put, \
673 .private_value = verb_read | (verb_write << 16), \
674 }
675
c8b6bf9b 676static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 677 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
678 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 679 STAC_INPUT_SOURCE(1),
2f2f4251
M		 680 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
681 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 682 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 683 { } /* end */
684};
685
e1f0d669 686static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 687 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
688
e1f0d669
MR		 689 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
690 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
691
692 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
693 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
694
695 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
696 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
697
698 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
699 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
700
701 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
702 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
703
704 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
705 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
706
707 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
708 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
709 { } /* end */
710};
711
712static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 713 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
714
e1f0d669
MR		 715 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
716 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
717
718 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
719 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
720
721 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
722 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
723
724 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
725 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
726
727 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
728 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
729
730 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
731 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
732
733 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
734 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
735 { } /* end */
736};
737
738static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 739 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
740
e1f0d669
MR		 741 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
742 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
743
744 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
745 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
746
747 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
748 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
749
750 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
751 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
752
753 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
754 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
755
756 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
757 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
758
759 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
760 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
761 { } /* end */
762};
763
541eee87 764static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 765 STAC_INPUT_SOURCE(2),
e035b841 766
9b35947f
MR		 767 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
768 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
769 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
770
771 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
772 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
773 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 774
9b35947f
MR		 775 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
776 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 777 { } /* end */
778};
779
541eee87 780static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 781 STAC_INPUT_SOURCE(2),
782 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
783
541eee87
MR		 784 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
785 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
786 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
787
788 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
789 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
790 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
791 { } /* end */
792};
793
8e21c34c 794static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 795 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 796 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
797 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
798 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
799 { } /* end */
800};
801
9e05b7a3 802static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 803 STAC_INPUT_SOURCE(2),
e1f0d669 804 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 805
806 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
807 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
808 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
809
810 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
811 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
812 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
813
2f2f4251
M		 814 { } /* end */
815};
816
19039bd0 817/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 818static struct snd_kcontrol_new stac922x_mixer[] = {
819 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 820 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
821 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
822 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
823
824 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
825 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
826 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 827 { } /* end */
828};
829
9e05b7a3 830
d1d985f0 831static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 832 STAC_INPUT_SOURCE(3),
e1f0d669 833 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 834
9e05b7a3
ML		 835 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
836 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
837 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
838
839 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
840 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
841 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
842
843 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
844 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
845 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 846 { } /* end */
847};
848
1697055e
TI		 849static struct snd_kcontrol_new stac_dmux_mixer = {
850 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
851 .name = "Digital Input Source",
852 /* count set later */
853 .info = stac92xx_dmux_enum_info,
854 .get = stac92xx_dmux_enum_get,
855 .put = stac92xx_dmux_enum_put,
856};
857
2134ea4f
TI		 858static const char *slave_vols[] = {
859 "Front Playback Volume",
860 "Surround Playback Volume",
861 "Center Playback Volume",
862 "LFE Playback Volume",
863 "Side Playback Volume",
864 "Headphone Playback Volume",
865 "Headphone Playback Volume",
866 "Speaker Playback Volume",
867 "External Speaker Playback Volume",
868 "Speaker2 Playback Volume",
869 NULL
870};
871
872static const char *slave_sws[] = {
873 "Front Playback Switch",
874 "Surround Playback Switch",
875 "Center Playback Switch",
876 "LFE Playback Switch",
877 "Side Playback Switch",
878 "Headphone Playback Switch",
879 "Headphone Playback Switch",
880 "Speaker Playback Switch",
881 "External Speaker Playback Switch",
882 "Speaker2 Playback Switch",
edb54a55 883 "IEC958 Playback Switch",
2134ea4f
TI		 884 NULL
885};
886
2f2f4251
M		 887static int stac92xx_build_controls(struct hda_codec *codec)
888{
889 struct sigmatel_spec *spec = codec->spec;
890 int err;
c7d4b2fa 891 int i;
2f2f4251
M		 892
893 err = snd_hda_add_new_ctls(codec, spec->mixer);
894 if (err < 0)
895 return err;
c7d4b2fa
M		 896
897 for (i = 0; i < spec->num_mixers; i++) {
898 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
899 if (err < 0)
900 return err;
901 }
1697055e
TI		 902 if (spec->num_dmuxes > 0) {
903 stac_dmux_mixer.count = spec->num_dmuxes;
904 err = snd_ctl_add(codec->bus->card,
905 snd_ctl_new1(&stac_dmux_mixer, codec));
906 if (err < 0)
907 return err;
908 }
c7d4b2fa 909
dabbed6f
M		 910 if (spec->multiout.dig_out_nid) {
911 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
912 if (err < 0)
913 return err;
914 }
915 if (spec->dig_in_nid) {
916 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
917 if (err < 0)
918 return err;
919 }
2134ea4f
TI		 920
921 /* if we have no master control, let's create it */
922 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
923 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
924 HDA_OUTPUT, spec->vmaster_tlv);
925 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
926 spec->vmaster_tlv, slave_vols);
927 if (err < 0)
928 return err;
929 }
930 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
931 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
932 NULL, slave_sws);
933 if (err < 0)
934 return err;
935 }
936
dabbed6f 937 return 0;
2f2f4251
M		 938}
939
403d1944 940static unsigned int ref9200_pin_configs[8] = {
dabbed6f 941 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 942 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
943};
944
dfe495d0
TI		 945/*
946 STAC 9200 pin configs for
947 102801A8
948 102801DE
949 102801E8
950*/
951static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 952 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
953 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 954};
955
956/*
957 STAC 9200 pin configs for
958 102801C0
959 102801C1
960*/
961static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 962 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
963 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 964};
965
966/*
967 STAC 9200 pin configs for
968 102801C4 (Dell Dimension E310)
969 102801C5
970 102801C7
971 102801D9
972 102801DA
973 102801E3
974*/
975static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 976 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
977 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 978};
979
980
981/*
982 STAC 9200-32 pin configs for
983 102801B5 (Dell Inspiron 630m)
984 102801D8 (Dell Inspiron 640m)
985*/
986static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 987 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
988 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 989};
990
991/*
992 STAC 9200-32 pin configs for
993 102801C2 (Dell Latitude D620)
994 102801C8
995 102801CC (Dell Latitude D820)
996 102801D4
997 102801D6
998*/
999static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1000 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1001 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1002};
1003
1004/*
1005 STAC 9200-32 pin configs for
1006 102801CE (Dell XPS M1710)
1007 102801CF (Dell Precision M90)
1008*/
1009static unsigned int dell9200_m23_pin_configs[8] = {
1010 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1011 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1012};
1013
1014/*
1015 STAC 9200-32 pin configs for
1016 102801C9
1017 102801CA
1018 102801CB (Dell Latitude 120L)
1019 102801D3
1020*/
1021static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1022 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1023 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1024};
1025
1026/*
1027 STAC 9200-32 pin configs for
1028 102801BD (Dell Inspiron E1505n)
1029 102801EE
1030 102801EF
1031*/
1032static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1033 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1034 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1035};
1036
1037/*
1038 STAC 9200-32 pin configs for
1039 102801F5 (Dell Inspiron 1501)
1040 102801F6
1041*/
1042static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1043 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1044 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1045};
1046
1047/*
1048 STAC 9200-32
1049 102801CD (Dell Inspiron E1705/9400)
1050*/
1051static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1052 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1053 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1054};
1055
bf277785
TD		 1056static unsigned int oqo9200_pin_configs[8] = {
1057 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1058 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1059};
1060
dfe495d0 1061
f5fcc13c
TI		 1062static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1063 [STAC_REF] = ref9200_pin_configs,
bf277785 1064 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1065 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1066 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1067 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1068 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1069 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1070 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1071 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1072 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1073 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1074 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1075};
1076
f5fcc13c
TI		 1077static const char *stac9200_models[STAC_9200_MODELS] = {
1078 [STAC_REF] = "ref",
bf277785 1079 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1080 [STAC_9200_DELL_D21] = "dell-d21",
1081 [STAC_9200_DELL_D22] = "dell-d22",
1082 [STAC_9200_DELL_D23] = "dell-d23",
1083 [STAC_9200_DELL_M21] = "dell-m21",
1084 [STAC_9200_DELL_M22] = "dell-m22",
1085 [STAC_9200_DELL_M23] = "dell-m23",
1086 [STAC_9200_DELL_M24] = "dell-m24",
1087 [STAC_9200_DELL_M25] = "dell-m25",
1088 [STAC_9200_DELL_M26] = "dell-m26",
1089 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1090 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1091};
1092
1093static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1094 /* SigmaTel reference board */
1095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1096 "DFI LanParty", STAC_REF),
e7377071 1097 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1099 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1101 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1103 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1105 "unknown Dell", STAC_9200_DELL_D22),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1107 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1109 "Dell Latitude D620", STAC_9200_DELL_M22),
1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1111 "unknown Dell", STAC_9200_DELL_D23),
1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1113 "unknown Dell", STAC_9200_DELL_D23),
1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1115 "unknown Dell", STAC_9200_DELL_M22),
1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1117 "unknown Dell", STAC_9200_DELL_M24),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1119 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1121 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1123 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1125 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1127 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1129 "Dell Precision M90", STAC_9200_DELL_M23),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1131 "unknown Dell", STAC_9200_DELL_M22),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1133 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1135 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1137 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1139 "unknown Dell", STAC_9200_DELL_D23),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1141 "unknown Dell", STAC_9200_DELL_D23),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1143 "unknown Dell", STAC_9200_DELL_D21),
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1145 "unknown Dell", STAC_9200_DELL_D23),
1146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1147 "unknown Dell", STAC_9200_DELL_D21),
1148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1149 "unknown Dell", STAC_9200_DELL_M25),
1150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1151 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1153 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1155 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1156 /* Panasonic */
1157 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1158 /* Gateway machines needs EAPD to be set on resume */
1159 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1160 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1161 STAC_9200_GATEWAY),
1162 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1163 STAC_9200_GATEWAY),
bf277785
TD		 1164 /* OQO Mobile */
1165 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1166 {} /* terminator */
1167};
1168
8e21c34c
TD		 1169static unsigned int ref925x_pin_configs[8] = {
1170 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1171 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1172};
1173
1174static unsigned int stac925x_MA6_pin_configs[8] = {
1175 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1176 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1177};
1178
2c11f955
TD		 1179static unsigned int stac925x_PA6_pin_configs[8] = {
1180 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1181 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1182};
1183
8e21c34c 1184static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1185 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1186 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1187};
1188
1189static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1190 [STAC_REF] = ref925x_pin_configs,
1191 [STAC_M2_2] = stac925xM2_2_pin_configs,
1192 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1193 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1194};
1195
1196static const char *stac925x_models[STAC_925x_MODELS] = {
1197 [STAC_REF] = "ref",
1198 [STAC_M2_2] = "m2-2",
1199 [STAC_MA6] = "m6",
2c11f955 1200 [STAC_PA6] = "pa6",
8e21c34c
TD		 1201};
1202
1203static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1204 /* SigmaTel reference board */
1205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1206 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1207 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1208 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1209 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1210 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1211 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1212 {} /* terminator */
1213};
1214
e1f0d669
MR		 1215static unsigned int ref92hd73xx_pin_configs[12] = {
1216 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1217 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1218 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1219};
1220
1221static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1222 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1223};
1224
1225static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1226 [STAC_92HD73XX_REF] = "ref",
1227};
1228
1229static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1230 /* SigmaTel reference board */
1231 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1232 "DFI LanParty", STAC_92HD73XX_REF),
1233 {} /* terminator */
1234};
1235
e035b841
MR		 1236static unsigned int ref92hd71bxx_pin_configs[10] = {
1237 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1238 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1239 0x90a000f0, 0x01452050,
1240};
1241
1242static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1243 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1244};
1245
1246static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1247 [STAC_92HD71BXX_REF] = "ref",
1248};
1249
1250static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1251 /* SigmaTel reference board */
1252 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1253 "DFI LanParty", STAC_92HD71BXX_REF),
1254 {} /* terminator */
1255};
1256
403d1944
MP		 1257static unsigned int ref922x_pin_configs[10] = {
1258 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1259 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1260 0x40000100, 0x40000100,
1261};
1262
dfe495d0
TI		 1263/*
1264 STAC 922X pin configs for
1265 102801A7
1266 102801AB
1267 102801A9
1268 102801D1
1269 102801D2
1270*/
1271static unsigned int dell_922x_d81_pin_configs[10] = {
1272 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1273 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1274 0x01813122, 0x400001f2,
1275};
1276
1277/*
1278 STAC 922X pin configs for
1279 102801AC
1280 102801D0
1281*/
1282static unsigned int dell_922x_d82_pin_configs[10] = {
1283 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1284 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1285 0x01813122, 0x400001f1,
1286};
1287
1288/*
1289 STAC 922X pin configs for
1290 102801BF
1291*/
1292static unsigned int dell_922x_m81_pin_configs[10] = {
1293 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1294 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1295 0x40C003f1, 0x405003f0,
1296};
1297
1298/*
1299 STAC 9221 A1 pin configs for
1300 102801D7 (Dell XPS M1210)
1301*/
1302static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1303 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1304 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1305 0x508003f3, 0x405003f4,
1306};
1307
403d1944 1308static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1309 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1310 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1311 0x02a19120, 0x40000100,
1312};
1313
1314static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1315 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1316 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1317 0x02a19320, 0x40000100,
1318};
1319
5d5d3bc3
IZ		 1320static unsigned int intel_mac_v1_pin_configs[10] = {
1321 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1322 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1323 0x400000fc, 0x400000fb,
1324};
1325
1326static unsigned int intel_mac_v2_pin_configs[10] = {
1327 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1328 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1329 0x400000fc, 0x400000fb,
6f0778d8
NB		 1330};
1331
5d5d3bc3
IZ		 1332static unsigned int intel_mac_v3_pin_configs[10] = {
1333 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1334 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1335 0x400000fc, 0x400000fb,
1336};
1337
5d5d3bc3
IZ		 1338static unsigned int intel_mac_v4_pin_configs[10] = {
1339 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1340 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1341 0x400000fc, 0x400000fb,
1342};
1343
5d5d3bc3
IZ		 1344static unsigned int intel_mac_v5_pin_configs[10] = {
1345 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1346 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1347 0x400000fc, 0x400000fb,
0dae0f83
TI		 1348};
1349
76c08828 1350
19039bd0 1351static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1352 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1353 [STAC_D945GTP3] = d945gtp3_pin_configs,
1354 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1355 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1356 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1357 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1358 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1359 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1360 /* for backward compatibility */
5d5d3bc3
IZ		 1361 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1362 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1363 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1364 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1365 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1366 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1367 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1368 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1369 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1370 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1371};
1372
f5fcc13c
TI		 1373static const char *stac922x_models[STAC_922X_MODELS] = {
1374 [STAC_D945_REF] = "ref",
1375 [STAC_D945GTP5] = "5stack",
1376 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1377 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1378 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1379 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1380 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1381 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1382 /* for backward compatibility */
f5fcc13c 1383 [STAC_MACMINI] = "macmini",
3fc24d85 1384 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1385 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1386 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1387 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1388 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1389 [STAC_922X_DELL_D81] = "dell-d81",
1390 [STAC_922X_DELL_D82] = "dell-d82",
1391 [STAC_922X_DELL_M81] = "dell-m81",
1392 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1393};
1394
1395static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1396 /* SigmaTel reference board */
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1398 "DFI LanParty", STAC_D945_REF),
1399 /* Intel 945G based systems */
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1401 "Intel D945G", STAC_D945GTP3),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1403 "Intel D945G", STAC_D945GTP3),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1405 "Intel D945G", STAC_D945GTP3),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1407 "Intel D945G", STAC_D945GTP3),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1409 "Intel D945G", STAC_D945GTP3),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1411 "Intel D945G", STAC_D945GTP3),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1413 "Intel D945G", STAC_D945GTP3),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1415 "Intel D945G", STAC_D945GTP3),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1417 "Intel D945G", STAC_D945GTP3),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1419 "Intel D945G", STAC_D945GTP3),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1421 "Intel D945G", STAC_D945GTP3),
1422 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1423 "Intel D945G", STAC_D945GTP3),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1425 "Intel D945G", STAC_D945GTP3),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1427 "Intel D945G", STAC_D945GTP3),
1428 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1429 "Intel D945G", STAC_D945GTP3),
1430 /* Intel D945G 5-stack systems */
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1432 "Intel D945G", STAC_D945GTP5),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1434 "Intel D945G", STAC_D945GTP5),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1436 "Intel D945G", STAC_D945GTP5),
1437 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1438 "Intel D945G", STAC_D945GTP5),
1439 /* Intel 945P based systems */
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1441 "Intel D945P", STAC_D945GTP3),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1443 "Intel D945P", STAC_D945GTP3),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1445 "Intel D945P", STAC_D945GTP3),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1447 "Intel D945P", STAC_D945GTP3),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1449 "Intel D945P", STAC_D945GTP3),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1451 "Intel D945P", STAC_D945GTP5),
1452 /* other systems */
1453 /* Apple Mac Mini (early 2006) */
1454 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1455 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1456 /* Dell systems */
1457 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1458 "unknown Dell", STAC_922X_DELL_D81),
1459 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1460 "unknown Dell", STAC_922X_DELL_D81),
1461 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1462 "unknown Dell", STAC_922X_DELL_D81),
1463 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1464 "unknown Dell", STAC_922X_DELL_D82),
1465 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1466 "unknown Dell", STAC_922X_DELL_M81),
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1468 "unknown Dell", STAC_922X_DELL_D82),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1470 "unknown Dell", STAC_922X_DELL_D81),
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1472 "unknown Dell", STAC_922X_DELL_D81),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1474 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1475 {} /* terminator */
1476};
1477
3cc08dc6 1478static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1479 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1480 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1481 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1482 0x01c42190, 0x40000100,
3cc08dc6
MP		 1483};
1484
93ed1503 1485static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1486 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1487 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1488 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1489 0x40000100, 0x40000100
1490};
1491
93ed1503
TD		 1492static unsigned int d965_5st_pin_configs[14] = {
1493 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1494 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1495 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1496 0x40000100, 0x40000100
1497};
1498
4ff076e5
TD		 1499static unsigned int dell_3st_pin_configs[14] = {
1500 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1501 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1502 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1503 0x40c003fc, 0x40000100
1504};
1505
93ed1503 1506static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1507 [STAC_D965_REF] = ref927x_pin_configs,
1508 [STAC_D965_3ST] = d965_3st_pin_configs,
1509 [STAC_D965_5ST] = d965_5st_pin_configs,
1510 [STAC_DELL_3ST] = dell_3st_pin_configs,
1511 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1512};
1513
f5fcc13c 1514static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1515 [STAC_D965_REF] = "ref",
1516 [STAC_D965_3ST] = "3stack",
1517 [STAC_D965_5ST] = "5stack",
1518 [STAC_DELL_3ST] = "dell-3stack",
1519 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1520};
1521
1522static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1523 /* SigmaTel reference board */
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1525 "DFI LanParty", STAC_D965_REF),
81d3dbde 1526 /* Intel 946 based systems */
f5fcc13c
TI		 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1529 /* 965 based 3 stack systems */
f5fcc13c
TI		 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1546 /* Dell 3 stack systems */
8e9068b1 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1551 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1560 /* 965 based 5 stack systems */
f5fcc13c
TI		 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1570 {} /* terminator */
1571};
1572
f3302a59
MP		 1573static unsigned int ref9205_pin_configs[12] = {
1574 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1575 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1576 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1577};
1578
dfe495d0
TI		 1579/*
1580 STAC 9205 pin configs for
1581 102801F1
1582 102801F2
1583 102801FC
1584 102801FD
1585 10280204
1586 1028021F
3fa2ef74 1587 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1588*/
1589static unsigned int dell_9205_m42_pin_configs[12] = {
1590 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1591 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1592 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1593};
1594
1595/*
1596 STAC 9205 pin configs for
1597 102801F9
1598 102801FA
1599 102801FE
1600 102801FF (Dell Precision M4300)
1601 10280206
1602 10280200
1603 10280201
1604*/
1605static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1606 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1607 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1608 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1609};
1610
dfe495d0 1611static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1612 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1613 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1614 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1615};
1616
f5fcc13c 1617static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1618 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1619 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1620 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1621 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1622};
1623
f5fcc13c
TI		 1624static const char *stac9205_models[STAC_9205_MODELS] = {
1625 [STAC_9205_REF] = "ref",
dfe495d0 1626 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1627 [STAC_9205_DELL_M43] = "dell-m43",
1628 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1629};
1630
1631static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1632 /* SigmaTel reference board */
1633 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1634 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1636 "unknown Dell", STAC_9205_DELL_M42),
1637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1638 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1640 "Dell Precision", STAC_9205_DELL_M43),
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1642 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1644 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1646 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1648 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1650 "unknown Dell", STAC_9205_DELL_M42),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1652 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1654 "Dell Precision", STAC_9205_DELL_M43),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1656 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1658 "Dell Precision", STAC_9205_DELL_M43),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1660 "Dell Inspiron", STAC_9205_DELL_M44),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1662 "Dell Inspiron", STAC_9205_DELL_M44),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1664 "Dell Inspiron", STAC_9205_DELL_M44),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1666 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1668 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1670 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1672 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1673 {} /* terminator */
1674};
1675
11b44bbd
RF		 1676static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1677{
1678 int i;
1679 struct sigmatel_spec *spec = codec->spec;
1680
1681 if (! spec->bios_pin_configs) {
1682 spec->bios_pin_configs = kcalloc(spec->num_pins,
1683 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1684 if (! spec->bios_pin_configs)
1685 return -ENOMEM;
1686 }
1687
1688 for (i = 0; i < spec->num_pins; i++) {
1689 hda_nid_t nid = spec->pin_nids[i];
1690 unsigned int pin_cfg;
1691
1692 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1693 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1694 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1695 nid, pin_cfg);
1696 spec->bios_pin_configs[i] = pin_cfg;
1697 }
1698
1699 return 0;
1700}
1701
87d48363
MR		 1702static void stac92xx_set_config_reg(struct hda_codec *codec,
1703 hda_nid_t pin_nid, unsigned int pin_config)
1704{
1705 int i;
1706 snd_hda_codec_write(codec, pin_nid, 0,
1707 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1708 pin_config & 0x000000ff);
1709 snd_hda_codec_write(codec, pin_nid, 0,
1710 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1711 (pin_config & 0x0000ff00) >> 8);
1712 snd_hda_codec_write(codec, pin_nid, 0,
1713 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1714 (pin_config & 0x00ff0000) >> 16);
1715 snd_hda_codec_write(codec, pin_nid, 0,
1716 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1717 pin_config >> 24);
1718 i = snd_hda_codec_read(codec, pin_nid, 0,
1719 AC_VERB_GET_CONFIG_DEFAULT,
1720 0x00);
1721 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1722 pin_nid, i);
1723}
1724
2f2f4251
M		 1725static void stac92xx_set_config_regs(struct hda_codec *codec)
1726{
1727 int i;
1728 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1729
87d48363
MR		 1730 if (!spec->pin_configs)
1731 return;
11b44bbd 1732
87d48363
MR		 1733 for (i = 0; i < spec->num_pins; i++)
1734 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1735 spec->pin_configs[i]);
2f2f4251 1736}
2f2f4251 1737
dabbed6f 1738/*
c7d4b2fa 1739 * Analog playback callbacks
dabbed6f 1740 */
c7d4b2fa
M		 1741static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1742 struct hda_codec *codec,
c8b6bf9b 1743 struct snd_pcm_substream *substream)
2f2f4251 1744{
dabbed6f 1745 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1746 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1747}
1748
2f2f4251
M		 1749static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1750 struct hda_codec *codec,
1751 unsigned int stream_tag,
1752 unsigned int format,
c8b6bf9b 1753 struct snd_pcm_substream *substream)
2f2f4251
M		 1754{
1755 struct sigmatel_spec *spec = codec->spec;
403d1944 1756 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1757}
1758
1759static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1760 struct hda_codec *codec,
c8b6bf9b 1761 struct snd_pcm_substream *substream)
2f2f4251
M		 1762{
1763 struct sigmatel_spec *spec = codec->spec;
1764 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1765}
1766
dabbed6f
M		 1767/*
1768 * Digital playback callbacks
1769 */
1770static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1771 struct hda_codec *codec,
c8b6bf9b 1772 struct snd_pcm_substream *substream)
dabbed6f
M		 1773{
1774 struct sigmatel_spec *spec = codec->spec;
1775 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1776}
1777
1778static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1779 struct hda_codec *codec,
c8b6bf9b 1780 struct snd_pcm_substream *substream)
dabbed6f
M		 1781{
1782 struct sigmatel_spec *spec = codec->spec;
1783 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1784}
1785
6b97eb45
TI		 1786static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1787 struct hda_codec *codec,
1788 unsigned int stream_tag,
1789 unsigned int format,
1790 struct snd_pcm_substream *substream)
1791{
1792 struct sigmatel_spec *spec = codec->spec;
1793 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1794 stream_tag, format, substream);
1795}
1796
dabbed6f 1797
2f2f4251
M		 1798/*
1799 * Analog capture callbacks
1800 */
1801static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1802 struct hda_codec *codec,
1803 unsigned int stream_tag,
1804 unsigned int format,
c8b6bf9b 1805 struct snd_pcm_substream *substream)
2f2f4251
M		 1806{
1807 struct sigmatel_spec *spec = codec->spec;
1808
1809 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1810 stream_tag, 0, format);
1811 return 0;
1812}
1813
1814static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1815 struct hda_codec *codec,
c8b6bf9b 1816 struct snd_pcm_substream *substream)
2f2f4251
M		 1817{
1818 struct sigmatel_spec *spec = codec->spec;
1819
1820 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1821 return 0;
1822}
1823
dabbed6f
M		 1824static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1825 .substreams = 1,
1826 .channels_min = 2,
1827 .channels_max = 2,
1828 /* NID is set in stac92xx_build_pcms */
1829 .ops = {
1830 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1831 .close = stac92xx_dig_playback_pcm_close,
1832 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1833 },
1834};
1835
1836static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1837 .substreams = 1,
1838 .channels_min = 2,
1839 .channels_max = 2,
1840 /* NID is set in stac92xx_build_pcms */
1841};
1842
2f2f4251
M		 1843static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1844 .substreams = 1,
1845 .channels_min = 2,
c7d4b2fa 1846 .channels_max = 8,
2f2f4251
M		 1847 .nid = 0x02, /* NID to query formats and rates */
1848 .ops = {
1849 .open = stac92xx_playback_pcm_open,
1850 .prepare = stac92xx_playback_pcm_prepare,
1851 .cleanup = stac92xx_playback_pcm_cleanup
1852 },
1853};
1854
3cc08dc6
MP		 1855static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1856 .substreams = 1,
1857 .channels_min = 2,
1858 .channels_max = 2,
1859 .nid = 0x06, /* NID to query formats and rates */
1860 .ops = {
1861 .open = stac92xx_playback_pcm_open,
1862 .prepare = stac92xx_playback_pcm_prepare,
1863 .cleanup = stac92xx_playback_pcm_cleanup
1864 },
1865};
1866
2f2f4251 1867static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1868 .channels_min = 2,
1869 .channels_max = 2,
9e05b7a3 1870 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1871 .ops = {
1872 .prepare = stac92xx_capture_pcm_prepare,
1873 .cleanup = stac92xx_capture_pcm_cleanup
1874 },
1875};
1876
1877static int stac92xx_build_pcms(struct hda_codec *codec)
1878{
1879 struct sigmatel_spec *spec = codec->spec;
1880 struct hda_pcm *info = spec->pcm_rec;
1881
1882 codec->num_pcms = 1;
1883 codec->pcm_info = info;
1884
c7d4b2fa 1885 info->name = "STAC92xx Analog";
2f2f4251 1886 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1887 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1888 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1889 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1890
1891 if (spec->alt_switch) {
1892 codec->num_pcms++;
1893 info++;
1894 info->name = "STAC92xx Analog Alt";
1895 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1896 }
2f2f4251 1897
dabbed6f
M		 1898 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1899 codec->num_pcms++;
1900 info++;
1901 info->name = "STAC92xx Digital";
7ba72ba1 1902 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 1903 if (spec->multiout.dig_out_nid) {
1904 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1905 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1906 }
1907 if (spec->dig_in_nid) {
1908 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1909 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1910 }
1911 }
1912
2f2f4251
M		 1913 return 0;
1914}
1915
c960a03b
TI		 1916static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1917{
1918 unsigned int pincap = snd_hda_param_read(codec, nid,
1919 AC_PAR_PIN_CAP);
1920 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1921 if (pincap & AC_PINCAP_VREF_100)
1922 return AC_PINCTL_VREF_100;
1923 if (pincap & AC_PINCAP_VREF_80)
1924 return AC_PINCTL_VREF_80;
1925 if (pincap & AC_PINCAP_VREF_50)
1926 return AC_PINCTL_VREF_50;
1927 if (pincap & AC_PINCAP_VREF_GRD)
1928 return AC_PINCTL_VREF_GRD;
1929 return 0;
1930}
1931
403d1944
MP		 1932static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1933
1934{
82beb8fd
TI		 1935 snd_hda_codec_write_cache(codec, nid, 0,
1936 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1937}
1938
a5ce8890 1939#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1940
1941static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1942{
1943 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1944 struct sigmatel_spec *spec = codec->spec;
1945 int io_idx = kcontrol-> private_value & 0xff;
1946
1947 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1948 return 0;
1949}
1950
1951static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1952{
1953 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1954 struct sigmatel_spec *spec = codec->spec;
1955 hda_nid_t nid = kcontrol->private_value >> 8;
1956 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1957 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1958
1959 spec->io_switch[io_idx] = val;
1960
1961 if (val)
1962 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1963 else {
1964 unsigned int pinctl = AC_PINCTL_IN_EN;
1965 if (io_idx) /* set VREF for mic */
1966 pinctl |= stac92xx_get_vref(codec, nid);
1967 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1968 }
40c1d308
JZ		 1969
1970 /* check the auto-mute again: we need to mute/unmute the speaker
1971 * appropriately according to the pin direction
1972 */
1973 if (spec->hp_detect)
1974 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1975
403d1944
MP		 1976 return 1;
1977}
1978
0fb87bb4
ML		 1979#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1980
1981static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1982 struct snd_ctl_elem_value *ucontrol)
1983{
1984 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1985 struct sigmatel_spec *spec = codec->spec;
1986
1987 ucontrol->value.integer.value[0] = spec->clfe_swap;
1988 return 0;
1989}
1990
1991static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1992 struct snd_ctl_elem_value *ucontrol)
1993{
1994 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1995 struct sigmatel_spec *spec = codec->spec;
1996 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1997 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1998
68ea7b2f 1999 if (spec->clfe_swap == val)
0fb87bb4
ML		 2000 return 0;
2001
68ea7b2f 2002 spec->clfe_swap = val;
0fb87bb4
ML		 2003
2004 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2005 spec->clfe_swap ? 0x4 : 0x0);
2006
2007 return 1;
2008}
2009
403d1944
MP		 2010#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2011 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2012 .name = xname, \
2013 .index = 0, \
2014 .info = stac92xx_io_switch_info, \
2015 .get = stac92xx_io_switch_get, \
2016 .put = stac92xx_io_switch_put, \
2017 .private_value = xpval, \
2018 }
2019
0fb87bb4
ML		 2020#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2021 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2022 .name = xname, \
2023 .index = 0, \
2024 .info = stac92xx_clfe_switch_info, \
2025 .get = stac92xx_clfe_switch_get, \
2026 .put = stac92xx_clfe_switch_put, \
2027 .private_value = xpval, \
2028 }
403d1944 2029
c7d4b2fa
M		 2030enum {
2031 STAC_CTL_WIDGET_VOL,
2032 STAC_CTL_WIDGET_MUTE,
09a99959 2033 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2034 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2035 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2036};
2037
c8b6bf9b 2038static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2039 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2040 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2041 STAC_MONO_MUX,
403d1944 2042 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2043 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2044};
2045
2046/* add dynamic controls */
2047static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2048{
c8b6bf9b 2049 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2050
2051 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2052 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2053
2054 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2055 if (! knew)
2056 return -ENOMEM;
2057 if (spec->kctl_alloc) {
2058 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2059 kfree(spec->kctl_alloc);
2060 }
2061 spec->kctl_alloc = knew;
2062 spec->num_kctl_alloc = num;
2063 }
2064
2065 knew = &spec->kctl_alloc[spec->num_kctl_used];
2066 *knew = stac92xx_control_templates[type];
82fe0c58 2067 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2068 if (! knew->name)
2069 return -ENOMEM;
2070 knew->private_value = val;
2071 spec->num_kctl_used++;
2072 return 0;
2073}
2074
403d1944
MP		 2075/* flag inputs as additional dynamic lineouts */
2076static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2077{
2078 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2079 unsigned int wcaps, wtype;
2080 int i, num_dacs = 0;
2081
2082 /* use the wcaps cache to count all DACs available for line-outs */
2083 for (i = 0; i < codec->num_nodes; i++) {
2084 wcaps = codec->wcaps[i];
2085 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2086
7b043899
SL		 2087 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2088 num_dacs++;
2089 }
403d1944 2090
7b043899
SL		 2091 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2092
403d1944
MP		 2093 switch (cfg->line_outs) {
2094 case 3:
2095 /* add line-in as side */
7b043899 2096 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2097 cfg->line_out_pins[cfg->line_outs] =
2098 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2099 spec->line_switch = 1;
2100 cfg->line_outs++;
2101 }
2102 break;
2103 case 2:
2104 /* add line-in as clfe and mic as side */
7b043899 2105 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2106 cfg->line_out_pins[cfg->line_outs] =
2107 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2108 spec->line_switch = 1;
2109 cfg->line_outs++;
2110 }
7b043899 2111 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2112 cfg->line_out_pins[cfg->line_outs] =
2113 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2114 spec->mic_switch = 1;
2115 cfg->line_outs++;
2116 }
2117 break;
2118 case 1:
2119 /* add line-in as surr and mic as clfe */
7b043899 2120 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2121 cfg->line_out_pins[cfg->line_outs] =
2122 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2123 spec->line_switch = 1;
2124 cfg->line_outs++;
2125 }
7b043899 2126 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2127 cfg->line_out_pins[cfg->line_outs] =
2128 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2129 spec->mic_switch = 1;
2130 cfg->line_outs++;
2131 }
2132 break;
2133 }
2134
2135 return 0;
2136}
2137
7b043899
SL		 2138
2139static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2140{
2141 int i;
2142
2143 for (i = 0; i < spec->multiout.num_dacs; i++) {
2144 if (spec->multiout.dac_nids[i] == nid)
2145 return 1;
2146 }
2147
2148 return 0;
2149}
2150
3cc08dc6 2151/*
7b043899
SL		 2152 * Fill in the dac_nids table from the parsed pin configuration
2153 * This function only works when every pin in line_out_pins[]
2154 * contains atleast one DAC in its connection list. Some 92xx
2155 * codecs are not connected directly to a DAC, such as the 9200
2156 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2157 */
19039bd0 2158static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2159 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2160{
2161 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2162 int i, j, conn_len = 0;
2163 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2164 unsigned int wcaps, wtype;
2165
c7d4b2fa
M		 2166 for (i = 0; i < cfg->line_outs; i++) {
2167 nid = cfg->line_out_pins[i];
7b043899
SL		 2168 conn_len = snd_hda_get_connections(codec, nid, conn,
2169 HDA_MAX_CONNECTIONS);
2170 for (j = 0; j < conn_len; j++) {
2171 wcaps = snd_hda_param_read(codec, conn[j],
2172 AC_PAR_AUDIO_WIDGET_CAP);
2173 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2174 if (wtype != AC_WID_AUD_OUT ||
2175 (wcaps & AC_WCAP_DIGITAL))
2176 continue;
2177 /* conn[j] is a DAC routed to this line-out */
2178 if (!is_in_dac_nids(spec, conn[j]))
2179 break;
2180 }
2181
2182 if (j == conn_len) {
df802952
TI		 2183 if (spec->multiout.num_dacs > 0) {
2184 /* we have already working output pins,
2185 * so let's drop the broken ones again
2186 */
2187 cfg->line_outs = spec->multiout.num_dacs;
2188 break;
2189 }
7b043899
SL		 2190 /* error out, no available DAC found */
2191 snd_printk(KERN_ERR
2192 "%s: No available DAC for pin 0x%x\n",
2193 __func__, nid);
2194 return -ENODEV;
2195 }
2196
2197 spec->multiout.dac_nids[i] = conn[j];
2198 spec->multiout.num_dacs++;
2199 if (conn_len > 1) {
2200 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2201 snd_hda_codec_write_cache(codec, nid, 0,
2202 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2203
7b043899
SL		 2204 }
2205 }
c7d4b2fa 2206
7b043899
SL		 2207 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2208 spec->multiout.num_dacs,
2209 spec->multiout.dac_nids[0],
2210 spec->multiout.dac_nids[1],
2211 spec->multiout.dac_nids[2],
2212 spec->multiout.dac_nids[3],
2213 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2214 return 0;
2215}
2216
eb06ed8f
TI		 2217/* create volume control/switch for the given prefx type */
2218static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2219{
2220 char name[32];
2221 int err;
2222
2223 sprintf(name, "%s Playback Volume", pfx);
2224 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2225 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2226 if (err < 0)
2227 return err;
2228 sprintf(name, "%s Playback Switch", pfx);
2229 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2230 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2231 if (err < 0)
2232 return err;
2233 return 0;
2234}
2235
c7d4b2fa 2236/* add playback controls from the parsed DAC table */
0fb87bb4 2237static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2238 const struct auto_pin_cfg *cfg)
c7d4b2fa 2239{
19039bd0
TI		 2240 static const char *chname[4] = {
2241 "Front", "Surround", NULL /*CLFE*/, "Side"
2242 };
c7d4b2fa
M		 2243 hda_nid_t nid;
2244 int i, err;
2245
0fb87bb4 2246 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2247 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2248
2249
c7d4b2fa 2250 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2251 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2252 continue;
2253
2254 nid = spec->multiout.dac_nids[i];
2255
2256 if (i == 2) {
2257 /* Center/LFE */
eb06ed8f
TI		 2258 err = create_controls(spec, "Center", nid, 1);
2259 if (err < 0)
c7d4b2fa 2260 return err;
eb06ed8f
TI		 2261 err = create_controls(spec, "LFE", nid, 2);
2262 if (err < 0)
c7d4b2fa 2263 return err;
0fb87bb4
ML		 2264
2265 wid_caps = get_wcaps(codec, nid);
2266
2267 if (wid_caps & AC_WCAP_LR_SWAP) {
2268 err = stac92xx_add_control(spec,
2269 STAC_CTL_WIDGET_CLFE_SWITCH,
2270 "Swap Center/LFE Playback Switch", nid);
2271
2272 if (err < 0)
2273 return err;
2274 }
2275
c7d4b2fa 2276 } else {
eb06ed8f
TI		 2277 err = create_controls(spec, chname[i], nid, 3);
2278 if (err < 0)
c7d4b2fa
M		 2279 return err;
2280 }
2281 }
2282
b5895dc8
MR		 2283 if (spec->line_switch) {
2284 nid = cfg->input_pins[AUTO_PIN_LINE];
2285 pincap = snd_hda_param_read(codec, nid,
2286 AC_PAR_PIN_CAP);
2287 if (pincap & AC_PINCAP_OUT) {
2288 err = stac92xx_add_control(spec,
2289 STAC_CTL_WIDGET_IO_SWITCH,
2290 "Line In as Output Switch", nid << 8);
2291 if (err < 0)
2292 return err;
2293 }
2294 }
403d1944 2295
b5895dc8 2296 if (spec->mic_switch) {
cace16f1 2297 unsigned int def_conf;
b5895dc8 2298 nid = cfg->input_pins[AUTO_PIN_MIC];
cace16f1
MR		 2299 def_conf = snd_hda_codec_read(codec, nid, 0,
2300 AC_VERB_GET_CONFIG_DEFAULT, 0);
2301
2302 /* some laptops have an internal analog microphone
2303 * which can't be used as a output */
2304 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2305 pincap = snd_hda_param_read(codec, nid,
2306 AC_PAR_PIN_CAP);
2307 if (pincap & AC_PINCAP_OUT) {
2308 err = stac92xx_add_control(spec,
2309 STAC_CTL_WIDGET_IO_SWITCH,
2310 "Mic as Output Switch", (nid << 8) | 1);
2311 if (err < 0)
2312 return err;
2313 }
b5895dc8
MR		 2314 }
2315 }
403d1944 2316
c7d4b2fa
M		 2317 return 0;
2318}
2319
eb06ed8f 2320static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2321{
7b043899
SL		 2322 if (is_in_dac_nids(spec, nid))
2323 return 1;
eb06ed8f
TI		 2324 if (spec->multiout.hp_nid == nid)
2325 return 1;
2326 return 0;
2327}
c7d4b2fa 2328
eb06ed8f
TI		 2329static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2330{
2331 if (!spec->multiout.hp_nid)
2332 spec->multiout.hp_nid = nid;
2333 else if (spec->multiout.num_dacs > 4) {
2334 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2335 return 1;
2336 } else {
2337 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2338 spec->multiout.num_dacs++;
2339 }
2340 return 0;
2341}
4e55096e 2342
eb06ed8f
TI		 2343/* add playback controls for Speaker and HP outputs */
2344static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2345 struct auto_pin_cfg *cfg)
2346{
2347 struct sigmatel_spec *spec = codec->spec;
2348 hda_nid_t nid;
2349 int i, old_num_dacs, err;
2350
2351 old_num_dacs = spec->multiout.num_dacs;
2352 for (i = 0; i < cfg->hp_outs; i++) {
2353 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2354 if (wid_caps & AC_WCAP_UNSOL_CAP)
2355 spec->hp_detect = 1;
2356 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2357 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2358 if (check_in_dac_nids(spec, nid))
2359 nid = 0;
2360 if (! nid)
c7d4b2fa 2361 continue;
eb06ed8f
TI		 2362 add_spec_dacs(spec, nid);
2363 }
2364 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2365 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2366 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2367 if (check_in_dac_nids(spec, nid))
2368 nid = 0;
eb06ed8f
TI		 2369 if (! nid)
2370 continue;
2371 add_spec_dacs(spec, nid);
c7d4b2fa 2372 }
1b290a51
MR		 2373 for (i = 0; i < cfg->line_outs; i++) {
2374 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2375 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2376 if (check_in_dac_nids(spec, nid))
2377 nid = 0;
2378 if (! nid)
2379 continue;
2380 add_spec_dacs(spec, nid);
2381 }
eb06ed8f
TI		 2382 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2383 static const char *pfxs[] = {
2384 "Speaker", "External Speaker", "Speaker2",
2385 };
2386 err = create_controls(spec, pfxs[i - old_num_dacs],
2387 spec->multiout.dac_nids[i], 3);
2388 if (err < 0)
2389 return err;
2390 }
2391 if (spec->multiout.hp_nid) {
2392 const char *pfx;
6020c008 2393 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2394 pfx = "Master";
2395 else
2396 pfx = "Headphone";
2397 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2398 if (err < 0)
2399 return err;
2400 }
c7d4b2fa
M		 2401
2402 return 0;
2403}
2404
b22b4821
MR		 2405/* labels for mono mux outputs */
2406static const char *stac92xx_mono_labels[3] = {
2407 "DAC0", "DAC1", "Mixer"
2408};
2409
2410/* create mono mux for mono out on capable codecs */
2411static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2412{
2413 struct sigmatel_spec *spec = codec->spec;
2414 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2415 int i, num_cons;
2416 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2417
2418 num_cons = snd_hda_get_connections(codec,
2419 spec->mono_nid,
2420 con_lst,
2421 HDA_MAX_NUM_INPUTS);
2422 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2423 return -EINVAL;
2424
2425 for (i = 0; i < num_cons; i++) {
2426 mono_mux->items[mono_mux->num_items].label =
2427 stac92xx_mono_labels[i];
2428 mono_mux->items[mono_mux->num_items].index = i;
2429 mono_mux->num_items++;
2430 }
09a99959
MR		 2431
2432 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2433 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2434}
2435
8b65727b 2436/* labels for dmic mux inputs */
ddc2cec4 2437static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2438 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2439 "Digital Mic 3", "Digital Mic 4"
2440};
2441
2442/* create playback/capture controls for input pins on dmic capable codecs */
2443static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2444 const struct auto_pin_cfg *cfg)
2445{
2446 struct sigmatel_spec *spec = codec->spec;
2447 struct hda_input_mux *dimux = &spec->private_dimux;
2448 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2449 int err, i, j;
2450 char name[32];
8b65727b
MP		 2451
2452 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2453 dimux->items[dimux->num_items].index = 0;
2454 dimux->num_items++;
2455
2456 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2457 hda_nid_t nid;
8b65727b
MP		 2458 int index;
2459 int num_cons;
0678accd 2460 unsigned int wcaps;
8b65727b
MP		 2461 unsigned int def_conf;
2462
2463 def_conf = snd_hda_codec_read(codec,
2464 spec->dmic_nids[i],
2465 0,
2466 AC_VERB_GET_CONFIG_DEFAULT,
2467 0);
2468 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2469 continue;
2470
0678accd 2471 nid = spec->dmic_nids[i];
8b65727b 2472 num_cons = snd_hda_get_connections(codec,
e1f0d669 2473 spec->dmux_nids[0],
8b65727b
MP		 2474 con_lst,
2475 HDA_MAX_NUM_INPUTS);
2476 for (j = 0; j < num_cons; j++)
0678accd 2477 if (con_lst[j] == nid) {
8b65727b
MP		 2478 index = j;
2479 goto found;
2480 }
2481 continue;
2482found:
0678accd
MR		 2483 wcaps = get_wcaps(codec, nid);
2484
2485 if (wcaps & AC_WCAP_OUT_AMP) {
2486 sprintf(name, "%s Capture Volume",
2487 stac92xx_dmic_labels[dimux->num_items]);
2488
2489 err = stac92xx_add_control(spec,
2490 STAC_CTL_WIDGET_VOL,
2491 name,
2492 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2493 if (err < 0)
2494 return err;
2495 }
2496
8b65727b
MP		 2497 dimux->items[dimux->num_items].label =
2498 stac92xx_dmic_labels[dimux->num_items];
2499 dimux->items[dimux->num_items].index = index;
2500 dimux->num_items++;
2501 }
2502
2503 return 0;
2504}
2505
c7d4b2fa
M		 2506/* create playback/capture controls for input pins */
2507static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2508{
2509 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2510 struct hda_input_mux *imux = &spec->private_imux;
2511 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2512 int i, j, k;
2513
2514 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2515 int index;
2516
2517 if (!cfg->input_pins[i])
2518 continue;
2519 index = -1;
2520 for (j = 0; j < spec->num_muxes; j++) {
2521 int num_cons;
2522 num_cons = snd_hda_get_connections(codec,
2523 spec->mux_nids[j],
2524 con_lst,
2525 HDA_MAX_NUM_INPUTS);
2526 for (k = 0; k < num_cons; k++)
2527 if (con_lst[k] == cfg->input_pins[i]) {
2528 index = k;
2529 goto found;
2530 }
c7d4b2fa 2531 }
314634bc
TI		 2532 continue;
2533 found:
2534 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2535 imux->items[imux->num_items].index = index;
2536 imux->num_items++;
c7d4b2fa
M		 2537 }
2538
7b043899 2539 if (imux->num_items) {
62fe78e9
SR		 2540 /*
2541 * Set the current input for the muxes.
2542 * The STAC9221 has two input muxes with identical source
2543 * NID lists. Hopefully this won't get confused.
2544 */
2545 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2546 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2547 AC_VERB_SET_CONNECT_SEL,
2548 imux->items[0].index);
62fe78e9
SR		 2549 }
2550 }
2551
c7d4b2fa
M		 2552 return 0;
2553}
2554
c7d4b2fa
M		 2555static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2556{
2557 struct sigmatel_spec *spec = codec->spec;
2558 int i;
2559
2560 for (i = 0; i < spec->autocfg.line_outs; i++) {
2561 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2562 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2563 }
2564}
2565
2566static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2567{
2568 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2569 int i;
c7d4b2fa 2570
eb06ed8f
TI		 2571 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2572 hda_nid_t pin;
2573 pin = spec->autocfg.hp_pins[i];
2574 if (pin) /* connect to front */
2575 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2576 }
2577 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2578 hda_nid_t pin;
2579 pin = spec->autocfg.speaker_pins[i];
2580 if (pin) /* connect to front */
2581 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2582 }
c7d4b2fa
M		 2583}
2584
3cc08dc6 2585static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2586{
2587 struct sigmatel_spec *spec = codec->spec;
2588 int err;
bcecd9bd 2589 int hp_speaker_swap = 0;
c7d4b2fa 2590
8b65727b
MP		 2591 if ((err = snd_hda_parse_pin_def_config(codec,
2592 &spec->autocfg,
2593 spec->dmic_nids)) < 0)
c7d4b2fa 2594 return err;
82bc955f 2595 if (! spec->autocfg.line_outs)
869264c4 2596 return 0; /* can't find valid pin config */
19039bd0 2597
bcecd9bd
JZ		 2598 /* If we have no real line-out pin and multiple hp-outs, HPs should
2599 * be set up as multi-channel outputs.
2600 */
2601 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2602 spec->autocfg.hp_outs > 1) {
2603 /* Copy hp_outs to line_outs, backup line_outs in
2604 * speaker_outs so that the following routines can handle
2605 * HP pins as primary outputs.
2606 */
2607 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2608 sizeof(spec->autocfg.line_out_pins));
2609 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2610 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2611 sizeof(spec->autocfg.hp_pins));
2612 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2613 hp_speaker_swap = 1;
2614 }
09a99959
MR		 2615 if (spec->autocfg.mono_out_pin) {
2616 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2617 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2618 u32 caps = query_amp_caps(codec,
2619 spec->autocfg.mono_out_pin, dir);
2620 hda_nid_t conn_list[1];
2621
2622 /* get the mixer node and then the mono mux if it exists */
2623 if (snd_hda_get_connections(codec,
2624 spec->autocfg.mono_out_pin, conn_list, 1) &&
2625 snd_hda_get_connections(codec, conn_list[0],
2626 conn_list, 1)) {
2627
2628 int wcaps = get_wcaps(codec, conn_list[0]);
2629 int wid_type = (wcaps & AC_WCAP_TYPE)
2630 >> AC_WCAP_TYPE_SHIFT;
2631 /* LR swap check, some stac925x have a mux that
2632 * changes the DACs output path instead of the
2633 * mono-mux path.
2634 */
2635 if (wid_type == AC_WID_AUD_SEL &&
2636 !(wcaps & AC_WCAP_LR_SWAP))
2637 spec->mono_nid = conn_list[0];
2638 }
2639 /* all mono outs have a least a mute/unmute switch */
2640 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2641 "Mono Playback Switch",
2642 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2643 1, 0, dir));
2644 if (err < 0)
2645 return err;
2646 /* check to see if there is volume support for the amp */
2647 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2648 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2649 "Mono Playback Volume",
2650 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2651 1, 0, dir));
2652 if (err < 0)
2653 return err;
2654 }
2655
2656 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2657 AC_PINCTL_OUT_EN);
2658 }
bcecd9bd 2659
403d1944
MP		 2660 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2661 return err;
19039bd0
TI		 2662 if (spec->multiout.num_dacs == 0)
2663 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2664 return err;
c7d4b2fa 2665
0fb87bb4
ML		 2666 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2667
2668 if (err < 0)
2669 return err;
2670
bcecd9bd
JZ		 2671 if (hp_speaker_swap == 1) {
2672 /* Restore the hp_outs and line_outs */
2673 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2674 sizeof(spec->autocfg.line_out_pins));
2675 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2676 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2677 sizeof(spec->autocfg.speaker_pins));
2678 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2679 memset(spec->autocfg.speaker_pins, 0,
2680 sizeof(spec->autocfg.speaker_pins));
2681 spec->autocfg.speaker_outs = 0;
2682 }
2683
0fb87bb4
ML		 2684 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2685
2686 if (err < 0)
2687 return err;
2688
2689 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2690
2691 if (err < 0)
c7d4b2fa
M		 2692 return err;
2693
b22b4821
MR		 2694 if (spec->mono_nid > 0) {
2695 err = stac92xx_auto_create_mono_output_ctls(codec);
2696 if (err < 0)
2697 return err;
2698 }
2699
8b65727b
MP		 2700 if (spec->num_dmics > 0)
2701 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2702 &spec->autocfg)) < 0)
2703 return err;
2704
c7d4b2fa 2705 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2706 if (spec->multiout.max_channels > 2)
c7d4b2fa 2707 spec->surr_switch = 1;
c7d4b2fa 2708
82bc955f 2709 if (spec->autocfg.dig_out_pin)
3cc08dc6 2710 spec->multiout.dig_out_nid = dig_out;
82bc955f 2711 if (spec->autocfg.dig_in_pin)
3cc08dc6 2712 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2713
2714 if (spec->kctl_alloc)
2715 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2716
2717 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2718 if (!spec->dinput_mux)
2719 spec->dinput_mux = &spec->private_dimux;
b22b4821 2720 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2721
2722 return 1;
2723}
2724
82bc955f
TI		 2725/* add playback controls for HP output */
2726static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2727 struct auto_pin_cfg *cfg)
2728{
2729 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2730 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2731 unsigned int wid_caps;
2732
2733 if (! pin)
2734 return 0;
2735
2736 wid_caps = get_wcaps(codec, pin);
505cb341 2737 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2738 spec->hp_detect = 1;
82bc955f
TI		 2739
2740 return 0;
2741}
2742
160ea0dc
RF		 2743/* add playback controls for LFE output */
2744static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2745 struct auto_pin_cfg *cfg)
2746{
2747 struct sigmatel_spec *spec = codec->spec;
2748 int err;
2749 hda_nid_t lfe_pin = 0x0;
2750 int i;
2751
2752 /*
2753 * search speaker outs and line outs for a mono speaker pin
2754 * with an amp. If one is found, add LFE controls
2755 * for it.
2756 */
2757 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2758 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2759 unsigned long wcaps = get_wcaps(codec, pin);
2760 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2761 if (wcaps == AC_WCAP_OUT_AMP)
2762 /* found a mono speaker with an amp, must be lfe */
2763 lfe_pin = pin;
2764 }
2765
2766 /* if speaker_outs is 0, then speakers may be in line_outs */
2767 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2768 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2769 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2770 unsigned long cfg;
2771 cfg = snd_hda_codec_read(codec, pin, 0,
2772 AC_VERB_GET_CONFIG_DEFAULT,
2773 0x00);
2774 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2775 unsigned long wcaps = get_wcaps(codec, pin);
2776 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2777 if (wcaps == AC_WCAP_OUT_AMP)
2778 /* found a mono speaker with an amp,
2779 must be lfe */
2780 lfe_pin = pin;
2781 }
2782 }
2783 }
2784
2785 if (lfe_pin) {
eb06ed8f 2786 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2787 if (err < 0)
2788 return err;
2789 }
2790
2791 return 0;
2792}
2793
c7d4b2fa
M		 2794static int stac9200_parse_auto_config(struct hda_codec *codec)
2795{
2796 struct sigmatel_spec *spec = codec->spec;
2797 int err;
2798
df694daa 2799 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2800 return err;
2801
2802 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2803 return err;
2804
82bc955f
TI		 2805 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2806 return err;
2807
160ea0dc
RF		 2808 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2809 return err;
2810
82bc955f 2811 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2812 spec->multiout.dig_out_nid = 0x05;
82bc955f 2813 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2814 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2815
2816 if (spec->kctl_alloc)
2817 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2818
2819 spec->input_mux = &spec->private_imux;
8b65727b 2820 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2821
2822 return 1;
2823}
2824
62fe78e9
SR		 2825/*
2826 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2827 * funky external mute control using GPIO pins.
2828 */
2829
76e1ddfb 2830static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2831 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2832{
2833 unsigned int gpiostate, gpiomask, gpiodir;
2834
2835 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2836 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2837 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2838
2839 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2840 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2841 gpiomask |= mask;
62fe78e9
SR		 2842
2843 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2844 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2845 gpiodir |= dir_mask;
62fe78e9 2846
76e1ddfb 2847 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2848 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2849
2850 snd_hda_codec_write(codec, codec->afg, 0,
2851 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2852 snd_hda_codec_read(codec, codec->afg, 0,
2853 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2854
2855 msleep(1);
2856
76e1ddfb
TI		 2857 snd_hda_codec_read(codec, codec->afg, 0,
2858 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2859}
2860
314634bc
TI		 2861static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2862 unsigned int event)
2863{
2864 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2865 snd_hda_codec_write_cache(codec, nid, 0,
2866 AC_VERB_SET_UNSOLICITED_ENABLE,
2867 (AC_USRSP_EN | event));
314634bc
TI		 2868}
2869
a64135a2
MR		 2870static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2871{
2872 int i;
2873 for (i = 0; i < cfg->hp_outs; i++)
2874 if (cfg->hp_pins[i] == nid)
2875 return 1; /* nid is a HP-Out */
2876
2877 return 0; /* nid is not a HP-Out */
2878};
2879
c7d4b2fa
M		 2880static int stac92xx_init(struct hda_codec *codec)
2881{
2882 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2883 struct auto_pin_cfg *cfg = &spec->autocfg;
2884 int i;
c7d4b2fa 2885
c7d4b2fa
M		 2886 snd_hda_sequence_write(codec, spec->init);
2887
82bc955f
TI		 2888 /* set up pins */
2889 if (spec->hp_detect) {
505cb341 2890 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2891 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2892 enable_pin_detect(codec, cfg->hp_pins[i],
2893 STAC_HP_EVENT);
0a07acaf
TI		 2894 /* force to enable the first line-out; the others are set up
2895 * in unsol_event
2896 */
2897 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2898 AC_PINCTL_OUT_EN);
eb995a8c 2899 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2900 /* fake event to set up pins */
2901 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2902 } else {
2903 stac92xx_auto_init_multi_out(codec);
2904 stac92xx_auto_init_hp_out(codec);
2905 }
2906 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2907 hda_nid_t nid = cfg->input_pins[i];
2908 if (nid) {
2909 unsigned int pinctl = AC_PINCTL_IN_EN;
2910 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2911 pinctl |= stac92xx_get_vref(codec, nid);
2912 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2913 }
82bc955f 2914 }
a64135a2
MR		 2915 for (i = 0; i < spec->num_dmics; i++)
2916 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2917 AC_PINCTL_IN_EN);
2918 for (i = 0; i < spec->num_pwrs; i++) {
2919 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2920 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2921 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2922 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2923 /* outputs are only ports capable of power management
2924 * any attempts on powering down a input port cause the
2925 * referenced VREF to act quirky.
2926 */
2927 if (pinctl & AC_PINCTL_IN_EN)
2928 continue;
2929 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2930 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2931 }
8b65727b 2932
82bc955f
TI		 2933 if (cfg->dig_out_pin)
2934 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2935 AC_PINCTL_OUT_EN);
2936 if (cfg->dig_in_pin)
2937 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2938 AC_PINCTL_IN_EN);
2939
4fe5195c
MR		 2940 stac_gpio_set(codec, spec->gpio_mask,
2941 spec->gpio_dir, spec->gpio_data);
62fe78e9 2942
c7d4b2fa
M		 2943 return 0;
2944}
2945
2f2f4251
M		 2946static void stac92xx_free(struct hda_codec *codec)
2947{
c7d4b2fa
M		 2948 struct sigmatel_spec *spec = codec->spec;
2949 int i;
2950
2951 if (! spec)
2952 return;
2953
2954 if (spec->kctl_alloc) {
2955 for (i = 0; i < spec->num_kctl_used; i++)
2956 kfree(spec->kctl_alloc[i].name);
2957 kfree(spec->kctl_alloc);
2958 }
2959
11b44bbd
RF		 2960 if (spec->bios_pin_configs)
2961 kfree(spec->bios_pin_configs);
2962
c7d4b2fa 2963 kfree(spec);
2f2f4251
M		 2964}
2965
4e55096e
M		 2966static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2967 unsigned int flag)
2968{
2969 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2970 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2971
f9acba43
TI		 2972 if (pin_ctl & AC_PINCTL_IN_EN) {
2973 /*
2974 * we need to check the current set-up direction of
2975 * shared input pins since they can be switched via
2976 * "xxx as Output" mixer switch
2977 */
2978 struct sigmatel_spec *spec = codec->spec;
2979 struct auto_pin_cfg *cfg = &spec->autocfg;
2980 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2981 spec->line_switch) ||
2982 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2983 spec->mic_switch))
2984 return;
2985 }
2986
7b043899
SL		 2987 /* if setting pin direction bits, clear the current
2988 direction bits first */
2989 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2990 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2991
82beb8fd 2992 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2993 AC_VERB_SET_PIN_WIDGET_CONTROL,
2994 pin_ctl | flag);
2995}
2996
2997static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2998 unsigned int flag)
2999{
3000 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3001 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3002 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3003 AC_VERB_SET_PIN_WIDGET_CONTROL,
3004 pin_ctl & ~flag);
3005}
3006
40c1d308 3007static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3008{
3009 if (!nid)
3010 return 0;
3011 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3012 & (1 << 31)) {
3013 unsigned int pinctl;
3014 pinctl = snd_hda_codec_read(codec, nid, 0,
3015 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3016 if (pinctl & AC_PINCTL_IN_EN)
3017 return 0; /* mic- or line-input */
3018 else
3019 return 1; /* HP-output */
3020 }
314634bc
TI		 3021 return 0;
3022}
3023
3024static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3025{
3026 struct sigmatel_spec *spec = codec->spec;
3027 struct auto_pin_cfg *cfg = &spec->autocfg;
3028 int i, presence;
3029
eb06ed8f 3030 presence = 0;
4fe5195c
MR		 3031 if (spec->gpio_mute)
3032 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3033 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3034
eb06ed8f 3035 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3036 if (presence)
3037 break;
4fe5195c 3038 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3039 }
4e55096e
M		 3040
3041 if (presence) {
3042 /* disable lineouts, enable hp */
3043 for (i = 0; i < cfg->line_outs; i++)
3044 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3045 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3046 for (i = 0; i < cfg->speaker_outs; i++)
3047 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3048 AC_PINCTL_OUT_EN);
4e55096e
M		 3049 } else {
3050 /* enable lineouts, disable hp */
3051 for (i = 0; i < cfg->line_outs; i++)
3052 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3053 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3054 for (i = 0; i < cfg->speaker_outs; i++)
3055 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3056 AC_PINCTL_OUT_EN);
4e55096e
M		 3057 }
3058}
3059
a64135a2
MR		 3060static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3061{
3062 struct sigmatel_spec *spec = codec->spec;
3063 hda_nid_t nid = spec->pwr_nids[idx];
3064 int presence, val;
3065 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3066 & 0x000000ff;
3067 presence = get_hp_pin_presence(codec, nid);
3068 idx = 1 << idx;
3069
3070 if (presence)
3071 val &= ~idx;
3072 else
3073 val |= idx;
3074
3075 /* power down unused output ports */
3076 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3077};
3078
314634bc
TI		 3079static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3080{
a64135a2
MR		 3081 struct sigmatel_spec *spec = codec->spec;
3082 int idx = res >> 26 & 0x0f;
3083
3084 switch ((res >> 26) & 0x30) {
314634bc
TI		 3085 case STAC_HP_EVENT:
3086 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3087 /* fallthru */
3088 case STAC_PWR_EVENT:
3089 if (spec->num_pwrs > 0)
3090 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3091 }
3092}
3093
cb53c626 3094#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3095static int stac92xx_resume(struct hda_codec *codec)
3096{
dc81bed1
TI		 3097 struct sigmatel_spec *spec = codec->spec;
3098
11b44bbd 3099 stac92xx_set_config_regs(codec);
dc81bed1 3100 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3101 stac_gpio_set(codec, spec->gpio_mask,
3102 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3103 snd_hda_codec_resume_amp(codec);
3104 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3105 /* invoke unsolicited event to reset the HP state */
3106 if (spec->hp_detect)
3107 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3108 return 0;
3109}
3110#endif
3111
2f2f4251
M		 3112static struct hda_codec_ops stac92xx_patch_ops = {
3113 .build_controls = stac92xx_build_controls,
3114 .build_pcms = stac92xx_build_pcms,
3115 .init = stac92xx_init,
3116 .free = stac92xx_free,
4e55096e 3117 .unsol_event = stac92xx_unsol_event,
cb53c626 3118#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3119 .resume = stac92xx_resume,
3120#endif
2f2f4251
M		 3121};
3122
3123static int patch_stac9200(struct hda_codec *codec)
3124{
3125 struct sigmatel_spec *spec;
c7d4b2fa 3126 int err;
2f2f4251 3127
e560d8d8 3128 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3129 if (spec == NULL)
3130 return -ENOMEM;
3131
3132 codec->spec = spec;
a4eed138 3133 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3134 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3135 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3136 stac9200_models,
3137 stac9200_cfg_tbl);
11b44bbd
RF		 3138 if (spec->board_config < 0) {
3139 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3140 err = stac92xx_save_bios_config_regs(codec);
3141 if (err < 0) {
3142 stac92xx_free(codec);
3143 return err;
3144 }
3145 spec->pin_configs = spec->bios_pin_configs;
3146 } else {
403d1944
MP		 3147 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3148 stac92xx_set_config_regs(codec);
3149 }
2f2f4251
M		 3150
3151 spec->multiout.max_channels = 2;
3152 spec->multiout.num_dacs = 1;
3153 spec->multiout.dac_nids = stac9200_dac_nids;
3154 spec->adc_nids = stac9200_adc_nids;
3155 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3156 spec->num_muxes = 1;
8b65727b 3157 spec->num_dmics = 0;
9e05b7a3 3158 spec->num_adcs = 1;
a64135a2 3159 spec->num_pwrs = 0;
c7d4b2fa 3160
bf277785
TD		 3161 if (spec->board_config == STAC_9200_GATEWAY ||
3162 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3163 spec->init = stac9200_eapd_init;
3164 else
3165 spec->init = stac9200_core_init;
2f2f4251 3166 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3167
3168 err = stac9200_parse_auto_config(codec);
3169 if (err < 0) {
3170 stac92xx_free(codec);
3171 return err;
3172 }
2f2f4251
M		 3173
3174 codec->patch_ops = stac92xx_patch_ops;
3175
3176 return 0;
3177}
3178
8e21c34c
TD		 3179static int patch_stac925x(struct hda_codec *codec)
3180{
3181 struct sigmatel_spec *spec;
3182 int err;
3183
3184 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3185 if (spec == NULL)
3186 return -ENOMEM;
3187
3188 codec->spec = spec;
a4eed138 3189 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3190 spec->pin_nids = stac925x_pin_nids;
3191 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3192 stac925x_models,
3193 stac925x_cfg_tbl);
9e507abd 3194 again:
8e21c34c 3195 if (spec->board_config < 0) {
2c11f955
TD		 3196 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3197 "using BIOS defaults\n");
8e21c34c
TD		 3198 err = stac92xx_save_bios_config_regs(codec);
3199 if (err < 0) {
3200 stac92xx_free(codec);
3201 return err;
3202 }
3203 spec->pin_configs = spec->bios_pin_configs;
3204 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3205 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3206 stac92xx_set_config_regs(codec);
3207 }
3208
3209 spec->multiout.max_channels = 2;
3210 spec->multiout.num_dacs = 1;
3211 spec->multiout.dac_nids = stac925x_dac_nids;
3212 spec->adc_nids = stac925x_adc_nids;
3213 spec->mux_nids = stac925x_mux_nids;
3214 spec->num_muxes = 1;
9e05b7a3 3215 spec->num_adcs = 1;
a64135a2 3216 spec->num_pwrs = 0;
2c11f955
TD		 3217 switch (codec->vendor_id) {
3218 case 0x83847632: /* STAC9202 */
3219 case 0x83847633: /* STAC9202D */
3220 case 0x83847636: /* STAC9251 */
3221 case 0x83847637: /* STAC9251D */
f6e9852a 3222 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3223 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3224 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3225 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3226 break;
3227 default:
3228 spec->num_dmics = 0;
3229 break;
3230 }
8e21c34c
TD		 3231
3232 spec->init = stac925x_core_init;
3233 spec->mixer = stac925x_mixer;
3234
3235 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3236 if (!err) {
3237 if (spec->board_config < 0) {
3238 printk(KERN_WARNING "hda_codec: No auto-config is "
3239 "available, default to model=ref\n");
3240 spec->board_config = STAC_925x_REF;
3241 goto again;
3242 }
3243 err = -EINVAL;
3244 }
8e21c34c
TD		 3245 if (err < 0) {
3246 stac92xx_free(codec);
3247 return err;
3248 }
3249
3250 codec->patch_ops = stac92xx_patch_ops;
3251
3252 return 0;
3253}
3254
e1f0d669
MR		 3255static struct hda_input_mux stac92hd73xx_dmux = {
3256 .num_items = 4,
3257 .items = {
3258 { "Analog Inputs", 0x0b },
3259 { "CD", 0x08 },
3260 { "Digital Mic 1", 0x09 },
3261 { "Digital Mic 2", 0x0a },
3262 }
3263};
3264
3265static int patch_stac92hd73xx(struct hda_codec *codec)
3266{
3267 struct sigmatel_spec *spec;
3268 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3269 int err = 0;
3270
3271 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3272 if (spec == NULL)
3273 return -ENOMEM;
3274
3275 codec->spec = spec;
3276 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3277 spec->pin_nids = stac92hd73xx_pin_nids;
3278 spec->board_config = snd_hda_check_board_config(codec,
3279 STAC_92HD73XX_MODELS,
3280 stac92hd73xx_models,
3281 stac92hd73xx_cfg_tbl);
3282again:
3283 if (spec->board_config < 0) {
3284 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3285 " STAC92HD73XX, using BIOS defaults\n");
3286 err = stac92xx_save_bios_config_regs(codec);
3287 if (err < 0) {
3288 stac92xx_free(codec);
3289 return err;
3290 }
3291 spec->pin_configs = spec->bios_pin_configs;
3292 } else {
3293 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3294 stac92xx_set_config_regs(codec);
3295 }
3296
3297 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3298 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3299
3300 if (spec->multiout.num_dacs < 0) {
3301 printk(KERN_WARNING "hda_codec: Could not determine "
3302 "number of channels defaulting to DAC count\n");
3303 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3304 }
3305
3306 switch (spec->multiout.num_dacs) {
3307 case 0x3: /* 6 Channel */
3308 spec->mixer = stac92hd73xx_6ch_mixer;
3309 spec->init = stac92hd73xx_6ch_core_init;
3310 break;
3311 case 0x4: /* 8 Channel */
3312 spec->multiout.hp_nid = 0x18;
3313 spec->mixer = stac92hd73xx_8ch_mixer;
3314 spec->init = stac92hd73xx_8ch_core_init;
3315 break;
3316 case 0x5: /* 10 Channel */
3317 spec->multiout.hp_nid = 0x19;
3318 spec->mixer = stac92hd73xx_10ch_mixer;
3319 spec->init = stac92hd73xx_10ch_core_init;
3320 };
3321
3322 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3323 spec->aloopback_mask = 0x01;
3324 spec->aloopback_shift = 8;
3325
3326 spec->mux_nids = stac92hd73xx_mux_nids;
3327 spec->adc_nids = stac92hd73xx_adc_nids;
3328 spec->dmic_nids = stac92hd73xx_dmic_nids;
3329 spec->dmux_nids = stac92hd73xx_dmux_nids;
3330
3331 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3332 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3333 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3334 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3335 spec->dinput_mux = &stac92hd73xx_dmux;
3336 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3337 spec->gpio_mask = spec->gpio_dir = 0x1;
3338 spec->gpio_data = 0x01;
e1f0d669 3339
a64135a2
MR		 3340 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3341 spec->pwr_nids = stac92hd73xx_pwr_nids;
3342
e1f0d669
MR		 3343 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3344
3345 if (!err) {
3346 if (spec->board_config < 0) {
3347 printk(KERN_WARNING "hda_codec: No auto-config is "
3348 "available, default to model=ref\n");
3349 spec->board_config = STAC_92HD73XX_REF;
3350 goto again;
3351 }
3352 err = -EINVAL;
3353 }
3354
3355 if (err < 0) {
3356 stac92xx_free(codec);
3357 return err;
3358 }
3359
3360 codec->patch_ops = stac92xx_patch_ops;
3361
3362 return 0;
3363}
3364
e035b841
MR		 3365static int patch_stac92hd71bxx(struct hda_codec *codec)
3366{
3367 struct sigmatel_spec *spec;
3368 int err = 0;
3369
3370 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3371 if (spec == NULL)
3372 return -ENOMEM;
3373
3374 codec->spec = spec;
3375 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3376 spec->pin_nids = stac92hd71bxx_pin_nids;
3377 spec->board_config = snd_hda_check_board_config(codec,
3378 STAC_92HD71BXX_MODELS,
3379 stac92hd71bxx_models,
3380 stac92hd71bxx_cfg_tbl);
3381again:
3382 if (spec->board_config < 0) {
3383 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3384 " STAC92HD71BXX, using BIOS defaults\n");
3385 err = stac92xx_save_bios_config_regs(codec);
3386 if (err < 0) {
3387 stac92xx_free(codec);
3388 return err;
3389 }
3390 spec->pin_configs = spec->bios_pin_configs;
3391 } else {
3392 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3393 stac92xx_set_config_regs(codec);
3394 }
3395
541eee87
MR		 3396 switch (codec->vendor_id) {
3397 case 0x111d76b6: /* 4 Port without Analog Mixer */
3398 case 0x111d76b7:
3399 case 0x111d76b4: /* 6 Port without Analog Mixer */
3400 case 0x111d76b5:
3401 spec->mixer = stac92hd71bxx_mixer;
3402 spec->init = stac92hd71bxx_core_init;
3403 break;
3404 default:
3405 spec->mixer = stac92hd71bxx_analog_mixer;
3406 spec->init = stac92hd71bxx_analog_core_init;
3407 }
3408
3409 spec->aloopback_mask = 0x20;
3410 spec->aloopback_shift = 0;
3411
4fe5195c
MR		 3412 /* GPIO0 High = EAPD */
3413 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3414
e035b841
MR		 3415 spec->mux_nids = stac92hd71bxx_mux_nids;
3416 spec->adc_nids = stac92hd71bxx_adc_nids;
3417 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3418 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3419
3420 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3421 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3422 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3423 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3424
a64135a2
MR		 3425 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3426 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3427
e035b841
MR		 3428 spec->multiout.num_dacs = 2;
3429 spec->multiout.hp_nid = 0x11;
3430 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3431
3432 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3433 if (!err) {
3434 if (spec->board_config < 0) {
3435 printk(KERN_WARNING "hda_codec: No auto-config is "
3436 "available, default to model=ref\n");
3437 spec->board_config = STAC_92HD71BXX_REF;
3438 goto again;
3439 }
3440 err = -EINVAL;
3441 }
3442
3443 if (err < 0) {
3444 stac92xx_free(codec);
3445 return err;
3446 }
3447
3448 codec->patch_ops = stac92xx_patch_ops;
3449
3450 return 0;
3451};
3452
2f2f4251
M		 3453static int patch_stac922x(struct hda_codec *codec)
3454{
3455 struct sigmatel_spec *spec;
c7d4b2fa 3456 int err;
2f2f4251 3457
e560d8d8 3458 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3459 if (spec == NULL)
3460 return -ENOMEM;
3461
3462 codec->spec = spec;
a4eed138 3463 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3464 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3465 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3466 stac922x_models,
3467 stac922x_cfg_tbl);
5d5d3bc3 3468 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3469 spec->gpio_mask = spec->gpio_dir = 0x03;
3470 spec->gpio_data = 0x03;
3fc24d85
TI		 3471 /* Intel Macs have all same PCI SSID, so we need to check
3472 * codec SSID to distinguish the exact models
3473 */
6f0778d8 3474 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3475 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3476
3477 case 0x106b0800:
3478 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3479 break;
5d5d3bc3
IZ		 3480 case 0x106b0600:
3481 case 0x106b0700:
3482 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3483 break;
5d5d3bc3
IZ		 3484 case 0x106b0e00:
3485 case 0x106b0f00:
3486 case 0x106b1600:
3487 case 0x106b1700:
3488 case 0x106b0200:
3489 case 0x106b1e00:
3490 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3491 break;
5d5d3bc3
IZ		 3492 case 0x106b1a00:
3493 case 0x00000100:
3494 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3495 break;
5d5d3bc3
IZ		 3496 case 0x106b0a00:
3497 case 0x106b2200:
3498 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3499 break;
3fc24d85
TI		 3500 }
3501 }
3502
9e507abd 3503 again:
11b44bbd
RF		 3504 if (spec->board_config < 0) {
3505 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3506 "using BIOS defaults\n");
3507 err = stac92xx_save_bios_config_regs(codec);
3508 if (err < 0) {
3509 stac92xx_free(codec);
3510 return err;
3511 }
3512 spec->pin_configs = spec->bios_pin_configs;
3513 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3514 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3515 stac92xx_set_config_regs(codec);
3516 }
2f2f4251 3517
c7d4b2fa
M		 3518 spec->adc_nids = stac922x_adc_nids;
3519 spec->mux_nids = stac922x_mux_nids;
2549413e 3520 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3521 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3522 spec->num_dmics = 0;
a64135a2 3523 spec->num_pwrs = 0;
c7d4b2fa
M		 3524
3525 spec->init = stac922x_core_init;
2f2f4251 3526 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3527
3528 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3529
3cc08dc6 3530 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3531 if (!err) {
3532 if (spec->board_config < 0) {
3533 printk(KERN_WARNING "hda_codec: No auto-config is "
3534 "available, default to model=ref\n");
3535 spec->board_config = STAC_D945_REF;
3536 goto again;
3537 }
3538 err = -EINVAL;
3539 }
3cc08dc6
MP		 3540 if (err < 0) {
3541 stac92xx_free(codec);
3542 return err;
3543 }
3544
3545 codec->patch_ops = stac92xx_patch_ops;
3546
807a4636
TI		 3547 /* Fix Mux capture level; max to 2 */
3548 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3549 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3550 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3551 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3552 (0 << AC_AMPCAP_MUTE_SHIFT));
3553
3cc08dc6
MP		 3554 return 0;
3555}
3556
3557static int patch_stac927x(struct hda_codec *codec)
3558{
3559 struct sigmatel_spec *spec;
3560 int err;
3561
3562 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3563 if (spec == NULL)
3564 return -ENOMEM;
3565
3566 codec->spec = spec;
a4eed138 3567 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3568 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3569 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3570 stac927x_models,
3571 stac927x_cfg_tbl);
9e507abd 3572 again:
8e9068b1
MR		 3573 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3574 if (spec->board_config < 0)
3575 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3576 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3577 err = stac92xx_save_bios_config_regs(codec);
3578 if (err < 0) {
3579 stac92xx_free(codec);
3580 return err;
3581 }
3582 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3583 } else {
3cc08dc6
MP		 3584 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3585 stac92xx_set_config_regs(codec);
3586 }
3587
8e9068b1
MR		 3588 spec->adc_nids = stac927x_adc_nids;
3589 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3590 spec->mux_nids = stac927x_mux_nids;
3591 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3592 spec->multiout.dac_nids = spec->dac_nids;
3593
81d3dbde 3594 switch (spec->board_config) {
93ed1503 3595 case STAC_D965_3ST:
93ed1503 3596 case STAC_D965_5ST:
8e9068b1 3597 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3598 spec->gpio_mask = spec->gpio_dir = 0x01;
3599 spec->gpio_data = 0x01;
8e9068b1
MR		 3600 spec->num_dmics = 0;
3601
93ed1503 3602 spec->init = d965_core_init;
9e05b7a3 3603 spec->mixer = stac927x_mixer;
81d3dbde 3604 break;
8e9068b1 3605 case STAC_DELL_BIOS:
2f32d909
MR		 3606 /* correct the front output jack as a hp out */
3607 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3608 /* correct the front input jack as a mic */
3609 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3610 /* fallthru */
8e9068b1
MR		 3611 case STAC_DELL_3ST:
3612 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3613 spec->gpio_mask = spec->gpio_dir = 0x04;
3614 spec->gpio_data = 0x04;
7f16859a
MR		 3615 spec->dmic_nids = stac927x_dmic_nids;
3616 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3617
8e9068b1
MR		 3618 spec->init = d965_core_init;
3619 spec->mixer = stac927x_mixer;
3620 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3621 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3622 break;
3623 default:
f1f208d0 3624 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3625 spec->gpio_mask = spec->gpio_dir = 0x1;
3626 spec->gpio_data = 0x01;
8e9068b1
MR		 3627 spec->num_dmics = 0;
3628
3629 spec->init = stac927x_core_init;
3630 spec->mixer = stac927x_mixer;
7f16859a
MR		 3631 }
3632
a64135a2 3633 spec->num_pwrs = 0;
e1f0d669
MR		 3634 spec->aloopback_mask = 0x40;
3635 spec->aloopback_shift = 0;
8e9068b1 3636
3cc08dc6 3637 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3638 if (!err) {
3639 if (spec->board_config < 0) {
3640 printk(KERN_WARNING "hda_codec: No auto-config is "
3641 "available, default to model=ref\n");
3642 spec->board_config = STAC_D965_REF;
3643 goto again;
3644 }
3645 err = -EINVAL;
3646 }
c7d4b2fa
M		 3647 if (err < 0) {
3648 stac92xx_free(codec);
3649 return err;
3650 }
2f2f4251
M		 3651
3652 codec->patch_ops = stac92xx_patch_ops;
3653
52987656
TI		 3654 /*
3655 * !!FIXME!!
3656 * The STAC927x seem to require fairly long delays for certain
3657 * command sequences. With too short delays (even if the answer
3658 * is set to RIRB properly), it results in the silence output
3659 * on some hardwares like Dell.
3660 *
3661 * The below flag enables the longer delay (see get_response
3662 * in hda_intel.c).
3663 */
3664 codec->bus->needs_damn_long_delay = 1;
3665
2f2f4251
M		 3666 return 0;
3667}
3668
f3302a59
MP		 3669static int patch_stac9205(struct hda_codec *codec)
3670{
3671 struct sigmatel_spec *spec;
8259980e 3672 int err;
f3302a59
MP		 3673
3674 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3675 if (spec == NULL)
3676 return -ENOMEM;
3677
3678 codec->spec = spec;
a4eed138 3679 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3680 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3681 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3682 stac9205_models,
3683 stac9205_cfg_tbl);
9e507abd 3684 again:
11b44bbd
RF		 3685 if (spec->board_config < 0) {
3686 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3687 err = stac92xx_save_bios_config_regs(codec);
3688 if (err < 0) {
3689 stac92xx_free(codec);
3690 return err;
3691 }
3692 spec->pin_configs = spec->bios_pin_configs;
3693 } else {
f3302a59
MP		 3694 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3695 stac92xx_set_config_regs(codec);
3696 }
3697
3698 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3699 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3700 spec->mux_nids = stac9205_mux_nids;
2549413e 3701 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3702 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3703 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3704 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3705 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3706 spec->num_pwrs = 0;
f3302a59
MP		 3707
3708 spec->init = stac9205_core_init;
3709 spec->mixer = stac9205_mixer;
3710
e1f0d669
MR		 3711 spec->aloopback_mask = 0x40;
3712 spec->aloopback_shift = 0;
f3302a59 3713 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3714
ae0a8ed8 3715 switch (spec->board_config){
ae0a8ed8 3716 case STAC_9205_DELL_M43:
87d48363
MR		 3717 /* Enable SPDIF in/out */
3718 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3719 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3720
4fe5195c
MR		 3721 /* Enable unsol response for GPIO4/Dock HP connection */
3722 snd_hda_codec_write(codec, codec->afg, 0,
3723 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3724 snd_hda_codec_write_cache(codec, codec->afg, 0,
3725 AC_VERB_SET_UNSOLICITED_ENABLE,
3726 (AC_USRSP_EN | STAC_HP_EVENT));
3727
3728 spec->gpio_dir = 0x0b;
3729 spec->gpio_mask = 0x1b;
3730 spec->gpio_mute = 0x10;
e2e7d624 3731 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3732 * GPIO3 Low = DRM
87d48363 3733 */
4fe5195c 3734 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3735 break;
3736 default:
3737 /* GPIO0 High = EAPD */
4fe5195c
MR		 3738 spec->gpio_mask = spec->gpio_dir = 0x1;
3739 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3740 break;
3741 }
33382403 3742
f3302a59 3743 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3744 if (!err) {
3745 if (spec->board_config < 0) {
3746 printk(KERN_WARNING "hda_codec: No auto-config is "
3747 "available, default to model=ref\n");
3748 spec->board_config = STAC_9205_REF;
3749 goto again;
3750 }
3751 err = -EINVAL;
3752 }
f3302a59
MP		 3753 if (err < 0) {
3754 stac92xx_free(codec);
3755 return err;
3756 }
3757
3758 codec->patch_ops = stac92xx_patch_ops;
3759
3760 return 0;
3761}
3762
db064e50 3763/*
6d859065 3764 * STAC9872 hack
db064e50
TI		 3765 */
3766
99ccc560 3767/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3768static hda_nid_t vaio_dacs[] = { 0x2 };
3769#define VAIO_HP_DAC 0x5
3770static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3771static hda_nid_t vaio_mux_nids[] = { 0x15 };
3772
3773static struct hda_input_mux vaio_mux = {
a3a2f429 3774 .num_items = 3,
db064e50 3775 .items = {
d773781c 3776 /* { "HP", 0x0 }, */
1624cb9a
TI		 3777 { "Mic Jack", 0x1 },
3778 { "Internal Mic", 0x2 },
db064e50
TI		 3779 { "PCM", 0x3 },
3780 }
3781};
3782
3783static struct hda_verb vaio_init[] = {
3784 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3785 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3786 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3787 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3788 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3789 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3790 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3791 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3792 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3793 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3794 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3795 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3796 {}
3797};
3798
6d859065
GM		 3799static struct hda_verb vaio_ar_init[] = {
3800 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3801 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3802 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3803 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3804/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3805 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3806 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3807 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3808 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3809/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3810 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3811 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3812 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3813 {}
3814};
3815
db064e50 3816/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3817static struct hda_bind_ctls vaio_bind_master_vol = {
3818 .ops = &snd_hda_bind_vol,
3819 .values = {
3820 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3821 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3822 0
3823 },
3824};
db064e50
TI		 3825
3826/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3827static struct hda_bind_ctls vaio_bind_master_sw = {
3828 .ops = &snd_hda_bind_sw,
3829 .values = {
3830 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3831 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3832 0,
3833 },
3834};
db064e50
TI		 3835
3836static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3837 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3838 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3839 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3840 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3841 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3842 {
3843 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3844 .name = "Capture Source",
3845 .count = 1,
3846 .info = stac92xx_mux_enum_info,
3847 .get = stac92xx_mux_enum_get,
3848 .put = stac92xx_mux_enum_put,
3849 },
3850 {}
3851};
3852
6d859065 3853static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3854 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3855 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3856 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3857 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3858 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3859 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3860 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3861 {
3862 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3863 .name = "Capture Source",
3864 .count = 1,
3865 .info = stac92xx_mux_enum_info,
3866 .get = stac92xx_mux_enum_get,
3867 .put = stac92xx_mux_enum_put,
3868 },
3869 {}
3870};
3871
3872static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3873 .build_controls = stac92xx_build_controls,
3874 .build_pcms = stac92xx_build_pcms,
3875 .init = stac92xx_init,
3876 .free = stac92xx_free,
cb53c626 3877#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3878 .resume = stac92xx_resume,
3879#endif
3880};
3881
72e7b0dd
TI		 3882static int stac9872_vaio_init(struct hda_codec *codec)
3883{
3884 int err;
3885
3886 err = stac92xx_init(codec);
3887 if (err < 0)
3888 return err;
3889 if (codec->patch_ops.unsol_event)
3890 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3891 return 0;
3892}
3893
3894static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3895{
40c1d308 3896 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3897 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3898 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3899 } else {
3900 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3901 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3902 }
3903}
3904
3905static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3906{
3907 switch (res >> 26) {
3908 case STAC_HP_EVENT:
3909 stac9872_vaio_hp_detect(codec, res);
3910 break;
3911 }
3912}
3913
3914static struct hda_codec_ops stac9872_vaio_patch_ops = {
3915 .build_controls = stac92xx_build_controls,
3916 .build_pcms = stac92xx_build_pcms,
3917 .init = stac9872_vaio_init,
3918 .free = stac92xx_free,
3919 .unsol_event = stac9872_vaio_unsol_event,
3920#ifdef CONFIG_PM
3921 .resume = stac92xx_resume,
3922#endif
3923};
3924
6d859065
GM		 3925enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3926 CXD9872RD_VAIO,
3927 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3928 STAC9872AK_VAIO,
3929 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3930 STAC9872K_VAIO,
3931 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3932 CXD9872AKD_VAIO,
3933 STAC_9872_MODELS,
3934};
3935
3936static const char *stac9872_models[STAC_9872_MODELS] = {
3937 [CXD9872RD_VAIO] = "vaio",
3938 [CXD9872AKD_VAIO] = "vaio-ar",
3939};
3940
3941static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3942 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3943 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3944 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3945 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3946 {}
3947};
3948
6d859065 3949static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3950{
3951 struct sigmatel_spec *spec;
3952 int board_config;
3953
f5fcc13c
TI		 3954 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3955 stac9872_models,
3956 stac9872_cfg_tbl);
db064e50
TI		 3957 if (board_config < 0)
3958 /* unknown config, let generic-parser do its job... */
3959 return snd_hda_parse_generic_codec(codec);
3960
3961 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3962 if (spec == NULL)
3963 return -ENOMEM;
3964
3965 codec->spec = spec;
3966 switch (board_config) {
6d859065
GM		 3967 case CXD9872RD_VAIO:
3968 case STAC9872AK_VAIO:
3969 case STAC9872K_VAIO:
db064e50
TI		 3970 spec->mixer = vaio_mixer;
3971 spec->init = vaio_init;
3972 spec->multiout.max_channels = 2;
3973 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3974 spec->multiout.dac_nids = vaio_dacs;
3975 spec->multiout.hp_nid = VAIO_HP_DAC;
3976 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3977 spec->adc_nids = vaio_adcs;
a64135a2 3978 spec->num_pwrs = 0;
db064e50
TI		 3979 spec->input_mux = &vaio_mux;
3980 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3981 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3982 break;
6d859065
GM		 3983
3984 case CXD9872AKD_VAIO:
3985 spec->mixer = vaio_ar_mixer;
3986 spec->init = vaio_ar_init;
3987 spec->multiout.max_channels = 2;
3988 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3989 spec->multiout.dac_nids = vaio_dacs;
3990 spec->multiout.hp_nid = VAIO_HP_DAC;
3991 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3992 spec->num_pwrs = 0;
6d859065
GM		 3993 spec->adc_nids = vaio_adcs;
3994 spec->input_mux = &vaio_mux;
3995 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3996 codec->patch_ops = stac9872_patch_ops;
6d859065 3997 break;
db064e50
TI		 3998 }
3999
db064e50
TI		 4000 return 0;
4001}
4002
4003
2f2f4251
M		 4004/*
4005 * patch entries
4006 */
4007struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4008 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4009 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4010 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4011 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4012 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4013 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4014 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4015 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4016 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4017 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4018 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4019 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4020 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4021 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4022 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4023 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4024 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4025 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4026 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4027 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4028 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4029 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4030 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4031 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4032 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4033 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4034 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4035 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4036 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4037 /* The following does not take into account .id=0x83847661 when subsys =
4038 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4039 * currently not fully supported.
4040 */
4041 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4042 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4043 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4044 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4045 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4046 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4047 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4048 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4049 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4050 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4051 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4052 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4053 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4054 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4055 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4056 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4057 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4058 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4059 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4060 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4061 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4062 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4063 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4064 {} /* terminator */
4065};
Linux kernel - Deliverables
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