ALSA: hda - Connect to primary DAC if no individual DAC is available
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M
34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI
38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c 45enum {
1607b8ea 46 STAC_AUTO,
f5fcc13c 47 STAC_REF,
bf277785 48 STAC_9200_OQO,
dfe495d0
TI
49 STAC_9200_DELL_D21,
50 STAC_9200_DELL_D22,
51 STAC_9200_DELL_D23,
52 STAC_9200_DELL_M21,
53 STAC_9200_DELL_M22,
54 STAC_9200_DELL_M23,
55 STAC_9200_DELL_M24,
56 STAC_9200_DELL_M25,
57 STAC_9200_DELL_M26,
58 STAC_9200_DELL_M27,
58eec423
MCC
59 STAC_9200_M4,
60 STAC_9200_M4_2,
117f257d 61 STAC_9200_PANASONIC,
f5fcc13c
TI
62 STAC_9200_MODELS
63};
64
65enum {
1607b8ea 66 STAC_9205_AUTO,
f5fcc13c 67 STAC_9205_REF,
dfe495d0 68 STAC_9205_DELL_M42,
ae0a8ed8
TD
69 STAC_9205_DELL_M43,
70 STAC_9205_DELL_M44,
d9a4268e 71 STAC_9205_EAPD,
f5fcc13c
TI
72 STAC_9205_MODELS
73};
74
e1f0d669 75enum {
1607b8ea 76 STAC_92HD73XX_AUTO,
9e43f0de 77 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 78 STAC_92HD73XX_REF,
661cd8fb
TI
79 STAC_DELL_M6_AMIC,
80 STAC_DELL_M6_DMIC,
81 STAC_DELL_M6_BOTH,
6b3ab21e 82 STAC_DELL_EQ,
e1f0d669
MR
83 STAC_92HD73XX_MODELS
84};
85
d0513fc6 86enum {
1607b8ea 87 STAC_92HD83XXX_AUTO,
d0513fc6 88 STAC_92HD83XXX_REF,
32ed3f46 89 STAC_92HD83XXX_PWR_REF,
8bb0ac55 90 STAC_DELL_S14,
d0513fc6
MR
91 STAC_92HD83XXX_MODELS
92};
93
e035b841 94enum {
1607b8ea 95 STAC_92HD71BXX_AUTO,
e035b841 96 STAC_92HD71BXX_REF,
a7662640
MR
97 STAC_DELL_M4_1,
98 STAC_DELL_M4_2,
3a7abfd2 99 STAC_DELL_M4_3,
6a14f585 100 STAC_HP_M4,
1b0652eb 101 STAC_HP_DV5,
e035b841
MR
102 STAC_92HD71BXX_MODELS
103};
104
8e21c34c 105enum {
1607b8ea 106 STAC_925x_AUTO,
8e21c34c 107 STAC_925x_REF,
9cb36c2a
MCC
108 STAC_M1,
109 STAC_M1_2,
110 STAC_M2,
8e21c34c 111 STAC_M2_2,
9cb36c2a
MCC
112 STAC_M3,
113 STAC_M5,
114 STAC_M6,
8e21c34c
TD
115 STAC_925x_MODELS
116};
117
f5fcc13c 118enum {
1607b8ea 119 STAC_922X_AUTO,
f5fcc13c
TI
120 STAC_D945_REF,
121 STAC_D945GTP3,
122 STAC_D945GTP5,
5d5d3bc3
IZ
123 STAC_INTEL_MAC_V1,
124 STAC_INTEL_MAC_V2,
125 STAC_INTEL_MAC_V3,
126 STAC_INTEL_MAC_V4,
127 STAC_INTEL_MAC_V5,
536319af
NB
128 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
129 * is given, one of the above models will be
130 * chosen according to the subsystem id. */
dfe495d0 131 /* for backward compatibility */
f5fcc13c 132 STAC_MACMINI,
3fc24d85 133 STAC_MACBOOK,
6f0778d8
NB
134 STAC_MACBOOK_PRO_V1,
135 STAC_MACBOOK_PRO_V2,
f16928fb 136 STAC_IMAC_INTEL,
0dae0f83 137 STAC_IMAC_INTEL_20,
8c650087 138 STAC_ECS_202,
dfe495d0
TI
139 STAC_922X_DELL_D81,
140 STAC_922X_DELL_D82,
141 STAC_922X_DELL_M81,
142 STAC_922X_DELL_M82,
f5fcc13c
TI
143 STAC_922X_MODELS
144};
145
146enum {
1607b8ea 147 STAC_927X_AUTO,
e28d8322 148 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI
149 STAC_D965_REF,
150 STAC_D965_3ST,
151 STAC_D965_5ST,
4ff076e5 152 STAC_DELL_3ST,
8e9068b1 153 STAC_DELL_BIOS,
f5fcc13c
TI
154 STAC_927X_MODELS
155};
403d1944 156
74aeaabc
MR
157struct sigmatel_event {
158 hda_nid_t nid;
c6e4c666
TI
159 unsigned char type;
160 unsigned char tag;
74aeaabc
MR
161 int data;
162};
163
164struct sigmatel_jack {
165 hda_nid_t nid;
166 int type;
167 struct snd_jack *jack;
168};
169
2f2f4251 170struct sigmatel_spec {
c8b6bf9b 171 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M
172 unsigned int num_mixers;
173
403d1944 174 int board_config;
c0cea0d0 175 unsigned int eapd_switch: 1;
c7d4b2fa 176 unsigned int surr_switch: 1;
3cc08dc6 177 unsigned int alt_switch: 1;
82bc955f 178 unsigned int hp_detect: 1;
00ef50c2 179 unsigned int spdif_mute: 1;
7c7767eb 180 unsigned int check_volume_offset:1;
c7d4b2fa 181
4fe5195c 182 /* gpio lines */
0fc9dec4 183 unsigned int eapd_mask;
4fe5195c
MR
184 unsigned int gpio_mask;
185 unsigned int gpio_dir;
186 unsigned int gpio_data;
187 unsigned int gpio_mute;
188
8daaaa97
MR
189 /* stream */
190 unsigned int stream_delay;
191
4fe5195c 192 /* analog loopback */
d78d7a90 193 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR
194 unsigned char aloopback_mask;
195 unsigned char aloopback_shift;
8259980e 196
a64135a2
MR
197 /* power management */
198 unsigned int num_pwrs;
d0513fc6 199 unsigned int *pwr_mapping;
a64135a2 200 hda_nid_t *pwr_nids;
b76c850f 201 hda_nid_t *dac_list;
a64135a2 202
74aeaabc
MR
203 /* jack detection */
204 struct snd_array jacks;
205
206 /* events */
207 struct snd_array events;
208
2f2f4251 209 /* playback */
b22b4821 210 struct hda_input_mux *mono_mux;
89385035 211 struct hda_input_mux *amp_mux;
b22b4821 212 unsigned int cur_mmux;
2f2f4251 213 struct hda_multi_out multiout;
3cc08dc6 214 hda_nid_t dac_nids[5];
c21ca4a8
TI
215 hda_nid_t hp_dacs[5];
216 hda_nid_t speaker_dacs[5];
2f2f4251 217
7c7767eb
TI
218 int volume_offset;
219
2f2f4251
M
220 /* capture */
221 hda_nid_t *adc_nids;
2f2f4251 222 unsigned int num_adcs;
dabbed6f
M
223 hda_nid_t *mux_nids;
224 unsigned int num_muxes;
8b65727b
MP
225 hda_nid_t *dmic_nids;
226 unsigned int num_dmics;
e1f0d669 227 hda_nid_t *dmux_nids;
1697055e 228 unsigned int num_dmuxes;
d9737751
MR
229 hda_nid_t *smux_nids;
230 unsigned int num_smuxes;
65973632 231 const char **spdif_labels;
d9737751 232
dabbed6f 233 hda_nid_t dig_in_nid;
b22b4821 234 hda_nid_t mono_nid;
1cd2224c
MR
235 hda_nid_t anabeep_nid;
236 hda_nid_t digbeep_nid;
2f2f4251 237
2f2f4251
M
238 /* pin widgets */
239 hda_nid_t *pin_nids;
240 unsigned int num_pins;
2f2f4251
M
241
242 /* codec specific stuff */
243 struct hda_verb *init;
c8b6bf9b 244 struct snd_kcontrol_new *mixer;
2f2f4251
M
245
246 /* capture source */
8b65727b 247 struct hda_input_mux *dinput_mux;
e1f0d669 248 unsigned int cur_dmux[2];
c7d4b2fa 249 struct hda_input_mux *input_mux;
3cc08dc6 250 unsigned int cur_mux[3];
d9737751
MR
251 struct hda_input_mux *sinput_mux;
252 unsigned int cur_smux[2];
2a9c7816
MR
253 unsigned int cur_amux;
254 hda_nid_t *amp_nids;
255 unsigned int num_amps;
8daaaa97 256 unsigned int powerdown_adcs;
2f2f4251 257
403d1944
MP
258 /* i/o switches */
259 unsigned int io_switch[2];
0fb87bb4 260 unsigned int clfe_swap;
c21ca4a8
TI
261 hda_nid_t line_switch; /* shared line-in for input and output */
262 hda_nid_t mic_switch; /* shared mic-in for input and output */
263 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 264 unsigned int aloopback;
2f2f4251 265
c7d4b2fa
M
266 struct hda_pcm pcm_rec[2]; /* PCM information */
267
268 /* dynamic controls and input_mux */
269 struct auto_pin_cfg autocfg;
603c4019 270 struct snd_array kctls;
8b65727b 271 struct hda_input_mux private_dimux;
c7d4b2fa 272 struct hda_input_mux private_imux;
d9737751 273 struct hda_input_mux private_smux;
89385035 274 struct hda_input_mux private_amp_mux;
b22b4821 275 struct hda_input_mux private_mono_mux;
2f2f4251
M
276};
277
278static hda_nid_t stac9200_adc_nids[1] = {
279 0x03,
280};
281
282static hda_nid_t stac9200_mux_nids[1] = {
283 0x0c,
284};
285
286static hda_nid_t stac9200_dac_nids[1] = {
287 0x02,
288};
289
a64135a2
MR
290static hda_nid_t stac92hd73xx_pwr_nids[8] = {
291 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
292 0x0f, 0x10, 0x11
293};
294
0ffa9807
MR
295static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
296 0x26, 0,
297};
298
e1f0d669
MR
299static hda_nid_t stac92hd73xx_adc_nids[2] = {
300 0x1a, 0x1b
301};
302
2a9c7816
MR
303#define DELL_M6_AMP 2
304static hda_nid_t stac92hd73xx_amp_nids[3] = {
305 0x0b, 0x0c, 0x0e
89385035
MR
306};
307
e1f0d669
MR
308#define STAC92HD73XX_NUM_DMICS 2
309static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
310 0x13, 0x14, 0
311};
312
313#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR
314
315static hda_nid_t stac92hd73xx_mux_nids[4] = {
316 0x28, 0x29, 0x2a, 0x2b,
317};
318
319static hda_nid_t stac92hd73xx_dmux_nids[2] = {
320 0x20, 0x21,
321};
322
d9737751
MR
323static hda_nid_t stac92hd73xx_smux_nids[2] = {
324 0x22, 0x23,
325};
326
d0513fc6
MR
327#define STAC92HD83XXX_NUM_DMICS 2
328static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
329 0x11, 0x12, 0
330};
331
d0513fc6 332#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR
333
334static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
335 0x17, 0x18,
336};
337
338static hda_nid_t stac92hd83xxx_adc_nids[2] = {
339 0x15, 0x16,
340};
341
342static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
343 0xa, 0xb, 0xd, 0xe,
344};
345
0ffa9807
MR
346static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
347 0x1e, 0,
348};
349
d0513fc6 350static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 351 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR
352};
353
9248f269 354static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR
355 0xc,
356};
357
a64135a2
MR
358static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
359 0x0a, 0x0d, 0x0f
360};
361
e035b841
MR
362static hda_nid_t stac92hd71bxx_adc_nids[2] = {
363 0x12, 0x13,
364};
365
366static hda_nid_t stac92hd71bxx_mux_nids[2] = {
367 0x1a, 0x1b
368};
369
4b33c767
MR
370static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
371 0x1c, 0x1d,
e1f0d669
MR
372};
373
d9737751
MR
374static hda_nid_t stac92hd71bxx_smux_nids[2] = {
375 0x24, 0x25,
376};
377
e035b841
MR
378#define STAC92HD71BXX_NUM_DMICS 2
379static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
380 0x18, 0x19, 0
381};
382
0ffa9807
MR
383static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
384 0x22, 0
385};
386
8e21c34c
TD
387static hda_nid_t stac925x_adc_nids[1] = {
388 0x03,
389};
390
391static hda_nid_t stac925x_mux_nids[1] = {
392 0x0f,
393};
394
395static hda_nid_t stac925x_dac_nids[1] = {
396 0x02,
397};
398
f6e9852a
TI
399#define STAC925X_NUM_DMICS 1
400static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
401 0x15, 0
2c11f955
TD
402};
403
1697055e
TI
404static hda_nid_t stac925x_dmux_nids[1] = {
405 0x14,
406};
407
2f2f4251
M
408static hda_nid_t stac922x_adc_nids[2] = {
409 0x06, 0x07,
410};
411
412static hda_nid_t stac922x_mux_nids[2] = {
413 0x12, 0x13,
414};
415
45c1d85b
MR
416static hda_nid_t stac927x_slave_dig_outs[2] = {
417 0x1f, 0,
418};
419
3cc08dc6
MP
420static hda_nid_t stac927x_adc_nids[3] = {
421 0x07, 0x08, 0x09
422};
423
424static hda_nid_t stac927x_mux_nids[3] = {
425 0x15, 0x16, 0x17
426};
427
d9737751
MR
428static hda_nid_t stac927x_smux_nids[1] = {
429 0x21,
430};
431
b76c850f
MR
432static hda_nid_t stac927x_dac_nids[6] = {
433 0x02, 0x03, 0x04, 0x05, 0x06, 0
434};
435
e1f0d669
MR
436static hda_nid_t stac927x_dmux_nids[1] = {
437 0x1b,
438};
439
7f16859a
MR
440#define STAC927X_NUM_DMICS 2
441static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
442 0x13, 0x14, 0
443};
444
65973632
MR
445static const char *stac927x_spdif_labels[5] = {
446 "Digital Playback", "ADAT", "Analog Mux 1",
447 "Analog Mux 2", "Analog Mux 3"
448};
449
f3302a59
MP
450static hda_nid_t stac9205_adc_nids[2] = {
451 0x12, 0x13
452};
453
454static hda_nid_t stac9205_mux_nids[2] = {
455 0x19, 0x1a
456};
457
e1f0d669 458static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 459 0x1d,
e1f0d669
MR
460};
461
d9737751
MR
462static hda_nid_t stac9205_smux_nids[1] = {
463 0x21,
464};
465
f6e9852a
TI
466#define STAC9205_NUM_DMICS 2
467static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
468 0x17, 0x18, 0
8b65727b
MP
469};
470
c7d4b2fa 471static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
472 0x08, 0x09, 0x0d, 0x0e,
473 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
474};
475
8e21c34c
TD
476static hda_nid_t stac925x_pin_nids[8] = {
477 0x07, 0x08, 0x0a, 0x0b,
478 0x0c, 0x0d, 0x10, 0x11,
479};
480
2f2f4251
M
481static hda_nid_t stac922x_pin_nids[10] = {
482 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
483 0x0f, 0x10, 0x11, 0x15, 0x1b,
484};
485
a7662640 486static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
487 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
488 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 489 0x14, 0x22, 0x23
e1f0d669
MR
490};
491
8bb0ac55 492static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 493 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 494 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 495};
616f89e7
HRK
496
497#define STAC92HD71BXX_NUM_PINS 13
498static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
499 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
500 0x00, 0x14, 0x18, 0x19, 0x1e,
501 0x1f, 0x20, 0x27
502};
503static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
504 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
505 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 506 0x1f, 0x20, 0x27
e035b841
MR
507};
508
3cc08dc6
MP
509static hda_nid_t stac927x_pin_nids[14] = {
510 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
511 0x0f, 0x10, 0x11, 0x12, 0x13,
512 0x14, 0x21, 0x22, 0x23,
513};
514
f3302a59
MP
515static hda_nid_t stac9205_pin_nids[12] = {
516 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
517 0x0f, 0x14, 0x16, 0x17, 0x18,
518 0x21, 0x22,
f3302a59
MP
519};
520
89385035
MR
521#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
522
523static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol)
525{
526 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
527 struct sigmatel_spec *spec = codec->spec;
528 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
529
530 kcontrol->private_value ^= get_amp_nid(kcontrol);
531 kcontrol->private_value |= nid;
532
533 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
534}
535
536static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
541 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
542
543 kcontrol->private_value ^= get_amp_nid(kcontrol);
544 kcontrol->private_value |= nid;
545
546 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
547}
548
8b65727b
MP
549static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_info *uinfo)
551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
554 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
555}
556
557static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
558 struct snd_ctl_elem_value *ucontrol)
559{
560 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
561 struct sigmatel_spec *spec = codec->spec;
e1f0d669 562 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 563
e1f0d669 564 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
565 return 0;
566}
567
568static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570{
571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
572 struct sigmatel_spec *spec = codec->spec;
e1f0d669 573 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
574
575 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 576 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
577}
578
d9737751
MR
579static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_info *uinfo)
581{
582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
583 struct sigmatel_spec *spec = codec->spec;
584 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
585}
586
587static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
588 struct snd_ctl_elem_value *ucontrol)
589{
590 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
591 struct sigmatel_spec *spec = codec->spec;
592 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
593
594 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
595 return 0;
596}
597
598static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
599 struct snd_ctl_elem_value *ucontrol)
600{
601 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
602 struct sigmatel_spec *spec = codec->spec;
00ef50c2 603 struct hda_input_mux *smux = &spec->private_smux;
d9737751 604 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
605 int err, val;
606 hda_nid_t nid;
d9737751 607
00ef50c2 608 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 609 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
610 if (err < 0)
611 return err;
612
613 if (spec->spdif_mute) {
614 if (smux_idx == 0)
615 nid = spec->multiout.dig_out_nid;
616 else
617 nid = codec->slave_dig_outs[smux_idx - 1];
618 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 619 val = HDA_AMP_MUTE;
00ef50c2 620 else
c9b46f91 621 val = 0;
00ef50c2 622 /* un/mute SPDIF out */
c9b46f91
TI
623 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
624 HDA_AMP_MUTE, val);
00ef50c2
MR
625 }
626 return 0;
d9737751
MR
627}
628
c8b6bf9b 629static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
630{
631 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
632 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 633 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
634}
635
c8b6bf9b 636static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
637{
638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
639 struct sigmatel_spec *spec = codec->spec;
640 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
641
642 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
643 return 0;
644}
645
c8b6bf9b 646static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
651
c7d4b2fa 652 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
653 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
654}
655
b22b4821
MR
656static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_info *uinfo)
658{
659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
660 struct sigmatel_spec *spec = codec->spec;
661 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
662}
663
664static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
665 struct snd_ctl_elem_value *ucontrol)
666{
667 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
668 struct sigmatel_spec *spec = codec->spec;
669
670 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
671 return 0;
672}
673
674static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
675 struct snd_ctl_elem_value *ucontrol)
676{
677 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
678 struct sigmatel_spec *spec = codec->spec;
679
680 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
681 spec->mono_nid, &spec->cur_mmux);
682}
683
89385035
MR
684static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
685 struct snd_ctl_elem_info *uinfo)
686{
687 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
688 struct sigmatel_spec *spec = codec->spec;
689 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
690}
691
692static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
693 struct snd_ctl_elem_value *ucontrol)
694{
695 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
696 struct sigmatel_spec *spec = codec->spec;
697
698 ucontrol->value.enumerated.item[0] = spec->cur_amux;
699 return 0;
700}
701
702static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
703 struct snd_ctl_elem_value *ucontrol)
704{
705 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
706 struct sigmatel_spec *spec = codec->spec;
707 struct snd_kcontrol *ctl =
708 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
709 if (!ctl)
710 return -EINVAL;
711
712 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
713 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
714
715 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
716 0, &spec->cur_amux);
717}
718
5f10c4a9
ML
719#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
720
721static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
722 struct snd_ctl_elem_value *ucontrol)
723{
724 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 725 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
726 struct sigmatel_spec *spec = codec->spec;
727
e1f0d669
MR
728 ucontrol->value.integer.value[0] = !!(spec->aloopback &
729 (spec->aloopback_mask << idx));
5f10c4a9
ML
730 return 0;
731}
732
733static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
734 struct snd_ctl_elem_value *ucontrol)
735{
736 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
737 struct sigmatel_spec *spec = codec->spec;
e1f0d669 738 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 739 unsigned int dac_mode;
e1f0d669 740 unsigned int val, idx_val;
5f10c4a9 741
e1f0d669
MR
742 idx_val = spec->aloopback_mask << idx;
743 if (ucontrol->value.integer.value[0])
744 val = spec->aloopback | idx_val;
745 else
746 val = spec->aloopback & ~idx_val;
68ea7b2f 747 if (spec->aloopback == val)
5f10c4a9
ML
748 return 0;
749
68ea7b2f 750 spec->aloopback = val;
5f10c4a9 751
e1f0d669
MR
752 /* Only return the bits defined by the shift value of the
753 * first two bytes of the mask
754 */
5f10c4a9 755 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
756 kcontrol->private_value & 0xFFFF, 0x0);
757 dac_mode >>= spec->aloopback_shift;
5f10c4a9 758
e1f0d669 759 if (spec->aloopback & idx_val) {
5f10c4a9 760 snd_hda_power_up(codec);
e1f0d669 761 dac_mode |= idx_val;
5f10c4a9
ML
762 } else {
763 snd_hda_power_down(codec);
e1f0d669 764 dac_mode &= ~idx_val;
5f10c4a9
ML
765 }
766
767 snd_hda_codec_write_cache(codec, codec->afg, 0,
768 kcontrol->private_value >> 16, dac_mode);
769
770 return 1;
771}
772
c7d4b2fa 773static struct hda_verb stac9200_core_init[] = {
2f2f4251 774 /* set dac0mux for dac converter */
c7d4b2fa 775 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
776 {}
777};
778
1194b5b7
TI
779static struct hda_verb stac9200_eapd_init[] = {
780 /* set dac0mux for dac converter */
781 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
782 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
783 {}
784};
785
e1f0d669
MR
786static struct hda_verb stac92hd73xx_6ch_core_init[] = {
787 /* set master volume and direct control */
788 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
789 /* setup adcs to point to mixer */
790 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
792 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
793 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
794 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
795 /* setup import muxs */
796 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
797 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
798 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
799 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
800 {}
801};
802
d654a660
MR
803static struct hda_verb dell_eq_core_init[] = {
804 /* set master volume to max value without distortion
805 * and direct control */
806 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
807 /* setup adcs to point to mixer */
808 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
809 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
810 /* setup import muxs */
811 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
815 {}
816};
817
52fe0f9d 818static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 819 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
820 /* setup adcs to point to mixer */
821 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
822 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
823 /* setup import muxs */
824 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
825 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
826 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
827 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
828 {}
829};
830
e1f0d669
MR
831static struct hda_verb stac92hd73xx_8ch_core_init[] = {
832 /* set master volume and direct control */
833 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
834 /* setup adcs to point to mixer */
835 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
836 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
837 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 /* setup import muxs */
841 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
845 {}
846};
847
848static struct hda_verb stac92hd73xx_10ch_core_init[] = {
849 /* set master volume and direct control */
850 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
851 /* dac3 is connected to import3 mux */
852 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
853 /* setup adcs to point to mixer */
854 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
855 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
856 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
857 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
858 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
859 /* setup import muxs */
860 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
861 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
862 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
863 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
864 {}
865};
866
d0513fc6 867static struct hda_verb stac92hd83xxx_core_init[] = {
8bb0ac55
MR
868 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x1},
869 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x1},
870 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x0},
d0513fc6
MR
871
872 /* power state controls amps */
873 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 874 {}
d0513fc6
MR
875};
876
e035b841 877static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 880 {}
541eee87
MR
881};
882
ca8d33fc 883#define HD_DISABLE_PORTF 1
541eee87 884static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
885 /* start of config #1 */
886
887 /* connect port 0f to audio mixer */
888 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
889 /* start of config #2 */
890
e035b841
MR
891 /* set master volume and direct control */
892 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
ca8d33fc
MR
893 {}
894};
895
896static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
897 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
898 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
899 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
900 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
901 {}
902};
903
8e21c34c
TD
904static struct hda_verb stac925x_core_init[] = {
905 /* set dac0mux for dac converter */
906 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
907 /* mute the master volume */
908 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
909 {}
910};
911
c7d4b2fa 912static struct hda_verb stac922x_core_init[] = {
2f2f4251 913 /* set master volume and direct control */
c7d4b2fa 914 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
915 {}
916};
917
93ed1503 918static struct hda_verb d965_core_init[] = {
19039bd0 919 /* set master volume and direct control */
93ed1503 920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
921 /* unmute node 0x1b */
922 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
923 /* select node 0x03 as DAC */
924 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
925 {}
926};
927
3cc08dc6
MP
928static struct hda_verb stac927x_core_init[] = {
929 /* set master volume and direct control */
930 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
931 /* enable analog pc beep path */
932 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
933 {}
934};
935
f3302a59
MP
936static struct hda_verb stac9205_core_init[] = {
937 /* set master volume and direct control */
938 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
939 /* enable analog pc beep path */
940 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
941 {}
942};
943
b22b4821
MR
944#define STAC_MONO_MUX \
945 { \
946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
947 .name = "Mono Mux", \
948 .count = 1, \
949 .info = stac92xx_mono_mux_enum_info, \
950 .get = stac92xx_mono_mux_enum_get, \
951 .put = stac92xx_mono_mux_enum_put, \
952 }
953
89385035
MR
954#define STAC_AMP_MUX \
955 { \
956 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
957 .name = "Amp Selector Capture Switch", \
958 .count = 1, \
959 .info = stac92xx_amp_mux_enum_info, \
960 .get = stac92xx_amp_mux_enum_get, \
961 .put = stac92xx_amp_mux_enum_put, \
962 }
963
964#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
965 { \
966 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
967 .name = xname, \
968 .index = 0, \
969 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
970 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
971 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
972 .info = stac92xx_amp_volume_info, \
973 .get = stac92xx_amp_volume_get, \
974 .put = stac92xx_amp_volume_put, \
975 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
976 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
977 }
978
e1f0d669 979#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
980 { \
981 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
982 .name = "Analog Loopback", \
e1f0d669 983 .count = cnt, \
5f10c4a9
ML
984 .info = stac92xx_aloopback_info, \
985 .get = stac92xx_aloopback_get, \
986 .put = stac92xx_aloopback_put, \
987 .private_value = verb_read | (verb_write << 16), \
988 }
989
c8b6bf9b 990static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
991 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
992 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
993 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
994 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
995 { } /* end */
996};
997
2a9c7816 998#define DELL_M6_MIXER 6
e1f0d669 999static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1000 /* start of config #1 */
e1f0d669
MR
1001 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1002 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1003
e1f0d669
MR
1004 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1005 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1006
2a9c7816
MR
1007 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1008 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1009
1010 /* start of config #2 */
1011 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1012 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1013
e1f0d669
MR
1014 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1015 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1016
2a9c7816
MR
1017 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1019
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1022
e1f0d669
MR
1023 { } /* end */
1024};
1025
d78d7a90
TI
1026static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1027 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1028 {}
1029};
1030
1031static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1032 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI
1033 {}
1034};
e1f0d669 1035
d78d7a90
TI
1036static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1037 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1038 {}
1039};
1040
1041static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1042 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1043 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1044
1045 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1046 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1047
1048 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1049 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1050
1051 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1052 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1053
1054 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1055 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1058 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1061 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1062 { } /* end */
1063};
1064
1065static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1066 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1067 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1068
1069 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1070 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1071
1072 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1073 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1074
1075 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1076 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1077
1078 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1079 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1080
1081 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1082 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1083
1084 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1085 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1086 { } /* end */
1087};
1088
d0513fc6
MR
1089
1090static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1091 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1092 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1093
1094 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1095 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1096
74b7ff48
MR
1097 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1098 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1099
74b7ff48
MR
1100 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1101 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1102
74b7ff48
MR
1103 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1104 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1105
74b7ff48
MR
1106 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1107 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1108
1109 /*
74b7ff48
MR
1110 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1111 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1112 */
1113 { } /* end */
1114};
1115
541eee87 1116static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
9b35947f
MR
1117 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1118 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1119
1120 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1121 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1122 /* analog pc-beep replaced with digital beep support */
1123 /*
f7c5dda2
MR
1124 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1125 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1126 */
f7c5dda2 1127
687cb98e
MR
1128 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1129 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1130
687cb98e
MR
1131 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1132 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1133
1134 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1135 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1136
1137 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1138 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1139 { } /* end */
1140};
1141
d78d7a90
TI
1142static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1143 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1144};
541eee87 1145
d78d7a90 1146static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1147 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1148 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1152 { } /* end */
1153};
1154
8e21c34c 1155static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1156 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1157 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
8e21c34c 1158 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1159 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1160 { } /* end */
1161};
1162
9e05b7a3 1163static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3
ML
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1166
1167 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1168 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1169 { } /* end */
1170};
1171
d78d7a90
TI
1172static struct snd_kcontrol_new stac9205_loopback[] = {
1173 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1174 {}
1175};
1176
19039bd0 1177/* This needs to be generated dynamically based on sequence */
9e05b7a3 1178static struct snd_kcontrol_new stac922x_mixer[] = {
9e05b7a3
ML
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1184 { } /* end */
1185};
1186
9e05b7a3 1187
d1d985f0 1188static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3
ML
1189 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1190 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1191
1192 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1193 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1194
1195 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1196 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1197 { } /* end */
1198};
1199
d78d7a90
TI
1200static struct snd_kcontrol_new stac927x_loopback[] = {
1201 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1202 {}
1203};
1204
1697055e
TI
1205static struct snd_kcontrol_new stac_dmux_mixer = {
1206 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1207 .name = "Digital Input Source",
1208 /* count set later */
1209 .info = stac92xx_dmux_enum_info,
1210 .get = stac92xx_dmux_enum_get,
1211 .put = stac92xx_dmux_enum_put,
1212};
1213
d9737751
MR
1214static struct snd_kcontrol_new stac_smux_mixer = {
1215 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1216 .name = "IEC958 Playback Source",
d9737751
MR
1217 /* count set later */
1218 .info = stac92xx_smux_enum_info,
1219 .get = stac92xx_smux_enum_get,
1220 .put = stac92xx_smux_enum_put,
1221};
1222
2134ea4f
TI
1223static const char *slave_vols[] = {
1224 "Front Playback Volume",
1225 "Surround Playback Volume",
1226 "Center Playback Volume",
1227 "LFE Playback Volume",
1228 "Side Playback Volume",
1229 "Headphone Playback Volume",
2134ea4f 1230 "Speaker Playback Volume",
2134ea4f
TI
1231 NULL
1232};
1233
1234static const char *slave_sws[] = {
1235 "Front Playback Switch",
1236 "Surround Playback Switch",
1237 "Center Playback Switch",
1238 "LFE Playback Switch",
1239 "Side Playback Switch",
1240 "Headphone Playback Switch",
2134ea4f 1241 "Speaker Playback Switch",
edb54a55 1242 "IEC958 Playback Switch",
2134ea4f
TI
1243 NULL
1244};
1245
603c4019 1246static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1247static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1248
2f2f4251
M
1249static int stac92xx_build_controls(struct hda_codec *codec)
1250{
1251 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1252 struct auto_pin_cfg *cfg = &spec->autocfg;
1253 hda_nid_t nid;
2f2f4251 1254 int err;
c7d4b2fa 1255 int i;
2f2f4251
M
1256
1257 err = snd_hda_add_new_ctls(codec, spec->mixer);
1258 if (err < 0)
1259 return err;
c7d4b2fa
M
1260
1261 for (i = 0; i < spec->num_mixers; i++) {
1262 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1263 if (err < 0)
1264 return err;
1265 }
1697055e
TI
1266 if (spec->num_dmuxes > 0) {
1267 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1268 err = snd_hda_ctl_add(codec,
1697055e
TI
1269 snd_ctl_new1(&stac_dmux_mixer, codec));
1270 if (err < 0)
1271 return err;
1272 }
d9737751 1273 if (spec->num_smuxes > 0) {
00ef50c2
MR
1274 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1275 struct hda_input_mux *smux = &spec->private_smux;
1276 /* check for mute support on SPDIF out */
1277 if (wcaps & AC_WCAP_OUT_AMP) {
1278 smux->items[smux->num_items].label = "Off";
1279 smux->items[smux->num_items].index = 0;
1280 smux->num_items++;
1281 spec->spdif_mute = 1;
1282 }
d9737751 1283 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1284 err = snd_hda_ctl_add(codec,
d9737751
MR
1285 snd_ctl_new1(&stac_smux_mixer, codec));
1286 if (err < 0)
1287 return err;
1288 }
c7d4b2fa 1289
dabbed6f
M
1290 if (spec->multiout.dig_out_nid) {
1291 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1292 if (err < 0)
1293 return err;
9a08160b
TI
1294 err = snd_hda_create_spdif_share_sw(codec,
1295 &spec->multiout);
1296 if (err < 0)
1297 return err;
1298 spec->multiout.share_spdif = 1;
dabbed6f 1299 }
da74ae3e 1300 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1301 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1302 if (err < 0)
1303 return err;
1304 }
2134ea4f
TI
1305
1306 /* if we have no master control, let's create it */
1307 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1308 unsigned int vmaster_tlv[4];
2134ea4f 1309 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1310 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1311 /* correct volume offset */
1312 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1313 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1314 vmaster_tlv, slave_vols);
2134ea4f
TI
1315 if (err < 0)
1316 return err;
1317 }
1318 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1319 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1320 NULL, slave_sws);
1321 if (err < 0)
1322 return err;
1323 }
1324
d78d7a90
TI
1325 if (spec->aloopback_ctl &&
1326 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1327 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1328 if (err < 0)
1329 return err;
1330 }
1331
603c4019 1332 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1333
1334 /* create jack input elements */
1335 if (spec->hp_detect) {
1336 for (i = 0; i < cfg->hp_outs; i++) {
1337 int type = SND_JACK_HEADPHONE;
1338 nid = cfg->hp_pins[i];
1339 /* jack detection */
1340 if (cfg->hp_outs == i)
1341 type |= SND_JACK_LINEOUT;
1342 err = stac92xx_add_jack(codec, nid, type);
1343 if (err < 0)
1344 return err;
1345 }
1346 }
1347 for (i = 0; i < cfg->line_outs; i++) {
1348 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1349 SND_JACK_LINEOUT);
1350 if (err < 0)
1351 return err;
1352 }
1353 for (i = 0; i < AUTO_PIN_LAST; i++) {
1354 nid = cfg->input_pins[i];
1355 if (nid) {
1356 err = stac92xx_add_jack(codec, nid,
1357 SND_JACK_MICROPHONE);
1358 if (err < 0)
1359 return err;
1360 }
1361 }
1362
dabbed6f 1363 return 0;
2f2f4251
M
1364}
1365
403d1944 1366static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1367 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1368 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1369};
1370
58eec423
MCC
1371static unsigned int gateway9200_m4_pin_configs[8] = {
1372 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1373 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1374};
1375static unsigned int gateway9200_m4_2_pin_configs[8] = {
1376 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1377 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1378};
1379
1380/*
dfe495d0
TI
1381 STAC 9200 pin configs for
1382 102801A8
1383 102801DE
1384 102801E8
1385*/
1386static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1387 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1388 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1389};
1390
1391/*
1392 STAC 9200 pin configs for
1393 102801C0
1394 102801C1
1395*/
1396static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1397 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1398 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1399};
1400
1401/*
1402 STAC 9200 pin configs for
1403 102801C4 (Dell Dimension E310)
1404 102801C5
1405 102801C7
1406 102801D9
1407 102801DA
1408 102801E3
1409*/
1410static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1411 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1412 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1413};
1414
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801B5 (Dell Inspiron 630m)
1419 102801D8 (Dell Inspiron 640m)
1420*/
1421static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1422 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1423 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801C2 (Dell Latitude D620)
1429 102801C8
1430 102801CC (Dell Latitude D820)
1431 102801D4
1432 102801D6
1433*/
1434static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1435 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1436 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1437};
1438
1439/*
1440 STAC 9200-32 pin configs for
1441 102801CE (Dell XPS M1710)
1442 102801CF (Dell Precision M90)
1443*/
1444static unsigned int dell9200_m23_pin_configs[8] = {
1445 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1446 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1447};
1448
1449/*
1450 STAC 9200-32 pin configs for
1451 102801C9
1452 102801CA
1453 102801CB (Dell Latitude 120L)
1454 102801D3
1455*/
1456static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1457 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1458 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1459};
1460
1461/*
1462 STAC 9200-32 pin configs for
1463 102801BD (Dell Inspiron E1505n)
1464 102801EE
1465 102801EF
1466*/
1467static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1468 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1469 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1470};
1471
1472/*
1473 STAC 9200-32 pin configs for
1474 102801F5 (Dell Inspiron 1501)
1475 102801F6
1476*/
1477static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1478 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1479 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1480};
1481
1482/*
1483 STAC 9200-32
1484 102801CD (Dell Inspiron E1705/9400)
1485*/
1486static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1487 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1488 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1489};
1490
bf277785
TD
1491static unsigned int oqo9200_pin_configs[8] = {
1492 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1493 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1494};
1495
dfe495d0 1496
f5fcc13c
TI
1497static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1498 [STAC_REF] = ref9200_pin_configs,
bf277785 1499 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1500 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1501 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1502 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1503 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1504 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1505 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1506 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1507 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1508 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1509 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1510 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1511 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1512 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1513};
1514
f5fcc13c 1515static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1516 [STAC_AUTO] = "auto",
f5fcc13c 1517 [STAC_REF] = "ref",
bf277785 1518 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1519 [STAC_9200_DELL_D21] = "dell-d21",
1520 [STAC_9200_DELL_D22] = "dell-d22",
1521 [STAC_9200_DELL_D23] = "dell-d23",
1522 [STAC_9200_DELL_M21] = "dell-m21",
1523 [STAC_9200_DELL_M22] = "dell-m22",
1524 [STAC_9200_DELL_M23] = "dell-m23",
1525 [STAC_9200_DELL_M24] = "dell-m24",
1526 [STAC_9200_DELL_M25] = "dell-m25",
1527 [STAC_9200_DELL_M26] = "dell-m26",
1528 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1529 [STAC_9200_M4] = "gateway-m4",
1530 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1531 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1532};
1533
1534static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1535 /* SigmaTel reference board */
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1537 "DFI LanParty", STAC_REF),
577aa2c1
MR
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1539 "DFI LanParty", STAC_REF),
e7377071 1540 /* Dell laptops have BIOS problem */
dfe495d0
TI
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1542 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1544 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1546 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1548 "unknown Dell", STAC_9200_DELL_D22),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1550 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1552 "Dell Latitude D620", STAC_9200_DELL_M22),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1554 "unknown Dell", STAC_9200_DELL_D23),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1558 "unknown Dell", STAC_9200_DELL_M22),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1560 "unknown Dell", STAC_9200_DELL_M24),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1562 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1564 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1566 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1568 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1570 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1572 "Dell Precision M90", STAC_9200_DELL_M23),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1574 "unknown Dell", STAC_9200_DELL_M22),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1576 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1578 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1580 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1582 "unknown Dell", STAC_9200_DELL_D23),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1584 "unknown Dell", STAC_9200_DELL_D23),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1586 "unknown Dell", STAC_9200_DELL_D21),
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1588 "unknown Dell", STAC_9200_DELL_D23),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1590 "unknown Dell", STAC_9200_DELL_D21),
1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1592 "unknown Dell", STAC_9200_DELL_M25),
1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1594 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1596 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1598 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1599 /* Panasonic */
117f257d 1600 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1601 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1602 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1603 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1604 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1605 /* OQO Mobile */
1606 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1607 {} /* terminator */
1608};
1609
8e21c34c
TD
1610static unsigned int ref925x_pin_configs[8] = {
1611 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1612 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1613};
1614
9cb36c2a
MCC
1615static unsigned int stac925xM1_pin_configs[8] = {
1616 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1617 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1618};
1619
9cb36c2a
MCC
1620static unsigned int stac925xM1_2_pin_configs[8] = {
1621 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1622 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1623};
58eec423 1624
9cb36c2a
MCC
1625static unsigned int stac925xM2_pin_configs[8] = {
1626 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1627 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1628};
1629
8e21c34c 1630static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1631 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1632 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1633};
1634
9cb36c2a
MCC
1635static unsigned int stac925xM3_pin_configs[8] = {
1636 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1637 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1638};
58eec423 1639
9cb36c2a
MCC
1640static unsigned int stac925xM5_pin_configs[8] = {
1641 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1642 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1643};
1644
9cb36c2a
MCC
1645static unsigned int stac925xM6_pin_configs[8] = {
1646 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1647 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1648};
1649
1650static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1651 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1652 [STAC_M1] = stac925xM1_pin_configs,
1653 [STAC_M1_2] = stac925xM1_2_pin_configs,
1654 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1655 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1656 [STAC_M3] = stac925xM3_pin_configs,
1657 [STAC_M5] = stac925xM5_pin_configs,
1658 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1659};
1660
1661static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1662 [STAC_925x_AUTO] = "auto",
8e21c34c 1663 [STAC_REF] = "ref",
9cb36c2a
MCC
1664 [STAC_M1] = "m1",
1665 [STAC_M1_2] = "m1-2",
1666 [STAC_M2] = "m2",
8e21c34c 1667 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1668 [STAC_M3] = "m3",
1669 [STAC_M5] = "m5",
1670 [STAC_M6] = "m6",
8e21c34c
TD
1671};
1672
9cb36c2a 1673static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1674 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1675 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1676 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1677 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1678 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1679 /* Not sure about the brand name for those */
1680 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1681 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1682 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1683 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1684 {} /* terminator */
8e21c34c
TD
1685};
1686
1687static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1688 /* SigmaTel reference board */
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1691 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1692
1693 /* Default table for unknown ID */
1694 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1695
8e21c34c
TD
1696 {} /* terminator */
1697};
1698
a7662640 1699static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1700 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1701 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1702 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1703 0x01452050,
1704};
1705
1706static unsigned int dell_m6_pin_configs[13] = {
1707 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1708 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1709 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1710 0x4f0000f0,
e1f0d669
MR
1711};
1712
1713static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1714 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1715 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1716 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1717 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1718 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1719};
1720
1721static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1722 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1723 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1724 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1725 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1726 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1727 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1728 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1729};
1730
1731static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1732 /* SigmaTel reference board */
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1734 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1736 "DFI LanParty", STAC_92HD73XX_REF),
a7662640 1737 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1738 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1739 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1740 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1741 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1742 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1744 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1746 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1747 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1748 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1749 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1750 "unknown Dell", STAC_DELL_M6_DMIC),
1751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1752 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1754 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1756 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1757 {} /* terminator */
1758};
1759
8bb0ac55 1760static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR
1761 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1762 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR
1763 0x01451160, 0x98560170,
1764};
1765
8bb0ac55
MR
1766static unsigned int dell_s14_pin_configs[10] = {
1767 0x02214030, 0x02211010, 0x02a19020, 0x01014050,
1768 0x40f000f0, 0x01819040, 0x40f000f0, 0x90a60160,
1769 0x40f000f0, 0x40f000f0,
1770};
1771
d0513fc6
MR
1772static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1773 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1774 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1775 [STAC_DELL_S14] = dell_s14_pin_configs,
d0513fc6
MR
1776};
1777
1778static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1779 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1780 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1781 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1782 [STAC_DELL_S14] = "dell-s14",
d0513fc6
MR
1783};
1784
1785static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1786 /* SigmaTel reference board */
1787 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1788 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1789 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1790 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1792 "unknown Dell", STAC_DELL_S14),
574f3c4f 1793 {} /* terminator */
d0513fc6
MR
1794};
1795
616f89e7 1796static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1797 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1798 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1799 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1800 0x00000000
e035b841
MR
1801};
1802
616f89e7 1803static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1804 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1805 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1806 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1807 0x00000000
a7662640
MR
1808};
1809
616f89e7 1810static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1811 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1812 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1813 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1814 0x00000000
a7662640
MR
1815};
1816
616f89e7 1817static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1818 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1819 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1820 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1821 0x00000000
3a7abfd2
MR
1822};
1823
e035b841
MR
1824static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1825 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1826 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1827 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1828 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1829 [STAC_HP_M4] = NULL,
1b0652eb 1830 [STAC_HP_DV5] = NULL,
e035b841
MR
1831};
1832
1833static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1834 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1835 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1836 [STAC_DELL_M4_1] = "dell-m4-1",
1837 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1838 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1839 [STAC_HP_M4] = "hp-m4",
1b0652eb 1840 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1841};
1842
1843static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1844 /* SigmaTel reference board */
1845 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1846 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1847 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1848 "DFI LanParty", STAC_92HD71BXX_REF),
2ae466f8
TI
1849 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
1850 "HP dv4-7", STAC_HP_DV5),
1851 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1852 "HP dv4-7", STAC_HP_DV5),
9a9e2359 1853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1854 "HP mini 1000", STAC_HP_M4),
a7662640
MR
1855 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1856 "unknown Dell", STAC_DELL_M4_1),
1857 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1858 "unknown Dell", STAC_DELL_M4_1),
1859 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1860 "unknown Dell", STAC_DELL_M4_1),
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1862 "unknown Dell", STAC_DELL_M4_1),
1863 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1864 "unknown Dell", STAC_DELL_M4_1),
1865 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1866 "unknown Dell", STAC_DELL_M4_1),
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1868 "unknown Dell", STAC_DELL_M4_1),
1869 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1870 "unknown Dell", STAC_DELL_M4_2),
1871 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1872 "unknown Dell", STAC_DELL_M4_2),
1873 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1874 "unknown Dell", STAC_DELL_M4_2),
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1876 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1878 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1879 {} /* terminator */
1880};
1881
403d1944
MP
1882static unsigned int ref922x_pin_configs[10] = {
1883 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1884 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1885 0x40000100, 0x40000100,
1886};
1887
dfe495d0
TI
1888/*
1889 STAC 922X pin configs for
1890 102801A7
1891 102801AB
1892 102801A9
1893 102801D1
1894 102801D2
1895*/
1896static unsigned int dell_922x_d81_pin_configs[10] = {
1897 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1898 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1899 0x01813122, 0x400001f2,
1900};
1901
1902/*
1903 STAC 922X pin configs for
1904 102801AC
1905 102801D0
1906*/
1907static unsigned int dell_922x_d82_pin_configs[10] = {
1908 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1909 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1910 0x01813122, 0x400001f1,
1911};
1912
1913/*
1914 STAC 922X pin configs for
1915 102801BF
1916*/
1917static unsigned int dell_922x_m81_pin_configs[10] = {
1918 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1919 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1920 0x40C003f1, 0x405003f0,
1921};
1922
1923/*
1924 STAC 9221 A1 pin configs for
1925 102801D7 (Dell XPS M1210)
1926*/
1927static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1928 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1929 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1930 0x508003f3, 0x405003f4,
1931};
1932
403d1944 1933static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1934 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1935 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1936 0x02a19120, 0x40000100,
1937};
1938
1939static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1940 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1941 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1942 0x02a19320, 0x40000100,
1943};
1944
5d5d3bc3
IZ
1945static unsigned int intel_mac_v1_pin_configs[10] = {
1946 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1947 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1948 0x400000fc, 0x400000fb,
1949};
1950
1951static unsigned int intel_mac_v2_pin_configs[10] = {
1952 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1953 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1954 0x400000fc, 0x400000fb,
6f0778d8
NB
1955};
1956
5d5d3bc3
IZ
1957static unsigned int intel_mac_v3_pin_configs[10] = {
1958 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1959 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1960 0x400000fc, 0x400000fb,
1961};
1962
5d5d3bc3
IZ
1963static unsigned int intel_mac_v4_pin_configs[10] = {
1964 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1965 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1966 0x400000fc, 0x400000fb,
1967};
1968
5d5d3bc3
IZ
1969static unsigned int intel_mac_v5_pin_configs[10] = {
1970 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1971 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1972 0x400000fc, 0x400000fb,
0dae0f83
TI
1973};
1974
8c650087
MCC
1975static unsigned int ecs202_pin_configs[10] = {
1976 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1977 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1978 0x9037012e, 0x40e000f2,
1979};
76c08828 1980
19039bd0 1981static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1982 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1983 [STAC_D945GTP3] = d945gtp3_pin_configs,
1984 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1985 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1986 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1987 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1988 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1989 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1990 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1991 /* for backward compatibility */
5d5d3bc3
IZ
1992 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1993 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1994 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1995 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1996 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1997 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1998 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1999 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
2000 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
2001 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
2002 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
2003};
2004
f5fcc13c 2005static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 2006 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI
2007 [STAC_D945_REF] = "ref",
2008 [STAC_D945GTP5] = "5stack",
2009 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
2010 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
2011 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
2012 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
2013 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
2014 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 2015 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 2016 /* for backward compatibility */
f5fcc13c 2017 [STAC_MACMINI] = "macmini",
3fc24d85 2018 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
2019 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
2020 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 2021 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 2022 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 2023 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
2024 [STAC_922X_DELL_D81] = "dell-d81",
2025 [STAC_922X_DELL_D82] = "dell-d82",
2026 [STAC_922X_DELL_M81] = "dell-m81",
2027 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
2028};
2029
2030static struct snd_pci_quirk stac922x_cfg_tbl[] = {
2031 /* SigmaTel reference board */
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2033 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2035 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
2036 /* Intel 945G based systems */
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2038 "Intel D945G", STAC_D945GTP3),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2040 "Intel D945G", STAC_D945GTP3),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2042 "Intel D945G", STAC_D945GTP3),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2044 "Intel D945G", STAC_D945GTP3),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2046 "Intel D945G", STAC_D945GTP3),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2048 "Intel D945G", STAC_D945GTP3),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2050 "Intel D945G", STAC_D945GTP3),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2052 "Intel D945G", STAC_D945GTP3),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2054 "Intel D945G", STAC_D945GTP3),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2056 "Intel D945G", STAC_D945GTP3),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2058 "Intel D945G", STAC_D945GTP3),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2060 "Intel D945G", STAC_D945GTP3),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2062 "Intel D945G", STAC_D945GTP3),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2064 "Intel D945G", STAC_D945GTP3),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2066 "Intel D945G", STAC_D945GTP3),
2067 /* Intel D945G 5-stack systems */
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2069 "Intel D945G", STAC_D945GTP5),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2071 "Intel D945G", STAC_D945GTP5),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2073 "Intel D945G", STAC_D945GTP5),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2075 "Intel D945G", STAC_D945GTP5),
2076 /* Intel 945P based systems */
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2078 "Intel D945P", STAC_D945GTP3),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2080 "Intel D945P", STAC_D945GTP3),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2082 "Intel D945P", STAC_D945GTP3),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2084 "Intel D945P", STAC_D945GTP3),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2086 "Intel D945P", STAC_D945GTP3),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2088 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
2089 /* other intel */
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2091 "Intel D945", STAC_D945_REF),
f5fcc13c 2092 /* other systems */
536319af 2093 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2094 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2095 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2096 /* Dell systems */
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2098 "unknown Dell", STAC_922X_DELL_D81),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2100 "unknown Dell", STAC_922X_DELL_D81),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2102 "unknown Dell", STAC_922X_DELL_D81),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2104 "unknown Dell", STAC_922X_DELL_D82),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2106 "unknown Dell", STAC_922X_DELL_M81),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2108 "unknown Dell", STAC_922X_DELL_D82),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2110 "unknown Dell", STAC_922X_DELL_D81),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2112 "unknown Dell", STAC_922X_DELL_D81),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2114 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2115 /* ECS/PC Chips boards */
dea0a509 2116 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2117 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2118 {} /* terminator */
2119};
2120
3cc08dc6 2121static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2122 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2123 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2124 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2125 0x01c42190, 0x40000100,
3cc08dc6
MP
2126};
2127
93ed1503 2128static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2129 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2130 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2131 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2132 0x40000100, 0x40000100
2133};
2134
93ed1503
TD
2135static unsigned int d965_5st_pin_configs[14] = {
2136 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2137 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2138 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2139 0x40000100, 0x40000100
2140};
2141
4ff076e5
TD
2142static unsigned int dell_3st_pin_configs[14] = {
2143 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2144 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2145 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2146 0x40c003fc, 0x40000100
2147};
2148
93ed1503 2149static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2150 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2151 [STAC_D965_REF] = ref927x_pin_configs,
2152 [STAC_D965_3ST] = d965_3st_pin_configs,
2153 [STAC_D965_5ST] = d965_5st_pin_configs,
2154 [STAC_DELL_3ST] = dell_3st_pin_configs,
2155 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2156};
2157
f5fcc13c 2158static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2159 [STAC_927X_AUTO] = "auto",
e28d8322 2160 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2161 [STAC_D965_REF] = "ref",
2162 [STAC_D965_3ST] = "3stack",
2163 [STAC_D965_5ST] = "5stack",
2164 [STAC_DELL_3ST] = "dell-3stack",
2165 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2166};
2167
2168static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2169 /* SigmaTel reference board */
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2171 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2173 "DFI LanParty", STAC_D965_REF),
81d3dbde 2174 /* Intel 946 based systems */
f5fcc13c
TI
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2177 /* 965 based 3 stack systems */
dea0a509
TI
2178 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2179 "Intel D965", STAC_D965_3ST),
2180 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2181 "Intel D965", STAC_D965_3ST),
4ff076e5 2182 /* Dell 3 stack systems */
8e9068b1 2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2187 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2196 /* 965 based 5 stack systems */
dea0a509
TI
2197 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2198 "Intel D965", STAC_D965_5ST),
2199 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2200 "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2201 {} /* terminator */
2202};
2203
f3302a59
MP
2204static unsigned int ref9205_pin_configs[12] = {
2205 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2206 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2207 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2208};
2209
dfe495d0
TI
2210/*
2211 STAC 9205 pin configs for
2212 102801F1
2213 102801F2
2214 102801FC
2215 102801FD
2216 10280204
2217 1028021F
3fa2ef74 2218 10280228 (Dell Vostro 1500)
dfe495d0
TI
2219*/
2220static unsigned int dell_9205_m42_pin_configs[12] = {
2221 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2222 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2223 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2224};
2225
2226/*
2227 STAC 9205 pin configs for
2228 102801F9
2229 102801FA
2230 102801FE
2231 102801FF (Dell Precision M4300)
2232 10280206
2233 10280200
2234 10280201
2235*/
2236static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2237 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2238 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2239 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2240};
2241
dfe495d0 2242static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2243 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2244 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2245 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2246};
2247
f5fcc13c 2248static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2249 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2250 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2251 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2252 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2253 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2254};
2255
f5fcc13c 2256static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2257 [STAC_9205_AUTO] = "auto",
f5fcc13c 2258 [STAC_9205_REF] = "ref",
dfe495d0 2259 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2260 [STAC_9205_DELL_M43] = "dell-m43",
2261 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2262 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2263};
2264
2265static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2266 /* SigmaTel reference board */
2267 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2268 "DFI LanParty", STAC_9205_REF),
577aa2c1
MR
2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2270 "DFI LanParty", STAC_9205_REF),
d9a4268e 2271 /* Dell */
dfe495d0
TI
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2273 "unknown Dell", STAC_9205_DELL_M42),
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2275 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2277 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2279 "Dell Precision", STAC_9205_DELL_M43),
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2281 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2283 "unknown Dell", STAC_9205_DELL_M42),
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2285 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2287 "Dell Precision", STAC_9205_DELL_M43),
2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2289 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2291 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2293 "Dell Precision", STAC_9205_DELL_M43),
2294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2295 "Dell Precision", STAC_9205_DELL_M43),
2296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2297 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2299 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2301 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e
TI
2302 /* Gateway */
2303 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2304 {} /* terminator */
2305};
2306
330ee995
TI
2307static void stac92xx_set_config_regs(struct hda_codec *codec,
2308 unsigned int *pincfgs)
11b44bbd
RF
2309{
2310 int i;
2311 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2312
330ee995
TI
2313 if (!pincfgs)
2314 return;
11b44bbd 2315
87d48363 2316 for (i = 0; i < spec->num_pins; i++)
330ee995
TI
2317 if (spec->pin_nids[i] && pincfgs[i])
2318 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2319 pincfgs[i]);
af9f341a
TI
2320}
2321
dabbed6f 2322/*
c7d4b2fa 2323 * Analog playback callbacks
dabbed6f 2324 */
c7d4b2fa
M
2325static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2326 struct hda_codec *codec,
c8b6bf9b 2327 struct snd_pcm_substream *substream)
2f2f4251 2328{
dabbed6f 2329 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2330 if (spec->stream_delay)
2331 msleep(spec->stream_delay);
9a08160b
TI
2332 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2333 hinfo);
2f2f4251
M
2334}
2335
2f2f4251
M
2336static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2337 struct hda_codec *codec,
2338 unsigned int stream_tag,
2339 unsigned int format,
c8b6bf9b 2340 struct snd_pcm_substream *substream)
2f2f4251
M
2341{
2342 struct sigmatel_spec *spec = codec->spec;
403d1944 2343 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2344}
2345
2346static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2347 struct hda_codec *codec,
c8b6bf9b 2348 struct snd_pcm_substream *substream)
2f2f4251
M
2349{
2350 struct sigmatel_spec *spec = codec->spec;
2351 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2352}
2353
dabbed6f
M
2354/*
2355 * Digital playback callbacks
2356 */
2357static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2358 struct hda_codec *codec,
c8b6bf9b 2359 struct snd_pcm_substream *substream)
dabbed6f
M
2360{
2361 struct sigmatel_spec *spec = codec->spec;
2362 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2363}
2364
2365static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2366 struct hda_codec *codec,
c8b6bf9b 2367 struct snd_pcm_substream *substream)
dabbed6f
M
2368{
2369 struct sigmatel_spec *spec = codec->spec;
2370 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2371}
2372
6b97eb45
TI
2373static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2374 struct hda_codec *codec,
2375 unsigned int stream_tag,
2376 unsigned int format,
2377 struct snd_pcm_substream *substream)
2378{
2379 struct sigmatel_spec *spec = codec->spec;
2380 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2381 stream_tag, format, substream);
2382}
2383
9411e21c
TI
2384static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2385 struct hda_codec *codec,
2386 struct snd_pcm_substream *substream)
2387{
2388 struct sigmatel_spec *spec = codec->spec;
2389 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2390}
2391
dabbed6f 2392
2f2f4251
M
2393/*
2394 * Analog capture callbacks
2395 */
2396static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2397 struct hda_codec *codec,
2398 unsigned int stream_tag,
2399 unsigned int format,
c8b6bf9b 2400 struct snd_pcm_substream *substream)
2f2f4251
M
2401{
2402 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2403 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2404
8daaaa97
MR
2405 if (spec->powerdown_adcs) {
2406 msleep(40);
8c2f767b 2407 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2408 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2409 }
2410 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2411 return 0;
2412}
2413
2414static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2415 struct hda_codec *codec,
c8b6bf9b 2416 struct snd_pcm_substream *substream)
2f2f4251
M
2417{
2418 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2419 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2420
8daaaa97
MR
2421 snd_hda_codec_cleanup_stream(codec, nid);
2422 if (spec->powerdown_adcs)
8c2f767b 2423 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2424 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2425 return 0;
2426}
2427
dabbed6f
M
2428static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2429 .substreams = 1,
2430 .channels_min = 2,
2431 .channels_max = 2,
2432 /* NID is set in stac92xx_build_pcms */
2433 .ops = {
2434 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2435 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI
2436 .prepare = stac92xx_dig_playback_pcm_prepare,
2437 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M
2438 },
2439};
2440
2441static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2442 .substreams = 1,
2443 .channels_min = 2,
2444 .channels_max = 2,
2445 /* NID is set in stac92xx_build_pcms */
2446};
2447
2f2f4251
M
2448static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2449 .substreams = 1,
2450 .channels_min = 2,
c7d4b2fa 2451 .channels_max = 8,
2f2f4251
M
2452 .nid = 0x02, /* NID to query formats and rates */
2453 .ops = {
2454 .open = stac92xx_playback_pcm_open,
2455 .prepare = stac92xx_playback_pcm_prepare,
2456 .cleanup = stac92xx_playback_pcm_cleanup
2457 },
2458};
2459
3cc08dc6
MP
2460static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2461 .substreams = 1,
2462 .channels_min = 2,
2463 .channels_max = 2,
2464 .nid = 0x06, /* NID to query formats and rates */
2465 .ops = {
2466 .open = stac92xx_playback_pcm_open,
2467 .prepare = stac92xx_playback_pcm_prepare,
2468 .cleanup = stac92xx_playback_pcm_cleanup
2469 },
2470};
2471
2f2f4251 2472static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2473 .channels_min = 2,
2474 .channels_max = 2,
9e05b7a3 2475 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2476 .ops = {
2477 .prepare = stac92xx_capture_pcm_prepare,
2478 .cleanup = stac92xx_capture_pcm_cleanup
2479 },
2480};
2481
2482static int stac92xx_build_pcms(struct hda_codec *codec)
2483{
2484 struct sigmatel_spec *spec = codec->spec;
2485 struct hda_pcm *info = spec->pcm_rec;
2486
2487 codec->num_pcms = 1;
2488 codec->pcm_info = info;
2489
c7d4b2fa 2490 info->name = "STAC92xx Analog";
2f2f4251 2491 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2492 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2493 spec->multiout.dac_nids[0];
2f2f4251 2494 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2495 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2496 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2497
2498 if (spec->alt_switch) {
2499 codec->num_pcms++;
2500 info++;
2501 info->name = "STAC92xx Analog Alt";
2502 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2503 }
2f2f4251 2504
dabbed6f
M
2505 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2506 codec->num_pcms++;
2507 info++;
2508 info->name = "STAC92xx Digital";
0852d7a6 2509 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M
2510 if (spec->multiout.dig_out_nid) {
2511 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2512 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2513 }
2514 if (spec->dig_in_nid) {
2515 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2516 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2517 }
2518 }
2519
2f2f4251
M
2520 return 0;
2521}
2522
c960a03b
TI
2523static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2524{
2525 unsigned int pincap = snd_hda_param_read(codec, nid,
2526 AC_PAR_PIN_CAP);
2527 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2528 if (pincap & AC_PINCAP_VREF_100)
2529 return AC_PINCTL_VREF_100;
2530 if (pincap & AC_PINCAP_VREF_80)
2531 return AC_PINCTL_VREF_80;
2532 if (pincap & AC_PINCAP_VREF_50)
2533 return AC_PINCTL_VREF_50;
2534 if (pincap & AC_PINCAP_VREF_GRD)
2535 return AC_PINCTL_VREF_GRD;
2536 return 0;
2537}
2538
403d1944
MP
2539static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2540
2541{
82beb8fd
TI
2542 snd_hda_codec_write_cache(codec, nid, 0,
2543 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2544}
2545
7c2ba97b
MR
2546#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2547
2548static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2549 struct snd_ctl_elem_value *ucontrol)
2550{
2551 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2552 struct sigmatel_spec *spec = codec->spec;
2553
d7a89436 2554 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2555 return 0;
2556}
2557
c6e4c666
TI
2558static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2559 unsigned char type);
2560
7c2ba97b
MR
2561static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2562 struct snd_ctl_elem_value *ucontrol)
2563{
2564 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2565 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2566 int nid = kcontrol->private_value;
2567
2568 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2569
2570 /* check to be sure that the ports are upto date with
2571 * switch changes
2572 */
c6e4c666 2573 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2574
2575 return 1;
2576}
2577
a5ce8890 2578#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2579
2580static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2581{
2582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2583 struct sigmatel_spec *spec = codec->spec;
2584 int io_idx = kcontrol-> private_value & 0xff;
2585
2586 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2587 return 0;
2588}
2589
2590static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2591{
2592 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2593 struct sigmatel_spec *spec = codec->spec;
2594 hda_nid_t nid = kcontrol->private_value >> 8;
2595 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2596 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2597
2598 spec->io_switch[io_idx] = val;
2599
2600 if (val)
2601 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2602 else {
2603 unsigned int pinctl = AC_PINCTL_IN_EN;
2604 if (io_idx) /* set VREF for mic */
2605 pinctl |= stac92xx_get_vref(codec, nid);
2606 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2607 }
40c1d308
JZ
2608
2609 /* check the auto-mute again: we need to mute/unmute the speaker
2610 * appropriately according to the pin direction
2611 */
2612 if (spec->hp_detect)
c6e4c666 2613 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2614
403d1944
MP
2615 return 1;
2616}
2617
0fb87bb4
ML
2618#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2619
2620static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2621 struct snd_ctl_elem_value *ucontrol)
2622{
2623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2624 struct sigmatel_spec *spec = codec->spec;
2625
2626 ucontrol->value.integer.value[0] = spec->clfe_swap;
2627 return 0;
2628}
2629
2630static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2631 struct snd_ctl_elem_value *ucontrol)
2632{
2633 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2634 struct sigmatel_spec *spec = codec->spec;
2635 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2636 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2637
68ea7b2f 2638 if (spec->clfe_swap == val)
0fb87bb4
ML
2639 return 0;
2640
68ea7b2f 2641 spec->clfe_swap = val;
0fb87bb4
ML
2642
2643 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2644 spec->clfe_swap ? 0x4 : 0x0);
2645
2646 return 1;
2647}
2648
7c2ba97b
MR
2649#define STAC_CODEC_HP_SWITCH(xname) \
2650 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2651 .name = xname, \
2652 .index = 0, \
2653 .info = stac92xx_hp_switch_info, \
2654 .get = stac92xx_hp_switch_get, \
2655 .put = stac92xx_hp_switch_put, \
2656 }
2657
403d1944
MP
2658#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2659 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2660 .name = xname, \
2661 .index = 0, \
2662 .info = stac92xx_io_switch_info, \
2663 .get = stac92xx_io_switch_get, \
2664 .put = stac92xx_io_switch_put, \
2665 .private_value = xpval, \
2666 }
2667
0fb87bb4
ML
2668#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2669 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2670 .name = xname, \
2671 .index = 0, \
2672 .info = stac92xx_clfe_switch_info, \
2673 .get = stac92xx_clfe_switch_get, \
2674 .put = stac92xx_clfe_switch_put, \
2675 .private_value = xpval, \
2676 }
403d1944 2677
c7d4b2fa
M
2678enum {
2679 STAC_CTL_WIDGET_VOL,
2680 STAC_CTL_WIDGET_MUTE,
09a99959 2681 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2682 STAC_CTL_WIDGET_AMP_MUX,
2683 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2684 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2685 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2686 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2687};
2688
c8b6bf9b 2689static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2690 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2691 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2692 STAC_MONO_MUX,
89385035
MR
2693 STAC_AMP_MUX,
2694 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2695 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2696 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2697 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2698};
2699
2700/* add dynamic controls */
e3c75964
TI
2701static struct snd_kcontrol_new *
2702stac_control_new(struct sigmatel_spec *spec,
2703 struct snd_kcontrol_new *ktemp,
2704 const char *name)
c7d4b2fa 2705{
c8b6bf9b 2706 struct snd_kcontrol_new *knew;
c7d4b2fa 2707
603c4019
TI
2708 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2709 knew = snd_array_new(&spec->kctls);
2710 if (!knew)
e3c75964 2711 return NULL;
4d4e9bb3 2712 *knew = *ktemp;
82fe0c58 2713 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2714 if (!knew->name) {
2715 /* roolback */
2716 memset(knew, 0, sizeof(*knew));
2717 spec->kctls.alloced--;
2718 return NULL;
2719 }
2720 return knew;
2721}
2722
2723static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2724 struct snd_kcontrol_new *ktemp,
2725 int idx, const char *name,
2726 unsigned long val)
2727{
2728 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
2729 if (!knew)
c7d4b2fa 2730 return -ENOMEM;
e3c75964 2731 knew->index = idx;
c7d4b2fa 2732 knew->private_value = val;
c7d4b2fa
M
2733 return 0;
2734}
2735
4d4e9bb3
TI
2736static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2737 int type, int idx, const char *name,
2738 unsigned long val)
2739{
2740 return stac92xx_add_control_temp(spec,
2741 &stac92xx_control_templates[type],
2742 idx, name, val);
2743}
2744
4682eee0
MR
2745
2746/* add dynamic controls */
4d4e9bb3
TI
2747static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2748 const char *name, unsigned long val)
4682eee0
MR
2749{
2750 return stac92xx_add_control_idx(spec, type, 0, name, val);
2751}
2752
e3c75964
TI
2753static struct snd_kcontrol_new stac_input_src_temp = {
2754 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2755 .name = "Input Source",
2756 .info = stac92xx_mux_enum_info,
2757 .get = stac92xx_mux_enum_get,
2758 .put = stac92xx_mux_enum_put,
2759};
2760
2761static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2762{
2763 struct snd_kcontrol_new *knew;
2764 struct hda_input_mux *imux = &spec->private_imux;
2765
2766 if (!spec->num_adcs || imux->num_items <= 1)
2767 return 0; /* no need for input source control */
2768 knew = stac_control_new(spec, &stac_input_src_temp,
2769 stac_input_src_temp.name);
2770 if (!knew)
2771 return -ENOMEM;
2772 knew->count = spec->num_adcs;
2773 return 0;
2774}
2775
c21ca4a8
TI
2776/* check whether the line-input can be used as line-out */
2777static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2778{
2779 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2780 struct auto_pin_cfg *cfg = &spec->autocfg;
2781 hda_nid_t nid;
2782 unsigned int pincap;
8e9068b1 2783
c21ca4a8
TI
2784 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2785 return 0;
2786 nid = cfg->input_pins[AUTO_PIN_LINE];
2787 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2788 if (pincap & AC_PINCAP_OUT)
2789 return nid;
2790 return 0;
2791}
403d1944 2792
c21ca4a8
TI
2793/* check whether the mic-input can be used as line-out */
2794static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2795{
2796 struct sigmatel_spec *spec = codec->spec;
2797 struct auto_pin_cfg *cfg = &spec->autocfg;
2798 unsigned int def_conf, pincap;
2799 unsigned int mic_pin;
2800
2801 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2802 return 0;
2803 mic_pin = AUTO_PIN_MIC;
2804 for (;;) {
2805 hda_nid_t nid = cfg->input_pins[mic_pin];
330ee995 2806 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI
2807 /* some laptops have an internal analog microphone
2808 * which can't be used as a output */
2809 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2810 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2811 if (pincap & AC_PINCAP_OUT)
2812 return nid;
403d1944 2813 }
c21ca4a8
TI
2814 if (mic_pin == AUTO_PIN_MIC)
2815 mic_pin = AUTO_PIN_FRONT_MIC;
2816 else
2817 break;
403d1944 2818 }
403d1944
MP
2819 return 0;
2820}
2821
7b043899
SL
2822static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2823{
2824 int i;
2825
2826 for (i = 0; i < spec->multiout.num_dacs; i++) {
2827 if (spec->multiout.dac_nids[i] == nid)
2828 return 1;
2829 }
2830
2831 return 0;
2832}
2833
c21ca4a8
TI
2834static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2835{
2836 int i;
2837 if (is_in_dac_nids(spec, nid))
2838 return 1;
2839 for (i = 0; i < spec->autocfg.hp_outs; i++)
2840 if (spec->hp_dacs[i] == nid)
2841 return 1;
2842 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2843 if (spec->speaker_dacs[i] == nid)
2844 return 1;
2845 return 0;
2846}
2847
2848static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2849{
2850 struct sigmatel_spec *spec = codec->spec;
2851 int j, conn_len;
2852 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2853 unsigned int wcaps, wtype;
2854
2855 conn_len = snd_hda_get_connections(codec, nid, conn,
2856 HDA_MAX_CONNECTIONS);
2857 for (j = 0; j < conn_len; j++) {
2858 wcaps = snd_hda_param_read(codec, conn[j],
2859 AC_PAR_AUDIO_WIDGET_CAP);
2860 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2861 /* we check only analog outputs */
2862 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2863 continue;
2864 /* if this route has a free DAC, assign it */
2865 if (!check_all_dac_nids(spec, conn[j])) {
2866 if (conn_len > 1) {
2867 /* select this DAC in the pin's input mux */
2868 snd_hda_codec_write_cache(codec, nid, 0,
2869 AC_VERB_SET_CONNECT_SEL, j);
2870 }
2871 return conn[j];
2872 }
2873 }
ee58a7ca
TI
2874 /* if all DACs are already assigned, connect to the primary DAC */
2875 if (conn_len > 1) {
2876 for (j = 0; j < conn_len; j++) {
2877 if (conn[j] == spec->multiout.dac_nids[0]) {
2878 snd_hda_codec_write_cache(codec, nid, 0,
2879 AC_VERB_SET_CONNECT_SEL, j);
2880 break;
2881 }
2882 }
2883 }
c21ca4a8
TI
2884 return 0;
2885}
2886
2887static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2888static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2889
3cc08dc6 2890/*
7b043899
SL
2891 * Fill in the dac_nids table from the parsed pin configuration
2892 * This function only works when every pin in line_out_pins[]
2893 * contains atleast one DAC in its connection list. Some 92xx
2894 * codecs are not connected directly to a DAC, such as the 9200
2895 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2896 */
c21ca4a8 2897static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2898{
2899 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2900 struct auto_pin_cfg *cfg = &spec->autocfg;
2901 int i;
2902 hda_nid_t nid, dac;
7b043899 2903
c7d4b2fa
M
2904 for (i = 0; i < cfg->line_outs; i++) {
2905 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2906 dac = get_unassigned_dac(codec, nid);
2907 if (!dac) {
df802952
TI
2908 if (spec->multiout.num_dacs > 0) {
2909 /* we have already working output pins,
2910 * so let's drop the broken ones again
2911 */
2912 cfg->line_outs = spec->multiout.num_dacs;
2913 break;
2914 }
7b043899
SL
2915 /* error out, no available DAC found */
2916 snd_printk(KERN_ERR
2917 "%s: No available DAC for pin 0x%x\n",
2918 __func__, nid);
2919 return -ENODEV;
2920 }
c21ca4a8
TI
2921 add_spec_dacs(spec, dac);
2922 }
7b043899 2923
c21ca4a8
TI
2924 /* add line-in as output */
2925 nid = check_line_out_switch(codec);
2926 if (nid) {
2927 dac = get_unassigned_dac(codec, nid);
2928 if (dac) {
2929 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2930 nid, cfg->line_outs);
2931 cfg->line_out_pins[cfg->line_outs] = nid;
2932 cfg->line_outs++;
2933 spec->line_switch = nid;
2934 add_spec_dacs(spec, dac);
2935 }
2936 }
2937 /* add mic as output */
2938 nid = check_mic_out_switch(codec);
2939 if (nid) {
2940 dac = get_unassigned_dac(codec, nid);
2941 if (dac) {
2942 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2943 nid, cfg->line_outs);
2944 cfg->line_out_pins[cfg->line_outs] = nid;
2945 cfg->line_outs++;
2946 spec->mic_switch = nid;
2947 add_spec_dacs(spec, dac);
2948 }
2949 }
c7d4b2fa 2950
c21ca4a8
TI
2951 for (i = 0; i < cfg->hp_outs; i++) {
2952 nid = cfg->hp_pins[i];
2953 dac = get_unassigned_dac(codec, nid);
2954 if (dac) {
2955 if (!spec->multiout.hp_nid)
2956 spec->multiout.hp_nid = dac;
2957 else
2958 add_spec_extra_dacs(spec, dac);
7b043899 2959 }
c21ca4a8
TI
2960 spec->hp_dacs[i] = dac;
2961 }
2962
2963 for (i = 0; i < cfg->speaker_outs; i++) {
2964 nid = cfg->speaker_pins[i];
2965 dac = get_unassigned_dac(codec, nid);
2966 if (dac)
2967 add_spec_extra_dacs(spec, dac);
2968 spec->speaker_dacs[i] = dac;
7b043899 2969 }
c7d4b2fa 2970
c21ca4a8 2971 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2972 spec->multiout.num_dacs,
2973 spec->multiout.dac_nids[0],
2974 spec->multiout.dac_nids[1],
2975 spec->multiout.dac_nids[2],
2976 spec->multiout.dac_nids[3],
2977 spec->multiout.dac_nids[4]);
c21ca4a8 2978
c7d4b2fa
M
2979 return 0;
2980}
2981
eb06ed8f 2982/* create volume control/switch for the given prefx type */
668b9652
TI
2983static int create_controls_idx(struct hda_codec *codec, const char *pfx,
2984 int idx, hda_nid_t nid, int chs)
eb06ed8f 2985{
7c7767eb 2986 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
2987 char name[32];
2988 int err;
2989
7c7767eb
TI
2990 if (!spec->check_volume_offset) {
2991 unsigned int caps, step, nums, db_scale;
2992 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2993 step = (caps & AC_AMPCAP_STEP_SIZE) >>
2994 AC_AMPCAP_STEP_SIZE_SHIFT;
2995 step = (step + 1) * 25; /* in .01dB unit */
2996 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
2997 AC_AMPCAP_NUM_STEPS_SHIFT;
2998 db_scale = nums * step;
2999 /* if dB scale is over -64dB, and finer enough,
3000 * let's reduce it to half
3001 */
3002 if (db_scale > 6400 && nums >= 0x1f)
3003 spec->volume_offset = nums / 2;
3004 spec->check_volume_offset = 1;
3005 }
3006
eb06ed8f 3007 sprintf(name, "%s Playback Volume", pfx);
668b9652 3008 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI
3009 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3010 spec->volume_offset));
eb06ed8f
TI
3011 if (err < 0)
3012 return err;
3013 sprintf(name, "%s Playback Switch", pfx);
668b9652 3014 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI
3015 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3016 if (err < 0)
3017 return err;
3018 return 0;
3019}
3020
668b9652
TI
3021#define create_controls(codec, pfx, nid, chs) \
3022 create_controls_idx(codec, pfx, 0, nid, chs)
3023
ae0afd81
MR
3024static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3025{
c21ca4a8 3026 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3027 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3028 return 1;
3029 } else {
3030 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3031 spec->multiout.num_dacs++;
3032 }
3033 return 0;
3034}
3035
c21ca4a8 3036static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3037{
c21ca4a8
TI
3038 int i;
3039 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3040 if (!spec->multiout.extra_out_nid[i]) {
3041 spec->multiout.extra_out_nid[i] = nid;
3042 return 0;
3043 }
3044 }
3045 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3046 return 1;
ae0afd81
MR
3047}
3048
dc04d1b4
TI
3049/* Create output controls
3050 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3051 */
3052static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3053 const hda_nid_t *pins,
3054 const hda_nid_t *dac_nids,
3055 int type)
c7d4b2fa 3056{
76624534 3057 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3058 static const char *chname[4] = {
3059 "Front", "Surround", NULL /*CLFE*/, "Side"
3060 };
dc04d1b4 3061 hda_nid_t nid;
91589232
TI
3062 int i, err;
3063 unsigned int wid_caps;
0fb87bb4 3064
dc04d1b4
TI
3065 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
3066 nid = dac_nids[i];
3067 if (!nid)
3068 continue;
3069 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3070 /* Center/LFE */
7c7767eb 3071 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3072 if (err < 0)
c7d4b2fa 3073 return err;
7c7767eb 3074 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3075 if (err < 0)
c7d4b2fa 3076 return err;
0fb87bb4
ML
3077
3078 wid_caps = get_wcaps(codec, nid);
3079
3080 if (wid_caps & AC_WCAP_LR_SWAP) {
3081 err = stac92xx_add_control(spec,
3082 STAC_CTL_WIDGET_CLFE_SWITCH,
3083 "Swap Center/LFE Playback Switch", nid);
3084
3085 if (err < 0)
3086 return err;
3087 }
3088
c7d4b2fa 3089 } else {
dc04d1b4 3090 const char *name;
668b9652 3091 int idx;
dc04d1b4
TI
3092 switch (type) {
3093 case AUTO_PIN_HP_OUT:
668b9652
TI
3094 name = "Headphone";
3095 idx = i;
dc04d1b4
TI
3096 break;
3097 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI
3098 name = "Speaker";
3099 idx = i;
dc04d1b4
TI
3100 break;
3101 default:
3102 name = chname[i];
668b9652 3103 idx = 0;
dc04d1b4 3104 break;
76624534 3105 }
668b9652 3106 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3107 if (err < 0)
c7d4b2fa 3108 return err;
dc04d1b4
TI
3109 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3110 wid_caps = get_wcaps(codec, pins[i]);
3111 if (wid_caps & AC_WCAP_UNSOL_CAP)
3112 spec->hp_detect = 1;
3113 }
c7d4b2fa
M
3114 }
3115 }
dc04d1b4
TI
3116 return 0;
3117}
3118
3119/* add playback controls from the parsed DAC table */
3120static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3121 const struct auto_pin_cfg *cfg)
3122{
3123 struct sigmatel_spec *spec = codec->spec;
3124 int err;
3125
3126 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3127 spec->multiout.dac_nids,
3128 cfg->line_out_type);
3129 if (err < 0)
3130 return err;
c7d4b2fa 3131
a9cb5c90 3132 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3133 err = stac92xx_add_control(spec,
3134 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3135 "Headphone as Line Out Switch",
3136 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3137 if (err < 0)
3138 return err;
3139 }
3140
b5895dc8 3141 if (spec->line_switch) {
c21ca4a8
TI
3142 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3143 "Line In as Output Switch",
3144 spec->line_switch << 8);
3145 if (err < 0)
3146 return err;
b5895dc8 3147 }
403d1944 3148
b5895dc8 3149 if (spec->mic_switch) {
c21ca4a8
TI
3150 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3151 "Mic as Output Switch",
3152 (spec->mic_switch << 8) | 1);
3153 if (err < 0)
3154 return err;
b5895dc8 3155 }
403d1944 3156
c7d4b2fa
M
3157 return 0;
3158}
3159
eb06ed8f
TI
3160/* add playback controls for Speaker and HP outputs */
3161static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3162 struct auto_pin_cfg *cfg)
3163{
3164 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI
3165 int err;
3166
3167 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3168 spec->hp_dacs, AUTO_PIN_HP_OUT);
3169 if (err < 0)
3170 return err;
3171
3172 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3173 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3174 if (err < 0)
3175 return err;
eb06ed8f 3176
c7d4b2fa
M
3177 return 0;
3178}
3179
b22b4821 3180/* labels for mono mux outputs */
d0513fc6
MR
3181static const char *stac92xx_mono_labels[4] = {
3182 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3183};
3184
3185/* create mono mux for mono out on capable codecs */
3186static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3187{
3188 struct sigmatel_spec *spec = codec->spec;
3189 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3190 int i, num_cons;
3191 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3192
3193 num_cons = snd_hda_get_connections(codec,
3194 spec->mono_nid,
3195 con_lst,
3196 HDA_MAX_NUM_INPUTS);
3197 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3198 return -EINVAL;
3199
3200 for (i = 0; i < num_cons; i++) {
3201 mono_mux->items[mono_mux->num_items].label =
3202 stac92xx_mono_labels[i];
3203 mono_mux->items[mono_mux->num_items].index = i;
3204 mono_mux->num_items++;
3205 }
09a99959
MR
3206
3207 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3208 "Mono Mux", spec->mono_nid);
b22b4821
MR
3209}
3210
89385035
MR
3211/* labels for amp mux outputs */
3212static const char *stac92xx_amp_labels[3] = {
4b33c767 3213 "Front Microphone", "Microphone", "Line In",
89385035
MR
3214};
3215
3216/* create amp out controls mux on capable codecs */
3217static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3218{
3219 struct sigmatel_spec *spec = codec->spec;
3220 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3221 int i, err;
3222
2a9c7816 3223 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3224 amp_mux->items[amp_mux->num_items].label =
3225 stac92xx_amp_labels[i];
3226 amp_mux->items[amp_mux->num_items].index = i;
3227 amp_mux->num_items++;
3228 }
3229
2a9c7816
MR
3230 if (spec->num_amps > 1) {
3231 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3232 "Amp Selector Capture Switch", 0);
3233 if (err < 0)
3234 return err;
3235 }
89385035
MR
3236 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3237 "Amp Capture Volume",
3238 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3239}
3240
3241
1cd2224c
MR
3242/* create PC beep volume controls */
3243static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3244 hda_nid_t nid)
3245{
3246 struct sigmatel_spec *spec = codec->spec;
3247 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3248 int err;
3249
3250 /* check for mute support for the the amp */
3251 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3252 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3253 "PC Beep Playback Switch",
3254 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3255 if (err < 0)
3256 return err;
3257 }
3258
3259 /* check to see if there is volume support for the amp */
3260 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3261 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3262 "PC Beep Playback Volume",
3263 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3264 if (err < 0)
3265 return err;
3266 }
3267 return 0;
3268}
3269
4d4e9bb3
TI
3270#ifdef CONFIG_SND_HDA_INPUT_BEEP
3271#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3272
3273static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3274 struct snd_ctl_elem_value *ucontrol)
3275{
3276 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3277 ucontrol->value.integer.value[0] = codec->beep->enabled;
3278 return 0;
3279}
3280
3281static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3282 struct snd_ctl_elem_value *ucontrol)
3283{
3284 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3285 int enabled = !!ucontrol->value.integer.value[0];
3286 if (codec->beep->enabled != enabled) {
3287 codec->beep->enabled = enabled;
3288 return 1;
3289 }
3290 return 0;
3291}
3292
3293static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3294 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3295 .info = stac92xx_dig_beep_switch_info,
3296 .get = stac92xx_dig_beep_switch_get,
3297 .put = stac92xx_dig_beep_switch_put,
3298};
3299
3300static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3301{
3302 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3303 0, "PC Beep Playback Switch", 0);
3304}
3305#endif
3306
4682eee0
MR
3307static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3308{
3309 struct sigmatel_spec *spec = codec->spec;
3310 int wcaps, nid, i, err = 0;
3311
3312 for (i = 0; i < spec->num_muxes; i++) {
3313 nid = spec->mux_nids[i];
3314 wcaps = get_wcaps(codec, nid);
3315
3316 if (wcaps & AC_WCAP_OUT_AMP) {
3317 err = stac92xx_add_control_idx(spec,
3318 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3319 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3320 if (err < 0)
3321 return err;
3322 }
3323 }
3324 return 0;
3325};
3326
d9737751 3327static const char *stac92xx_spdif_labels[3] = {
65973632 3328 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3329};
3330
3331static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3332{
3333 struct sigmatel_spec *spec = codec->spec;
3334 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3335 const char **labels = spec->spdif_labels;
d9737751 3336 int i, num_cons;
65973632 3337 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3338
3339 num_cons = snd_hda_get_connections(codec,
3340 spec->smux_nids[0],
3341 con_lst,
3342 HDA_MAX_NUM_INPUTS);
65973632 3343 if (!num_cons)
d9737751
MR
3344 return -EINVAL;
3345
65973632
MR
3346 if (!labels)
3347 labels = stac92xx_spdif_labels;
3348
d9737751 3349 for (i = 0; i < num_cons; i++) {
65973632 3350 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3351 spdif_mux->items[spdif_mux->num_items].index = i;
3352 spdif_mux->num_items++;
3353 }
3354
3355 return 0;
3356}
3357
8b65727b 3358/* labels for dmic mux inputs */
ddc2cec4 3359static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3360 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3361 "Digital Mic 3", "Digital Mic 4"
3362};
3363
3364/* create playback/capture controls for input pins on dmic capable codecs */
3365static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3366 const struct auto_pin_cfg *cfg)
3367{
3368 struct sigmatel_spec *spec = codec->spec;
3369 struct hda_input_mux *dimux = &spec->private_dimux;
3370 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3371 int err, i, j;
3372 char name[32];
8b65727b
MP
3373
3374 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3375 dimux->items[dimux->num_items].index = 0;
3376 dimux->num_items++;
3377
3378 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3379 hda_nid_t nid;
8b65727b
MP
3380 int index;
3381 int num_cons;
0678accd 3382 unsigned int wcaps;
8b65727b
MP
3383 unsigned int def_conf;
3384
330ee995 3385 def_conf = snd_hda_codec_get_pincfg(codec, spec->dmic_nids[i]);
8b65727b
MP
3386 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3387 continue;
3388
0678accd 3389 nid = spec->dmic_nids[i];
8b65727b 3390 num_cons = snd_hda_get_connections(codec,
e1f0d669 3391 spec->dmux_nids[0],
8b65727b
MP
3392 con_lst,
3393 HDA_MAX_NUM_INPUTS);
3394 for (j = 0; j < num_cons; j++)
0678accd 3395 if (con_lst[j] == nid) {
8b65727b
MP
3396 index = j;
3397 goto found;
3398 }
3399 continue;
3400found:
d0513fc6
MR
3401 wcaps = get_wcaps(codec, nid) &
3402 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3403
d0513fc6 3404 if (wcaps) {
0678accd
MR
3405 sprintf(name, "%s Capture Volume",
3406 stac92xx_dmic_labels[dimux->num_items]);
3407
3408 err = stac92xx_add_control(spec,
3409 STAC_CTL_WIDGET_VOL,
3410 name,
d0513fc6
MR
3411 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3412 (wcaps & AC_WCAP_OUT_AMP) ?
3413 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3414 if (err < 0)
3415 return err;
3416 }
3417
8b65727b
MP
3418 dimux->items[dimux->num_items].label =
3419 stac92xx_dmic_labels[dimux->num_items];
3420 dimux->items[dimux->num_items].index = index;
3421 dimux->num_items++;
3422 }
3423
3424 return 0;
3425}
3426
c7d4b2fa
M
3427/* create playback/capture controls for input pins */
3428static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3429{
3430 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3431 struct hda_input_mux *imux = &spec->private_imux;
3432 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3433 int i, j, k;
3434
3435 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3436 int index;
3437
3438 if (!cfg->input_pins[i])
3439 continue;
3440 index = -1;
3441 for (j = 0; j < spec->num_muxes; j++) {
3442 int num_cons;
3443 num_cons = snd_hda_get_connections(codec,
3444 spec->mux_nids[j],
3445 con_lst,
3446 HDA_MAX_NUM_INPUTS);
3447 for (k = 0; k < num_cons; k++)
3448 if (con_lst[k] == cfg->input_pins[i]) {
3449 index = k;
3450 goto found;
3451 }
c7d4b2fa 3452 }
314634bc
TI
3453 continue;
3454 found:
3455 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3456 imux->items[imux->num_items].index = index;
3457 imux->num_items++;
c7d4b2fa
M
3458 }
3459
7b043899 3460 if (imux->num_items) {
62fe78e9
SR
3461 /*
3462 * Set the current input for the muxes.
3463 * The STAC9221 has two input muxes with identical source
3464 * NID lists. Hopefully this won't get confused.
3465 */
3466 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3467 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3468 AC_VERB_SET_CONNECT_SEL,
3469 imux->items[0].index);
62fe78e9
SR
3470 }
3471 }
3472
c7d4b2fa
M
3473 return 0;
3474}
3475
c7d4b2fa
M
3476static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3477{
3478 struct sigmatel_spec *spec = codec->spec;
3479 int i;
3480
3481 for (i = 0; i < spec->autocfg.line_outs; i++) {
3482 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3483 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3484 }
3485}
3486
3487static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3488{
3489 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3490 int i;
c7d4b2fa 3491
eb06ed8f
TI
3492 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3493 hda_nid_t pin;
3494 pin = spec->autocfg.hp_pins[i];
3495 if (pin) /* connect to front */
3496 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3497 }
3498 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3499 hda_nid_t pin;
3500 pin = spec->autocfg.speaker_pins[i];
3501 if (pin) /* connect to front */
3502 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3503 }
c7d4b2fa
M
3504}
3505
3cc08dc6 3506static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3507{
3508 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3509 int hp_swap = 0;
c7d4b2fa
M
3510 int err;
3511
8b65727b
MP
3512 if ((err = snd_hda_parse_pin_def_config(codec,
3513 &spec->autocfg,
3514 spec->dmic_nids)) < 0)
c7d4b2fa 3515 return err;
82bc955f 3516 if (! spec->autocfg.line_outs)
869264c4 3517 return 0; /* can't find valid pin config */
19039bd0 3518
bcecd9bd
JZ
3519 /* If we have no real line-out pin and multiple hp-outs, HPs should
3520 * be set up as multi-channel outputs.
3521 */
3522 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3523 spec->autocfg.hp_outs > 1) {
3524 /* Copy hp_outs to line_outs, backup line_outs in
3525 * speaker_outs so that the following routines can handle
3526 * HP pins as primary outputs.
3527 */
c21ca4a8 3528 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3529 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3530 sizeof(spec->autocfg.line_out_pins));
3531 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3532 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3533 sizeof(spec->autocfg.hp_pins));
3534 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3535 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3536 spec->autocfg.hp_outs = 0;
dc04d1b4 3537 hp_swap = 1;
bcecd9bd 3538 }
09a99959 3539 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3540 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3541 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3542 u32 caps = query_amp_caps(codec,
3543 spec->autocfg.mono_out_pin, dir);
3544 hda_nid_t conn_list[1];
3545
3546 /* get the mixer node and then the mono mux if it exists */
3547 if (snd_hda_get_connections(codec,
3548 spec->autocfg.mono_out_pin, conn_list, 1) &&
3549 snd_hda_get_connections(codec, conn_list[0],
3550 conn_list, 1)) {
3551
3552 int wcaps = get_wcaps(codec, conn_list[0]);
3553 int wid_type = (wcaps & AC_WCAP_TYPE)
3554 >> AC_WCAP_TYPE_SHIFT;
3555 /* LR swap check, some stac925x have a mux that
3556 * changes the DACs output path instead of the
3557 * mono-mux path.
3558 */
3559 if (wid_type == AC_WID_AUD_SEL &&
3560 !(wcaps & AC_WCAP_LR_SWAP))
3561 spec->mono_nid = conn_list[0];
3562 }
d0513fc6
MR
3563 if (dir) {
3564 hda_nid_t nid = spec->autocfg.mono_out_pin;
3565
3566 /* most mono outs have a least a mute/unmute switch */
3567 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3568 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3569 "Mono Playback Switch",
3570 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3571 if (err < 0)
3572 return err;
d0513fc6
MR
3573 /* check for volume support for the amp */
3574 if ((caps & AC_AMPCAP_NUM_STEPS)
3575 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3576 err = stac92xx_add_control(spec,
3577 STAC_CTL_WIDGET_VOL,
3578 "Mono Playback Volume",
3579 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3580 if (err < 0)
3581 return err;
3582 }
09a99959
MR
3583 }
3584
3585 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3586 AC_PINCTL_OUT_EN);
3587 }
bcecd9bd 3588
c21ca4a8
TI
3589 if (!spec->multiout.num_dacs) {
3590 err = stac92xx_auto_fill_dac_nids(codec);
3591 if (err < 0)
19039bd0 3592 return err;
c9280d68
TI
3593 err = stac92xx_auto_create_multi_out_ctls(codec,
3594 &spec->autocfg);
3595 if (err < 0)
3596 return err;
c21ca4a8 3597 }
c7d4b2fa 3598
1cd2224c
MR
3599 /* setup analog beep controls */
3600 if (spec->anabeep_nid > 0) {
3601 err = stac92xx_auto_create_beep_ctls(codec,
3602 spec->anabeep_nid);
3603 if (err < 0)
3604 return err;
3605 }
3606
3607 /* setup digital beep controls and input device */
3608#ifdef CONFIG_SND_HDA_INPUT_BEEP
3609 if (spec->digbeep_nid > 0) {
3610 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3611 unsigned int caps;
1cd2224c
MR
3612
3613 err = stac92xx_auto_create_beep_ctls(codec, nid);
3614 if (err < 0)
3615 return err;
3616 err = snd_hda_attach_beep_device(codec, nid);
3617 if (err < 0)
3618 return err;
4d4e9bb3
TI
3619 /* if no beep switch is available, make its own one */
3620 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3621 if (codec->beep &&
3622 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3623 err = stac92xx_beep_switch_ctl(codec);
3624 if (err < 0)
3625 return err;
3626 }
1cd2224c
MR
3627 }
3628#endif
3629
0fb87bb4 3630 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML
3631 if (err < 0)
3632 return err;
3633
dc04d1b4
TI
3634 /* All output parsing done, now restore the swapped hp pins */
3635 if (hp_swap) {
3636 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3637 sizeof(spec->autocfg.hp_pins));
3638 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3639 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3640 spec->autocfg.line_outs = 0;
3641 }
0fb87bb4 3642
dc04d1b4 3643 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3644 if (err < 0)
c7d4b2fa
M
3645 return err;
3646
b22b4821
MR
3647 if (spec->mono_nid > 0) {
3648 err = stac92xx_auto_create_mono_output_ctls(codec);
3649 if (err < 0)
3650 return err;
3651 }
2a9c7816 3652 if (spec->num_amps > 0) {
89385035
MR
3653 err = stac92xx_auto_create_amp_output_ctls(codec);
3654 if (err < 0)
3655 return err;
3656 }
2a9c7816 3657 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3658 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3659 &spec->autocfg)) < 0)
3660 return err;
4682eee0
MR
3661 if (spec->num_muxes > 0) {
3662 err = stac92xx_auto_create_mux_input_ctls(codec);
3663 if (err < 0)
3664 return err;
3665 }
d9737751
MR
3666 if (spec->num_smuxes > 0) {
3667 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3668 if (err < 0)
3669 return err;
3670 }
8b65727b 3671
e3c75964
TI
3672 err = stac92xx_add_input_source(spec);
3673 if (err < 0)
3674 return err;
3675
c7d4b2fa 3676 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3677 if (spec->multiout.max_channels > 2)
c7d4b2fa 3678 spec->surr_switch = 1;
c7d4b2fa 3679
0852d7a6 3680 if (spec->autocfg.dig_outs)
3cc08dc6 3681 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3682 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3683 spec->dig_in_nid = dig_in;
c7d4b2fa 3684
603c4019
TI
3685 if (spec->kctls.list)
3686 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3687
3688 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3689 if (!spec->dinput_mux)
3690 spec->dinput_mux = &spec->private_dimux;
d9737751 3691 spec->sinput_mux = &spec->private_smux;
b22b4821 3692 spec->mono_mux = &spec->private_mono_mux;
89385035 3693 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3694 return 1;
3695}
3696
82bc955f
TI
3697/* add playback controls for HP output */
3698static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3699 struct auto_pin_cfg *cfg)
3700{
3701 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3702 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3703 unsigned int wid_caps;
3704
3705 if (! pin)
3706 return 0;
3707
3708 wid_caps = get_wcaps(codec, pin);
505cb341 3709 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3710 spec->hp_detect = 1;
82bc955f
TI
3711
3712 return 0;
3713}
3714
160ea0dc
RF
3715/* add playback controls for LFE output */
3716static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3717 struct auto_pin_cfg *cfg)
3718{
3719 struct sigmatel_spec *spec = codec->spec;
3720 int err;
3721 hda_nid_t lfe_pin = 0x0;
3722 int i;
3723
3724 /*
3725 * search speaker outs and line outs for a mono speaker pin
3726 * with an amp. If one is found, add LFE controls
3727 * for it.
3728 */
3729 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3730 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3731 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3732 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3733 if (wcaps == AC_WCAP_OUT_AMP)
3734 /* found a mono speaker with an amp, must be lfe */
3735 lfe_pin = pin;
3736 }
3737
3738 /* if speaker_outs is 0, then speakers may be in line_outs */
3739 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3740 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3741 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3742 unsigned int defcfg;
330ee995 3743 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3744 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3745 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3746 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3747 if (wcaps == AC_WCAP_OUT_AMP)
3748 /* found a mono speaker with an amp,
3749 must be lfe */
3750 lfe_pin = pin;
3751 }
3752 }
3753 }
3754
3755 if (lfe_pin) {
7c7767eb 3756 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3757 if (err < 0)
3758 return err;
3759 }
3760
3761 return 0;
3762}
3763
c7d4b2fa
M
3764static int stac9200_parse_auto_config(struct hda_codec *codec)
3765{
3766 struct sigmatel_spec *spec = codec->spec;
3767 int err;
3768
df694daa 3769 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3770 return err;
3771
3772 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3773 return err;
3774
82bc955f
TI
3775 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3776 return err;
3777
160ea0dc
RF
3778 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3779 return err;
3780
355a0ec4
TI
3781 if (spec->num_muxes > 0) {
3782 err = stac92xx_auto_create_mux_input_ctls(codec);
3783 if (err < 0)
3784 return err;
3785 }
3786
e3c75964
TI
3787 err = stac92xx_add_input_source(spec);
3788 if (err < 0)
3789 return err;
3790
0852d7a6 3791 if (spec->autocfg.dig_outs)
c7d4b2fa 3792 spec->multiout.dig_out_nid = 0x05;
82bc955f 3793 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3794 spec->dig_in_nid = 0x04;
c7d4b2fa 3795
603c4019
TI
3796 if (spec->kctls.list)
3797 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3798
3799 spec->input_mux = &spec->private_imux;
8b65727b 3800 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3801
3802 return 1;
3803}
3804
62fe78e9
SR
3805/*
3806 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3807 * funky external mute control using GPIO pins.
3808 */
3809
76e1ddfb 3810static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3811 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3812{
3813 unsigned int gpiostate, gpiomask, gpiodir;
3814
3815 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3816 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3817 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3818
3819 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3820 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3821 gpiomask |= mask;
62fe78e9
SR
3822
3823 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3824 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3825 gpiodir |= dir_mask;
62fe78e9 3826
76e1ddfb 3827 /* Configure GPIOx as CMOS */
62fe78e9
SR
3828 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3829
3830 snd_hda_codec_write(codec, codec->afg, 0,
3831 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3832 snd_hda_codec_read(codec, codec->afg, 0,
3833 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3834
3835 msleep(1);
3836
76e1ddfb
TI
3837 snd_hda_codec_read(codec, codec->afg, 0,
3838 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3839}
3840
74aeaabc
MR
3841static int stac92xx_add_jack(struct hda_codec *codec,
3842 hda_nid_t nid, int type)
3843{
e4973e1e 3844#ifdef CONFIG_SND_JACK
74aeaabc
MR
3845 struct sigmatel_spec *spec = codec->spec;
3846 struct sigmatel_jack *jack;
330ee995 3847 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR
3848 int connectivity = get_defcfg_connect(def_conf);
3849 char name[32];
3850
3851 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3852 return 0;
3853
3854 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3855 jack = snd_array_new(&spec->jacks);
3856 if (!jack)
3857 return -ENOMEM;
3858 jack->nid = nid;
3859 jack->type = type;
3860
3861 sprintf(name, "%s at %s %s Jack",
3862 snd_hda_get_jack_type(def_conf),
3863 snd_hda_get_jack_connectivity(def_conf),
3864 snd_hda_get_jack_location(def_conf));
3865
3866 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3867#else
3868 return 0;
3869#endif
74aeaabc
MR
3870}
3871
c6e4c666
TI
3872static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3873 unsigned char type, int data)
74aeaabc
MR
3874{
3875 struct sigmatel_event *event;
3876
3877 snd_array_init(&spec->events, sizeof(*event), 32);
3878 event = snd_array_new(&spec->events);
3879 if (!event)
3880 return -ENOMEM;
3881 event->nid = nid;
c6e4c666
TI
3882 event->type = type;
3883 event->tag = spec->events.used;
74aeaabc
MR
3884 event->data = data;
3885
c6e4c666 3886 return event->tag;
74aeaabc
MR
3887}
3888
c6e4c666
TI
3889static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3890 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3891{
3892 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3893 struct sigmatel_event *event = spec->events.list;
3894 int i;
3895
3896 for (i = 0; i < spec->events.used; i++, event++) {
3897 if (event->nid == nid && event->type == type)
3898 return event;
74aeaabc 3899 }
c6e4c666 3900 return NULL;
74aeaabc
MR
3901}
3902
c6e4c666
TI
3903static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3904 unsigned char tag)
314634bc 3905{
c6e4c666
TI
3906 struct sigmatel_spec *spec = codec->spec;
3907 struct sigmatel_event *event = spec->events.list;
3908 int i;
3909
3910 for (i = 0; i < spec->events.used; i++, event++) {
3911 if (event->tag == tag)
3912 return event;
74aeaabc 3913 }
c6e4c666
TI
3914 return NULL;
3915}
3916
3917static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3918 unsigned int type)
3919{
3920 struct sigmatel_event *event;
3921 int tag;
3922
3923 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3924 return;
3925 event = stac_get_event(codec, nid, type);
3926 if (event)
3927 tag = event->tag;
3928 else
3929 tag = stac_add_event(codec->spec, nid, type, 0);
3930 if (tag < 0)
3931 return;
3932 snd_hda_codec_write_cache(codec, nid, 0,
3933 AC_VERB_SET_UNSOLICITED_ENABLE,
3934 AC_USRSP_EN | tag);
314634bc
TI
3935}
3936
a64135a2
MR
3937static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3938{
3939 int i;
3940 for (i = 0; i < cfg->hp_outs; i++)
3941 if (cfg->hp_pins[i] == nid)
3942 return 1; /* nid is a HP-Out */
3943
3944 return 0; /* nid is not a HP-Out */
3945};
3946
b76c850f
MR
3947static void stac92xx_power_down(struct hda_codec *codec)
3948{
3949 struct sigmatel_spec *spec = codec->spec;
3950
3951 /* power down inactive DACs */
3952 hda_nid_t *dac;
3953 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3954 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3955 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3956 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3957}
3958
f73d3585
TI
3959static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3960 int enable);
3961
6565e4fa
TI
3962/* override some hints from the hwdep entry */
3963static void stac_store_hints(struct hda_codec *codec)
3964{
3965 struct sigmatel_spec *spec = codec->spec;
3966 const char *p;
3967 int val;
3968
3969 val = snd_hda_get_bool_hint(codec, "hp_detect");
3970 if (val >= 0)
3971 spec->hp_detect = val;
3972 p = snd_hda_get_hint(codec, "gpio_mask");
3973 if (p) {
3974 spec->gpio_mask = simple_strtoul(p, NULL, 0);
3975 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
3976 spec->gpio_mask;
3977 }
3978 p = snd_hda_get_hint(codec, "gpio_dir");
3979 if (p)
3980 spec->gpio_dir = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
3981 p = snd_hda_get_hint(codec, "gpio_data");
3982 if (p)
3983 spec->gpio_data = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
3984 p = snd_hda_get_hint(codec, "eapd_mask");
3985 if (p)
3986 spec->eapd_mask = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
3987 val = snd_hda_get_bool_hint(codec, "eapd_switch");
3988 if (val >= 0)
3989 spec->eapd_switch = val;
3990}
3991
c7d4b2fa
M
3992static int stac92xx_init(struct hda_codec *codec)
3993{
3994 struct sigmatel_spec *spec = codec->spec;
82bc955f 3995 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3996 unsigned int gpio;
e4973e1e 3997 int i;
c7d4b2fa 3998
c7d4b2fa
M
3999 snd_hda_sequence_write(codec, spec->init);
4000
8daaaa97
MR
4001 /* power down adcs initially */
4002 if (spec->powerdown_adcs)
4003 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4004 snd_hda_codec_write(codec,
8daaaa97
MR
4005 spec->adc_nids[i], 0,
4006 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4007
6565e4fa
TI
4008 /* override some hints */
4009 stac_store_hints(codec);
4010
f73d3585
TI
4011 /* set up GPIO */
4012 gpio = spec->gpio_data;
4013 /* turn on EAPD statically when spec->eapd_switch isn't set.
4014 * otherwise, unsol event will turn it on/off dynamically
4015 */
4016 if (!spec->eapd_switch)
4017 gpio |= spec->eapd_mask;
4018 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4019
82bc955f
TI
4020 /* set up pins */
4021 if (spec->hp_detect) {
505cb341 4022 /* Enable unsolicited responses on the HP widget */
74aeaabc 4023 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4024 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4025 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4026 }
0a07acaf
TI
4027 /* force to enable the first line-out; the others are set up
4028 * in unsol_event
4029 */
4030 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4031 AC_PINCTL_OUT_EN);
82bc955f 4032 /* fake event to set up pins */
c6e4c666
TI
4033 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4034 STAC_HP_EVENT);
82bc955f
TI
4035 } else {
4036 stac92xx_auto_init_multi_out(codec);
4037 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4038 for (i = 0; i < cfg->hp_outs; i++)
4039 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
4040 }
4041 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4042 hda_nid_t nid = cfg->input_pins[i];
4043 if (nid) {
12dde4c6 4044 unsigned int pinctl, conf;
4f1e6bc3
TI
4045 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4046 /* for mic pins, force to initialize */
4047 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
4048 pinctl |= AC_PINCTL_IN_EN;
4049 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4050 } else {
4051 pinctl = snd_hda_codec_read(codec, nid, 0,
4052 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4053 /* if PINCTL already set then skip */
12dde4c6
TI
4054 if (!(pinctl & AC_PINCTL_IN_EN)) {
4055 pinctl |= AC_PINCTL_IN_EN;
4056 stac92xx_auto_set_pinctl(codec, nid,
4057 pinctl);
4058 }
4059 }
330ee995 4060 conf = snd_hda_codec_get_pincfg(codec, nid);
12dde4c6
TI
4061 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4062 enable_pin_detect(codec, nid,
4063 STAC_INSERT_EVENT);
4064 stac_issue_unsol_event(codec, nid,
4065 STAC_INSERT_EVENT);
4f1e6bc3 4066 }
c960a03b 4067 }
82bc955f 4068 }
a64135a2
MR
4069 for (i = 0; i < spec->num_dmics; i++)
4070 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4071 AC_PINCTL_IN_EN);
0852d7a6
TI
4072 if (cfg->dig_out_pins[0])
4073 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI
4074 AC_PINCTL_OUT_EN);
4075 if (cfg->dig_in_pin)
4076 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4077 AC_PINCTL_IN_EN);
a64135a2 4078 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4079 hda_nid_t nid = spec->pwr_nids[i];
4080 int pinctl, def_conf;
f73d3585 4081
eb632128
TI
4082 /* power on when no jack detection is available */
4083 if (!spec->hp_detect) {
4084 stac_toggle_power_map(codec, nid, 1);
4085 continue;
4086 }
4087
4088 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4089 continue; /* already has an unsol event */
4090
4091 pinctl = snd_hda_codec_read(codec, nid, 0,
4092 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4093 /* outputs are only ports capable of power management
4094 * any attempts on powering down a input port cause the
4095 * referenced VREF to act quirky.
4096 */
eb632128
TI
4097 if (pinctl & AC_PINCTL_IN_EN) {
4098 stac_toggle_power_map(codec, nid, 1);
a64135a2 4099 continue;
eb632128 4100 }
330ee995 4101 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4102 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4103 /* skip any ports that don't have jacks since presence
4104 * detection is useless */
f73d3585
TI
4105 if (def_conf != AC_JACK_PORT_COMPLEX) {
4106 if (def_conf != AC_JACK_PORT_NONE)
4107 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4108 continue;
f73d3585 4109 }
12dde4c6
TI
4110 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4111 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4112 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4113 }
a64135a2 4114 }
b76c850f
MR
4115 if (spec->dac_list)
4116 stac92xx_power_down(codec);
c7d4b2fa
M
4117 return 0;
4118}
4119
74aeaabc
MR
4120static void stac92xx_free_jacks(struct hda_codec *codec)
4121{
e4973e1e 4122#ifdef CONFIG_SND_JACK
b94d3539 4123 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4124 struct sigmatel_spec *spec = codec->spec;
b94d3539 4125 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4126 struct sigmatel_jack *jacks = spec->jacks.list;
4127 int i;
4128 for (i = 0; i < spec->jacks.used; i++)
4129 snd_device_free(codec->bus->card, &jacks[i].jack);
4130 }
4131 snd_array_free(&spec->jacks);
e4973e1e 4132#endif
74aeaabc
MR
4133}
4134
603c4019
TI
4135static void stac92xx_free_kctls(struct hda_codec *codec)
4136{
4137 struct sigmatel_spec *spec = codec->spec;
4138
4139 if (spec->kctls.list) {
4140 struct snd_kcontrol_new *kctl = spec->kctls.list;
4141 int i;
4142 for (i = 0; i < spec->kctls.used; i++)
4143 kfree(kctl[i].name);
4144 }
4145 snd_array_free(&spec->kctls);
4146}
4147
2f2f4251
M
4148static void stac92xx_free(struct hda_codec *codec)
4149{
c7d4b2fa 4150 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4151
4152 if (! spec)
4153 return;
4154
74aeaabc
MR
4155 stac92xx_free_jacks(codec);
4156 snd_array_free(&spec->events);
11b44bbd 4157
c7d4b2fa 4158 kfree(spec);
1cd2224c 4159 snd_hda_detach_beep_device(codec);
2f2f4251
M
4160}
4161
4e55096e
M
4162static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4163 unsigned int flag)
4164{
8ce84198
TI
4165 unsigned int old_ctl, pin_ctl;
4166
4167 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4168 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4169
f9acba43
TI
4170 if (pin_ctl & AC_PINCTL_IN_EN) {
4171 /*
4172 * we need to check the current set-up direction of
4173 * shared input pins since they can be switched via
4174 * "xxx as Output" mixer switch
4175 */
4176 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4177 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4178 return;
4179 }
4180
8ce84198 4181 old_ctl = pin_ctl;
7b043899
SL
4182 /* if setting pin direction bits, clear the current
4183 direction bits first */
4184 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4185 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4186
8ce84198
TI
4187 pin_ctl |= flag;
4188 if (old_ctl != pin_ctl)
4189 snd_hda_codec_write_cache(codec, nid, 0,
4190 AC_VERB_SET_PIN_WIDGET_CONTROL,
4191 pin_ctl);
4e55096e
M
4192}
4193
4194static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4195 unsigned int flag)
4196{
4197 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4198 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4199 if (pin_ctl & flag)
4200 snd_hda_codec_write_cache(codec, nid, 0,
4201 AC_VERB_SET_PIN_WIDGET_CONTROL,
4202 pin_ctl & ~flag);
4e55096e
M
4203}
4204
e6e3ea25 4205static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4206{
4207 if (!nid)
4208 return 0;
4209 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4210 & (1 << 31))
4211 return 1;
314634bc
TI
4212 return 0;
4213}
4214
d7a89436
TI
4215/* return non-zero if the hp-pin of the given array index isn't
4216 * a jack-detection target
4217 */
4218static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4219{
4220 struct auto_pin_cfg *cfg = &spec->autocfg;
4221
4222 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4223 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4224 return 1;
c21ca4a8 4225 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4226 return 1;
4227 /* ignore if the pin is set as line-out */
4228 if (cfg->hp_pins[i] == spec->hp_switch)
4229 return 1;
4230 return 0;
4231}
4232
c6e4c666 4233static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4234{
4235 struct sigmatel_spec *spec = codec->spec;
4236 struct auto_pin_cfg *cfg = &spec->autocfg;
4237 int i, presence;
4238
eb06ed8f 4239 presence = 0;
4fe5195c
MR
4240 if (spec->gpio_mute)
4241 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4242 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4243
eb06ed8f 4244 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4245 if (presence)
4246 break;
d7a89436
TI
4247 if (no_hp_sensing(spec, i))
4248 continue;
e6e3ea25
TI
4249 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4250 if (presence) {
4251 unsigned int pinctl;
4252 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4253 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4254 if (pinctl & AC_PINCTL_IN_EN)
4255 presence = 0; /* mic- or line-input */
4256 }
eb06ed8f 4257 }
4e55096e
M
4258
4259 if (presence) {
d7a89436 4260 /* disable lineouts */
7c2ba97b 4261 if (spec->hp_switch)
d7a89436
TI
4262 stac92xx_reset_pinctl(codec, spec->hp_switch,
4263 AC_PINCTL_OUT_EN);
4e55096e
M
4264 for (i = 0; i < cfg->line_outs; i++)
4265 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4266 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4267 for (i = 0; i < cfg->speaker_outs; i++)
4268 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4269 AC_PINCTL_OUT_EN);
c0cea0d0 4270 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4271 stac_gpio_set(codec, spec->gpio_mask,
4272 spec->gpio_dir, spec->gpio_data &
4273 ~spec->eapd_mask);
4e55096e 4274 } else {
d7a89436 4275 /* enable lineouts */
7c2ba97b 4276 if (spec->hp_switch)
d7a89436
TI
4277 stac92xx_set_pinctl(codec, spec->hp_switch,
4278 AC_PINCTL_OUT_EN);
4e55096e
M
4279 for (i = 0; i < cfg->line_outs; i++)
4280 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4281 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4282 for (i = 0; i < cfg->speaker_outs; i++)
4283 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4284 AC_PINCTL_OUT_EN);
c0cea0d0 4285 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4286 stac_gpio_set(codec, spec->gpio_mask,
4287 spec->gpio_dir, spec->gpio_data |
4288 spec->eapd_mask);
4e55096e 4289 }
d7a89436
TI
4290 /* toggle hp outs */
4291 for (i = 0; i < cfg->hp_outs; i++) {
4292 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4293 if (no_hp_sensing(spec, i))
4294 continue;
4295 if (presence)
4296 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4297#if 0 /* FIXME */
4298/* Resetting the pinctl like below may lead to (a sort of) regressions
4299 * on some devices since they use the HP pin actually for line/speaker
4300 * outs although the default pin config shows a different pin (that is
4301 * wrong and useless).
4302 *
4303 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4304 * But, disabling the code below just works around it, and I'm too tired of
4305 * bug reports with such devices...
4306 */
d7a89436
TI
4307 else
4308 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4309#endif /* FIXME */
d7a89436 4310 }
4e55096e
M
4311}
4312
f73d3585
TI
4313static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4314 int enable)
a64135a2
MR
4315{
4316 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4317 unsigned int idx, val;
4318
4319 for (idx = 0; idx < spec->num_pwrs; idx++) {
4320 if (spec->pwr_nids[idx] == nid)
4321 break;
4322 }
4323 if (idx >= spec->num_pwrs)
4324 return;
d0513fc6
MR
4325
4326 /* several codecs have two power down bits */
4327 if (spec->pwr_mapping)
4328 idx = spec->pwr_mapping[idx];
4329 else
4330 idx = 1 << idx;
a64135a2 4331
f73d3585
TI
4332 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4333 if (enable)
a64135a2
MR
4334 val &= ~idx;
4335 else
4336 val |= idx;
4337
4338 /* power down unused output ports */
4339 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4340}
4341
f73d3585
TI
4342static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4343{
e6e3ea25 4344 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4345}
a64135a2 4346
74aeaabc
MR
4347static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4348{
4349 struct sigmatel_spec *spec = codec->spec;
4350 struct sigmatel_jack *jacks = spec->jacks.list;
4351
4352 if (jacks) {
4353 int i;
4354 for (i = 0; i < spec->jacks.used; i++) {
4355 if (jacks->nid == nid) {
4356 unsigned int pin_ctl =
4357 snd_hda_codec_read(codec, nid,
4358 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4359 0x00);
4360 int type = jacks->type;
4361 if (type == (SND_JACK_LINEOUT
4362 | SND_JACK_HEADPHONE))
4363 type = (pin_ctl & AC_PINCTL_HP_EN)
4364 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4365 snd_jack_report(jacks->jack,
e6e3ea25 4366 get_pin_presence(codec, nid)
74aeaabc
MR
4367 ? type : 0);
4368 }
4369 jacks++;
4370 }
4371 }
4372}
a64135a2 4373
c6e4c666
TI
4374static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4375 unsigned char type)
4376{
4377 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4378 if (!event)
4379 return;
4380 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4381}
4382
314634bc
TI
4383static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4384{
a64135a2 4385 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4386 struct sigmatel_event *event;
4387 int tag, data;
a64135a2 4388
c6e4c666
TI
4389 tag = (res >> 26) & 0x7f;
4390 event = stac_get_event_from_tag(codec, tag);
4391 if (!event)
4392 return;
4393
4394 switch (event->type) {
314634bc 4395 case STAC_HP_EVENT:
c6e4c666 4396 stac92xx_hp_detect(codec);
a64135a2 4397 /* fallthru */
74aeaabc 4398 case STAC_INSERT_EVENT:
a64135a2 4399 case STAC_PWR_EVENT:
c6e4c666
TI
4400 if (spec->num_pwrs > 0)
4401 stac92xx_pin_sense(codec, event->nid);
4402 stac92xx_report_jack(codec, event->nid);
72474be6 4403 break;
c6e4c666
TI
4404 case STAC_VREF_EVENT:
4405 data = snd_hda_codec_read(codec, codec->afg, 0,
4406 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4407 /* toggle VREF state based on GPIOx status */
4408 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4409 !!(data & (1 << event->data)));
72474be6 4410 break;
314634bc
TI
4411 }
4412}
4413
2d34e1b3
TI
4414#ifdef CONFIG_PROC_FS
4415static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4416 struct hda_codec *codec, hda_nid_t nid)
4417{
4418 if (nid == codec->afg)
4419 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4420 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4421}
4422
4423static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4424 struct hda_codec *codec,
4425 unsigned int verb)
4426{
4427 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4428 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4429}
4430
4431/* stac92hd71bxx, stac92hd73xx */
4432static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4433 struct hda_codec *codec, hda_nid_t nid)
4434{
4435 stac92hd_proc_hook(buffer, codec, nid);
4436 if (nid == codec->afg)
4437 analog_loop_proc_hook(buffer, codec, 0xfa0);
4438}
4439
4440static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4441 struct hda_codec *codec, hda_nid_t nid)
4442{
4443 if (nid == codec->afg)
4444 analog_loop_proc_hook(buffer, codec, 0xfe0);
4445}
4446
4447static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4448 struct hda_codec *codec, hda_nid_t nid)
4449{
4450 if (nid == codec->afg)
4451 analog_loop_proc_hook(buffer, codec, 0xfeb);
4452}
4453#else
4454#define stac92hd_proc_hook NULL
4455#define stac92hd7x_proc_hook NULL
4456#define stac9205_proc_hook NULL
4457#define stac927x_proc_hook NULL
4458#endif
4459
cb53c626 4460#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4461static int stac92xx_resume(struct hda_codec *codec)
4462{
dc81bed1
TI
4463 struct sigmatel_spec *spec = codec->spec;
4464
2c885878 4465 stac92xx_init(codec);
82beb8fd
TI
4466 snd_hda_codec_resume_amp(codec);
4467 snd_hda_codec_resume_cache(codec);
2c885878 4468 /* fake event to set up pins again to override cached values */
dc81bed1 4469 if (spec->hp_detect)
c6e4c666
TI
4470 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4471 STAC_HP_EVENT);
ff6fdc37
M
4472 return 0;
4473}
c6798d2b
MR
4474
4475static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4476{
4477 struct sigmatel_spec *spec = codec->spec;
4478 if (spec->eapd_mask)
4479 stac_gpio_set(codec, spec->gpio_mask,
4480 spec->gpio_dir, spec->gpio_data &
4481 ~spec->eapd_mask);
4482 return 0;
4483}
ff6fdc37
M
4484#endif
4485
2f2f4251
M
4486static struct hda_codec_ops stac92xx_patch_ops = {
4487 .build_controls = stac92xx_build_controls,
4488 .build_pcms = stac92xx_build_pcms,
4489 .init = stac92xx_init,
4490 .free = stac92xx_free,
4e55096e 4491 .unsol_event = stac92xx_unsol_event,
cb53c626 4492#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4493 .suspend = stac92xx_suspend,
ff6fdc37
M
4494 .resume = stac92xx_resume,
4495#endif
2f2f4251
M
4496};
4497
4498static int patch_stac9200(struct hda_codec *codec)
4499{
4500 struct sigmatel_spec *spec;
c7d4b2fa 4501 int err;
2f2f4251 4502
e560d8d8 4503 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4504 if (spec == NULL)
4505 return -ENOMEM;
4506
4507 codec->spec = spec;
a4eed138 4508 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4509 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4510 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4511 stac9200_models,
4512 stac9200_cfg_tbl);
330ee995 4513 if (spec->board_config < 0)
11b44bbd 4514 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
330ee995
TI
4515 else
4516 stac92xx_set_config_regs(codec,
af9f341a 4517 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M
4518
4519 spec->multiout.max_channels = 2;
4520 spec->multiout.num_dacs = 1;
4521 spec->multiout.dac_nids = stac9200_dac_nids;
4522 spec->adc_nids = stac9200_adc_nids;
4523 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4524 spec->num_muxes = 1;
8b65727b 4525 spec->num_dmics = 0;
9e05b7a3 4526 spec->num_adcs = 1;
a64135a2 4527 spec->num_pwrs = 0;
c7d4b2fa 4528
58eec423
MCC
4529 if (spec->board_config == STAC_9200_M4 ||
4530 spec->board_config == STAC_9200_M4_2 ||
bf277785 4531 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4532 spec->init = stac9200_eapd_init;
4533 else
4534 spec->init = stac9200_core_init;
2f2f4251 4535 spec->mixer = stac9200_mixer;
c7d4b2fa 4536
117f257d
TI
4537 if (spec->board_config == STAC_9200_PANASONIC) {
4538 spec->gpio_mask = spec->gpio_dir = 0x09;
4539 spec->gpio_data = 0x00;
4540 }
4541
c7d4b2fa
M
4542 err = stac9200_parse_auto_config(codec);
4543 if (err < 0) {
4544 stac92xx_free(codec);
4545 return err;
4546 }
2f2f4251 4547
2acc9dcb
TI
4548 /* CF-74 has no headphone detection, and the driver should *NOT*
4549 * do detection and HP/speaker toggle because the hardware does it.
4550 */
4551 if (spec->board_config == STAC_9200_PANASONIC)
4552 spec->hp_detect = 0;
4553
2f2f4251
M
4554 codec->patch_ops = stac92xx_patch_ops;
4555
4556 return 0;
4557}
4558
8e21c34c
TD
4559static int patch_stac925x(struct hda_codec *codec)
4560{
4561 struct sigmatel_spec *spec;
4562 int err;
4563
4564 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4565 if (spec == NULL)
4566 return -ENOMEM;
4567
4568 codec->spec = spec;
a4eed138 4569 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4570 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4571
4572 /* Check first for codec ID */
4573 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4574 STAC_925x_MODELS,
4575 stac925x_models,
4576 stac925x_codec_id_cfg_tbl);
4577
4578 /* Now checks for PCI ID, if codec ID is not found */
4579 if (spec->board_config < 0)
4580 spec->board_config = snd_hda_check_board_config(codec,
4581 STAC_925x_MODELS,
8e21c34c
TD
4582 stac925x_models,
4583 stac925x_cfg_tbl);
9e507abd 4584 again:
330ee995 4585 if (spec->board_config < 0)
9cb36c2a 4586 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4587 "using BIOS defaults\n");
330ee995
TI
4588 else
4589 stac92xx_set_config_regs(codec,
af9f341a 4590 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD
4591
4592 spec->multiout.max_channels = 2;
4593 spec->multiout.num_dacs = 1;
4594 spec->multiout.dac_nids = stac925x_dac_nids;
4595 spec->adc_nids = stac925x_adc_nids;
4596 spec->mux_nids = stac925x_mux_nids;
4597 spec->num_muxes = 1;
9e05b7a3 4598 spec->num_adcs = 1;
a64135a2 4599 spec->num_pwrs = 0;
2c11f955
TD
4600 switch (codec->vendor_id) {
4601 case 0x83847632: /* STAC9202 */
4602 case 0x83847633: /* STAC9202D */
4603 case 0x83847636: /* STAC9251 */
4604 case 0x83847637: /* STAC9251D */
f6e9852a 4605 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4606 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4607 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4608 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4609 break;
4610 default:
4611 spec->num_dmics = 0;
4612 break;
4613 }
8e21c34c
TD
4614
4615 spec->init = stac925x_core_init;
4616 spec->mixer = stac925x_mixer;
4617
4618 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4619 if (!err) {
4620 if (spec->board_config < 0) {
4621 printk(KERN_WARNING "hda_codec: No auto-config is "
4622 "available, default to model=ref\n");
4623 spec->board_config = STAC_925x_REF;
4624 goto again;
4625 }
4626 err = -EINVAL;
4627 }
8e21c34c
TD
4628 if (err < 0) {
4629 stac92xx_free(codec);
4630 return err;
4631 }
4632
4633 codec->patch_ops = stac92xx_patch_ops;
4634
4635 return 0;
4636}
4637
e1f0d669
MR
4638static struct hda_input_mux stac92hd73xx_dmux = {
4639 .num_items = 4,
4640 .items = {
4641 { "Analog Inputs", 0x0b },
e1f0d669
MR
4642 { "Digital Mic 1", 0x09 },
4643 { "Digital Mic 2", 0x0a },
2a9c7816 4644 { "CD", 0x08 },
e1f0d669
MR
4645 }
4646};
4647
4648static int patch_stac92hd73xx(struct hda_codec *codec)
4649{
4650 struct sigmatel_spec *spec;
4651 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4652 int err = 0;
c21ca4a8 4653 int num_dacs;
e1f0d669
MR
4654
4655 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4656 if (spec == NULL)
4657 return -ENOMEM;
4658
4659 codec->spec = spec;
e99d32b3 4660 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4661 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4662 spec->pin_nids = stac92hd73xx_pin_nids;
4663 spec->board_config = snd_hda_check_board_config(codec,
4664 STAC_92HD73XX_MODELS,
4665 stac92hd73xx_models,
4666 stac92hd73xx_cfg_tbl);
4667again:
330ee995 4668 if (spec->board_config < 0)
e1f0d669
MR
4669 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4670 " STAC92HD73XX, using BIOS defaults\n");
330ee995
TI
4671 else
4672 stac92xx_set_config_regs(codec,
af9f341a 4673 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 4674
c21ca4a8 4675 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4676 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4677
c21ca4a8 4678 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4679 printk(KERN_WARNING "hda_codec: Could not determine "
4680 "number of channels defaulting to DAC count\n");
c21ca4a8 4681 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4682 }
c21ca4a8 4683 switch (num_dacs) {
e1f0d669
MR
4684 case 0x3: /* 6 Channel */
4685 spec->mixer = stac92hd73xx_6ch_mixer;
4686 spec->init = stac92hd73xx_6ch_core_init;
d78d7a90 4687 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR
4688 break;
4689 case 0x4: /* 8 Channel */
e1f0d669
MR
4690 spec->mixer = stac92hd73xx_8ch_mixer;
4691 spec->init = stac92hd73xx_8ch_core_init;
d78d7a90 4692 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR
4693 break;
4694 case 0x5: /* 10 Channel */
e1f0d669
MR
4695 spec->mixer = stac92hd73xx_10ch_mixer;
4696 spec->init = stac92hd73xx_10ch_core_init;
d78d7a90
TI
4697 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
4698 break;
c21ca4a8
TI
4699 }
4700 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4701
e1f0d669
MR
4702 spec->aloopback_mask = 0x01;
4703 spec->aloopback_shift = 8;
4704
1cd2224c 4705 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4706 spec->mux_nids = stac92hd73xx_mux_nids;
4707 spec->adc_nids = stac92hd73xx_adc_nids;
4708 spec->dmic_nids = stac92hd73xx_dmic_nids;
4709 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4710 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4711 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4712 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4713
4714 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4715 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4716 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4717 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4718 sizeof(stac92hd73xx_dmux));
4719
a7662640 4720 switch (spec->board_config) {
6b3ab21e 4721 case STAC_DELL_EQ:
d654a660 4722 spec->init = dell_eq_core_init;
6b3ab21e 4723 /* fallthru */
661cd8fb
TI
4724 case STAC_DELL_M6_AMIC:
4725 case STAC_DELL_M6_DMIC:
4726 case STAC_DELL_M6_BOTH:
2a9c7816 4727 spec->num_smuxes = 0;
2a9c7816
MR
4728 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4729 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4730 spec->eapd_switch = 0;
2a9c7816 4731 spec->num_amps = 1;
6b3ab21e 4732
c21ca4a8 4733 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4734 spec->init = dell_m6_core_init;
661cd8fb
TI
4735 switch (spec->board_config) {
4736 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 4737 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640 4738 spec->num_dmics = 0;
2a9c7816 4739 spec->private_dimux.num_items = 1;
a7662640 4740 break;
661cd8fb 4741 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 4742 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640 4743 spec->num_dmics = 1;
2a9c7816 4744 spec->private_dimux.num_items = 2;
a7662640 4745 break;
661cd8fb 4746 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI
4747 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
4748 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640 4749 spec->num_dmics = 1;
2a9c7816 4750 spec->private_dimux.num_items = 2;
a7662640
MR
4751 break;
4752 }
4753 break;
4754 default:
4755 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4756 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4757 spec->eapd_switch = 1;
a7662640 4758 }
b2c4f4d7
MR
4759 if (spec->board_config > STAC_92HD73XX_REF) {
4760 /* GPIO0 High = Enable EAPD */
4761 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4762 spec->gpio_data = 0x01;
4763 }
2a9c7816 4764 spec->dinput_mux = &spec->private_dimux;
a7662640 4765
a64135a2
MR
4766 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4767 spec->pwr_nids = stac92hd73xx_pwr_nids;
4768
d9737751 4769 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4770
4771 if (!err) {
4772 if (spec->board_config < 0) {
4773 printk(KERN_WARNING "hda_codec: No auto-config is "
4774 "available, default to model=ref\n");
4775 spec->board_config = STAC_92HD73XX_REF;
4776 goto again;
4777 }
4778 err = -EINVAL;
4779 }
4780
4781 if (err < 0) {
4782 stac92xx_free(codec);
4783 return err;
4784 }
4785
9e43f0de
TI
4786 if (spec->board_config == STAC_92HD73XX_NO_JD)
4787 spec->hp_detect = 0;
4788
e1f0d669
MR
4789 codec->patch_ops = stac92xx_patch_ops;
4790
2d34e1b3
TI
4791 codec->proc_widget_hook = stac92hd7x_proc_hook;
4792
e1f0d669
MR
4793 return 0;
4794}
4795
d0513fc6
MR
4796static struct hda_input_mux stac92hd83xxx_dmux = {
4797 .num_items = 3,
4798 .items = {
4799 { "Analog Inputs", 0x03 },
4800 { "Digital Mic 1", 0x04 },
4801 { "Digital Mic 2", 0x05 },
4802 }
4803};
4804
4805static int patch_stac92hd83xxx(struct hda_codec *codec)
4806{
4807 struct sigmatel_spec *spec;
65557f35 4808 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4809 int err;
65557f35 4810 int num_dacs;
8bb0ac55 4811 hda_nid_t nid;
d0513fc6
MR
4812
4813 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4814 if (spec == NULL)
4815 return -ENOMEM;
4816
4817 codec->spec = spec;
0ffa9807 4818 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4819 spec->mono_nid = 0x19;
4820 spec->digbeep_nid = 0x21;
4821 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4822 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4823 spec->adc_nids = stac92hd83xxx_adc_nids;
4824 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4825 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4826 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4827 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4828 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
4829
4830 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR
4831 spec->mixer = stac92hd83xxx_mixer;
4832 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4833 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4834 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4835 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4836 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4837 spec->dinput_mux = &stac92hd83xxx_dmux;
4838 spec->pin_nids = stac92hd83xxx_pin_nids;
4839 spec->board_config = snd_hda_check_board_config(codec,
4840 STAC_92HD83XXX_MODELS,
4841 stac92hd83xxx_models,
4842 stac92hd83xxx_cfg_tbl);
4843again:
330ee995 4844 if (spec->board_config < 0)
d0513fc6
MR
4845 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4846 " STAC92HD83XXX, using BIOS defaults\n");
330ee995
TI
4847 else
4848 stac92xx_set_config_regs(codec,
af9f341a 4849 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 4850
32ed3f46
MR
4851 switch (codec->vendor_id) {
4852 case 0x111d7604:
4853 case 0x111d7605:
4854 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4855 break;
4856 spec->num_pwrs = 0;
4857 break;
4858 }
4859
d0513fc6
MR
4860 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4861 if (!err) {
4862 if (spec->board_config < 0) {
4863 printk(KERN_WARNING "hda_codec: No auto-config is "
4864 "available, default to model=ref\n");
4865 spec->board_config = STAC_92HD83XXX_REF;
4866 goto again;
4867 }
4868 err = -EINVAL;
4869 }
4870
4871 if (err < 0) {
4872 stac92xx_free(codec);
4873 return err;
4874 }
4875
8bb0ac55
MR
4876 switch (spec->board_config) {
4877 case STAC_DELL_S14:
4878 nid = 0xf;
4879 break;
4880 default:
4881 nid = 0xe;
4882 break;
4883 }
4884
4885 num_dacs = snd_hda_get_connections(codec, nid,
4886 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4887
4888 /* set port X to select the last DAC
4889 */
4890 snd_hda_codec_write_cache(codec, nid, 0,
4891 AC_VERB_SET_CONNECT_SEL, num_dacs);
4892
d0513fc6
MR
4893 codec->patch_ops = stac92xx_patch_ops;
4894
2d34e1b3
TI
4895 codec->proc_widget_hook = stac92hd_proc_hook;
4896
d0513fc6
MR
4897 return 0;
4898}
4899
6df703ae
HRK
4900static struct hda_input_mux stac92hd71bxx_dmux_nomixer = {
4901 .num_items = 3,
4902 .items = {
4903 { "Analog Inputs", 0x00 },
4904 { "Digital Mic 1", 0x02 },
4905 { "Digital Mic 2", 0x03 },
4906 }
4907};
4908
4909static struct hda_input_mux stac92hd71bxx_dmux_amixer = {
4b33c767
MR
4910 .num_items = 4,
4911 .items = {
4912 { "Analog Inputs", 0x00 },
4913 { "Mixer", 0x01 },
4914 { "Digital Mic 1", 0x02 },
4915 { "Digital Mic 2", 0x03 },
4916 }
4917};
4918
330ee995
TI
4919/* get the pin connection (fixed, none, etc) */
4920static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4921{
4922 struct sigmatel_spec *spec = codec->spec;
4923 unsigned int cfg;
4924
4925 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4926 return get_defcfg_connect(cfg);
4927}
4928
6df703ae
HRK
4929static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
4930 hda_nid_t *nids, int num_nids)
4931{
4932 struct sigmatel_spec *spec = codec->spec;
4933 int idx, num;
4934 unsigned int def_conf;
4935
4936 for (num = 0; num < num_nids; num++) {
4937 for (idx = 0; idx < spec->num_pins; idx++)
4938 if (spec->pin_nids[idx] == nids[num])
4939 break;
4940 if (idx >= spec->num_pins)
4941 break;
330ee995 4942 def_conf = stac_get_defcfg_connect(codec, idx);
6df703ae
HRK
4943 if (def_conf == AC_JACK_PORT_NONE)
4944 break;
4945 }
4946 return num;
4947}
4948
4949static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
4950 hda_nid_t dig0pin)
4951{
4952 struct sigmatel_spec *spec = codec->spec;
4953 int idx;
4954
4955 for (idx = 0; idx < spec->num_pins; idx++)
4956 if (spec->pin_nids[idx] == dig0pin)
4957 break;
4958 if ((idx + 2) >= spec->num_pins)
4959 return 0;
4960
4961 /* dig1pin case */
330ee995 4962 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK
4963 return 2;
4964
4965 /* dig0pin + dig2pin case */
330ee995 4966 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 4967 return 2;
330ee995 4968 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK
4969 return 1;
4970 else
4971 return 0;
4972}
4973
e035b841
MR
4974static int patch_stac92hd71bxx(struct hda_codec *codec)
4975{
4976 struct sigmatel_spec *spec;
ca8d33fc 4977 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
e035b841 4978 int err = 0;
6df703ae 4979 unsigned int ndmic_nids = 0;
e035b841
MR
4980
4981 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4982 if (spec == NULL)
4983 return -ENOMEM;
4984
4985 codec->spec = spec;
8daaaa97 4986 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
4987 spec->num_pins = STAC92HD71BXX_NUM_PINS;
4988 switch (codec->vendor_id) {
4989 case 0x111d76b6:
4990 case 0x111d76b7:
4991 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
4992 break;
4993 case 0x111d7603:
4994 case 0x111d7608:
4995 /* On 92HD75Bx 0x27 isn't a pin nid */
4996 spec->num_pins--;
4997 /* fallthrough */
4998 default:
4999 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5000 }
aafc4412 5001 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5002 spec->board_config = snd_hda_check_board_config(codec,
5003 STAC_92HD71BXX_MODELS,
5004 stac92hd71bxx_models,
5005 stac92hd71bxx_cfg_tbl);
5006again:
330ee995 5007 if (spec->board_config < 0)
e035b841
MR
5008 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5009 " STAC92HD71BXX, using BIOS defaults\n");
330ee995
TI
5010 else
5011 stac92xx_set_config_regs(codec,
af9f341a 5012 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5013
41c3b648
TI
5014 if (spec->board_config > STAC_92HD71BXX_REF) {
5015 /* GPIO0 = EAPD */
5016 spec->gpio_mask = 0x01;
5017 spec->gpio_dir = 0x01;
5018 spec->gpio_data = 0x01;
5019 }
5020
6df703ae
HRK
5021 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5022 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5023
541eee87
MR
5024 switch (codec->vendor_id) {
5025 case 0x111d76b6: /* 4 Port without Analog Mixer */
5026 case 0x111d76b7:
23c7b521
HRK
5027 unmute_init++;
5028 /* fallthru */
541eee87
MR
5029 case 0x111d76b4: /* 6 Port without Analog Mixer */
5030 case 0x111d76b5:
6df703ae
HRK
5031 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_nomixer,
5032 sizeof(stac92hd71bxx_dmux_nomixer));
541eee87
MR
5033 spec->mixer = stac92hd71bxx_mixer;
5034 spec->init = stac92hd71bxx_core_init;
0ffa9807 5035 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5036 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5037 stac92hd71bxx_dmic_nids,
5038 STAC92HD71BXX_NUM_DMICS);
5039 if (spec->num_dmics) {
5040 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5041 spec->dinput_mux = &spec->private_dimux;
5042 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
5043 }
541eee87 5044 break;
aafc4412 5045 case 0x111d7608: /* 5 Port with Analog Mixer */
6df703ae
HRK
5046 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
5047 sizeof(stac92hd71bxx_dmux_amixer));
5048 spec->private_dimux.num_items--;
8e5f262b
TI
5049 switch (spec->board_config) {
5050 case STAC_HP_M4:
72474be6 5051 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
5052 err = stac_add_event(spec, codec->afg,
5053 STAC_VREF_EVENT, 0x02);
5054 if (err < 0)
5055 return err;
c5d08bb5 5056 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5057 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5058 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5059 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5060 AC_USRSP_EN | err);
72474be6
MR
5061 spec->gpio_mask |= 0x02;
5062 break;
5063 }
8daaaa97 5064 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5065 (codec->revision_id & 0xf) == 1)
8daaaa97 5066 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5067
aafc4412
MR
5068 /* no output amps */
5069 spec->num_pwrs = 0;
5070 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 5071 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
5072
5073 /* disable VSW */
5074 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
ca8d33fc 5075 unmute_init++;
330ee995
TI
5076 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5077 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae
HRK
5078 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
5079 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5080 stac92hd71bxx_dmic_nids,
5081 STAC92HD71BXX_NUM_DMICS - 1);
5082 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5083 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 2;
aafc4412
MR
5084 break;
5085 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5086 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5087 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5088
aafc4412
MR
5089 /* no output amps */
5090 spec->num_pwrs = 0;
5091 /* fallthru */
541eee87 5092 default:
6df703ae
HRK
5093 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
5094 sizeof(stac92hd71bxx_dmux_amixer));
4b33c767 5095 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
5096 spec->mixer = stac92hd71bxx_analog_mixer;
5097 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 5098 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5099 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5100 stac92hd71bxx_dmic_nids,
5101 STAC92HD71BXX_NUM_DMICS);
5102 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5103 ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
541eee87
MR
5104 }
5105
ca8d33fc
MR
5106 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5107 snd_hda_sequence_write_cache(codec, unmute_init);
5108
d78d7a90 5109 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5110 spec->aloopback_mask = 0x50;
541eee87
MR
5111 spec->aloopback_shift = 0;
5112
8daaaa97 5113 spec->powerdown_adcs = 1;
1cd2224c 5114 spec->digbeep_nid = 0x26;
e035b841
MR
5115 spec->mux_nids = stac92hd71bxx_mux_nids;
5116 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5117 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5118 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5119
5120 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5121 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
6df703ae 5122 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5123
6a14f585
MR
5124 switch (spec->board_config) {
5125 case STAC_HP_M4:
6a14f585 5126 /* enable internal microphone */
330ee995 5127 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR
5128 stac92xx_auto_set_pinctl(codec, 0x0e,
5129 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5130 /* fallthru */
5131 case STAC_DELL_M4_2:
5132 spec->num_dmics = 0;
5133 spec->num_smuxes = 0;
5134 spec->num_dmuxes = 0;
5135 break;
5136 case STAC_DELL_M4_1:
5137 case STAC_DELL_M4_3:
5138 spec->num_dmics = 1;
5139 spec->num_smuxes = 0;
ea18aa46 5140 spec->num_dmuxes = 1;
6a14f585 5141 break;
e2ea57a8 5142 case STAC_HP_DV5:
330ee995 5143 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8
HRK
5144 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
5145 break;
6a14f585
MR
5146 };
5147
c21ca4a8 5148 spec->multiout.dac_nids = spec->dac_nids;
4b33c767 5149 if (spec->dinput_mux)
6df703ae 5150 spec->private_dimux.num_items += spec->num_dmics - ndmic_nids;
e035b841 5151
29d4ab4d 5152 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR
5153 if (!err) {
5154 if (spec->board_config < 0) {
5155 printk(KERN_WARNING "hda_codec: No auto-config is "
5156 "available, default to model=ref\n");
5157 spec->board_config = STAC_92HD71BXX_REF;
5158 goto again;
5159 }
5160 err = -EINVAL;
5161 }
5162
5163 if (err < 0) {
5164 stac92xx_free(codec);
5165 return err;
5166 }
5167
2d34e1b3
TI
5168 codec->proc_widget_hook = stac92hd7x_proc_hook;
5169
e035b841
MR
5170 return 0;
5171};
5172
2f2f4251
M
5173static int patch_stac922x(struct hda_codec *codec)
5174{
5175 struct sigmatel_spec *spec;
c7d4b2fa 5176 int err;
2f2f4251 5177
e560d8d8 5178 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5179 if (spec == NULL)
5180 return -ENOMEM;
5181
5182 codec->spec = spec;
a4eed138 5183 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5184 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5185 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5186 stac922x_models,
5187 stac922x_cfg_tbl);
536319af 5188 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5189 spec->gpio_mask = spec->gpio_dir = 0x03;
5190 spec->gpio_data = 0x03;
3fc24d85
TI
5191 /* Intel Macs have all same PCI SSID, so we need to check
5192 * codec SSID to distinguish the exact models
5193 */
6f0778d8 5194 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5195 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5196
5197 case 0x106b0800:
5198 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5199 break;
5d5d3bc3
IZ
5200 case 0x106b0600:
5201 case 0x106b0700:
5202 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5203 break;
5d5d3bc3
IZ
5204 case 0x106b0e00:
5205 case 0x106b0f00:
5206 case 0x106b1600:
5207 case 0x106b1700:
5208 case 0x106b0200:
5209 case 0x106b1e00:
5210 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5211 break;
5d5d3bc3
IZ
5212 case 0x106b1a00:
5213 case 0x00000100:
5214 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5215 break;
5d5d3bc3
IZ
5216 case 0x106b0a00:
5217 case 0x106b2200:
5218 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5219 break;
536319af
NB
5220 default:
5221 spec->board_config = STAC_INTEL_MAC_V3;
5222 break;
3fc24d85
TI
5223 }
5224 }
5225
9e507abd 5226 again:
330ee995 5227 if (spec->board_config < 0)
11b44bbd
RF
5228 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5229 "using BIOS defaults\n");
330ee995
TI
5230 else
5231 stac92xx_set_config_regs(codec,
af9f341a 5232 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5233
c7d4b2fa
M
5234 spec->adc_nids = stac922x_adc_nids;
5235 spec->mux_nids = stac922x_mux_nids;
2549413e 5236 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5237 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5238 spec->num_dmics = 0;
a64135a2 5239 spec->num_pwrs = 0;
c7d4b2fa
M
5240
5241 spec->init = stac922x_core_init;
2f2f4251 5242 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5243
5244 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5245
3cc08dc6 5246 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5247 if (!err) {
5248 if (spec->board_config < 0) {
5249 printk(KERN_WARNING "hda_codec: No auto-config is "
5250 "available, default to model=ref\n");
5251 spec->board_config = STAC_D945_REF;
5252 goto again;
5253 }
5254 err = -EINVAL;
5255 }
3cc08dc6
MP
5256 if (err < 0) {
5257 stac92xx_free(codec);
5258 return err;
5259 }
5260
5261 codec->patch_ops = stac92xx_patch_ops;
5262
807a4636
TI
5263 /* Fix Mux capture level; max to 2 */
5264 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5265 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5266 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5267 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5268 (0 << AC_AMPCAP_MUTE_SHIFT));
5269
3cc08dc6
MP
5270 return 0;
5271}
5272
5273static int patch_stac927x(struct hda_codec *codec)
5274{
5275 struct sigmatel_spec *spec;
5276 int err;
5277
5278 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5279 if (spec == NULL)
5280 return -ENOMEM;
5281
5282 codec->spec = spec;
45c1d85b 5283 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5284 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5285 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5286 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5287 stac927x_models,
5288 stac927x_cfg_tbl);
9e507abd 5289 again:
330ee995 5290 if (spec->board_config < 0)
c98041f7
HRK
5291 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5292 "STAC927x, using BIOS defaults\n");
330ee995
TI
5293 else
5294 stac92xx_set_config_regs(codec,
af9f341a 5295 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5296
1cd2224c 5297 spec->digbeep_nid = 0x23;
8e9068b1
MR
5298 spec->adc_nids = stac927x_adc_nids;
5299 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5300 spec->mux_nids = stac927x_mux_nids;
5301 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5302 spec->smux_nids = stac927x_smux_nids;
5303 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5304 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5305 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5306 spec->multiout.dac_nids = spec->dac_nids;
5307
81d3dbde 5308 switch (spec->board_config) {
93ed1503 5309 case STAC_D965_3ST:
93ed1503 5310 case STAC_D965_5ST:
8e9068b1 5311 /* GPIO0 High = Enable EAPD */
0fc9dec4 5312 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5313 spec->gpio_data = 0x01;
8e9068b1
MR
5314 spec->num_dmics = 0;
5315
93ed1503 5316 spec->init = d965_core_init;
9e05b7a3 5317 spec->mixer = stac927x_mixer;
81d3dbde 5318 break;
8e9068b1 5319 case STAC_DELL_BIOS:
780c8be4
MR
5320 switch (codec->subsystem_id) {
5321 case 0x10280209:
5322 case 0x1028022e:
5323 /* correct the device field to SPDIF out */
330ee995 5324 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4
MR
5325 break;
5326 };
03d7ca17 5327 /* configure the analog microphone on some laptops */
330ee995 5328 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5329 /* correct the front output jack as a hp out */
330ee995 5330 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5331 /* correct the front input jack as a mic */
330ee995 5332 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5333 /* fallthru */
8e9068b1
MR
5334 case STAC_DELL_3ST:
5335 /* GPIO2 High = Enable EAPD */
0fc9dec4 5336 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5337 spec->gpio_data = 0x04;
7f16859a
MR
5338 spec->dmic_nids = stac927x_dmic_nids;
5339 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5340
8e9068b1
MR
5341 spec->init = d965_core_init;
5342 spec->mixer = stac927x_mixer;
5343 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5344 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5345 break;
5346 default:
b2c4f4d7
MR
5347 if (spec->board_config > STAC_D965_REF) {
5348 /* GPIO0 High = Enable EAPD */
5349 spec->eapd_mask = spec->gpio_mask = 0x01;
5350 spec->gpio_dir = spec->gpio_data = 0x01;
5351 }
8e9068b1
MR
5352 spec->num_dmics = 0;
5353
5354 spec->init = stac927x_core_init;
5355 spec->mixer = stac927x_mixer;
7f16859a
MR
5356 }
5357
a64135a2 5358 spec->num_pwrs = 0;
d78d7a90 5359 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR
5360 spec->aloopback_mask = 0x40;
5361 spec->aloopback_shift = 0;
c0cea0d0 5362 spec->eapd_switch = 1;
8e9068b1 5363
3cc08dc6 5364 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5365 if (!err) {
5366 if (spec->board_config < 0) {
5367 printk(KERN_WARNING "hda_codec: No auto-config is "
5368 "available, default to model=ref\n");
5369 spec->board_config = STAC_D965_REF;
5370 goto again;
5371 }
5372 err = -EINVAL;
5373 }
c7d4b2fa
M
5374 if (err < 0) {
5375 stac92xx_free(codec);
5376 return err;
5377 }
2f2f4251
M
5378
5379 codec->patch_ops = stac92xx_patch_ops;
5380
2d34e1b3
TI
5381 codec->proc_widget_hook = stac927x_proc_hook;
5382
52987656
TI
5383 /*
5384 * !!FIXME!!
5385 * The STAC927x seem to require fairly long delays for certain
5386 * command sequences. With too short delays (even if the answer
5387 * is set to RIRB properly), it results in the silence output
5388 * on some hardwares like Dell.
5389 *
5390 * The below flag enables the longer delay (see get_response
5391 * in hda_intel.c).
5392 */
5393 codec->bus->needs_damn_long_delay = 1;
5394
e28d8322
TI
5395 /* no jack detecion for ref-no-jd model */
5396 if (spec->board_config == STAC_D965_REF_NO_JD)
5397 spec->hp_detect = 0;
5398
2f2f4251
M
5399 return 0;
5400}
5401
f3302a59
MP
5402static int patch_stac9205(struct hda_codec *codec)
5403{
5404 struct sigmatel_spec *spec;
8259980e 5405 int err;
f3302a59
MP
5406
5407 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5408 if (spec == NULL)
5409 return -ENOMEM;
5410
5411 codec->spec = spec;
a4eed138 5412 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5413 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5414 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5415 stac9205_models,
5416 stac9205_cfg_tbl);
9e507abd 5417 again:
330ee995 5418 if (spec->board_config < 0)
11b44bbd 5419 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
330ee995
TI
5420 else
5421 stac92xx_set_config_regs(codec,
af9f341a 5422 stac9205_brd_tbl[spec->board_config]);
f3302a59 5423
1cd2224c 5424 spec->digbeep_nid = 0x23;
f3302a59 5425 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5426 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5427 spec->mux_nids = stac9205_mux_nids;
2549413e 5428 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5429 spec->smux_nids = stac9205_smux_nids;
5430 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5431 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5432 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5433 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5434 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5435 spec->num_pwrs = 0;
f3302a59
MP
5436
5437 spec->init = stac9205_core_init;
5438 spec->mixer = stac9205_mixer;
d78d7a90 5439 spec->aloopback_ctl = stac9205_loopback;
f3302a59 5440
e1f0d669
MR
5441 spec->aloopback_mask = 0x40;
5442 spec->aloopback_shift = 0;
d9a4268e
TI
5443 /* Turn on/off EAPD per HP plugging */
5444 if (spec->board_config != STAC_9205_EAPD)
5445 spec->eapd_switch = 1;
f3302a59 5446 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5447
ae0a8ed8 5448 switch (spec->board_config){
ae0a8ed8 5449 case STAC_9205_DELL_M43:
87d48363 5450 /* Enable SPDIF in/out */
330ee995
TI
5451 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
5452 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 5453
4fe5195c 5454 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5455 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5456 if (err < 0)
5457 return err;
c5d08bb5 5458 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5459 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5460 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5461 AC_VERB_SET_UNSOLICITED_ENABLE,
5462 AC_USRSP_EN | err);
4fe5195c
MR
5463
5464 spec->gpio_dir = 0x0b;
0fc9dec4 5465 spec->eapd_mask = 0x01;
4fe5195c
MR
5466 spec->gpio_mask = 0x1b;
5467 spec->gpio_mute = 0x10;
e2e7d624 5468 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5469 * GPIO3 Low = DRM
87d48363 5470 */
4fe5195c 5471 spec->gpio_data = 0x01;
ae0a8ed8 5472 break;
b2c4f4d7
MR
5473 case STAC_9205_REF:
5474 /* SPDIF-In enabled */
5475 break;
ae0a8ed8
TD
5476 default:
5477 /* GPIO0 High = EAPD */
0fc9dec4 5478 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5479 spec->gpio_data = 0x01;
ae0a8ed8
TD
5480 break;
5481 }
33382403 5482
f3302a59 5483 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5484 if (!err) {
5485 if (spec->board_config < 0) {
5486 printk(KERN_WARNING "hda_codec: No auto-config is "
5487 "available, default to model=ref\n");
5488 spec->board_config = STAC_9205_REF;
5489 goto again;
5490 }
5491 err = -EINVAL;
5492 }
f3302a59
MP
5493 if (err < 0) {
5494 stac92xx_free(codec);
5495 return err;
5496 }
5497
5498 codec->patch_ops = stac92xx_patch_ops;
5499
2d34e1b3
TI
5500 codec->proc_widget_hook = stac9205_proc_hook;
5501
f3302a59
MP
5502 return 0;
5503}
5504
db064e50 5505/*
6d859065 5506 * STAC9872 hack
db064e50
TI
5507 */
5508
1e137f92 5509static struct hda_verb stac9872_core_init[] = {
1624cb9a 5510 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5511 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5512 {}
5513};
5514
caa10b6e
TI
5515static struct snd_kcontrol_new stac9872_mixer[] = {
5516 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5517 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
caa10b6e
TI
5518 { } /* end */
5519};
5520
5521static hda_nid_t stac9872_pin_nids[] = {
5522 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5523 0x11, 0x13, 0x14,
5524};
5525
5526static hda_nid_t stac9872_adc_nids[] = {
5527 0x8 /*,0x6*/
5528};
5529
5530static hda_nid_t stac9872_mux_nids[] = {
5531 0x15
5532};
5533
6d859065 5534static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5535{
5536 struct sigmatel_spec *spec;
1e137f92 5537 int err;
db064e50 5538
db064e50
TI
5539 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5540 if (spec == NULL)
5541 return -ENOMEM;
db064e50 5542 codec->spec = spec;
caa10b6e 5543
1e137f92 5544#if 0 /* no model right now */
caa10b6e
TI
5545 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5546 stac9872_models,
5547 stac9872_cfg_tbl);
1e137f92 5548#endif
db064e50 5549
1e137f92
TI
5550 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5551 spec->pin_nids = stac9872_pin_nids;
5552 spec->multiout.dac_nids = spec->dac_nids;
5553 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5554 spec->adc_nids = stac9872_adc_nids;
5555 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5556 spec->mux_nids = stac9872_mux_nids;
5557 spec->mixer = stac9872_mixer;
5558 spec->init = stac9872_core_init;
5559
5560 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5561 if (err < 0) {
5562 stac92xx_free(codec);
5563 return -EINVAL;
5564 }
5565 spec->input_mux = &spec->private_imux;
5566 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
5567 return 0;
5568}
5569
5570
2f2f4251
M
5571/*
5572 * patch entries
5573 */
1289e9e8 5574static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5575 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5576 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5577 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5578 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5579 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5580 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5581 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5582 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5583 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5584 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5585 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5586 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5587 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5588 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5589 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5590 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5591 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5592 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5593 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5594 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5595 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5596 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5597 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5598 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5599 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5600 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5601 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5602 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5603 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5604 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5605 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5606 /* The following does not take into account .id=0x83847661 when subsys =
5607 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5608 * currently not fully supported.
5609 */
5610 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5611 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5612 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5613 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5614 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5615 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5616 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5617 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5618 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5619 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5620 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5621 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5622 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5623 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5624 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5625 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5626 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5627 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5628 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5629 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5630 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5631 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5632 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5633 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5634 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5635 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5636 {} /* terminator */
5637};
1289e9e8
TI
5638
5639MODULE_ALIAS("snd-hda-codec-id:8384*");
5640MODULE_ALIAS("snd-hda-codec-id:111d*");
5641
5642MODULE_LICENSE("GPL");
5643MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5644
5645static struct hda_codec_preset_list sigmatel_list = {
5646 .preset = snd_hda_preset_sigmatel,
5647 .owner = THIS_MODULE,
5648};
5649
5650static int __init patch_sigmatel_init(void)
5651{
5652 return snd_hda_add_codec_preset(&sigmatel_list);
5653}
5654
5655static void __exit patch_sigmatel_exit(void)
5656{
5657 snd_hda_delete_codec_preset(&sigmatel_list);
5658}
5659
5660module_init(patch_sigmatel_init)
5661module_exit(patch_sigmatel_exit)
This page took 0.820027 seconds and 5 git commands to generate.