projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ALSA: ice1712: restore AK4xxx volumes on resume
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
c1017a4c 4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
3d8cb466 20 */
1da177e4
LT		 21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
3d8cb466 38 * I have left out support for 176.4 and 192 KHz for the moment.
1da177e4
LT		 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
1da177e4
LT		 50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
9d2f928d 54#include <linux/dma-mapping.h>
1da177e4 55#include <linux/slab.h>
65a77217 56#include <linux/module.h>
62932df8 57#include <linux/mutex.h>
910638ae 58
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/cs8427.h>
61#include <sound/info.h>
1da177e4 62#include <sound/initval.h>
680ef792 63#include <sound/tlv.h>
1da177e4
LT		 64
65#include <sound/asoundef.h>
66
67#include "ice1712.h"
68
69/* lowlevel routines */
70#include "delta.h"
71#include "ews.h"
72#include "hoontech.h"
73
c1017a4c 74MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 75MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76MODULE_LICENSE("GPL");
77MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 86static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
1da177e4 87static char *model[SNDRV_CARDS];
a67ff6a5 88static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
7c9d440e 89static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
01a00e5e 90static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
1da177e4
LT		 91
92module_param_array(index, int, NULL, 0444);
93MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94module_param_array(id, charp, NULL, 0444);
95MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96module_param_array(enable, bool, NULL, 0444);
97MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98module_param_array(omni, bool, NULL, 0444);
99MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100module_param_array(cs8427_timeout, int, NULL, 0444);
101MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102module_param_array(model, charp, NULL, 0444);
103MODULE_PARM_DESC(model, "Use the given board model.");
531af462 104module_param_array(dxr_enable, int, NULL, 0444);
01a00e5e 105MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 106
1da177e4 107
cebe41d4 108static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
28d27aae 109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
1da177e4
LT		 110 { 0, }
111};
112
113MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
6ca308d4
TI		 115static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT		 117
118static int PRO_RATE_LOCKED;
119static int PRO_RATE_RESET = 1;
120static unsigned int PRO_RATE_DEFAULT = 44100;
121
122/*
123 * Basic I/O
124 */
3d8cb466 125
1da177e4 126/* check whether the clock mode is spdif-in */
6ca308d4 127static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 128{
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130}
131
6ca308d4 132static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 133{
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135}
136
3d8cb466 137static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
1da177e4
LT		 138{
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141}
142
3d8cb466 143static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
1da177e4
LT		 144{
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147}
148
6ca308d4 149static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 150 unsigned short reg,
151 unsigned short val)
152{
6ca308d4 153 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172}
173
6ca308d4 174static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 175 unsigned short reg)
176{
6ca308d4 177 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197}
198
199/*
200 * pro ac97 section
201 */
202
6ca308d4 203static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 204 unsigned short reg,
205 unsigned short val)
206{
6ca308d4 207 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226}
227
228
6ca308d4 229static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 230 unsigned short reg)
231{
6ca308d4 232 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252}
253
254/*
255 * consumer ac97 digital mix
256 */
a5ce8890 257#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
1da177e4 258
6ca308d4 259static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 260{
6ca308d4 261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 262
1da177e4
LT		 263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265}
266
6ca308d4 267static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 268{
6ca308d4 269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 270 unsigned char val, nval;
3d8cb466 271
1da177e4
LT		 272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
3d8cb466
AB		 275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
1da177e4
LT		 277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280}
281
e23e7a14 282static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
1da177e4
LT		 283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288};
289
290
291/*
292 * gpio operations
293 */
6ca308d4 294static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 295{
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298}
299
49470306
PH		 300static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301{
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303}
304
305static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306{
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308}
309
6ca308d4 310static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 311{
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314}
315
6ca308d4 316static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 317{
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319}
320
6ca308d4 321static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 322{
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325}
326
1da177e4
LT		 327/*
328 *
329 * CS8427 interface
330 *
331 */
332
333/*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
6ca308d4 337static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT		 338{
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
3d8cb466 342
1da177e4
LT		 343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367}
368
369/*
370 * spdif callbacks
371 */
6ca308d4 372static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 373{
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375}
376
6ca308d4 377static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 378{
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380}
381
6ca308d4 382static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT		 383{
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385}
386
387/*
388 * create and initialize callbacks for cs8427 interface
389 */
e23e7a14 390int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT		 391{
392 int err;
393
3d8cb466
AB		 394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
6dfb5aff 397 dev_err(ice->card->dev, "CS8427 initialization failed\n");
1da177e4
LT		 398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404}
405
e957ebf1
JK		 406static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407{
3d8cb466
AB		 408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
e957ebf1
JK		 411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419}
1da177e4
LT		 420
421/*
422 * Interrupt handler
423 */
424
7d12e780 425static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
1da177e4 426{
6ca308d4 427 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
7d12e780 438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
1da177e4
LT		 439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
7d12e780 446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
1da177e4
LT		 447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
6ca308d4 468 struct snd_pcm_substream *substream;
1da177e4 469 pbkstatus = inw(ICEDS(ice, INTSTAT));
6dfb5aff 470 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
1da177e4
LT		 471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
3d8cb466
AB		 474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
1da177e4
LT		 476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493}
494
495
496/*
497 * PCM part - misc
498 */
499
6ca308d4
TI		 500static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 502{
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504}
505
6ca308d4 506static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 507{
508 return snd_pcm_lib_free_pages(substream);
509}
510
511/*
512 * PCM part - consumer I/O
513 */
514
6ca308d4 515static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 516 int cmd)
517{
6ca308d4 518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 519 int result = 0;
520 u32 tmp;
3d8cb466 521
1da177e4
LT		 522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538}
539
6ca308d4 540static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 541 int cmd)
542{
6ca308d4 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 544 int result = 0;
545 u32 tmp;
3d8cb466 546
1da177e4
LT		 547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563}
564
6ca308d4 565static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 566 int cmd)
567{
6ca308d4 568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 569 int result = 0;
570 u8 tmp;
3d8cb466 571
1da177e4
LT		 572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584}
585
6ca308d4 586static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 587{
6ca308d4
TI		 588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617}
618
6ca308d4 619static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 620{
6ca308d4
TI		 621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 623 u32 period_size, buf_size, rate, tmp, chn;
624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
627 tmp = 0x0064;
628 if (snd_pcm_format_width(runtime->format) == 16)
629 tmp &= ~0x04;
630 if (runtime->channels == 2)
631 tmp |= 0x08;
632 rate = (runtime->rate * 8192) / 375;
633 if (rate > 0x000fffff)
634 rate = 0x000fffff;
635 ice->playback_con_active_buf[substream->number] = 0;
636 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
637 chn = substream->number * 2;
638 spin_lock_irq(&ice->reg_lock);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
645 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
646 if (runtime->channels == 2) {
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
648 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
649 }
650 spin_unlock_irq(&ice->reg_lock);
651 return 0;
652}
653
6ca308d4 654static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 655{
6ca308d4
TI		 656 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
657 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 658 u32 period_size, buf_size;
659 u8 tmp;
660
661 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
662 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
663 tmp = 0x06;
664 if (snd_pcm_format_width(runtime->format) == 16)
665 tmp &= ~0x04;
666 if (runtime->channels == 2)
667 tmp &= ~0x02;
668 spin_lock_irq(&ice->reg_lock);
669 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
670 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
673 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
674 spin_unlock_irq(&ice->reg_lock);
675 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
676 return 0;
677}
678
6ca308d4 679static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 680{
6ca308d4
TI		 681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
682 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 683 size_t ptr;
684
685 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
686 return 0;
687 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
688 if (ptr == runtime->buffer_size)
689 ptr = 0;
690 return bytes_to_frames(substream->runtime, ptr);
691}
692
6ca308d4 693static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 694{
6ca308d4 695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 696 u8 addr;
697 size_t ptr;
698
699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
700 return 0;
701 if (ice->playback_con_active_buf[substream->number])
702 addr = ICE1712_DSC_ADDR1;
703 else
704 addr = ICE1712_DSC_ADDR0;
705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
706 ice->playback_con_virt_addr[substream->number];
707 if (ptr == substream->runtime->buffer_size)
708 ptr = 0;
709 return bytes_to_frames(substream->runtime, ptr);
710}
711
6ca308d4 712static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 713{
6ca308d4 714 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 715 size_t ptr;
716
717 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
718 return 0;
719 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
720 if (ptr == substream->runtime->buffer_size)
721 ptr = 0;
722 return bytes_to_frames(substream->runtime, ptr);
723}
724
3d8cb466 725static const struct snd_pcm_hardware snd_ice1712_playback = {
1da177e4
LT		 726 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
727 SNDRV_PCM_INFO_BLOCK_TRANSFER |
728 SNDRV_PCM_INFO_MMAP_VALID |
729 SNDRV_PCM_INFO_PAUSE),
730 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
731 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
732 .rate_min = 4000,
733 .rate_max = 48000,
734 .channels_min = 1,
735 .channels_max = 2,
736 .buffer_bytes_max = (64*1024),
737 .period_bytes_min = 64,
738 .period_bytes_max = (64*1024),
739 .periods_min = 1,
740 .periods_max = 1024,
741 .fifo_size = 0,
742};
743
3d8cb466 744static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
1da177e4
LT		 745 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
746 SNDRV_PCM_INFO_BLOCK_TRANSFER |
747 SNDRV_PCM_INFO_MMAP_VALID |
748 SNDRV_PCM_INFO_PAUSE),
749 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
750 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
751 .rate_min = 4000,
752 .rate_max = 48000,
753 .channels_min = 1,
754 .channels_max = 2,
755 .buffer_bytes_max = (128*1024),
756 .period_bytes_min = 64,
757 .period_bytes_max = (128*1024),
758 .periods_min = 2,
759 .periods_max = 2,
760 .fifo_size = 0,
761};
762
3d8cb466 763static const struct snd_pcm_hardware snd_ice1712_capture = {
1da177e4
LT		 764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
765 SNDRV_PCM_INFO_BLOCK_TRANSFER |
766 SNDRV_PCM_INFO_MMAP_VALID),
767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
769 .rate_min = 4000,
770 .rate_max = 48000,
771 .channels_min = 1,
772 .channels_max = 2,
773 .buffer_bytes_max = (64*1024),
774 .period_bytes_min = 64,
775 .period_bytes_max = (64*1024),
776 .periods_min = 1,
777 .periods_max = 1024,
778 .fifo_size = 0,
779};
780
6ca308d4 781static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 782{
6ca308d4
TI		 783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 785
786 ice->playback_con_substream = substream;
787 runtime->hw = snd_ice1712_playback;
788 return 0;
789}
790
6ca308d4 791static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 792{
6ca308d4
TI		 793 struct snd_pcm_runtime *runtime = substream->runtime;
794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 795 u32 tmp;
796
797 ice->playback_con_substream_ds[substream->number] = substream;
798 runtime->hw = snd_ice1712_playback_ds;
3d8cb466 799 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
801 outw(tmp, ICEDS(ice, INTMASK));
802 spin_unlock_irq(&ice->reg_lock);
803 return 0;
804}
805
6ca308d4 806static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 807{
6ca308d4
TI		 808 struct snd_pcm_runtime *runtime = substream->runtime;
809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 810
811 ice->capture_con_substream = substream;
812 runtime->hw = snd_ice1712_capture;
813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
815 runtime->hw.rate_min = 48000;
816 return 0;
817}
818
6ca308d4 819static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 820{
6ca308d4 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 822
823 ice->playback_con_substream = NULL;
824 return 0;
825}
826
6ca308d4 827static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 828{
6ca308d4 829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 830 u32 tmp;
831
3d8cb466 832 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
834 outw(tmp, ICEDS(ice, INTMASK));
835 spin_unlock_irq(&ice->reg_lock);
836 ice->playback_con_substream_ds[substream->number] = NULL;
837 return 0;
838}
839
6ca308d4 840static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 841{
6ca308d4 842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 843
844 ice->capture_con_substream = NULL;
845 return 0;
846}
847
6ca308d4 848static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT		 849 .open = snd_ice1712_playback_open,
850 .close = snd_ice1712_playback_close,
851 .ioctl = snd_pcm_lib_ioctl,
852 .hw_params = snd_ice1712_hw_params,
853 .hw_free = snd_ice1712_hw_free,
854 .prepare = snd_ice1712_playback_prepare,
855 .trigger = snd_ice1712_playback_trigger,
856 .pointer = snd_ice1712_playback_pointer,
857};
858
6ca308d4 859static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT		 860 .open = snd_ice1712_playback_ds_open,
861 .close = snd_ice1712_playback_ds_close,
862 .ioctl = snd_pcm_lib_ioctl,
863 .hw_params = snd_ice1712_hw_params,
864 .hw_free = snd_ice1712_hw_free,
865 .prepare = snd_ice1712_playback_ds_prepare,
866 .trigger = snd_ice1712_playback_ds_trigger,
867 .pointer = snd_ice1712_playback_ds_pointer,
868};
869
6ca308d4 870static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT		 871 .open = snd_ice1712_capture_open,
872 .close = snd_ice1712_capture_close,
873 .ioctl = snd_pcm_lib_ioctl,
874 .hw_params = snd_ice1712_hw_params,
875 .hw_free = snd_ice1712_hw_free,
876 .prepare = snd_ice1712_capture_prepare,
877 .trigger = snd_ice1712_capture_trigger,
878 .pointer = snd_ice1712_capture_pointer,
879};
880
e23e7a14 881static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 882{
6ca308d4 883 struct snd_pcm *pcm;
1da177e4
LT		 884 int err;
885
886 if (rpcm)
887 *rpcm = NULL;
888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
889 if (err < 0)
890 return err;
891
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
894
895 pcm->private_data = ice;
1da177e4
LT		 896 pcm->info_flags = 0;
897 strcpy(pcm->name, "ICE1712 consumer");
898 ice->pcm = pcm;
899
900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
902
903 if (rpcm)
904 *rpcm = pcm;
905
6dfb5aff
TI		 906 dev_warn(ice->card->dev,
907 "Consumer PCM code does not work well at the moment --jk\n");
1da177e4
LT		 908
909 return 0;
910}
911
e23e7a14 912static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 913{
6ca308d4 914 struct snd_pcm *pcm;
1da177e4
LT		 915 int err;
916
917 if (rpcm)
918 *rpcm = NULL;
919 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
920 if (err < 0)
921 return err;
922
923 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
924
925 pcm->private_data = ice;
1da177e4
LT		 926 pcm->info_flags = 0;
927 strcpy(pcm->name, "ICE1712 consumer (DS)");
928 ice->pcm_ds = pcm;
929
930 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
931 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
932
933 if (rpcm)
934 *rpcm = pcm;
935
936 return 0;
937}
938
939/*
940 * PCM code - professional part (multitrack)
941 */
942
943static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
944 32000, 44100, 48000, 64000, 88200, 96000 };
945
6ca308d4 946static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 947 .count = ARRAY_SIZE(rates),
948 .list = rates,
949 .mask = 0,
950};
951
6ca308d4 952static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 953 int cmd)
954{
6ca308d4 955 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 956 switch (cmd) {
957 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
958 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
959 {
960 unsigned int what;
961 unsigned int old;
962 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
963 return -EINVAL;
964 what = ICE1712_PLAYBACK_PAUSE;
965 snd_pcm_trigger_done(substream, substream);
966 spin_lock(&ice->reg_lock);
967 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
968 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
969 old |= what;
970 else
971 old &= ~what;
972 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
973 spin_unlock(&ice->reg_lock);
974 break;
975 }
976 case SNDRV_PCM_TRIGGER_START:
977 case SNDRV_PCM_TRIGGER_STOP:
978 {
979 unsigned int what = 0;
980 unsigned int old;
6ca308d4 981 struct snd_pcm_substream *s;
1da177e4 982
ef991b95 983 snd_pcm_group_for_each_entry(s, substream) {
1da177e4
LT		 984 if (s == ice->playback_pro_substream) {
985 what |= ICE1712_PLAYBACK_START;
986 snd_pcm_trigger_done(s, substream);
987 } else if (s == ice->capture_pro_substream) {
988 what |= ICE1712_CAPTURE_START_SHADOW;
989 snd_pcm_trigger_done(s, substream);
990 }
991 }
992 spin_lock(&ice->reg_lock);
993 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
994 if (cmd == SNDRV_PCM_TRIGGER_START)
995 old |= what;
996 else
997 old &= ~what;
998 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
999 spin_unlock(&ice->reg_lock);
1000 break;
1001 }
1002 default:
1003 return -EINVAL;
1004 }
1005 return 0;
1006}
1007
1008/*
1009 */
6ca308d4 1010static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT		 1011{
1012 unsigned long flags;
1013 unsigned char val, old;
1014 unsigned int i;
1015
1016 switch (rate) {
1017 case 8000: val = 6; break;
1018 case 9600: val = 3; break;
1019 case 11025: val = 10; break;
1020 case 12000: val = 2; break;
1021 case 16000: val = 5; break;
1022 case 22050: val = 9; break;
1023 case 24000: val = 1; break;
1024 case 32000: val = 4; break;
1025 case 44100: val = 8; break;
1026 case 48000: val = 0; break;
1027 case 64000: val = 15; break;
1028 case 88200: val = 11; break;
1029 case 96000: val = 7; break;
1030 default:
1031 snd_BUG();
1032 val = 0;
1033 rate = 48000;
1034 break;
1035 }
1036
1037 spin_lock_irqsave(&ice->reg_lock, flags);
1038 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1039 ICE1712_PLAYBACK_PAUSE|
1040 ICE1712_PLAYBACK_START)) {
3d8cb466 1041__out:
1da177e4
LT		 1042 spin_unlock_irqrestore(&ice->reg_lock, flags);
1043 return;
1044 }
1045 if (!force && is_pro_rate_locked(ice))
1046 goto __out;
1047
3d8cb466 1048 old = inb(ICEMT(ice, RATE));
1da177e4
LT		 1049 if (!force && old == val)
1050 goto __out;
1051 outb(val, ICEMT(ice, RATE));
1052 spin_unlock_irqrestore(&ice->reg_lock, flags);
1053
1054 if (ice->gpio.set_pro_rate)
1055 ice->gpio.set_pro_rate(ice, rate);
1056 for (i = 0; i < ice->akm_codecs; i++) {
1057 if (ice->akm[i].ops.set_rate_val)
1058 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1059 }
1060 if (ice->spdif.ops.setup_rate)
1061 ice->spdif.ops.setup_rate(ice, rate);
1062}
1063
6ca308d4 1064static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1065{
6ca308d4 1066 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1067
1068 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1069 spin_lock_irq(&ice->reg_lock);
1070 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1071 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1072 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1073 spin_unlock_irq(&ice->reg_lock);
1074
1075 return 0;
1076}
1077
6ca308d4
TI		 1078static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1079 struct snd_pcm_hw_params *hw_params)
1da177e4 1080{
6ca308d4 1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1082
1083 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1084 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1085}
1086
6ca308d4 1087static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1088{
6ca308d4 1089 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1090
1091 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1092 spin_lock_irq(&ice->reg_lock);
1093 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1094 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1095 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1096 spin_unlock_irq(&ice->reg_lock);
1097 return 0;
1098}
1099
6ca308d4
TI		 1100static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1101 struct snd_pcm_hw_params *hw_params)
1da177e4 1102{
6ca308d4 1103 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1104
1105 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1106 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1107}
1108
6ca308d4 1109static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1110{
6ca308d4 1111 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1112 size_t ptr;
1113
1114 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1115 return 0;
1116 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1117 if (ptr == substream->runtime->buffer_size)
1118 ptr = 0;
1119 return bytes_to_frames(substream->runtime, ptr);
1120}
1121
6ca308d4 1122static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1123{
6ca308d4 1124 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1125 size_t ptr;
1126
1127 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1128 return 0;
1129 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1130 if (ptr == substream->runtime->buffer_size)
1131 ptr = 0;
1132 return bytes_to_frames(substream->runtime, ptr);
1133}
1134
3d8cb466 1135static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1da177e4
LT		 1136 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1137 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1138 SNDRV_PCM_INFO_MMAP_VALID |
1139 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1140 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1141 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1142 .rate_min = 4000,
1143 .rate_max = 96000,
1144 .channels_min = 10,
1145 .channels_max = 10,
1146 .buffer_bytes_max = (256*1024),
1147 .period_bytes_min = 10 * 4 * 2,
1148 .period_bytes_max = 131040,
1149 .periods_min = 1,
1150 .periods_max = 1024,
1151 .fifo_size = 0,
1152};
1153
3d8cb466 1154static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1da177e4
LT		 1155 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1156 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1157 SNDRV_PCM_INFO_MMAP_VALID |
1158 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1159 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1160 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1161 .rate_min = 4000,
1162 .rate_max = 96000,
1163 .channels_min = 12,
1164 .channels_max = 12,
1165 .buffer_bytes_max = (256*1024),
1166 .period_bytes_min = 12 * 4 * 2,
1167 .period_bytes_max = 131040,
1168 .periods_min = 1,
1169 .periods_max = 1024,
1170 .fifo_size = 0,
1171};
1172
6ca308d4 1173static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1174{
6ca308d4
TI		 1175 struct snd_pcm_runtime *runtime = substream->runtime;
1176 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1177
1178 ice->playback_pro_substream = substream;
1179 runtime->hw = snd_ice1712_playback_pro;
1180 snd_pcm_set_sync(substream);
1181 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1182 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1183 if (is_pro_rate_locked(ice)) {
1184 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1185 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1186 }
1da177e4
LT		 1187
1188 if (ice->spdif.ops.open)
1189 ice->spdif.ops.open(ice, substream);
1190
1191 return 0;
1192}
1193
6ca308d4 1194static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1195{
6ca308d4
TI		 1196 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1197 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1198
1199 ice->capture_pro_substream = substream;
1200 runtime->hw = snd_ice1712_capture_pro;
1201 snd_pcm_set_sync(substream);
1202 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1203 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1204 if (is_pro_rate_locked(ice)) {
1205 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1206 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1207 }
1208
1da177e4
LT		 1209 return 0;
1210}
1211
6ca308d4 1212static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1213{
6ca308d4 1214 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1215
1216 if (PRO_RATE_RESET)
1217 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1218 ice->playback_pro_substream = NULL;
1219 if (ice->spdif.ops.close)
1220 ice->spdif.ops.close(ice, substream);
1221
1222 return 0;
1223}
1224
6ca308d4 1225static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1226{
6ca308d4 1227 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1228
1229 if (PRO_RATE_RESET)
1230 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1231 ice->capture_pro_substream = NULL;
1232 return 0;
1233}
1234
6ca308d4 1235static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT		 1236 .open = snd_ice1712_playback_pro_open,
1237 .close = snd_ice1712_playback_pro_close,
1238 .ioctl = snd_pcm_lib_ioctl,
1239 .hw_params = snd_ice1712_playback_pro_hw_params,
1240 .hw_free = snd_ice1712_hw_free,
1241 .prepare = snd_ice1712_playback_pro_prepare,
1242 .trigger = snd_ice1712_pro_trigger,
1243 .pointer = snd_ice1712_playback_pro_pointer,
1244};
1245
6ca308d4 1246static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT		 1247 .open = snd_ice1712_capture_pro_open,
1248 .close = snd_ice1712_capture_pro_close,
1249 .ioctl = snd_pcm_lib_ioctl,
1250 .hw_params = snd_ice1712_capture_pro_hw_params,
1251 .hw_free = snd_ice1712_hw_free,
1252 .prepare = snd_ice1712_capture_pro_prepare,
1253 .trigger = snd_ice1712_pro_trigger,
1254 .pointer = snd_ice1712_capture_pro_pointer,
1255};
1256
e23e7a14 1257static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 1258{
6ca308d4 1259 struct snd_pcm *pcm;
1da177e4
LT		 1260 int err;
1261
1262 if (rpcm)
1263 *rpcm = NULL;
1264 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1265 if (err < 0)
1266 return err;
1267
1268 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1269 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1270
1271 pcm->private_data = ice;
1da177e4
LT		 1272 pcm->info_flags = 0;
1273 strcpy(pcm->name, "ICE1712 multi");
1274
1275 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1276 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1277
1278 ice->pcm_pro = pcm;
1279 if (rpcm)
1280 *rpcm = pcm;
3d8cb466 1281
1da177e4
LT		 1282 if (ice->cs8427) {
1283 /* assign channels to iec958 */
1284 err = snd_cs8427_iec958_build(ice->cs8427,
1285 pcm->streams[0].substream,
1286 pcm->streams[1].substream);
1287 if (err < 0)
1288 return err;
1289 }
1290
3d8cb466
AB		 1291 err = snd_ice1712_build_pro_mixer(ice);
1292 if (err < 0)
1da177e4
LT		 1293 return err;
1294 return 0;
1295}
1296
1297/*
1298 * Mixer section
1299 */
1300
6ca308d4 1301static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT		 1302{
1303 unsigned int vol = ice->pro_volumes[index];
1304 unsigned short val = 0;
1305
1306 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1307 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1308 outb(index, ICEMT(ice, MONITOR_INDEX));
1309 outw(val, ICEMT(ice, MONITOR_VOLUME));
1310}
1311
a5ce8890 1312#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1da177e4 1313
6ca308d4 1314static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1315{
6ca308d4 1316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1317 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1318 kcontrol->private_value;
3d8cb466 1319
1da177e4 1320 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1321 ucontrol->value.integer.value[0] =
1322 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1323 ucontrol->value.integer.value[1] =
1324 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1da177e4
LT		 1325 spin_unlock_irq(&ice->reg_lock);
1326 return 0;
1327}
1328
6ca308d4 1329static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1330{
6ca308d4 1331 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1332 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1333 kcontrol->private_value;
1da177e4
LT		 1334 unsigned int nval, change;
1335
1336 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1337 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1338 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1339 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1340 change = nval != ice->pro_volumes[priv_idx];
1341 ice->pro_volumes[priv_idx] = nval;
1342 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1343 spin_unlock_irq(&ice->reg_lock);
1344 return change;
1345}
1346
6ca308d4 1347static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1348{
1349 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1350 uinfo->count = 2;
1351 uinfo->value.integer.min = 0;
1352 uinfo->value.integer.max = 96;
1353 return 0;
1354}
1355
6ca308d4 1356static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1357{
6ca308d4 1358 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1359 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1360 kcontrol->private_value;
3d8cb466 1361
1da177e4 1362 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1363 ucontrol->value.integer.value[0] =
1364 (ice->pro_volumes[priv_idx] >> 0) & 127;
1365 ucontrol->value.integer.value[1] =
1366 (ice->pro_volumes[priv_idx] >> 16) & 127;
1da177e4
LT		 1367 spin_unlock_irq(&ice->reg_lock);
1368 return 0;
1369}
1370
6ca308d4 1371static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1372{
6ca308d4 1373 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1374 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1375 kcontrol->private_value;
1da177e4
LT		 1376 unsigned int nval, change;
1377
1378 nval = (ucontrol->value.integer.value[0] & 127) |
1379 ((ucontrol->value.integer.value[1] & 127) << 16);
1380 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1381 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1382 change = nval != ice->pro_volumes[priv_idx];
1383 ice->pro_volumes[priv_idx] = nval;
1384 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1385 spin_unlock_irq(&ice->reg_lock);
1386 return change;
1387}
1388
0cb29ea0 1389static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1da177e4 1390
e23e7a14 1391static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1da177e4
LT		 1392 {
1393 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1394 .name = "Multi Playback Switch",
1395 .info = snd_ice1712_pro_mixer_switch_info,
1396 .get = snd_ice1712_pro_mixer_switch_get,
1397 .put = snd_ice1712_pro_mixer_switch_put,
1398 .private_value = 0,
1399 .count = 10,
1400 },
1401 {
1402 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1403 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1404 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1405 .name = "Multi Playback Volume",
1406 .info = snd_ice1712_pro_mixer_volume_info,
1407 .get = snd_ice1712_pro_mixer_volume_get,
1408 .put = snd_ice1712_pro_mixer_volume_put,
1409 .private_value = 0,
1410 .count = 10,
680ef792 1411 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1412 },
1413};
1414
e23e7a14 1415static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1da177e4
LT		 1416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417 .name = "H/W Multi Capture Switch",
1418 .info = snd_ice1712_pro_mixer_switch_info,
1419 .get = snd_ice1712_pro_mixer_switch_get,
1420 .put = snd_ice1712_pro_mixer_switch_put,
1421 .private_value = 10,
1422};
1423
e23e7a14 1424static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1da177e4 1425 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1426 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1da177e4
LT		 1427 .info = snd_ice1712_pro_mixer_switch_info,
1428 .get = snd_ice1712_pro_mixer_switch_get,
1429 .put = snd_ice1712_pro_mixer_switch_put,
1430 .private_value = 18,
1431 .count = 2,
1432};
1433
e23e7a14 1434static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1da177e4 1435 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1436 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1437 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1438 .name = "H/W Multi Capture Volume",
1439 .info = snd_ice1712_pro_mixer_volume_info,
1440 .get = snd_ice1712_pro_mixer_volume_get,
1441 .put = snd_ice1712_pro_mixer_volume_put,
1442 .private_value = 10,
680ef792 1443 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1444};
1445
e23e7a14 1446static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1da177e4 1447 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1448 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1da177e4
LT		 1449 .info = snd_ice1712_pro_mixer_volume_info,
1450 .get = snd_ice1712_pro_mixer_volume_get,
1451 .put = snd_ice1712_pro_mixer_volume_put,
1452 .private_value = 18,
1453 .count = 2,
1454};
1455
e23e7a14 1456static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1457{
6ca308d4 1458 struct snd_card *card = ice->card;
1da177e4
LT		 1459 unsigned int idx;
1460 int err;
1461
1462 /* multi-channel mixer */
1463 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1464 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1465 if (err < 0)
1466 return err;
1467 }
3d8cb466 1468
1da177e4 1469 if (ice->num_total_adcs > 0) {
6ca308d4 1470 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT		 1471 tmp.count = ice->num_total_adcs;
1472 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1473 if (err < 0)
1474 return err;
1475 }
1476
1477 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1478 if (err < 0)
1479 return err;
1480
1481 if (ice->num_total_adcs > 0) {
6ca308d4 1482 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT		 1483 tmp.count = ice->num_total_adcs;
1484 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1485 if (err < 0)
1486 return err;
1487 }
1488
1489 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1490 if (err < 0)
1491 return err;
1492
1493 /* initialize volumes */
1494 for (idx = 0; idx < 10; idx++) {
1495 ice->pro_volumes[idx] = 0x80008000; /* mute */
1496 snd_ice1712_update_volume(ice, idx);
1497 }
1498 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1499 ice->pro_volumes[idx] = 0x80008000; /* mute */
1500 snd_ice1712_update_volume(ice, idx);
1501 }
1502 for (idx = 18; idx < 20; idx++) {
1503 ice->pro_volumes[idx] = 0x80008000; /* mute */
1504 snd_ice1712_update_volume(ice, idx);
1505 }
1506 return 0;
1507}
1508
6ca308d4 1509static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1510{
6ca308d4 1511 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 1512 ice->ac97 = NULL;
1513}
1514
e23e7a14 1515static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1516{
1517 int err, bus_num = 0;
6ca308d4
TI		 1518 struct snd_ac97_template ac97;
1519 struct snd_ac97_bus *pbus;
1520 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT		 1521 .write = snd_ice1712_ac97_write,
1522 .read = snd_ice1712_ac97_read,
1523 };
6ca308d4 1524 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT		 1525 .write = snd_ice1712_pro_ac97_write,
1526 .read = snd_ice1712_pro_ac97_read,
1527 };
1528
1529 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 1530 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1531 if (err < 0)
1da177e4
LT		 1532 return err;
1533 memset(&ac97, 0, sizeof(ac97));
1534 ac97.private_data = ice;
1535 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1536 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1537 if (err < 0)
6dfb5aff
TI		 1538 dev_warn(ice->card->dev,
1539 "cannot initialize ac97 for consumer, skipped\n");
1da177e4 1540 else {
3d8cb466
AB		 1541 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1542 if (err < 0)
1da177e4
LT		 1543 return err;
1544 return 0;
1545 }
1546 }
1547
3d8cb466
AB		 1548 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1549 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1550 if (err < 0)
1da177e4
LT		 1551 return err;
1552 memset(&ac97, 0, sizeof(ac97));
1553 ac97.private_data = ice;
1554 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1555 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1556 if (err < 0)
6dfb5aff
TI		 1557 dev_warn(ice->card->dev,
1558 "cannot initialize pro ac97, skipped\n");
1da177e4
LT		 1559 else
1560 return 0;
1561 }
1562 /* I2S mixer only */
1563 strcat(ice->card->mixername, "ICE1712 - multitrack");
1564 return 0;
1565}
1566
1567/*
1568 *
1569 */
1570
6ca308d4 1571static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1572{
1573 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1574}
1575
3d8cb466 1576static void snd_ice1712_proc_read(struct snd_info_entry *entry,
6ca308d4 1577 struct snd_info_buffer *buffer)
1da177e4 1578{
6ca308d4 1579 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1580 unsigned int idx;
1581
1582 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1583 snd_iprintf(buffer, "EEPROM:\n");
1584
1585 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1586 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1587 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1588 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1589 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1590 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1591 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1592 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1593 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1594 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1595 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1596 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1597 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1598 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1599 for (idx = 0; idx < 4; idx++)
1600 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1601 for (idx = 0; idx < 4; idx++)
1602 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1603 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1604 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1605
1606 snd_iprintf(buffer, "\nRegisters:\n");
1607 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1608 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1609 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1610 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39 1611 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
3d8cb466 1612 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
f7004f39 1613 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT		 1614}
1615
e23e7a14 1616static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1da177e4 1617{
6ca308d4 1618 struct snd_info_entry *entry;
1da177e4 1619
3d8cb466 1620 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
bf850204 1621 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1da177e4
LT		 1622}
1623
1624/*
1625 *
1626 */
1627
6ca308d4
TI		 1628static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1629 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1630{
1631 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1632 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1633 return 0;
1634}
1635
6ca308d4
TI		 1636static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1637 struct snd_ctl_elem_value *ucontrol)
1da177e4 1638{
6ca308d4 1639 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 1640
1da177e4
LT		 1641 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1642 return 0;
1643}
1644
e23e7a14 1645static struct snd_kcontrol_new snd_ice1712_eeprom = {
1da177e4
LT		 1646 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1647 .name = "ICE1712 EEPROM",
1648 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1649 .info = snd_ice1712_eeprom_info,
1650 .get = snd_ice1712_eeprom_get
1651};
1652
1653/*
1654 */
6ca308d4
TI		 1655static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1656 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1657{
1658 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1659 uinfo->count = 1;
1660 return 0;
1661}
1662
6ca308d4
TI		 1663static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1664 struct snd_ctl_elem_value *ucontrol)
1da177e4 1665{
6ca308d4 1666 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1667 if (ice->spdif.ops.default_get)
3d8cb466 1668 ice->spdif.ops.default_get(ice, ucontrol);
1da177e4
LT		 1669 return 0;
1670}
1671
6ca308d4
TI		 1672static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1673 struct snd_ctl_elem_value *ucontrol)
1da177e4 1674{
6ca308d4 1675 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1676 if (ice->spdif.ops.default_put)
1677 return ice->spdif.ops.default_put(ice, ucontrol);
1678 return 0;
1679}
1680
e23e7a14 1681static struct snd_kcontrol_new snd_ice1712_spdif_default =
1da177e4
LT		 1682{
1683 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1684 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1685 .info = snd_ice1712_spdif_info,
1686 .get = snd_ice1712_spdif_default_get,
1687 .put = snd_ice1712_spdif_default_put
1688};
1689
6ca308d4
TI		 1690static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1691 struct snd_ctl_elem_value *ucontrol)
1da177e4 1692{
6ca308d4 1693 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1694 if (ice->spdif.ops.default_get) {
1695 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1696 IEC958_AES0_PROFESSIONAL |
1697 IEC958_AES0_CON_NOT_COPYRIGHT |
1698 IEC958_AES0_CON_EMPHASIS;
1699 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1700 IEC958_AES1_CON_CATEGORY;
1701 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1702 } else {
1703 ucontrol->value.iec958.status[0] = 0xff;
1704 ucontrol->value.iec958.status[1] = 0xff;
1705 ucontrol->value.iec958.status[2] = 0xff;
1706 ucontrol->value.iec958.status[3] = 0xff;
1707 ucontrol->value.iec958.status[4] = 0xff;
1708 }
1709 return 0;
1710}
1711
6ca308d4
TI		 1712static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1713 struct snd_ctl_elem_value *ucontrol)
1da177e4 1714{
6ca308d4 1715 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1716 if (ice->spdif.ops.default_get) {
1717 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1718 IEC958_AES0_PROFESSIONAL |
1719 IEC958_AES0_PRO_FS |
1720 IEC958_AES0_PRO_EMPHASIS;
1721 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1722 } else {
1723 ucontrol->value.iec958.status[0] = 0xff;
1724 ucontrol->value.iec958.status[1] = 0xff;
1725 ucontrol->value.iec958.status[2] = 0xff;
1726 ucontrol->value.iec958.status[3] = 0xff;
1727 ucontrol->value.iec958.status[4] = 0xff;
1728 }
1729 return 0;
1730}
1731
e23e7a14 1732static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1da177e4
LT		 1733{
1734 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1735 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1736 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1737 .info = snd_ice1712_spdif_info,
1738 .get = snd_ice1712_spdif_maskc_get,
1739};
1740
e23e7a14 1741static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1da177e4
LT		 1742{
1743 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1744 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1745 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1746 .info = snd_ice1712_spdif_info,
1747 .get = snd_ice1712_spdif_maskp_get,
1748};
1749
6ca308d4
TI		 1750static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1751 struct snd_ctl_elem_value *ucontrol)
1da177e4 1752{
6ca308d4 1753 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1754 if (ice->spdif.ops.stream_get)
1755 ice->spdif.ops.stream_get(ice, ucontrol);
1756 return 0;
1757}
1758
6ca308d4
TI		 1759static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1760 struct snd_ctl_elem_value *ucontrol)
1da177e4 1761{
6ca308d4 1762 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1763 if (ice->spdif.ops.stream_put)
1764 return ice->spdif.ops.stream_put(ice, ucontrol);
1765 return 0;
1766}
1767
e23e7a14 1768static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1da177e4 1769{
6ca308d4
TI		 1770 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1771 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4 1772 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1773 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1da177e4
LT		 1774 .info = snd_ice1712_spdif_info,
1775 .get = snd_ice1712_spdif_stream_get,
1776 .put = snd_ice1712_spdif_stream_put
1777};
1778
6ca308d4
TI		 1779int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1780 struct snd_ctl_elem_value *ucontrol)
1da177e4 1781{
6ca308d4 1782 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1783 unsigned char mask = kcontrol->private_value & 0xff;
1784 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
3d8cb466 1785
1da177e4 1786 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI		 1787 ucontrol->value.integer.value[0] =
1788 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT		 1789 snd_ice1712_restore_gpio_status(ice);
1790 return 0;
1791}
1792
6ca308d4
TI		 1793int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1794 struct snd_ctl_elem_value *ucontrol)
1da177e4 1795{
6ca308d4 1796 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1797 unsigned char mask = kcontrol->private_value & 0xff;
1798 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1799 unsigned int val, nval;
1800
1801 if (kcontrol->private_value & (1 << 31))
1802 return -EPERM;
1803 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1804 snd_ice1712_save_gpio_status(ice);
1805 val = snd_ice1712_gpio_read(ice);
1806 nval |= val & ~mask;
1807 if (val != nval)
1808 snd_ice1712_gpio_write(ice, nval);
1809 snd_ice1712_restore_gpio_status(ice);
1810 return val != nval;
1811}
1812
1813/*
1814 * rate
1815 */
6ca308d4
TI		 1816static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1817 struct snd_ctl_elem_info *uinfo)
1da177e4 1818{
32b47da0 1819 static const char * const texts[] = {
1da177e4
LT		 1820 "8000", /* 0: 6 */
1821 "9600", /* 1: 3 */
1822 "11025", /* 2: 10 */
1823 "12000", /* 3: 2 */
1824 "16000", /* 4: 5 */
1825 "22050", /* 5: 9 */
1826 "24000", /* 6: 1 */
1827 "32000", /* 7: 4 */
1828 "44100", /* 8: 8 */
1829 "48000", /* 9: 0 */
1830 "64000", /* 10: 15 */
1831 "88200", /* 11: 11 */
1832 "96000", /* 12: 7 */
1833 "IEC958 Input", /* 13: -- */
1834 };
1835 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1836 uinfo->count = 1;
1837 uinfo->value.enumerated.items = 14;
1838 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1839 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1840 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1841 return 0;
1842}
1843
6ca308d4
TI		 1844static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_value *ucontrol)
1da177e4 1846{
6ca308d4 1847 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1848 static const unsigned char xlate[16] = {
1da177e4
LT		 1849 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1850 };
1851 unsigned char val;
3d8cb466 1852
1da177e4
LT		 1853 spin_lock_irq(&ice->reg_lock);
1854 if (is_spdif_master(ice)) {
1855 ucontrol->value.enumerated.item[0] = 13;
1856 } else {
1857 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1858 if (val == 255) {
1859 snd_BUG();
1860 val = 0;
1861 }
1862 ucontrol->value.enumerated.item[0] = val;
1863 }
1864 spin_unlock_irq(&ice->reg_lock);
1865 return 0;
1866}
1867
6ca308d4
TI		 1868static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1869 struct snd_ctl_elem_value *ucontrol)
1da177e4 1870{
6ca308d4 1871 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1872 static const unsigned int xrate[13] = {
fe25befd 1873 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1874 32000, 44100, 48000, 64000, 88200, 96000
1875 };
1876 unsigned char oval;
1877 int change = 0;
1878
1879 spin_lock_irq(&ice->reg_lock);
1880 oval = inb(ICEMT(ice, RATE));
1881 if (ucontrol->value.enumerated.item[0] == 13) {
1882 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1883 } else {
1884 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1885 spin_unlock_irq(&ice->reg_lock);
1886 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1887 spin_lock_irq(&ice->reg_lock);
1888 }
1889 change = inb(ICEMT(ice, RATE)) != oval;
1890 spin_unlock_irq(&ice->reg_lock);
1891
6ca308d4 1892 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1 1893 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
3d8cb466 1894 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT		 1895
1896 return change;
1897}
1898
e23e7a14 1899static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1da177e4
LT		 1900 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1901 .name = "Multi Track Internal Clock",
1902 .info = snd_ice1712_pro_internal_clock_info,
1903 .get = snd_ice1712_pro_internal_clock_get,
1904 .put = snd_ice1712_pro_internal_clock_put
1905};
1906
6ca308d4
TI		 1907static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1908 struct snd_ctl_elem_info *uinfo)
1da177e4 1909{
32b47da0 1910 static const char * const texts[] = {
1da177e4
LT		 1911 "8000", /* 0: 6 */
1912 "9600", /* 1: 3 */
1913 "11025", /* 2: 10 */
1914 "12000", /* 3: 2 */
1915 "16000", /* 4: 5 */
1916 "22050", /* 5: 9 */
1917 "24000", /* 6: 1 */
1918 "32000", /* 7: 4 */
1919 "44100", /* 8: 8 */
1920 "48000", /* 9: 0 */
1921 "64000", /* 10: 15 */
1922 "88200", /* 11: 11 */
1923 "96000", /* 12: 7 */
3d8cb466 1924 /* "IEC958 Input", 13: -- */
1da177e4
LT		 1925 };
1926 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1927 uinfo->count = 1;
1928 uinfo->value.enumerated.items = 13;
1929 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1930 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1931 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1932 return 0;
1933}
1934
6ca308d4
TI		 1935static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1936 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1937{
1938 int val;
32b47da0 1939 static const unsigned int xrate[13] = {
fe25befd 1940 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1941 32000, 44100, 48000, 64000, 88200, 96000
1942 };
1943
1944 for (val = 0; val < 13; val++) {
1945 if (xrate[val] == PRO_RATE_DEFAULT)
1946 break;
1947 }
1948
1949 ucontrol->value.enumerated.item[0] = val;
1950 return 0;
1951}
1952
6ca308d4
TI		 1953static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1954 struct snd_ctl_elem_value *ucontrol)
1da177e4 1955{
32b47da0 1956 static const unsigned int xrate[13] = {
fe25befd 1957 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1958 32000, 44100, 48000, 64000, 88200, 96000
1959 };
1960 unsigned char oval;
1961 int change = 0;
1962
1963 oval = PRO_RATE_DEFAULT;
1964 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1965 change = PRO_RATE_DEFAULT != oval;
1966
1967 return change;
1968}
1969
e23e7a14 1970static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1da177e4
LT		 1971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1972 .name = "Multi Track Internal Clock Default",
1973 .info = snd_ice1712_pro_internal_clock_default_info,
1974 .get = snd_ice1712_pro_internal_clock_default_get,
1975 .put = snd_ice1712_pro_internal_clock_default_put
1976};
1977
a5ce8890 1978#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1979
6ca308d4
TI		 1980static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1982{
1983 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1984 return 0;
1985}
1986
6ca308d4
TI		 1987static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1da177e4 1989{
6ca308d4 1990 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1991 int change = 0, nval;
1992
1993 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1994 spin_lock_irq(&ice->reg_lock);
1995 change = PRO_RATE_LOCKED != nval;
1996 PRO_RATE_LOCKED = nval;
1997 spin_unlock_irq(&ice->reg_lock);
1998 return change;
1999}
2000
e23e7a14 2001static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1da177e4
LT		 2002 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2003 .name = "Multi Track Rate Locking",
2004 .info = snd_ice1712_pro_rate_locking_info,
2005 .get = snd_ice1712_pro_rate_locking_get,
2006 .put = snd_ice1712_pro_rate_locking_put
2007};
2008
a5ce8890 2009#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 2010
6ca308d4
TI		 2011static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2012 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 2013{
2014 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2015 return 0;
2016}
2017
6ca308d4
TI		 2018static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2019 struct snd_ctl_elem_value *ucontrol)
1da177e4 2020{
6ca308d4 2021 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2022 int change = 0, nval;
2023
2024 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2025 spin_lock_irq(&ice->reg_lock);
2026 change = PRO_RATE_RESET != nval;
2027 PRO_RATE_RESET = nval;
2028 spin_unlock_irq(&ice->reg_lock);
2029 return change;
2030}
2031
e23e7a14 2032static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
1da177e4
LT		 2033 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2034 .name = "Multi Track Rate Reset",
2035 .info = snd_ice1712_pro_rate_reset_info,
2036 .get = snd_ice1712_pro_rate_reset_get,
2037 .put = snd_ice1712_pro_rate_reset_put
2038};
2039
2040/*
2041 * routing
2042 */
6ca308d4
TI		 2043static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2044 struct snd_ctl_elem_info *uinfo)
1da177e4 2045{
32b47da0 2046 static const char * const texts[] = {
1da177e4
LT		 2047 "PCM Out", /* 0 */
2048 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2049 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2050 "IEC958 In L", "IEC958 In R", /* 9-10 */
2051 "Digital Mixer", /* 11 - optional */
2052 };
3d8cb466 2053
1da177e4
LT		 2054 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2055 uinfo->count = 1;
6ca308d4
TI		 2056 uinfo->value.enumerated.items =
2057 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT		 2058 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2059 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2060 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2061 return 0;
2062}
2063
6ca308d4
TI		 2064static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2065 struct snd_ctl_elem_value *ucontrol)
1da177e4 2066{
6ca308d4 2067 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2068 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2069 unsigned int val, cval;
2070
2071 spin_lock_irq(&ice->reg_lock);
2072 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2073 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2074 spin_unlock_irq(&ice->reg_lock);
2075
2076 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2077 val &= 3;
2078 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2079 if (val == 1 && idx < 2)
2080 ucontrol->value.enumerated.item[0] = 11;
2081 else if (val == 2)
2082 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2083 else if (val == 3)
2084 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2085 else
2086 ucontrol->value.enumerated.item[0] = 0;
2087 return 0;
2088}
2089
6ca308d4
TI		 2090static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2091 struct snd_ctl_elem_value *ucontrol)
1da177e4 2092{
6ca308d4 2093 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2094 int change, shift;
2095 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2096 unsigned int val, old_val, nval;
3d8cb466 2097
1da177e4
LT		 2098 /* update PSDOUT */
2099 if (ucontrol->value.enumerated.item[0] >= 11)
2100 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2101 else if (ucontrol->value.enumerated.item[0] >= 9)
2102 nval = 3; /* spdif in */
2103 else if (ucontrol->value.enumerated.item[0] >= 1)
2104 nval = 2; /* analog in */
2105 else
2106 nval = 0; /* pcm */
2107 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2108 spin_lock_irq(&ice->reg_lock);
2109 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2110 val &= ~(0x03 << shift);
2111 val |= nval << shift;
2112 change = val != old_val;
2113 if (change)
2114 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2115 spin_unlock_irq(&ice->reg_lock);
2116 if (nval < 2) /* dig mixer of pcm */
2117 return change;
2118
2119 /* update CAPTURE */
2120 spin_lock_irq(&ice->reg_lock);
2121 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2122 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2123 if (nval == 2) { /* analog in */
2124 nval = ucontrol->value.enumerated.item[0] - 1;
2125 val &= ~(0x07 << shift);
2126 val |= nval << shift;
2127 } else { /* spdif in */
2128 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2129 val &= ~(0x08 << shift);
2130 val |= nval << shift;
2131 }
2132 if (val != old_val) {
2133 change = 1;
2134 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2135 }
2136 spin_unlock_irq(&ice->reg_lock);
2137 return change;
2138}
2139
6ca308d4
TI		 2140static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2141 struct snd_ctl_elem_value *ucontrol)
1da177e4 2142{
6ca308d4 2143 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2144 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2145 unsigned int val, cval;
2146 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2147 cval = (val >> (idx * 4 + 8)) & 0x0f;
2148 val = (val >> (idx * 2)) & 0x03;
2149 if (val == 1)
2150 ucontrol->value.enumerated.item[0] = 11;
2151 else if (val == 2)
2152 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2153 else if (val == 3)
2154 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2155 else
2156 ucontrol->value.enumerated.item[0] = 0;
2157 return 0;
2158}
2159
6ca308d4
TI		 2160static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2161 struct snd_ctl_elem_value *ucontrol)
1da177e4 2162{
6ca308d4 2163 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2164 int change, shift;
2165 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2166 unsigned int val, old_val, nval;
3d8cb466 2167
1da177e4
LT		 2168 /* update SPDOUT */
2169 spin_lock_irq(&ice->reg_lock);
2170 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2171 if (ucontrol->value.enumerated.item[0] >= 11)
2172 nval = 1;
2173 else if (ucontrol->value.enumerated.item[0] >= 9)
2174 nval = 3;
2175 else if (ucontrol->value.enumerated.item[0] >= 1)
2176 nval = 2;
2177 else
2178 nval = 0;
2179 shift = idx * 2;
2180 val &= ~(0x03 << shift);
2181 val |= nval << shift;
2182 shift = idx * 4 + 8;
2183 if (nval == 2) {
2184 nval = ucontrol->value.enumerated.item[0] - 1;
2185 val &= ~(0x07 << shift);
2186 val |= nval << shift;
2187 } else if (nval == 3) {
2188 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2189 val &= ~(0x08 << shift);
2190 val |= nval << shift;
2191 }
2192 change = val != old_val;
2193 if (change)
2194 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2195 spin_unlock_irq(&ice->reg_lock);
2196 return change;
2197}
2198
e23e7a14 2199static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
1da177e4
LT		 2200 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2201 .name = "H/W Playback Route",
2202 .info = snd_ice1712_pro_route_info,
2203 .get = snd_ice1712_pro_route_analog_get,
2204 .put = snd_ice1712_pro_route_analog_put,
2205};
2206
e23e7a14 2207static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
1da177e4 2208 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 2209 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2210 .info = snd_ice1712_pro_route_info,
2211 .get = snd_ice1712_pro_route_spdif_get,
2212 .put = snd_ice1712_pro_route_spdif_put,
2213 .count = 2,
2214};
2215
2216
6ca308d4
TI		 2217static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2218 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2219{
2220 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2221 uinfo->count = 1;
2222 uinfo->value.integer.min = 0;
2223 uinfo->value.integer.max = 255;
2224 return 0;
2225}
2226
6ca308d4
TI		 2227static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2228 struct snd_ctl_elem_value *ucontrol)
1da177e4 2229{
6ca308d4 2230 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 2231
1da177e4
LT		 2232 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2233 return 0;
2234}
2235
6ca308d4
TI		 2236static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2237 struct snd_ctl_elem_value *ucontrol)
1da177e4 2238{
6ca308d4 2239 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2240 int change;
2241
2242 spin_lock_irq(&ice->reg_lock);
2243 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2244 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2245 spin_unlock_irq(&ice->reg_lock);
2246 return change;
2247}
2248
e23e7a14 2249static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
1da177e4
LT		 2250 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2251 .name = "Multi Track Volume Rate",
2252 .info = snd_ice1712_pro_volume_rate_info,
2253 .get = snd_ice1712_pro_volume_rate_get,
2254 .put = snd_ice1712_pro_volume_rate_put
2255};
2256
6ca308d4
TI		 2257static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2258 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2259{
2260 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2261 uinfo->count = 22;
2262 uinfo->value.integer.min = 0;
2263 uinfo->value.integer.max = 255;
2264 return 0;
2265}
2266
6ca308d4
TI		 2267static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2268 struct snd_ctl_elem_value *ucontrol)
1da177e4 2269{
6ca308d4 2270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2271 int idx;
3d8cb466 2272
1da177e4
LT		 2273 spin_lock_irq(&ice->reg_lock);
2274 for (idx = 0; idx < 22; idx++) {
2275 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2276 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2277 }
2278 spin_unlock_irq(&ice->reg_lock);
2279 return 0;
2280}
2281
e23e7a14 2282static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2bdf6633 2283 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 2284 .name = "Multi Track Peak",
2285 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2286 .info = snd_ice1712_pro_peak_info,
2287 .get = snd_ice1712_pro_peak_get
2288};
2289
2290/*
2291 *
2292 */
2293
2294/*
2295 * list of available boards
2296 */
e23e7a14 2297static struct snd_ice1712_card_info *card_tables[] = {
1da177e4
LT		 2298 snd_ice1712_hoontech_cards,
2299 snd_ice1712_delta_cards,
2300 snd_ice1712_ews_cards,
2301 NULL,
2302};
2303
e23e7a14
BP		 2304static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2305 unsigned char dev,
2306 unsigned char addr)
1da177e4
LT		 2307{
2308 long t = 0x10000;
2309
2310 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2311 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2312 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2313 return inb(ICEREG(ice, I2C_DATA));
2314}
2315
e23e7a14
BP		 2316static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2317 const char *modelname)
1da177e4
LT		 2318{
2319 int dev = 0xa0; /* EEPROM device address */
2320 unsigned int i, size;
bf748ed7 2321 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2322
3d8cb466 2323 if (!modelname || !*modelname) {
1da177e4
LT		 2324 ice->eeprom.subvendor = 0;
2325 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2326 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
3d8cb466
AB		 2327 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2328 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2329 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI		 2330 if (ice->eeprom.subvendor == 0 ||
2331 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2332 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2333 u16 vendor, device;
2334 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2335 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2336 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2337 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
6dfb5aff
TI		 2338 dev_err(ice->card->dev,
2339 "No valid ID is found\n");
1da177e4
LT		 2340 return -ENXIO;
2341 }
2342 }
2343 }
2344 for (tbl = card_tables; *tbl; tbl++) {
2345 for (c = *tbl; c->subvendor; c++) {
3d8cb466 2346 if (modelname && c->model && !strcmp(modelname, c->model)) {
6dfb5aff
TI		 2347 dev_info(ice->card->dev,
2348 "Using board model %s\n", c->name);
1da177e4
LT		 2349 ice->eeprom.subvendor = c->subvendor;
2350 } else if (c->subvendor != ice->eeprom.subvendor)
2351 continue;
3d8cb466 2352 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2353 goto found;
2354 /* if the EEPROM is given by the driver, use it */
6dfb5aff 2355 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
1da177e4
LT		 2356 ice->eeprom.version = 1;
2357 ice->eeprom.size = c->eeprom_size + 6;
2358 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2359 goto read_skipped;
2360 }
2361 }
6dfb5aff 2362 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
6ca308d4 2363 ice->eeprom.subvendor);
1da177e4
LT		 2364
2365 found:
2366 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2367 if (ice->eeprom.size < 6)
2368 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2369 else if (ice->eeprom.size > 32) {
6dfb5aff
TI		 2370 dev_err(ice->card->dev,
2371 "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT		 2372 return -EIO;
2373 }
2374 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2375 if (ice->eeprom.version != 1) {
6dfb5aff 2376 dev_err(ice->card->dev, "invalid EEPROM version %i\n",
6ca308d4 2377 ice->eeprom.version);
1da177e4
LT		 2378 /* return -EIO; */
2379 }
2380 size = ice->eeprom.size - 6;
2381 for (i = 0; i < size; i++)
2382 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2383
2384 read_skipped:
2385 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2386 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2387 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2388
2389 return 0;
2390}
2391
2392
2393
e23e7a14 2394static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2395{
2396 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2397 udelay(200);
2398 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2399 udelay(200);
721b8a29
AH		 2400 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2401 !ice->dxr_enable)
2402 /* Set eeprom value to limit active ADCs and DACs to 6;
2403 * Also disable AC97 as no hardware in standard 6fire card/box
2404 * Note: DXR extensions are not currently supported
2405 */
2406 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2407 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
1da177e4
LT		 2408 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2409 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2410 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2411 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2412 ice->gpio.write_mask = ice->eeprom.gpiomask;
2413 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI		 2414 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2415 ice->eeprom.gpiomask);
2416 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2417 ice->eeprom.gpiodir);
2418 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2419 ice->eeprom.gpiostate);
1da177e4
LT		 2420 } else {
2421 ice->gpio.write_mask = 0xc0;
2422 ice->gpio.direction = 0xff;
2423 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI		 2425 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2426 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT		 2427 }
2428 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2429 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2430 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2431 udelay(100);
2432 outb(0, ICEREG(ice, AC97_CMD));
2433 udelay(200);
2434 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2435 }
2436 snd_ice1712_set_pro_rate(ice, 48000, 1);
ca051e8a
OZ		 2437 /* unmask used interrupts */
2438 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2439 ICE1712_IRQ_MPU2 : 0) |
2440 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2441 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2442 ICEREG(ice, IRQMASK));
2443 outb(0x00, ICEMT(ice, IRQ));
1da177e4
LT		 2444
2445 return 0;
2446}
2447
e23e7a14 2448int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2449{
2450 int err;
6ca308d4 2451 struct snd_kcontrol *kctl;
1da177e4 2452
da3cec35
TI		 2453 if (snd_BUG_ON(!ice->pcm_pro))
2454 return -EIO;
1da177e4
LT		 2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2456 if (err < 0)
2457 return err;
2458 kctl->id.device = ice->pcm_pro->device;
2459 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2460 if (err < 0)
2461 return err;
2462 kctl->id.device = ice->pcm_pro->device;
2463 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2464 if (err < 0)
2465 return err;
2466 kctl->id.device = ice->pcm_pro->device;
2467 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2468 if (err < 0)
2469 return err;
2470 kctl->id.device = ice->pcm_pro->device;
2471 ice->spdif.stream_ctl = kctl;
2472 return 0;
2473}
2474
2475
e23e7a14 2476static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2477{
2478 int err;
2479
2480 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2481 if (err < 0)
2482 return err;
2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2484 if (err < 0)
2485 return err;
2486 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2487 if (err < 0)
2488 return err;
2489
2490 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2491 if (err < 0)
2492 return err;
2493 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2494 if (err < 0)
2495 return err;
2496
2497 if (ice->num_total_dacs > 0) {
6ca308d4 2498 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT		 2499 tmp.count = ice->num_total_dacs;
2500 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2501 if (err < 0)
2502 return err;
2503 }
2504
2505 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2506 if (err < 0)
2507 return err;
2508
2509 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2510 if (err < 0)
2511 return err;
2512 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2513 if (err < 0)
2514 return err;
2515
2516 return 0;
2517}
2518
6ca308d4 2519static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4 2520{
3d8cb466 2521 if (!ice->port)
1da177e4
LT		 2522 goto __hw_end;
2523 /* mask all interrupts */
2524 outb(0xc0, ICEMT(ice, IRQ));
2525 outb(0xff, ICEREG(ice, IRQMASK));
2526 /* --- */
3d8cb466 2527__hw_end:
f000fd80 2528 if (ice->irq >= 0)
6ca308d4 2529 free_irq(ice->irq, ice);
f000fd80 2530
1da177e4
LT		 2531 if (ice->port)
2532 pci_release_regions(ice->pci);
2533 snd_ice1712_akm4xxx_free(ice);
2534 pci_disable_device(ice->pci);
7cda8ba9 2535 kfree(ice->spec);
1da177e4
LT		 2536 kfree(ice);
2537 return 0;
2538}
2539
6ca308d4 2540static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2541{
6ca308d4 2542 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2543 return snd_ice1712_free(ice);
2544}
2545
e23e7a14
BP		 2546static int snd_ice1712_create(struct snd_card *card,
2547 struct pci_dev *pci,
2548 const char *modelname,
2549 int omni,
2550 int cs8427_timeout,
2551 int dxr_enable,
2552 struct snd_ice1712 **r_ice1712)
1da177e4 2553{
6ca308d4 2554 struct snd_ice1712 *ice;
1da177e4 2555 int err;
6ca308d4 2556 static struct snd_device_ops ops = {
1da177e4
LT		 2557 .dev_free = snd_ice1712_dev_free,
2558 };
2559
2560 *r_ice1712 = NULL;
2561
3d8cb466
AB		 2562 /* enable PCI device */
2563 err = pci_enable_device(pci);
2564 if (err < 0)
1da177e4
LT		 2565 return err;
2566 /* check, if we can restrict PCI DMA transfers to 28 bits */
ce0b6201
YH		 2567 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2568 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
6dfb5aff
TI		 2569 dev_err(card->dev,
2570 "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT		 2571 pci_disable_device(pci);
2572 return -ENXIO;
2573 }
2574
e560d8d8 2575 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2576 if (ice == NULL) {
2577 pci_disable_device(pci);
2578 return -ENOMEM;
2579 }
2580 ice->omni = omni ? 1 : 0;
2581 if (cs8427_timeout < 1)
2582 cs8427_timeout = 1;
2583 else if (cs8427_timeout > 1000)
2584 cs8427_timeout = 1000;
2585 ice->cs8427_timeout = cs8427_timeout;
531af462 2586 ice->dxr_enable = dxr_enable;
1da177e4 2587 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2588 mutex_init(&ice->gpio_mutex);
2589 mutex_init(&ice->i2c_mutex);
2590 mutex_init(&ice->open_mutex);
1da177e4 2591 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
49470306 2592 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
1da177e4 2593 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
49470306 2594 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
1da177e4
LT		 2595 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2596 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2597
2598 ice->spdif.cs8403_bits =
2599 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2600 0x10 | /* no emphasis */
2601 0x20); /* PCM encoder/decoder */
2602 ice->card = card;
2603 ice->pci = pci;
2604 ice->irq = -1;
2605 pci_set_master(pci);
ca051e8a 2606 /* disable legacy emulation */
1da177e4
LT		 2607 pci_write_config_word(ice->pci, 0x40, 0x807f);
2608 pci_write_config_word(ice->pci, 0x42, 0x0006);
2609 snd_ice1712_proc_init(ice);
2610 synchronize_irq(pci->irq);
2611
69a4cfdd
SC		 2612 card->private_data = ice;
2613
3d8cb466
AB		 2614 err = pci_request_regions(pci, "ICE1712");
2615 if (err < 0) {
1da177e4
LT		 2616 kfree(ice);
2617 pci_disable_device(pci);
2618 return err;
2619 }
2620 ice->port = pci_resource_start(pci, 0);
2621 ice->ddma_port = pci_resource_start(pci, 1);
2622 ice->dmapath_port = pci_resource_start(pci, 2);
2623 ice->profi_port = pci_resource_start(pci, 3);
2624
437a5a46 2625 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
934c2b6d 2626 KBUILD_MODNAME, ice)) {
6dfb5aff 2627 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2628 snd_ice1712_free(ice);
2629 return -EIO;
2630 }
3d8cb466 2631
1da177e4
LT		 2632 ice->irq = pci->irq;
2633
2634 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2635 snd_ice1712_free(ice);
2636 return -EIO;
2637 }
2638 if (snd_ice1712_chip_init(ice) < 0) {
2639 snd_ice1712_free(ice);
2640 return -EIO;
2641 }
2642
3d8cb466
AB		 2643 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2644 if (err < 0) {
1da177e4 2645 snd_ice1712_free(ice);
3d8cb466 2646 return err;
1da177e4
LT		 2647 }
2648
1da177e4
LT		 2649 *r_ice1712 = ice;
2650 return 0;
2651}
2652
2653
2654/*
2655 *
2656 * Registration
2657 *
2658 */
2659
e23e7a14 2660static struct snd_ice1712_card_info no_matched;
1da177e4 2661
e23e7a14
BP		 2662static int snd_ice1712_probe(struct pci_dev *pci,
2663 const struct pci_device_id *pci_id)
1da177e4
LT		 2664{
2665 static int dev;
6ca308d4
TI		 2666 struct snd_card *card;
2667 struct snd_ice1712 *ice;
1da177e4 2668 int pcm_dev = 0, err;
bf748ed7 2669 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2670
2671 if (dev >= SNDRV_CARDS)
2672 return -ENODEV;
2673 if (!enable[dev]) {
2674 dev++;
2675 return -ENOENT;
2676 }
2677
60c5772b
TI		 2678 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2679 0, &card);
e58de7ba
TI		 2680 if (err < 0)
2681 return err;
1da177e4
LT		 2682
2683 strcpy(card->driver, "ICE1712");
2684 strcpy(card->shortname, "ICEnsemble ICE1712");
3d8cb466
AB		 2685
2686 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2687 cs8427_timeout[dev], dxr_enable[dev], &ice);
2688 if (err < 0) {
1da177e4
LT		 2689 snd_card_free(card);
2690 return err;
2691 }
2692
2693 for (tbl = card_tables; *tbl; tbl++) {
2694 for (c = *tbl; c->subvendor; c++) {
2695 if (c->subvendor == ice->eeprom.subvendor) {
267bccaf 2696 ice->card_info = c;
1da177e4
LT		 2697 strcpy(card->shortname, c->name);
2698 if (c->driver) /* specific driver? */
2699 strcpy(card->driver, c->driver);
2700 if (c->chip_init) {
3d8cb466
AB		 2701 err = c->chip_init(ice);
2702 if (err < 0) {
1da177e4
LT		 2703 snd_card_free(card);
2704 return err;
2705 }
2706 }
2707 goto __found;
2708 }
2709 }
2710 }
2711 c = &no_matched;
2712 __found:
2713
3d8cb466
AB		 2714 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2715 if (err < 0) {
1da177e4
LT		 2716 snd_card_free(card);
2717 return err;
2718 }
3d8cb466 2719
8cd2b264 2720 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2721 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2722 if (err < 0) {
1da177e4
LT		 2723 snd_card_free(card);
2724 return err;
2725 }
8cd2b264 2726 }
1da177e4 2727
3d8cb466
AB		 2728 err = snd_ice1712_ac97_mixer(ice);
2729 if (err < 0) {
1da177e4
LT		 2730 snd_card_free(card);
2731 return err;
2732 }
2733
3d8cb466
AB		 2734 err = snd_ice1712_build_controls(ice);
2735 if (err < 0) {
1da177e4
LT		 2736 snd_card_free(card);
2737 return err;
2738 }
2739
2740 if (c->build_controls) {
3d8cb466
AB		 2741 err = c->build_controls(ice);
2742 if (err < 0) {
1da177e4
LT		 2743 snd_card_free(card);
2744 return err;
2745 }
2746 }
2747
8cd2b264 2748 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2749 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2750 if (err < 0) {
1da177e4
LT		 2751 snd_card_free(card);
2752 return err;
2753 }
8cd2b264 2754 }
1da177e4 2755
3d8cb466
AB		 2756 if (!c->no_mpu401) {
2757 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2758 ICEREG(ice, MPU1_CTRL),
dba8b469
CL		 2759 c->mpu401_1_info_flags |
2760 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2761 -1, &ice->rmidi[0]);
3d8cb466 2762 if (err < 0) {
1da177e4
LT		 2763 snd_card_free(card);
2764 return err;
2765 }
3bef229e 2766 if (c->mpu401_1_name)
25985edc 2767 /* Preferred name available in card_info */
3bef229e
AH		 2768 snprintf(ice->rmidi[0]->name,
2769 sizeof(ice->rmidi[0]->name),
2770 "%s %d", c->mpu401_1_name, card->number);
2771
2772 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2773 /* 2nd port used */
3d8cb466
AB		 2774 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2775 ICEREG(ice, MPU2_CTRL),
dba8b469
CL		 2776 c->mpu401_2_info_flags |
2777 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2778 -1, &ice->rmidi[1]);
3d8cb466
AB		 2779
2780 if (err < 0) {
1da177e4
LT		 2781 snd_card_free(card);
2782 return err;
2783 }
3bef229e 2784 if (c->mpu401_2_name)
25985edc 2785 /* Preferred name available in card_info */
3bef229e
AH		 2786 snprintf(ice->rmidi[1]->name,
2787 sizeof(ice->rmidi[1]->name),
2788 "%s %d", c->mpu401_2_name,
2789 card->number);
2790 }
1da177e4
LT		 2791 }
2792
e957ebf1
JK		 2793 snd_ice1712_set_input_clock_source(ice, 0);
2794
1da177e4
LT		 2795 sprintf(card->longname, "%s at 0x%lx, irq %i",
2796 card->shortname, ice->port, ice->irq);
2797
3d8cb466
AB		 2798 err = snd_card_register(card);
2799 if (err < 0) {
1da177e4
LT		 2800 snd_card_free(card);
2801 return err;
2802 }
2803 pci_set_drvdata(pci, card);
2804 dev++;
2805 return 0;
2806}
2807
e23e7a14 2808static void snd_ice1712_remove(struct pci_dev *pci)
1da177e4 2809{
267bccaf
OZ		 2810 struct snd_card *card = pci_get_drvdata(pci);
2811 struct snd_ice1712 *ice = card->private_data;
2812
2813 if (ice->card_info && ice->card_info->chip_exit)
2814 ice->card_info->chip_exit(ice);
2815 snd_card_free(card);
1da177e4
LT		 2816}
2817
ca051e8a
OZ		 2818#ifdef CONFIG_PM_SLEEP
2819static int snd_ice1712_suspend(struct device *dev)
2820{
2821 struct pci_dev *pci = to_pci_dev(dev);
2822 struct snd_card *card = dev_get_drvdata(dev);
2823 struct snd_ice1712 *ice = card->private_data;
2824
2825 if (!ice->pm_suspend_enabled)
2826 return 0;
2827
2828 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2829
2830 snd_pcm_suspend_all(ice->pcm);
2831 snd_pcm_suspend_all(ice->pcm_pro);
2832 snd_pcm_suspend_all(ice->pcm_ds);
2833 snd_ac97_suspend(ice->ac97);
2834
2835 if (ice->pm_suspend)
2836 ice->pm_suspend(ice);
2837
2838 pci_disable_device(pci);
2839 pci_save_state(pci);
2840 pci_set_power_state(pci, PCI_D3hot);
2841 return 0;
2842}
2843
2844static int snd_ice1712_resume(struct device *dev)
2845{
2846 struct pci_dev *pci = to_pci_dev(dev);
2847 struct snd_card *card = dev_get_drvdata(dev);
2848 struct snd_ice1712 *ice = card->private_data;
2849
2850 if (!ice->pm_suspend_enabled)
2851 return 0;
2852
2853 pci_set_power_state(pci, PCI_D0);
2854 pci_restore_state(pci);
2855
2856 if (pci_enable_device(pci) < 0) {
2857 snd_card_disconnect(card);
2858 return -EIO;
2859 }
2860
2861 pci_set_master(pci);
2862
2863 if (snd_ice1712_chip_init(ice) < 0) {
2864 snd_card_disconnect(card);
2865 return -EIO;
2866 }
2867
2868 if (ice->pm_resume)
2869 ice->pm_resume(ice);
2870
2871 if (ice->ac97)
2872 snd_ac97_resume(ice->ac97);
2873
2874 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2875 return 0;
2876}
2877
2878static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2879#define SND_VT1712_PM_OPS &snd_ice1712_pm
2880#else
2881#define SND_VT1712_PM_OPS NULL
2882#endif /* CONFIG_PM_SLEEP */
2883
e9f66d9b 2884static struct pci_driver ice1712_driver = {
3733e424 2885 .name = KBUILD_MODNAME,
1da177e4
LT		 2886 .id_table = snd_ice1712_ids,
2887 .probe = snd_ice1712_probe,
e23e7a14 2888 .remove = snd_ice1712_remove,
ca051e8a
OZ		 2889 .driver = {
2890 .pm = SND_VT1712_PM_OPS,
2891 },
1da177e4
LT		 2892};
2893
e9f66d9b 2894module_pci_driver(ice1712_driver);
Linux kernel - Deliverables
This page took 0.874886 seconds and 5 git commands to generate.