[ALSA] Change seq_midi.c so client name is card, rather than port, specific
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50#include <sound/driver.h>
51#include <asm/io.h>
52#include <linux/delay.h>
53#include <linux/interrupt.h>
54#include <linux/init.h>
55#include <linux/pci.h>
9d2f928d 56#include <linux/dma-mapping.h>
1da177e4
LT
57#include <linux/slab.h>
58#include <linux/moduleparam.h>
62932df8 59#include <linux/mutex.h>
910638ae 60
1da177e4
LT
61#include <sound/core.h>
62#include <sound/cs8427.h>
63#include <sound/info.h>
64#include <sound/mpu401.h>
65#include <sound/initval.h>
66
67#include <sound/asoundef.h>
68
69#include "ice1712.h"
70
71/* lowlevel routines */
72#include "delta.h"
73#include "ews.h"
74#include "hoontech.h"
75
76MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
77MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
78MODULE_LICENSE("GPL");
79MODULE_SUPPORTED_DEVICE("{"
80 HOONTECH_DEVICE_DESC
81 DELTA_DEVICE_DESC
82 EWS_DEVICE_DESC
83 "{ICEnsemble,Generic ICE1712},"
84 "{ICEnsemble,Generic Envy24}}");
85
86static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
87static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
01a00e5e 88static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
1da177e4 89static char *model[SNDRV_CARDS];
01a00e5e 90static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
1da177e4 91static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
01a00e5e 92static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
1da177e4
LT
93
94module_param_array(index, int, NULL, 0444);
95MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
96module_param_array(id, charp, NULL, 0444);
97MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
98module_param_array(enable, bool, NULL, 0444);
99MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
100module_param_array(omni, bool, NULL, 0444);
101MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
102module_param_array(cs8427_timeout, int, NULL, 0444);
103MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
104module_param_array(model, charp, NULL, 0444);
105MODULE_PARM_DESC(model, "Use the given board model.");
531af462 106module_param_array(dxr_enable, int, NULL, 0444);
01a00e5e 107MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 108
1da177e4 109
396c9b92 110static struct pci_device_id snd_ice1712_ids[] __devinitdata = {
1da177e4
LT
111 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
112 { 0, }
113};
114
115MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
116
6ca308d4
TI
117static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
118static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT
119
120static int PRO_RATE_LOCKED;
121static int PRO_RATE_RESET = 1;
122static unsigned int PRO_RATE_DEFAULT = 44100;
123
124/*
125 * Basic I/O
126 */
127
128/* check whether the clock mode is spdif-in */
6ca308d4 129static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT
130{
131 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
132}
133
6ca308d4 134static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT
135{
136 return is_spdif_master(ice) || PRO_RATE_LOCKED;
137}
138
6ca308d4 139static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
1da177e4
LT
140{
141 outb((channel << 4) | addr, ICEDS(ice, INDEX));
142 outl(data, ICEDS(ice, DATA));
143}
144
6ca308d4 145static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
1da177e4
LT
146{
147 outb((channel << 4) | addr, ICEDS(ice, INDEX));
148 return inl(ICEDS(ice, DATA));
149}
150
6ca308d4 151static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
152 unsigned short reg,
153 unsigned short val)
154{
6ca308d4 155 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
156 int tm;
157 unsigned char old_cmd = 0;
158
159 for (tm = 0; tm < 0x10000; tm++) {
160 old_cmd = inb(ICEREG(ice, AC97_CMD));
161 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
162 continue;
163 if (!(old_cmd & ICE1712_AC97_READY))
164 continue;
165 break;
166 }
167 outb(reg, ICEREG(ice, AC97_INDEX));
168 outw(val, ICEREG(ice, AC97_DATA));
169 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
170 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
171 for (tm = 0; tm < 0x10000; tm++)
172 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
173 break;
174}
175
6ca308d4 176static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT
177 unsigned short reg)
178{
6ca308d4 179 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
180 int tm;
181 unsigned char old_cmd = 0;
182
183 for (tm = 0; tm < 0x10000; tm++) {
184 old_cmd = inb(ICEREG(ice, AC97_CMD));
185 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
186 continue;
187 if (!(old_cmd & ICE1712_AC97_READY))
188 continue;
189 break;
190 }
191 outb(reg, ICEREG(ice, AC97_INDEX));
192 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
193 for (tm = 0; tm < 0x10000; tm++)
194 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
195 break;
196 if (tm >= 0x10000) /* timeout */
197 return ~0;
198 return inw(ICEREG(ice, AC97_DATA));
199}
200
201/*
202 * pro ac97 section
203 */
204
6ca308d4 205static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
206 unsigned short reg,
207 unsigned short val)
208{
6ca308d4 209 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
210 int tm;
211 unsigned char old_cmd = 0;
212
213 for (tm = 0; tm < 0x10000; tm++) {
214 old_cmd = inb(ICEMT(ice, AC97_CMD));
215 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
216 continue;
217 if (!(old_cmd & ICE1712_AC97_READY))
218 continue;
219 break;
220 }
221 outb(reg, ICEMT(ice, AC97_INDEX));
222 outw(val, ICEMT(ice, AC97_DATA));
223 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
224 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
225 for (tm = 0; tm < 0x10000; tm++)
226 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
227 break;
228}
229
230
6ca308d4 231static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT
232 unsigned short reg)
233{
6ca308d4 234 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
235 int tm;
236 unsigned char old_cmd = 0;
237
238 for (tm = 0; tm < 0x10000; tm++) {
239 old_cmd = inb(ICEMT(ice, AC97_CMD));
240 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
241 continue;
242 if (!(old_cmd & ICE1712_AC97_READY))
243 continue;
244 break;
245 }
246 outb(reg, ICEMT(ice, AC97_INDEX));
247 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
248 for (tm = 0; tm < 0x10000; tm++)
249 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
250 break;
251 if (tm >= 0x10000) /* timeout */
252 return ~0;
253 return inw(ICEMT(ice, AC97_DATA));
254}
255
256/*
257 * consumer ac97 digital mix
258 */
6ca308d4 259static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
260{
261 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
262 uinfo->count = 1;
263 uinfo->value.integer.min = 0;
264 uinfo->value.integer.max = 1;
265 return 0;
266}
267
6ca308d4 268static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 269{
6ca308d4 270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
271
272 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
273 return 0;
274}
275
6ca308d4 276static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 277{
6ca308d4 278 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
279 unsigned char val, nval;
280
281 spin_lock_irq(&ice->reg_lock);
282 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
283 nval = val & ~ICE1712_ROUTE_AC97;
284 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
285 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
286 spin_unlock_irq(&ice->reg_lock);
287 return val != nval;
288}
289
6ca308d4 290static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
1da177e4
LT
291 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
292 .name = "Digital Mixer To AC97",
293 .info = snd_ice1712_digmix_route_ac97_info,
294 .get = snd_ice1712_digmix_route_ac97_get,
295 .put = snd_ice1712_digmix_route_ac97_put,
296};
297
298
299/*
300 * gpio operations
301 */
6ca308d4 302static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
303{
304 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
305 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
306}
307
6ca308d4 308static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
309{
310 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
311 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
312}
313
6ca308d4 314static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT
315{
316 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
317}
318
6ca308d4 319static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT
320{
321 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
322 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
323}
324
1da177e4
LT
325/*
326 *
327 * CS8427 interface
328 *
329 */
330
331/*
332 * change the input clock selection
333 * spdif_clock = 1 - IEC958 input, 0 - Envy24
334 */
6ca308d4 335static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT
336{
337 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
338 unsigned char val, nval;
339 int res = 0;
340
341 snd_i2c_lock(ice->i2c);
342 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
343 snd_i2c_unlock(ice->i2c);
344 return -EIO;
345 }
346 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
347 snd_i2c_unlock(ice->i2c);
348 return -EIO;
349 }
350 nval = val & 0xf0;
351 if (spdif_clock)
352 nval |= 0x01;
353 else
354 nval |= 0x04;
355 if (val != nval) {
356 reg[1] = nval;
357 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
358 res = -EIO;
359 } else {
360 res++;
361 }
362 }
363 snd_i2c_unlock(ice->i2c);
364 return res;
365}
366
367/*
368 * spdif callbacks
369 */
6ca308d4 370static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT
371{
372 snd_cs8427_iec958_active(ice->cs8427, 1);
373}
374
6ca308d4 375static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT
376{
377 snd_cs8427_iec958_active(ice->cs8427, 0);
378}
379
6ca308d4 380static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT
381{
382 snd_cs8427_iec958_pcm(ice->cs8427, rate);
383}
384
385/*
386 * create and initialize callbacks for cs8427 interface
387 */
6ca308d4 388int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT
389{
390 int err;
391
392 if ((err = snd_cs8427_create(ice->i2c, addr,
393 (ice->cs8427_timeout * HZ) / 1000,
394 &ice->cs8427)) < 0) {
99b359ba 395 snd_printk(KERN_ERR "CS8427 initialization failed\n");
1da177e4
LT
396 return err;
397 }
398 ice->spdif.ops.open = open_cs8427;
399 ice->spdif.ops.close = close_cs8427;
400 ice->spdif.ops.setup_rate = setup_cs8427;
401 return 0;
402}
403
e957ebf1
JK
404static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
405{
406 /* change CS8427 clock source too */
407 if (ice->cs8427)
408 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
409 /* notify ak4524 chip as well */
410 if (spdif_is_master) {
411 unsigned int i;
412 for (i = 0; i < ice->akm_codecs; i++) {
413 if (ice->akm[i].ops.set_rate_val)
414 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
415 }
416 }
417}
1da177e4
LT
418
419/*
420 * Interrupt handler
421 */
422
423static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
424{
6ca308d4 425 struct snd_ice1712 *ice = dev_id;
1da177e4
LT
426 unsigned char status;
427 int handled = 0;
428
429 while (1) {
430 status = inb(ICEREG(ice, IRQSTAT));
431 if (status == 0)
432 break;
433 handled = 1;
434 if (status & ICE1712_IRQ_MPU1) {
435 if (ice->rmidi[0])
436 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
437 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
438 status &= ~ICE1712_IRQ_MPU1;
439 }
440 if (status & ICE1712_IRQ_TIMER)
441 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
442 if (status & ICE1712_IRQ_MPU2) {
443 if (ice->rmidi[1])
444 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
445 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
446 status &= ~ICE1712_IRQ_MPU2;
447 }
448 if (status & ICE1712_IRQ_PROPCM) {
449 unsigned char mtstat = inb(ICEMT(ice, IRQ));
450 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
451 if (ice->playback_pro_substream)
452 snd_pcm_period_elapsed(ice->playback_pro_substream);
453 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
454 }
455 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
456 if (ice->capture_pro_substream)
457 snd_pcm_period_elapsed(ice->capture_pro_substream);
458 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
459 }
460 }
461 if (status & ICE1712_IRQ_FM)
462 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
463 if (status & ICE1712_IRQ_PBKDS) {
464 u32 idx;
465 u16 pbkstatus;
6ca308d4 466 struct snd_pcm_substream *substream;
1da177e4
LT
467 pbkstatus = inw(ICEDS(ice, INTSTAT));
468 //printk("pbkstatus = 0x%x\n", pbkstatus);
469 for (idx = 0; idx < 6; idx++) {
470 if ((pbkstatus & (3 << (idx * 2))) == 0)
471 continue;
472 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
473 snd_pcm_period_elapsed(substream);
474 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
475 }
476 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
477 }
478 if (status & ICE1712_IRQ_CONCAP) {
479 if (ice->capture_con_substream)
480 snd_pcm_period_elapsed(ice->capture_con_substream);
481 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
482 }
483 if (status & ICE1712_IRQ_CONPBK) {
484 if (ice->playback_con_substream)
485 snd_pcm_period_elapsed(ice->playback_con_substream);
486 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
487 }
488 }
489 return IRQ_RETVAL(handled);
490}
491
492
493/*
494 * PCM part - misc
495 */
496
6ca308d4
TI
497static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
498 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
499{
500 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
501}
502
6ca308d4 503static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
504{
505 return snd_pcm_lib_free_pages(substream);
506}
507
508/*
509 * PCM part - consumer I/O
510 */
511
6ca308d4 512static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
513 int cmd)
514{
6ca308d4 515 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
516 int result = 0;
517 u32 tmp;
518
519 spin_lock(&ice->reg_lock);
520 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
521 if (cmd == SNDRV_PCM_TRIGGER_START) {
522 tmp |= 1;
523 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
524 tmp &= ~1;
525 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
526 tmp |= 2;
527 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
528 tmp &= ~2;
529 } else {
530 result = -EINVAL;
531 }
532 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
533 spin_unlock(&ice->reg_lock);
534 return result;
535}
536
6ca308d4 537static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
538 int cmd)
539{
6ca308d4 540 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
541 int result = 0;
542 u32 tmp;
543
544 spin_lock(&ice->reg_lock);
545 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
546 if (cmd == SNDRV_PCM_TRIGGER_START) {
547 tmp |= 1;
548 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
549 tmp &= ~1;
550 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
551 tmp |= 2;
552 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
553 tmp &= ~2;
554 } else {
555 result = -EINVAL;
556 }
557 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
558 spin_unlock(&ice->reg_lock);
559 return result;
560}
561
6ca308d4 562static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
563 int cmd)
564{
6ca308d4 565 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
566 int result = 0;
567 u8 tmp;
568
569 spin_lock(&ice->reg_lock);
570 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
571 if (cmd == SNDRV_PCM_TRIGGER_START) {
572 tmp |= 1;
573 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
574 tmp &= ~1;
575 } else {
576 result = -EINVAL;
577 }
578 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
579 spin_unlock(&ice->reg_lock);
580 return result;
581}
582
6ca308d4 583static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 584{
6ca308d4
TI
585 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
586 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
587 u32 period_size, buf_size, rate, tmp;
588
589 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
590 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
591 tmp = 0x0000;
592 if (snd_pcm_format_width(runtime->format) == 16)
593 tmp |= 0x10;
594 if (runtime->channels == 2)
595 tmp |= 0x08;
596 rate = (runtime->rate * 8192) / 375;
597 if (rate > 0x000fffff)
598 rate = 0x000fffff;
599 spin_lock_irq(&ice->reg_lock);
600 outb(0, ice->ddma_port + 15);
601 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
602 outl(runtime->dma_addr, ice->ddma_port + 0);
603 outw(buf_size, ice->ddma_port + 4);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
606 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
612 spin_unlock_irq(&ice->reg_lock);
613 return 0;
614}
615
6ca308d4 616static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 617{
6ca308d4
TI
618 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
619 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
620 u32 period_size, buf_size, rate, tmp, chn;
621
622 period_size = snd_pcm_lib_period_bytes(substream) - 1;
623 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
624 tmp = 0x0064;
625 if (snd_pcm_format_width(runtime->format) == 16)
626 tmp &= ~0x04;
627 if (runtime->channels == 2)
628 tmp |= 0x08;
629 rate = (runtime->rate * 8192) / 375;
630 if (rate > 0x000fffff)
631 rate = 0x000fffff;
632 ice->playback_con_active_buf[substream->number] = 0;
633 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
634 chn = substream->number * 2;
635 spin_lock_irq(&ice->reg_lock);
636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
643 if (runtime->channels == 2) {
644 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
645 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
646 }
647 spin_unlock_irq(&ice->reg_lock);
648 return 0;
649}
650
6ca308d4 651static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 652{
6ca308d4
TI
653 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
654 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
655 u32 period_size, buf_size;
656 u8 tmp;
657
658 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
659 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
660 tmp = 0x06;
661 if (snd_pcm_format_width(runtime->format) == 16)
662 tmp &= ~0x04;
663 if (runtime->channels == 2)
664 tmp &= ~0x02;
665 spin_lock_irq(&ice->reg_lock);
666 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
667 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
668 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
669 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
670 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
671 spin_unlock_irq(&ice->reg_lock);
672 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
673 return 0;
674}
675
6ca308d4 676static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 677{
6ca308d4
TI
678 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
679 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
680 size_t ptr;
681
682 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
683 return 0;
684 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
685 if (ptr == runtime->buffer_size)
686 ptr = 0;
687 return bytes_to_frames(substream->runtime, ptr);
688}
689
6ca308d4 690static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 691{
6ca308d4 692 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
693 u8 addr;
694 size_t ptr;
695
696 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
697 return 0;
698 if (ice->playback_con_active_buf[substream->number])
699 addr = ICE1712_DSC_ADDR1;
700 else
701 addr = ICE1712_DSC_ADDR0;
702 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
703 ice->playback_con_virt_addr[substream->number];
704 if (ptr == substream->runtime->buffer_size)
705 ptr = 0;
706 return bytes_to_frames(substream->runtime, ptr);
707}
708
6ca308d4 709static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 710{
6ca308d4 711 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
712 size_t ptr;
713
714 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
715 return 0;
716 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
717 if (ptr == substream->runtime->buffer_size)
718 ptr = 0;
719 return bytes_to_frames(substream->runtime, ptr);
720}
721
6ca308d4 722static struct snd_pcm_hardware snd_ice1712_playback =
1da177e4
LT
723{
724 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
725 SNDRV_PCM_INFO_BLOCK_TRANSFER |
726 SNDRV_PCM_INFO_MMAP_VALID |
727 SNDRV_PCM_INFO_PAUSE),
728 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
729 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
730 .rate_min = 4000,
731 .rate_max = 48000,
732 .channels_min = 1,
733 .channels_max = 2,
734 .buffer_bytes_max = (64*1024),
735 .period_bytes_min = 64,
736 .period_bytes_max = (64*1024),
737 .periods_min = 1,
738 .periods_max = 1024,
739 .fifo_size = 0,
740};
741
6ca308d4 742static struct snd_pcm_hardware snd_ice1712_playback_ds =
1da177e4
LT
743{
744 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
745 SNDRV_PCM_INFO_BLOCK_TRANSFER |
746 SNDRV_PCM_INFO_MMAP_VALID |
747 SNDRV_PCM_INFO_PAUSE),
748 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
749 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
750 .rate_min = 4000,
751 .rate_max = 48000,
752 .channels_min = 1,
753 .channels_max = 2,
754 .buffer_bytes_max = (128*1024),
755 .period_bytes_min = 64,
756 .period_bytes_max = (128*1024),
757 .periods_min = 2,
758 .periods_max = 2,
759 .fifo_size = 0,
760};
761
6ca308d4 762static struct snd_pcm_hardware snd_ice1712_capture =
1da177e4
LT
763{
764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
765 SNDRV_PCM_INFO_BLOCK_TRANSFER |
766 SNDRV_PCM_INFO_MMAP_VALID),
767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
769 .rate_min = 4000,
770 .rate_max = 48000,
771 .channels_min = 1,
772 .channels_max = 2,
773 .buffer_bytes_max = (64*1024),
774 .period_bytes_min = 64,
775 .period_bytes_max = (64*1024),
776 .periods_min = 1,
777 .periods_max = 1024,
778 .fifo_size = 0,
779};
780
6ca308d4 781static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 782{
6ca308d4
TI
783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
785
786 ice->playback_con_substream = substream;
787 runtime->hw = snd_ice1712_playback;
788 return 0;
789}
790
6ca308d4 791static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 792{
6ca308d4
TI
793 struct snd_pcm_runtime *runtime = substream->runtime;
794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
795 u32 tmp;
796
797 ice->playback_con_substream_ds[substream->number] = substream;
798 runtime->hw = snd_ice1712_playback_ds;
799 spin_lock_irq(&ice->reg_lock);
800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
801 outw(tmp, ICEDS(ice, INTMASK));
802 spin_unlock_irq(&ice->reg_lock);
803 return 0;
804}
805
6ca308d4 806static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 807{
6ca308d4
TI
808 struct snd_pcm_runtime *runtime = substream->runtime;
809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
810
811 ice->capture_con_substream = substream;
812 runtime->hw = snd_ice1712_capture;
813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
815 runtime->hw.rate_min = 48000;
816 return 0;
817}
818
6ca308d4 819static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 820{
6ca308d4 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
822
823 ice->playback_con_substream = NULL;
824 return 0;
825}
826
6ca308d4 827static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 828{
6ca308d4 829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
830 u32 tmp;
831
832 spin_lock_irq(&ice->reg_lock);
833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
834 outw(tmp, ICEDS(ice, INTMASK));
835 spin_unlock_irq(&ice->reg_lock);
836 ice->playback_con_substream_ds[substream->number] = NULL;
837 return 0;
838}
839
6ca308d4 840static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 841{
6ca308d4 842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
843
844 ice->capture_con_substream = NULL;
845 return 0;
846}
847
6ca308d4 848static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT
849 .open = snd_ice1712_playback_open,
850 .close = snd_ice1712_playback_close,
851 .ioctl = snd_pcm_lib_ioctl,
852 .hw_params = snd_ice1712_hw_params,
853 .hw_free = snd_ice1712_hw_free,
854 .prepare = snd_ice1712_playback_prepare,
855 .trigger = snd_ice1712_playback_trigger,
856 .pointer = snd_ice1712_playback_pointer,
857};
858
6ca308d4 859static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT
860 .open = snd_ice1712_playback_ds_open,
861 .close = snd_ice1712_playback_ds_close,
862 .ioctl = snd_pcm_lib_ioctl,
863 .hw_params = snd_ice1712_hw_params,
864 .hw_free = snd_ice1712_hw_free,
865 .prepare = snd_ice1712_playback_ds_prepare,
866 .trigger = snd_ice1712_playback_ds_trigger,
867 .pointer = snd_ice1712_playback_ds_pointer,
868};
869
6ca308d4 870static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT
871 .open = snd_ice1712_capture_open,
872 .close = snd_ice1712_capture_close,
873 .ioctl = snd_pcm_lib_ioctl,
874 .hw_params = snd_ice1712_hw_params,
875 .hw_free = snd_ice1712_hw_free,
876 .prepare = snd_ice1712_capture_prepare,
877 .trigger = snd_ice1712_capture_trigger,
878 .pointer = snd_ice1712_capture_pointer,
879};
880
6ca308d4 881static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 882{
6ca308d4 883 struct snd_pcm *pcm;
1da177e4
LT
884 int err;
885
886 if (rpcm)
887 *rpcm = NULL;
888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
889 if (err < 0)
890 return err;
891
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
894
895 pcm->private_data = ice;
1da177e4
LT
896 pcm->info_flags = 0;
897 strcpy(pcm->name, "ICE1712 consumer");
898 ice->pcm = pcm;
899
900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
902
903 if (rpcm)
904 *rpcm = pcm;
905
906 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
907
908 return 0;
909}
910
6ca308d4 911static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 912{
6ca308d4 913 struct snd_pcm *pcm;
1da177e4
LT
914 int err;
915
916 if (rpcm)
917 *rpcm = NULL;
918 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
919 if (err < 0)
920 return err;
921
922 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
923
924 pcm->private_data = ice;
1da177e4
LT
925 pcm->info_flags = 0;
926 strcpy(pcm->name, "ICE1712 consumer (DS)");
927 ice->pcm_ds = pcm;
928
929 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
930 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
931
932 if (rpcm)
933 *rpcm = pcm;
934
935 return 0;
936}
937
938/*
939 * PCM code - professional part (multitrack)
940 */
941
942static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
943 32000, 44100, 48000, 64000, 88200, 96000 };
944
6ca308d4 945static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT
946 .count = ARRAY_SIZE(rates),
947 .list = rates,
948 .mask = 0,
949};
950
6ca308d4 951static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
952 int cmd)
953{
6ca308d4 954 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
955 switch (cmd) {
956 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
957 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
958 {
959 unsigned int what;
960 unsigned int old;
961 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
962 return -EINVAL;
963 what = ICE1712_PLAYBACK_PAUSE;
964 snd_pcm_trigger_done(substream, substream);
965 spin_lock(&ice->reg_lock);
966 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
967 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
968 old |= what;
969 else
970 old &= ~what;
971 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
972 spin_unlock(&ice->reg_lock);
973 break;
974 }
975 case SNDRV_PCM_TRIGGER_START:
976 case SNDRV_PCM_TRIGGER_STOP:
977 {
978 unsigned int what = 0;
979 unsigned int old;
980 struct list_head *pos;
6ca308d4 981 struct snd_pcm_substream *s;
1da177e4
LT
982
983 snd_pcm_group_for_each(pos, substream) {
984 s = snd_pcm_group_substream_entry(pos);
985 if (s == ice->playback_pro_substream) {
986 what |= ICE1712_PLAYBACK_START;
987 snd_pcm_trigger_done(s, substream);
988 } else if (s == ice->capture_pro_substream) {
989 what |= ICE1712_CAPTURE_START_SHADOW;
990 snd_pcm_trigger_done(s, substream);
991 }
992 }
993 spin_lock(&ice->reg_lock);
994 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
995 if (cmd == SNDRV_PCM_TRIGGER_START)
996 old |= what;
997 else
998 old &= ~what;
999 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
1000 spin_unlock(&ice->reg_lock);
1001 break;
1002 }
1003 default:
1004 return -EINVAL;
1005 }
1006 return 0;
1007}
1008
1009/*
1010 */
6ca308d4 1011static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT
1012{
1013 unsigned long flags;
1014 unsigned char val, old;
1015 unsigned int i;
1016
1017 switch (rate) {
1018 case 8000: val = 6; break;
1019 case 9600: val = 3; break;
1020 case 11025: val = 10; break;
1021 case 12000: val = 2; break;
1022 case 16000: val = 5; break;
1023 case 22050: val = 9; break;
1024 case 24000: val = 1; break;
1025 case 32000: val = 4; break;
1026 case 44100: val = 8; break;
1027 case 48000: val = 0; break;
1028 case 64000: val = 15; break;
1029 case 88200: val = 11; break;
1030 case 96000: val = 7; break;
1031 default:
1032 snd_BUG();
1033 val = 0;
1034 rate = 48000;
1035 break;
1036 }
1037
1038 spin_lock_irqsave(&ice->reg_lock, flags);
1039 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1040 ICE1712_PLAYBACK_PAUSE|
1041 ICE1712_PLAYBACK_START)) {
1042 __out:
1043 spin_unlock_irqrestore(&ice->reg_lock, flags);
1044 return;
1045 }
1046 if (!force && is_pro_rate_locked(ice))
1047 goto __out;
1048
1049 old = inb(ICEMT(ice, RATE));
1050 if (!force && old == val)
1051 goto __out;
1052 outb(val, ICEMT(ice, RATE));
1053 spin_unlock_irqrestore(&ice->reg_lock, flags);
1054
1055 if (ice->gpio.set_pro_rate)
1056 ice->gpio.set_pro_rate(ice, rate);
1057 for (i = 0; i < ice->akm_codecs; i++) {
1058 if (ice->akm[i].ops.set_rate_val)
1059 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1060 }
1061 if (ice->spdif.ops.setup_rate)
1062 ice->spdif.ops.setup_rate(ice, rate);
1063}
1064
6ca308d4 1065static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1066{
6ca308d4 1067 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1068
1069 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1070 spin_lock_irq(&ice->reg_lock);
1071 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1072 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1073 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1074 spin_unlock_irq(&ice->reg_lock);
1075
1076 return 0;
1077}
1078
6ca308d4
TI
1079static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1080 struct snd_pcm_hw_params *hw_params)
1da177e4 1081{
6ca308d4 1082 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1083
1084 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1085 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1086}
1087
6ca308d4 1088static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1089{
6ca308d4 1090 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1091
1092 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1093 spin_lock_irq(&ice->reg_lock);
1094 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1095 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1096 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1097 spin_unlock_irq(&ice->reg_lock);
1098 return 0;
1099}
1100
6ca308d4
TI
1101static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1102 struct snd_pcm_hw_params *hw_params)
1da177e4 1103{
6ca308d4 1104 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1105
1106 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1107 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1108}
1109
6ca308d4 1110static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1111{
6ca308d4 1112 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1113 size_t ptr;
1114
1115 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1116 return 0;
1117 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1118 if (ptr == substream->runtime->buffer_size)
1119 ptr = 0;
1120 return bytes_to_frames(substream->runtime, ptr);
1121}
1122
6ca308d4 1123static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1124{
6ca308d4 1125 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1126 size_t ptr;
1127
1128 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1129 return 0;
1130 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1131 if (ptr == substream->runtime->buffer_size)
1132 ptr = 0;
1133 return bytes_to_frames(substream->runtime, ptr);
1134}
1135
6ca308d4 1136static struct snd_pcm_hardware snd_ice1712_playback_pro =
1da177e4
LT
1137{
1138 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1139 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1140 SNDRV_PCM_INFO_MMAP_VALID |
1141 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1142 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1143 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1144 .rate_min = 4000,
1145 .rate_max = 96000,
1146 .channels_min = 10,
1147 .channels_max = 10,
1148 .buffer_bytes_max = (256*1024),
1149 .period_bytes_min = 10 * 4 * 2,
1150 .period_bytes_max = 131040,
1151 .periods_min = 1,
1152 .periods_max = 1024,
1153 .fifo_size = 0,
1154};
1155
6ca308d4 1156static struct snd_pcm_hardware snd_ice1712_capture_pro =
1da177e4
LT
1157{
1158 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1159 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1160 SNDRV_PCM_INFO_MMAP_VALID |
1161 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1162 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1163 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1164 .rate_min = 4000,
1165 .rate_max = 96000,
1166 .channels_min = 12,
1167 .channels_max = 12,
1168 .buffer_bytes_max = (256*1024),
1169 .period_bytes_min = 12 * 4 * 2,
1170 .period_bytes_max = 131040,
1171 .periods_min = 1,
1172 .periods_max = 1024,
1173 .fifo_size = 0,
1174};
1175
6ca308d4 1176static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1177{
6ca308d4
TI
1178 struct snd_pcm_runtime *runtime = substream->runtime;
1179 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1180
1181 ice->playback_pro_substream = substream;
1182 runtime->hw = snd_ice1712_playback_pro;
1183 snd_pcm_set_sync(substream);
1184 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1185 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1186
1187 if (ice->spdif.ops.open)
1188 ice->spdif.ops.open(ice, substream);
1189
1190 return 0;
1191}
1192
6ca308d4 1193static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1194{
6ca308d4
TI
1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1196 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1197
1198 ice->capture_pro_substream = substream;
1199 runtime->hw = snd_ice1712_capture_pro;
1200 snd_pcm_set_sync(substream);
1201 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1202 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1203 return 0;
1204}
1205
6ca308d4 1206static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1207{
6ca308d4 1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1209
1210 if (PRO_RATE_RESET)
1211 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1212 ice->playback_pro_substream = NULL;
1213 if (ice->spdif.ops.close)
1214 ice->spdif.ops.close(ice, substream);
1215
1216 return 0;
1217}
1218
6ca308d4 1219static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1220{
6ca308d4 1221 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1222
1223 if (PRO_RATE_RESET)
1224 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1225 ice->capture_pro_substream = NULL;
1226 return 0;
1227}
1228
6ca308d4 1229static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT
1230 .open = snd_ice1712_playback_pro_open,
1231 .close = snd_ice1712_playback_pro_close,
1232 .ioctl = snd_pcm_lib_ioctl,
1233 .hw_params = snd_ice1712_playback_pro_hw_params,
1234 .hw_free = snd_ice1712_hw_free,
1235 .prepare = snd_ice1712_playback_pro_prepare,
1236 .trigger = snd_ice1712_pro_trigger,
1237 .pointer = snd_ice1712_playback_pro_pointer,
1238};
1239
6ca308d4 1240static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT
1241 .open = snd_ice1712_capture_pro_open,
1242 .close = snd_ice1712_capture_pro_close,
1243 .ioctl = snd_pcm_lib_ioctl,
1244 .hw_params = snd_ice1712_capture_pro_hw_params,
1245 .hw_free = snd_ice1712_hw_free,
1246 .prepare = snd_ice1712_capture_pro_prepare,
1247 .trigger = snd_ice1712_pro_trigger,
1248 .pointer = snd_ice1712_capture_pro_pointer,
1249};
1250
6ca308d4 1251static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 1252{
6ca308d4 1253 struct snd_pcm *pcm;
1da177e4
LT
1254 int err;
1255
1256 if (rpcm)
1257 *rpcm = NULL;
1258 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1259 if (err < 0)
1260 return err;
1261
1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1264
1265 pcm->private_data = ice;
1da177e4
LT
1266 pcm->info_flags = 0;
1267 strcpy(pcm->name, "ICE1712 multi");
1268
1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1270 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1271
1272 ice->pcm_pro = pcm;
1273 if (rpcm)
1274 *rpcm = pcm;
1275
1276 if (ice->cs8427) {
1277 /* assign channels to iec958 */
1278 err = snd_cs8427_iec958_build(ice->cs8427,
1279 pcm->streams[0].substream,
1280 pcm->streams[1].substream);
1281 if (err < 0)
1282 return err;
1283 }
1284
1285 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1286 return err;
1287 return 0;
1288}
1289
1290/*
1291 * Mixer section
1292 */
1293
6ca308d4 1294static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT
1295{
1296 unsigned int vol = ice->pro_volumes[index];
1297 unsigned short val = 0;
1298
1299 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1300 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1301 outb(index, ICEMT(ice, MONITOR_INDEX));
1302 outw(val, ICEMT(ice, MONITOR_VOLUME));
1303}
1304
6ca308d4 1305static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1306{
1307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1308 uinfo->count = 2;
1309 uinfo->value.integer.min = 0;
1310 uinfo->value.integer.max = 1;
1311 return 0;
1312}
1313
6ca308d4 1314static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1315{
6ca308d4 1316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1317 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1318
1319 spin_lock_irq(&ice->reg_lock);
1320 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1321 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1322 spin_unlock_irq(&ice->reg_lock);
1323 return 0;
1324}
1325
6ca308d4 1326static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1327{
6ca308d4 1328 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1329 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1330 unsigned int nval, change;
1331
1332 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1333 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1334 spin_lock_irq(&ice->reg_lock);
1335 nval |= ice->pro_volumes[index] & ~0x80008000;
1336 change = nval != ice->pro_volumes[index];
1337 ice->pro_volumes[index] = nval;
1338 snd_ice1712_update_volume(ice, index);
1339 spin_unlock_irq(&ice->reg_lock);
1340 return change;
1341}
1342
6ca308d4 1343static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1344{
1345 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1346 uinfo->count = 2;
1347 uinfo->value.integer.min = 0;
1348 uinfo->value.integer.max = 96;
1349 return 0;
1350}
1351
6ca308d4 1352static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1353{
6ca308d4 1354 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1355 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1356
1357 spin_lock_irq(&ice->reg_lock);
1358 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1359 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1360 spin_unlock_irq(&ice->reg_lock);
1361 return 0;
1362}
1363
6ca308d4 1364static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1365{
6ca308d4 1366 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1367 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1368 unsigned int nval, change;
1369
1370 nval = (ucontrol->value.integer.value[0] & 127) |
1371 ((ucontrol->value.integer.value[1] & 127) << 16);
1372 spin_lock_irq(&ice->reg_lock);
1373 nval |= ice->pro_volumes[index] & ~0x007f007f;
1374 change = nval != ice->pro_volumes[index];
1375 ice->pro_volumes[index] = nval;
1376 snd_ice1712_update_volume(ice, index);
1377 spin_unlock_irq(&ice->reg_lock);
1378 return change;
1379}
1380
1381
6ca308d4 1382static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1da177e4
LT
1383 {
1384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1385 .name = "Multi Playback Switch",
1386 .info = snd_ice1712_pro_mixer_switch_info,
1387 .get = snd_ice1712_pro_mixer_switch_get,
1388 .put = snd_ice1712_pro_mixer_switch_put,
1389 .private_value = 0,
1390 .count = 10,
1391 },
1392 {
1393 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1394 .name = "Multi Playback Volume",
1395 .info = snd_ice1712_pro_mixer_volume_info,
1396 .get = snd_ice1712_pro_mixer_volume_get,
1397 .put = snd_ice1712_pro_mixer_volume_put,
1398 .private_value = 0,
1399 .count = 10,
1400 },
1401};
1402
6ca308d4 1403static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1da177e4
LT
1404 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1405 .name = "H/W Multi Capture Switch",
1406 .info = snd_ice1712_pro_mixer_switch_info,
1407 .get = snd_ice1712_pro_mixer_switch_get,
1408 .put = snd_ice1712_pro_mixer_switch_put,
1409 .private_value = 10,
1410};
1411
6ca308d4 1412static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1da177e4 1413 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1414 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1da177e4
LT
1415 .info = snd_ice1712_pro_mixer_switch_info,
1416 .get = snd_ice1712_pro_mixer_switch_get,
1417 .put = snd_ice1712_pro_mixer_switch_put,
1418 .private_value = 18,
1419 .count = 2,
1420};
1421
6ca308d4 1422static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1da177e4
LT
1423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1424 .name = "H/W Multi Capture Volume",
1425 .info = snd_ice1712_pro_mixer_volume_info,
1426 .get = snd_ice1712_pro_mixer_volume_get,
1427 .put = snd_ice1712_pro_mixer_volume_put,
1428 .private_value = 10,
1429};
1430
6ca308d4 1431static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1da177e4 1432 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1433 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1da177e4
LT
1434 .info = snd_ice1712_pro_mixer_volume_info,
1435 .get = snd_ice1712_pro_mixer_volume_get,
1436 .put = snd_ice1712_pro_mixer_volume_put,
1437 .private_value = 18,
1438 .count = 2,
1439};
1440
6ca308d4 1441static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1442{
6ca308d4 1443 struct snd_card *card = ice->card;
1da177e4
LT
1444 unsigned int idx;
1445 int err;
1446
1447 /* multi-channel mixer */
1448 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1449 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1450 if (err < 0)
1451 return err;
1452 }
1453
1454 if (ice->num_total_adcs > 0) {
6ca308d4 1455 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT
1456 tmp.count = ice->num_total_adcs;
1457 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1458 if (err < 0)
1459 return err;
1460 }
1461
1462 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1463 if (err < 0)
1464 return err;
1465
1466 if (ice->num_total_adcs > 0) {
6ca308d4 1467 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT
1468 tmp.count = ice->num_total_adcs;
1469 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1470 if (err < 0)
1471 return err;
1472 }
1473
1474 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1475 if (err < 0)
1476 return err;
1477
1478 /* initialize volumes */
1479 for (idx = 0; idx < 10; idx++) {
1480 ice->pro_volumes[idx] = 0x80008000; /* mute */
1481 snd_ice1712_update_volume(ice, idx);
1482 }
1483 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1484 ice->pro_volumes[idx] = 0x80008000; /* mute */
1485 snd_ice1712_update_volume(ice, idx);
1486 }
1487 for (idx = 18; idx < 20; idx++) {
1488 ice->pro_volumes[idx] = 0x80008000; /* mute */
1489 snd_ice1712_update_volume(ice, idx);
1490 }
1491 return 0;
1492}
1493
6ca308d4 1494static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1495{
6ca308d4 1496 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
1497 ice->ac97 = NULL;
1498}
1499
6ca308d4 1500static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT
1501{
1502 int err, bus_num = 0;
6ca308d4
TI
1503 struct snd_ac97_template ac97;
1504 struct snd_ac97_bus *pbus;
1505 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT
1506 .write = snd_ice1712_ac97_write,
1507 .read = snd_ice1712_ac97_read,
1508 };
6ca308d4 1509 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT
1510 .write = snd_ice1712_pro_ac97_write,
1511 .read = snd_ice1712_pro_ac97_read,
1512 };
1513
1514 if (ice_has_con_ac97(ice)) {
1515 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1516 return err;
1517 memset(&ac97, 0, sizeof(ac97));
1518 ac97.private_data = ice;
1519 ac97.private_free = snd_ice1712_mixer_free_ac97;
1520 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1521 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1522 else {
1523 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1524 return err;
1525 return 0;
1526 }
1527 }
1528
1529 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1530 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1531 return err;
1532 memset(&ac97, 0, sizeof(ac97));
1533 ac97.private_data = ice;
1534 ac97.private_free = snd_ice1712_mixer_free_ac97;
1535 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1536 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1537 else
1538 return 0;
1539 }
1540 /* I2S mixer only */
1541 strcat(ice->card->mixername, "ICE1712 - multitrack");
1542 return 0;
1543}
1544
1545/*
1546 *
1547 */
1548
6ca308d4 1549static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT
1550{
1551 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1552}
1553
6ca308d4
TI
1554static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1555 struct snd_info_buffer *buffer)
1da177e4 1556{
6ca308d4 1557 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT
1558 unsigned int idx;
1559
1560 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1561 snd_iprintf(buffer, "EEPROM:\n");
1562
1563 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1564 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1565 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1566 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1567 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1568 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1569 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1570 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1571 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1572 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1573 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1574 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1575 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1576 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1577 for (idx = 0; idx < 4; idx++)
1578 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1579 for (idx = 0; idx < 4; idx++)
1580 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1581 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1582 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1583
1584 snd_iprintf(buffer, "\nRegisters:\n");
1585 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1586 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1587 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1588 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39
JK
1589 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1590 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1591 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT
1592}
1593
6ca308d4 1594static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1da177e4 1595{
6ca308d4 1596 struct snd_info_entry *entry;
1da177e4
LT
1597
1598 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1599 snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
1600}
1601
1602/*
1603 *
1604 */
1605
6ca308d4
TI
1606static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1607 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1608{
1609 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1610 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT
1611 return 0;
1612}
1613
6ca308d4
TI
1614static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1615 struct snd_ctl_elem_value *ucontrol)
1da177e4 1616{
6ca308d4 1617 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1618
1619 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1620 return 0;
1621}
1622
6ca308d4 1623static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1da177e4
LT
1624 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1625 .name = "ICE1712 EEPROM",
1626 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1627 .info = snd_ice1712_eeprom_info,
1628 .get = snd_ice1712_eeprom_get
1629};
1630
1631/*
1632 */
6ca308d4
TI
1633static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1634 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1635{
1636 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1637 uinfo->count = 1;
1638 return 0;
1639}
1640
6ca308d4
TI
1641static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1da177e4 1643{
6ca308d4 1644 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1645 if (ice->spdif.ops.default_get)
1646 ice->spdif.ops.default_get(ice, ucontrol);
1647 return 0;
1648}
1649
6ca308d4
TI
1650static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1651 struct snd_ctl_elem_value *ucontrol)
1da177e4 1652{
6ca308d4 1653 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1654 if (ice->spdif.ops.default_put)
1655 return ice->spdif.ops.default_put(ice, ucontrol);
1656 return 0;
1657}
1658
6ca308d4 1659static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1da177e4
LT
1660{
1661 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1662 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1663 .info = snd_ice1712_spdif_info,
1664 .get = snd_ice1712_spdif_default_get,
1665 .put = snd_ice1712_spdif_default_put
1666};
1667
6ca308d4
TI
1668static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1669 struct snd_ctl_elem_value *ucontrol)
1da177e4 1670{
6ca308d4 1671 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1672 if (ice->spdif.ops.default_get) {
1673 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1674 IEC958_AES0_PROFESSIONAL |
1675 IEC958_AES0_CON_NOT_COPYRIGHT |
1676 IEC958_AES0_CON_EMPHASIS;
1677 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1678 IEC958_AES1_CON_CATEGORY;
1679 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1680 } else {
1681 ucontrol->value.iec958.status[0] = 0xff;
1682 ucontrol->value.iec958.status[1] = 0xff;
1683 ucontrol->value.iec958.status[2] = 0xff;
1684 ucontrol->value.iec958.status[3] = 0xff;
1685 ucontrol->value.iec958.status[4] = 0xff;
1686 }
1687 return 0;
1688}
1689
6ca308d4
TI
1690static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1691 struct snd_ctl_elem_value *ucontrol)
1da177e4 1692{
6ca308d4 1693 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1694 if (ice->spdif.ops.default_get) {
1695 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1696 IEC958_AES0_PROFESSIONAL |
1697 IEC958_AES0_PRO_FS |
1698 IEC958_AES0_PRO_EMPHASIS;
1699 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1700 } else {
1701 ucontrol->value.iec958.status[0] = 0xff;
1702 ucontrol->value.iec958.status[1] = 0xff;
1703 ucontrol->value.iec958.status[2] = 0xff;
1704 ucontrol->value.iec958.status[3] = 0xff;
1705 ucontrol->value.iec958.status[4] = 0xff;
1706 }
1707 return 0;
1708}
1709
6ca308d4 1710static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1da177e4
LT
1711{
1712 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1713 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1714 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1715 .info = snd_ice1712_spdif_info,
1716 .get = snd_ice1712_spdif_maskc_get,
1717};
1718
6ca308d4 1719static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1da177e4
LT
1720{
1721 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1722 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1723 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1724 .info = snd_ice1712_spdif_info,
1725 .get = snd_ice1712_spdif_maskp_get,
1726};
1727
6ca308d4
TI
1728static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1729 struct snd_ctl_elem_value *ucontrol)
1da177e4 1730{
6ca308d4 1731 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1732 if (ice->spdif.ops.stream_get)
1733 ice->spdif.ops.stream_get(ice, ucontrol);
1734 return 0;
1735}
1736
6ca308d4
TI
1737static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1738 struct snd_ctl_elem_value *ucontrol)
1da177e4 1739{
6ca308d4 1740 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1741 if (ice->spdif.ops.stream_put)
1742 return ice->spdif.ops.stream_put(ice, ucontrol);
1743 return 0;
1744}
1745
6ca308d4 1746static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1da177e4 1747{
6ca308d4
TI
1748 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1749 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4
LT
1750 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1751 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1752 .info = snd_ice1712_spdif_info,
1753 .get = snd_ice1712_spdif_stream_get,
1754 .put = snd_ice1712_spdif_stream_put
1755};
1756
6ca308d4
TI
1757int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
1758 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1759{
1760 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1761 uinfo->count = 1;
1762 uinfo->value.integer.min = 0;
1763 uinfo->value.integer.max = 1;
1764 return 0;
1765}
1766
6ca308d4
TI
1767int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1768 struct snd_ctl_elem_value *ucontrol)
1da177e4 1769{
6ca308d4 1770 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1771 unsigned char mask = kcontrol->private_value & 0xff;
1772 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1773
1774 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI
1775 ucontrol->value.integer.value[0] =
1776 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT
1777 snd_ice1712_restore_gpio_status(ice);
1778 return 0;
1779}
1780
6ca308d4
TI
1781int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1da177e4 1783{
6ca308d4 1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1785 unsigned char mask = kcontrol->private_value & 0xff;
1786 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1787 unsigned int val, nval;
1788
1789 if (kcontrol->private_value & (1 << 31))
1790 return -EPERM;
1791 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1792 snd_ice1712_save_gpio_status(ice);
1793 val = snd_ice1712_gpio_read(ice);
1794 nval |= val & ~mask;
1795 if (val != nval)
1796 snd_ice1712_gpio_write(ice, nval);
1797 snd_ice1712_restore_gpio_status(ice);
1798 return val != nval;
1799}
1800
1801/*
1802 * rate
1803 */
6ca308d4
TI
1804static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1806{
1807 static char *texts[] = {
1808 "8000", /* 0: 6 */
1809 "9600", /* 1: 3 */
1810 "11025", /* 2: 10 */
1811 "12000", /* 3: 2 */
1812 "16000", /* 4: 5 */
1813 "22050", /* 5: 9 */
1814 "24000", /* 6: 1 */
1815 "32000", /* 7: 4 */
1816 "44100", /* 8: 8 */
1817 "48000", /* 9: 0 */
1818 "64000", /* 10: 15 */
1819 "88200", /* 11: 11 */
1820 "96000", /* 12: 7 */
1821 "IEC958 Input", /* 13: -- */
1822 };
1823 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1824 uinfo->count = 1;
1825 uinfo->value.enumerated.items = 14;
1826 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1827 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1828 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1829 return 0;
1830}
1831
6ca308d4
TI
1832static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1833 struct snd_ctl_elem_value *ucontrol)
1da177e4 1834{
6ca308d4 1835 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1836 static unsigned char xlate[16] = {
1837 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1838 };
1839 unsigned char val;
1840
1841 spin_lock_irq(&ice->reg_lock);
1842 if (is_spdif_master(ice)) {
1843 ucontrol->value.enumerated.item[0] = 13;
1844 } else {
1845 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1846 if (val == 255) {
1847 snd_BUG();
1848 val = 0;
1849 }
1850 ucontrol->value.enumerated.item[0] = val;
1851 }
1852 spin_unlock_irq(&ice->reg_lock);
1853 return 0;
1854}
1855
6ca308d4
TI
1856static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1da177e4 1858{
6ca308d4 1859 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1860 static unsigned int xrate[13] = {
1861 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1862 32000, 44100, 48000, 64000, 88200, 96000
1863 };
1864 unsigned char oval;
1865 int change = 0;
1866
1867 spin_lock_irq(&ice->reg_lock);
1868 oval = inb(ICEMT(ice, RATE));
1869 if (ucontrol->value.enumerated.item[0] == 13) {
1870 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1871 } else {
1872 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1873 spin_unlock_irq(&ice->reg_lock);
1874 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1875 spin_lock_irq(&ice->reg_lock);
1876 }
1877 change = inb(ICEMT(ice, RATE)) != oval;
1878 spin_unlock_irq(&ice->reg_lock);
1879
6ca308d4 1880 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1
JK
1881 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1882 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT
1883
1884 return change;
1885}
1886
6ca308d4 1887static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1da177e4
LT
1888 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1889 .name = "Multi Track Internal Clock",
1890 .info = snd_ice1712_pro_internal_clock_info,
1891 .get = snd_ice1712_pro_internal_clock_get,
1892 .put = snd_ice1712_pro_internal_clock_put
1893};
1894
6ca308d4
TI
1895static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1896 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1897{
1898 static char *texts[] = {
1899 "8000", /* 0: 6 */
1900 "9600", /* 1: 3 */
1901 "11025", /* 2: 10 */
1902 "12000", /* 3: 2 */
1903 "16000", /* 4: 5 */
1904 "22050", /* 5: 9 */
1905 "24000", /* 6: 1 */
1906 "32000", /* 7: 4 */
1907 "44100", /* 8: 8 */
1908 "48000", /* 9: 0 */
1909 "64000", /* 10: 15 */
1910 "88200", /* 11: 11 */
1911 "96000", /* 12: 7 */
1912 // "IEC958 Input", /* 13: -- */
1913 };
1914 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1915 uinfo->count = 1;
1916 uinfo->value.enumerated.items = 13;
1917 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1918 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1919 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1920 return 0;
1921}
1922
6ca308d4
TI
1923static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1924 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1925{
1926 int val;
1927 static unsigned int xrate[13] = {
1928 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1929 32000, 44100, 48000, 64000, 88200, 96000
1930 };
1931
1932 for (val = 0; val < 13; val++) {
1933 if (xrate[val] == PRO_RATE_DEFAULT)
1934 break;
1935 }
1936
1937 ucontrol->value.enumerated.item[0] = val;
1938 return 0;
1939}
1940
6ca308d4
TI
1941static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1942 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1943{
1944 static unsigned int xrate[13] = {
1945 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1946 32000, 44100, 48000, 64000, 88200, 96000
1947 };
1948 unsigned char oval;
1949 int change = 0;
1950
1951 oval = PRO_RATE_DEFAULT;
1952 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1953 change = PRO_RATE_DEFAULT != oval;
1954
1955 return change;
1956}
1957
6ca308d4 1958static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1da177e4
LT
1959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1960 .name = "Multi Track Internal Clock Default",
1961 .info = snd_ice1712_pro_internal_clock_default_info,
1962 .get = snd_ice1712_pro_internal_clock_default_get,
1963 .put = snd_ice1712_pro_internal_clock_default_put
1964};
1965
6ca308d4
TI
1966static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1968{
1969 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1970 uinfo->count = 1;
1971 uinfo->value.integer.min = 0;
1972 uinfo->value.integer.max = 1;
1973 return 0;
1974}
1975
6ca308d4
TI
1976static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1977 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1978{
1979 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1980 return 0;
1981}
1982
6ca308d4
TI
1983static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1984 struct snd_ctl_elem_value *ucontrol)
1da177e4 1985{
6ca308d4 1986 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1987 int change = 0, nval;
1988
1989 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1990 spin_lock_irq(&ice->reg_lock);
1991 change = PRO_RATE_LOCKED != nval;
1992 PRO_RATE_LOCKED = nval;
1993 spin_unlock_irq(&ice->reg_lock);
1994 return change;
1995}
1996
6ca308d4 1997static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1da177e4
LT
1998 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1999 .name = "Multi Track Rate Locking",
2000 .info = snd_ice1712_pro_rate_locking_info,
2001 .get = snd_ice1712_pro_rate_locking_get,
2002 .put = snd_ice1712_pro_rate_locking_put
2003};
2004
6ca308d4
TI
2005static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
2006 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2007{
2008 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2009 uinfo->count = 1;
2010 uinfo->value.integer.min = 0;
2011 uinfo->value.integer.max = 1;
2012 return 0;
2013}
2014
6ca308d4
TI
2015static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2016 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
2017{
2018 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2019 return 0;
2020}
2021
6ca308d4
TI
2022static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2023 struct snd_ctl_elem_value *ucontrol)
1da177e4 2024{
6ca308d4 2025 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2026 int change = 0, nval;
2027
2028 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2029 spin_lock_irq(&ice->reg_lock);
2030 change = PRO_RATE_RESET != nval;
2031 PRO_RATE_RESET = nval;
2032 spin_unlock_irq(&ice->reg_lock);
2033 return change;
2034}
2035
6ca308d4 2036static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
1da177e4
LT
2037 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2038 .name = "Multi Track Rate Reset",
2039 .info = snd_ice1712_pro_rate_reset_info,
2040 .get = snd_ice1712_pro_rate_reset_get,
2041 .put = snd_ice1712_pro_rate_reset_put
2042};
2043
2044/*
2045 * routing
2046 */
6ca308d4
TI
2047static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2048 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2049{
2050 static char *texts[] = {
2051 "PCM Out", /* 0 */
2052 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2053 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2054 "IEC958 In L", "IEC958 In R", /* 9-10 */
2055 "Digital Mixer", /* 11 - optional */
2056 };
2057
2058 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2059 uinfo->count = 1;
6ca308d4
TI
2060 uinfo->value.enumerated.items =
2061 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT
2062 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2063 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2064 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2065 return 0;
2066}
2067
6ca308d4
TI
2068static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2069 struct snd_ctl_elem_value *ucontrol)
1da177e4 2070{
6ca308d4 2071 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2072 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2073 unsigned int val, cval;
2074
2075 spin_lock_irq(&ice->reg_lock);
2076 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2077 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2078 spin_unlock_irq(&ice->reg_lock);
2079
2080 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2081 val &= 3;
2082 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2083 if (val == 1 && idx < 2)
2084 ucontrol->value.enumerated.item[0] = 11;
2085 else if (val == 2)
2086 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2087 else if (val == 3)
2088 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2089 else
2090 ucontrol->value.enumerated.item[0] = 0;
2091 return 0;
2092}
2093
6ca308d4
TI
2094static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2095 struct snd_ctl_elem_value *ucontrol)
1da177e4 2096{
6ca308d4 2097 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2098 int change, shift;
2099 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2100 unsigned int val, old_val, nval;
2101
2102 /* update PSDOUT */
2103 if (ucontrol->value.enumerated.item[0] >= 11)
2104 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2105 else if (ucontrol->value.enumerated.item[0] >= 9)
2106 nval = 3; /* spdif in */
2107 else if (ucontrol->value.enumerated.item[0] >= 1)
2108 nval = 2; /* analog in */
2109 else
2110 nval = 0; /* pcm */
2111 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2112 spin_lock_irq(&ice->reg_lock);
2113 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2114 val &= ~(0x03 << shift);
2115 val |= nval << shift;
2116 change = val != old_val;
2117 if (change)
2118 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2119 spin_unlock_irq(&ice->reg_lock);
2120 if (nval < 2) /* dig mixer of pcm */
2121 return change;
2122
2123 /* update CAPTURE */
2124 spin_lock_irq(&ice->reg_lock);
2125 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2126 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2127 if (nval == 2) { /* analog in */
2128 nval = ucontrol->value.enumerated.item[0] - 1;
2129 val &= ~(0x07 << shift);
2130 val |= nval << shift;
2131 } else { /* spdif in */
2132 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2133 val &= ~(0x08 << shift);
2134 val |= nval << shift;
2135 }
2136 if (val != old_val) {
2137 change = 1;
2138 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2139 }
2140 spin_unlock_irq(&ice->reg_lock);
2141 return change;
2142}
2143
6ca308d4
TI
2144static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2145 struct snd_ctl_elem_value *ucontrol)
1da177e4 2146{
6ca308d4 2147 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2148 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2149 unsigned int val, cval;
2150 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2151 cval = (val >> (idx * 4 + 8)) & 0x0f;
2152 val = (val >> (idx * 2)) & 0x03;
2153 if (val == 1)
2154 ucontrol->value.enumerated.item[0] = 11;
2155 else if (val == 2)
2156 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2157 else if (val == 3)
2158 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2159 else
2160 ucontrol->value.enumerated.item[0] = 0;
2161 return 0;
2162}
2163
6ca308d4
TI
2164static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2165 struct snd_ctl_elem_value *ucontrol)
1da177e4 2166{
6ca308d4 2167 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2168 int change, shift;
2169 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2170 unsigned int val, old_val, nval;
2171
2172 /* update SPDOUT */
2173 spin_lock_irq(&ice->reg_lock);
2174 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2175 if (ucontrol->value.enumerated.item[0] >= 11)
2176 nval = 1;
2177 else if (ucontrol->value.enumerated.item[0] >= 9)
2178 nval = 3;
2179 else if (ucontrol->value.enumerated.item[0] >= 1)
2180 nval = 2;
2181 else
2182 nval = 0;
2183 shift = idx * 2;
2184 val &= ~(0x03 << shift);
2185 val |= nval << shift;
2186 shift = idx * 4 + 8;
2187 if (nval == 2) {
2188 nval = ucontrol->value.enumerated.item[0] - 1;
2189 val &= ~(0x07 << shift);
2190 val |= nval << shift;
2191 } else if (nval == 3) {
2192 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2193 val &= ~(0x08 << shift);
2194 val |= nval << shift;
2195 }
2196 change = val != old_val;
2197 if (change)
2198 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2199 spin_unlock_irq(&ice->reg_lock);
2200 return change;
2201}
2202
6ca308d4 2203static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
1da177e4
LT
2204 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2205 .name = "H/W Playback Route",
2206 .info = snd_ice1712_pro_route_info,
2207 .get = snd_ice1712_pro_route_analog_get,
2208 .put = snd_ice1712_pro_route_analog_put,
2209};
2210
6ca308d4 2211static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
1da177e4 2212 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 2213 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1da177e4
LT
2214 .info = snd_ice1712_pro_route_info,
2215 .get = snd_ice1712_pro_route_spdif_get,
2216 .put = snd_ice1712_pro_route_spdif_put,
2217 .count = 2,
2218};
2219
2220
6ca308d4
TI
2221static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2222 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2223{
2224 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2225 uinfo->count = 1;
2226 uinfo->value.integer.min = 0;
2227 uinfo->value.integer.max = 255;
2228 return 0;
2229}
2230
6ca308d4
TI
2231static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2232 struct snd_ctl_elem_value *ucontrol)
1da177e4 2233{
6ca308d4 2234 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2235
2236 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2237 return 0;
2238}
2239
6ca308d4
TI
2240static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2241 struct snd_ctl_elem_value *ucontrol)
1da177e4 2242{
6ca308d4 2243 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2244 int change;
2245
2246 spin_lock_irq(&ice->reg_lock);
2247 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2248 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2249 spin_unlock_irq(&ice->reg_lock);
2250 return change;
2251}
2252
6ca308d4 2253static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
1da177e4
LT
2254 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2255 .name = "Multi Track Volume Rate",
2256 .info = snd_ice1712_pro_volume_rate_info,
2257 .get = snd_ice1712_pro_volume_rate_get,
2258 .put = snd_ice1712_pro_volume_rate_put
2259};
2260
6ca308d4
TI
2261static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2262 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2263{
2264 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2265 uinfo->count = 22;
2266 uinfo->value.integer.min = 0;
2267 uinfo->value.integer.max = 255;
2268 return 0;
2269}
2270
6ca308d4
TI
2271static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2272 struct snd_ctl_elem_value *ucontrol)
1da177e4 2273{
6ca308d4 2274 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2275 int idx;
2276
2277 spin_lock_irq(&ice->reg_lock);
2278 for (idx = 0; idx < 22; idx++) {
2279 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2280 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2281 }
2282 spin_unlock_irq(&ice->reg_lock);
2283 return 0;
2284}
2285
6ca308d4 2286static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
1da177e4
LT
2287 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2288 .name = "Multi Track Peak",
2289 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2290 .info = snd_ice1712_pro_peak_info,
2291 .get = snd_ice1712_pro_peak_get
2292};
2293
2294/*
2295 *
2296 */
2297
2298/*
2299 * list of available boards
2300 */
2301static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2302 snd_ice1712_hoontech_cards,
2303 snd_ice1712_delta_cards,
2304 snd_ice1712_ews_cards,
2305 NULL,
2306};
2307
6ca308d4 2308static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
1da177e4
LT
2309 unsigned char dev,
2310 unsigned char addr)
2311{
2312 long t = 0x10000;
2313
2314 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2315 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2316 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2317 return inb(ICEREG(ice, I2C_DATA));
2318}
2319
6ca308d4
TI
2320static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2321 const char *modelname)
1da177e4
LT
2322{
2323 int dev = 0xa0; /* EEPROM device address */
2324 unsigned int i, size;
2325 struct snd_ice1712_card_info **tbl, *c;
2326
2327 if (! modelname || ! *modelname) {
2328 ice->eeprom.subvendor = 0;
2329 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2330 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2331 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2332 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2333 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI
2334 if (ice->eeprom.subvendor == 0 ||
2335 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT
2336 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2337 u16 vendor, device;
2338 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2339 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2340 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2341 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2342 printk(KERN_ERR "ice1712: No valid ID is found\n");
2343 return -ENXIO;
2344 }
2345 }
2346 }
2347 for (tbl = card_tables; *tbl; tbl++) {
2348 for (c = *tbl; c->subvendor; c++) {
2349 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2350 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2351 ice->eeprom.subvendor = c->subvendor;
2352 } else if (c->subvendor != ice->eeprom.subvendor)
2353 continue;
2354 if (! c->eeprom_size || ! c->eeprom_data)
2355 goto found;
2356 /* if the EEPROM is given by the driver, use it */
2357 snd_printdd("using the defined eeprom..\n");
2358 ice->eeprom.version = 1;
2359 ice->eeprom.size = c->eeprom_size + 6;
2360 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2361 goto read_skipped;
2362 }
2363 }
6ca308d4
TI
2364 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2365 ice->eeprom.subvendor);
1da177e4
LT
2366
2367 found:
2368 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2369 if (ice->eeprom.size < 6)
2370 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2371 else if (ice->eeprom.size > 32) {
99b359ba 2372 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT
2373 return -EIO;
2374 }
2375 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2376 if (ice->eeprom.version != 1) {
6ca308d4
TI
2377 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2378 ice->eeprom.version);
1da177e4
LT
2379 /* return -EIO; */
2380 }
2381 size = ice->eeprom.size - 6;
2382 for (i = 0; i < size; i++)
2383 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2384
2385 read_skipped:
2386 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2387 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2388 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2389
2390 return 0;
2391}
2392
2393
2394
6ca308d4 2395static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT
2396{
2397 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2398 udelay(200);
2399 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2400 udelay(200);
531af462
AH
2401 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) {
2402 /* Limit active ADCs and DACs to 6; */
2403 /* Note: DXR extension not supported */
6285ae1d 2404 pci_write_config_byte(ice->pci, 0x60, 0x2a);
531af462
AH
2405 } else {
2406 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2407 }
1da177e4
LT
2408 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2409 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2410 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2411 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2412 ice->gpio.write_mask = ice->eeprom.gpiomask;
2413 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI
2414 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2415 ice->eeprom.gpiomask);
2416 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2417 ice->eeprom.gpiodir);
2418 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2419 ice->eeprom.gpiostate);
1da177e4
LT
2420 } else {
2421 ice->gpio.write_mask = 0xc0;
2422 ice->gpio.direction = 0xff;
2423 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI
2425 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2426 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT
2427 }
2428 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2429 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2430 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2431 udelay(100);
2432 outb(0, ICEREG(ice, AC97_CMD));
2433 udelay(200);
2434 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2435 }
2436 snd_ice1712_set_pro_rate(ice, 48000, 1);
2437
2438 return 0;
2439}
2440
6ca308d4 2441int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2442{
2443 int err;
6ca308d4 2444 struct snd_kcontrol *kctl;
1da177e4
LT
2445
2446 snd_assert(ice->pcm_pro != NULL, return -EIO);
2447 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2448 if (err < 0)
2449 return err;
2450 kctl->id.device = ice->pcm_pro->device;
2451 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2452 if (err < 0)
2453 return err;
2454 kctl->id.device = ice->pcm_pro->device;
2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2456 if (err < 0)
2457 return err;
2458 kctl->id.device = ice->pcm_pro->device;
2459 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2460 if (err < 0)
2461 return err;
2462 kctl->id.device = ice->pcm_pro->device;
2463 ice->spdif.stream_ctl = kctl;
2464 return 0;
2465}
2466
2467
6ca308d4 2468static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2469{
2470 int err;
2471
2472 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2473 if (err < 0)
2474 return err;
2475 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2476 if (err < 0)
2477 return err;
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2479 if (err < 0)
2480 return err;
2481
2482 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2483 if (err < 0)
2484 return err;
2485 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2486 if (err < 0)
2487 return err;
2488
2489 if (ice->num_total_dacs > 0) {
6ca308d4 2490 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT
2491 tmp.count = ice->num_total_dacs;
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2493 if (err < 0)
2494 return err;
2495 }
2496
2497 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2498 if (err < 0)
2499 return err;
2500
2501 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2502 if (err < 0)
2503 return err;
2504 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2505 if (err < 0)
2506 return err;
2507
2508 return 0;
2509}
2510
6ca308d4 2511static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4
LT
2512{
2513 if (! ice->port)
2514 goto __hw_end;
2515 /* mask all interrupts */
2516 outb(0xc0, ICEMT(ice, IRQ));
2517 outb(0xff, ICEREG(ice, IRQMASK));
2518 /* --- */
2519 __hw_end:
2520 if (ice->irq >= 0) {
2521 synchronize_irq(ice->irq);
6ca308d4 2522 free_irq(ice->irq, ice);
1da177e4
LT
2523 }
2524 if (ice->port)
2525 pci_release_regions(ice->pci);
2526 snd_ice1712_akm4xxx_free(ice);
2527 pci_disable_device(ice->pci);
2528 kfree(ice);
2529 return 0;
2530}
2531
6ca308d4 2532static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2533{
6ca308d4 2534 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT
2535 return snd_ice1712_free(ice);
2536}
2537
6ca308d4 2538static int __devinit snd_ice1712_create(struct snd_card *card,
1da177e4
LT
2539 struct pci_dev *pci,
2540 const char *modelname,
2541 int omni,
2542 int cs8427_timeout,
531af462 2543 int dxr_enable,
6ca308d4 2544 struct snd_ice1712 ** r_ice1712)
1da177e4 2545{
6ca308d4 2546 struct snd_ice1712 *ice;
1da177e4 2547 int err;
6ca308d4 2548 static struct snd_device_ops ops = {
1da177e4
LT
2549 .dev_free = snd_ice1712_dev_free,
2550 };
2551
2552 *r_ice1712 = NULL;
2553
2554 /* enable PCI device */
2555 if ((err = pci_enable_device(pci)) < 0)
2556 return err;
2557 /* check, if we can restrict PCI DMA transfers to 28 bits */
9d2f928d
TK
2558 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
2559 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
99b359ba 2560 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT
2561 pci_disable_device(pci);
2562 return -ENXIO;
2563 }
2564
e560d8d8 2565 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT
2566 if (ice == NULL) {
2567 pci_disable_device(pci);
2568 return -ENOMEM;
2569 }
2570 ice->omni = omni ? 1 : 0;
2571 if (cs8427_timeout < 1)
2572 cs8427_timeout = 1;
2573 else if (cs8427_timeout > 1000)
2574 cs8427_timeout = 1000;
2575 ice->cs8427_timeout = cs8427_timeout;
531af462 2576 ice->dxr_enable = dxr_enable;
1da177e4 2577 spin_lock_init(&ice->reg_lock);
62932df8
IM
2578 mutex_init(&ice->gpio_mutex);
2579 mutex_init(&ice->i2c_mutex);
2580 mutex_init(&ice->open_mutex);
1da177e4
LT
2581 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2582 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2583 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2584 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2585
2586 ice->spdif.cs8403_bits =
2587 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2588 0x10 | /* no emphasis */
2589 0x20); /* PCM encoder/decoder */
2590 ice->card = card;
2591 ice->pci = pci;
2592 ice->irq = -1;
2593 pci_set_master(pci);
2594 pci_write_config_word(ice->pci, 0x40, 0x807f);
2595 pci_write_config_word(ice->pci, 0x42, 0x0006);
2596 snd_ice1712_proc_init(ice);
2597 synchronize_irq(pci->irq);
2598
2599 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2600 kfree(ice);
2601 pci_disable_device(pci);
2602 return err;
2603 }
2604 ice->port = pci_resource_start(pci, 0);
2605 ice->ddma_port = pci_resource_start(pci, 1);
2606 ice->dmapath_port = pci_resource_start(pci, 2);
2607 ice->profi_port = pci_resource_start(pci, 3);
2608
6ca308d4
TI
2609 if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
2610 "ICE1712", ice)) {
99b359ba 2611 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2612 snd_ice1712_free(ice);
2613 return -EIO;
2614 }
2615
2616 ice->irq = pci->irq;
2617
2618 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2619 snd_ice1712_free(ice);
2620 return -EIO;
2621 }
2622 if (snd_ice1712_chip_init(ice) < 0) {
2623 snd_ice1712_free(ice);
2624 return -EIO;
2625 }
2626
2627 /* unmask used interrupts */
6ca308d4
TI
2628 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2629 ICE1712_IRQ_MPU2 : 0) |
2630 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2631 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
1da177e4
LT
2632 ICEREG(ice, IRQMASK));
2633 outb(0x00, ICEMT(ice, IRQ));
2634
2635 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2636 snd_ice1712_free(ice);
2637 return err;
2638 }
2639
2640 snd_card_set_dev(card, &pci->dev);
2641
2642 *r_ice1712 = ice;
2643 return 0;
2644}
2645
2646
2647/*
2648 *
2649 * Registration
2650 *
2651 */
2652
2653static struct snd_ice1712_card_info no_matched __devinitdata;
2654
2655static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2656 const struct pci_device_id *pci_id)
2657{
2658 static int dev;
6ca308d4
TI
2659 struct snd_card *card;
2660 struct snd_ice1712 *ice;
1da177e4
LT
2661 int pcm_dev = 0, err;
2662 struct snd_ice1712_card_info **tbl, *c;
2663
2664 if (dev >= SNDRV_CARDS)
2665 return -ENODEV;
2666 if (!enable[dev]) {
2667 dev++;
2668 return -ENOENT;
2669 }
2670
2671 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2672 if (card == NULL)
2673 return -ENOMEM;
2674
2675 strcpy(card->driver, "ICE1712");
2676 strcpy(card->shortname, "ICEnsemble ICE1712");
2677
6ca308d4 2678 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
531af462
AH
2679 cs8427_timeout[dev], dxr_enable[dev],
2680 &ice)) < 0) {
1da177e4
LT
2681 snd_card_free(card);
2682 return err;
2683 }
2684
2685 for (tbl = card_tables; *tbl; tbl++) {
2686 for (c = *tbl; c->subvendor; c++) {
2687 if (c->subvendor == ice->eeprom.subvendor) {
2688 strcpy(card->shortname, c->name);
2689 if (c->driver) /* specific driver? */
2690 strcpy(card->driver, c->driver);
2691 if (c->chip_init) {
2692 if ((err = c->chip_init(ice)) < 0) {
2693 snd_card_free(card);
2694 return err;
2695 }
2696 }
2697 goto __found;
2698 }
2699 }
2700 }
2701 c = &no_matched;
2702 __found:
2703
2704 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2705 snd_card_free(card);
2706 return err;
2707 }
2708
2709 if (ice_has_con_ac97(ice))
2710 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2711 snd_card_free(card);
2712 return err;
2713 }
2714
2715 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2716 snd_card_free(card);
2717 return err;
2718 }
2719
2720 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2721 snd_card_free(card);
2722 return err;
2723 }
2724
2725 if (c->build_controls) {
2726 if ((err = c->build_controls(ice)) < 0) {
2727 snd_card_free(card);
2728 return err;
2729 }
2730 }
2731
2732 if (ice_has_con_ac97(ice))
2733 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2734 snd_card_free(card);
2735 return err;
2736 }
2737
2738 if (! c->no_mpu401) {
2739 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2740 ICEREG(ice, MPU1_CTRL), 1,
2741 ice->irq, 0,
2742 &ice->rmidi[0])) < 0) {
2743 snd_card_free(card);
2744 return err;
2745 }
2746
2747 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
2748 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2749 ICEREG(ice, MPU2_CTRL), 1,
2750 ice->irq, 0,
2751 &ice->rmidi[1])) < 0) {
2752 snd_card_free(card);
2753 return err;
2754 }
2755 }
2756
e957ebf1
JK
2757 snd_ice1712_set_input_clock_source(ice, 0);
2758
1da177e4
LT
2759 sprintf(card->longname, "%s at 0x%lx, irq %i",
2760 card->shortname, ice->port, ice->irq);
2761
2762 if ((err = snd_card_register(card)) < 0) {
2763 snd_card_free(card);
2764 return err;
2765 }
2766 pci_set_drvdata(pci, card);
2767 dev++;
2768 return 0;
2769}
2770
2771static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2772{
2773 snd_card_free(pci_get_drvdata(pci));
2774 pci_set_drvdata(pci, NULL);
2775}
2776
2777static struct pci_driver driver = {
2778 .name = "ICE1712",
2779 .id_table = snd_ice1712_ids,
2780 .probe = snd_ice1712_probe,
2781 .remove = __devexit_p(snd_ice1712_remove),
2782};
2783
2784static int __init alsa_card_ice1712_init(void)
2785{
01d25d46 2786 return pci_register_driver(&driver);
1da177e4
LT
2787}
2788
2789static void __exit alsa_card_ice1712_exit(void)
2790{
2791 pci_unregister_driver(&driver);
2792}
2793
2794module_init(alsa_card_ice1712_init)
2795module_exit(alsa_card_ice1712_exit)
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