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[PATCH] Replace 0xff.. with correct DMA_xBIT_MASK
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50#include <sound/driver.h>
51#include <asm/io.h>
52#include <linux/delay.h>
53#include <linux/interrupt.h>
54#include <linux/init.h>
55#include <linux/pci.h>
9d2f928d 56#include <linux/dma-mapping.h>
1da177e4
LT		 57#include <linux/slab.h>
58#include <linux/moduleparam.h>
910638ae 59#include <linux/dma-mapping.h>
62932df8 60#include <linux/mutex.h>
910638ae 61
1da177e4
LT		 62#include <sound/core.h>
63#include <sound/cs8427.h>
64#include <sound/info.h>
65#include <sound/mpu401.h>
66#include <sound/initval.h>
67
68#include <sound/asoundef.h>
69
70#include "ice1712.h"
71
72/* lowlevel routines */
73#include "delta.h"
74#include "ews.h"
75#include "hoontech.h"
76
77MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
78MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
79MODULE_LICENSE("GPL");
80MODULE_SUPPORTED_DEVICE("{"
81 HOONTECH_DEVICE_DESC
82 DELTA_DEVICE_DESC
83 EWS_DEVICE_DESC
84 "{ICEnsemble,Generic ICE1712},"
85 "{ICEnsemble,Generic Envy24}}");
86
87static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
88static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
01a00e5e 89static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
1da177e4 90static char *model[SNDRV_CARDS];
01a00e5e 91static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
1da177e4 92static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
01a00e5e 93static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
1da177e4
LT		 94
95module_param_array(index, int, NULL, 0444);
96MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
97module_param_array(id, charp, NULL, 0444);
98MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
99module_param_array(enable, bool, NULL, 0444);
100MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
101module_param_array(omni, bool, NULL, 0444);
102MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
103module_param_array(cs8427_timeout, int, NULL, 0444);
104MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
105module_param_array(model, charp, NULL, 0444);
106MODULE_PARM_DESC(model, "Use the given board model.");
531af462 107module_param_array(dxr_enable, int, NULL, 0444);
01a00e5e 108MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 109
1da177e4
LT		 110
111static struct pci_device_id snd_ice1712_ids[] = {
112 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
113 { 0, }
114};
115
116MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
117
6ca308d4
TI		 118static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
119static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT		 120
121static int PRO_RATE_LOCKED;
122static int PRO_RATE_RESET = 1;
123static unsigned int PRO_RATE_DEFAULT = 44100;
124
125/*
126 * Basic I/O
127 */
128
129/* check whether the clock mode is spdif-in */
6ca308d4 130static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 131{
132 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
133}
134
6ca308d4 135static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 136{
137 return is_spdif_master(ice) || PRO_RATE_LOCKED;
138}
139
6ca308d4 140static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
1da177e4
LT		 141{
142 outb((channel << 4) | addr, ICEDS(ice, INDEX));
143 outl(data, ICEDS(ice, DATA));
144}
145
6ca308d4 146static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
1da177e4
LT		 147{
148 outb((channel << 4) | addr, ICEDS(ice, INDEX));
149 return inl(ICEDS(ice, DATA));
150}
151
6ca308d4 152static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 153 unsigned short reg,
154 unsigned short val)
155{
6ca308d4 156 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 157 int tm;
158 unsigned char old_cmd = 0;
159
160 for (tm = 0; tm < 0x10000; tm++) {
161 old_cmd = inb(ICEREG(ice, AC97_CMD));
162 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
163 continue;
164 if (!(old_cmd & ICE1712_AC97_READY))
165 continue;
166 break;
167 }
168 outb(reg, ICEREG(ice, AC97_INDEX));
169 outw(val, ICEREG(ice, AC97_DATA));
170 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
171 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
172 for (tm = 0; tm < 0x10000; tm++)
173 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
174 break;
175}
176
6ca308d4 177static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 178 unsigned short reg)
179{
6ca308d4 180 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 181 int tm;
182 unsigned char old_cmd = 0;
183
184 for (tm = 0; tm < 0x10000; tm++) {
185 old_cmd = inb(ICEREG(ice, AC97_CMD));
186 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
187 continue;
188 if (!(old_cmd & ICE1712_AC97_READY))
189 continue;
190 break;
191 }
192 outb(reg, ICEREG(ice, AC97_INDEX));
193 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
194 for (tm = 0; tm < 0x10000; tm++)
195 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
196 break;
197 if (tm >= 0x10000) /* timeout */
198 return ~0;
199 return inw(ICEREG(ice, AC97_DATA));
200}
201
202/*
203 * pro ac97 section
204 */
205
6ca308d4 206static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 207 unsigned short reg,
208 unsigned short val)
209{
6ca308d4 210 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 211 int tm;
212 unsigned char old_cmd = 0;
213
214 for (tm = 0; tm < 0x10000; tm++) {
215 old_cmd = inb(ICEMT(ice, AC97_CMD));
216 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
217 continue;
218 if (!(old_cmd & ICE1712_AC97_READY))
219 continue;
220 break;
221 }
222 outb(reg, ICEMT(ice, AC97_INDEX));
223 outw(val, ICEMT(ice, AC97_DATA));
224 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
225 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
226 for (tm = 0; tm < 0x10000; tm++)
227 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
228 break;
229}
230
231
6ca308d4 232static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 233 unsigned short reg)
234{
6ca308d4 235 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 236 int tm;
237 unsigned char old_cmd = 0;
238
239 for (tm = 0; tm < 0x10000; tm++) {
240 old_cmd = inb(ICEMT(ice, AC97_CMD));
241 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
242 continue;
243 if (!(old_cmd & ICE1712_AC97_READY))
244 continue;
245 break;
246 }
247 outb(reg, ICEMT(ice, AC97_INDEX));
248 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
249 for (tm = 0; tm < 0x10000; tm++)
250 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
251 break;
252 if (tm >= 0x10000) /* timeout */
253 return ~0;
254 return inw(ICEMT(ice, AC97_DATA));
255}
256
257/*
258 * consumer ac97 digital mix
259 */
6ca308d4 260static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 261{
262 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
263 uinfo->count = 1;
264 uinfo->value.integer.min = 0;
265 uinfo->value.integer.max = 1;
266 return 0;
267}
268
6ca308d4 269static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 270{
6ca308d4 271 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 272
273 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
274 return 0;
275}
276
6ca308d4 277static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 278{
6ca308d4 279 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 280 unsigned char val, nval;
281
282 spin_lock_irq(&ice->reg_lock);
283 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
284 nval = val & ~ICE1712_ROUTE_AC97;
285 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
286 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
287 spin_unlock_irq(&ice->reg_lock);
288 return val != nval;
289}
290
6ca308d4 291static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
1da177e4
LT		 292 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
293 .name = "Digital Mixer To AC97",
294 .info = snd_ice1712_digmix_route_ac97_info,
295 .get = snd_ice1712_digmix_route_ac97_get,
296 .put = snd_ice1712_digmix_route_ac97_put,
297};
298
299
300/*
301 * gpio operations
302 */
6ca308d4 303static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 304{
305 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
306 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
307}
308
6ca308d4 309static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 310{
311 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
312 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
313}
314
6ca308d4 315static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 316{
317 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
318}
319
6ca308d4 320static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 321{
322 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
323 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
324}
325
1da177e4
LT		 326/*
327 *
328 * CS8427 interface
329 *
330 */
331
332/*
333 * change the input clock selection
334 * spdif_clock = 1 - IEC958 input, 0 - Envy24
335 */
6ca308d4 336static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT		 337{
338 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
339 unsigned char val, nval;
340 int res = 0;
341
342 snd_i2c_lock(ice->i2c);
343 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
344 snd_i2c_unlock(ice->i2c);
345 return -EIO;
346 }
347 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
348 snd_i2c_unlock(ice->i2c);
349 return -EIO;
350 }
351 nval = val & 0xf0;
352 if (spdif_clock)
353 nval |= 0x01;
354 else
355 nval |= 0x04;
356 if (val != nval) {
357 reg[1] = nval;
358 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
359 res = -EIO;
360 } else {
361 res++;
362 }
363 }
364 snd_i2c_unlock(ice->i2c);
365 return res;
366}
367
368/*
369 * spdif callbacks
370 */
6ca308d4 371static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 372{
373 snd_cs8427_iec958_active(ice->cs8427, 1);
374}
375
6ca308d4 376static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 377{
378 snd_cs8427_iec958_active(ice->cs8427, 0);
379}
380
6ca308d4 381static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT		 382{
383 snd_cs8427_iec958_pcm(ice->cs8427, rate);
384}
385
386/*
387 * create and initialize callbacks for cs8427 interface
388 */
6ca308d4 389int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT		 390{
391 int err;
392
393 if ((err = snd_cs8427_create(ice->i2c, addr,
394 (ice->cs8427_timeout * HZ) / 1000,
395 &ice->cs8427)) < 0) {
99b359ba 396 snd_printk(KERN_ERR "CS8427 initialization failed\n");
1da177e4
LT		 397 return err;
398 }
399 ice->spdif.ops.open = open_cs8427;
400 ice->spdif.ops.close = close_cs8427;
401 ice->spdif.ops.setup_rate = setup_cs8427;
402 return 0;
403}
404
e957ebf1
JK		 405static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
406{
407 /* change CS8427 clock source too */
408 if (ice->cs8427)
409 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
410 /* notify ak4524 chip as well */
411 if (spdif_is_master) {
412 unsigned int i;
413 for (i = 0; i < ice->akm_codecs; i++) {
414 if (ice->akm[i].ops.set_rate_val)
415 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
416 }
417 }
418}
1da177e4
LT		 419
420/*
421 * Interrupt handler
422 */
423
424static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
425{
6ca308d4 426 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 427 unsigned char status;
428 int handled = 0;
429
430 while (1) {
431 status = inb(ICEREG(ice, IRQSTAT));
432 if (status == 0)
433 break;
434 handled = 1;
435 if (status & ICE1712_IRQ_MPU1) {
436 if (ice->rmidi[0])
437 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
438 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
439 status &= ~ICE1712_IRQ_MPU1;
440 }
441 if (status & ICE1712_IRQ_TIMER)
442 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
443 if (status & ICE1712_IRQ_MPU2) {
444 if (ice->rmidi[1])
445 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
446 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
447 status &= ~ICE1712_IRQ_MPU2;
448 }
449 if (status & ICE1712_IRQ_PROPCM) {
450 unsigned char mtstat = inb(ICEMT(ice, IRQ));
451 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
452 if (ice->playback_pro_substream)
453 snd_pcm_period_elapsed(ice->playback_pro_substream);
454 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
455 }
456 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
457 if (ice->capture_pro_substream)
458 snd_pcm_period_elapsed(ice->capture_pro_substream);
459 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
460 }
461 }
462 if (status & ICE1712_IRQ_FM)
463 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
464 if (status & ICE1712_IRQ_PBKDS) {
465 u32 idx;
466 u16 pbkstatus;
6ca308d4 467 struct snd_pcm_substream *substream;
1da177e4
LT		 468 pbkstatus = inw(ICEDS(ice, INTSTAT));
469 //printk("pbkstatus = 0x%x\n", pbkstatus);
470 for (idx = 0; idx < 6; idx++) {
471 if ((pbkstatus & (3 << (idx * 2))) == 0)
472 continue;
473 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
474 snd_pcm_period_elapsed(substream);
475 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
476 }
477 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
478 }
479 if (status & ICE1712_IRQ_CONCAP) {
480 if (ice->capture_con_substream)
481 snd_pcm_period_elapsed(ice->capture_con_substream);
482 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
483 }
484 if (status & ICE1712_IRQ_CONPBK) {
485 if (ice->playback_con_substream)
486 snd_pcm_period_elapsed(ice->playback_con_substream);
487 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
488 }
489 }
490 return IRQ_RETVAL(handled);
491}
492
493
494/*
495 * PCM part - misc
496 */
497
6ca308d4
TI		 498static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
499 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 500{
501 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
502}
503
6ca308d4 504static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 505{
506 return snd_pcm_lib_free_pages(substream);
507}
508
509/*
510 * PCM part - consumer I/O
511 */
512
6ca308d4 513static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 514 int cmd)
515{
6ca308d4 516 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 517 int result = 0;
518 u32 tmp;
519
520 spin_lock(&ice->reg_lock);
521 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
522 if (cmd == SNDRV_PCM_TRIGGER_START) {
523 tmp |= 1;
524 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
525 tmp &= ~1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
527 tmp |= 2;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
529 tmp &= ~2;
530 } else {
531 result = -EINVAL;
532 }
533 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
534 spin_unlock(&ice->reg_lock);
535 return result;
536}
537
6ca308d4 538static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 539 int cmd)
540{
6ca308d4 541 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 542 int result = 0;
543 u32 tmp;
544
545 spin_lock(&ice->reg_lock);
546 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
547 if (cmd == SNDRV_PCM_TRIGGER_START) {
548 tmp |= 1;
549 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
550 tmp &= ~1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
552 tmp |= 2;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
554 tmp &= ~2;
555 } else {
556 result = -EINVAL;
557 }
558 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
559 spin_unlock(&ice->reg_lock);
560 return result;
561}
562
6ca308d4 563static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 564 int cmd)
565{
6ca308d4 566 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 567 int result = 0;
568 u8 tmp;
569
570 spin_lock(&ice->reg_lock);
571 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
572 if (cmd == SNDRV_PCM_TRIGGER_START) {
573 tmp |= 1;
574 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
575 tmp &= ~1;
576 } else {
577 result = -EINVAL;
578 }
579 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
580 spin_unlock(&ice->reg_lock);
581 return result;
582}
583
6ca308d4 584static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 585{
6ca308d4
TI		 586 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
587 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 588 u32 period_size, buf_size, rate, tmp;
589
590 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
591 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
592 tmp = 0x0000;
593 if (snd_pcm_format_width(runtime->format) == 16)
594 tmp |= 0x10;
595 if (runtime->channels == 2)
596 tmp |= 0x08;
597 rate = (runtime->rate * 8192) / 375;
598 if (rate > 0x000fffff)
599 rate = 0x000fffff;
600 spin_lock_irq(&ice->reg_lock);
601 outb(0, ice->ddma_port + 15);
602 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
603 outl(runtime->dma_addr, ice->ddma_port + 0);
604 outw(buf_size, ice->ddma_port + 4);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
606 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
613 spin_unlock_irq(&ice->reg_lock);
614 return 0;
615}
616
6ca308d4 617static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 618{
6ca308d4
TI		 619 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
620 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 621 u32 period_size, buf_size, rate, tmp, chn;
622
623 period_size = snd_pcm_lib_period_bytes(substream) - 1;
624 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
625 tmp = 0x0064;
626 if (snd_pcm_format_width(runtime->format) == 16)
627 tmp &= ~0x04;
628 if (runtime->channels == 2)
629 tmp |= 0x08;
630 rate = (runtime->rate * 8192) / 375;
631 if (rate > 0x000fffff)
632 rate = 0x000fffff;
633 ice->playback_con_active_buf[substream->number] = 0;
634 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
635 chn = substream->number * 2;
636 spin_lock_irq(&ice->reg_lock);
637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
644 if (runtime->channels == 2) {
645 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
646 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
647 }
648 spin_unlock_irq(&ice->reg_lock);
649 return 0;
650}
651
6ca308d4 652static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 653{
6ca308d4
TI		 654 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
655 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 656 u32 period_size, buf_size;
657 u8 tmp;
658
659 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
660 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
661 tmp = 0x06;
662 if (snd_pcm_format_width(runtime->format) == 16)
663 tmp &= ~0x04;
664 if (runtime->channels == 2)
665 tmp &= ~0x02;
666 spin_lock_irq(&ice->reg_lock);
667 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
668 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
669 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
670 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
672 spin_unlock_irq(&ice->reg_lock);
673 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
674 return 0;
675}
676
6ca308d4 677static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 678{
6ca308d4
TI		 679 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
680 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 681 size_t ptr;
682
683 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
684 return 0;
685 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
686 if (ptr == runtime->buffer_size)
687 ptr = 0;
688 return bytes_to_frames(substream->runtime, ptr);
689}
690
6ca308d4 691static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 692{
6ca308d4 693 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 694 u8 addr;
695 size_t ptr;
696
697 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
698 return 0;
699 if (ice->playback_con_active_buf[substream->number])
700 addr = ICE1712_DSC_ADDR1;
701 else
702 addr = ICE1712_DSC_ADDR0;
703 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
704 ice->playback_con_virt_addr[substream->number];
705 if (ptr == substream->runtime->buffer_size)
706 ptr = 0;
707 return bytes_to_frames(substream->runtime, ptr);
708}
709
6ca308d4 710static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 711{
6ca308d4 712 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 713 size_t ptr;
714
715 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
716 return 0;
717 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
718 if (ptr == substream->runtime->buffer_size)
719 ptr = 0;
720 return bytes_to_frames(substream->runtime, ptr);
721}
722
6ca308d4 723static struct snd_pcm_hardware snd_ice1712_playback =
1da177e4
LT		 724{
725 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
726 SNDRV_PCM_INFO_BLOCK_TRANSFER |
727 SNDRV_PCM_INFO_MMAP_VALID |
728 SNDRV_PCM_INFO_PAUSE),
729 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
730 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
731 .rate_min = 4000,
732 .rate_max = 48000,
733 .channels_min = 1,
734 .channels_max = 2,
735 .buffer_bytes_max = (64*1024),
736 .period_bytes_min = 64,
737 .period_bytes_max = (64*1024),
738 .periods_min = 1,
739 .periods_max = 1024,
740 .fifo_size = 0,
741};
742
6ca308d4 743static struct snd_pcm_hardware snd_ice1712_playback_ds =
1da177e4
LT		 744{
745 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
746 SNDRV_PCM_INFO_BLOCK_TRANSFER |
747 SNDRV_PCM_INFO_MMAP_VALID |
748 SNDRV_PCM_INFO_PAUSE),
749 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
750 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
751 .rate_min = 4000,
752 .rate_max = 48000,
753 .channels_min = 1,
754 .channels_max = 2,
755 .buffer_bytes_max = (128*1024),
756 .period_bytes_min = 64,
757 .period_bytes_max = (128*1024),
758 .periods_min = 2,
759 .periods_max = 2,
760 .fifo_size = 0,
761};
762
6ca308d4 763static struct snd_pcm_hardware snd_ice1712_capture =
1da177e4
LT		 764{
765 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
766 SNDRV_PCM_INFO_BLOCK_TRANSFER |
767 SNDRV_PCM_INFO_MMAP_VALID),
768 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
769 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
770 .rate_min = 4000,
771 .rate_max = 48000,
772 .channels_min = 1,
773 .channels_max = 2,
774 .buffer_bytes_max = (64*1024),
775 .period_bytes_min = 64,
776 .period_bytes_max = (64*1024),
777 .periods_min = 1,
778 .periods_max = 1024,
779 .fifo_size = 0,
780};
781
6ca308d4 782static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 783{
6ca308d4
TI		 784 struct snd_pcm_runtime *runtime = substream->runtime;
785 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 786
787 ice->playback_con_substream = substream;
788 runtime->hw = snd_ice1712_playback;
789 return 0;
790}
791
6ca308d4 792static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 793{
6ca308d4
TI		 794 struct snd_pcm_runtime *runtime = substream->runtime;
795 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 796 u32 tmp;
797
798 ice->playback_con_substream_ds[substream->number] = substream;
799 runtime->hw = snd_ice1712_playback_ds;
800 spin_lock_irq(&ice->reg_lock);
801 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
802 outw(tmp, ICEDS(ice, INTMASK));
803 spin_unlock_irq(&ice->reg_lock);
804 return 0;
805}
806
6ca308d4 807static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 808{
6ca308d4
TI		 809 struct snd_pcm_runtime *runtime = substream->runtime;
810 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 811
812 ice->capture_con_substream = substream;
813 runtime->hw = snd_ice1712_capture;
814 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
815 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
816 runtime->hw.rate_min = 48000;
817 return 0;
818}
819
6ca308d4 820static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 821{
6ca308d4 822 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 823
824 ice->playback_con_substream = NULL;
825 return 0;
826}
827
6ca308d4 828static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 829{
6ca308d4 830 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 831 u32 tmp;
832
833 spin_lock_irq(&ice->reg_lock);
834 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
835 outw(tmp, ICEDS(ice, INTMASK));
836 spin_unlock_irq(&ice->reg_lock);
837 ice->playback_con_substream_ds[substream->number] = NULL;
838 return 0;
839}
840
6ca308d4 841static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 842{
6ca308d4 843 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 844
845 ice->capture_con_substream = NULL;
846 return 0;
847}
848
6ca308d4 849static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT		 850 .open = snd_ice1712_playback_open,
851 .close = snd_ice1712_playback_close,
852 .ioctl = snd_pcm_lib_ioctl,
853 .hw_params = snd_ice1712_hw_params,
854 .hw_free = snd_ice1712_hw_free,
855 .prepare = snd_ice1712_playback_prepare,
856 .trigger = snd_ice1712_playback_trigger,
857 .pointer = snd_ice1712_playback_pointer,
858};
859
6ca308d4 860static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT		 861 .open = snd_ice1712_playback_ds_open,
862 .close = snd_ice1712_playback_ds_close,
863 .ioctl = snd_pcm_lib_ioctl,
864 .hw_params = snd_ice1712_hw_params,
865 .hw_free = snd_ice1712_hw_free,
866 .prepare = snd_ice1712_playback_ds_prepare,
867 .trigger = snd_ice1712_playback_ds_trigger,
868 .pointer = snd_ice1712_playback_ds_pointer,
869};
870
6ca308d4 871static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT		 872 .open = snd_ice1712_capture_open,
873 .close = snd_ice1712_capture_close,
874 .ioctl = snd_pcm_lib_ioctl,
875 .hw_params = snd_ice1712_hw_params,
876 .hw_free = snd_ice1712_hw_free,
877 .prepare = snd_ice1712_capture_prepare,
878 .trigger = snd_ice1712_capture_trigger,
879 .pointer = snd_ice1712_capture_pointer,
880};
881
6ca308d4 882static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 883{
6ca308d4 884 struct snd_pcm *pcm;
1da177e4
LT		 885 int err;
886
887 if (rpcm)
888 *rpcm = NULL;
889 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
890 if (err < 0)
891 return err;
892
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
894 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
895
896 pcm->private_data = ice;
1da177e4
LT		 897 pcm->info_flags = 0;
898 strcpy(pcm->name, "ICE1712 consumer");
899 ice->pcm = pcm;
900
901 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
902 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
903
904 if (rpcm)
905 *rpcm = pcm;
906
907 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
908
909 return 0;
910}
911
6ca308d4 912static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 913{
6ca308d4 914 struct snd_pcm *pcm;
1da177e4
LT		 915 int err;
916
917 if (rpcm)
918 *rpcm = NULL;
919 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
920 if (err < 0)
921 return err;
922
923 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
924
925 pcm->private_data = ice;
1da177e4
LT		 926 pcm->info_flags = 0;
927 strcpy(pcm->name, "ICE1712 consumer (DS)");
928 ice->pcm_ds = pcm;
929
930 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
931 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
932
933 if (rpcm)
934 *rpcm = pcm;
935
936 return 0;
937}
938
939/*
940 * PCM code - professional part (multitrack)
941 */
942
943static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
944 32000, 44100, 48000, 64000, 88200, 96000 };
945
6ca308d4 946static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 947 .count = ARRAY_SIZE(rates),
948 .list = rates,
949 .mask = 0,
950};
951
6ca308d4 952static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 953 int cmd)
954{
6ca308d4 955 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 956 switch (cmd) {
957 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
958 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
959 {
960 unsigned int what;
961 unsigned int old;
962 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
963 return -EINVAL;
964 what = ICE1712_PLAYBACK_PAUSE;
965 snd_pcm_trigger_done(substream, substream);
966 spin_lock(&ice->reg_lock);
967 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
968 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
969 old |= what;
970 else
971 old &= ~what;
972 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
973 spin_unlock(&ice->reg_lock);
974 break;
975 }
976 case SNDRV_PCM_TRIGGER_START:
977 case SNDRV_PCM_TRIGGER_STOP:
978 {
979 unsigned int what = 0;
980 unsigned int old;
981 struct list_head *pos;
6ca308d4 982 struct snd_pcm_substream *s;
1da177e4
LT		 983
984 snd_pcm_group_for_each(pos, substream) {
985 s = snd_pcm_group_substream_entry(pos);
986 if (s == ice->playback_pro_substream) {
987 what |= ICE1712_PLAYBACK_START;
988 snd_pcm_trigger_done(s, substream);
989 } else if (s == ice->capture_pro_substream) {
990 what |= ICE1712_CAPTURE_START_SHADOW;
991 snd_pcm_trigger_done(s, substream);
992 }
993 }
994 spin_lock(&ice->reg_lock);
995 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
996 if (cmd == SNDRV_PCM_TRIGGER_START)
997 old |= what;
998 else
999 old &= ~what;
1000 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
1001 spin_unlock(&ice->reg_lock);
1002 break;
1003 }
1004 default:
1005 return -EINVAL;
1006 }
1007 return 0;
1008}
1009
1010/*
1011 */
6ca308d4 1012static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT		 1013{
1014 unsigned long flags;
1015 unsigned char val, old;
1016 unsigned int i;
1017
1018 switch (rate) {
1019 case 8000: val = 6; break;
1020 case 9600: val = 3; break;
1021 case 11025: val = 10; break;
1022 case 12000: val = 2; break;
1023 case 16000: val = 5; break;
1024 case 22050: val = 9; break;
1025 case 24000: val = 1; break;
1026 case 32000: val = 4; break;
1027 case 44100: val = 8; break;
1028 case 48000: val = 0; break;
1029 case 64000: val = 15; break;
1030 case 88200: val = 11; break;
1031 case 96000: val = 7; break;
1032 default:
1033 snd_BUG();
1034 val = 0;
1035 rate = 48000;
1036 break;
1037 }
1038
1039 spin_lock_irqsave(&ice->reg_lock, flags);
1040 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1041 ICE1712_PLAYBACK_PAUSE|
1042 ICE1712_PLAYBACK_START)) {
1043 __out:
1044 spin_unlock_irqrestore(&ice->reg_lock, flags);
1045 return;
1046 }
1047 if (!force && is_pro_rate_locked(ice))
1048 goto __out;
1049
1050 old = inb(ICEMT(ice, RATE));
1051 if (!force && old == val)
1052 goto __out;
1053 outb(val, ICEMT(ice, RATE));
1054 spin_unlock_irqrestore(&ice->reg_lock, flags);
1055
1056 if (ice->gpio.set_pro_rate)
1057 ice->gpio.set_pro_rate(ice, rate);
1058 for (i = 0; i < ice->akm_codecs; i++) {
1059 if (ice->akm[i].ops.set_rate_val)
1060 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1061 }
1062 if (ice->spdif.ops.setup_rate)
1063 ice->spdif.ops.setup_rate(ice, rate);
1064}
1065
6ca308d4 1066static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1067{
6ca308d4 1068 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1069
1070 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1071 spin_lock_irq(&ice->reg_lock);
1072 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1073 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1074 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1075 spin_unlock_irq(&ice->reg_lock);
1076
1077 return 0;
1078}
1079
6ca308d4
TI		 1080static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1081 struct snd_pcm_hw_params *hw_params)
1da177e4 1082{
6ca308d4 1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1084
1085 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1086 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1087}
1088
6ca308d4 1089static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1090{
6ca308d4 1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1092
1093 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1094 spin_lock_irq(&ice->reg_lock);
1095 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1096 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1097 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1098 spin_unlock_irq(&ice->reg_lock);
1099 return 0;
1100}
1101
6ca308d4
TI		 1102static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1103 struct snd_pcm_hw_params *hw_params)
1da177e4 1104{
6ca308d4 1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1106
1107 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1108 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1109}
1110
6ca308d4 1111static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1112{
6ca308d4 1113 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1114 size_t ptr;
1115
1116 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1117 return 0;
1118 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1119 if (ptr == substream->runtime->buffer_size)
1120 ptr = 0;
1121 return bytes_to_frames(substream->runtime, ptr);
1122}
1123
6ca308d4 1124static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1125{
6ca308d4 1126 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1127 size_t ptr;
1128
1129 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1130 return 0;
1131 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1132 if (ptr == substream->runtime->buffer_size)
1133 ptr = 0;
1134 return bytes_to_frames(substream->runtime, ptr);
1135}
1136
6ca308d4 1137static struct snd_pcm_hardware snd_ice1712_playback_pro =
1da177e4
LT		 1138{
1139 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1140 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1141 SNDRV_PCM_INFO_MMAP_VALID |
1142 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1143 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1144 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1145 .rate_min = 4000,
1146 .rate_max = 96000,
1147 .channels_min = 10,
1148 .channels_max = 10,
1149 .buffer_bytes_max = (256*1024),
1150 .period_bytes_min = 10 * 4 * 2,
1151 .period_bytes_max = 131040,
1152 .periods_min = 1,
1153 .periods_max = 1024,
1154 .fifo_size = 0,
1155};
1156
6ca308d4 1157static struct snd_pcm_hardware snd_ice1712_capture_pro =
1da177e4
LT		 1158{
1159 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1160 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1161 SNDRV_PCM_INFO_MMAP_VALID |
1162 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1163 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1164 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1165 .rate_min = 4000,
1166 .rate_max = 96000,
1167 .channels_min = 12,
1168 .channels_max = 12,
1169 .buffer_bytes_max = (256*1024),
1170 .period_bytes_min = 12 * 4 * 2,
1171 .period_bytes_max = 131040,
1172 .periods_min = 1,
1173 .periods_max = 1024,
1174 .fifo_size = 0,
1175};
1176
6ca308d4 1177static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1178{
6ca308d4
TI		 1179 struct snd_pcm_runtime *runtime = substream->runtime;
1180 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1181
1182 ice->playback_pro_substream = substream;
1183 runtime->hw = snd_ice1712_playback_pro;
1184 snd_pcm_set_sync(substream);
1185 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1186 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1187
1188 if (ice->spdif.ops.open)
1189 ice->spdif.ops.open(ice, substream);
1190
1191 return 0;
1192}
1193
6ca308d4 1194static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1195{
6ca308d4
TI		 1196 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1197 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1198
1199 ice->capture_pro_substream = substream;
1200 runtime->hw = snd_ice1712_capture_pro;
1201 snd_pcm_set_sync(substream);
1202 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1203 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1204 return 0;
1205}
1206
6ca308d4 1207static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1208{
6ca308d4 1209 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1210
1211 if (PRO_RATE_RESET)
1212 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1213 ice->playback_pro_substream = NULL;
1214 if (ice->spdif.ops.close)
1215 ice->spdif.ops.close(ice, substream);
1216
1217 return 0;
1218}
1219
6ca308d4 1220static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1221{
6ca308d4 1222 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1223
1224 if (PRO_RATE_RESET)
1225 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1226 ice->capture_pro_substream = NULL;
1227 return 0;
1228}
1229
6ca308d4 1230static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT		 1231 .open = snd_ice1712_playback_pro_open,
1232 .close = snd_ice1712_playback_pro_close,
1233 .ioctl = snd_pcm_lib_ioctl,
1234 .hw_params = snd_ice1712_playback_pro_hw_params,
1235 .hw_free = snd_ice1712_hw_free,
1236 .prepare = snd_ice1712_playback_pro_prepare,
1237 .trigger = snd_ice1712_pro_trigger,
1238 .pointer = snd_ice1712_playback_pro_pointer,
1239};
1240
6ca308d4 1241static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT		 1242 .open = snd_ice1712_capture_pro_open,
1243 .close = snd_ice1712_capture_pro_close,
1244 .ioctl = snd_pcm_lib_ioctl,
1245 .hw_params = snd_ice1712_capture_pro_hw_params,
1246 .hw_free = snd_ice1712_hw_free,
1247 .prepare = snd_ice1712_capture_pro_prepare,
1248 .trigger = snd_ice1712_pro_trigger,
1249 .pointer = snd_ice1712_capture_pro_pointer,
1250};
1251
6ca308d4 1252static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 1253{
6ca308d4 1254 struct snd_pcm *pcm;
1da177e4
LT		 1255 int err;
1256
1257 if (rpcm)
1258 *rpcm = NULL;
1259 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1260 if (err < 0)
1261 return err;
1262
1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1264 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1265
1266 pcm->private_data = ice;
1da177e4
LT		 1267 pcm->info_flags = 0;
1268 strcpy(pcm->name, "ICE1712 multi");
1269
1270 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1271 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1272
1273 ice->pcm_pro = pcm;
1274 if (rpcm)
1275 *rpcm = pcm;
1276
1277 if (ice->cs8427) {
1278 /* assign channels to iec958 */
1279 err = snd_cs8427_iec958_build(ice->cs8427,
1280 pcm->streams[0].substream,
1281 pcm->streams[1].substream);
1282 if (err < 0)
1283 return err;
1284 }
1285
1286 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1287 return err;
1288 return 0;
1289}
1290
1291/*
1292 * Mixer section
1293 */
1294
6ca308d4 1295static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT		 1296{
1297 unsigned int vol = ice->pro_volumes[index];
1298 unsigned short val = 0;
1299
1300 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1301 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1302 outb(index, ICEMT(ice, MONITOR_INDEX));
1303 outw(val, ICEMT(ice, MONITOR_VOLUME));
1304}
1305
6ca308d4 1306static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1307{
1308 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1309 uinfo->count = 2;
1310 uinfo->value.integer.min = 0;
1311 uinfo->value.integer.max = 1;
1312 return 0;
1313}
1314
6ca308d4 1315static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1316{
6ca308d4 1317 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1318 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1319
1320 spin_lock_irq(&ice->reg_lock);
1321 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1322 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1323 spin_unlock_irq(&ice->reg_lock);
1324 return 0;
1325}
1326
6ca308d4 1327static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1328{
6ca308d4 1329 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1330 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1331 unsigned int nval, change;
1332
1333 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1334 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1335 spin_lock_irq(&ice->reg_lock);
1336 nval |= ice->pro_volumes[index] & ~0x80008000;
1337 change = nval != ice->pro_volumes[index];
1338 ice->pro_volumes[index] = nval;
1339 snd_ice1712_update_volume(ice, index);
1340 spin_unlock_irq(&ice->reg_lock);
1341 return change;
1342}
1343
6ca308d4 1344static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1345{
1346 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1347 uinfo->count = 2;
1348 uinfo->value.integer.min = 0;
1349 uinfo->value.integer.max = 96;
1350 return 0;
1351}
1352
6ca308d4 1353static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1354{
6ca308d4 1355 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1356 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1357
1358 spin_lock_irq(&ice->reg_lock);
1359 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1360 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1361 spin_unlock_irq(&ice->reg_lock);
1362 return 0;
1363}
1364
6ca308d4 1365static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1366{
6ca308d4 1367 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1368 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1369 unsigned int nval, change;
1370
1371 nval = (ucontrol->value.integer.value[0] & 127) |
1372 ((ucontrol->value.integer.value[1] & 127) << 16);
1373 spin_lock_irq(&ice->reg_lock);
1374 nval |= ice->pro_volumes[index] & ~0x007f007f;
1375 change = nval != ice->pro_volumes[index];
1376 ice->pro_volumes[index] = nval;
1377 snd_ice1712_update_volume(ice, index);
1378 spin_unlock_irq(&ice->reg_lock);
1379 return change;
1380}
1381
1382
6ca308d4 1383static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1da177e4
LT		 1384 {
1385 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1386 .name = "Multi Playback Switch",
1387 .info = snd_ice1712_pro_mixer_switch_info,
1388 .get = snd_ice1712_pro_mixer_switch_get,
1389 .put = snd_ice1712_pro_mixer_switch_put,
1390 .private_value = 0,
1391 .count = 10,
1392 },
1393 {
1394 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1395 .name = "Multi Playback Volume",
1396 .info = snd_ice1712_pro_mixer_volume_info,
1397 .get = snd_ice1712_pro_mixer_volume_get,
1398 .put = snd_ice1712_pro_mixer_volume_put,
1399 .private_value = 0,
1400 .count = 10,
1401 },
1402};
1403
6ca308d4 1404static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1da177e4
LT		 1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1406 .name = "H/W Multi Capture Switch",
1407 .info = snd_ice1712_pro_mixer_switch_info,
1408 .get = snd_ice1712_pro_mixer_switch_get,
1409 .put = snd_ice1712_pro_mixer_switch_put,
1410 .private_value = 10,
1411};
1412
6ca308d4 1413static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1da177e4 1414 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1415 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1da177e4
LT		 1416 .info = snd_ice1712_pro_mixer_switch_info,
1417 .get = snd_ice1712_pro_mixer_switch_get,
1418 .put = snd_ice1712_pro_mixer_switch_put,
1419 .private_value = 18,
1420 .count = 2,
1421};
1422
6ca308d4 1423static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1da177e4
LT		 1424 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1425 .name = "H/W Multi Capture Volume",
1426 .info = snd_ice1712_pro_mixer_volume_info,
1427 .get = snd_ice1712_pro_mixer_volume_get,
1428 .put = snd_ice1712_pro_mixer_volume_put,
1429 .private_value = 10,
1430};
1431
6ca308d4 1432static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1da177e4 1433 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1434 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1da177e4
LT		 1435 .info = snd_ice1712_pro_mixer_volume_info,
1436 .get = snd_ice1712_pro_mixer_volume_get,
1437 .put = snd_ice1712_pro_mixer_volume_put,
1438 .private_value = 18,
1439 .count = 2,
1440};
1441
6ca308d4 1442static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1443{
6ca308d4 1444 struct snd_card *card = ice->card;
1da177e4
LT		 1445 unsigned int idx;
1446 int err;
1447
1448 /* multi-channel mixer */
1449 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1450 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1451 if (err < 0)
1452 return err;
1453 }
1454
1455 if (ice->num_total_adcs > 0) {
6ca308d4 1456 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT		 1457 tmp.count = ice->num_total_adcs;
1458 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1459 if (err < 0)
1460 return err;
1461 }
1462
1463 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1464 if (err < 0)
1465 return err;
1466
1467 if (ice->num_total_adcs > 0) {
6ca308d4 1468 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT		 1469 tmp.count = ice->num_total_adcs;
1470 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1471 if (err < 0)
1472 return err;
1473 }
1474
1475 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1476 if (err < 0)
1477 return err;
1478
1479 /* initialize volumes */
1480 for (idx = 0; idx < 10; idx++) {
1481 ice->pro_volumes[idx] = 0x80008000; /* mute */
1482 snd_ice1712_update_volume(ice, idx);
1483 }
1484 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1485 ice->pro_volumes[idx] = 0x80008000; /* mute */
1486 snd_ice1712_update_volume(ice, idx);
1487 }
1488 for (idx = 18; idx < 20; idx++) {
1489 ice->pro_volumes[idx] = 0x80008000; /* mute */
1490 snd_ice1712_update_volume(ice, idx);
1491 }
1492 return 0;
1493}
1494
6ca308d4 1495static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1496{
6ca308d4 1497 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 1498 ice->ac97 = NULL;
1499}
1500
6ca308d4 1501static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT		 1502{
1503 int err, bus_num = 0;
6ca308d4
TI		 1504 struct snd_ac97_template ac97;
1505 struct snd_ac97_bus *pbus;
1506 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT		 1507 .write = snd_ice1712_ac97_write,
1508 .read = snd_ice1712_ac97_read,
1509 };
6ca308d4 1510 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT		 1511 .write = snd_ice1712_pro_ac97_write,
1512 .read = snd_ice1712_pro_ac97_read,
1513 };
1514
1515 if (ice_has_con_ac97(ice)) {
1516 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1517 return err;
1518 memset(&ac97, 0, sizeof(ac97));
1519 ac97.private_data = ice;
1520 ac97.private_free = snd_ice1712_mixer_free_ac97;
1521 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1522 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1523 else {
1524 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1525 return err;
1526 return 0;
1527 }
1528 }
1529
1530 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1531 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1532 return err;
1533 memset(&ac97, 0, sizeof(ac97));
1534 ac97.private_data = ice;
1535 ac97.private_free = snd_ice1712_mixer_free_ac97;
1536 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1537 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1538 else
1539 return 0;
1540 }
1541 /* I2S mixer only */
1542 strcat(ice->card->mixername, "ICE1712 - multitrack");
1543 return 0;
1544}
1545
1546/*
1547 *
1548 */
1549
6ca308d4 1550static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1551{
1552 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1553}
1554
6ca308d4
TI		 1555static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1556 struct snd_info_buffer *buffer)
1da177e4 1557{
6ca308d4 1558 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1559 unsigned int idx;
1560
1561 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1562 snd_iprintf(buffer, "EEPROM:\n");
1563
1564 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1565 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1566 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1567 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1568 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1569 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1570 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1571 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1572 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1573 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1574 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1575 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1576 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1577 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1578 for (idx = 0; idx < 4; idx++)
1579 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1580 for (idx = 0; idx < 4; idx++)
1581 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1582 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1583 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1584
1585 snd_iprintf(buffer, "\nRegisters:\n");
1586 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1587 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1588 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1589 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39
JK		 1590 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1591 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1592 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT		 1593}
1594
6ca308d4 1595static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1da177e4 1596{
6ca308d4 1597 struct snd_info_entry *entry;
1da177e4
LT		 1598
1599 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1600 snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
1601}
1602
1603/*
1604 *
1605 */
1606
6ca308d4
TI		 1607static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1608 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1609{
1610 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1611 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1612 return 0;
1613}
1614
6ca308d4
TI		 1615static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1616 struct snd_ctl_elem_value *ucontrol)
1da177e4 1617{
6ca308d4 1618 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1619
1620 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1621 return 0;
1622}
1623
6ca308d4 1624static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1da177e4
LT		 1625 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1626 .name = "ICE1712 EEPROM",
1627 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1628 .info = snd_ice1712_eeprom_info,
1629 .get = snd_ice1712_eeprom_get
1630};
1631
1632/*
1633 */
6ca308d4
TI		 1634static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1635 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1636{
1637 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1638 uinfo->count = 1;
1639 return 0;
1640}
1641
6ca308d4
TI		 1642static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1da177e4 1644{
6ca308d4 1645 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1646 if (ice->spdif.ops.default_get)
1647 ice->spdif.ops.default_get(ice, ucontrol);
1648 return 0;
1649}
1650
6ca308d4
TI		 1651static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1652 struct snd_ctl_elem_value *ucontrol)
1da177e4 1653{
6ca308d4 1654 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1655 if (ice->spdif.ops.default_put)
1656 return ice->spdif.ops.default_put(ice, ucontrol);
1657 return 0;
1658}
1659
6ca308d4 1660static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1da177e4
LT		 1661{
1662 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1663 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1664 .info = snd_ice1712_spdif_info,
1665 .get = snd_ice1712_spdif_default_get,
1666 .put = snd_ice1712_spdif_default_put
1667};
1668
6ca308d4
TI		 1669static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1670 struct snd_ctl_elem_value *ucontrol)
1da177e4 1671{
6ca308d4 1672 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1673 if (ice->spdif.ops.default_get) {
1674 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1675 IEC958_AES0_PROFESSIONAL |
1676 IEC958_AES0_CON_NOT_COPYRIGHT |
1677 IEC958_AES0_CON_EMPHASIS;
1678 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1679 IEC958_AES1_CON_CATEGORY;
1680 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1681 } else {
1682 ucontrol->value.iec958.status[0] = 0xff;
1683 ucontrol->value.iec958.status[1] = 0xff;
1684 ucontrol->value.iec958.status[2] = 0xff;
1685 ucontrol->value.iec958.status[3] = 0xff;
1686 ucontrol->value.iec958.status[4] = 0xff;
1687 }
1688 return 0;
1689}
1690
6ca308d4
TI		 1691static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1692 struct snd_ctl_elem_value *ucontrol)
1da177e4 1693{
6ca308d4 1694 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1695 if (ice->spdif.ops.default_get) {
1696 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1697 IEC958_AES0_PROFESSIONAL |
1698 IEC958_AES0_PRO_FS |
1699 IEC958_AES0_PRO_EMPHASIS;
1700 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1701 } else {
1702 ucontrol->value.iec958.status[0] = 0xff;
1703 ucontrol->value.iec958.status[1] = 0xff;
1704 ucontrol->value.iec958.status[2] = 0xff;
1705 ucontrol->value.iec958.status[3] = 0xff;
1706 ucontrol->value.iec958.status[4] = 0xff;
1707 }
1708 return 0;
1709}
1710
6ca308d4 1711static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1da177e4
LT		 1712{
1713 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1714 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1715 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1716 .info = snd_ice1712_spdif_info,
1717 .get = snd_ice1712_spdif_maskc_get,
1718};
1719
6ca308d4 1720static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1da177e4
LT		 1721{
1722 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1723 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1724 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1725 .info = snd_ice1712_spdif_info,
1726 .get = snd_ice1712_spdif_maskp_get,
1727};
1728
6ca308d4
TI		 1729static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1730 struct snd_ctl_elem_value *ucontrol)
1da177e4 1731{
6ca308d4 1732 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1733 if (ice->spdif.ops.stream_get)
1734 ice->spdif.ops.stream_get(ice, ucontrol);
1735 return 0;
1736}
1737
6ca308d4
TI		 1738static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1739 struct snd_ctl_elem_value *ucontrol)
1da177e4 1740{
6ca308d4 1741 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1742 if (ice->spdif.ops.stream_put)
1743 return ice->spdif.ops.stream_put(ice, ucontrol);
1744 return 0;
1745}
1746
6ca308d4 1747static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1da177e4 1748{
6ca308d4
TI		 1749 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1750 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4
LT		 1751 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1752 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1753 .info = snd_ice1712_spdif_info,
1754 .get = snd_ice1712_spdif_stream_get,
1755 .put = snd_ice1712_spdif_stream_put
1756};
1757
6ca308d4
TI		 1758int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
1759 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1760{
1761 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1762 uinfo->count = 1;
1763 uinfo->value.integer.min = 0;
1764 uinfo->value.integer.max = 1;
1765 return 0;
1766}
1767
6ca308d4
TI		 1768int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1769 struct snd_ctl_elem_value *ucontrol)
1da177e4 1770{
6ca308d4 1771 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1772 unsigned char mask = kcontrol->private_value & 0xff;
1773 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1774
1775 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI		 1776 ucontrol->value.integer.value[0] =
1777 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT		 1778 snd_ice1712_restore_gpio_status(ice);
1779 return 0;
1780}
1781
6ca308d4
TI		 1782int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1783 struct snd_ctl_elem_value *ucontrol)
1da177e4 1784{
6ca308d4 1785 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1786 unsigned char mask = kcontrol->private_value & 0xff;
1787 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1788 unsigned int val, nval;
1789
1790 if (kcontrol->private_value & (1 << 31))
1791 return -EPERM;
1792 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1793 snd_ice1712_save_gpio_status(ice);
1794 val = snd_ice1712_gpio_read(ice);
1795 nval |= val & ~mask;
1796 if (val != nval)
1797 snd_ice1712_gpio_write(ice, nval);
1798 snd_ice1712_restore_gpio_status(ice);
1799 return val != nval;
1800}
1801
1802/*
1803 * rate
1804 */
6ca308d4
TI		 1805static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1807{
1808 static char *texts[] = {
1809 "8000", /* 0: 6 */
1810 "9600", /* 1: 3 */
1811 "11025", /* 2: 10 */
1812 "12000", /* 3: 2 */
1813 "16000", /* 4: 5 */
1814 "22050", /* 5: 9 */
1815 "24000", /* 6: 1 */
1816 "32000", /* 7: 4 */
1817 "44100", /* 8: 8 */
1818 "48000", /* 9: 0 */
1819 "64000", /* 10: 15 */
1820 "88200", /* 11: 11 */
1821 "96000", /* 12: 7 */
1822 "IEC958 Input", /* 13: -- */
1823 };
1824 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1825 uinfo->count = 1;
1826 uinfo->value.enumerated.items = 14;
1827 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1828 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1829 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1830 return 0;
1831}
1832
6ca308d4
TI		 1833static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1834 struct snd_ctl_elem_value *ucontrol)
1da177e4 1835{
6ca308d4 1836 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1837 static unsigned char xlate[16] = {
1838 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1839 };
1840 unsigned char val;
1841
1842 spin_lock_irq(&ice->reg_lock);
1843 if (is_spdif_master(ice)) {
1844 ucontrol->value.enumerated.item[0] = 13;
1845 } else {
1846 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1847 if (val == 255) {
1848 snd_BUG();
1849 val = 0;
1850 }
1851 ucontrol->value.enumerated.item[0] = val;
1852 }
1853 spin_unlock_irq(&ice->reg_lock);
1854 return 0;
1855}
1856
6ca308d4
TI		 1857static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1858 struct snd_ctl_elem_value *ucontrol)
1da177e4 1859{
6ca308d4 1860 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1861 static unsigned int xrate[13] = {
1862 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1863 32000, 44100, 48000, 64000, 88200, 96000
1864 };
1865 unsigned char oval;
1866 int change = 0;
1867
1868 spin_lock_irq(&ice->reg_lock);
1869 oval = inb(ICEMT(ice, RATE));
1870 if (ucontrol->value.enumerated.item[0] == 13) {
1871 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1872 } else {
1873 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1874 spin_unlock_irq(&ice->reg_lock);
1875 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1876 spin_lock_irq(&ice->reg_lock);
1877 }
1878 change = inb(ICEMT(ice, RATE)) != oval;
1879 spin_unlock_irq(&ice->reg_lock);
1880
6ca308d4 1881 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1
JK		 1882 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1883 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT		 1884
1885 return change;
1886}
1887
6ca308d4 1888static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1da177e4
LT		 1889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1890 .name = "Multi Track Internal Clock",
1891 .info = snd_ice1712_pro_internal_clock_info,
1892 .get = snd_ice1712_pro_internal_clock_get,
1893 .put = snd_ice1712_pro_internal_clock_put
1894};
1895
6ca308d4
TI		 1896static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1897 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1898{
1899 static char *texts[] = {
1900 "8000", /* 0: 6 */
1901 "9600", /* 1: 3 */
1902 "11025", /* 2: 10 */
1903 "12000", /* 3: 2 */
1904 "16000", /* 4: 5 */
1905 "22050", /* 5: 9 */
1906 "24000", /* 6: 1 */
1907 "32000", /* 7: 4 */
1908 "44100", /* 8: 8 */
1909 "48000", /* 9: 0 */
1910 "64000", /* 10: 15 */
1911 "88200", /* 11: 11 */
1912 "96000", /* 12: 7 */
1913 // "IEC958 Input", /* 13: -- */
1914 };
1915 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1916 uinfo->count = 1;
1917 uinfo->value.enumerated.items = 13;
1918 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1919 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1920 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1921 return 0;
1922}
1923
6ca308d4
TI		 1924static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1925 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1926{
1927 int val;
1928 static unsigned int xrate[13] = {
1929 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1930 32000, 44100, 48000, 64000, 88200, 96000
1931 };
1932
1933 for (val = 0; val < 13; val++) {
1934 if (xrate[val] == PRO_RATE_DEFAULT)
1935 break;
1936 }
1937
1938 ucontrol->value.enumerated.item[0] = val;
1939 return 0;
1940}
1941
6ca308d4
TI		 1942static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1943 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1944{
1945 static unsigned int xrate[13] = {
1946 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1947 32000, 44100, 48000, 64000, 88200, 96000
1948 };
1949 unsigned char oval;
1950 int change = 0;
1951
1952 oval = PRO_RATE_DEFAULT;
1953 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1954 change = PRO_RATE_DEFAULT != oval;
1955
1956 return change;
1957}
1958
6ca308d4 1959static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1da177e4
LT		 1960 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1961 .name = "Multi Track Internal Clock Default",
1962 .info = snd_ice1712_pro_internal_clock_default_info,
1963 .get = snd_ice1712_pro_internal_clock_default_get,
1964 .put = snd_ice1712_pro_internal_clock_default_put
1965};
1966
6ca308d4
TI		 1967static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1968 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1969{
1970 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1971 uinfo->count = 1;
1972 uinfo->value.integer.min = 0;
1973 uinfo->value.integer.max = 1;
1974 return 0;
1975}
1976
6ca308d4
TI		 1977static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1978 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1979{
1980 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1981 return 0;
1982}
1983
6ca308d4
TI		 1984static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1985 struct snd_ctl_elem_value *ucontrol)
1da177e4 1986{
6ca308d4 1987 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1988 int change = 0, nval;
1989
1990 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1991 spin_lock_irq(&ice->reg_lock);
1992 change = PRO_RATE_LOCKED != nval;
1993 PRO_RATE_LOCKED = nval;
1994 spin_unlock_irq(&ice->reg_lock);
1995 return change;
1996}
1997
6ca308d4 1998static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1da177e4
LT		 1999 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2000 .name = "Multi Track Rate Locking",
2001 .info = snd_ice1712_pro_rate_locking_info,
2002 .get = snd_ice1712_pro_rate_locking_get,
2003 .put = snd_ice1712_pro_rate_locking_put
2004};
2005
6ca308d4
TI		 2006static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
2007 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2008{
2009 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2010 uinfo->count = 1;
2011 uinfo->value.integer.min = 0;
2012 uinfo->value.integer.max = 1;
2013 return 0;
2014}
2015
6ca308d4
TI		 2016static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2017 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 2018{
2019 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2020 return 0;
2021}
2022
6ca308d4
TI		 2023static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2024 struct snd_ctl_elem_value *ucontrol)
1da177e4 2025{
6ca308d4 2026 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2027 int change = 0, nval;
2028
2029 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2030 spin_lock_irq(&ice->reg_lock);
2031 change = PRO_RATE_RESET != nval;
2032 PRO_RATE_RESET = nval;
2033 spin_unlock_irq(&ice->reg_lock);
2034 return change;
2035}
2036
6ca308d4 2037static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
1da177e4
LT		 2038 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2039 .name = "Multi Track Rate Reset",
2040 .info = snd_ice1712_pro_rate_reset_info,
2041 .get = snd_ice1712_pro_rate_reset_get,
2042 .put = snd_ice1712_pro_rate_reset_put
2043};
2044
2045/*
2046 * routing
2047 */
6ca308d4
TI		 2048static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2049 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2050{
2051 static char *texts[] = {
2052 "PCM Out", /* 0 */
2053 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2054 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2055 "IEC958 In L", "IEC958 In R", /* 9-10 */
2056 "Digital Mixer", /* 11 - optional */
2057 };
2058
2059 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2060 uinfo->count = 1;
6ca308d4
TI		 2061 uinfo->value.enumerated.items =
2062 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT		 2063 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2064 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2065 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2066 return 0;
2067}
2068
6ca308d4
TI		 2069static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2070 struct snd_ctl_elem_value *ucontrol)
1da177e4 2071{
6ca308d4 2072 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2073 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2074 unsigned int val, cval;
2075
2076 spin_lock_irq(&ice->reg_lock);
2077 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2078 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2079 spin_unlock_irq(&ice->reg_lock);
2080
2081 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2082 val &= 3;
2083 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2084 if (val == 1 && idx < 2)
2085 ucontrol->value.enumerated.item[0] = 11;
2086 else if (val == 2)
2087 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2088 else if (val == 3)
2089 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2090 else
2091 ucontrol->value.enumerated.item[0] = 0;
2092 return 0;
2093}
2094
6ca308d4
TI		 2095static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2096 struct snd_ctl_elem_value *ucontrol)
1da177e4 2097{
6ca308d4 2098 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2099 int change, shift;
2100 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2101 unsigned int val, old_val, nval;
2102
2103 /* update PSDOUT */
2104 if (ucontrol->value.enumerated.item[0] >= 11)
2105 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2106 else if (ucontrol->value.enumerated.item[0] >= 9)
2107 nval = 3; /* spdif in */
2108 else if (ucontrol->value.enumerated.item[0] >= 1)
2109 nval = 2; /* analog in */
2110 else
2111 nval = 0; /* pcm */
2112 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2113 spin_lock_irq(&ice->reg_lock);
2114 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2115 val &= ~(0x03 << shift);
2116 val |= nval << shift;
2117 change = val != old_val;
2118 if (change)
2119 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2120 spin_unlock_irq(&ice->reg_lock);
2121 if (nval < 2) /* dig mixer of pcm */
2122 return change;
2123
2124 /* update CAPTURE */
2125 spin_lock_irq(&ice->reg_lock);
2126 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2127 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2128 if (nval == 2) { /* analog in */
2129 nval = ucontrol->value.enumerated.item[0] - 1;
2130 val &= ~(0x07 << shift);
2131 val |= nval << shift;
2132 } else { /* spdif in */
2133 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2134 val &= ~(0x08 << shift);
2135 val |= nval << shift;
2136 }
2137 if (val != old_val) {
2138 change = 1;
2139 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2140 }
2141 spin_unlock_irq(&ice->reg_lock);
2142 return change;
2143}
2144
6ca308d4
TI		 2145static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2146 struct snd_ctl_elem_value *ucontrol)
1da177e4 2147{
6ca308d4 2148 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2149 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2150 unsigned int val, cval;
2151 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2152 cval = (val >> (idx * 4 + 8)) & 0x0f;
2153 val = (val >> (idx * 2)) & 0x03;
2154 if (val == 1)
2155 ucontrol->value.enumerated.item[0] = 11;
2156 else if (val == 2)
2157 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2158 else if (val == 3)
2159 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2160 else
2161 ucontrol->value.enumerated.item[0] = 0;
2162 return 0;
2163}
2164
6ca308d4
TI		 2165static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2166 struct snd_ctl_elem_value *ucontrol)
1da177e4 2167{
6ca308d4 2168 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2169 int change, shift;
2170 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2171 unsigned int val, old_val, nval;
2172
2173 /* update SPDOUT */
2174 spin_lock_irq(&ice->reg_lock);
2175 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2176 if (ucontrol->value.enumerated.item[0] >= 11)
2177 nval = 1;
2178 else if (ucontrol->value.enumerated.item[0] >= 9)
2179 nval = 3;
2180 else if (ucontrol->value.enumerated.item[0] >= 1)
2181 nval = 2;
2182 else
2183 nval = 0;
2184 shift = idx * 2;
2185 val &= ~(0x03 << shift);
2186 val |= nval << shift;
2187 shift = idx * 4 + 8;
2188 if (nval == 2) {
2189 nval = ucontrol->value.enumerated.item[0] - 1;
2190 val &= ~(0x07 << shift);
2191 val |= nval << shift;
2192 } else if (nval == 3) {
2193 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2194 val &= ~(0x08 << shift);
2195 val |= nval << shift;
2196 }
2197 change = val != old_val;
2198 if (change)
2199 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2200 spin_unlock_irq(&ice->reg_lock);
2201 return change;
2202}
2203
6ca308d4 2204static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
1da177e4
LT		 2205 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2206 .name = "H/W Playback Route",
2207 .info = snd_ice1712_pro_route_info,
2208 .get = snd_ice1712_pro_route_analog_get,
2209 .put = snd_ice1712_pro_route_analog_put,
2210};
2211
6ca308d4 2212static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
1da177e4 2213 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 2214 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1da177e4
LT		 2215 .info = snd_ice1712_pro_route_info,
2216 .get = snd_ice1712_pro_route_spdif_get,
2217 .put = snd_ice1712_pro_route_spdif_put,
2218 .count = 2,
2219};
2220
2221
6ca308d4
TI		 2222static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2223 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2224{
2225 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2226 uinfo->count = 1;
2227 uinfo->value.integer.min = 0;
2228 uinfo->value.integer.max = 255;
2229 return 0;
2230}
2231
6ca308d4
TI		 2232static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2233 struct snd_ctl_elem_value *ucontrol)
1da177e4 2234{
6ca308d4 2235 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2236
2237 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2238 return 0;
2239}
2240
6ca308d4
TI		 2241static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2242 struct snd_ctl_elem_value *ucontrol)
1da177e4 2243{
6ca308d4 2244 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2245 int change;
2246
2247 spin_lock_irq(&ice->reg_lock);
2248 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2249 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2250 spin_unlock_irq(&ice->reg_lock);
2251 return change;
2252}
2253
6ca308d4 2254static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
1da177e4
LT		 2255 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2256 .name = "Multi Track Volume Rate",
2257 .info = snd_ice1712_pro_volume_rate_info,
2258 .get = snd_ice1712_pro_volume_rate_get,
2259 .put = snd_ice1712_pro_volume_rate_put
2260};
2261
6ca308d4
TI		 2262static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2263 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2264{
2265 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2266 uinfo->count = 22;
2267 uinfo->value.integer.min = 0;
2268 uinfo->value.integer.max = 255;
2269 return 0;
2270}
2271
6ca308d4
TI		 2272static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2273 struct snd_ctl_elem_value *ucontrol)
1da177e4 2274{
6ca308d4 2275 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2276 int idx;
2277
2278 spin_lock_irq(&ice->reg_lock);
2279 for (idx = 0; idx < 22; idx++) {
2280 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2281 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2282 }
2283 spin_unlock_irq(&ice->reg_lock);
2284 return 0;
2285}
2286
6ca308d4 2287static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
1da177e4
LT		 2288 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2289 .name = "Multi Track Peak",
2290 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2291 .info = snd_ice1712_pro_peak_info,
2292 .get = snd_ice1712_pro_peak_get
2293};
2294
2295/*
2296 *
2297 */
2298
2299/*
2300 * list of available boards
2301 */
2302static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2303 snd_ice1712_hoontech_cards,
2304 snd_ice1712_delta_cards,
2305 snd_ice1712_ews_cards,
2306 NULL,
2307};
2308
6ca308d4 2309static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
1da177e4
LT		 2310 unsigned char dev,
2311 unsigned char addr)
2312{
2313 long t = 0x10000;
2314
2315 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2316 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2317 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2318 return inb(ICEREG(ice, I2C_DATA));
2319}
2320
6ca308d4
TI		 2321static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2322 const char *modelname)
1da177e4
LT		 2323{
2324 int dev = 0xa0; /* EEPROM device address */
2325 unsigned int i, size;
2326 struct snd_ice1712_card_info **tbl, *c;
2327
2328 if (! modelname || ! *modelname) {
2329 ice->eeprom.subvendor = 0;
2330 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2331 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2332 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2333 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2334 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI		 2335 if (ice->eeprom.subvendor == 0 ||
2336 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2337 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2338 u16 vendor, device;
2339 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2340 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2341 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2342 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2343 printk(KERN_ERR "ice1712: No valid ID is found\n");
2344 return -ENXIO;
2345 }
2346 }
2347 }
2348 for (tbl = card_tables; *tbl; tbl++) {
2349 for (c = *tbl; c->subvendor; c++) {
2350 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2351 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2352 ice->eeprom.subvendor = c->subvendor;
2353 } else if (c->subvendor != ice->eeprom.subvendor)
2354 continue;
2355 if (! c->eeprom_size || ! c->eeprom_data)
2356 goto found;
2357 /* if the EEPROM is given by the driver, use it */
2358 snd_printdd("using the defined eeprom..\n");
2359 ice->eeprom.version = 1;
2360 ice->eeprom.size = c->eeprom_size + 6;
2361 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2362 goto read_skipped;
2363 }
2364 }
6ca308d4
TI		 2365 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2366 ice->eeprom.subvendor);
1da177e4
LT		 2367
2368 found:
2369 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2370 if (ice->eeprom.size < 6)
2371 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2372 else if (ice->eeprom.size > 32) {
99b359ba 2373 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT		 2374 return -EIO;
2375 }
2376 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2377 if (ice->eeprom.version != 1) {
6ca308d4
TI		 2378 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2379 ice->eeprom.version);
1da177e4
LT		 2380 /* return -EIO; */
2381 }
2382 size = ice->eeprom.size - 6;
2383 for (i = 0; i < size; i++)
2384 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2385
2386 read_skipped:
2387 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2388 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2389 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2390
2391 return 0;
2392}
2393
2394
2395
6ca308d4 2396static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2397{
2398 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2399 udelay(200);
2400 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2401 udelay(200);
531af462
AH		 2402 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) {
2403 /* Limit active ADCs and DACs to 6; */
2404 /* Note: DXR extension not supported */
2405 pci_write_config_byte(ice->pci, 0x60, 0x0a);
2406 } else {
2407 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2408 }
1da177e4
LT		 2409 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2410 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2411 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2412 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2413 ice->gpio.write_mask = ice->eeprom.gpiomask;
2414 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI		 2415 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2416 ice->eeprom.gpiomask);
2417 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2418 ice->eeprom.gpiodir);
2419 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2420 ice->eeprom.gpiostate);
1da177e4
LT		 2421 } else {
2422 ice->gpio.write_mask = 0xc0;
2423 ice->gpio.direction = 0xff;
2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2425 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI		 2426 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2427 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT		 2428 }
2429 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2430 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2431 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2432 udelay(100);
2433 outb(0, ICEREG(ice, AC97_CMD));
2434 udelay(200);
2435 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2436 }
2437 snd_ice1712_set_pro_rate(ice, 48000, 1);
2438
2439 return 0;
2440}
2441
6ca308d4 2442int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2443{
2444 int err;
6ca308d4 2445 struct snd_kcontrol *kctl;
1da177e4
LT		 2446
2447 snd_assert(ice->pcm_pro != NULL, return -EIO);
2448 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2449 if (err < 0)
2450 return err;
2451 kctl->id.device = ice->pcm_pro->device;
2452 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2453 if (err < 0)
2454 return err;
2455 kctl->id.device = ice->pcm_pro->device;
2456 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2457 if (err < 0)
2458 return err;
2459 kctl->id.device = ice->pcm_pro->device;
2460 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2461 if (err < 0)
2462 return err;
2463 kctl->id.device = ice->pcm_pro->device;
2464 ice->spdif.stream_ctl = kctl;
2465 return 0;
2466}
2467
2468
6ca308d4 2469static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2470{
2471 int err;
2472
2473 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2474 if (err < 0)
2475 return err;
2476 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2477 if (err < 0)
2478 return err;
2479 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2480 if (err < 0)
2481 return err;
2482
2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2484 if (err < 0)
2485 return err;
2486 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2487 if (err < 0)
2488 return err;
2489
2490 if (ice->num_total_dacs > 0) {
6ca308d4 2491 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT		 2492 tmp.count = ice->num_total_dacs;
2493 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2494 if (err < 0)
2495 return err;
2496 }
2497
2498 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2499 if (err < 0)
2500 return err;
2501
2502 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2503 if (err < 0)
2504 return err;
2505 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2506 if (err < 0)
2507 return err;
2508
2509 return 0;
2510}
2511
6ca308d4 2512static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4
LT		 2513{
2514 if (! ice->port)
2515 goto __hw_end;
2516 /* mask all interrupts */
2517 outb(0xc0, ICEMT(ice, IRQ));
2518 outb(0xff, ICEREG(ice, IRQMASK));
2519 /* --- */
2520 __hw_end:
2521 if (ice->irq >= 0) {
2522 synchronize_irq(ice->irq);
6ca308d4 2523 free_irq(ice->irq, ice);
1da177e4
LT		 2524 }
2525 if (ice->port)
2526 pci_release_regions(ice->pci);
2527 snd_ice1712_akm4xxx_free(ice);
2528 pci_disable_device(ice->pci);
2529 kfree(ice);
2530 return 0;
2531}
2532
6ca308d4 2533static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2534{
6ca308d4 2535 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2536 return snd_ice1712_free(ice);
2537}
2538
6ca308d4 2539static int __devinit snd_ice1712_create(struct snd_card *card,
1da177e4
LT		 2540 struct pci_dev *pci,
2541 const char *modelname,
2542 int omni,
2543 int cs8427_timeout,
531af462 2544 int dxr_enable,
6ca308d4 2545 struct snd_ice1712 ** r_ice1712)
1da177e4 2546{
6ca308d4 2547 struct snd_ice1712 *ice;
1da177e4 2548 int err;
6ca308d4 2549 static struct snd_device_ops ops = {
1da177e4
LT		 2550 .dev_free = snd_ice1712_dev_free,
2551 };
2552
2553 *r_ice1712 = NULL;
2554
2555 /* enable PCI device */
2556 if ((err = pci_enable_device(pci)) < 0)
2557 return err;
2558 /* check, if we can restrict PCI DMA transfers to 28 bits */
9d2f928d
TK		 2559 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
2560 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
99b359ba 2561 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT		 2562 pci_disable_device(pci);
2563 return -ENXIO;
2564 }
2565
e560d8d8 2566 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2567 if (ice == NULL) {
2568 pci_disable_device(pci);
2569 return -ENOMEM;
2570 }
2571 ice->omni = omni ? 1 : 0;
2572 if (cs8427_timeout < 1)
2573 cs8427_timeout = 1;
2574 else if (cs8427_timeout > 1000)
2575 cs8427_timeout = 1000;
2576 ice->cs8427_timeout = cs8427_timeout;
531af462 2577 ice->dxr_enable = dxr_enable;
1da177e4 2578 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2579 mutex_init(&ice->gpio_mutex);
2580 mutex_init(&ice->i2c_mutex);
2581 mutex_init(&ice->open_mutex);
1da177e4
LT		 2582 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2583 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2584 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2585 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2586
2587 ice->spdif.cs8403_bits =
2588 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2589 0x10 | /* no emphasis */
2590 0x20); /* PCM encoder/decoder */
2591 ice->card = card;
2592 ice->pci = pci;
2593 ice->irq = -1;
2594 pci_set_master(pci);
2595 pci_write_config_word(ice->pci, 0x40, 0x807f);
2596 pci_write_config_word(ice->pci, 0x42, 0x0006);
2597 snd_ice1712_proc_init(ice);
2598 synchronize_irq(pci->irq);
2599
2600 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2601 kfree(ice);
2602 pci_disable_device(pci);
2603 return err;
2604 }
2605 ice->port = pci_resource_start(pci, 0);
2606 ice->ddma_port = pci_resource_start(pci, 1);
2607 ice->dmapath_port = pci_resource_start(pci, 2);
2608 ice->profi_port = pci_resource_start(pci, 3);
2609
6ca308d4
TI		 2610 if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
2611 "ICE1712", ice)) {
99b359ba 2612 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2613 snd_ice1712_free(ice);
2614 return -EIO;
2615 }
2616
2617 ice->irq = pci->irq;
2618
2619 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2620 snd_ice1712_free(ice);
2621 return -EIO;
2622 }
2623 if (snd_ice1712_chip_init(ice) < 0) {
2624 snd_ice1712_free(ice);
2625 return -EIO;
2626 }
2627
2628 /* unmask used interrupts */
6ca308d4
TI		 2629 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2630 ICE1712_IRQ_MPU2 : 0) |
2631 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2632 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
1da177e4
LT		 2633 ICEREG(ice, IRQMASK));
2634 outb(0x00, ICEMT(ice, IRQ));
2635
2636 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2637 snd_ice1712_free(ice);
2638 return err;
2639 }
2640
2641 snd_card_set_dev(card, &pci->dev);
2642
2643 *r_ice1712 = ice;
2644 return 0;
2645}
2646
2647
2648/*
2649 *
2650 * Registration
2651 *
2652 */
2653
2654static struct snd_ice1712_card_info no_matched __devinitdata;
2655
2656static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2657 const struct pci_device_id *pci_id)
2658{
2659 static int dev;
6ca308d4
TI		 2660 struct snd_card *card;
2661 struct snd_ice1712 *ice;
1da177e4
LT		 2662 int pcm_dev = 0, err;
2663 struct snd_ice1712_card_info **tbl, *c;
2664
2665 if (dev >= SNDRV_CARDS)
2666 return -ENODEV;
2667 if (!enable[dev]) {
2668 dev++;
2669 return -ENOENT;
2670 }
2671
2672 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2673 if (card == NULL)
2674 return -ENOMEM;
2675
2676 strcpy(card->driver, "ICE1712");
2677 strcpy(card->shortname, "ICEnsemble ICE1712");
2678
6ca308d4 2679 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
531af462
AH		 2680 cs8427_timeout[dev], dxr_enable[dev],
2681 &ice)) < 0) {
1da177e4
LT		 2682 snd_card_free(card);
2683 return err;
2684 }
2685
2686 for (tbl = card_tables; *tbl; tbl++) {
2687 for (c = *tbl; c->subvendor; c++) {
2688 if (c->subvendor == ice->eeprom.subvendor) {
2689 strcpy(card->shortname, c->name);
2690 if (c->driver) /* specific driver? */
2691 strcpy(card->driver, c->driver);
2692 if (c->chip_init) {
2693 if ((err = c->chip_init(ice)) < 0) {
2694 snd_card_free(card);
2695 return err;
2696 }
2697 }
2698 goto __found;
2699 }
2700 }
2701 }
2702 c = &no_matched;
2703 __found:
2704
2705 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2706 snd_card_free(card);
2707 return err;
2708 }
2709
2710 if (ice_has_con_ac97(ice))
2711 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2712 snd_card_free(card);
2713 return err;
2714 }
2715
2716 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2717 snd_card_free(card);
2718 return err;
2719 }
2720
2721 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2722 snd_card_free(card);
2723 return err;
2724 }
2725
2726 if (c->build_controls) {
2727 if ((err = c->build_controls(ice)) < 0) {
2728 snd_card_free(card);
2729 return err;
2730 }
2731 }
2732
2733 if (ice_has_con_ac97(ice))
2734 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2735 snd_card_free(card);
2736 return err;
2737 }
2738
2739 if (! c->no_mpu401) {
2740 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2741 ICEREG(ice, MPU1_CTRL), 1,
2742 ice->irq, 0,
2743 &ice->rmidi[0])) < 0) {
2744 snd_card_free(card);
2745 return err;
2746 }
2747
2748 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
2749 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2750 ICEREG(ice, MPU2_CTRL), 1,
2751 ice->irq, 0,
2752 &ice->rmidi[1])) < 0) {
2753 snd_card_free(card);
2754 return err;
2755 }
2756 }
2757
e957ebf1
JK		 2758 snd_ice1712_set_input_clock_source(ice, 0);
2759
1da177e4
LT		 2760 sprintf(card->longname, "%s at 0x%lx, irq %i",
2761 card->shortname, ice->port, ice->irq);
2762
2763 if ((err = snd_card_register(card)) < 0) {
2764 snd_card_free(card);
2765 return err;
2766 }
2767 pci_set_drvdata(pci, card);
2768 dev++;
2769 return 0;
2770}
2771
2772static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2773{
2774 snd_card_free(pci_get_drvdata(pci));
2775 pci_set_drvdata(pci, NULL);
2776}
2777
2778static struct pci_driver driver = {
2779 .name = "ICE1712",
2780 .id_table = snd_ice1712_ids,
2781 .probe = snd_ice1712_probe,
2782 .remove = __devexit_p(snd_ice1712_remove),
2783};
2784
2785static int __init alsa_card_ice1712_init(void)
2786{
01d25d46 2787 return pci_register_driver(&driver);
1da177e4
LT		 2788}
2789
2790static void __exit alsa_card_ice1712_exit(void)
2791{
2792 pci_unregister_driver(&driver);
2793}
2794
2795module_init(alsa_card_ice1712_init)
2796module_exit(alsa_card_ice1712_exit)
Linux kernel - Deliverables
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