[ALSA] usb-audio: rename QUIRK_MIDI_MIDITECH to QUIRK_MIDI_CME
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50#include <sound/driver.h>
51#include <asm/io.h>
52#include <linux/delay.h>
53#include <linux/interrupt.h>
54#include <linux/init.h>
55#include <linux/pci.h>
56#include <linux/slab.h>
57#include <linux/moduleparam.h>
62932df8 58#include <linux/mutex.h>
1da177e4
LT
59#include <sound/core.h>
60#include <sound/cs8427.h>
61#include <sound/info.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
64
65#include <sound/asoundef.h>
66
67#include "ice1712.h"
68
69/* lowlevel routines */
70#include "delta.h"
71#include "ews.h"
72#include "hoontech.h"
73
74MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
75MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76MODULE_LICENSE("GPL");
77MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
86static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
87static char *model[SNDRV_CARDS];
88static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
89static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
90
91module_param_array(index, int, NULL, 0444);
92MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
93module_param_array(id, charp, NULL, 0444);
94MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
95module_param_array(enable, bool, NULL, 0444);
96MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
97module_param_array(omni, bool, NULL, 0444);
98MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
99module_param_array(cs8427_timeout, int, NULL, 0444);
100MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
101module_param_array(model, charp, NULL, 0444);
102MODULE_PARM_DESC(model, "Use the given board model.");
103
1da177e4
LT
104
105static struct pci_device_id snd_ice1712_ids[] = {
106 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
107 { 0, }
108};
109
110MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
111
6ca308d4
TI
112static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
113static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT
114
115static int PRO_RATE_LOCKED;
116static int PRO_RATE_RESET = 1;
117static unsigned int PRO_RATE_DEFAULT = 44100;
118
119/*
120 * Basic I/O
121 */
122
123/* check whether the clock mode is spdif-in */
6ca308d4 124static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT
125{
126 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
127}
128
6ca308d4 129static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT
130{
131 return is_spdif_master(ice) || PRO_RATE_LOCKED;
132}
133
6ca308d4 134static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
1da177e4
LT
135{
136 outb((channel << 4) | addr, ICEDS(ice, INDEX));
137 outl(data, ICEDS(ice, DATA));
138}
139
6ca308d4 140static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
1da177e4
LT
141{
142 outb((channel << 4) | addr, ICEDS(ice, INDEX));
143 return inl(ICEDS(ice, DATA));
144}
145
6ca308d4 146static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
147 unsigned short reg,
148 unsigned short val)
149{
6ca308d4 150 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
151 int tm;
152 unsigned char old_cmd = 0;
153
154 for (tm = 0; tm < 0x10000; tm++) {
155 old_cmd = inb(ICEREG(ice, AC97_CMD));
156 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
157 continue;
158 if (!(old_cmd & ICE1712_AC97_READY))
159 continue;
160 break;
161 }
162 outb(reg, ICEREG(ice, AC97_INDEX));
163 outw(val, ICEREG(ice, AC97_DATA));
164 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
165 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
166 for (tm = 0; tm < 0x10000; tm++)
167 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
168 break;
169}
170
6ca308d4 171static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT
172 unsigned short reg)
173{
6ca308d4 174 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
175 int tm;
176 unsigned char old_cmd = 0;
177
178 for (tm = 0; tm < 0x10000; tm++) {
179 old_cmd = inb(ICEREG(ice, AC97_CMD));
180 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
181 continue;
182 if (!(old_cmd & ICE1712_AC97_READY))
183 continue;
184 break;
185 }
186 outb(reg, ICEREG(ice, AC97_INDEX));
187 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
188 for (tm = 0; tm < 0x10000; tm++)
189 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
190 break;
191 if (tm >= 0x10000) /* timeout */
192 return ~0;
193 return inw(ICEREG(ice, AC97_DATA));
194}
195
196/*
197 * pro ac97 section
198 */
199
6ca308d4 200static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
201 unsigned short reg,
202 unsigned short val)
203{
6ca308d4 204 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
205 int tm;
206 unsigned char old_cmd = 0;
207
208 for (tm = 0; tm < 0x10000; tm++) {
209 old_cmd = inb(ICEMT(ice, AC97_CMD));
210 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
211 continue;
212 if (!(old_cmd & ICE1712_AC97_READY))
213 continue;
214 break;
215 }
216 outb(reg, ICEMT(ice, AC97_INDEX));
217 outw(val, ICEMT(ice, AC97_DATA));
218 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
219 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
220 for (tm = 0; tm < 0x10000; tm++)
221 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
222 break;
223}
224
225
6ca308d4 226static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT
227 unsigned short reg)
228{
6ca308d4 229 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
230 int tm;
231 unsigned char old_cmd = 0;
232
233 for (tm = 0; tm < 0x10000; tm++) {
234 old_cmd = inb(ICEMT(ice, AC97_CMD));
235 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
236 continue;
237 if (!(old_cmd & ICE1712_AC97_READY))
238 continue;
239 break;
240 }
241 outb(reg, ICEMT(ice, AC97_INDEX));
242 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
243 for (tm = 0; tm < 0x10000; tm++)
244 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
245 break;
246 if (tm >= 0x10000) /* timeout */
247 return ~0;
248 return inw(ICEMT(ice, AC97_DATA));
249}
250
251/*
252 * consumer ac97 digital mix
253 */
6ca308d4 254static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
255{
256 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
257 uinfo->count = 1;
258 uinfo->value.integer.min = 0;
259 uinfo->value.integer.max = 1;
260 return 0;
261}
262
6ca308d4 263static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 264{
6ca308d4 265 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
266
267 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
268 return 0;
269}
270
6ca308d4 271static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 272{
6ca308d4 273 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
274 unsigned char val, nval;
275
276 spin_lock_irq(&ice->reg_lock);
277 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
278 nval = val & ~ICE1712_ROUTE_AC97;
279 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
280 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
281 spin_unlock_irq(&ice->reg_lock);
282 return val != nval;
283}
284
6ca308d4 285static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
1da177e4
LT
286 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
287 .name = "Digital Mixer To AC97",
288 .info = snd_ice1712_digmix_route_ac97_info,
289 .get = snd_ice1712_digmix_route_ac97_get,
290 .put = snd_ice1712_digmix_route_ac97_put,
291};
292
293
294/*
295 * gpio operations
296 */
6ca308d4 297static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
298{
299 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
300 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
301}
302
6ca308d4 303static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
304{
305 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
306 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
307}
308
6ca308d4 309static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT
310{
311 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
312}
313
6ca308d4 314static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT
315{
316 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
317 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
318}
319
1da177e4
LT
320/*
321 *
322 * CS8427 interface
323 *
324 */
325
326/*
327 * change the input clock selection
328 * spdif_clock = 1 - IEC958 input, 0 - Envy24
329 */
6ca308d4 330static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT
331{
332 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
333 unsigned char val, nval;
334 int res = 0;
335
336 snd_i2c_lock(ice->i2c);
337 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
338 snd_i2c_unlock(ice->i2c);
339 return -EIO;
340 }
341 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
342 snd_i2c_unlock(ice->i2c);
343 return -EIO;
344 }
345 nval = val & 0xf0;
346 if (spdif_clock)
347 nval |= 0x01;
348 else
349 nval |= 0x04;
350 if (val != nval) {
351 reg[1] = nval;
352 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
353 res = -EIO;
354 } else {
355 res++;
356 }
357 }
358 snd_i2c_unlock(ice->i2c);
359 return res;
360}
361
362/*
363 * spdif callbacks
364 */
6ca308d4 365static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT
366{
367 snd_cs8427_iec958_active(ice->cs8427, 1);
368}
369
6ca308d4 370static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT
371{
372 snd_cs8427_iec958_active(ice->cs8427, 0);
373}
374
6ca308d4 375static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT
376{
377 snd_cs8427_iec958_pcm(ice->cs8427, rate);
378}
379
380/*
381 * create and initialize callbacks for cs8427 interface
382 */
6ca308d4 383int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT
384{
385 int err;
386
387 if ((err = snd_cs8427_create(ice->i2c, addr,
388 (ice->cs8427_timeout * HZ) / 1000,
389 &ice->cs8427)) < 0) {
99b359ba 390 snd_printk(KERN_ERR "CS8427 initialization failed\n");
1da177e4
LT
391 return err;
392 }
393 ice->spdif.ops.open = open_cs8427;
394 ice->spdif.ops.close = close_cs8427;
395 ice->spdif.ops.setup_rate = setup_cs8427;
396 return 0;
397}
398
e957ebf1
JK
399static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
400{
401 /* change CS8427 clock source too */
402 if (ice->cs8427)
403 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
404 /* notify ak4524 chip as well */
405 if (spdif_is_master) {
406 unsigned int i;
407 for (i = 0; i < ice->akm_codecs; i++) {
408 if (ice->akm[i].ops.set_rate_val)
409 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
410 }
411 }
412}
1da177e4
LT
413
414/*
415 * Interrupt handler
416 */
417
418static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
419{
6ca308d4 420 struct snd_ice1712 *ice = dev_id;
1da177e4
LT
421 unsigned char status;
422 int handled = 0;
423
424 while (1) {
425 status = inb(ICEREG(ice, IRQSTAT));
426 if (status == 0)
427 break;
428 handled = 1;
429 if (status & ICE1712_IRQ_MPU1) {
430 if (ice->rmidi[0])
431 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
432 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
433 status &= ~ICE1712_IRQ_MPU1;
434 }
435 if (status & ICE1712_IRQ_TIMER)
436 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
437 if (status & ICE1712_IRQ_MPU2) {
438 if (ice->rmidi[1])
439 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
440 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
441 status &= ~ICE1712_IRQ_MPU2;
442 }
443 if (status & ICE1712_IRQ_PROPCM) {
444 unsigned char mtstat = inb(ICEMT(ice, IRQ));
445 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
446 if (ice->playback_pro_substream)
447 snd_pcm_period_elapsed(ice->playback_pro_substream);
448 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
449 }
450 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
451 if (ice->capture_pro_substream)
452 snd_pcm_period_elapsed(ice->capture_pro_substream);
453 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
454 }
455 }
456 if (status & ICE1712_IRQ_FM)
457 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
458 if (status & ICE1712_IRQ_PBKDS) {
459 u32 idx;
460 u16 pbkstatus;
6ca308d4 461 struct snd_pcm_substream *substream;
1da177e4
LT
462 pbkstatus = inw(ICEDS(ice, INTSTAT));
463 //printk("pbkstatus = 0x%x\n", pbkstatus);
464 for (idx = 0; idx < 6; idx++) {
465 if ((pbkstatus & (3 << (idx * 2))) == 0)
466 continue;
467 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
468 snd_pcm_period_elapsed(substream);
469 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
470 }
471 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
472 }
473 if (status & ICE1712_IRQ_CONCAP) {
474 if (ice->capture_con_substream)
475 snd_pcm_period_elapsed(ice->capture_con_substream);
476 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
477 }
478 if (status & ICE1712_IRQ_CONPBK) {
479 if (ice->playback_con_substream)
480 snd_pcm_period_elapsed(ice->playback_con_substream);
481 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
482 }
483 }
484 return IRQ_RETVAL(handled);
485}
486
487
488/*
489 * PCM part - misc
490 */
491
6ca308d4
TI
492static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
493 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
494{
495 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
496}
497
6ca308d4 498static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
499{
500 return snd_pcm_lib_free_pages(substream);
501}
502
503/*
504 * PCM part - consumer I/O
505 */
506
6ca308d4 507static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
508 int cmd)
509{
6ca308d4 510 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
511 int result = 0;
512 u32 tmp;
513
514 spin_lock(&ice->reg_lock);
515 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
516 if (cmd == SNDRV_PCM_TRIGGER_START) {
517 tmp |= 1;
518 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
519 tmp &= ~1;
520 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
521 tmp |= 2;
522 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
523 tmp &= ~2;
524 } else {
525 result = -EINVAL;
526 }
527 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
528 spin_unlock(&ice->reg_lock);
529 return result;
530}
531
6ca308d4 532static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
533 int cmd)
534{
6ca308d4 535 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
536 int result = 0;
537 u32 tmp;
538
539 spin_lock(&ice->reg_lock);
540 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
541 if (cmd == SNDRV_PCM_TRIGGER_START) {
542 tmp |= 1;
543 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
544 tmp &= ~1;
545 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
546 tmp |= 2;
547 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
548 tmp &= ~2;
549 } else {
550 result = -EINVAL;
551 }
552 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
553 spin_unlock(&ice->reg_lock);
554 return result;
555}
556
6ca308d4 557static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
558 int cmd)
559{
6ca308d4 560 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
561 int result = 0;
562 u8 tmp;
563
564 spin_lock(&ice->reg_lock);
565 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
566 if (cmd == SNDRV_PCM_TRIGGER_START) {
567 tmp |= 1;
568 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
569 tmp &= ~1;
570 } else {
571 result = -EINVAL;
572 }
573 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
574 spin_unlock(&ice->reg_lock);
575 return result;
576}
577
6ca308d4 578static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 579{
6ca308d4
TI
580 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
581 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
582 u32 period_size, buf_size, rate, tmp;
583
584 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
585 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
586 tmp = 0x0000;
587 if (snd_pcm_format_width(runtime->format) == 16)
588 tmp |= 0x10;
589 if (runtime->channels == 2)
590 tmp |= 0x08;
591 rate = (runtime->rate * 8192) / 375;
592 if (rate > 0x000fffff)
593 rate = 0x000fffff;
594 spin_lock_irq(&ice->reg_lock);
595 outb(0, ice->ddma_port + 15);
596 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
597 outl(runtime->dma_addr, ice->ddma_port + 0);
598 outw(buf_size, ice->ddma_port + 4);
599 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
600 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
601 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
602 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
603 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
606 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
607 spin_unlock_irq(&ice->reg_lock);
608 return 0;
609}
610
6ca308d4 611static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 612{
6ca308d4
TI
613 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
614 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
615 u32 period_size, buf_size, rate, tmp, chn;
616
617 period_size = snd_pcm_lib_period_bytes(substream) - 1;
618 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
619 tmp = 0x0064;
620 if (snd_pcm_format_width(runtime->format) == 16)
621 tmp &= ~0x04;
622 if (runtime->channels == 2)
623 tmp |= 0x08;
624 rate = (runtime->rate * 8192) / 375;
625 if (rate > 0x000fffff)
626 rate = 0x000fffff;
627 ice->playback_con_active_buf[substream->number] = 0;
628 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
629 chn = substream->number * 2;
630 spin_lock_irq(&ice->reg_lock);
631 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
632 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
633 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
634 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
635 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
638 if (runtime->channels == 2) {
639 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
640 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
641 }
642 spin_unlock_irq(&ice->reg_lock);
643 return 0;
644}
645
6ca308d4 646static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 647{
6ca308d4
TI
648 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
649 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
650 u32 period_size, buf_size;
651 u8 tmp;
652
653 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
654 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
655 tmp = 0x06;
656 if (snd_pcm_format_width(runtime->format) == 16)
657 tmp &= ~0x04;
658 if (runtime->channels == 2)
659 tmp &= ~0x02;
660 spin_lock_irq(&ice->reg_lock);
661 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
662 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
663 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
664 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
665 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
666 spin_unlock_irq(&ice->reg_lock);
667 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
668 return 0;
669}
670
6ca308d4 671static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 672{
6ca308d4
TI
673 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
674 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
675 size_t ptr;
676
677 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
678 return 0;
679 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
680 if (ptr == runtime->buffer_size)
681 ptr = 0;
682 return bytes_to_frames(substream->runtime, ptr);
683}
684
6ca308d4 685static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 686{
6ca308d4 687 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
688 u8 addr;
689 size_t ptr;
690
691 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
692 return 0;
693 if (ice->playback_con_active_buf[substream->number])
694 addr = ICE1712_DSC_ADDR1;
695 else
696 addr = ICE1712_DSC_ADDR0;
697 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
698 ice->playback_con_virt_addr[substream->number];
699 if (ptr == substream->runtime->buffer_size)
700 ptr = 0;
701 return bytes_to_frames(substream->runtime, ptr);
702}
703
6ca308d4 704static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 705{
6ca308d4 706 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
707 size_t ptr;
708
709 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
710 return 0;
711 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
712 if (ptr == substream->runtime->buffer_size)
713 ptr = 0;
714 return bytes_to_frames(substream->runtime, ptr);
715}
716
6ca308d4 717static struct snd_pcm_hardware snd_ice1712_playback =
1da177e4
LT
718{
719 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
720 SNDRV_PCM_INFO_BLOCK_TRANSFER |
721 SNDRV_PCM_INFO_MMAP_VALID |
722 SNDRV_PCM_INFO_PAUSE),
723 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
724 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
725 .rate_min = 4000,
726 .rate_max = 48000,
727 .channels_min = 1,
728 .channels_max = 2,
729 .buffer_bytes_max = (64*1024),
730 .period_bytes_min = 64,
731 .period_bytes_max = (64*1024),
732 .periods_min = 1,
733 .periods_max = 1024,
734 .fifo_size = 0,
735};
736
6ca308d4 737static struct snd_pcm_hardware snd_ice1712_playback_ds =
1da177e4
LT
738{
739 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
740 SNDRV_PCM_INFO_BLOCK_TRANSFER |
741 SNDRV_PCM_INFO_MMAP_VALID |
742 SNDRV_PCM_INFO_PAUSE),
743 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
744 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
745 .rate_min = 4000,
746 .rate_max = 48000,
747 .channels_min = 1,
748 .channels_max = 2,
749 .buffer_bytes_max = (128*1024),
750 .period_bytes_min = 64,
751 .period_bytes_max = (128*1024),
752 .periods_min = 2,
753 .periods_max = 2,
754 .fifo_size = 0,
755};
756
6ca308d4 757static struct snd_pcm_hardware snd_ice1712_capture =
1da177e4
LT
758{
759 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
760 SNDRV_PCM_INFO_BLOCK_TRANSFER |
761 SNDRV_PCM_INFO_MMAP_VALID),
762 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
763 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
764 .rate_min = 4000,
765 .rate_max = 48000,
766 .channels_min = 1,
767 .channels_max = 2,
768 .buffer_bytes_max = (64*1024),
769 .period_bytes_min = 64,
770 .period_bytes_max = (64*1024),
771 .periods_min = 1,
772 .periods_max = 1024,
773 .fifo_size = 0,
774};
775
6ca308d4 776static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 777{
6ca308d4
TI
778 struct snd_pcm_runtime *runtime = substream->runtime;
779 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
780
781 ice->playback_con_substream = substream;
782 runtime->hw = snd_ice1712_playback;
783 return 0;
784}
785
6ca308d4 786static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 787{
6ca308d4
TI
788 struct snd_pcm_runtime *runtime = substream->runtime;
789 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
790 u32 tmp;
791
792 ice->playback_con_substream_ds[substream->number] = substream;
793 runtime->hw = snd_ice1712_playback_ds;
794 spin_lock_irq(&ice->reg_lock);
795 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
796 outw(tmp, ICEDS(ice, INTMASK));
797 spin_unlock_irq(&ice->reg_lock);
798 return 0;
799}
800
6ca308d4 801static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 802{
6ca308d4
TI
803 struct snd_pcm_runtime *runtime = substream->runtime;
804 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
805
806 ice->capture_con_substream = substream;
807 runtime->hw = snd_ice1712_capture;
808 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
809 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
810 runtime->hw.rate_min = 48000;
811 return 0;
812}
813
6ca308d4 814static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 815{
6ca308d4 816 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
817
818 ice->playback_con_substream = NULL;
819 return 0;
820}
821
6ca308d4 822static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 823{
6ca308d4 824 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
825 u32 tmp;
826
827 spin_lock_irq(&ice->reg_lock);
828 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
829 outw(tmp, ICEDS(ice, INTMASK));
830 spin_unlock_irq(&ice->reg_lock);
831 ice->playback_con_substream_ds[substream->number] = NULL;
832 return 0;
833}
834
6ca308d4 835static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 836{
6ca308d4 837 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
838
839 ice->capture_con_substream = NULL;
840 return 0;
841}
842
6ca308d4 843static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT
844 .open = snd_ice1712_playback_open,
845 .close = snd_ice1712_playback_close,
846 .ioctl = snd_pcm_lib_ioctl,
847 .hw_params = snd_ice1712_hw_params,
848 .hw_free = snd_ice1712_hw_free,
849 .prepare = snd_ice1712_playback_prepare,
850 .trigger = snd_ice1712_playback_trigger,
851 .pointer = snd_ice1712_playback_pointer,
852};
853
6ca308d4 854static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT
855 .open = snd_ice1712_playback_ds_open,
856 .close = snd_ice1712_playback_ds_close,
857 .ioctl = snd_pcm_lib_ioctl,
858 .hw_params = snd_ice1712_hw_params,
859 .hw_free = snd_ice1712_hw_free,
860 .prepare = snd_ice1712_playback_ds_prepare,
861 .trigger = snd_ice1712_playback_ds_trigger,
862 .pointer = snd_ice1712_playback_ds_pointer,
863};
864
6ca308d4 865static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT
866 .open = snd_ice1712_capture_open,
867 .close = snd_ice1712_capture_close,
868 .ioctl = snd_pcm_lib_ioctl,
869 .hw_params = snd_ice1712_hw_params,
870 .hw_free = snd_ice1712_hw_free,
871 .prepare = snd_ice1712_capture_prepare,
872 .trigger = snd_ice1712_capture_trigger,
873 .pointer = snd_ice1712_capture_pointer,
874};
875
6ca308d4 876static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 877{
6ca308d4 878 struct snd_pcm *pcm;
1da177e4
LT
879 int err;
880
881 if (rpcm)
882 *rpcm = NULL;
883 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
884 if (err < 0)
885 return err;
886
887 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
888 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
889
890 pcm->private_data = ice;
1da177e4
LT
891 pcm->info_flags = 0;
892 strcpy(pcm->name, "ICE1712 consumer");
893 ice->pcm = pcm;
894
895 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
896 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
897
898 if (rpcm)
899 *rpcm = pcm;
900
901 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
902
903 return 0;
904}
905
6ca308d4 906static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 907{
6ca308d4 908 struct snd_pcm *pcm;
1da177e4
LT
909 int err;
910
911 if (rpcm)
912 *rpcm = NULL;
913 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
914 if (err < 0)
915 return err;
916
917 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
918
919 pcm->private_data = ice;
1da177e4
LT
920 pcm->info_flags = 0;
921 strcpy(pcm->name, "ICE1712 consumer (DS)");
922 ice->pcm_ds = pcm;
923
924 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
925 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
926
927 if (rpcm)
928 *rpcm = pcm;
929
930 return 0;
931}
932
933/*
934 * PCM code - professional part (multitrack)
935 */
936
937static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
938 32000, 44100, 48000, 64000, 88200, 96000 };
939
6ca308d4 940static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT
941 .count = ARRAY_SIZE(rates),
942 .list = rates,
943 .mask = 0,
944};
945
6ca308d4 946static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
947 int cmd)
948{
6ca308d4 949 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
950 switch (cmd) {
951 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
952 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
953 {
954 unsigned int what;
955 unsigned int old;
956 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
957 return -EINVAL;
958 what = ICE1712_PLAYBACK_PAUSE;
959 snd_pcm_trigger_done(substream, substream);
960 spin_lock(&ice->reg_lock);
961 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
962 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
963 old |= what;
964 else
965 old &= ~what;
966 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
967 spin_unlock(&ice->reg_lock);
968 break;
969 }
970 case SNDRV_PCM_TRIGGER_START:
971 case SNDRV_PCM_TRIGGER_STOP:
972 {
973 unsigned int what = 0;
974 unsigned int old;
975 struct list_head *pos;
6ca308d4 976 struct snd_pcm_substream *s;
1da177e4
LT
977
978 snd_pcm_group_for_each(pos, substream) {
979 s = snd_pcm_group_substream_entry(pos);
980 if (s == ice->playback_pro_substream) {
981 what |= ICE1712_PLAYBACK_START;
982 snd_pcm_trigger_done(s, substream);
983 } else if (s == ice->capture_pro_substream) {
984 what |= ICE1712_CAPTURE_START_SHADOW;
985 snd_pcm_trigger_done(s, substream);
986 }
987 }
988 spin_lock(&ice->reg_lock);
989 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
990 if (cmd == SNDRV_PCM_TRIGGER_START)
991 old |= what;
992 else
993 old &= ~what;
994 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
995 spin_unlock(&ice->reg_lock);
996 break;
997 }
998 default:
999 return -EINVAL;
1000 }
1001 return 0;
1002}
1003
1004/*
1005 */
6ca308d4 1006static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT
1007{
1008 unsigned long flags;
1009 unsigned char val, old;
1010 unsigned int i;
1011
1012 switch (rate) {
1013 case 8000: val = 6; break;
1014 case 9600: val = 3; break;
1015 case 11025: val = 10; break;
1016 case 12000: val = 2; break;
1017 case 16000: val = 5; break;
1018 case 22050: val = 9; break;
1019 case 24000: val = 1; break;
1020 case 32000: val = 4; break;
1021 case 44100: val = 8; break;
1022 case 48000: val = 0; break;
1023 case 64000: val = 15; break;
1024 case 88200: val = 11; break;
1025 case 96000: val = 7; break;
1026 default:
1027 snd_BUG();
1028 val = 0;
1029 rate = 48000;
1030 break;
1031 }
1032
1033 spin_lock_irqsave(&ice->reg_lock, flags);
1034 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1035 ICE1712_PLAYBACK_PAUSE|
1036 ICE1712_PLAYBACK_START)) {
1037 __out:
1038 spin_unlock_irqrestore(&ice->reg_lock, flags);
1039 return;
1040 }
1041 if (!force && is_pro_rate_locked(ice))
1042 goto __out;
1043
1044 old = inb(ICEMT(ice, RATE));
1045 if (!force && old == val)
1046 goto __out;
1047 outb(val, ICEMT(ice, RATE));
1048 spin_unlock_irqrestore(&ice->reg_lock, flags);
1049
1050 if (ice->gpio.set_pro_rate)
1051 ice->gpio.set_pro_rate(ice, rate);
1052 for (i = 0; i < ice->akm_codecs; i++) {
1053 if (ice->akm[i].ops.set_rate_val)
1054 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1055 }
1056 if (ice->spdif.ops.setup_rate)
1057 ice->spdif.ops.setup_rate(ice, rate);
1058}
1059
6ca308d4 1060static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1061{
6ca308d4 1062 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1063
1064 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1065 spin_lock_irq(&ice->reg_lock);
1066 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1067 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1068 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1069 spin_unlock_irq(&ice->reg_lock);
1070
1071 return 0;
1072}
1073
6ca308d4
TI
1074static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1075 struct snd_pcm_hw_params *hw_params)
1da177e4 1076{
6ca308d4 1077 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1078
1079 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1080 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1081}
1082
6ca308d4 1083static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1084{
6ca308d4 1085 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1086
1087 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1088 spin_lock_irq(&ice->reg_lock);
1089 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1090 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1091 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1092 spin_unlock_irq(&ice->reg_lock);
1093 return 0;
1094}
1095
6ca308d4
TI
1096static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1097 struct snd_pcm_hw_params *hw_params)
1da177e4 1098{
6ca308d4 1099 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1100
1101 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1102 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1103}
1104
6ca308d4 1105static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1106{
6ca308d4 1107 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1108 size_t ptr;
1109
1110 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1111 return 0;
1112 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1113 if (ptr == substream->runtime->buffer_size)
1114 ptr = 0;
1115 return bytes_to_frames(substream->runtime, ptr);
1116}
1117
6ca308d4 1118static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1119{
6ca308d4 1120 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1121 size_t ptr;
1122
1123 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1124 return 0;
1125 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1126 if (ptr == substream->runtime->buffer_size)
1127 ptr = 0;
1128 return bytes_to_frames(substream->runtime, ptr);
1129}
1130
6ca308d4 1131static struct snd_pcm_hardware snd_ice1712_playback_pro =
1da177e4
LT
1132{
1133 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1134 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1135 SNDRV_PCM_INFO_MMAP_VALID |
1136 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1137 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1138 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1139 .rate_min = 4000,
1140 .rate_max = 96000,
1141 .channels_min = 10,
1142 .channels_max = 10,
1143 .buffer_bytes_max = (256*1024),
1144 .period_bytes_min = 10 * 4 * 2,
1145 .period_bytes_max = 131040,
1146 .periods_min = 1,
1147 .periods_max = 1024,
1148 .fifo_size = 0,
1149};
1150
6ca308d4 1151static struct snd_pcm_hardware snd_ice1712_capture_pro =
1da177e4
LT
1152{
1153 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1154 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1155 SNDRV_PCM_INFO_MMAP_VALID |
1156 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1157 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1158 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1159 .rate_min = 4000,
1160 .rate_max = 96000,
1161 .channels_min = 12,
1162 .channels_max = 12,
1163 .buffer_bytes_max = (256*1024),
1164 .period_bytes_min = 12 * 4 * 2,
1165 .period_bytes_max = 131040,
1166 .periods_min = 1,
1167 .periods_max = 1024,
1168 .fifo_size = 0,
1169};
1170
6ca308d4 1171static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1172{
6ca308d4
TI
1173 struct snd_pcm_runtime *runtime = substream->runtime;
1174 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1175
1176 ice->playback_pro_substream = substream;
1177 runtime->hw = snd_ice1712_playback_pro;
1178 snd_pcm_set_sync(substream);
1179 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1180 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1181
1182 if (ice->spdif.ops.open)
1183 ice->spdif.ops.open(ice, substream);
1184
1185 return 0;
1186}
1187
6ca308d4 1188static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1189{
6ca308d4
TI
1190 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1191 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1192
1193 ice->capture_pro_substream = substream;
1194 runtime->hw = snd_ice1712_capture_pro;
1195 snd_pcm_set_sync(substream);
1196 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1197 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1198 return 0;
1199}
1200
6ca308d4 1201static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1202{
6ca308d4 1203 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1204
1205 if (PRO_RATE_RESET)
1206 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1207 ice->playback_pro_substream = NULL;
1208 if (ice->spdif.ops.close)
1209 ice->spdif.ops.close(ice, substream);
1210
1211 return 0;
1212}
1213
6ca308d4 1214static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1215{
6ca308d4 1216 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1217
1218 if (PRO_RATE_RESET)
1219 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1220 ice->capture_pro_substream = NULL;
1221 return 0;
1222}
1223
6ca308d4 1224static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT
1225 .open = snd_ice1712_playback_pro_open,
1226 .close = snd_ice1712_playback_pro_close,
1227 .ioctl = snd_pcm_lib_ioctl,
1228 .hw_params = snd_ice1712_playback_pro_hw_params,
1229 .hw_free = snd_ice1712_hw_free,
1230 .prepare = snd_ice1712_playback_pro_prepare,
1231 .trigger = snd_ice1712_pro_trigger,
1232 .pointer = snd_ice1712_playback_pro_pointer,
1233};
1234
6ca308d4 1235static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT
1236 .open = snd_ice1712_capture_pro_open,
1237 .close = snd_ice1712_capture_pro_close,
1238 .ioctl = snd_pcm_lib_ioctl,
1239 .hw_params = snd_ice1712_capture_pro_hw_params,
1240 .hw_free = snd_ice1712_hw_free,
1241 .prepare = snd_ice1712_capture_pro_prepare,
1242 .trigger = snd_ice1712_pro_trigger,
1243 .pointer = snd_ice1712_capture_pro_pointer,
1244};
1245
6ca308d4 1246static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 1247{
6ca308d4 1248 struct snd_pcm *pcm;
1da177e4
LT
1249 int err;
1250
1251 if (rpcm)
1252 *rpcm = NULL;
1253 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1254 if (err < 0)
1255 return err;
1256
1257 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1258 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1259
1260 pcm->private_data = ice;
1da177e4
LT
1261 pcm->info_flags = 0;
1262 strcpy(pcm->name, "ICE1712 multi");
1263
1264 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1265 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1266
1267 ice->pcm_pro = pcm;
1268 if (rpcm)
1269 *rpcm = pcm;
1270
1271 if (ice->cs8427) {
1272 /* assign channels to iec958 */
1273 err = snd_cs8427_iec958_build(ice->cs8427,
1274 pcm->streams[0].substream,
1275 pcm->streams[1].substream);
1276 if (err < 0)
1277 return err;
1278 }
1279
1280 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1281 return err;
1282 return 0;
1283}
1284
1285/*
1286 * Mixer section
1287 */
1288
6ca308d4 1289static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT
1290{
1291 unsigned int vol = ice->pro_volumes[index];
1292 unsigned short val = 0;
1293
1294 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1295 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1296 outb(index, ICEMT(ice, MONITOR_INDEX));
1297 outw(val, ICEMT(ice, MONITOR_VOLUME));
1298}
1299
6ca308d4 1300static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1301{
1302 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1303 uinfo->count = 2;
1304 uinfo->value.integer.min = 0;
1305 uinfo->value.integer.max = 1;
1306 return 0;
1307}
1308
6ca308d4 1309static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1310{
6ca308d4 1311 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1312 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1313
1314 spin_lock_irq(&ice->reg_lock);
1315 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1316 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1317 spin_unlock_irq(&ice->reg_lock);
1318 return 0;
1319}
1320
6ca308d4 1321static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1322{
6ca308d4 1323 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1324 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1325 unsigned int nval, change;
1326
1327 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1328 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1329 spin_lock_irq(&ice->reg_lock);
1330 nval |= ice->pro_volumes[index] & ~0x80008000;
1331 change = nval != ice->pro_volumes[index];
1332 ice->pro_volumes[index] = nval;
1333 snd_ice1712_update_volume(ice, index);
1334 spin_unlock_irq(&ice->reg_lock);
1335 return change;
1336}
1337
6ca308d4 1338static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1339{
1340 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1341 uinfo->count = 2;
1342 uinfo->value.integer.min = 0;
1343 uinfo->value.integer.max = 96;
1344 return 0;
1345}
1346
6ca308d4 1347static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1348{
6ca308d4 1349 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1350 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1351
1352 spin_lock_irq(&ice->reg_lock);
1353 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1354 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1355 spin_unlock_irq(&ice->reg_lock);
1356 return 0;
1357}
1358
6ca308d4 1359static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1360{
6ca308d4 1361 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1362 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1363 unsigned int nval, change;
1364
1365 nval = (ucontrol->value.integer.value[0] & 127) |
1366 ((ucontrol->value.integer.value[1] & 127) << 16);
1367 spin_lock_irq(&ice->reg_lock);
1368 nval |= ice->pro_volumes[index] & ~0x007f007f;
1369 change = nval != ice->pro_volumes[index];
1370 ice->pro_volumes[index] = nval;
1371 snd_ice1712_update_volume(ice, index);
1372 spin_unlock_irq(&ice->reg_lock);
1373 return change;
1374}
1375
1376
6ca308d4 1377static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1da177e4
LT
1378 {
1379 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1380 .name = "Multi Playback Switch",
1381 .info = snd_ice1712_pro_mixer_switch_info,
1382 .get = snd_ice1712_pro_mixer_switch_get,
1383 .put = snd_ice1712_pro_mixer_switch_put,
1384 .private_value = 0,
1385 .count = 10,
1386 },
1387 {
1388 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1389 .name = "Multi Playback Volume",
1390 .info = snd_ice1712_pro_mixer_volume_info,
1391 .get = snd_ice1712_pro_mixer_volume_get,
1392 .put = snd_ice1712_pro_mixer_volume_put,
1393 .private_value = 0,
1394 .count = 10,
1395 },
1396};
1397
6ca308d4 1398static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1da177e4
LT
1399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1400 .name = "H/W Multi Capture Switch",
1401 .info = snd_ice1712_pro_mixer_switch_info,
1402 .get = snd_ice1712_pro_mixer_switch_get,
1403 .put = snd_ice1712_pro_mixer_switch_put,
1404 .private_value = 10,
1405};
1406
6ca308d4 1407static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1da177e4 1408 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1409 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1da177e4
LT
1410 .info = snd_ice1712_pro_mixer_switch_info,
1411 .get = snd_ice1712_pro_mixer_switch_get,
1412 .put = snd_ice1712_pro_mixer_switch_put,
1413 .private_value = 18,
1414 .count = 2,
1415};
1416
6ca308d4 1417static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1da177e4
LT
1418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1419 .name = "H/W Multi Capture Volume",
1420 .info = snd_ice1712_pro_mixer_volume_info,
1421 .get = snd_ice1712_pro_mixer_volume_get,
1422 .put = snd_ice1712_pro_mixer_volume_put,
1423 .private_value = 10,
1424};
1425
6ca308d4 1426static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1da177e4 1427 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1428 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1da177e4
LT
1429 .info = snd_ice1712_pro_mixer_volume_info,
1430 .get = snd_ice1712_pro_mixer_volume_get,
1431 .put = snd_ice1712_pro_mixer_volume_put,
1432 .private_value = 18,
1433 .count = 2,
1434};
1435
6ca308d4 1436static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1437{
6ca308d4 1438 struct snd_card *card = ice->card;
1da177e4
LT
1439 unsigned int idx;
1440 int err;
1441
1442 /* multi-channel mixer */
1443 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1444 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1445 if (err < 0)
1446 return err;
1447 }
1448
1449 if (ice->num_total_adcs > 0) {
6ca308d4 1450 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT
1451 tmp.count = ice->num_total_adcs;
1452 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1453 if (err < 0)
1454 return err;
1455 }
1456
1457 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1458 if (err < 0)
1459 return err;
1460
1461 if (ice->num_total_adcs > 0) {
6ca308d4 1462 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT
1463 tmp.count = ice->num_total_adcs;
1464 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1465 if (err < 0)
1466 return err;
1467 }
1468
1469 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1470 if (err < 0)
1471 return err;
1472
1473 /* initialize volumes */
1474 for (idx = 0; idx < 10; idx++) {
1475 ice->pro_volumes[idx] = 0x80008000; /* mute */
1476 snd_ice1712_update_volume(ice, idx);
1477 }
1478 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1479 ice->pro_volumes[idx] = 0x80008000; /* mute */
1480 snd_ice1712_update_volume(ice, idx);
1481 }
1482 for (idx = 18; idx < 20; idx++) {
1483 ice->pro_volumes[idx] = 0x80008000; /* mute */
1484 snd_ice1712_update_volume(ice, idx);
1485 }
1486 return 0;
1487}
1488
6ca308d4 1489static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1490{
6ca308d4 1491 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
1492 ice->ac97 = NULL;
1493}
1494
6ca308d4 1495static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT
1496{
1497 int err, bus_num = 0;
6ca308d4
TI
1498 struct snd_ac97_template ac97;
1499 struct snd_ac97_bus *pbus;
1500 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT
1501 .write = snd_ice1712_ac97_write,
1502 .read = snd_ice1712_ac97_read,
1503 };
6ca308d4 1504 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT
1505 .write = snd_ice1712_pro_ac97_write,
1506 .read = snd_ice1712_pro_ac97_read,
1507 };
1508
1509 if (ice_has_con_ac97(ice)) {
1510 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1511 return err;
1512 memset(&ac97, 0, sizeof(ac97));
1513 ac97.private_data = ice;
1514 ac97.private_free = snd_ice1712_mixer_free_ac97;
1515 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1516 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1517 else {
1518 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1519 return err;
1520 return 0;
1521 }
1522 }
1523
1524 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1525 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1526 return err;
1527 memset(&ac97, 0, sizeof(ac97));
1528 ac97.private_data = ice;
1529 ac97.private_free = snd_ice1712_mixer_free_ac97;
1530 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1531 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1532 else
1533 return 0;
1534 }
1535 /* I2S mixer only */
1536 strcat(ice->card->mixername, "ICE1712 - multitrack");
1537 return 0;
1538}
1539
1540/*
1541 *
1542 */
1543
6ca308d4 1544static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT
1545{
1546 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1547}
1548
6ca308d4
TI
1549static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1550 struct snd_info_buffer *buffer)
1da177e4 1551{
6ca308d4 1552 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT
1553 unsigned int idx;
1554
1555 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1556 snd_iprintf(buffer, "EEPROM:\n");
1557
1558 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1559 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1560 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1561 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1562 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1563 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1564 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1565 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1566 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1567 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1568 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1569 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1570 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1571 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1572 for (idx = 0; idx < 4; idx++)
1573 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1574 for (idx = 0; idx < 4; idx++)
1575 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1576 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1577 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1578
1579 snd_iprintf(buffer, "\nRegisters:\n");
1580 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1581 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1582 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1583 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1584}
1585
6ca308d4 1586static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1da177e4 1587{
6ca308d4 1588 struct snd_info_entry *entry;
1da177e4
LT
1589
1590 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1591 snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
1592}
1593
1594/*
1595 *
1596 */
1597
6ca308d4
TI
1598static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1599 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1600{
1601 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1602 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT
1603 return 0;
1604}
1605
6ca308d4
TI
1606static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1607 struct snd_ctl_elem_value *ucontrol)
1da177e4 1608{
6ca308d4 1609 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1610
1611 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1612 return 0;
1613}
1614
6ca308d4 1615static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1da177e4
LT
1616 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1617 .name = "ICE1712 EEPROM",
1618 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1619 .info = snd_ice1712_eeprom_info,
1620 .get = snd_ice1712_eeprom_get
1621};
1622
1623/*
1624 */
6ca308d4
TI
1625static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1627{
1628 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1629 uinfo->count = 1;
1630 return 0;
1631}
1632
6ca308d4
TI
1633static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1634 struct snd_ctl_elem_value *ucontrol)
1da177e4 1635{
6ca308d4 1636 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1637 if (ice->spdif.ops.default_get)
1638 ice->spdif.ops.default_get(ice, ucontrol);
1639 return 0;
1640}
1641
6ca308d4
TI
1642static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1da177e4 1644{
6ca308d4 1645 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1646 if (ice->spdif.ops.default_put)
1647 return ice->spdif.ops.default_put(ice, ucontrol);
1648 return 0;
1649}
1650
6ca308d4 1651static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1da177e4
LT
1652{
1653 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1654 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1655 .info = snd_ice1712_spdif_info,
1656 .get = snd_ice1712_spdif_default_get,
1657 .put = snd_ice1712_spdif_default_put
1658};
1659
6ca308d4
TI
1660static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1da177e4 1662{
6ca308d4 1663 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1664 if (ice->spdif.ops.default_get) {
1665 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1666 IEC958_AES0_PROFESSIONAL |
1667 IEC958_AES0_CON_NOT_COPYRIGHT |
1668 IEC958_AES0_CON_EMPHASIS;
1669 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1670 IEC958_AES1_CON_CATEGORY;
1671 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1672 } else {
1673 ucontrol->value.iec958.status[0] = 0xff;
1674 ucontrol->value.iec958.status[1] = 0xff;
1675 ucontrol->value.iec958.status[2] = 0xff;
1676 ucontrol->value.iec958.status[3] = 0xff;
1677 ucontrol->value.iec958.status[4] = 0xff;
1678 }
1679 return 0;
1680}
1681
6ca308d4
TI
1682static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol)
1da177e4 1684{
6ca308d4 1685 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1686 if (ice->spdif.ops.default_get) {
1687 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1688 IEC958_AES0_PROFESSIONAL |
1689 IEC958_AES0_PRO_FS |
1690 IEC958_AES0_PRO_EMPHASIS;
1691 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1692 } else {
1693 ucontrol->value.iec958.status[0] = 0xff;
1694 ucontrol->value.iec958.status[1] = 0xff;
1695 ucontrol->value.iec958.status[2] = 0xff;
1696 ucontrol->value.iec958.status[3] = 0xff;
1697 ucontrol->value.iec958.status[4] = 0xff;
1698 }
1699 return 0;
1700}
1701
6ca308d4 1702static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1da177e4
LT
1703{
1704 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1705 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1706 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1707 .info = snd_ice1712_spdif_info,
1708 .get = snd_ice1712_spdif_maskc_get,
1709};
1710
6ca308d4 1711static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1da177e4
LT
1712{
1713 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1714 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1715 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1716 .info = snd_ice1712_spdif_info,
1717 .get = snd_ice1712_spdif_maskp_get,
1718};
1719
6ca308d4
TI
1720static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1721 struct snd_ctl_elem_value *ucontrol)
1da177e4 1722{
6ca308d4 1723 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1724 if (ice->spdif.ops.stream_get)
1725 ice->spdif.ops.stream_get(ice, ucontrol);
1726 return 0;
1727}
1728
6ca308d4
TI
1729static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1730 struct snd_ctl_elem_value *ucontrol)
1da177e4 1731{
6ca308d4 1732 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1733 if (ice->spdif.ops.stream_put)
1734 return ice->spdif.ops.stream_put(ice, ucontrol);
1735 return 0;
1736}
1737
6ca308d4 1738static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1da177e4 1739{
6ca308d4
TI
1740 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1741 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4
LT
1742 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1743 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1744 .info = snd_ice1712_spdif_info,
1745 .get = snd_ice1712_spdif_stream_get,
1746 .put = snd_ice1712_spdif_stream_put
1747};
1748
6ca308d4
TI
1749int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
1750 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1751{
1752 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1753 uinfo->count = 1;
1754 uinfo->value.integer.min = 0;
1755 uinfo->value.integer.max = 1;
1756 return 0;
1757}
1758
6ca308d4
TI
1759int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1760 struct snd_ctl_elem_value *ucontrol)
1da177e4 1761{
6ca308d4 1762 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1763 unsigned char mask = kcontrol->private_value & 0xff;
1764 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1765
1766 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI
1767 ucontrol->value.integer.value[0] =
1768 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT
1769 snd_ice1712_restore_gpio_status(ice);
1770 return 0;
1771}
1772
6ca308d4
TI
1773int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1774 struct snd_ctl_elem_value *ucontrol)
1da177e4 1775{
6ca308d4 1776 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1777 unsigned char mask = kcontrol->private_value & 0xff;
1778 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1779 unsigned int val, nval;
1780
1781 if (kcontrol->private_value & (1 << 31))
1782 return -EPERM;
1783 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1784 snd_ice1712_save_gpio_status(ice);
1785 val = snd_ice1712_gpio_read(ice);
1786 nval |= val & ~mask;
1787 if (val != nval)
1788 snd_ice1712_gpio_write(ice, nval);
1789 snd_ice1712_restore_gpio_status(ice);
1790 return val != nval;
1791}
1792
1793/*
1794 * rate
1795 */
6ca308d4
TI
1796static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1797 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1798{
1799 static char *texts[] = {
1800 "8000", /* 0: 6 */
1801 "9600", /* 1: 3 */
1802 "11025", /* 2: 10 */
1803 "12000", /* 3: 2 */
1804 "16000", /* 4: 5 */
1805 "22050", /* 5: 9 */
1806 "24000", /* 6: 1 */
1807 "32000", /* 7: 4 */
1808 "44100", /* 8: 8 */
1809 "48000", /* 9: 0 */
1810 "64000", /* 10: 15 */
1811 "88200", /* 11: 11 */
1812 "96000", /* 12: 7 */
1813 "IEC958 Input", /* 13: -- */
1814 };
1815 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1816 uinfo->count = 1;
1817 uinfo->value.enumerated.items = 14;
1818 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1819 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1820 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1821 return 0;
1822}
1823
6ca308d4
TI
1824static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1825 struct snd_ctl_elem_value *ucontrol)
1da177e4 1826{
6ca308d4 1827 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1828 static unsigned char xlate[16] = {
1829 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1830 };
1831 unsigned char val;
1832
1833 spin_lock_irq(&ice->reg_lock);
1834 if (is_spdif_master(ice)) {
1835 ucontrol->value.enumerated.item[0] = 13;
1836 } else {
1837 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1838 if (val == 255) {
1839 snd_BUG();
1840 val = 0;
1841 }
1842 ucontrol->value.enumerated.item[0] = val;
1843 }
1844 spin_unlock_irq(&ice->reg_lock);
1845 return 0;
1846}
1847
6ca308d4
TI
1848static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1849 struct snd_ctl_elem_value *ucontrol)
1da177e4 1850{
6ca308d4 1851 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1852 static unsigned int xrate[13] = {
1853 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1854 32000, 44100, 48000, 64000, 88200, 96000
1855 };
1856 unsigned char oval;
1857 int change = 0;
1858
1859 spin_lock_irq(&ice->reg_lock);
1860 oval = inb(ICEMT(ice, RATE));
1861 if (ucontrol->value.enumerated.item[0] == 13) {
1862 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1863 } else {
1864 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1865 spin_unlock_irq(&ice->reg_lock);
1866 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1867 spin_lock_irq(&ice->reg_lock);
1868 }
1869 change = inb(ICEMT(ice, RATE)) != oval;
1870 spin_unlock_irq(&ice->reg_lock);
1871
6ca308d4 1872 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1
JK
1873 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1874 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT
1875
1876 return change;
1877}
1878
6ca308d4 1879static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1da177e4
LT
1880 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1881 .name = "Multi Track Internal Clock",
1882 .info = snd_ice1712_pro_internal_clock_info,
1883 .get = snd_ice1712_pro_internal_clock_get,
1884 .put = snd_ice1712_pro_internal_clock_put
1885};
1886
6ca308d4
TI
1887static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1888 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1889{
1890 static char *texts[] = {
1891 "8000", /* 0: 6 */
1892 "9600", /* 1: 3 */
1893 "11025", /* 2: 10 */
1894 "12000", /* 3: 2 */
1895 "16000", /* 4: 5 */
1896 "22050", /* 5: 9 */
1897 "24000", /* 6: 1 */
1898 "32000", /* 7: 4 */
1899 "44100", /* 8: 8 */
1900 "48000", /* 9: 0 */
1901 "64000", /* 10: 15 */
1902 "88200", /* 11: 11 */
1903 "96000", /* 12: 7 */
1904 // "IEC958 Input", /* 13: -- */
1905 };
1906 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1907 uinfo->count = 1;
1908 uinfo->value.enumerated.items = 13;
1909 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1910 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1911 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1912 return 0;
1913}
1914
6ca308d4
TI
1915static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1916 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1917{
1918 int val;
1919 static unsigned int xrate[13] = {
1920 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1921 32000, 44100, 48000, 64000, 88200, 96000
1922 };
1923
1924 for (val = 0; val < 13; val++) {
1925 if (xrate[val] == PRO_RATE_DEFAULT)
1926 break;
1927 }
1928
1929 ucontrol->value.enumerated.item[0] = val;
1930 return 0;
1931}
1932
6ca308d4
TI
1933static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1934 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1935{
1936 static unsigned int xrate[13] = {
1937 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1938 32000, 44100, 48000, 64000, 88200, 96000
1939 };
1940 unsigned char oval;
1941 int change = 0;
1942
1943 oval = PRO_RATE_DEFAULT;
1944 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1945 change = PRO_RATE_DEFAULT != oval;
1946
1947 return change;
1948}
1949
6ca308d4 1950static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1da177e4
LT
1951 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1952 .name = "Multi Track Internal Clock Default",
1953 .info = snd_ice1712_pro_internal_clock_default_info,
1954 .get = snd_ice1712_pro_internal_clock_default_get,
1955 .put = snd_ice1712_pro_internal_clock_default_put
1956};
1957
6ca308d4
TI
1958static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1959 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1960{
1961 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1962 uinfo->count = 1;
1963 uinfo->value.integer.min = 0;
1964 uinfo->value.integer.max = 1;
1965 return 0;
1966}
1967
6ca308d4
TI
1968static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1969 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1970{
1971 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1972 return 0;
1973}
1974
6ca308d4
TI
1975static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1976 struct snd_ctl_elem_value *ucontrol)
1da177e4 1977{
6ca308d4 1978 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1979 int change = 0, nval;
1980
1981 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1982 spin_lock_irq(&ice->reg_lock);
1983 change = PRO_RATE_LOCKED != nval;
1984 PRO_RATE_LOCKED = nval;
1985 spin_unlock_irq(&ice->reg_lock);
1986 return change;
1987}
1988
6ca308d4 1989static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1da177e4
LT
1990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1991 .name = "Multi Track Rate Locking",
1992 .info = snd_ice1712_pro_rate_locking_info,
1993 .get = snd_ice1712_pro_rate_locking_get,
1994 .put = snd_ice1712_pro_rate_locking_put
1995};
1996
6ca308d4
TI
1997static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
1998 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1999{
2000 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2001 uinfo->count = 1;
2002 uinfo->value.integer.min = 0;
2003 uinfo->value.integer.max = 1;
2004 return 0;
2005}
2006
6ca308d4
TI
2007static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2008 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
2009{
2010 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2011 return 0;
2012}
2013
6ca308d4
TI
2014static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
1da177e4 2016{
6ca308d4 2017 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2018 int change = 0, nval;
2019
2020 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2021 spin_lock_irq(&ice->reg_lock);
2022 change = PRO_RATE_RESET != nval;
2023 PRO_RATE_RESET = nval;
2024 spin_unlock_irq(&ice->reg_lock);
2025 return change;
2026}
2027
6ca308d4 2028static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
1da177e4
LT
2029 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2030 .name = "Multi Track Rate Reset",
2031 .info = snd_ice1712_pro_rate_reset_info,
2032 .get = snd_ice1712_pro_rate_reset_get,
2033 .put = snd_ice1712_pro_rate_reset_put
2034};
2035
2036/*
2037 * routing
2038 */
6ca308d4
TI
2039static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2040 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2041{
2042 static char *texts[] = {
2043 "PCM Out", /* 0 */
2044 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2045 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2046 "IEC958 In L", "IEC958 In R", /* 9-10 */
2047 "Digital Mixer", /* 11 - optional */
2048 };
2049
2050 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2051 uinfo->count = 1;
6ca308d4
TI
2052 uinfo->value.enumerated.items =
2053 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT
2054 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2055 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2056 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2057 return 0;
2058}
2059
6ca308d4
TI
2060static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2061 struct snd_ctl_elem_value *ucontrol)
1da177e4 2062{
6ca308d4 2063 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2064 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2065 unsigned int val, cval;
2066
2067 spin_lock_irq(&ice->reg_lock);
2068 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2069 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2070 spin_unlock_irq(&ice->reg_lock);
2071
2072 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2073 val &= 3;
2074 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2075 if (val == 1 && idx < 2)
2076 ucontrol->value.enumerated.item[0] = 11;
2077 else if (val == 2)
2078 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2079 else if (val == 3)
2080 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2081 else
2082 ucontrol->value.enumerated.item[0] = 0;
2083 return 0;
2084}
2085
6ca308d4
TI
2086static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_value *ucontrol)
1da177e4 2088{
6ca308d4 2089 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2090 int change, shift;
2091 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2092 unsigned int val, old_val, nval;
2093
2094 /* update PSDOUT */
2095 if (ucontrol->value.enumerated.item[0] >= 11)
2096 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2097 else if (ucontrol->value.enumerated.item[0] >= 9)
2098 nval = 3; /* spdif in */
2099 else if (ucontrol->value.enumerated.item[0] >= 1)
2100 nval = 2; /* analog in */
2101 else
2102 nval = 0; /* pcm */
2103 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2104 spin_lock_irq(&ice->reg_lock);
2105 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2106 val &= ~(0x03 << shift);
2107 val |= nval << shift;
2108 change = val != old_val;
2109 if (change)
2110 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2111 spin_unlock_irq(&ice->reg_lock);
2112 if (nval < 2) /* dig mixer of pcm */
2113 return change;
2114
2115 /* update CAPTURE */
2116 spin_lock_irq(&ice->reg_lock);
2117 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2118 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2119 if (nval == 2) { /* analog in */
2120 nval = ucontrol->value.enumerated.item[0] - 1;
2121 val &= ~(0x07 << shift);
2122 val |= nval << shift;
2123 } else { /* spdif in */
2124 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2125 val &= ~(0x08 << shift);
2126 val |= nval << shift;
2127 }
2128 if (val != old_val) {
2129 change = 1;
2130 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2131 }
2132 spin_unlock_irq(&ice->reg_lock);
2133 return change;
2134}
2135
6ca308d4
TI
2136static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2137 struct snd_ctl_elem_value *ucontrol)
1da177e4 2138{
6ca308d4 2139 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2140 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2141 unsigned int val, cval;
2142 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2143 cval = (val >> (idx * 4 + 8)) & 0x0f;
2144 val = (val >> (idx * 2)) & 0x03;
2145 if (val == 1)
2146 ucontrol->value.enumerated.item[0] = 11;
2147 else if (val == 2)
2148 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2149 else if (val == 3)
2150 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2151 else
2152 ucontrol->value.enumerated.item[0] = 0;
2153 return 0;
2154}
2155
6ca308d4
TI
2156static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2157 struct snd_ctl_elem_value *ucontrol)
1da177e4 2158{
6ca308d4 2159 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2160 int change, shift;
2161 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2162 unsigned int val, old_val, nval;
2163
2164 /* update SPDOUT */
2165 spin_lock_irq(&ice->reg_lock);
2166 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2167 if (ucontrol->value.enumerated.item[0] >= 11)
2168 nval = 1;
2169 else if (ucontrol->value.enumerated.item[0] >= 9)
2170 nval = 3;
2171 else if (ucontrol->value.enumerated.item[0] >= 1)
2172 nval = 2;
2173 else
2174 nval = 0;
2175 shift = idx * 2;
2176 val &= ~(0x03 << shift);
2177 val |= nval << shift;
2178 shift = idx * 4 + 8;
2179 if (nval == 2) {
2180 nval = ucontrol->value.enumerated.item[0] - 1;
2181 val &= ~(0x07 << shift);
2182 val |= nval << shift;
2183 } else if (nval == 3) {
2184 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2185 val &= ~(0x08 << shift);
2186 val |= nval << shift;
2187 }
2188 change = val != old_val;
2189 if (change)
2190 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2191 spin_unlock_irq(&ice->reg_lock);
2192 return change;
2193}
2194
6ca308d4 2195static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
1da177e4
LT
2196 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2197 .name = "H/W Playback Route",
2198 .info = snd_ice1712_pro_route_info,
2199 .get = snd_ice1712_pro_route_analog_get,
2200 .put = snd_ice1712_pro_route_analog_put,
2201};
2202
6ca308d4 2203static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
1da177e4 2204 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 2205 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1da177e4
LT
2206 .info = snd_ice1712_pro_route_info,
2207 .get = snd_ice1712_pro_route_spdif_get,
2208 .put = snd_ice1712_pro_route_spdif_put,
2209 .count = 2,
2210};
2211
2212
6ca308d4
TI
2213static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2214 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2215{
2216 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2217 uinfo->count = 1;
2218 uinfo->value.integer.min = 0;
2219 uinfo->value.integer.max = 255;
2220 return 0;
2221}
2222
6ca308d4
TI
2223static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2224 struct snd_ctl_elem_value *ucontrol)
1da177e4 2225{
6ca308d4 2226 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2227
2228 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2229 return 0;
2230}
2231
6ca308d4
TI
2232static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2233 struct snd_ctl_elem_value *ucontrol)
1da177e4 2234{
6ca308d4 2235 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2236 int change;
2237
2238 spin_lock_irq(&ice->reg_lock);
2239 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2240 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2241 spin_unlock_irq(&ice->reg_lock);
2242 return change;
2243}
2244
6ca308d4 2245static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
1da177e4
LT
2246 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2247 .name = "Multi Track Volume Rate",
2248 .info = snd_ice1712_pro_volume_rate_info,
2249 .get = snd_ice1712_pro_volume_rate_get,
2250 .put = snd_ice1712_pro_volume_rate_put
2251};
2252
6ca308d4
TI
2253static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2254 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
2255{
2256 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2257 uinfo->count = 22;
2258 uinfo->value.integer.min = 0;
2259 uinfo->value.integer.max = 255;
2260 return 0;
2261}
2262
6ca308d4
TI
2263static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2264 struct snd_ctl_elem_value *ucontrol)
1da177e4 2265{
6ca308d4 2266 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
2267 int idx;
2268
2269 spin_lock_irq(&ice->reg_lock);
2270 for (idx = 0; idx < 22; idx++) {
2271 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2272 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2273 }
2274 spin_unlock_irq(&ice->reg_lock);
2275 return 0;
2276}
2277
6ca308d4 2278static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
1da177e4
LT
2279 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2280 .name = "Multi Track Peak",
2281 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2282 .info = snd_ice1712_pro_peak_info,
2283 .get = snd_ice1712_pro_peak_get
2284};
2285
2286/*
2287 *
2288 */
2289
2290/*
2291 * list of available boards
2292 */
2293static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2294 snd_ice1712_hoontech_cards,
2295 snd_ice1712_delta_cards,
2296 snd_ice1712_ews_cards,
2297 NULL,
2298};
2299
6ca308d4 2300static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
1da177e4
LT
2301 unsigned char dev,
2302 unsigned char addr)
2303{
2304 long t = 0x10000;
2305
2306 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2307 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2308 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2309 return inb(ICEREG(ice, I2C_DATA));
2310}
2311
6ca308d4
TI
2312static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2313 const char *modelname)
1da177e4
LT
2314{
2315 int dev = 0xa0; /* EEPROM device address */
2316 unsigned int i, size;
2317 struct snd_ice1712_card_info **tbl, *c;
2318
2319 if (! modelname || ! *modelname) {
2320 ice->eeprom.subvendor = 0;
2321 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2322 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2323 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2324 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2325 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI
2326 if (ice->eeprom.subvendor == 0 ||
2327 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT
2328 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2329 u16 vendor, device;
2330 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2331 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2332 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2333 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2334 printk(KERN_ERR "ice1712: No valid ID is found\n");
2335 return -ENXIO;
2336 }
2337 }
2338 }
2339 for (tbl = card_tables; *tbl; tbl++) {
2340 for (c = *tbl; c->subvendor; c++) {
2341 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2342 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2343 ice->eeprom.subvendor = c->subvendor;
2344 } else if (c->subvendor != ice->eeprom.subvendor)
2345 continue;
2346 if (! c->eeprom_size || ! c->eeprom_data)
2347 goto found;
2348 /* if the EEPROM is given by the driver, use it */
2349 snd_printdd("using the defined eeprom..\n");
2350 ice->eeprom.version = 1;
2351 ice->eeprom.size = c->eeprom_size + 6;
2352 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2353 goto read_skipped;
2354 }
2355 }
6ca308d4
TI
2356 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2357 ice->eeprom.subvendor);
1da177e4
LT
2358
2359 found:
2360 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2361 if (ice->eeprom.size < 6)
2362 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2363 else if (ice->eeprom.size > 32) {
99b359ba 2364 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT
2365 return -EIO;
2366 }
2367 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2368 if (ice->eeprom.version != 1) {
6ca308d4
TI
2369 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2370 ice->eeprom.version);
1da177e4
LT
2371 /* return -EIO; */
2372 }
2373 size = ice->eeprom.size - 6;
2374 for (i = 0; i < size; i++)
2375 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2376
2377 read_skipped:
2378 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2379 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2380 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2381
2382 return 0;
2383}
2384
2385
2386
6ca308d4 2387static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT
2388{
2389 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2390 udelay(200);
2391 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2392 udelay(200);
2393 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2394 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2395 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2396 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2397 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2398 ice->gpio.write_mask = ice->eeprom.gpiomask;
2399 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI
2400 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2401 ice->eeprom.gpiomask);
2402 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2403 ice->eeprom.gpiodir);
2404 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2405 ice->eeprom.gpiostate);
1da177e4
LT
2406 } else {
2407 ice->gpio.write_mask = 0xc0;
2408 ice->gpio.direction = 0xff;
2409 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2410 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI
2411 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2412 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT
2413 }
2414 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2415 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2416 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2417 udelay(100);
2418 outb(0, ICEREG(ice, AC97_CMD));
2419 udelay(200);
2420 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2421 }
2422 snd_ice1712_set_pro_rate(ice, 48000, 1);
2423
2424 return 0;
2425}
2426
6ca308d4 2427int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2428{
2429 int err;
6ca308d4 2430 struct snd_kcontrol *kctl;
1da177e4
LT
2431
2432 snd_assert(ice->pcm_pro != NULL, return -EIO);
2433 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2434 if (err < 0)
2435 return err;
2436 kctl->id.device = ice->pcm_pro->device;
2437 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2438 if (err < 0)
2439 return err;
2440 kctl->id.device = ice->pcm_pro->device;
2441 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2442 if (err < 0)
2443 return err;
2444 kctl->id.device = ice->pcm_pro->device;
2445 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2446 if (err < 0)
2447 return err;
2448 kctl->id.device = ice->pcm_pro->device;
2449 ice->spdif.stream_ctl = kctl;
2450 return 0;
2451}
2452
2453
6ca308d4 2454static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2455{
2456 int err;
2457
2458 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2459 if (err < 0)
2460 return err;
2461 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2462 if (err < 0)
2463 return err;
2464 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2465 if (err < 0)
2466 return err;
2467
2468 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2469 if (err < 0)
2470 return err;
2471 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2472 if (err < 0)
2473 return err;
2474
2475 if (ice->num_total_dacs > 0) {
6ca308d4 2476 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT
2477 tmp.count = ice->num_total_dacs;
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2479 if (err < 0)
2480 return err;
2481 }
2482
2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2484 if (err < 0)
2485 return err;
2486
2487 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2488 if (err < 0)
2489 return err;
2490 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2491 if (err < 0)
2492 return err;
2493
2494 return 0;
2495}
2496
6ca308d4 2497static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4
LT
2498{
2499 if (! ice->port)
2500 goto __hw_end;
2501 /* mask all interrupts */
2502 outb(0xc0, ICEMT(ice, IRQ));
2503 outb(0xff, ICEREG(ice, IRQMASK));
2504 /* --- */
2505 __hw_end:
2506 if (ice->irq >= 0) {
2507 synchronize_irq(ice->irq);
6ca308d4 2508 free_irq(ice->irq, ice);
1da177e4
LT
2509 }
2510 if (ice->port)
2511 pci_release_regions(ice->pci);
2512 snd_ice1712_akm4xxx_free(ice);
2513 pci_disable_device(ice->pci);
2514 kfree(ice);
2515 return 0;
2516}
2517
6ca308d4 2518static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2519{
6ca308d4 2520 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT
2521 return snd_ice1712_free(ice);
2522}
2523
6ca308d4 2524static int __devinit snd_ice1712_create(struct snd_card *card,
1da177e4
LT
2525 struct pci_dev *pci,
2526 const char *modelname,
2527 int omni,
2528 int cs8427_timeout,
6ca308d4 2529 struct snd_ice1712 ** r_ice1712)
1da177e4 2530{
6ca308d4 2531 struct snd_ice1712 *ice;
1da177e4 2532 int err;
6ca308d4 2533 static struct snd_device_ops ops = {
1da177e4
LT
2534 .dev_free = snd_ice1712_dev_free,
2535 };
2536
2537 *r_ice1712 = NULL;
2538
2539 /* enable PCI device */
2540 if ((err = pci_enable_device(pci)) < 0)
2541 return err;
2542 /* check, if we can restrict PCI DMA transfers to 28 bits */
2543 if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
2544 pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
99b359ba 2545 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT
2546 pci_disable_device(pci);
2547 return -ENXIO;
2548 }
2549
e560d8d8 2550 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT
2551 if (ice == NULL) {
2552 pci_disable_device(pci);
2553 return -ENOMEM;
2554 }
2555 ice->omni = omni ? 1 : 0;
2556 if (cs8427_timeout < 1)
2557 cs8427_timeout = 1;
2558 else if (cs8427_timeout > 1000)
2559 cs8427_timeout = 1000;
2560 ice->cs8427_timeout = cs8427_timeout;
2561 spin_lock_init(&ice->reg_lock);
62932df8
IM
2562 mutex_init(&ice->gpio_mutex);
2563 mutex_init(&ice->i2c_mutex);
2564 mutex_init(&ice->open_mutex);
1da177e4
LT
2565 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2566 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2567 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2568 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2569
2570 ice->spdif.cs8403_bits =
2571 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2572 0x10 | /* no emphasis */
2573 0x20); /* PCM encoder/decoder */
2574 ice->card = card;
2575 ice->pci = pci;
2576 ice->irq = -1;
2577 pci_set_master(pci);
2578 pci_write_config_word(ice->pci, 0x40, 0x807f);
2579 pci_write_config_word(ice->pci, 0x42, 0x0006);
2580 snd_ice1712_proc_init(ice);
2581 synchronize_irq(pci->irq);
2582
2583 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2584 kfree(ice);
2585 pci_disable_device(pci);
2586 return err;
2587 }
2588 ice->port = pci_resource_start(pci, 0);
2589 ice->ddma_port = pci_resource_start(pci, 1);
2590 ice->dmapath_port = pci_resource_start(pci, 2);
2591 ice->profi_port = pci_resource_start(pci, 3);
2592
6ca308d4
TI
2593 if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
2594 "ICE1712", ice)) {
99b359ba 2595 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2596 snd_ice1712_free(ice);
2597 return -EIO;
2598 }
2599
2600 ice->irq = pci->irq;
2601
2602 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2603 snd_ice1712_free(ice);
2604 return -EIO;
2605 }
2606 if (snd_ice1712_chip_init(ice) < 0) {
2607 snd_ice1712_free(ice);
2608 return -EIO;
2609 }
2610
2611 /* unmask used interrupts */
6ca308d4
TI
2612 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2613 ICE1712_IRQ_MPU2 : 0) |
2614 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2615 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
1da177e4
LT
2616 ICEREG(ice, IRQMASK));
2617 outb(0x00, ICEMT(ice, IRQ));
2618
2619 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2620 snd_ice1712_free(ice);
2621 return err;
2622 }
2623
2624 snd_card_set_dev(card, &pci->dev);
2625
2626 *r_ice1712 = ice;
2627 return 0;
2628}
2629
2630
2631/*
2632 *
2633 * Registration
2634 *
2635 */
2636
2637static struct snd_ice1712_card_info no_matched __devinitdata;
2638
2639static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2640 const struct pci_device_id *pci_id)
2641{
2642 static int dev;
6ca308d4
TI
2643 struct snd_card *card;
2644 struct snd_ice1712 *ice;
1da177e4
LT
2645 int pcm_dev = 0, err;
2646 struct snd_ice1712_card_info **tbl, *c;
2647
2648 if (dev >= SNDRV_CARDS)
2649 return -ENODEV;
2650 if (!enable[dev]) {
2651 dev++;
2652 return -ENOENT;
2653 }
2654
2655 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2656 if (card == NULL)
2657 return -ENOMEM;
2658
2659 strcpy(card->driver, "ICE1712");
2660 strcpy(card->shortname, "ICEnsemble ICE1712");
2661
6ca308d4
TI
2662 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2663 cs8427_timeout[dev], &ice)) < 0) {
1da177e4
LT
2664 snd_card_free(card);
2665 return err;
2666 }
2667
2668 for (tbl = card_tables; *tbl; tbl++) {
2669 for (c = *tbl; c->subvendor; c++) {
2670 if (c->subvendor == ice->eeprom.subvendor) {
2671 strcpy(card->shortname, c->name);
2672 if (c->driver) /* specific driver? */
2673 strcpy(card->driver, c->driver);
2674 if (c->chip_init) {
2675 if ((err = c->chip_init(ice)) < 0) {
2676 snd_card_free(card);
2677 return err;
2678 }
2679 }
2680 goto __found;
2681 }
2682 }
2683 }
2684 c = &no_matched;
2685 __found:
2686
2687 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2688 snd_card_free(card);
2689 return err;
2690 }
2691
2692 if (ice_has_con_ac97(ice))
2693 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2694 snd_card_free(card);
2695 return err;
2696 }
2697
2698 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2699 snd_card_free(card);
2700 return err;
2701 }
2702
2703 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2704 snd_card_free(card);
2705 return err;
2706 }
2707
2708 if (c->build_controls) {
2709 if ((err = c->build_controls(ice)) < 0) {
2710 snd_card_free(card);
2711 return err;
2712 }
2713 }
2714
2715 if (ice_has_con_ac97(ice))
2716 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2717 snd_card_free(card);
2718 return err;
2719 }
2720
2721 if (! c->no_mpu401) {
2722 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2723 ICEREG(ice, MPU1_CTRL), 1,
2724 ice->irq, 0,
2725 &ice->rmidi[0])) < 0) {
2726 snd_card_free(card);
2727 return err;
2728 }
2729
2730 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
2731 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2732 ICEREG(ice, MPU2_CTRL), 1,
2733 ice->irq, 0,
2734 &ice->rmidi[1])) < 0) {
2735 snd_card_free(card);
2736 return err;
2737 }
2738 }
2739
e957ebf1
JK
2740 snd_ice1712_set_input_clock_source(ice, 0);
2741
1da177e4
LT
2742 sprintf(card->longname, "%s at 0x%lx, irq %i",
2743 card->shortname, ice->port, ice->irq);
2744
2745 if ((err = snd_card_register(card)) < 0) {
2746 snd_card_free(card);
2747 return err;
2748 }
2749 pci_set_drvdata(pci, card);
2750 dev++;
2751 return 0;
2752}
2753
2754static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2755{
2756 snd_card_free(pci_get_drvdata(pci));
2757 pci_set_drvdata(pci, NULL);
2758}
2759
2760static struct pci_driver driver = {
2761 .name = "ICE1712",
2762 .id_table = snd_ice1712_ids,
2763 .probe = snd_ice1712_probe,
2764 .remove = __devexit_p(snd_ice1712_remove),
2765};
2766
2767static int __init alsa_card_ice1712_init(void)
2768{
01d25d46 2769 return pci_register_driver(&driver);
1da177e4
LT
2770}
2771
2772static void __exit alsa_card_ice1712_exit(void)
2773{
2774 pci_unregister_driver(&driver);
2775}
2776
2777module_init(alsa_card_ice1712_init)
2778module_exit(alsa_card_ice1712_exit)
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