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[ALSA] AMD Au1x00: make driver build after cleanup
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50#include <sound/driver.h>
51#include <asm/io.h>
52#include <linux/delay.h>
53#include <linux/interrupt.h>
54#include <linux/init.h>
55#include <linux/pci.h>
56#include <linux/slab.h>
57#include <linux/moduleparam.h>
62932df8 58#include <linux/mutex.h>
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/cs8427.h>
61#include <sound/info.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
64
65#include <sound/asoundef.h>
66
67#include "ice1712.h"
68
69/* lowlevel routines */
70#include "delta.h"
71#include "ews.h"
72#include "hoontech.h"
73
74MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
75MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76MODULE_LICENSE("GPL");
77MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
86static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
87static char *model[SNDRV_CARDS];
88static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
89static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
531af462 90static int dxr_enable[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* DXR enable for DMX6FIRE */
1da177e4
LT		 91
92module_param_array(index, int, NULL, 0444);
93MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94module_param_array(id, charp, NULL, 0444);
95MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96module_param_array(enable, bool, NULL, 0444);
97MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98module_param_array(omni, bool, NULL, 0444);
99MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100module_param_array(cs8427_timeout, int, NULL, 0444);
101MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102module_param_array(model, charp, NULL, 0444);
103MODULE_PARM_DESC(model, "Use the given board model.");
531af462
AH		 104module_param_array(dxr_enable, int, NULL, 0444);
105MODULE_PARM_DESC(dsr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 106
1da177e4
LT		 107
108static struct pci_device_id snd_ice1712_ids[] = {
109 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
110 { 0, }
111};
112
113MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
6ca308d4
TI		 115static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT		 117
118static int PRO_RATE_LOCKED;
119static int PRO_RATE_RESET = 1;
120static unsigned int PRO_RATE_DEFAULT = 44100;
121
122/*
123 * Basic I/O
124 */
125
126/* check whether the clock mode is spdif-in */
6ca308d4 127static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 128{
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130}
131
6ca308d4 132static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 133{
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135}
136
6ca308d4 137static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
1da177e4
LT		 138{
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141}
142
6ca308d4 143static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
1da177e4
LT		 144{
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147}
148
6ca308d4 149static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 150 unsigned short reg,
151 unsigned short val)
152{
6ca308d4 153 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172}
173
6ca308d4 174static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 175 unsigned short reg)
176{
6ca308d4 177 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197}
198
199/*
200 * pro ac97 section
201 */
202
6ca308d4 203static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 204 unsigned short reg,
205 unsigned short val)
206{
6ca308d4 207 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226}
227
228
6ca308d4 229static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 230 unsigned short reg)
231{
6ca308d4 232 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252}
253
254/*
255 * consumer ac97 digital mix
256 */
6ca308d4 257static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 258{
259 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
260 uinfo->count = 1;
261 uinfo->value.integer.min = 0;
262 uinfo->value.integer.max = 1;
263 return 0;
264}
265
6ca308d4 266static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 267{
6ca308d4 268 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 269
270 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
271 return 0;
272}
273
6ca308d4 274static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 275{
6ca308d4 276 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 277 unsigned char val, nval;
278
279 spin_lock_irq(&ice->reg_lock);
280 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
281 nval = val & ~ICE1712_ROUTE_AC97;
282 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
283 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
284 spin_unlock_irq(&ice->reg_lock);
285 return val != nval;
286}
287
6ca308d4 288static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
1da177e4
LT		 289 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
290 .name = "Digital Mixer To AC97",
291 .info = snd_ice1712_digmix_route_ac97_info,
292 .get = snd_ice1712_digmix_route_ac97_get,
293 .put = snd_ice1712_digmix_route_ac97_put,
294};
295
296
297/*
298 * gpio operations
299 */
6ca308d4 300static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 301{
302 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
303 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
304}
305
6ca308d4 306static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 307{
308 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
309 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
310}
311
6ca308d4 312static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 313{
314 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
315}
316
6ca308d4 317static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 318{
319 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
320 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
321}
322
1da177e4
LT		 323/*
324 *
325 * CS8427 interface
326 *
327 */
328
329/*
330 * change the input clock selection
331 * spdif_clock = 1 - IEC958 input, 0 - Envy24
332 */
6ca308d4 333static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT		 334{
335 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
336 unsigned char val, nval;
337 int res = 0;
338
339 snd_i2c_lock(ice->i2c);
340 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
341 snd_i2c_unlock(ice->i2c);
342 return -EIO;
343 }
344 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 nval = val & 0xf0;
349 if (spdif_clock)
350 nval |= 0x01;
351 else
352 nval |= 0x04;
353 if (val != nval) {
354 reg[1] = nval;
355 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
356 res = -EIO;
357 } else {
358 res++;
359 }
360 }
361 snd_i2c_unlock(ice->i2c);
362 return res;
363}
364
365/*
366 * spdif callbacks
367 */
6ca308d4 368static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 369{
370 snd_cs8427_iec958_active(ice->cs8427, 1);
371}
372
6ca308d4 373static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 374{
375 snd_cs8427_iec958_active(ice->cs8427, 0);
376}
377
6ca308d4 378static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT		 379{
380 snd_cs8427_iec958_pcm(ice->cs8427, rate);
381}
382
383/*
384 * create and initialize callbacks for cs8427 interface
385 */
6ca308d4 386int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT		 387{
388 int err;
389
390 if ((err = snd_cs8427_create(ice->i2c, addr,
391 (ice->cs8427_timeout * HZ) / 1000,
392 &ice->cs8427)) < 0) {
99b359ba 393 snd_printk(KERN_ERR "CS8427 initialization failed\n");
1da177e4
LT		 394 return err;
395 }
396 ice->spdif.ops.open = open_cs8427;
397 ice->spdif.ops.close = close_cs8427;
398 ice->spdif.ops.setup_rate = setup_cs8427;
399 return 0;
400}
401
e957ebf1
JK		 402static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
403{
404 /* change CS8427 clock source too */
405 if (ice->cs8427)
406 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
407 /* notify ak4524 chip as well */
408 if (spdif_is_master) {
409 unsigned int i;
410 for (i = 0; i < ice->akm_codecs; i++) {
411 if (ice->akm[i].ops.set_rate_val)
412 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
413 }
414 }
415}
1da177e4
LT		 416
417/*
418 * Interrupt handler
419 */
420
421static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
422{
6ca308d4 423 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 424 unsigned char status;
425 int handled = 0;
426
427 while (1) {
428 status = inb(ICEREG(ice, IRQSTAT));
429 if (status == 0)
430 break;
431 handled = 1;
432 if (status & ICE1712_IRQ_MPU1) {
433 if (ice->rmidi[0])
434 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
435 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
436 status &= ~ICE1712_IRQ_MPU1;
437 }
438 if (status & ICE1712_IRQ_TIMER)
439 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
440 if (status & ICE1712_IRQ_MPU2) {
441 if (ice->rmidi[1])
442 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
443 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
444 status &= ~ICE1712_IRQ_MPU2;
445 }
446 if (status & ICE1712_IRQ_PROPCM) {
447 unsigned char mtstat = inb(ICEMT(ice, IRQ));
448 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
449 if (ice->playback_pro_substream)
450 snd_pcm_period_elapsed(ice->playback_pro_substream);
451 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
452 }
453 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
454 if (ice->capture_pro_substream)
455 snd_pcm_period_elapsed(ice->capture_pro_substream);
456 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
457 }
458 }
459 if (status & ICE1712_IRQ_FM)
460 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
461 if (status & ICE1712_IRQ_PBKDS) {
462 u32 idx;
463 u16 pbkstatus;
6ca308d4 464 struct snd_pcm_substream *substream;
1da177e4
LT		 465 pbkstatus = inw(ICEDS(ice, INTSTAT));
466 //printk("pbkstatus = 0x%x\n", pbkstatus);
467 for (idx = 0; idx < 6; idx++) {
468 if ((pbkstatus & (3 << (idx * 2))) == 0)
469 continue;
470 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
471 snd_pcm_period_elapsed(substream);
472 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
473 }
474 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
475 }
476 if (status & ICE1712_IRQ_CONCAP) {
477 if (ice->capture_con_substream)
478 snd_pcm_period_elapsed(ice->capture_con_substream);
479 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONPBK) {
482 if (ice->playback_con_substream)
483 snd_pcm_period_elapsed(ice->playback_con_substream);
484 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
485 }
486 }
487 return IRQ_RETVAL(handled);
488}
489
490
491/*
492 * PCM part - misc
493 */
494
6ca308d4
TI		 495static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
496 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 497{
498 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
499}
500
6ca308d4 501static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 502{
503 return snd_pcm_lib_free_pages(substream);
504}
505
506/*
507 * PCM part - consumer I/O
508 */
509
6ca308d4 510static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 511 int cmd)
512{
6ca308d4 513 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 514 int result = 0;
515 u32 tmp;
516
517 spin_lock(&ice->reg_lock);
518 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
519 if (cmd == SNDRV_PCM_TRIGGER_START) {
520 tmp |= 1;
521 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
522 tmp &= ~1;
523 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
524 tmp |= 2;
525 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
526 tmp &= ~2;
527 } else {
528 result = -EINVAL;
529 }
530 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
531 spin_unlock(&ice->reg_lock);
532 return result;
533}
534
6ca308d4 535static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 536 int cmd)
537{
6ca308d4 538 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 539 int result = 0;
540 u32 tmp;
541
542 spin_lock(&ice->reg_lock);
543 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
544 if (cmd == SNDRV_PCM_TRIGGER_START) {
545 tmp |= 1;
546 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
547 tmp &= ~1;
548 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
549 tmp |= 2;
550 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
551 tmp &= ~2;
552 } else {
553 result = -EINVAL;
554 }
555 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
556 spin_unlock(&ice->reg_lock);
557 return result;
558}
559
6ca308d4 560static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 561 int cmd)
562{
6ca308d4 563 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 564 int result = 0;
565 u8 tmp;
566
567 spin_lock(&ice->reg_lock);
568 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
569 if (cmd == SNDRV_PCM_TRIGGER_START) {
570 tmp |= 1;
571 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
572 tmp &= ~1;
573 } else {
574 result = -EINVAL;
575 }
576 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
577 spin_unlock(&ice->reg_lock);
578 return result;
579}
580
6ca308d4 581static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 582{
6ca308d4
TI		 583 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
584 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 585 u32 period_size, buf_size, rate, tmp;
586
587 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
588 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
589 tmp = 0x0000;
590 if (snd_pcm_format_width(runtime->format) == 16)
591 tmp |= 0x10;
592 if (runtime->channels == 2)
593 tmp |= 0x08;
594 rate = (runtime->rate * 8192) / 375;
595 if (rate > 0x000fffff)
596 rate = 0x000fffff;
597 spin_lock_irq(&ice->reg_lock);
598 outb(0, ice->ddma_port + 15);
599 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
600 outl(runtime->dma_addr, ice->ddma_port + 0);
601 outw(buf_size, ice->ddma_port + 4);
602 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
603 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
606 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
610 spin_unlock_irq(&ice->reg_lock);
611 return 0;
612}
613
6ca308d4 614static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 615{
6ca308d4
TI		 616 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
617 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 618 u32 period_size, buf_size, rate, tmp, chn;
619
620 period_size = snd_pcm_lib_period_bytes(substream) - 1;
621 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
622 tmp = 0x0064;
623 if (snd_pcm_format_width(runtime->format) == 16)
624 tmp &= ~0x04;
625 if (runtime->channels == 2)
626 tmp |= 0x08;
627 rate = (runtime->rate * 8192) / 375;
628 if (rate > 0x000fffff)
629 rate = 0x000fffff;
630 ice->playback_con_active_buf[substream->number] = 0;
631 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
632 chn = substream->number * 2;
633 spin_lock_irq(&ice->reg_lock);
634 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
635 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
641 if (runtime->channels == 2) {
642 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
643 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
644 }
645 spin_unlock_irq(&ice->reg_lock);
646 return 0;
647}
648
6ca308d4 649static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 650{
6ca308d4
TI		 651 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
652 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 653 u32 period_size, buf_size;
654 u8 tmp;
655
656 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
657 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
658 tmp = 0x06;
659 if (snd_pcm_format_width(runtime->format) == 16)
660 tmp &= ~0x04;
661 if (runtime->channels == 2)
662 tmp &= ~0x02;
663 spin_lock_irq(&ice->reg_lock);
664 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
665 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
666 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
667 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
668 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
669 spin_unlock_irq(&ice->reg_lock);
670 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
671 return 0;
672}
673
6ca308d4 674static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 675{
6ca308d4
TI		 676 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
677 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 678 size_t ptr;
679
680 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
681 return 0;
682 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
683 if (ptr == runtime->buffer_size)
684 ptr = 0;
685 return bytes_to_frames(substream->runtime, ptr);
686}
687
6ca308d4 688static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 689{
6ca308d4 690 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 691 u8 addr;
692 size_t ptr;
693
694 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
695 return 0;
696 if (ice->playback_con_active_buf[substream->number])
697 addr = ICE1712_DSC_ADDR1;
698 else
699 addr = ICE1712_DSC_ADDR0;
700 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
701 ice->playback_con_virt_addr[substream->number];
702 if (ptr == substream->runtime->buffer_size)
703 ptr = 0;
704 return bytes_to_frames(substream->runtime, ptr);
705}
706
6ca308d4 707static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 708{
6ca308d4 709 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 710 size_t ptr;
711
712 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
713 return 0;
714 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
715 if (ptr == substream->runtime->buffer_size)
716 ptr = 0;
717 return bytes_to_frames(substream->runtime, ptr);
718}
719
6ca308d4 720static struct snd_pcm_hardware snd_ice1712_playback =
1da177e4
LT		 721{
722 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
723 SNDRV_PCM_INFO_BLOCK_TRANSFER |
724 SNDRV_PCM_INFO_MMAP_VALID |
725 SNDRV_PCM_INFO_PAUSE),
726 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
727 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
728 .rate_min = 4000,
729 .rate_max = 48000,
730 .channels_min = 1,
731 .channels_max = 2,
732 .buffer_bytes_max = (64*1024),
733 .period_bytes_min = 64,
734 .period_bytes_max = (64*1024),
735 .periods_min = 1,
736 .periods_max = 1024,
737 .fifo_size = 0,
738};
739
6ca308d4 740static struct snd_pcm_hardware snd_ice1712_playback_ds =
1da177e4
LT		 741{
742 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
743 SNDRV_PCM_INFO_BLOCK_TRANSFER |
744 SNDRV_PCM_INFO_MMAP_VALID |
745 SNDRV_PCM_INFO_PAUSE),
746 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
747 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
748 .rate_min = 4000,
749 .rate_max = 48000,
750 .channels_min = 1,
751 .channels_max = 2,
752 .buffer_bytes_max = (128*1024),
753 .period_bytes_min = 64,
754 .period_bytes_max = (128*1024),
755 .periods_min = 2,
756 .periods_max = 2,
757 .fifo_size = 0,
758};
759
6ca308d4 760static struct snd_pcm_hardware snd_ice1712_capture =
1da177e4
LT		 761{
762 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
763 SNDRV_PCM_INFO_BLOCK_TRANSFER |
764 SNDRV_PCM_INFO_MMAP_VALID),
765 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
766 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
767 .rate_min = 4000,
768 .rate_max = 48000,
769 .channels_min = 1,
770 .channels_max = 2,
771 .buffer_bytes_max = (64*1024),
772 .period_bytes_min = 64,
773 .period_bytes_max = (64*1024),
774 .periods_min = 1,
775 .periods_max = 1024,
776 .fifo_size = 0,
777};
778
6ca308d4 779static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 780{
6ca308d4
TI		 781 struct snd_pcm_runtime *runtime = substream->runtime;
782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 783
784 ice->playback_con_substream = substream;
785 runtime->hw = snd_ice1712_playback;
786 return 0;
787}
788
6ca308d4 789static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 790{
6ca308d4
TI		 791 struct snd_pcm_runtime *runtime = substream->runtime;
792 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 793 u32 tmp;
794
795 ice->playback_con_substream_ds[substream->number] = substream;
796 runtime->hw = snd_ice1712_playback_ds;
797 spin_lock_irq(&ice->reg_lock);
798 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
799 outw(tmp, ICEDS(ice, INTMASK));
800 spin_unlock_irq(&ice->reg_lock);
801 return 0;
802}
803
6ca308d4 804static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 805{
6ca308d4
TI		 806 struct snd_pcm_runtime *runtime = substream->runtime;
807 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 808
809 ice->capture_con_substream = substream;
810 runtime->hw = snd_ice1712_capture;
811 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
812 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
813 runtime->hw.rate_min = 48000;
814 return 0;
815}
816
6ca308d4 817static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 818{
6ca308d4 819 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 820
821 ice->playback_con_substream = NULL;
822 return 0;
823}
824
6ca308d4 825static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 826{
6ca308d4 827 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 828 u32 tmp;
829
830 spin_lock_irq(&ice->reg_lock);
831 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
832 outw(tmp, ICEDS(ice, INTMASK));
833 spin_unlock_irq(&ice->reg_lock);
834 ice->playback_con_substream_ds[substream->number] = NULL;
835 return 0;
836}
837
6ca308d4 838static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 839{
6ca308d4 840 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 841
842 ice->capture_con_substream = NULL;
843 return 0;
844}
845
6ca308d4 846static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT		 847 .open = snd_ice1712_playback_open,
848 .close = snd_ice1712_playback_close,
849 .ioctl = snd_pcm_lib_ioctl,
850 .hw_params = snd_ice1712_hw_params,
851 .hw_free = snd_ice1712_hw_free,
852 .prepare = snd_ice1712_playback_prepare,
853 .trigger = snd_ice1712_playback_trigger,
854 .pointer = snd_ice1712_playback_pointer,
855};
856
6ca308d4 857static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT		 858 .open = snd_ice1712_playback_ds_open,
859 .close = snd_ice1712_playback_ds_close,
860 .ioctl = snd_pcm_lib_ioctl,
861 .hw_params = snd_ice1712_hw_params,
862 .hw_free = snd_ice1712_hw_free,
863 .prepare = snd_ice1712_playback_ds_prepare,
864 .trigger = snd_ice1712_playback_ds_trigger,
865 .pointer = snd_ice1712_playback_ds_pointer,
866};
867
6ca308d4 868static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT		 869 .open = snd_ice1712_capture_open,
870 .close = snd_ice1712_capture_close,
871 .ioctl = snd_pcm_lib_ioctl,
872 .hw_params = snd_ice1712_hw_params,
873 .hw_free = snd_ice1712_hw_free,
874 .prepare = snd_ice1712_capture_prepare,
875 .trigger = snd_ice1712_capture_trigger,
876 .pointer = snd_ice1712_capture_pointer,
877};
878
6ca308d4 879static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 880{
6ca308d4 881 struct snd_pcm *pcm;
1da177e4
LT		 882 int err;
883
884 if (rpcm)
885 *rpcm = NULL;
886 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
887 if (err < 0)
888 return err;
889
890 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
891 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
892
893 pcm->private_data = ice;
1da177e4
LT		 894 pcm->info_flags = 0;
895 strcpy(pcm->name, "ICE1712 consumer");
896 ice->pcm = pcm;
897
898 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
899 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
900
901 if (rpcm)
902 *rpcm = pcm;
903
904 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
905
906 return 0;
907}
908
6ca308d4 909static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 910{
6ca308d4 911 struct snd_pcm *pcm;
1da177e4
LT		 912 int err;
913
914 if (rpcm)
915 *rpcm = NULL;
916 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
917 if (err < 0)
918 return err;
919
920 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
921
922 pcm->private_data = ice;
1da177e4
LT		 923 pcm->info_flags = 0;
924 strcpy(pcm->name, "ICE1712 consumer (DS)");
925 ice->pcm_ds = pcm;
926
927 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
928 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
929
930 if (rpcm)
931 *rpcm = pcm;
932
933 return 0;
934}
935
936/*
937 * PCM code - professional part (multitrack)
938 */
939
940static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
941 32000, 44100, 48000, 64000, 88200, 96000 };
942
6ca308d4 943static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 944 .count = ARRAY_SIZE(rates),
945 .list = rates,
946 .mask = 0,
947};
948
6ca308d4 949static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 950 int cmd)
951{
6ca308d4 952 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 953 switch (cmd) {
954 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
955 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
956 {
957 unsigned int what;
958 unsigned int old;
959 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
960 return -EINVAL;
961 what = ICE1712_PLAYBACK_PAUSE;
962 snd_pcm_trigger_done(substream, substream);
963 spin_lock(&ice->reg_lock);
964 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
965 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
966 old |= what;
967 else
968 old &= ~what;
969 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
970 spin_unlock(&ice->reg_lock);
971 break;
972 }
973 case SNDRV_PCM_TRIGGER_START:
974 case SNDRV_PCM_TRIGGER_STOP:
975 {
976 unsigned int what = 0;
977 unsigned int old;
978 struct list_head *pos;
6ca308d4 979 struct snd_pcm_substream *s;
1da177e4
LT		 980
981 snd_pcm_group_for_each(pos, substream) {
982 s = snd_pcm_group_substream_entry(pos);
983 if (s == ice->playback_pro_substream) {
984 what |= ICE1712_PLAYBACK_START;
985 snd_pcm_trigger_done(s, substream);
986 } else if (s == ice->capture_pro_substream) {
987 what |= ICE1712_CAPTURE_START_SHADOW;
988 snd_pcm_trigger_done(s, substream);
989 }
990 }
991 spin_lock(&ice->reg_lock);
992 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
993 if (cmd == SNDRV_PCM_TRIGGER_START)
994 old |= what;
995 else
996 old &= ~what;
997 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
998 spin_unlock(&ice->reg_lock);
999 break;
1000 }
1001 default:
1002 return -EINVAL;
1003 }
1004 return 0;
1005}
1006
1007/*
1008 */
6ca308d4 1009static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT		 1010{
1011 unsigned long flags;
1012 unsigned char val, old;
1013 unsigned int i;
1014
1015 switch (rate) {
1016 case 8000: val = 6; break;
1017 case 9600: val = 3; break;
1018 case 11025: val = 10; break;
1019 case 12000: val = 2; break;
1020 case 16000: val = 5; break;
1021 case 22050: val = 9; break;
1022 case 24000: val = 1; break;
1023 case 32000: val = 4; break;
1024 case 44100: val = 8; break;
1025 case 48000: val = 0; break;
1026 case 64000: val = 15; break;
1027 case 88200: val = 11; break;
1028 case 96000: val = 7; break;
1029 default:
1030 snd_BUG();
1031 val = 0;
1032 rate = 48000;
1033 break;
1034 }
1035
1036 spin_lock_irqsave(&ice->reg_lock, flags);
1037 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1038 ICE1712_PLAYBACK_PAUSE|
1039 ICE1712_PLAYBACK_START)) {
1040 __out:
1041 spin_unlock_irqrestore(&ice->reg_lock, flags);
1042 return;
1043 }
1044 if (!force && is_pro_rate_locked(ice))
1045 goto __out;
1046
1047 old = inb(ICEMT(ice, RATE));
1048 if (!force && old == val)
1049 goto __out;
1050 outb(val, ICEMT(ice, RATE));
1051 spin_unlock_irqrestore(&ice->reg_lock, flags);
1052
1053 if (ice->gpio.set_pro_rate)
1054 ice->gpio.set_pro_rate(ice, rate);
1055 for (i = 0; i < ice->akm_codecs; i++) {
1056 if (ice->akm[i].ops.set_rate_val)
1057 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1058 }
1059 if (ice->spdif.ops.setup_rate)
1060 ice->spdif.ops.setup_rate(ice, rate);
1061}
1062
6ca308d4 1063static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1064{
6ca308d4 1065 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1066
1067 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1068 spin_lock_irq(&ice->reg_lock);
1069 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1070 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1071 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1072 spin_unlock_irq(&ice->reg_lock);
1073
1074 return 0;
1075}
1076
6ca308d4
TI		 1077static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1078 struct snd_pcm_hw_params *hw_params)
1da177e4 1079{
6ca308d4 1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1081
1082 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1083 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1084}
1085
6ca308d4 1086static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1087{
6ca308d4 1088 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1089
1090 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1091 spin_lock_irq(&ice->reg_lock);
1092 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1093 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1094 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1095 spin_unlock_irq(&ice->reg_lock);
1096 return 0;
1097}
1098
6ca308d4
TI		 1099static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1100 struct snd_pcm_hw_params *hw_params)
1da177e4 1101{
6ca308d4 1102 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1103
1104 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1105 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1106}
1107
6ca308d4 1108static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1109{
6ca308d4 1110 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1111 size_t ptr;
1112
1113 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1114 return 0;
1115 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1116 if (ptr == substream->runtime->buffer_size)
1117 ptr = 0;
1118 return bytes_to_frames(substream->runtime, ptr);
1119}
1120
6ca308d4 1121static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1122{
6ca308d4 1123 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1124 size_t ptr;
1125
1126 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1127 return 0;
1128 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1129 if (ptr == substream->runtime->buffer_size)
1130 ptr = 0;
1131 return bytes_to_frames(substream->runtime, ptr);
1132}
1133
6ca308d4 1134static struct snd_pcm_hardware snd_ice1712_playback_pro =
1da177e4
LT		 1135{
1136 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1137 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1138 SNDRV_PCM_INFO_MMAP_VALID |
1139 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1140 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1141 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1142 .rate_min = 4000,
1143 .rate_max = 96000,
1144 .channels_min = 10,
1145 .channels_max = 10,
1146 .buffer_bytes_max = (256*1024),
1147 .period_bytes_min = 10 * 4 * 2,
1148 .period_bytes_max = 131040,
1149 .periods_min = 1,
1150 .periods_max = 1024,
1151 .fifo_size = 0,
1152};
1153
6ca308d4 1154static struct snd_pcm_hardware snd_ice1712_capture_pro =
1da177e4
LT		 1155{
1156 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1157 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1158 SNDRV_PCM_INFO_MMAP_VALID |
1159 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1160 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1161 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1162 .rate_min = 4000,
1163 .rate_max = 96000,
1164 .channels_min = 12,
1165 .channels_max = 12,
1166 .buffer_bytes_max = (256*1024),
1167 .period_bytes_min = 12 * 4 * 2,
1168 .period_bytes_max = 131040,
1169 .periods_min = 1,
1170 .periods_max = 1024,
1171 .fifo_size = 0,
1172};
1173
6ca308d4 1174static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1175{
6ca308d4
TI		 1176 struct snd_pcm_runtime *runtime = substream->runtime;
1177 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1178
1179 ice->playback_pro_substream = substream;
1180 runtime->hw = snd_ice1712_playback_pro;
1181 snd_pcm_set_sync(substream);
1182 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1183 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1184
1185 if (ice->spdif.ops.open)
1186 ice->spdif.ops.open(ice, substream);
1187
1188 return 0;
1189}
1190
6ca308d4 1191static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1192{
6ca308d4
TI		 1193 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1194 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1195
1196 ice->capture_pro_substream = substream;
1197 runtime->hw = snd_ice1712_capture_pro;
1198 snd_pcm_set_sync(substream);
1199 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1200 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1201 return 0;
1202}
1203
6ca308d4 1204static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1205{
6ca308d4 1206 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1207
1208 if (PRO_RATE_RESET)
1209 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1210 ice->playback_pro_substream = NULL;
1211 if (ice->spdif.ops.close)
1212 ice->spdif.ops.close(ice, substream);
1213
1214 return 0;
1215}
1216
6ca308d4 1217static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1218{
6ca308d4 1219 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1220
1221 if (PRO_RATE_RESET)
1222 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1223 ice->capture_pro_substream = NULL;
1224 return 0;
1225}
1226
6ca308d4 1227static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT		 1228 .open = snd_ice1712_playback_pro_open,
1229 .close = snd_ice1712_playback_pro_close,
1230 .ioctl = snd_pcm_lib_ioctl,
1231 .hw_params = snd_ice1712_playback_pro_hw_params,
1232 .hw_free = snd_ice1712_hw_free,
1233 .prepare = snd_ice1712_playback_pro_prepare,
1234 .trigger = snd_ice1712_pro_trigger,
1235 .pointer = snd_ice1712_playback_pro_pointer,
1236};
1237
6ca308d4 1238static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT		 1239 .open = snd_ice1712_capture_pro_open,
1240 .close = snd_ice1712_capture_pro_close,
1241 .ioctl = snd_pcm_lib_ioctl,
1242 .hw_params = snd_ice1712_capture_pro_hw_params,
1243 .hw_free = snd_ice1712_hw_free,
1244 .prepare = snd_ice1712_capture_pro_prepare,
1245 .trigger = snd_ice1712_pro_trigger,
1246 .pointer = snd_ice1712_capture_pro_pointer,
1247};
1248
6ca308d4 1249static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1da177e4 1250{
6ca308d4 1251 struct snd_pcm *pcm;
1da177e4
LT		 1252 int err;
1253
1254 if (rpcm)
1255 *rpcm = NULL;
1256 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1257 if (err < 0)
1258 return err;
1259
1260 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1261 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1262
1263 pcm->private_data = ice;
1da177e4
LT		 1264 pcm->info_flags = 0;
1265 strcpy(pcm->name, "ICE1712 multi");
1266
1267 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1268 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1269
1270 ice->pcm_pro = pcm;
1271 if (rpcm)
1272 *rpcm = pcm;
1273
1274 if (ice->cs8427) {
1275 /* assign channels to iec958 */
1276 err = snd_cs8427_iec958_build(ice->cs8427,
1277 pcm->streams[0].substream,
1278 pcm->streams[1].substream);
1279 if (err < 0)
1280 return err;
1281 }
1282
1283 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1284 return err;
1285 return 0;
1286}
1287
1288/*
1289 * Mixer section
1290 */
1291
6ca308d4 1292static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT		 1293{
1294 unsigned int vol = ice->pro_volumes[index];
1295 unsigned short val = 0;
1296
1297 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1298 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1299 outb(index, ICEMT(ice, MONITOR_INDEX));
1300 outw(val, ICEMT(ice, MONITOR_VOLUME));
1301}
1302
6ca308d4 1303static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1304{
1305 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1306 uinfo->count = 2;
1307 uinfo->value.integer.min = 0;
1308 uinfo->value.integer.max = 1;
1309 return 0;
1310}
1311
6ca308d4 1312static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1313{
6ca308d4 1314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1315 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1316
1317 spin_lock_irq(&ice->reg_lock);
1318 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1319 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1320 spin_unlock_irq(&ice->reg_lock);
1321 return 0;
1322}
1323
6ca308d4 1324static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1325{
6ca308d4 1326 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1327 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1328 unsigned int nval, change;
1329
1330 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1331 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1332 spin_lock_irq(&ice->reg_lock);
1333 nval |= ice->pro_volumes[index] & ~0x80008000;
1334 change = nval != ice->pro_volumes[index];
1335 ice->pro_volumes[index] = nval;
1336 snd_ice1712_update_volume(ice, index);
1337 spin_unlock_irq(&ice->reg_lock);
1338 return change;
1339}
1340
6ca308d4 1341static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1342{
1343 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1344 uinfo->count = 2;
1345 uinfo->value.integer.min = 0;
1346 uinfo->value.integer.max = 96;
1347 return 0;
1348}
1349
6ca308d4 1350static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1351{
6ca308d4 1352 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1353 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1354
1355 spin_lock_irq(&ice->reg_lock);
1356 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1357 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1358 spin_unlock_irq(&ice->reg_lock);
1359 return 0;
1360}
1361
6ca308d4 1362static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1363{
6ca308d4 1364 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1365 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1366 unsigned int nval, change;
1367
1368 nval = (ucontrol->value.integer.value[0] & 127) |
1369 ((ucontrol->value.integer.value[1] & 127) << 16);
1370 spin_lock_irq(&ice->reg_lock);
1371 nval |= ice->pro_volumes[index] & ~0x007f007f;
1372 change = nval != ice->pro_volumes[index];
1373 ice->pro_volumes[index] = nval;
1374 snd_ice1712_update_volume(ice, index);
1375 spin_unlock_irq(&ice->reg_lock);
1376 return change;
1377}
1378
1379
6ca308d4 1380static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1da177e4
LT		 1381 {
1382 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1383 .name = "Multi Playback Switch",
1384 .info = snd_ice1712_pro_mixer_switch_info,
1385 .get = snd_ice1712_pro_mixer_switch_get,
1386 .put = snd_ice1712_pro_mixer_switch_put,
1387 .private_value = 0,
1388 .count = 10,
1389 },
1390 {
1391 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1392 .name = "Multi Playback Volume",
1393 .info = snd_ice1712_pro_mixer_volume_info,
1394 .get = snd_ice1712_pro_mixer_volume_get,
1395 .put = snd_ice1712_pro_mixer_volume_put,
1396 .private_value = 0,
1397 .count = 10,
1398 },
1399};
1400
6ca308d4 1401static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1da177e4
LT		 1402 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1403 .name = "H/W Multi Capture Switch",
1404 .info = snd_ice1712_pro_mixer_switch_info,
1405 .get = snd_ice1712_pro_mixer_switch_get,
1406 .put = snd_ice1712_pro_mixer_switch_put,
1407 .private_value = 10,
1408};
1409
6ca308d4 1410static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1da177e4 1411 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1412 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1da177e4
LT		 1413 .info = snd_ice1712_pro_mixer_switch_info,
1414 .get = snd_ice1712_pro_mixer_switch_get,
1415 .put = snd_ice1712_pro_mixer_switch_put,
1416 .private_value = 18,
1417 .count = 2,
1418};
1419
6ca308d4 1420static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1da177e4
LT		 1421 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1422 .name = "H/W Multi Capture Volume",
1423 .info = snd_ice1712_pro_mixer_volume_info,
1424 .get = snd_ice1712_pro_mixer_volume_get,
1425 .put = snd_ice1712_pro_mixer_volume_put,
1426 .private_value = 10,
1427};
1428
6ca308d4 1429static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1da177e4 1430 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 1431 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1da177e4
LT		 1432 .info = snd_ice1712_pro_mixer_volume_info,
1433 .get = snd_ice1712_pro_mixer_volume_get,
1434 .put = snd_ice1712_pro_mixer_volume_put,
1435 .private_value = 18,
1436 .count = 2,
1437};
1438
6ca308d4 1439static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1440{
6ca308d4 1441 struct snd_card *card = ice->card;
1da177e4
LT		 1442 unsigned int idx;
1443 int err;
1444
1445 /* multi-channel mixer */
1446 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1447 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1448 if (err < 0)
1449 return err;
1450 }
1451
1452 if (ice->num_total_adcs > 0) {
6ca308d4 1453 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT		 1454 tmp.count = ice->num_total_adcs;
1455 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1456 if (err < 0)
1457 return err;
1458 }
1459
1460 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1461 if (err < 0)
1462 return err;
1463
1464 if (ice->num_total_adcs > 0) {
6ca308d4 1465 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT		 1466 tmp.count = ice->num_total_adcs;
1467 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1468 if (err < 0)
1469 return err;
1470 }
1471
1472 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1473 if (err < 0)
1474 return err;
1475
1476 /* initialize volumes */
1477 for (idx = 0; idx < 10; idx++) {
1478 ice->pro_volumes[idx] = 0x80008000; /* mute */
1479 snd_ice1712_update_volume(ice, idx);
1480 }
1481 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1482 ice->pro_volumes[idx] = 0x80008000; /* mute */
1483 snd_ice1712_update_volume(ice, idx);
1484 }
1485 for (idx = 18; idx < 20; idx++) {
1486 ice->pro_volumes[idx] = 0x80008000; /* mute */
1487 snd_ice1712_update_volume(ice, idx);
1488 }
1489 return 0;
1490}
1491
6ca308d4 1492static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1493{
6ca308d4 1494 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 1495 ice->ac97 = NULL;
1496}
1497
6ca308d4 1498static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT		 1499{
1500 int err, bus_num = 0;
6ca308d4
TI		 1501 struct snd_ac97_template ac97;
1502 struct snd_ac97_bus *pbus;
1503 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT		 1504 .write = snd_ice1712_ac97_write,
1505 .read = snd_ice1712_ac97_read,
1506 };
6ca308d4 1507 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT		 1508 .write = snd_ice1712_pro_ac97_write,
1509 .read = snd_ice1712_pro_ac97_read,
1510 };
1511
1512 if (ice_has_con_ac97(ice)) {
1513 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1514 return err;
1515 memset(&ac97, 0, sizeof(ac97));
1516 ac97.private_data = ice;
1517 ac97.private_free = snd_ice1712_mixer_free_ac97;
1518 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1519 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1520 else {
1521 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1522 return err;
1523 return 0;
1524 }
1525 }
1526
1527 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1528 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1529 return err;
1530 memset(&ac97, 0, sizeof(ac97));
1531 ac97.private_data = ice;
1532 ac97.private_free = snd_ice1712_mixer_free_ac97;
1533 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1534 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1535 else
1536 return 0;
1537 }
1538 /* I2S mixer only */
1539 strcat(ice->card->mixername, "ICE1712 - multitrack");
1540 return 0;
1541}
1542
1543/*
1544 *
1545 */
1546
6ca308d4 1547static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1548{
1549 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1550}
1551
6ca308d4
TI		 1552static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1553 struct snd_info_buffer *buffer)
1da177e4 1554{
6ca308d4 1555 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1556 unsigned int idx;
1557
1558 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1559 snd_iprintf(buffer, "EEPROM:\n");
1560
1561 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1562 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1563 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1564 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1565 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1566 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1567 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1568 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1569 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1570 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1571 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1572 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1573 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1574 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1575 for (idx = 0; idx < 4; idx++)
1576 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1577 for (idx = 0; idx < 4; idx++)
1578 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1579 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1580 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1581
1582 snd_iprintf(buffer, "\nRegisters:\n");
1583 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1584 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1585 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1586 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39
JK		 1587 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1588 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1589 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT		 1590}
1591
6ca308d4 1592static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1da177e4 1593{
6ca308d4 1594 struct snd_info_entry *entry;
1da177e4
LT		 1595
1596 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1597 snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
1598}
1599
1600/*
1601 *
1602 */
1603
6ca308d4
TI		 1604static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1605 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1606{
1607 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1608 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1609 return 0;
1610}
1611
6ca308d4
TI		 1612static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1613 struct snd_ctl_elem_value *ucontrol)
1da177e4 1614{
6ca308d4 1615 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1616
1617 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1618 return 0;
1619}
1620
6ca308d4 1621static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1da177e4
LT		 1622 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1623 .name = "ICE1712 EEPROM",
1624 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1625 .info = snd_ice1712_eeprom_info,
1626 .get = snd_ice1712_eeprom_get
1627};
1628
1629/*
1630 */
6ca308d4
TI		 1631static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1632 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1633{
1634 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1635 uinfo->count = 1;
1636 return 0;
1637}
1638
6ca308d4
TI		 1639static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1640 struct snd_ctl_elem_value *ucontrol)
1da177e4 1641{
6ca308d4 1642 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1643 if (ice->spdif.ops.default_get)
1644 ice->spdif.ops.default_get(ice, ucontrol);
1645 return 0;
1646}
1647
6ca308d4
TI		 1648static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1649 struct snd_ctl_elem_value *ucontrol)
1da177e4 1650{
6ca308d4 1651 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1652 if (ice->spdif.ops.default_put)
1653 return ice->spdif.ops.default_put(ice, ucontrol);
1654 return 0;
1655}
1656
6ca308d4 1657static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1da177e4
LT		 1658{
1659 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1660 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1661 .info = snd_ice1712_spdif_info,
1662 .get = snd_ice1712_spdif_default_get,
1663 .put = snd_ice1712_spdif_default_put
1664};
1665
6ca308d4
TI		 1666static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1667 struct snd_ctl_elem_value *ucontrol)
1da177e4 1668{
6ca308d4 1669 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1670 if (ice->spdif.ops.default_get) {
1671 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1672 IEC958_AES0_PROFESSIONAL |
1673 IEC958_AES0_CON_NOT_COPYRIGHT |
1674 IEC958_AES0_CON_EMPHASIS;
1675 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1676 IEC958_AES1_CON_CATEGORY;
1677 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1678 } else {
1679 ucontrol->value.iec958.status[0] = 0xff;
1680 ucontrol->value.iec958.status[1] = 0xff;
1681 ucontrol->value.iec958.status[2] = 0xff;
1682 ucontrol->value.iec958.status[3] = 0xff;
1683 ucontrol->value.iec958.status[4] = 0xff;
1684 }
1685 return 0;
1686}
1687
6ca308d4
TI		 1688static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1689 struct snd_ctl_elem_value *ucontrol)
1da177e4 1690{
6ca308d4 1691 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1692 if (ice->spdif.ops.default_get) {
1693 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1694 IEC958_AES0_PROFESSIONAL |
1695 IEC958_AES0_PRO_FS |
1696 IEC958_AES0_PRO_EMPHASIS;
1697 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1698 } else {
1699 ucontrol->value.iec958.status[0] = 0xff;
1700 ucontrol->value.iec958.status[1] = 0xff;
1701 ucontrol->value.iec958.status[2] = 0xff;
1702 ucontrol->value.iec958.status[3] = 0xff;
1703 ucontrol->value.iec958.status[4] = 0xff;
1704 }
1705 return 0;
1706}
1707
6ca308d4 1708static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1da177e4
LT		 1709{
1710 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1711 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1712 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1713 .info = snd_ice1712_spdif_info,
1714 .get = snd_ice1712_spdif_maskc_get,
1715};
1716
6ca308d4 1717static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1da177e4
LT		 1718{
1719 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1721 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1722 .info = snd_ice1712_spdif_info,
1723 .get = snd_ice1712_spdif_maskp_get,
1724};
1725
6ca308d4
TI		 1726static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1727 struct snd_ctl_elem_value *ucontrol)
1da177e4 1728{
6ca308d4 1729 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1730 if (ice->spdif.ops.stream_get)
1731 ice->spdif.ops.stream_get(ice, ucontrol);
1732 return 0;
1733}
1734
6ca308d4
TI		 1735static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
1da177e4 1737{
6ca308d4 1738 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1739 if (ice->spdif.ops.stream_put)
1740 return ice->spdif.ops.stream_put(ice, ucontrol);
1741 return 0;
1742}
1743
6ca308d4 1744static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1da177e4 1745{
6ca308d4
TI		 1746 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1747 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4
LT		 1748 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1749 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1750 .info = snd_ice1712_spdif_info,
1751 .get = snd_ice1712_spdif_stream_get,
1752 .put = snd_ice1712_spdif_stream_put
1753};
1754
6ca308d4
TI		 1755int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
1756 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1757{
1758 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1759 uinfo->count = 1;
1760 uinfo->value.integer.min = 0;
1761 uinfo->value.integer.max = 1;
1762 return 0;
1763}
1764
6ca308d4
TI		 1765int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1766 struct snd_ctl_elem_value *ucontrol)
1da177e4 1767{
6ca308d4 1768 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1769 unsigned char mask = kcontrol->private_value & 0xff;
1770 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1771
1772 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI		 1773 ucontrol->value.integer.value[0] =
1774 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT		 1775 snd_ice1712_restore_gpio_status(ice);
1776 return 0;
1777}
1778
6ca308d4
TI		 1779int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1780 struct snd_ctl_elem_value *ucontrol)
1da177e4 1781{
6ca308d4 1782 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1783 unsigned char mask = kcontrol->private_value & 0xff;
1784 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1785 unsigned int val, nval;
1786
1787 if (kcontrol->private_value & (1 << 31))
1788 return -EPERM;
1789 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1790 snd_ice1712_save_gpio_status(ice);
1791 val = snd_ice1712_gpio_read(ice);
1792 nval |= val & ~mask;
1793 if (val != nval)
1794 snd_ice1712_gpio_write(ice, nval);
1795 snd_ice1712_restore_gpio_status(ice);
1796 return val != nval;
1797}
1798
1799/*
1800 * rate
1801 */
6ca308d4
TI		 1802static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1803 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1804{
1805 static char *texts[] = {
1806 "8000", /* 0: 6 */
1807 "9600", /* 1: 3 */
1808 "11025", /* 2: 10 */
1809 "12000", /* 3: 2 */
1810 "16000", /* 4: 5 */
1811 "22050", /* 5: 9 */
1812 "24000", /* 6: 1 */
1813 "32000", /* 7: 4 */
1814 "44100", /* 8: 8 */
1815 "48000", /* 9: 0 */
1816 "64000", /* 10: 15 */
1817 "88200", /* 11: 11 */
1818 "96000", /* 12: 7 */
1819 "IEC958 Input", /* 13: -- */
1820 };
1821 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1822 uinfo->count = 1;
1823 uinfo->value.enumerated.items = 14;
1824 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1825 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1826 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1827 return 0;
1828}
1829
6ca308d4
TI		 1830static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1831 struct snd_ctl_elem_value *ucontrol)
1da177e4 1832{
6ca308d4 1833 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1834 static unsigned char xlate[16] = {
1835 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1836 };
1837 unsigned char val;
1838
1839 spin_lock_irq(&ice->reg_lock);
1840 if (is_spdif_master(ice)) {
1841 ucontrol->value.enumerated.item[0] = 13;
1842 } else {
1843 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1844 if (val == 255) {
1845 snd_BUG();
1846 val = 0;
1847 }
1848 ucontrol->value.enumerated.item[0] = val;
1849 }
1850 spin_unlock_irq(&ice->reg_lock);
1851 return 0;
1852}
1853
6ca308d4
TI		 1854static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1855 struct snd_ctl_elem_value *ucontrol)
1da177e4 1856{
6ca308d4 1857 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1858 static unsigned int xrate[13] = {
1859 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1860 32000, 44100, 48000, 64000, 88200, 96000
1861 };
1862 unsigned char oval;
1863 int change = 0;
1864
1865 spin_lock_irq(&ice->reg_lock);
1866 oval = inb(ICEMT(ice, RATE));
1867 if (ucontrol->value.enumerated.item[0] == 13) {
1868 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1869 } else {
1870 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1871 spin_unlock_irq(&ice->reg_lock);
1872 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1873 spin_lock_irq(&ice->reg_lock);
1874 }
1875 change = inb(ICEMT(ice, RATE)) != oval;
1876 spin_unlock_irq(&ice->reg_lock);
1877
6ca308d4 1878 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1
JK		 1879 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1880 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT		 1881
1882 return change;
1883}
1884
6ca308d4 1885static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1da177e4
LT		 1886 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1887 .name = "Multi Track Internal Clock",
1888 .info = snd_ice1712_pro_internal_clock_info,
1889 .get = snd_ice1712_pro_internal_clock_get,
1890 .put = snd_ice1712_pro_internal_clock_put
1891};
1892
6ca308d4
TI		 1893static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1894 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1895{
1896 static char *texts[] = {
1897 "8000", /* 0: 6 */
1898 "9600", /* 1: 3 */
1899 "11025", /* 2: 10 */
1900 "12000", /* 3: 2 */
1901 "16000", /* 4: 5 */
1902 "22050", /* 5: 9 */
1903 "24000", /* 6: 1 */
1904 "32000", /* 7: 4 */
1905 "44100", /* 8: 8 */
1906 "48000", /* 9: 0 */
1907 "64000", /* 10: 15 */
1908 "88200", /* 11: 11 */
1909 "96000", /* 12: 7 */
1910 // "IEC958 Input", /* 13: -- */
1911 };
1912 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1913 uinfo->count = 1;
1914 uinfo->value.enumerated.items = 13;
1915 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1916 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1917 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1918 return 0;
1919}
1920
6ca308d4
TI		 1921static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1922 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1923{
1924 int val;
1925 static unsigned int xrate[13] = {
1926 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1927 32000, 44100, 48000, 64000, 88200, 96000
1928 };
1929
1930 for (val = 0; val < 13; val++) {
1931 if (xrate[val] == PRO_RATE_DEFAULT)
1932 break;
1933 }
1934
1935 ucontrol->value.enumerated.item[0] = val;
1936 return 0;
1937}
1938
6ca308d4
TI		 1939static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1940 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1941{
1942 static unsigned int xrate[13] = {
1943 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1944 32000, 44100, 48000, 64000, 88200, 96000
1945 };
1946 unsigned char oval;
1947 int change = 0;
1948
1949 oval = PRO_RATE_DEFAULT;
1950 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1951 change = PRO_RATE_DEFAULT != oval;
1952
1953 return change;
1954}
1955
6ca308d4 1956static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1da177e4
LT		 1957 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1958 .name = "Multi Track Internal Clock Default",
1959 .info = snd_ice1712_pro_internal_clock_default_info,
1960 .get = snd_ice1712_pro_internal_clock_default_get,
1961 .put = snd_ice1712_pro_internal_clock_default_put
1962};
1963
6ca308d4
TI		 1964static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1966{
1967 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1968 uinfo->count = 1;
1969 uinfo->value.integer.min = 0;
1970 uinfo->value.integer.max = 1;
1971 return 0;
1972}
1973
6ca308d4
TI		 1974static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1975 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1976{
1977 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1978 return 0;
1979}
1980
6ca308d4
TI		 1981static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1982 struct snd_ctl_elem_value *ucontrol)
1da177e4 1983{
6ca308d4 1984 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1985 int change = 0, nval;
1986
1987 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1988 spin_lock_irq(&ice->reg_lock);
1989 change = PRO_RATE_LOCKED != nval;
1990 PRO_RATE_LOCKED = nval;
1991 spin_unlock_irq(&ice->reg_lock);
1992 return change;
1993}
1994
6ca308d4 1995static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1da177e4
LT		 1996 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1997 .name = "Multi Track Rate Locking",
1998 .info = snd_ice1712_pro_rate_locking_info,
1999 .get = snd_ice1712_pro_rate_locking_get,
2000 .put = snd_ice1712_pro_rate_locking_put
2001};
2002
6ca308d4
TI		 2003static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
2004 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2005{
2006 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2007 uinfo->count = 1;
2008 uinfo->value.integer.min = 0;
2009 uinfo->value.integer.max = 1;
2010 return 0;
2011}
2012
6ca308d4
TI		 2013static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2014 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 2015{
2016 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2017 return 0;
2018}
2019
6ca308d4
TI		 2020static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2021 struct snd_ctl_elem_value *ucontrol)
1da177e4 2022{
6ca308d4 2023 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2024 int change = 0, nval;
2025
2026 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2027 spin_lock_irq(&ice->reg_lock);
2028 change = PRO_RATE_RESET != nval;
2029 PRO_RATE_RESET = nval;
2030 spin_unlock_irq(&ice->reg_lock);
2031 return change;
2032}
2033
6ca308d4 2034static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
1da177e4
LT		 2035 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2036 .name = "Multi Track Rate Reset",
2037 .info = snd_ice1712_pro_rate_reset_info,
2038 .get = snd_ice1712_pro_rate_reset_get,
2039 .put = snd_ice1712_pro_rate_reset_put
2040};
2041
2042/*
2043 * routing
2044 */
6ca308d4
TI		 2045static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2046 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2047{
2048 static char *texts[] = {
2049 "PCM Out", /* 0 */
2050 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2051 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2052 "IEC958 In L", "IEC958 In R", /* 9-10 */
2053 "Digital Mixer", /* 11 - optional */
2054 };
2055
2056 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2057 uinfo->count = 1;
6ca308d4
TI		 2058 uinfo->value.enumerated.items =
2059 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT		 2060 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2061 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2062 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2063 return 0;
2064}
2065
6ca308d4
TI		 2066static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2067 struct snd_ctl_elem_value *ucontrol)
1da177e4 2068{
6ca308d4 2069 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2070 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2071 unsigned int val, cval;
2072
2073 spin_lock_irq(&ice->reg_lock);
2074 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2075 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2076 spin_unlock_irq(&ice->reg_lock);
2077
2078 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2079 val &= 3;
2080 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2081 if (val == 1 && idx < 2)
2082 ucontrol->value.enumerated.item[0] = 11;
2083 else if (val == 2)
2084 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2085 else if (val == 3)
2086 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2087 else
2088 ucontrol->value.enumerated.item[0] = 0;
2089 return 0;
2090}
2091
6ca308d4
TI		 2092static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2093 struct snd_ctl_elem_value *ucontrol)
1da177e4 2094{
6ca308d4 2095 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2096 int change, shift;
2097 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2098 unsigned int val, old_val, nval;
2099
2100 /* update PSDOUT */
2101 if (ucontrol->value.enumerated.item[0] >= 11)
2102 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2103 else if (ucontrol->value.enumerated.item[0] >= 9)
2104 nval = 3; /* spdif in */
2105 else if (ucontrol->value.enumerated.item[0] >= 1)
2106 nval = 2; /* analog in */
2107 else
2108 nval = 0; /* pcm */
2109 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2110 spin_lock_irq(&ice->reg_lock);
2111 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2112 val &= ~(0x03 << shift);
2113 val |= nval << shift;
2114 change = val != old_val;
2115 if (change)
2116 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2117 spin_unlock_irq(&ice->reg_lock);
2118 if (nval < 2) /* dig mixer of pcm */
2119 return change;
2120
2121 /* update CAPTURE */
2122 spin_lock_irq(&ice->reg_lock);
2123 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2124 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2125 if (nval == 2) { /* analog in */
2126 nval = ucontrol->value.enumerated.item[0] - 1;
2127 val &= ~(0x07 << shift);
2128 val |= nval << shift;
2129 } else { /* spdif in */
2130 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2131 val &= ~(0x08 << shift);
2132 val |= nval << shift;
2133 }
2134 if (val != old_val) {
2135 change = 1;
2136 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2137 }
2138 spin_unlock_irq(&ice->reg_lock);
2139 return change;
2140}
2141
6ca308d4
TI		 2142static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2143 struct snd_ctl_elem_value *ucontrol)
1da177e4 2144{
6ca308d4 2145 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2146 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2147 unsigned int val, cval;
2148 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2149 cval = (val >> (idx * 4 + 8)) & 0x0f;
2150 val = (val >> (idx * 2)) & 0x03;
2151 if (val == 1)
2152 ucontrol->value.enumerated.item[0] = 11;
2153 else if (val == 2)
2154 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2155 else if (val == 3)
2156 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2157 else
2158 ucontrol->value.enumerated.item[0] = 0;
2159 return 0;
2160}
2161
6ca308d4
TI		 2162static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
1da177e4 2164{
6ca308d4 2165 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2166 int change, shift;
2167 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2168 unsigned int val, old_val, nval;
2169
2170 /* update SPDOUT */
2171 spin_lock_irq(&ice->reg_lock);
2172 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2173 if (ucontrol->value.enumerated.item[0] >= 11)
2174 nval = 1;
2175 else if (ucontrol->value.enumerated.item[0] >= 9)
2176 nval = 3;
2177 else if (ucontrol->value.enumerated.item[0] >= 1)
2178 nval = 2;
2179 else
2180 nval = 0;
2181 shift = idx * 2;
2182 val &= ~(0x03 << shift);
2183 val |= nval << shift;
2184 shift = idx * 4 + 8;
2185 if (nval == 2) {
2186 nval = ucontrol->value.enumerated.item[0] - 1;
2187 val &= ~(0x07 << shift);
2188 val |= nval << shift;
2189 } else if (nval == 3) {
2190 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2191 val &= ~(0x08 << shift);
2192 val |= nval << shift;
2193 }
2194 change = val != old_val;
2195 if (change)
2196 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2197 spin_unlock_irq(&ice->reg_lock);
2198 return change;
2199}
2200
6ca308d4 2201static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
1da177e4
LT		 2202 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2203 .name = "H/W Playback Route",
2204 .info = snd_ice1712_pro_route_info,
2205 .get = snd_ice1712_pro_route_analog_get,
2206 .put = snd_ice1712_pro_route_analog_put,
2207};
2208
6ca308d4 2209static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
1da177e4 2210 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
10e8d78a 2211 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1da177e4
LT		 2212 .info = snd_ice1712_pro_route_info,
2213 .get = snd_ice1712_pro_route_spdif_get,
2214 .put = snd_ice1712_pro_route_spdif_put,
2215 .count = 2,
2216};
2217
2218
6ca308d4
TI		 2219static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2220 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2221{
2222 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2223 uinfo->count = 1;
2224 uinfo->value.integer.min = 0;
2225 uinfo->value.integer.max = 255;
2226 return 0;
2227}
2228
6ca308d4
TI		 2229static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2230 struct snd_ctl_elem_value *ucontrol)
1da177e4 2231{
6ca308d4 2232 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2233
2234 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2235 return 0;
2236}
2237
6ca308d4
TI		 2238static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2239 struct snd_ctl_elem_value *ucontrol)
1da177e4 2240{
6ca308d4 2241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2242 int change;
2243
2244 spin_lock_irq(&ice->reg_lock);
2245 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2246 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2247 spin_unlock_irq(&ice->reg_lock);
2248 return change;
2249}
2250
6ca308d4 2251static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
1da177e4
LT		 2252 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2253 .name = "Multi Track Volume Rate",
2254 .info = snd_ice1712_pro_volume_rate_info,
2255 .get = snd_ice1712_pro_volume_rate_get,
2256 .put = snd_ice1712_pro_volume_rate_put
2257};
2258
6ca308d4
TI		 2259static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2260 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2261{
2262 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2263 uinfo->count = 22;
2264 uinfo->value.integer.min = 0;
2265 uinfo->value.integer.max = 255;
2266 return 0;
2267}
2268
6ca308d4
TI		 2269static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2270 struct snd_ctl_elem_value *ucontrol)
1da177e4 2271{
6ca308d4 2272 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2273 int idx;
2274
2275 spin_lock_irq(&ice->reg_lock);
2276 for (idx = 0; idx < 22; idx++) {
2277 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2278 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2279 }
2280 spin_unlock_irq(&ice->reg_lock);
2281 return 0;
2282}
2283
6ca308d4 2284static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
1da177e4
LT		 2285 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2286 .name = "Multi Track Peak",
2287 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2288 .info = snd_ice1712_pro_peak_info,
2289 .get = snd_ice1712_pro_peak_get
2290};
2291
2292/*
2293 *
2294 */
2295
2296/*
2297 * list of available boards
2298 */
2299static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2300 snd_ice1712_hoontech_cards,
2301 snd_ice1712_delta_cards,
2302 snd_ice1712_ews_cards,
2303 NULL,
2304};
2305
6ca308d4 2306static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
1da177e4
LT		 2307 unsigned char dev,
2308 unsigned char addr)
2309{
2310 long t = 0x10000;
2311
2312 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2313 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2314 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2315 return inb(ICEREG(ice, I2C_DATA));
2316}
2317
6ca308d4
TI		 2318static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2319 const char *modelname)
1da177e4
LT		 2320{
2321 int dev = 0xa0; /* EEPROM device address */
2322 unsigned int i, size;
2323 struct snd_ice1712_card_info **tbl, *c;
2324
2325 if (! modelname || ! *modelname) {
2326 ice->eeprom.subvendor = 0;
2327 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2328 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2329 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2330 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2331 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI		 2332 if (ice->eeprom.subvendor == 0 ||
2333 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2334 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2335 u16 vendor, device;
2336 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2337 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2338 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2339 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2340 printk(KERN_ERR "ice1712: No valid ID is found\n");
2341 return -ENXIO;
2342 }
2343 }
2344 }
2345 for (tbl = card_tables; *tbl; tbl++) {
2346 for (c = *tbl; c->subvendor; c++) {
2347 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2348 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2349 ice->eeprom.subvendor = c->subvendor;
2350 } else if (c->subvendor != ice->eeprom.subvendor)
2351 continue;
2352 if (! c->eeprom_size || ! c->eeprom_data)
2353 goto found;
2354 /* if the EEPROM is given by the driver, use it */
2355 snd_printdd("using the defined eeprom..\n");
2356 ice->eeprom.version = 1;
2357 ice->eeprom.size = c->eeprom_size + 6;
2358 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2359 goto read_skipped;
2360 }
2361 }
6ca308d4
TI		 2362 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2363 ice->eeprom.subvendor);
1da177e4
LT		 2364
2365 found:
2366 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2367 if (ice->eeprom.size < 6)
2368 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2369 else if (ice->eeprom.size > 32) {
99b359ba 2370 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT		 2371 return -EIO;
2372 }
2373 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2374 if (ice->eeprom.version != 1) {
6ca308d4
TI		 2375 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2376 ice->eeprom.version);
1da177e4
LT		 2377 /* return -EIO; */
2378 }
2379 size = ice->eeprom.size - 6;
2380 for (i = 0; i < size; i++)
2381 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2382
2383 read_skipped:
2384 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2385 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2386 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2387
2388 return 0;
2389}
2390
2391
2392
6ca308d4 2393static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2394{
2395 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2396 udelay(200);
2397 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2398 udelay(200);
531af462
AH		 2399 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) {
2400 /* Limit active ADCs and DACs to 6; */
2401 /* Note: DXR extension not supported */
2402 pci_write_config_byte(ice->pci, 0x60, 0x0a);
2403 } else {
2404 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2405 }
1da177e4
LT		 2406 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2407 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2408 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2409 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2410 ice->gpio.write_mask = ice->eeprom.gpiomask;
2411 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI		 2412 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2413 ice->eeprom.gpiomask);
2414 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2415 ice->eeprom.gpiodir);
2416 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2417 ice->eeprom.gpiostate);
1da177e4
LT		 2418 } else {
2419 ice->gpio.write_mask = 0xc0;
2420 ice->gpio.direction = 0xff;
2421 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2422 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI		 2423 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2424 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT		 2425 }
2426 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2427 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2428 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2429 udelay(100);
2430 outb(0, ICEREG(ice, AC97_CMD));
2431 udelay(200);
2432 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2433 }
2434 snd_ice1712_set_pro_rate(ice, 48000, 1);
2435
2436 return 0;
2437}
2438
6ca308d4 2439int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2440{
2441 int err;
6ca308d4 2442 struct snd_kcontrol *kctl;
1da177e4
LT		 2443
2444 snd_assert(ice->pcm_pro != NULL, return -EIO);
2445 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2446 if (err < 0)
2447 return err;
2448 kctl->id.device = ice->pcm_pro->device;
2449 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2450 if (err < 0)
2451 return err;
2452 kctl->id.device = ice->pcm_pro->device;
2453 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2454 if (err < 0)
2455 return err;
2456 kctl->id.device = ice->pcm_pro->device;
2457 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2458 if (err < 0)
2459 return err;
2460 kctl->id.device = ice->pcm_pro->device;
2461 ice->spdif.stream_ctl = kctl;
2462 return 0;
2463}
2464
2465
6ca308d4 2466static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2467{
2468 int err;
2469
2470 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2471 if (err < 0)
2472 return err;
2473 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2474 if (err < 0)
2475 return err;
2476 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2477 if (err < 0)
2478 return err;
2479
2480 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2481 if (err < 0)
2482 return err;
2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2484 if (err < 0)
2485 return err;
2486
2487 if (ice->num_total_dacs > 0) {
6ca308d4 2488 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT		 2489 tmp.count = ice->num_total_dacs;
2490 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2491 if (err < 0)
2492 return err;
2493 }
2494
2495 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2496 if (err < 0)
2497 return err;
2498
2499 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2500 if (err < 0)
2501 return err;
2502 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2503 if (err < 0)
2504 return err;
2505
2506 return 0;
2507}
2508
6ca308d4 2509static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4
LT		 2510{
2511 if (! ice->port)
2512 goto __hw_end;
2513 /* mask all interrupts */
2514 outb(0xc0, ICEMT(ice, IRQ));
2515 outb(0xff, ICEREG(ice, IRQMASK));
2516 /* --- */
2517 __hw_end:
2518 if (ice->irq >= 0) {
2519 synchronize_irq(ice->irq);
6ca308d4 2520 free_irq(ice->irq, ice);
1da177e4
LT		 2521 }
2522 if (ice->port)
2523 pci_release_regions(ice->pci);
2524 snd_ice1712_akm4xxx_free(ice);
2525 pci_disable_device(ice->pci);
2526 kfree(ice);
2527 return 0;
2528}
2529
6ca308d4 2530static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2531{
6ca308d4 2532 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2533 return snd_ice1712_free(ice);
2534}
2535
6ca308d4 2536static int __devinit snd_ice1712_create(struct snd_card *card,
1da177e4
LT		 2537 struct pci_dev *pci,
2538 const char *modelname,
2539 int omni,
2540 int cs8427_timeout,
531af462 2541 int dxr_enable,
6ca308d4 2542 struct snd_ice1712 ** r_ice1712)
1da177e4 2543{
6ca308d4 2544 struct snd_ice1712 *ice;
1da177e4 2545 int err;
6ca308d4 2546 static struct snd_device_ops ops = {
1da177e4
LT		 2547 .dev_free = snd_ice1712_dev_free,
2548 };
2549
2550 *r_ice1712 = NULL;
2551
2552 /* enable PCI device */
2553 if ((err = pci_enable_device(pci)) < 0)
2554 return err;
2555 /* check, if we can restrict PCI DMA transfers to 28 bits */
2556 if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
2557 pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
99b359ba 2558 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT		 2559 pci_disable_device(pci);
2560 return -ENXIO;
2561 }
2562
e560d8d8 2563 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2564 if (ice == NULL) {
2565 pci_disable_device(pci);
2566 return -ENOMEM;
2567 }
2568 ice->omni = omni ? 1 : 0;
2569 if (cs8427_timeout < 1)
2570 cs8427_timeout = 1;
2571 else if (cs8427_timeout > 1000)
2572 cs8427_timeout = 1000;
2573 ice->cs8427_timeout = cs8427_timeout;
531af462 2574 ice->dxr_enable = dxr_enable;
1da177e4 2575 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2576 mutex_init(&ice->gpio_mutex);
2577 mutex_init(&ice->i2c_mutex);
2578 mutex_init(&ice->open_mutex);
1da177e4
LT		 2579 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2580 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2581 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2582 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2583
2584 ice->spdif.cs8403_bits =
2585 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2586 0x10 | /* no emphasis */
2587 0x20); /* PCM encoder/decoder */
2588 ice->card = card;
2589 ice->pci = pci;
2590 ice->irq = -1;
2591 pci_set_master(pci);
2592 pci_write_config_word(ice->pci, 0x40, 0x807f);
2593 pci_write_config_word(ice->pci, 0x42, 0x0006);
2594 snd_ice1712_proc_init(ice);
2595 synchronize_irq(pci->irq);
2596
2597 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2598 kfree(ice);
2599 pci_disable_device(pci);
2600 return err;
2601 }
2602 ice->port = pci_resource_start(pci, 0);
2603 ice->ddma_port = pci_resource_start(pci, 1);
2604 ice->dmapath_port = pci_resource_start(pci, 2);
2605 ice->profi_port = pci_resource_start(pci, 3);
2606
6ca308d4
TI		 2607 if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
2608 "ICE1712", ice)) {
99b359ba 2609 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2610 snd_ice1712_free(ice);
2611 return -EIO;
2612 }
2613
2614 ice->irq = pci->irq;
2615
2616 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2617 snd_ice1712_free(ice);
2618 return -EIO;
2619 }
2620 if (snd_ice1712_chip_init(ice) < 0) {
2621 snd_ice1712_free(ice);
2622 return -EIO;
2623 }
2624
2625 /* unmask used interrupts */
6ca308d4
TI		 2626 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2627 ICE1712_IRQ_MPU2 : 0) |
2628 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2629 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
1da177e4
LT		 2630 ICEREG(ice, IRQMASK));
2631 outb(0x00, ICEMT(ice, IRQ));
2632
2633 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2634 snd_ice1712_free(ice);
2635 return err;
2636 }
2637
2638 snd_card_set_dev(card, &pci->dev);
2639
2640 *r_ice1712 = ice;
2641 return 0;
2642}
2643
2644
2645/*
2646 *
2647 * Registration
2648 *
2649 */
2650
2651static struct snd_ice1712_card_info no_matched __devinitdata;
2652
2653static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2654 const struct pci_device_id *pci_id)
2655{
2656 static int dev;
6ca308d4
TI		 2657 struct snd_card *card;
2658 struct snd_ice1712 *ice;
1da177e4
LT		 2659 int pcm_dev = 0, err;
2660 struct snd_ice1712_card_info **tbl, *c;
2661
2662 if (dev >= SNDRV_CARDS)
2663 return -ENODEV;
2664 if (!enable[dev]) {
2665 dev++;
2666 return -ENOENT;
2667 }
2668
2669 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2670 if (card == NULL)
2671 return -ENOMEM;
2672
2673 strcpy(card->driver, "ICE1712");
2674 strcpy(card->shortname, "ICEnsemble ICE1712");
2675
6ca308d4 2676 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
531af462
AH		 2677 cs8427_timeout[dev], dxr_enable[dev],
2678 &ice)) < 0) {
1da177e4
LT		 2679 snd_card_free(card);
2680 return err;
2681 }
2682
2683 for (tbl = card_tables; *tbl; tbl++) {
2684 for (c = *tbl; c->subvendor; c++) {
2685 if (c->subvendor == ice->eeprom.subvendor) {
2686 strcpy(card->shortname, c->name);
2687 if (c->driver) /* specific driver? */
2688 strcpy(card->driver, c->driver);
2689 if (c->chip_init) {
2690 if ((err = c->chip_init(ice)) < 0) {
2691 snd_card_free(card);
2692 return err;
2693 }
2694 }
2695 goto __found;
2696 }
2697 }
2698 }
2699 c = &no_matched;
2700 __found:
2701
2702 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2703 snd_card_free(card);
2704 return err;
2705 }
2706
2707 if (ice_has_con_ac97(ice))
2708 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2709 snd_card_free(card);
2710 return err;
2711 }
2712
2713 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2714 snd_card_free(card);
2715 return err;
2716 }
2717
2718 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2719 snd_card_free(card);
2720 return err;
2721 }
2722
2723 if (c->build_controls) {
2724 if ((err = c->build_controls(ice)) < 0) {
2725 snd_card_free(card);
2726 return err;
2727 }
2728 }
2729
2730 if (ice_has_con_ac97(ice))
2731 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2732 snd_card_free(card);
2733 return err;
2734 }
2735
2736 if (! c->no_mpu401) {
2737 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2738 ICEREG(ice, MPU1_CTRL), 1,
2739 ice->irq, 0,
2740 &ice->rmidi[0])) < 0) {
2741 snd_card_free(card);
2742 return err;
2743 }
2744
2745 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
2746 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2747 ICEREG(ice, MPU2_CTRL), 1,
2748 ice->irq, 0,
2749 &ice->rmidi[1])) < 0) {
2750 snd_card_free(card);
2751 return err;
2752 }
2753 }
2754
e957ebf1
JK		 2755 snd_ice1712_set_input_clock_source(ice, 0);
2756
1da177e4
LT		 2757 sprintf(card->longname, "%s at 0x%lx, irq %i",
2758 card->shortname, ice->port, ice->irq);
2759
2760 if ((err = snd_card_register(card)) < 0) {
2761 snd_card_free(card);
2762 return err;
2763 }
2764 pci_set_drvdata(pci, card);
2765 dev++;
2766 return 0;
2767}
2768
2769static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2770{
2771 snd_card_free(pci_get_drvdata(pci));
2772 pci_set_drvdata(pci, NULL);
2773}
2774
2775static struct pci_driver driver = {
2776 .name = "ICE1712",
2777 .id_table = snd_ice1712_ids,
2778 .probe = snd_ice1712_probe,
2779 .remove = __devexit_p(snd_ice1712_remove),
2780};
2781
2782static int __init alsa_card_ice1712_init(void)
2783{
01d25d46 2784 return pci_register_driver(&driver);
1da177e4
LT		 2785}
2786
2787static void __exit alsa_card_ice1712_exit(void)
2788{
2789 pci_unregister_driver(&driver);
2790}
2791
2792module_init(alsa_card_ice1712_init)
2793module_exit(alsa_card_ice1712_exit)
Linux kernel - Deliverables
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