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ALSA: hda - Do not assign streams in reverse order
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
c1017a4c 4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
3d8cb466 20 */
1da177e4
LT		 21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
3d8cb466 38 * I have left out support for 176.4 and 192 KHz for the moment.
1da177e4
LT		 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
1da177e4
LT		 50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
9d2f928d 54#include <linux/dma-mapping.h>
1da177e4 55#include <linux/slab.h>
65a77217 56#include <linux/module.h>
62932df8 57#include <linux/mutex.h>
910638ae 58
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/cs8427.h>
61#include <sound/info.h>
1da177e4 62#include <sound/initval.h>
680ef792 63#include <sound/tlv.h>
1da177e4
LT		 64
65#include <sound/asoundef.h>
66
67#include "ice1712.h"
68
69/* lowlevel routines */
70#include "delta.h"
71#include "ews.h"
72#include "hoontech.h"
73
c1017a4c 74MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 75MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76MODULE_LICENSE("GPL");
77MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 86static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
1da177e4 87static char *model[SNDRV_CARDS];
a67ff6a5 88static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
7c9d440e 89static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
01a00e5e 90static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
1da177e4
LT		 91
92module_param_array(index, int, NULL, 0444);
93MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94module_param_array(id, charp, NULL, 0444);
95MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96module_param_array(enable, bool, NULL, 0444);
97MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98module_param_array(omni, bool, NULL, 0444);
99MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100module_param_array(cs8427_timeout, int, NULL, 0444);
101MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102module_param_array(model, charp, NULL, 0444);
103MODULE_PARM_DESC(model, "Use the given board model.");
531af462 104module_param_array(dxr_enable, int, NULL, 0444);
01a00e5e 105MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 106
1da177e4 107
cebe41d4 108static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
28d27aae 109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
1da177e4
LT		 110 { 0, }
111};
112
113MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
6ca308d4
TI		 115static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT		 117
118static int PRO_RATE_LOCKED;
119static int PRO_RATE_RESET = 1;
120static unsigned int PRO_RATE_DEFAULT = 44100;
121
122/*
123 * Basic I/O
124 */
3d8cb466 125
1da177e4 126/* check whether the clock mode is spdif-in */
6ca308d4 127static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 128{
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130}
131
6ca308d4 132static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 133{
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135}
136
3d8cb466 137static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
1da177e4
LT		 138{
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141}
142
3d8cb466 143static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
1da177e4
LT		 144{
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147}
148
6ca308d4 149static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 150 unsigned short reg,
151 unsigned short val)
152{
6ca308d4 153 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172}
173
6ca308d4 174static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 175 unsigned short reg)
176{
6ca308d4 177 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197}
198
199/*
200 * pro ac97 section
201 */
202
6ca308d4 203static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 204 unsigned short reg,
205 unsigned short val)
206{
6ca308d4 207 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226}
227
228
6ca308d4 229static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 230 unsigned short reg)
231{
6ca308d4 232 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252}
253
254/*
255 * consumer ac97 digital mix
256 */
a5ce8890 257#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
1da177e4 258
6ca308d4 259static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 260{
6ca308d4 261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 262
1da177e4
LT		 263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265}
266
6ca308d4 267static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 268{
6ca308d4 269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 270 unsigned char val, nval;
3d8cb466 271
1da177e4
LT		 272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
3d8cb466
AB		 275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
1da177e4
LT		 277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280}
281
e23e7a14 282static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
1da177e4
LT		 283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288};
289
290
291/*
292 * gpio operations
293 */
6ca308d4 294static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 295{
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298}
299
49470306
PH		 300static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301{
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303}
304
305static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306{
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308}
309
6ca308d4 310static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 311{
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314}
315
6ca308d4 316static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 317{
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319}
320
6ca308d4 321static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 322{
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325}
326
1da177e4
LT		 327/*
328 *
329 * CS8427 interface
330 *
331 */
332
333/*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
6ca308d4 337static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT		 338{
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
3d8cb466 342
1da177e4
LT		 343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367}
368
369/*
370 * spdif callbacks
371 */
6ca308d4 372static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 373{
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375}
376
6ca308d4 377static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 378{
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380}
381
6ca308d4 382static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT		 383{
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385}
386
387/*
388 * create and initialize callbacks for cs8427 interface
389 */
e23e7a14 390int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT		 391{
392 int err;
393
3d8cb466
AB		 394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
6dfb5aff 397 dev_err(ice->card->dev, "CS8427 initialization failed\n");
1da177e4
LT		 398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404}
405
e957ebf1
JK		 406static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407{
3d8cb466
AB		 408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
e957ebf1
JK		 411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419}
1da177e4
LT		 420
421/*
422 * Interrupt handler
423 */
424
7d12e780 425static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
1da177e4 426{
6ca308d4 427 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
7d12e780 438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
1da177e4
LT		 439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
7d12e780 446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
1da177e4
LT		 447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
6ca308d4 468 struct snd_pcm_substream *substream;
1da177e4 469 pbkstatus = inw(ICEDS(ice, INTSTAT));
6dfb5aff 470 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
1da177e4
LT		 471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
3d8cb466
AB		 474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
1da177e4
LT		 476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493}
494
495
496/*
497 * PCM part - misc
498 */
499
6ca308d4
TI		 500static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 502{
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504}
505
6ca308d4 506static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 507{
508 return snd_pcm_lib_free_pages(substream);
509}
510
511/*
512 * PCM part - consumer I/O
513 */
514
6ca308d4 515static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 516 int cmd)
517{
6ca308d4 518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 519 int result = 0;
520 u32 tmp;
3d8cb466 521
1da177e4
LT		 522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538}
539
6ca308d4 540static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 541 int cmd)
542{
6ca308d4 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 544 int result = 0;
545 u32 tmp;
3d8cb466 546
1da177e4
LT		 547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563}
564
6ca308d4 565static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 566 int cmd)
567{
6ca308d4 568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 569 int result = 0;
570 u8 tmp;
3d8cb466 571
1da177e4
LT		 572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584}
585
6ca308d4 586static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 587{
6ca308d4
TI		 588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617}
618
6ca308d4 619static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 620{
6ca308d4
TI		 621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 623 u32 period_size, buf_size, rate, tmp, chn;
624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
627 tmp = 0x0064;
628 if (snd_pcm_format_width(runtime->format) == 16)
629 tmp &= ~0x04;
630 if (runtime->channels == 2)
631 tmp |= 0x08;
632 rate = (runtime->rate * 8192) / 375;
633 if (rate > 0x000fffff)
634 rate = 0x000fffff;
635 ice->playback_con_active_buf[substream->number] = 0;
636 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
637 chn = substream->number * 2;
638 spin_lock_irq(&ice->reg_lock);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
645 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
646 if (runtime->channels == 2) {
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
648 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
649 }
650 spin_unlock_irq(&ice->reg_lock);
651 return 0;
652}
653
6ca308d4 654static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 655{
6ca308d4
TI		 656 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
657 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 658 u32 period_size, buf_size;
659 u8 tmp;
660
661 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
662 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
663 tmp = 0x06;
664 if (snd_pcm_format_width(runtime->format) == 16)
665 tmp &= ~0x04;
666 if (runtime->channels == 2)
667 tmp &= ~0x02;
668 spin_lock_irq(&ice->reg_lock);
669 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
670 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
673 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
674 spin_unlock_irq(&ice->reg_lock);
675 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
676 return 0;
677}
678
6ca308d4 679static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 680{
6ca308d4
TI		 681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
682 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 683 size_t ptr;
684
685 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
686 return 0;
687 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
688 if (ptr == runtime->buffer_size)
689 ptr = 0;
690 return bytes_to_frames(substream->runtime, ptr);
691}
692
6ca308d4 693static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 694{
6ca308d4 695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 696 u8 addr;
697 size_t ptr;
698
699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
700 return 0;
701 if (ice->playback_con_active_buf[substream->number])
702 addr = ICE1712_DSC_ADDR1;
703 else
704 addr = ICE1712_DSC_ADDR0;
705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
706 ice->playback_con_virt_addr[substream->number];
707 if (ptr == substream->runtime->buffer_size)
708 ptr = 0;
709 return bytes_to_frames(substream->runtime, ptr);
710}
711
6ca308d4 712static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 713{
6ca308d4 714 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 715 size_t ptr;
716
717 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
718 return 0;
719 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
720 if (ptr == substream->runtime->buffer_size)
721 ptr = 0;
722 return bytes_to_frames(substream->runtime, ptr);
723}
724
3d8cb466 725static const struct snd_pcm_hardware snd_ice1712_playback = {
1da177e4
LT		 726 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
727 SNDRV_PCM_INFO_BLOCK_TRANSFER |
728 SNDRV_PCM_INFO_MMAP_VALID |
729 SNDRV_PCM_INFO_PAUSE),
730 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
731 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
732 .rate_min = 4000,
733 .rate_max = 48000,
734 .channels_min = 1,
735 .channels_max = 2,
736 .buffer_bytes_max = (64*1024),
737 .period_bytes_min = 64,
738 .period_bytes_max = (64*1024),
739 .periods_min = 1,
740 .periods_max = 1024,
741 .fifo_size = 0,
742};
743
3d8cb466 744static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
1da177e4
LT		 745 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
746 SNDRV_PCM_INFO_BLOCK_TRANSFER |
747 SNDRV_PCM_INFO_MMAP_VALID |
748 SNDRV_PCM_INFO_PAUSE),
749 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
750 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
751 .rate_min = 4000,
752 .rate_max = 48000,
753 .channels_min = 1,
754 .channels_max = 2,
755 .buffer_bytes_max = (128*1024),
756 .period_bytes_min = 64,
757 .period_bytes_max = (128*1024),
758 .periods_min = 2,
759 .periods_max = 2,
760 .fifo_size = 0,
761};
762
3d8cb466 763static const struct snd_pcm_hardware snd_ice1712_capture = {
1da177e4
LT		 764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
765 SNDRV_PCM_INFO_BLOCK_TRANSFER |
766 SNDRV_PCM_INFO_MMAP_VALID),
767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
769 .rate_min = 4000,
770 .rate_max = 48000,
771 .channels_min = 1,
772 .channels_max = 2,
773 .buffer_bytes_max = (64*1024),
774 .period_bytes_min = 64,
775 .period_bytes_max = (64*1024),
776 .periods_min = 1,
777 .periods_max = 1024,
778 .fifo_size = 0,
779};
780
6ca308d4 781static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 782{
6ca308d4
TI		 783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 785
786 ice->playback_con_substream = substream;
787 runtime->hw = snd_ice1712_playback;
788 return 0;
789}
790
6ca308d4 791static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 792{
6ca308d4
TI		 793 struct snd_pcm_runtime *runtime = substream->runtime;
794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 795 u32 tmp;
796
797 ice->playback_con_substream_ds[substream->number] = substream;
798 runtime->hw = snd_ice1712_playback_ds;
3d8cb466 799 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
801 outw(tmp, ICEDS(ice, INTMASK));
802 spin_unlock_irq(&ice->reg_lock);
803 return 0;
804}
805
6ca308d4 806static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 807{
6ca308d4
TI		 808 struct snd_pcm_runtime *runtime = substream->runtime;
809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 810
811 ice->capture_con_substream = substream;
812 runtime->hw = snd_ice1712_capture;
813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
815 runtime->hw.rate_min = 48000;
816 return 0;
817}
818
6ca308d4 819static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 820{
6ca308d4 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 822
823 ice->playback_con_substream = NULL;
824 return 0;
825}
826
6ca308d4 827static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 828{
6ca308d4 829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 830 u32 tmp;
831
3d8cb466 832 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
834 outw(tmp, ICEDS(ice, INTMASK));
835 spin_unlock_irq(&ice->reg_lock);
836 ice->playback_con_substream_ds[substream->number] = NULL;
837 return 0;
838}
839
6ca308d4 840static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 841{
6ca308d4 842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 843
844 ice->capture_con_substream = NULL;
845 return 0;
846}
847
6ca308d4 848static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT		 849 .open = snd_ice1712_playback_open,
850 .close = snd_ice1712_playback_close,
851 .ioctl = snd_pcm_lib_ioctl,
852 .hw_params = snd_ice1712_hw_params,
853 .hw_free = snd_ice1712_hw_free,
854 .prepare = snd_ice1712_playback_prepare,
855 .trigger = snd_ice1712_playback_trigger,
856 .pointer = snd_ice1712_playback_pointer,
857};
858
6ca308d4 859static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT		 860 .open = snd_ice1712_playback_ds_open,
861 .close = snd_ice1712_playback_ds_close,
862 .ioctl = snd_pcm_lib_ioctl,
863 .hw_params = snd_ice1712_hw_params,
864 .hw_free = snd_ice1712_hw_free,
865 .prepare = snd_ice1712_playback_ds_prepare,
866 .trigger = snd_ice1712_playback_ds_trigger,
867 .pointer = snd_ice1712_playback_ds_pointer,
868};
869
6ca308d4 870static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT		 871 .open = snd_ice1712_capture_open,
872 .close = snd_ice1712_capture_close,
873 .ioctl = snd_pcm_lib_ioctl,
874 .hw_params = snd_ice1712_hw_params,
875 .hw_free = snd_ice1712_hw_free,
876 .prepare = snd_ice1712_capture_prepare,
877 .trigger = snd_ice1712_capture_trigger,
878 .pointer = snd_ice1712_capture_pointer,
879};
880
e23e7a14 881static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 882{
6ca308d4 883 struct snd_pcm *pcm;
1da177e4
LT		 884 int err;
885
886 if (rpcm)
887 *rpcm = NULL;
888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
889 if (err < 0)
890 return err;
891
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
894
895 pcm->private_data = ice;
1da177e4
LT		 896 pcm->info_flags = 0;
897 strcpy(pcm->name, "ICE1712 consumer");
898 ice->pcm = pcm;
899
900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
902
903 if (rpcm)
904 *rpcm = pcm;
905
6dfb5aff
TI		 906 dev_warn(ice->card->dev,
907 "Consumer PCM code does not work well at the moment --jk\n");
1da177e4
LT		 908
909 return 0;
910}
911
e23e7a14 912static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 913{
6ca308d4 914 struct snd_pcm *pcm;
1da177e4
LT		 915 int err;
916
917 if (rpcm)
918 *rpcm = NULL;
919 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
920 if (err < 0)
921 return err;
922
923 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
924
925 pcm->private_data = ice;
1da177e4
LT		 926 pcm->info_flags = 0;
927 strcpy(pcm->name, "ICE1712 consumer (DS)");
928 ice->pcm_ds = pcm;
929
930 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
931 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
932
933 if (rpcm)
934 *rpcm = pcm;
935
936 return 0;
937}
938
939/*
940 * PCM code - professional part (multitrack)
941 */
942
943static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
944 32000, 44100, 48000, 64000, 88200, 96000 };
945
6ca308d4 946static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 947 .count = ARRAY_SIZE(rates),
948 .list = rates,
949 .mask = 0,
950};
951
6ca308d4 952static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 953 int cmd)
954{
6ca308d4 955 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 956 switch (cmd) {
957 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
958 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
959 {
960 unsigned int what;
961 unsigned int old;
962 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
963 return -EINVAL;
964 what = ICE1712_PLAYBACK_PAUSE;
965 snd_pcm_trigger_done(substream, substream);
966 spin_lock(&ice->reg_lock);
967 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
968 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
969 old |= what;
970 else
971 old &= ~what;
972 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
973 spin_unlock(&ice->reg_lock);
974 break;
975 }
976 case SNDRV_PCM_TRIGGER_START:
977 case SNDRV_PCM_TRIGGER_STOP:
978 {
979 unsigned int what = 0;
980 unsigned int old;
6ca308d4 981 struct snd_pcm_substream *s;
1da177e4 982
ef991b95 983 snd_pcm_group_for_each_entry(s, substream) {
1da177e4
LT		 984 if (s == ice->playback_pro_substream) {
985 what |= ICE1712_PLAYBACK_START;
986 snd_pcm_trigger_done(s, substream);
987 } else if (s == ice->capture_pro_substream) {
988 what |= ICE1712_CAPTURE_START_SHADOW;
989 snd_pcm_trigger_done(s, substream);
990 }
991 }
992 spin_lock(&ice->reg_lock);
993 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
994 if (cmd == SNDRV_PCM_TRIGGER_START)
995 old |= what;
996 else
997 old &= ~what;
998 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
999 spin_unlock(&ice->reg_lock);
1000 break;
1001 }
1002 default:
1003 return -EINVAL;
1004 }
1005 return 0;
1006}
1007
1008/*
1009 */
6ca308d4 1010static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT		 1011{
1012 unsigned long flags;
1013 unsigned char val, old;
1014 unsigned int i;
1015
1016 switch (rate) {
1017 case 8000: val = 6; break;
1018 case 9600: val = 3; break;
1019 case 11025: val = 10; break;
1020 case 12000: val = 2; break;
1021 case 16000: val = 5; break;
1022 case 22050: val = 9; break;
1023 case 24000: val = 1; break;
1024 case 32000: val = 4; break;
1025 case 44100: val = 8; break;
1026 case 48000: val = 0; break;
1027 case 64000: val = 15; break;
1028 case 88200: val = 11; break;
1029 case 96000: val = 7; break;
1030 default:
1031 snd_BUG();
1032 val = 0;
1033 rate = 48000;
1034 break;
1035 }
1036
1037 spin_lock_irqsave(&ice->reg_lock, flags);
1038 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1039 ICE1712_PLAYBACK_PAUSE|
1040 ICE1712_PLAYBACK_START)) {
3d8cb466 1041__out:
1da177e4
LT		 1042 spin_unlock_irqrestore(&ice->reg_lock, flags);
1043 return;
1044 }
1045 if (!force && is_pro_rate_locked(ice))
1046 goto __out;
1047
3d8cb466 1048 old = inb(ICEMT(ice, RATE));
1da177e4
LT		 1049 if (!force && old == val)
1050 goto __out;
6ea0cae7
OZ		 1051
1052 ice->cur_rate = rate;
1da177e4
LT		 1053 outb(val, ICEMT(ice, RATE));
1054 spin_unlock_irqrestore(&ice->reg_lock, flags);
1055
1056 if (ice->gpio.set_pro_rate)
1057 ice->gpio.set_pro_rate(ice, rate);
1058 for (i = 0; i < ice->akm_codecs; i++) {
1059 if (ice->akm[i].ops.set_rate_val)
1060 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1061 }
1062 if (ice->spdif.ops.setup_rate)
1063 ice->spdif.ops.setup_rate(ice, rate);
1064}
1065
6ca308d4 1066static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1067{
6ca308d4 1068 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1069
1070 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1071 spin_lock_irq(&ice->reg_lock);
1072 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1073 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1074 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1075 spin_unlock_irq(&ice->reg_lock);
1076
1077 return 0;
1078}
1079
6ca308d4
TI		 1080static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1081 struct snd_pcm_hw_params *hw_params)
1da177e4 1082{
6ca308d4 1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1084
1085 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1086 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1087}
1088
6ca308d4 1089static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1090{
6ca308d4 1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1092
1093 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1094 spin_lock_irq(&ice->reg_lock);
1095 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1096 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1097 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1098 spin_unlock_irq(&ice->reg_lock);
1099 return 0;
1100}
1101
6ca308d4
TI		 1102static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1103 struct snd_pcm_hw_params *hw_params)
1da177e4 1104{
6ca308d4 1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1106
1107 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1108 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1109}
1110
6ca308d4 1111static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1112{
6ca308d4 1113 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1114 size_t ptr;
1115
1116 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1117 return 0;
1118 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1119 if (ptr == substream->runtime->buffer_size)
1120 ptr = 0;
1121 return bytes_to_frames(substream->runtime, ptr);
1122}
1123
6ca308d4 1124static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1125{
6ca308d4 1126 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1127 size_t ptr;
1128
1129 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1130 return 0;
1131 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1132 if (ptr == substream->runtime->buffer_size)
1133 ptr = 0;
1134 return bytes_to_frames(substream->runtime, ptr);
1135}
1136
3d8cb466 1137static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1da177e4
LT		 1138 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1139 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1140 SNDRV_PCM_INFO_MMAP_VALID |
1141 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1142 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1143 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1144 .rate_min = 4000,
1145 .rate_max = 96000,
1146 .channels_min = 10,
1147 .channels_max = 10,
1148 .buffer_bytes_max = (256*1024),
1149 .period_bytes_min = 10 * 4 * 2,
1150 .period_bytes_max = 131040,
1151 .periods_min = 1,
1152 .periods_max = 1024,
1153 .fifo_size = 0,
1154};
1155
3d8cb466 1156static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1da177e4
LT		 1157 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1158 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1159 SNDRV_PCM_INFO_MMAP_VALID |
1160 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1161 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1162 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1163 .rate_min = 4000,
1164 .rate_max = 96000,
1165 .channels_min = 12,
1166 .channels_max = 12,
1167 .buffer_bytes_max = (256*1024),
1168 .period_bytes_min = 12 * 4 * 2,
1169 .period_bytes_max = 131040,
1170 .periods_min = 1,
1171 .periods_max = 1024,
1172 .fifo_size = 0,
1173};
1174
6ca308d4 1175static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1176{
6ca308d4
TI		 1177 struct snd_pcm_runtime *runtime = substream->runtime;
1178 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1179
1180 ice->playback_pro_substream = substream;
1181 runtime->hw = snd_ice1712_playback_pro;
1182 snd_pcm_set_sync(substream);
1183 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1184 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1185 if (is_pro_rate_locked(ice)) {
1186 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1187 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1188 }
1da177e4
LT		 1189
1190 if (ice->spdif.ops.open)
1191 ice->spdif.ops.open(ice, substream);
1192
1193 return 0;
1194}
1195
6ca308d4 1196static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1197{
6ca308d4
TI		 1198 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1199 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1200
1201 ice->capture_pro_substream = substream;
1202 runtime->hw = snd_ice1712_capture_pro;
1203 snd_pcm_set_sync(substream);
1204 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1205 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1206 if (is_pro_rate_locked(ice)) {
1207 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1208 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1209 }
1210
1da177e4
LT		 1211 return 0;
1212}
1213
6ca308d4 1214static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1215{
6ca308d4 1216 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1217
1218 if (PRO_RATE_RESET)
1219 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1220 ice->playback_pro_substream = NULL;
1221 if (ice->spdif.ops.close)
1222 ice->spdif.ops.close(ice, substream);
1223
1224 return 0;
1225}
1226
6ca308d4 1227static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1228{
6ca308d4 1229 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1230
1231 if (PRO_RATE_RESET)
1232 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1233 ice->capture_pro_substream = NULL;
1234 return 0;
1235}
1236
6ca308d4 1237static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT		 1238 .open = snd_ice1712_playback_pro_open,
1239 .close = snd_ice1712_playback_pro_close,
1240 .ioctl = snd_pcm_lib_ioctl,
1241 .hw_params = snd_ice1712_playback_pro_hw_params,
1242 .hw_free = snd_ice1712_hw_free,
1243 .prepare = snd_ice1712_playback_pro_prepare,
1244 .trigger = snd_ice1712_pro_trigger,
1245 .pointer = snd_ice1712_playback_pro_pointer,
1246};
1247
6ca308d4 1248static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT		 1249 .open = snd_ice1712_capture_pro_open,
1250 .close = snd_ice1712_capture_pro_close,
1251 .ioctl = snd_pcm_lib_ioctl,
1252 .hw_params = snd_ice1712_capture_pro_hw_params,
1253 .hw_free = snd_ice1712_hw_free,
1254 .prepare = snd_ice1712_capture_pro_prepare,
1255 .trigger = snd_ice1712_pro_trigger,
1256 .pointer = snd_ice1712_capture_pro_pointer,
1257};
1258
e23e7a14 1259static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 1260{
6ca308d4 1261 struct snd_pcm *pcm;
1da177e4
LT		 1262 int err;
1263
1264 if (rpcm)
1265 *rpcm = NULL;
1266 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1267 if (err < 0)
1268 return err;
1269
1270 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1271 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1272
1273 pcm->private_data = ice;
1da177e4
LT		 1274 pcm->info_flags = 0;
1275 strcpy(pcm->name, "ICE1712 multi");
1276
1277 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1278 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1279
1280 ice->pcm_pro = pcm;
1281 if (rpcm)
1282 *rpcm = pcm;
3d8cb466 1283
1da177e4
LT		 1284 if (ice->cs8427) {
1285 /* assign channels to iec958 */
1286 err = snd_cs8427_iec958_build(ice->cs8427,
1287 pcm->streams[0].substream,
1288 pcm->streams[1].substream);
1289 if (err < 0)
1290 return err;
1291 }
1292
3d8cb466
AB		 1293 err = snd_ice1712_build_pro_mixer(ice);
1294 if (err < 0)
1da177e4
LT		 1295 return err;
1296 return 0;
1297}
1298
1299/*
1300 * Mixer section
1301 */
1302
6ca308d4 1303static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT		 1304{
1305 unsigned int vol = ice->pro_volumes[index];
1306 unsigned short val = 0;
1307
1308 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1309 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1310 outb(index, ICEMT(ice, MONITOR_INDEX));
1311 outw(val, ICEMT(ice, MONITOR_VOLUME));
1312}
1313
a5ce8890 1314#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1da177e4 1315
6ca308d4 1316static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1317{
6ca308d4 1318 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1319 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1320 kcontrol->private_value;
3d8cb466 1321
1da177e4 1322 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1323 ucontrol->value.integer.value[0] =
1324 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1325 ucontrol->value.integer.value[1] =
1326 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1da177e4
LT		 1327 spin_unlock_irq(&ice->reg_lock);
1328 return 0;
1329}
1330
6ca308d4 1331static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1332{
6ca308d4 1333 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1334 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1335 kcontrol->private_value;
1da177e4
LT		 1336 unsigned int nval, change;
1337
1338 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1339 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1340 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1341 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1342 change = nval != ice->pro_volumes[priv_idx];
1343 ice->pro_volumes[priv_idx] = nval;
1344 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1345 spin_unlock_irq(&ice->reg_lock);
1346 return change;
1347}
1348
6ca308d4 1349static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1350{
1351 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1352 uinfo->count = 2;
1353 uinfo->value.integer.min = 0;
1354 uinfo->value.integer.max = 96;
1355 return 0;
1356}
1357
6ca308d4 1358static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1359{
6ca308d4 1360 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1361 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1362 kcontrol->private_value;
3d8cb466 1363
1da177e4 1364 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1365 ucontrol->value.integer.value[0] =
1366 (ice->pro_volumes[priv_idx] >> 0) & 127;
1367 ucontrol->value.integer.value[1] =
1368 (ice->pro_volumes[priv_idx] >> 16) & 127;
1da177e4
LT		 1369 spin_unlock_irq(&ice->reg_lock);
1370 return 0;
1371}
1372
6ca308d4 1373static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1374{
6ca308d4 1375 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1376 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1377 kcontrol->private_value;
1da177e4
LT		 1378 unsigned int nval, change;
1379
1380 nval = (ucontrol->value.integer.value[0] & 127) |
1381 ((ucontrol->value.integer.value[1] & 127) << 16);
1382 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1383 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1384 change = nval != ice->pro_volumes[priv_idx];
1385 ice->pro_volumes[priv_idx] = nval;
1386 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1387 spin_unlock_irq(&ice->reg_lock);
1388 return change;
1389}
1390
0cb29ea0 1391static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1da177e4 1392
e23e7a14 1393static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1da177e4
LT		 1394 {
1395 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1396 .name = "Multi Playback Switch",
1397 .info = snd_ice1712_pro_mixer_switch_info,
1398 .get = snd_ice1712_pro_mixer_switch_get,
1399 .put = snd_ice1712_pro_mixer_switch_put,
1400 .private_value = 0,
1401 .count = 10,
1402 },
1403 {
1404 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1405 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1406 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1407 .name = "Multi Playback Volume",
1408 .info = snd_ice1712_pro_mixer_volume_info,
1409 .get = snd_ice1712_pro_mixer_volume_get,
1410 .put = snd_ice1712_pro_mixer_volume_put,
1411 .private_value = 0,
1412 .count = 10,
680ef792 1413 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1414 },
1415};
1416
e23e7a14 1417static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1da177e4
LT		 1418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1419 .name = "H/W Multi Capture Switch",
1420 .info = snd_ice1712_pro_mixer_switch_info,
1421 .get = snd_ice1712_pro_mixer_switch_get,
1422 .put = snd_ice1712_pro_mixer_switch_put,
1423 .private_value = 10,
1424};
1425
e23e7a14 1426static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1da177e4 1427 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1428 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1da177e4
LT		 1429 .info = snd_ice1712_pro_mixer_switch_info,
1430 .get = snd_ice1712_pro_mixer_switch_get,
1431 .put = snd_ice1712_pro_mixer_switch_put,
1432 .private_value = 18,
1433 .count = 2,
1434};
1435
e23e7a14 1436static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1da177e4 1437 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1438 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1439 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1440 .name = "H/W Multi Capture Volume",
1441 .info = snd_ice1712_pro_mixer_volume_info,
1442 .get = snd_ice1712_pro_mixer_volume_get,
1443 .put = snd_ice1712_pro_mixer_volume_put,
1444 .private_value = 10,
680ef792 1445 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1446};
1447
e23e7a14 1448static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1da177e4 1449 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1450 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1da177e4
LT		 1451 .info = snd_ice1712_pro_mixer_volume_info,
1452 .get = snd_ice1712_pro_mixer_volume_get,
1453 .put = snd_ice1712_pro_mixer_volume_put,
1454 .private_value = 18,
1455 .count = 2,
1456};
1457
e23e7a14 1458static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1459{
6ca308d4 1460 struct snd_card *card = ice->card;
1da177e4
LT		 1461 unsigned int idx;
1462 int err;
1463
1464 /* multi-channel mixer */
1465 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1466 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1467 if (err < 0)
1468 return err;
1469 }
3d8cb466 1470
1da177e4 1471 if (ice->num_total_adcs > 0) {
6ca308d4 1472 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT		 1473 tmp.count = ice->num_total_adcs;
1474 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1475 if (err < 0)
1476 return err;
1477 }
1478
1479 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1480 if (err < 0)
1481 return err;
1482
1483 if (ice->num_total_adcs > 0) {
6ca308d4 1484 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT		 1485 tmp.count = ice->num_total_adcs;
1486 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1487 if (err < 0)
1488 return err;
1489 }
1490
1491 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1492 if (err < 0)
1493 return err;
1494
1495 /* initialize volumes */
1496 for (idx = 0; idx < 10; idx++) {
1497 ice->pro_volumes[idx] = 0x80008000; /* mute */
1498 snd_ice1712_update_volume(ice, idx);
1499 }
1500 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1501 ice->pro_volumes[idx] = 0x80008000; /* mute */
1502 snd_ice1712_update_volume(ice, idx);
1503 }
1504 for (idx = 18; idx < 20; idx++) {
1505 ice->pro_volumes[idx] = 0x80008000; /* mute */
1506 snd_ice1712_update_volume(ice, idx);
1507 }
1508 return 0;
1509}
1510
6ca308d4 1511static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1512{
6ca308d4 1513 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 1514 ice->ac97 = NULL;
1515}
1516
e23e7a14 1517static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1518{
1519 int err, bus_num = 0;
6ca308d4
TI		 1520 struct snd_ac97_template ac97;
1521 struct snd_ac97_bus *pbus;
1522 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT		 1523 .write = snd_ice1712_ac97_write,
1524 .read = snd_ice1712_ac97_read,
1525 };
6ca308d4 1526 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT		 1527 .write = snd_ice1712_pro_ac97_write,
1528 .read = snd_ice1712_pro_ac97_read,
1529 };
1530
1531 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 1532 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1533 if (err < 0)
1da177e4
LT		 1534 return err;
1535 memset(&ac97, 0, sizeof(ac97));
1536 ac97.private_data = ice;
1537 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1538 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1539 if (err < 0)
6dfb5aff
TI		 1540 dev_warn(ice->card->dev,
1541 "cannot initialize ac97 for consumer, skipped\n");
1da177e4 1542 else {
3d8cb466
AB		 1543 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1544 if (err < 0)
1da177e4
LT		 1545 return err;
1546 return 0;
1547 }
1548 }
1549
3d8cb466
AB		 1550 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1551 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1552 if (err < 0)
1da177e4
LT		 1553 return err;
1554 memset(&ac97, 0, sizeof(ac97));
1555 ac97.private_data = ice;
1556 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1557 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1558 if (err < 0)
6dfb5aff
TI		 1559 dev_warn(ice->card->dev,
1560 "cannot initialize pro ac97, skipped\n");
1da177e4
LT		 1561 else
1562 return 0;
1563 }
1564 /* I2S mixer only */
1565 strcat(ice->card->mixername, "ICE1712 - multitrack");
1566 return 0;
1567}
1568
1569/*
1570 *
1571 */
1572
6ca308d4 1573static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1574{
1575 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1576}
1577
3d8cb466 1578static void snd_ice1712_proc_read(struct snd_info_entry *entry,
6ca308d4 1579 struct snd_info_buffer *buffer)
1da177e4 1580{
6ca308d4 1581 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1582 unsigned int idx;
1583
1584 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1585 snd_iprintf(buffer, "EEPROM:\n");
1586
1587 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1588 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1589 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1590 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1591 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1592 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1593 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1594 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1595 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1596 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1597 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1598 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1599 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1600 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1601 for (idx = 0; idx < 4; idx++)
1602 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1603 for (idx = 0; idx < 4; idx++)
1604 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1605 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1606 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1607
1608 snd_iprintf(buffer, "\nRegisters:\n");
1609 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1610 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1611 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1612 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39 1613 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
3d8cb466 1614 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
f7004f39 1615 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT		 1616}
1617
e23e7a14 1618static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1da177e4 1619{
6ca308d4 1620 struct snd_info_entry *entry;
1da177e4 1621
3d8cb466 1622 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
bf850204 1623 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1da177e4
LT		 1624}
1625
1626/*
1627 *
1628 */
1629
6ca308d4
TI		 1630static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1632{
1633 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1634 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1635 return 0;
1636}
1637
6ca308d4
TI		 1638static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1639 struct snd_ctl_elem_value *ucontrol)
1da177e4 1640{
6ca308d4 1641 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 1642
1da177e4
LT		 1643 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1644 return 0;
1645}
1646
e23e7a14 1647static struct snd_kcontrol_new snd_ice1712_eeprom = {
1da177e4
LT		 1648 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1649 .name = "ICE1712 EEPROM",
1650 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1651 .info = snd_ice1712_eeprom_info,
1652 .get = snd_ice1712_eeprom_get
1653};
1654
1655/*
1656 */
6ca308d4
TI		 1657static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1658 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1659{
1660 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1661 uinfo->count = 1;
1662 return 0;
1663}
1664
6ca308d4
TI		 1665static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1666 struct snd_ctl_elem_value *ucontrol)
1da177e4 1667{
6ca308d4 1668 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1669 if (ice->spdif.ops.default_get)
3d8cb466 1670 ice->spdif.ops.default_get(ice, ucontrol);
1da177e4
LT		 1671 return 0;
1672}
1673
6ca308d4
TI		 1674static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1675 struct snd_ctl_elem_value *ucontrol)
1da177e4 1676{
6ca308d4 1677 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1678 if (ice->spdif.ops.default_put)
1679 return ice->spdif.ops.default_put(ice, ucontrol);
1680 return 0;
1681}
1682
e23e7a14 1683static struct snd_kcontrol_new snd_ice1712_spdif_default =
1da177e4
LT		 1684{
1685 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1686 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1687 .info = snd_ice1712_spdif_info,
1688 .get = snd_ice1712_spdif_default_get,
1689 .put = snd_ice1712_spdif_default_put
1690};
1691
6ca308d4
TI		 1692static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1693 struct snd_ctl_elem_value *ucontrol)
1da177e4 1694{
6ca308d4 1695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1696 if (ice->spdif.ops.default_get) {
1697 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1698 IEC958_AES0_PROFESSIONAL |
1699 IEC958_AES0_CON_NOT_COPYRIGHT |
1700 IEC958_AES0_CON_EMPHASIS;
1701 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1702 IEC958_AES1_CON_CATEGORY;
1703 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1704 } else {
1705 ucontrol->value.iec958.status[0] = 0xff;
1706 ucontrol->value.iec958.status[1] = 0xff;
1707 ucontrol->value.iec958.status[2] = 0xff;
1708 ucontrol->value.iec958.status[3] = 0xff;
1709 ucontrol->value.iec958.status[4] = 0xff;
1710 }
1711 return 0;
1712}
1713
6ca308d4
TI		 1714static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1715 struct snd_ctl_elem_value *ucontrol)
1da177e4 1716{
6ca308d4 1717 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1718 if (ice->spdif.ops.default_get) {
1719 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1720 IEC958_AES0_PROFESSIONAL |
1721 IEC958_AES0_PRO_FS |
1722 IEC958_AES0_PRO_EMPHASIS;
1723 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1724 } else {
1725 ucontrol->value.iec958.status[0] = 0xff;
1726 ucontrol->value.iec958.status[1] = 0xff;
1727 ucontrol->value.iec958.status[2] = 0xff;
1728 ucontrol->value.iec958.status[3] = 0xff;
1729 ucontrol->value.iec958.status[4] = 0xff;
1730 }
1731 return 0;
1732}
1733
e23e7a14 1734static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1da177e4
LT		 1735{
1736 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1737 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1738 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1739 .info = snd_ice1712_spdif_info,
1740 .get = snd_ice1712_spdif_maskc_get,
1741};
1742
e23e7a14 1743static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1da177e4
LT		 1744{
1745 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1746 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1747 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1748 .info = snd_ice1712_spdif_info,
1749 .get = snd_ice1712_spdif_maskp_get,
1750};
1751
6ca308d4
TI		 1752static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_value *ucontrol)
1da177e4 1754{
6ca308d4 1755 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1756 if (ice->spdif.ops.stream_get)
1757 ice->spdif.ops.stream_get(ice, ucontrol);
1758 return 0;
1759}
1760
6ca308d4
TI		 1761static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_value *ucontrol)
1da177e4 1763{
6ca308d4 1764 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1765 if (ice->spdif.ops.stream_put)
1766 return ice->spdif.ops.stream_put(ice, ucontrol);
1767 return 0;
1768}
1769
e23e7a14 1770static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1da177e4 1771{
6ca308d4
TI		 1772 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1773 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4 1774 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1775 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1da177e4
LT		 1776 .info = snd_ice1712_spdif_info,
1777 .get = snd_ice1712_spdif_stream_get,
1778 .put = snd_ice1712_spdif_stream_put
1779};
1780
6ca308d4
TI		 1781int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1da177e4 1783{
6ca308d4 1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1785 unsigned char mask = kcontrol->private_value & 0xff;
1786 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
3d8cb466 1787
1da177e4 1788 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI		 1789 ucontrol->value.integer.value[0] =
1790 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT		 1791 snd_ice1712_restore_gpio_status(ice);
1792 return 0;
1793}
1794
6ca308d4
TI		 1795int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1da177e4 1797{
6ca308d4 1798 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1799 unsigned char mask = kcontrol->private_value & 0xff;
1800 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1801 unsigned int val, nval;
1802
1803 if (kcontrol->private_value & (1 << 31))
1804 return -EPERM;
1805 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1806 snd_ice1712_save_gpio_status(ice);
1807 val = snd_ice1712_gpio_read(ice);
1808 nval |= val & ~mask;
1809 if (val != nval)
1810 snd_ice1712_gpio_write(ice, nval);
1811 snd_ice1712_restore_gpio_status(ice);
1812 return val != nval;
1813}
1814
1815/*
1816 * rate
1817 */
6ca308d4
TI		 1818static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1819 struct snd_ctl_elem_info *uinfo)
1da177e4 1820{
32b47da0 1821 static const char * const texts[] = {
1da177e4
LT		 1822 "8000", /* 0: 6 */
1823 "9600", /* 1: 3 */
1824 "11025", /* 2: 10 */
1825 "12000", /* 3: 2 */
1826 "16000", /* 4: 5 */
1827 "22050", /* 5: 9 */
1828 "24000", /* 6: 1 */
1829 "32000", /* 7: 4 */
1830 "44100", /* 8: 8 */
1831 "48000", /* 9: 0 */
1832 "64000", /* 10: 15 */
1833 "88200", /* 11: 11 */
1834 "96000", /* 12: 7 */
1835 "IEC958 Input", /* 13: -- */
1836 };
1837 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1838 uinfo->count = 1;
1839 uinfo->value.enumerated.items = 14;
1840 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1841 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1842 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1843 return 0;
1844}
1845
6ca308d4
TI		 1846static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1847 struct snd_ctl_elem_value *ucontrol)
1da177e4 1848{
6ca308d4 1849 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1850 static const unsigned char xlate[16] = {
1da177e4
LT		 1851 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1852 };
1853 unsigned char val;
3d8cb466 1854
1da177e4
LT		 1855 spin_lock_irq(&ice->reg_lock);
1856 if (is_spdif_master(ice)) {
1857 ucontrol->value.enumerated.item[0] = 13;
1858 } else {
1859 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1860 if (val == 255) {
1861 snd_BUG();
1862 val = 0;
1863 }
1864 ucontrol->value.enumerated.item[0] = val;
1865 }
1866 spin_unlock_irq(&ice->reg_lock);
1867 return 0;
1868}
1869
6ca308d4
TI		 1870static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1871 struct snd_ctl_elem_value *ucontrol)
1da177e4 1872{
6ca308d4 1873 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1874 static const unsigned int xrate[13] = {
fe25befd 1875 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1876 32000, 44100, 48000, 64000, 88200, 96000
1877 };
1878 unsigned char oval;
1879 int change = 0;
1880
1881 spin_lock_irq(&ice->reg_lock);
1882 oval = inb(ICEMT(ice, RATE));
1883 if (ucontrol->value.enumerated.item[0] == 13) {
1884 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1885 } else {
1886 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1887 spin_unlock_irq(&ice->reg_lock);
1888 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1889 spin_lock_irq(&ice->reg_lock);
1890 }
1891 change = inb(ICEMT(ice, RATE)) != oval;
1892 spin_unlock_irq(&ice->reg_lock);
1893
6ca308d4 1894 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1 1895 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
3d8cb466 1896 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT		 1897
1898 return change;
1899}
1900
e23e7a14 1901static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1da177e4
LT		 1902 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1903 .name = "Multi Track Internal Clock",
1904 .info = snd_ice1712_pro_internal_clock_info,
1905 .get = snd_ice1712_pro_internal_clock_get,
1906 .put = snd_ice1712_pro_internal_clock_put
1907};
1908
6ca308d4
TI		 1909static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1910 struct snd_ctl_elem_info *uinfo)
1da177e4 1911{
32b47da0 1912 static const char * const texts[] = {
1da177e4
LT		 1913 "8000", /* 0: 6 */
1914 "9600", /* 1: 3 */
1915 "11025", /* 2: 10 */
1916 "12000", /* 3: 2 */
1917 "16000", /* 4: 5 */
1918 "22050", /* 5: 9 */
1919 "24000", /* 6: 1 */
1920 "32000", /* 7: 4 */
1921 "44100", /* 8: 8 */
1922 "48000", /* 9: 0 */
1923 "64000", /* 10: 15 */
1924 "88200", /* 11: 11 */
1925 "96000", /* 12: 7 */
3d8cb466 1926 /* "IEC958 Input", 13: -- */
1da177e4
LT		 1927 };
1928 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1929 uinfo->count = 1;
1930 uinfo->value.enumerated.items = 13;
1931 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1932 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1933 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1934 return 0;
1935}
1936
6ca308d4
TI		 1937static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1938 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1939{
1940 int val;
32b47da0 1941 static const unsigned int xrate[13] = {
fe25befd 1942 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1943 32000, 44100, 48000, 64000, 88200, 96000
1944 };
1945
1946 for (val = 0; val < 13; val++) {
1947 if (xrate[val] == PRO_RATE_DEFAULT)
1948 break;
1949 }
1950
1951 ucontrol->value.enumerated.item[0] = val;
1952 return 0;
1953}
1954
6ca308d4
TI		 1955static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1956 struct snd_ctl_elem_value *ucontrol)
1da177e4 1957{
32b47da0 1958 static const unsigned int xrate[13] = {
fe25befd 1959 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1960 32000, 44100, 48000, 64000, 88200, 96000
1961 };
1962 unsigned char oval;
1963 int change = 0;
1964
1965 oval = PRO_RATE_DEFAULT;
1966 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1967 change = PRO_RATE_DEFAULT != oval;
1968
1969 return change;
1970}
1971
e23e7a14 1972static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1da177e4
LT		 1973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1974 .name = "Multi Track Internal Clock Default",
1975 .info = snd_ice1712_pro_internal_clock_default_info,
1976 .get = snd_ice1712_pro_internal_clock_default_get,
1977 .put = snd_ice1712_pro_internal_clock_default_put
1978};
1979
a5ce8890 1980#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1981
6ca308d4
TI		 1982static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1983 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1984{
1985 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1986 return 0;
1987}
1988
6ca308d4
TI		 1989static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1da177e4 1991{
6ca308d4 1992 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1993 int change = 0, nval;
1994
1995 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1996 spin_lock_irq(&ice->reg_lock);
1997 change = PRO_RATE_LOCKED != nval;
1998 PRO_RATE_LOCKED = nval;
1999 spin_unlock_irq(&ice->reg_lock);
2000 return change;
2001}
2002
e23e7a14 2003static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1da177e4
LT		 2004 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2005 .name = "Multi Track Rate Locking",
2006 .info = snd_ice1712_pro_rate_locking_info,
2007 .get = snd_ice1712_pro_rate_locking_get,
2008 .put = snd_ice1712_pro_rate_locking_put
2009};
2010
a5ce8890 2011#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 2012
6ca308d4
TI		 2013static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2014 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 2015{
2016 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2017 return 0;
2018}
2019
6ca308d4
TI		 2020static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2021 struct snd_ctl_elem_value *ucontrol)
1da177e4 2022{
6ca308d4 2023 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2024 int change = 0, nval;
2025
2026 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2027 spin_lock_irq(&ice->reg_lock);
2028 change = PRO_RATE_RESET != nval;
2029 PRO_RATE_RESET = nval;
2030 spin_unlock_irq(&ice->reg_lock);
2031 return change;
2032}
2033
e23e7a14 2034static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
1da177e4
LT		 2035 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2036 .name = "Multi Track Rate Reset",
2037 .info = snd_ice1712_pro_rate_reset_info,
2038 .get = snd_ice1712_pro_rate_reset_get,
2039 .put = snd_ice1712_pro_rate_reset_put
2040};
2041
2042/*
2043 * routing
2044 */
6ca308d4
TI		 2045static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2046 struct snd_ctl_elem_info *uinfo)
1da177e4 2047{
32b47da0 2048 static const char * const texts[] = {
1da177e4
LT		 2049 "PCM Out", /* 0 */
2050 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2051 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2052 "IEC958 In L", "IEC958 In R", /* 9-10 */
2053 "Digital Mixer", /* 11 - optional */
2054 };
3d8cb466 2055
1da177e4
LT		 2056 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2057 uinfo->count = 1;
6ca308d4
TI		 2058 uinfo->value.enumerated.items =
2059 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1da177e4
LT		 2060 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2061 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2062 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2063 return 0;
2064}
2065
6ca308d4
TI		 2066static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2067 struct snd_ctl_elem_value *ucontrol)
1da177e4 2068{
6ca308d4 2069 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2070 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2071 unsigned int val, cval;
2072
2073 spin_lock_irq(&ice->reg_lock);
2074 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2075 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2076 spin_unlock_irq(&ice->reg_lock);
2077
2078 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2079 val &= 3;
2080 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2081 if (val == 1 && idx < 2)
2082 ucontrol->value.enumerated.item[0] = 11;
2083 else if (val == 2)
2084 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2085 else if (val == 3)
2086 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2087 else
2088 ucontrol->value.enumerated.item[0] = 0;
2089 return 0;
2090}
2091
6ca308d4
TI		 2092static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2093 struct snd_ctl_elem_value *ucontrol)
1da177e4 2094{
6ca308d4 2095 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2096 int change, shift;
2097 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2098 unsigned int val, old_val, nval;
3d8cb466 2099
1da177e4
LT		 2100 /* update PSDOUT */
2101 if (ucontrol->value.enumerated.item[0] >= 11)
2102 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2103 else if (ucontrol->value.enumerated.item[0] >= 9)
2104 nval = 3; /* spdif in */
2105 else if (ucontrol->value.enumerated.item[0] >= 1)
2106 nval = 2; /* analog in */
2107 else
2108 nval = 0; /* pcm */
2109 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2110 spin_lock_irq(&ice->reg_lock);
2111 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2112 val &= ~(0x03 << shift);
2113 val |= nval << shift;
2114 change = val != old_val;
2115 if (change)
2116 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2117 spin_unlock_irq(&ice->reg_lock);
2118 if (nval < 2) /* dig mixer of pcm */
2119 return change;
2120
2121 /* update CAPTURE */
2122 spin_lock_irq(&ice->reg_lock);
2123 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2124 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2125 if (nval == 2) { /* analog in */
2126 nval = ucontrol->value.enumerated.item[0] - 1;
2127 val &= ~(0x07 << shift);
2128 val |= nval << shift;
2129 } else { /* spdif in */
2130 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2131 val &= ~(0x08 << shift);
2132 val |= nval << shift;
2133 }
2134 if (val != old_val) {
2135 change = 1;
2136 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2137 }
2138 spin_unlock_irq(&ice->reg_lock);
2139 return change;
2140}
2141
6ca308d4
TI		 2142static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2143 struct snd_ctl_elem_value *ucontrol)
1da177e4 2144{
6ca308d4 2145 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2146 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2147 unsigned int val, cval;
2148 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2149 cval = (val >> (idx * 4 + 8)) & 0x0f;
2150 val = (val >> (idx * 2)) & 0x03;
2151 if (val == 1)
2152 ucontrol->value.enumerated.item[0] = 11;
2153 else if (val == 2)
2154 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2155 else if (val == 3)
2156 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2157 else
2158 ucontrol->value.enumerated.item[0] = 0;
2159 return 0;
2160}
2161
6ca308d4
TI		 2162static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
1da177e4 2164{
6ca308d4 2165 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2166 int change, shift;
2167 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2168 unsigned int val, old_val, nval;
3d8cb466 2169
1da177e4
LT		 2170 /* update SPDOUT */
2171 spin_lock_irq(&ice->reg_lock);
2172 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2173 if (ucontrol->value.enumerated.item[0] >= 11)
2174 nval = 1;
2175 else if (ucontrol->value.enumerated.item[0] >= 9)
2176 nval = 3;
2177 else if (ucontrol->value.enumerated.item[0] >= 1)
2178 nval = 2;
2179 else
2180 nval = 0;
2181 shift = idx * 2;
2182 val &= ~(0x03 << shift);
2183 val |= nval << shift;
2184 shift = idx * 4 + 8;
2185 if (nval == 2) {
2186 nval = ucontrol->value.enumerated.item[0] - 1;
2187 val &= ~(0x07 << shift);
2188 val |= nval << shift;
2189 } else if (nval == 3) {
2190 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2191 val &= ~(0x08 << shift);
2192 val |= nval << shift;
2193 }
2194 change = val != old_val;
2195 if (change)
2196 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2197 spin_unlock_irq(&ice->reg_lock);
2198 return change;
2199}
2200
e23e7a14 2201static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
1da177e4
LT		 2202 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2203 .name = "H/W Playback Route",
2204 .info = snd_ice1712_pro_route_info,
2205 .get = snd_ice1712_pro_route_analog_get,
2206 .put = snd_ice1712_pro_route_analog_put,
2207};
2208
e23e7a14 2209static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
1da177e4 2210 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 2211 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2212 .info = snd_ice1712_pro_route_info,
2213 .get = snd_ice1712_pro_route_spdif_get,
2214 .put = snd_ice1712_pro_route_spdif_put,
2215 .count = 2,
2216};
2217
2218
6ca308d4
TI		 2219static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2220 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2221{
2222 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2223 uinfo->count = 1;
2224 uinfo->value.integer.min = 0;
2225 uinfo->value.integer.max = 255;
2226 return 0;
2227}
2228
6ca308d4
TI		 2229static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2230 struct snd_ctl_elem_value *ucontrol)
1da177e4 2231{
6ca308d4 2232 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 2233
1da177e4
LT		 2234 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2235 return 0;
2236}
2237
6ca308d4
TI		 2238static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2239 struct snd_ctl_elem_value *ucontrol)
1da177e4 2240{
6ca308d4 2241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2242 int change;
2243
2244 spin_lock_irq(&ice->reg_lock);
2245 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2246 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2247 spin_unlock_irq(&ice->reg_lock);
2248 return change;
2249}
2250
e23e7a14 2251static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
1da177e4
LT		 2252 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2253 .name = "Multi Track Volume Rate",
2254 .info = snd_ice1712_pro_volume_rate_info,
2255 .get = snd_ice1712_pro_volume_rate_get,
2256 .put = snd_ice1712_pro_volume_rate_put
2257};
2258
6ca308d4
TI		 2259static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2260 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2261{
2262 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2263 uinfo->count = 22;
2264 uinfo->value.integer.min = 0;
2265 uinfo->value.integer.max = 255;
2266 return 0;
2267}
2268
6ca308d4
TI		 2269static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2270 struct snd_ctl_elem_value *ucontrol)
1da177e4 2271{
6ca308d4 2272 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2273 int idx;
3d8cb466 2274
1da177e4
LT		 2275 spin_lock_irq(&ice->reg_lock);
2276 for (idx = 0; idx < 22; idx++) {
2277 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2278 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2279 }
2280 spin_unlock_irq(&ice->reg_lock);
2281 return 0;
2282}
2283
e23e7a14 2284static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2bdf6633 2285 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 2286 .name = "Multi Track Peak",
2287 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2288 .info = snd_ice1712_pro_peak_info,
2289 .get = snd_ice1712_pro_peak_get
2290};
2291
2292/*
2293 *
2294 */
2295
2296/*
2297 * list of available boards
2298 */
e23e7a14 2299static struct snd_ice1712_card_info *card_tables[] = {
1da177e4
LT		 2300 snd_ice1712_hoontech_cards,
2301 snd_ice1712_delta_cards,
2302 snd_ice1712_ews_cards,
2303 NULL,
2304};
2305
e23e7a14
BP		 2306static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2307 unsigned char dev,
2308 unsigned char addr)
1da177e4
LT		 2309{
2310 long t = 0x10000;
2311
2312 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2313 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2314 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2315 return inb(ICEREG(ice, I2C_DATA));
2316}
2317
e23e7a14
BP		 2318static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2319 const char *modelname)
1da177e4
LT		 2320{
2321 int dev = 0xa0; /* EEPROM device address */
2322 unsigned int i, size;
bf748ed7 2323 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2324
3d8cb466 2325 if (!modelname || !*modelname) {
1da177e4
LT		 2326 ice->eeprom.subvendor = 0;
2327 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2328 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
3d8cb466
AB		 2329 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2330 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2331 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI		 2332 if (ice->eeprom.subvendor == 0 ||
2333 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2334 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2335 u16 vendor, device;
2336 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2337 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2338 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2339 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
6dfb5aff
TI		 2340 dev_err(ice->card->dev,
2341 "No valid ID is found\n");
1da177e4
LT		 2342 return -ENXIO;
2343 }
2344 }
2345 }
2346 for (tbl = card_tables; *tbl; tbl++) {
2347 for (c = *tbl; c->subvendor; c++) {
3d8cb466 2348 if (modelname && c->model && !strcmp(modelname, c->model)) {
6dfb5aff
TI		 2349 dev_info(ice->card->dev,
2350 "Using board model %s\n", c->name);
1da177e4
LT		 2351 ice->eeprom.subvendor = c->subvendor;
2352 } else if (c->subvendor != ice->eeprom.subvendor)
2353 continue;
3d8cb466 2354 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2355 goto found;
2356 /* if the EEPROM is given by the driver, use it */
6dfb5aff 2357 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
1da177e4
LT		 2358 ice->eeprom.version = 1;
2359 ice->eeprom.size = c->eeprom_size + 6;
2360 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2361 goto read_skipped;
2362 }
2363 }
6dfb5aff 2364 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
6ca308d4 2365 ice->eeprom.subvendor);
1da177e4
LT		 2366
2367 found:
2368 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2369 if (ice->eeprom.size < 6)
2370 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2371 else if (ice->eeprom.size > 32) {
6dfb5aff
TI		 2372 dev_err(ice->card->dev,
2373 "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT		 2374 return -EIO;
2375 }
2376 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2377 if (ice->eeprom.version != 1) {
6dfb5aff 2378 dev_err(ice->card->dev, "invalid EEPROM version %i\n",
6ca308d4 2379 ice->eeprom.version);
1da177e4
LT		 2380 /* return -EIO; */
2381 }
2382 size = ice->eeprom.size - 6;
2383 for (i = 0; i < size; i++)
2384 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2385
2386 read_skipped:
2387 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2388 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2389 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2390
2391 return 0;
2392}
2393
2394
2395
e23e7a14 2396static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2397{
2398 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2399 udelay(200);
2400 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2401 udelay(200);
721b8a29
AH		 2402 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2403 !ice->dxr_enable)
2404 /* Set eeprom value to limit active ADCs and DACs to 6;
2405 * Also disable AC97 as no hardware in standard 6fire card/box
2406 * Note: DXR extensions are not currently supported
2407 */
2408 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2409 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
1da177e4
LT		 2410 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2411 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2412 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2413 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2414 ice->gpio.write_mask = ice->eeprom.gpiomask;
2415 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI		 2416 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2417 ice->eeprom.gpiomask);
2418 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2419 ice->eeprom.gpiodir);
2420 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2421 ice->eeprom.gpiostate);
1da177e4
LT		 2422 } else {
2423 ice->gpio.write_mask = 0xc0;
2424 ice->gpio.direction = 0xff;
2425 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2426 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI		 2427 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2428 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT		 2429 }
2430 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2431 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2432 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2433 udelay(100);
2434 outb(0, ICEREG(ice, AC97_CMD));
2435 udelay(200);
2436 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2437 }
2438 snd_ice1712_set_pro_rate(ice, 48000, 1);
ca051e8a
OZ		 2439 /* unmask used interrupts */
2440 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2441 ICE1712_IRQ_MPU2 : 0) |
2442 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2443 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2444 ICEREG(ice, IRQMASK));
2445 outb(0x00, ICEMT(ice, IRQ));
1da177e4
LT		 2446
2447 return 0;
2448}
2449
e23e7a14 2450int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2451{
2452 int err;
6ca308d4 2453 struct snd_kcontrol *kctl;
1da177e4 2454
da3cec35
TI		 2455 if (snd_BUG_ON(!ice->pcm_pro))
2456 return -EIO;
1da177e4
LT		 2457 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2458 if (err < 0)
2459 return err;
2460 kctl->id.device = ice->pcm_pro->device;
2461 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2462 if (err < 0)
2463 return err;
2464 kctl->id.device = ice->pcm_pro->device;
2465 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2466 if (err < 0)
2467 return err;
2468 kctl->id.device = ice->pcm_pro->device;
2469 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2470 if (err < 0)
2471 return err;
2472 kctl->id.device = ice->pcm_pro->device;
2473 ice->spdif.stream_ctl = kctl;
2474 return 0;
2475}
2476
2477
e23e7a14 2478static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2479{
2480 int err;
2481
2482 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2483 if (err < 0)
2484 return err;
2485 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2486 if (err < 0)
2487 return err;
2488 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2489 if (err < 0)
2490 return err;
2491
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2493 if (err < 0)
2494 return err;
2495 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2496 if (err < 0)
2497 return err;
2498
2499 if (ice->num_total_dacs > 0) {
6ca308d4 2500 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT		 2501 tmp.count = ice->num_total_dacs;
2502 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2503 if (err < 0)
2504 return err;
2505 }
2506
2507 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2508 if (err < 0)
2509 return err;
2510
2511 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2512 if (err < 0)
2513 return err;
2514 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2515 if (err < 0)
2516 return err;
2517
2518 return 0;
2519}
2520
6ca308d4 2521static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4 2522{
3d8cb466 2523 if (!ice->port)
1da177e4
LT		 2524 goto __hw_end;
2525 /* mask all interrupts */
2526 outb(0xc0, ICEMT(ice, IRQ));
2527 outb(0xff, ICEREG(ice, IRQMASK));
2528 /* --- */
3d8cb466 2529__hw_end:
f000fd80 2530 if (ice->irq >= 0)
6ca308d4 2531 free_irq(ice->irq, ice);
f000fd80 2532
1da177e4
LT		 2533 if (ice->port)
2534 pci_release_regions(ice->pci);
2535 snd_ice1712_akm4xxx_free(ice);
2536 pci_disable_device(ice->pci);
7cda8ba9 2537 kfree(ice->spec);
1da177e4
LT		 2538 kfree(ice);
2539 return 0;
2540}
2541
6ca308d4 2542static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2543{
6ca308d4 2544 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2545 return snd_ice1712_free(ice);
2546}
2547
e23e7a14
BP		 2548static int snd_ice1712_create(struct snd_card *card,
2549 struct pci_dev *pci,
2550 const char *modelname,
2551 int omni,
2552 int cs8427_timeout,
2553 int dxr_enable,
2554 struct snd_ice1712 **r_ice1712)
1da177e4 2555{
6ca308d4 2556 struct snd_ice1712 *ice;
1da177e4 2557 int err;
6ca308d4 2558 static struct snd_device_ops ops = {
1da177e4
LT		 2559 .dev_free = snd_ice1712_dev_free,
2560 };
2561
2562 *r_ice1712 = NULL;
2563
3d8cb466
AB		 2564 /* enable PCI device */
2565 err = pci_enable_device(pci);
2566 if (err < 0)
1da177e4
LT		 2567 return err;
2568 /* check, if we can restrict PCI DMA transfers to 28 bits */
ce0b6201
YH		 2569 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2570 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
6dfb5aff
TI		 2571 dev_err(card->dev,
2572 "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT		 2573 pci_disable_device(pci);
2574 return -ENXIO;
2575 }
2576
e560d8d8 2577 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2578 if (ice == NULL) {
2579 pci_disable_device(pci);
2580 return -ENOMEM;
2581 }
2582 ice->omni = omni ? 1 : 0;
2583 if (cs8427_timeout < 1)
2584 cs8427_timeout = 1;
2585 else if (cs8427_timeout > 1000)
2586 cs8427_timeout = 1000;
2587 ice->cs8427_timeout = cs8427_timeout;
531af462 2588 ice->dxr_enable = dxr_enable;
1da177e4 2589 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2590 mutex_init(&ice->gpio_mutex);
2591 mutex_init(&ice->i2c_mutex);
2592 mutex_init(&ice->open_mutex);
1da177e4 2593 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
49470306 2594 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
1da177e4 2595 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
49470306 2596 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
1da177e4
LT		 2597 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2598 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2599
2600 ice->spdif.cs8403_bits =
2601 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2602 0x10 | /* no emphasis */
2603 0x20); /* PCM encoder/decoder */
2604 ice->card = card;
2605 ice->pci = pci;
2606 ice->irq = -1;
2607 pci_set_master(pci);
ca051e8a 2608 /* disable legacy emulation */
1da177e4
LT		 2609 pci_write_config_word(ice->pci, 0x40, 0x807f);
2610 pci_write_config_word(ice->pci, 0x42, 0x0006);
2611 snd_ice1712_proc_init(ice);
2612 synchronize_irq(pci->irq);
2613
69a4cfdd
SC		 2614 card->private_data = ice;
2615
3d8cb466
AB		 2616 err = pci_request_regions(pci, "ICE1712");
2617 if (err < 0) {
1da177e4
LT		 2618 kfree(ice);
2619 pci_disable_device(pci);
2620 return err;
2621 }
2622 ice->port = pci_resource_start(pci, 0);
2623 ice->ddma_port = pci_resource_start(pci, 1);
2624 ice->dmapath_port = pci_resource_start(pci, 2);
2625 ice->profi_port = pci_resource_start(pci, 3);
2626
437a5a46 2627 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
934c2b6d 2628 KBUILD_MODNAME, ice)) {
6dfb5aff 2629 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2630 snd_ice1712_free(ice);
2631 return -EIO;
2632 }
3d8cb466 2633
1da177e4
LT		 2634 ice->irq = pci->irq;
2635
2636 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2637 snd_ice1712_free(ice);
2638 return -EIO;
2639 }
2640 if (snd_ice1712_chip_init(ice) < 0) {
2641 snd_ice1712_free(ice);
2642 return -EIO;
2643 }
2644
3d8cb466
AB		 2645 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2646 if (err < 0) {
1da177e4 2647 snd_ice1712_free(ice);
3d8cb466 2648 return err;
1da177e4
LT		 2649 }
2650
1da177e4
LT		 2651 *r_ice1712 = ice;
2652 return 0;
2653}
2654
2655
2656/*
2657 *
2658 * Registration
2659 *
2660 */
2661
e23e7a14 2662static struct snd_ice1712_card_info no_matched;
1da177e4 2663
e23e7a14
BP		 2664static int snd_ice1712_probe(struct pci_dev *pci,
2665 const struct pci_device_id *pci_id)
1da177e4
LT		 2666{
2667 static int dev;
6ca308d4
TI		 2668 struct snd_card *card;
2669 struct snd_ice1712 *ice;
1da177e4 2670 int pcm_dev = 0, err;
bf748ed7 2671 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2672
2673 if (dev >= SNDRV_CARDS)
2674 return -ENODEV;
2675 if (!enable[dev]) {
2676 dev++;
2677 return -ENOENT;
2678 }
2679
60c5772b
TI		 2680 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2681 0, &card);
e58de7ba
TI		 2682 if (err < 0)
2683 return err;
1da177e4
LT		 2684
2685 strcpy(card->driver, "ICE1712");
2686 strcpy(card->shortname, "ICEnsemble ICE1712");
3d8cb466
AB		 2687
2688 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2689 cs8427_timeout[dev], dxr_enable[dev], &ice);
2690 if (err < 0) {
1da177e4
LT		 2691 snd_card_free(card);
2692 return err;
2693 }
2694
2695 for (tbl = card_tables; *tbl; tbl++) {
2696 for (c = *tbl; c->subvendor; c++) {
2697 if (c->subvendor == ice->eeprom.subvendor) {
267bccaf 2698 ice->card_info = c;
1da177e4
LT		 2699 strcpy(card->shortname, c->name);
2700 if (c->driver) /* specific driver? */
2701 strcpy(card->driver, c->driver);
2702 if (c->chip_init) {
3d8cb466
AB		 2703 err = c->chip_init(ice);
2704 if (err < 0) {
1da177e4
LT		 2705 snd_card_free(card);
2706 return err;
2707 }
2708 }
2709 goto __found;
2710 }
2711 }
2712 }
2713 c = &no_matched;
2714 __found:
2715
3d8cb466
AB		 2716 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2717 if (err < 0) {
1da177e4
LT		 2718 snd_card_free(card);
2719 return err;
2720 }
3d8cb466 2721
8cd2b264 2722 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2723 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2724 if (err < 0) {
1da177e4
LT		 2725 snd_card_free(card);
2726 return err;
2727 }
8cd2b264 2728 }
1da177e4 2729
3d8cb466
AB		 2730 err = snd_ice1712_ac97_mixer(ice);
2731 if (err < 0) {
1da177e4
LT		 2732 snd_card_free(card);
2733 return err;
2734 }
2735
3d8cb466
AB		 2736 err = snd_ice1712_build_controls(ice);
2737 if (err < 0) {
1da177e4
LT		 2738 snd_card_free(card);
2739 return err;
2740 }
2741
2742 if (c->build_controls) {
3d8cb466
AB		 2743 err = c->build_controls(ice);
2744 if (err < 0) {
1da177e4
LT		 2745 snd_card_free(card);
2746 return err;
2747 }
2748 }
2749
8cd2b264 2750 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2751 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2752 if (err < 0) {
1da177e4
LT		 2753 snd_card_free(card);
2754 return err;
2755 }
8cd2b264 2756 }
1da177e4 2757
3d8cb466
AB		 2758 if (!c->no_mpu401) {
2759 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2760 ICEREG(ice, MPU1_CTRL),
dba8b469
CL		 2761 c->mpu401_1_info_flags |
2762 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2763 -1, &ice->rmidi[0]);
3d8cb466 2764 if (err < 0) {
1da177e4
LT		 2765 snd_card_free(card);
2766 return err;
2767 }
3bef229e 2768 if (c->mpu401_1_name)
25985edc 2769 /* Preferred name available in card_info */
3bef229e
AH		 2770 snprintf(ice->rmidi[0]->name,
2771 sizeof(ice->rmidi[0]->name),
2772 "%s %d", c->mpu401_1_name, card->number);
2773
2774 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2775 /* 2nd port used */
3d8cb466
AB		 2776 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2777 ICEREG(ice, MPU2_CTRL),
dba8b469
CL		 2778 c->mpu401_2_info_flags |
2779 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2780 -1, &ice->rmidi[1]);
3d8cb466
AB		 2781
2782 if (err < 0) {
1da177e4
LT		 2783 snd_card_free(card);
2784 return err;
2785 }
3bef229e 2786 if (c->mpu401_2_name)
25985edc 2787 /* Preferred name available in card_info */
3bef229e
AH		 2788 snprintf(ice->rmidi[1]->name,
2789 sizeof(ice->rmidi[1]->name),
2790 "%s %d", c->mpu401_2_name,
2791 card->number);
2792 }
1da177e4
LT		 2793 }
2794
e957ebf1
JK		 2795 snd_ice1712_set_input_clock_source(ice, 0);
2796
1da177e4
LT		 2797 sprintf(card->longname, "%s at 0x%lx, irq %i",
2798 card->shortname, ice->port, ice->irq);
2799
3d8cb466
AB		 2800 err = snd_card_register(card);
2801 if (err < 0) {
1da177e4
LT		 2802 snd_card_free(card);
2803 return err;
2804 }
2805 pci_set_drvdata(pci, card);
2806 dev++;
2807 return 0;
2808}
2809
e23e7a14 2810static void snd_ice1712_remove(struct pci_dev *pci)
1da177e4 2811{
267bccaf
OZ		 2812 struct snd_card *card = pci_get_drvdata(pci);
2813 struct snd_ice1712 *ice = card->private_data;
2814
2815 if (ice->card_info && ice->card_info->chip_exit)
2816 ice->card_info->chip_exit(ice);
2817 snd_card_free(card);
1da177e4
LT		 2818}
2819
ca051e8a
OZ		 2820#ifdef CONFIG_PM_SLEEP
2821static int snd_ice1712_suspend(struct device *dev)
2822{
2823 struct pci_dev *pci = to_pci_dev(dev);
2824 struct snd_card *card = dev_get_drvdata(dev);
2825 struct snd_ice1712 *ice = card->private_data;
2826
2827 if (!ice->pm_suspend_enabled)
2828 return 0;
2829
2830 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2831
2832 snd_pcm_suspend_all(ice->pcm);
2833 snd_pcm_suspend_all(ice->pcm_pro);
2834 snd_pcm_suspend_all(ice->pcm_ds);
2835 snd_ac97_suspend(ice->ac97);
2836
6ea0cae7
OZ		 2837 spin_lock_irq(&ice->reg_lock);
2838 ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2839 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2840 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2841 spin_unlock_irq(&ice->reg_lock);
2842
ca051e8a
OZ		 2843 if (ice->pm_suspend)
2844 ice->pm_suspend(ice);
2845
2846 pci_disable_device(pci);
2847 pci_save_state(pci);
2848 pci_set_power_state(pci, PCI_D3hot);
2849 return 0;
2850}
2851
2852static int snd_ice1712_resume(struct device *dev)
2853{
2854 struct pci_dev *pci = to_pci_dev(dev);
2855 struct snd_card *card = dev_get_drvdata(dev);
2856 struct snd_ice1712 *ice = card->private_data;
6ea0cae7 2857 int rate;
ca051e8a
OZ		 2858
2859 if (!ice->pm_suspend_enabled)
2860 return 0;
2861
2862 pci_set_power_state(pci, PCI_D0);
2863 pci_restore_state(pci);
2864
2865 if (pci_enable_device(pci) < 0) {
2866 snd_card_disconnect(card);
2867 return -EIO;
2868 }
2869
2870 pci_set_master(pci);
2871
6ea0cae7
OZ		 2872 if (ice->cur_rate)
2873 rate = ice->cur_rate;
2874 else
2875 rate = PRO_RATE_DEFAULT;
2876
ca051e8a
OZ		 2877 if (snd_ice1712_chip_init(ice) < 0) {
2878 snd_card_disconnect(card);
2879 return -EIO;
2880 }
2881
6ea0cae7
OZ		 2882 ice->cur_rate = rate;
2883
ca051e8a
OZ		 2884 if (ice->pm_resume)
2885 ice->pm_resume(ice);
2886
6ea0cae7
OZ		 2887 if (ice->pm_saved_is_spdif_master) {
2888 /* switching to external clock via SPDIF */
2889 spin_lock_irq(&ice->reg_lock);
2890 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2891 ICEMT(ice, RATE));
2892 spin_unlock_irq(&ice->reg_lock);
2893 snd_ice1712_set_input_clock_source(ice, 1);
2894 } else {
2895 /* internal on-card clock */
2896 snd_ice1712_set_pro_rate(ice, rate, 1);
2897 snd_ice1712_set_input_clock_source(ice, 0);
2898 }
2899
2900 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2901 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2902
ca051e8a
OZ		 2903 if (ice->ac97)
2904 snd_ac97_resume(ice->ac97);
2905
2906 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2907 return 0;
2908}
2909
2910static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2911#define SND_VT1712_PM_OPS &snd_ice1712_pm
2912#else
2913#define SND_VT1712_PM_OPS NULL
2914#endif /* CONFIG_PM_SLEEP */
2915
e9f66d9b 2916static struct pci_driver ice1712_driver = {
3733e424 2917 .name = KBUILD_MODNAME,
1da177e4
LT		 2918 .id_table = snd_ice1712_ids,
2919 .probe = snd_ice1712_probe,
e23e7a14 2920 .remove = snd_ice1712_remove,
ca051e8a
OZ		 2921 .driver = {
2922 .pm = SND_VT1712_PM_OPS,
2923 },
1da177e4
LT		 2924};
2925
e9f66d9b 2926module_pci_driver(ice1712_driver);
Linux kernel - Deliverables
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