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ALSA: hda: Deletion of unnecessary checks before two function calls
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
c1017a4c 4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
3d8cb466 20 */
1da177e4
LT		 21
22/*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26*/
27
28/*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
3d8cb466 38 * I have left out support for 176.4 and 192 KHz for the moment.
1da177e4
LT		 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
1da177e4
LT		 50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
9d2f928d 54#include <linux/dma-mapping.h>
1da177e4 55#include <linux/slab.h>
65a77217 56#include <linux/module.h>
62932df8 57#include <linux/mutex.h>
910638ae 58
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/cs8427.h>
61#include <sound/info.h>
1da177e4 62#include <sound/initval.h>
680ef792 63#include <sound/tlv.h>
1da177e4
LT		 64
65#include <sound/asoundef.h>
66
67#include "ice1712.h"
68
69/* lowlevel routines */
70#include "delta.h"
71#include "ews.h"
72#include "hoontech.h"
73
c1017a4c 74MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 75MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76MODULE_LICENSE("GPL");
77MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 86static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
1da177e4 87static char *model[SNDRV_CARDS];
a67ff6a5 88static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
7c9d440e 89static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
01a00e5e 90static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
1da177e4
LT		 91
92module_param_array(index, int, NULL, 0444);
93MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94module_param_array(id, charp, NULL, 0444);
95MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96module_param_array(enable, bool, NULL, 0444);
97MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98module_param_array(omni, bool, NULL, 0444);
99MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100module_param_array(cs8427_timeout, int, NULL, 0444);
101MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102module_param_array(model, charp, NULL, 0444);
103MODULE_PARM_DESC(model, "Use the given board model.");
531af462 104module_param_array(dxr_enable, int, NULL, 0444);
01a00e5e 105MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
1da177e4 106
1da177e4 107
9baa3c34 108static const struct pci_device_id snd_ice1712_ids[] = {
28d27aae 109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
1da177e4
LT		 110 { 0, }
111};
112
113MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
6ca308d4
TI		 115static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
1da177e4
LT		 117
118static int PRO_RATE_LOCKED;
119static int PRO_RATE_RESET = 1;
120static unsigned int PRO_RATE_DEFAULT = 44100;
121
122/*
123 * Basic I/O
124 */
3d8cb466 125
1da177e4 126/* check whether the clock mode is spdif-in */
6ca308d4 127static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 128{
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130}
131
6ca308d4 132static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 133{
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135}
136
3d8cb466 137static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
1da177e4
LT		 138{
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141}
142
3d8cb466 143static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
1da177e4
LT		 144{
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147}
148
6ca308d4 149static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 150 unsigned short reg,
151 unsigned short val)
152{
6ca308d4 153 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172}
173
6ca308d4 174static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 175 unsigned short reg)
176{
6ca308d4 177 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197}
198
199/*
200 * pro ac97 section
201 */
202
6ca308d4 203static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 204 unsigned short reg,
205 unsigned short val)
206{
6ca308d4 207 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226}
227
228
6ca308d4 229static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 230 unsigned short reg)
231{
6ca308d4 232 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252}
253
254/*
255 * consumer ac97 digital mix
256 */
a5ce8890 257#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
1da177e4 258
6ca308d4 259static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 260{
6ca308d4 261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 262
1da177e4
LT		 263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265}
266
6ca308d4 267static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 268{
6ca308d4 269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 270 unsigned char val, nval;
3d8cb466 271
1da177e4
LT		 272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
3d8cb466
AB		 275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
1da177e4
LT		 277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280}
281
e23e7a14 282static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
1da177e4
LT		 283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288};
289
290
291/*
292 * gpio operations
293 */
6ca308d4 294static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 295{
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298}
299
49470306
PH		 300static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301{
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303}
304
305static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306{
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308}
309
6ca308d4 310static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 311{
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314}
315
6ca308d4 316static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 317{
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319}
320
6ca308d4 321static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 322{
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325}
326
1da177e4
LT		 327/*
328 *
329 * CS8427 interface
330 *
331 */
332
333/*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
6ca308d4 337static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
1da177e4
LT		 338{
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
3d8cb466 342
1da177e4
LT		 343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367}
368
369/*
370 * spdif callbacks
371 */
6ca308d4 372static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 373{
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375}
376
6ca308d4 377static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
1da177e4
LT		 378{
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380}
381
6ca308d4 382static void setup_cs8427(struct snd_ice1712 *ice, int rate)
1da177e4
LT		 383{
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385}
386
387/*
388 * create and initialize callbacks for cs8427 interface
389 */
e23e7a14 390int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
1da177e4
LT		 391{
392 int err;
393
3d8cb466
AB		 394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
6dfb5aff 397 dev_err(ice->card->dev, "CS8427 initialization failed\n");
1da177e4
LT		 398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404}
405
e957ebf1
JK		 406static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407{
3d8cb466
AB		 408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
e957ebf1
JK		 411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419}
1da177e4
LT		 420
421/*
422 * Interrupt handler
423 */
424
7d12e780 425static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
1da177e4 426{
6ca308d4 427 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
7d12e780 438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
1da177e4
LT		 439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
7d12e780 446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
1da177e4
LT		 447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
6ca308d4 468 struct snd_pcm_substream *substream;
1da177e4 469 pbkstatus = inw(ICEDS(ice, INTSTAT));
6dfb5aff 470 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
1da177e4
LT		 471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
3d8cb466
AB		 474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
1da177e4
LT		 476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493}
494
495
496/*
497 * PCM part - misc
498 */
499
6ca308d4
TI		 500static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 502{
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504}
505
6ca308d4 506static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 507{
508 return snd_pcm_lib_free_pages(substream);
509}
510
511/*
512 * PCM part - consumer I/O
513 */
514
6ca308d4 515static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 516 int cmd)
517{
6ca308d4 518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 519 int result = 0;
520 u32 tmp;
3d8cb466 521
1da177e4
LT		 522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538}
539
6ca308d4 540static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 541 int cmd)
542{
6ca308d4 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 544 int result = 0;
545 u32 tmp;
3d8cb466 546
1da177e4
LT		 547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563}
564
6ca308d4 565static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 566 int cmd)
567{
6ca308d4 568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 569 int result = 0;
570 u8 tmp;
3d8cb466 571
1da177e4
LT		 572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584}
585
6ca308d4 586static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 587{
6ca308d4
TI		 588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617}
618
6ca308d4 619static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
1da177e4 620{
6ca308d4
TI		 621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
b393df01 623 u32 period_size, rate, tmp, chn;
1da177e4
LT		 624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
1da177e4
LT		 626 tmp = 0x0064;
627 if (snd_pcm_format_width(runtime->format) == 16)
628 tmp &= ~0x04;
629 if (runtime->channels == 2)
630 tmp |= 0x08;
631 rate = (runtime->rate * 8192) / 375;
632 if (rate > 0x000fffff)
633 rate = 0x000fffff;
634 ice->playback_con_active_buf[substream->number] = 0;
635 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
636 chn = substream->number * 2;
637 spin_lock_irq(&ice->reg_lock);
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
645 if (runtime->channels == 2) {
646 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
648 }
649 spin_unlock_irq(&ice->reg_lock);
650 return 0;
651}
652
6ca308d4 653static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 654{
6ca308d4
TI		 655 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
656 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 657 u32 period_size, buf_size;
658 u8 tmp;
659
660 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
661 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
662 tmp = 0x06;
663 if (snd_pcm_format_width(runtime->format) == 16)
664 tmp &= ~0x04;
665 if (runtime->channels == 2)
666 tmp &= ~0x02;
667 spin_lock_irq(&ice->reg_lock);
668 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
669 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
670 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
673 spin_unlock_irq(&ice->reg_lock);
674 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
675 return 0;
676}
677
6ca308d4 678static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 679{
6ca308d4
TI		 680 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
681 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 682 size_t ptr;
683
684 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
685 return 0;
686 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
4f8e9400 687 ptr = bytes_to_frames(substream->runtime, ptr);
1da177e4
LT		 688 if (ptr == runtime->buffer_size)
689 ptr = 0;
4f8e9400 690 return ptr;
1da177e4
LT		 691}
692
6ca308d4 693static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
1da177e4 694{
6ca308d4 695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 696 u8 addr;
697 size_t ptr;
698
699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
700 return 0;
701 if (ice->playback_con_active_buf[substream->number])
702 addr = ICE1712_DSC_ADDR1;
703 else
704 addr = ICE1712_DSC_ADDR0;
705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
706 ice->playback_con_virt_addr[substream->number];
4f8e9400 707 ptr = bytes_to_frames(substream->runtime, ptr);
1da177e4
LT		 708 if (ptr == substream->runtime->buffer_size)
709 ptr = 0;
4f8e9400 710 return ptr;
1da177e4
LT		 711}
712
6ca308d4 713static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 714{
6ca308d4 715 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 716 size_t ptr;
717
718 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
719 return 0;
720 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
4f8e9400 721 ptr = bytes_to_frames(substream->runtime, ptr);
1da177e4
LT		 722 if (ptr == substream->runtime->buffer_size)
723 ptr = 0;
4f8e9400 724 return ptr;
1da177e4
LT		 725}
726
3d8cb466 727static const struct snd_pcm_hardware snd_ice1712_playback = {
1da177e4
LT		 728 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
729 SNDRV_PCM_INFO_BLOCK_TRANSFER |
730 SNDRV_PCM_INFO_MMAP_VALID |
731 SNDRV_PCM_INFO_PAUSE),
732 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
733 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
734 .rate_min = 4000,
735 .rate_max = 48000,
736 .channels_min = 1,
737 .channels_max = 2,
738 .buffer_bytes_max = (64*1024),
739 .period_bytes_min = 64,
740 .period_bytes_max = (64*1024),
741 .periods_min = 1,
742 .periods_max = 1024,
743 .fifo_size = 0,
744};
745
3d8cb466 746static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
1da177e4
LT		 747 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
748 SNDRV_PCM_INFO_BLOCK_TRANSFER |
749 SNDRV_PCM_INFO_MMAP_VALID |
750 SNDRV_PCM_INFO_PAUSE),
751 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
752 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
753 .rate_min = 4000,
754 .rate_max = 48000,
755 .channels_min = 1,
756 .channels_max = 2,
757 .buffer_bytes_max = (128*1024),
758 .period_bytes_min = 64,
759 .period_bytes_max = (128*1024),
760 .periods_min = 2,
761 .periods_max = 2,
762 .fifo_size = 0,
763};
764
3d8cb466 765static const struct snd_pcm_hardware snd_ice1712_capture = {
1da177e4
LT		 766 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
767 SNDRV_PCM_INFO_BLOCK_TRANSFER |
768 SNDRV_PCM_INFO_MMAP_VALID),
769 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
770 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
771 .rate_min = 4000,
772 .rate_max = 48000,
773 .channels_min = 1,
774 .channels_max = 2,
775 .buffer_bytes_max = (64*1024),
776 .period_bytes_min = 64,
777 .period_bytes_max = (64*1024),
778 .periods_min = 1,
779 .periods_max = 1024,
780 .fifo_size = 0,
781};
782
6ca308d4 783static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
1da177e4 784{
6ca308d4
TI		 785 struct snd_pcm_runtime *runtime = substream->runtime;
786 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 787
788 ice->playback_con_substream = substream;
789 runtime->hw = snd_ice1712_playback;
790 return 0;
791}
792
6ca308d4 793static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
1da177e4 794{
6ca308d4
TI		 795 struct snd_pcm_runtime *runtime = substream->runtime;
796 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 797 u32 tmp;
798
799 ice->playback_con_substream_ds[substream->number] = substream;
800 runtime->hw = snd_ice1712_playback_ds;
3d8cb466 801 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 802 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
803 outw(tmp, ICEDS(ice, INTMASK));
804 spin_unlock_irq(&ice->reg_lock);
805 return 0;
806}
807
6ca308d4 808static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
1da177e4 809{
6ca308d4
TI		 810 struct snd_pcm_runtime *runtime = substream->runtime;
811 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 812
813 ice->capture_con_substream = substream;
814 runtime->hw = snd_ice1712_capture;
815 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
816 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
817 runtime->hw.rate_min = 48000;
818 return 0;
819}
820
6ca308d4 821static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
1da177e4 822{
6ca308d4 823 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 824
825 ice->playback_con_substream = NULL;
826 return 0;
827}
828
6ca308d4 829static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
1da177e4 830{
6ca308d4 831 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 832 u32 tmp;
833
3d8cb466 834 spin_lock_irq(&ice->reg_lock);
1da177e4
LT		 835 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
836 outw(tmp, ICEDS(ice, INTMASK));
837 spin_unlock_irq(&ice->reg_lock);
838 ice->playback_con_substream_ds[substream->number] = NULL;
839 return 0;
840}
841
6ca308d4 842static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
1da177e4 843{
6ca308d4 844 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 845
846 ice->capture_con_substream = NULL;
847 return 0;
848}
849
6ca308d4 850static struct snd_pcm_ops snd_ice1712_playback_ops = {
1da177e4
LT		 851 .open = snd_ice1712_playback_open,
852 .close = snd_ice1712_playback_close,
853 .ioctl = snd_pcm_lib_ioctl,
854 .hw_params = snd_ice1712_hw_params,
855 .hw_free = snd_ice1712_hw_free,
856 .prepare = snd_ice1712_playback_prepare,
857 .trigger = snd_ice1712_playback_trigger,
858 .pointer = snd_ice1712_playback_pointer,
859};
860
6ca308d4 861static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
1da177e4
LT		 862 .open = snd_ice1712_playback_ds_open,
863 .close = snd_ice1712_playback_ds_close,
864 .ioctl = snd_pcm_lib_ioctl,
865 .hw_params = snd_ice1712_hw_params,
866 .hw_free = snd_ice1712_hw_free,
867 .prepare = snd_ice1712_playback_ds_prepare,
868 .trigger = snd_ice1712_playback_ds_trigger,
869 .pointer = snd_ice1712_playback_ds_pointer,
870};
871
6ca308d4 872static struct snd_pcm_ops snd_ice1712_capture_ops = {
1da177e4
LT		 873 .open = snd_ice1712_capture_open,
874 .close = snd_ice1712_capture_close,
875 .ioctl = snd_pcm_lib_ioctl,
876 .hw_params = snd_ice1712_hw_params,
877 .hw_free = snd_ice1712_hw_free,
878 .prepare = snd_ice1712_capture_prepare,
879 .trigger = snd_ice1712_capture_trigger,
880 .pointer = snd_ice1712_capture_pointer,
881};
882
e23e7a14 883static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 884{
6ca308d4 885 struct snd_pcm *pcm;
1da177e4
LT		 886 int err;
887
888 if (rpcm)
889 *rpcm = NULL;
890 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
891 if (err < 0)
892 return err;
893
894 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
895 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
896
897 pcm->private_data = ice;
1da177e4
LT		 898 pcm->info_flags = 0;
899 strcpy(pcm->name, "ICE1712 consumer");
900 ice->pcm = pcm;
901
902 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
903 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
904
905 if (rpcm)
906 *rpcm = pcm;
907
6dfb5aff
TI		 908 dev_warn(ice->card->dev,
909 "Consumer PCM code does not work well at the moment --jk\n");
1da177e4
LT		 910
911 return 0;
912}
913
e23e7a14 914static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 915{
6ca308d4 916 struct snd_pcm *pcm;
1da177e4
LT		 917 int err;
918
919 if (rpcm)
920 *rpcm = NULL;
921 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
922 if (err < 0)
923 return err;
924
925 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
926
927 pcm->private_data = ice;
1da177e4
LT		 928 pcm->info_flags = 0;
929 strcpy(pcm->name, "ICE1712 consumer (DS)");
930 ice->pcm_ds = pcm;
931
932 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
933 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
934
935 if (rpcm)
936 *rpcm = pcm;
937
938 return 0;
939}
940
941/*
942 * PCM code - professional part (multitrack)
943 */
944
945static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
946 32000, 44100, 48000, 64000, 88200, 96000 };
947
6ca308d4 948static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 949 .count = ARRAY_SIZE(rates),
950 .list = rates,
951 .mask = 0,
952};
953
6ca308d4 954static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 955 int cmd)
956{
6ca308d4 957 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 958 switch (cmd) {
959 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
960 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
961 {
962 unsigned int what;
963 unsigned int old;
964 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
965 return -EINVAL;
966 what = ICE1712_PLAYBACK_PAUSE;
967 snd_pcm_trigger_done(substream, substream);
968 spin_lock(&ice->reg_lock);
969 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
970 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
971 old |= what;
972 else
973 old &= ~what;
974 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
975 spin_unlock(&ice->reg_lock);
976 break;
977 }
978 case SNDRV_PCM_TRIGGER_START:
979 case SNDRV_PCM_TRIGGER_STOP:
980 {
981 unsigned int what = 0;
982 unsigned int old;
6ca308d4 983 struct snd_pcm_substream *s;
1da177e4 984
ef991b95 985 snd_pcm_group_for_each_entry(s, substream) {
1da177e4
LT		 986 if (s == ice->playback_pro_substream) {
987 what |= ICE1712_PLAYBACK_START;
988 snd_pcm_trigger_done(s, substream);
989 } else if (s == ice->capture_pro_substream) {
990 what |= ICE1712_CAPTURE_START_SHADOW;
991 snd_pcm_trigger_done(s, substream);
992 }
993 }
994 spin_lock(&ice->reg_lock);
995 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
996 if (cmd == SNDRV_PCM_TRIGGER_START)
997 old |= what;
998 else
999 old &= ~what;
1000 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
1001 spin_unlock(&ice->reg_lock);
1002 break;
1003 }
1004 default:
1005 return -EINVAL;
1006 }
1007 return 0;
1008}
1009
1010/*
1011 */
6ca308d4 1012static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1da177e4
LT		 1013{
1014 unsigned long flags;
1015 unsigned char val, old;
1016 unsigned int i;
1017
1018 switch (rate) {
1019 case 8000: val = 6; break;
1020 case 9600: val = 3; break;
1021 case 11025: val = 10; break;
1022 case 12000: val = 2; break;
1023 case 16000: val = 5; break;
1024 case 22050: val = 9; break;
1025 case 24000: val = 1; break;
1026 case 32000: val = 4; break;
1027 case 44100: val = 8; break;
1028 case 48000: val = 0; break;
1029 case 64000: val = 15; break;
1030 case 88200: val = 11; break;
1031 case 96000: val = 7; break;
1032 default:
1033 snd_BUG();
1034 val = 0;
1035 rate = 48000;
1036 break;
1037 }
1038
1039 spin_lock_irqsave(&ice->reg_lock, flags);
1040 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1041 ICE1712_PLAYBACK_PAUSE|
1042 ICE1712_PLAYBACK_START)) {
3d8cb466 1043__out:
1da177e4
LT		 1044 spin_unlock_irqrestore(&ice->reg_lock, flags);
1045 return;
1046 }
1047 if (!force && is_pro_rate_locked(ice))
1048 goto __out;
1049
3d8cb466 1050 old = inb(ICEMT(ice, RATE));
1da177e4
LT		 1051 if (!force && old == val)
1052 goto __out;
6ea0cae7
OZ		 1053
1054 ice->cur_rate = rate;
1da177e4
LT		 1055 outb(val, ICEMT(ice, RATE));
1056 spin_unlock_irqrestore(&ice->reg_lock, flags);
1057
1058 if (ice->gpio.set_pro_rate)
1059 ice->gpio.set_pro_rate(ice, rate);
1060 for (i = 0; i < ice->akm_codecs; i++) {
1061 if (ice->akm[i].ops.set_rate_val)
1062 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1063 }
1064 if (ice->spdif.ops.setup_rate)
1065 ice->spdif.ops.setup_rate(ice, rate);
1066}
1067
6ca308d4 1068static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1069{
6ca308d4 1070 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1071
1072 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1073 spin_lock_irq(&ice->reg_lock);
1074 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1075 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1076 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1077 spin_unlock_irq(&ice->reg_lock);
1078
1079 return 0;
1080}
1081
6ca308d4
TI		 1082static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1083 struct snd_pcm_hw_params *hw_params)
1da177e4 1084{
6ca308d4 1085 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1086
1087 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1088 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1089}
1090
6ca308d4 1091static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 1092{
6ca308d4 1093 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1094
1095 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1096 spin_lock_irq(&ice->reg_lock);
1097 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1098 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1099 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1100 spin_unlock_irq(&ice->reg_lock);
1101 return 0;
1102}
1103
6ca308d4
TI		 1104static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1105 struct snd_pcm_hw_params *hw_params)
1da177e4 1106{
6ca308d4 1107 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1108
1109 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1110 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1111}
1112
6ca308d4 1113static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1114{
6ca308d4 1115 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1116 size_t ptr;
1117
1118 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1119 return 0;
1120 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
4f8e9400 1121 ptr = bytes_to_frames(substream->runtime, ptr);
1da177e4
LT		 1122 if (ptr == substream->runtime->buffer_size)
1123 ptr = 0;
4f8e9400 1124 return ptr;
1da177e4
LT		 1125}
1126
6ca308d4 1127static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 1128{
6ca308d4 1129 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1130 size_t ptr;
1131
1132 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1133 return 0;
1134 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
4f8e9400 1135 ptr = bytes_to_frames(substream->runtime, ptr);
1da177e4
LT		 1136 if (ptr == substream->runtime->buffer_size)
1137 ptr = 0;
4f8e9400 1138 return ptr;
1da177e4
LT		 1139}
1140
3d8cb466 1141static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1da177e4
LT		 1142 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1143 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1144 SNDRV_PCM_INFO_MMAP_VALID |
1145 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1146 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1147 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1148 .rate_min = 4000,
1149 .rate_max = 96000,
1150 .channels_min = 10,
1151 .channels_max = 10,
1152 .buffer_bytes_max = (256*1024),
1153 .period_bytes_min = 10 * 4 * 2,
1154 .period_bytes_max = 131040,
1155 .periods_min = 1,
1156 .periods_max = 1024,
1157 .fifo_size = 0,
1158};
1159
3d8cb466 1160static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1da177e4
LT		 1161 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1162 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1163 SNDRV_PCM_INFO_MMAP_VALID |
1164 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1165 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1166 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1167 .rate_min = 4000,
1168 .rate_max = 96000,
1169 .channels_min = 12,
1170 .channels_max = 12,
1171 .buffer_bytes_max = (256*1024),
1172 .period_bytes_min = 12 * 4 * 2,
1173 .period_bytes_max = 131040,
1174 .periods_min = 1,
1175 .periods_max = 1024,
1176 .fifo_size = 0,
1177};
1178
6ca308d4 1179static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 1180{
6ca308d4
TI		 1181 struct snd_pcm_runtime *runtime = substream->runtime;
1182 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1183
1184 ice->playback_pro_substream = substream;
1185 runtime->hw = snd_ice1712_playback_pro;
1186 snd_pcm_set_sync(substream);
1187 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1188 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1189 if (is_pro_rate_locked(ice)) {
1190 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1191 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1192 }
1da177e4
LT		 1193
1194 if (ice->spdif.ops.open)
1195 ice->spdif.ops.open(ice, substream);
1196
1197 return 0;
1198}
1199
6ca308d4 1200static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1201{
6ca308d4
TI		 1202 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1203 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1204
1205 ice->capture_pro_substream = substream;
1206 runtime->hw = snd_ice1712_capture_pro;
1207 snd_pcm_set_sync(substream);
1208 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1209 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
350a5147
SA		 1210 if (is_pro_rate_locked(ice)) {
1211 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1212 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1213 }
1214
1da177e4
LT		 1215 return 0;
1216}
1217
6ca308d4 1218static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1219{
6ca308d4 1220 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1221
1222 if (PRO_RATE_RESET)
1223 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1224 ice->playback_pro_substream = NULL;
1225 if (ice->spdif.ops.close)
1226 ice->spdif.ops.close(ice, substream);
1227
1228 return 0;
1229}
1230
6ca308d4 1231static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1232{
6ca308d4 1233 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1234
1235 if (PRO_RATE_RESET)
1236 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1237 ice->capture_pro_substream = NULL;
1238 return 0;
1239}
1240
6ca308d4 1241static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1da177e4
LT		 1242 .open = snd_ice1712_playback_pro_open,
1243 .close = snd_ice1712_playback_pro_close,
1244 .ioctl = snd_pcm_lib_ioctl,
1245 .hw_params = snd_ice1712_playback_pro_hw_params,
1246 .hw_free = snd_ice1712_hw_free,
1247 .prepare = snd_ice1712_playback_pro_prepare,
1248 .trigger = snd_ice1712_pro_trigger,
1249 .pointer = snd_ice1712_playback_pro_pointer,
1250};
1251
6ca308d4 1252static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1da177e4
LT		 1253 .open = snd_ice1712_capture_pro_open,
1254 .close = snd_ice1712_capture_pro_close,
1255 .ioctl = snd_pcm_lib_ioctl,
1256 .hw_params = snd_ice1712_capture_pro_hw_params,
1257 .hw_free = snd_ice1712_hw_free,
1258 .prepare = snd_ice1712_capture_pro_prepare,
1259 .trigger = snd_ice1712_pro_trigger,
1260 .pointer = snd_ice1712_capture_pro_pointer,
1261};
1262
e23e7a14 1263static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1da177e4 1264{
6ca308d4 1265 struct snd_pcm *pcm;
1da177e4
LT		 1266 int err;
1267
1268 if (rpcm)
1269 *rpcm = NULL;
1270 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1271 if (err < 0)
1272 return err;
1273
1274 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1275 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1276
1277 pcm->private_data = ice;
1da177e4
LT		 1278 pcm->info_flags = 0;
1279 strcpy(pcm->name, "ICE1712 multi");
1280
1281 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1282 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1283
1284 ice->pcm_pro = pcm;
1285 if (rpcm)
1286 *rpcm = pcm;
3d8cb466 1287
1da177e4
LT		 1288 if (ice->cs8427) {
1289 /* assign channels to iec958 */
1290 err = snd_cs8427_iec958_build(ice->cs8427,
1291 pcm->streams[0].substream,
1292 pcm->streams[1].substream);
1293 if (err < 0)
1294 return err;
1295 }
1296
387417b5 1297 return snd_ice1712_build_pro_mixer(ice);
1da177e4
LT		 1298}
1299
1300/*
1301 * Mixer section
1302 */
1303
6ca308d4 1304static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1da177e4
LT		 1305{
1306 unsigned int vol = ice->pro_volumes[index];
1307 unsigned short val = 0;
1308
1309 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1310 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1311 outb(index, ICEMT(ice, MONITOR_INDEX));
1312 outw(val, ICEMT(ice, MONITOR_VOLUME));
1313}
1314
a5ce8890 1315#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1da177e4 1316
6ca308d4 1317static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1318{
6ca308d4 1319 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1320 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1321 kcontrol->private_value;
3d8cb466 1322
1da177e4 1323 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1324 ucontrol->value.integer.value[0] =
1325 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1326 ucontrol->value.integer.value[1] =
1327 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1da177e4
LT		 1328 spin_unlock_irq(&ice->reg_lock);
1329 return 0;
1330}
1331
6ca308d4 1332static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1333{
6ca308d4 1334 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1335 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1336 kcontrol->private_value;
1da177e4
LT		 1337 unsigned int nval, change;
1338
1339 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1340 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1341 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1342 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1343 change = nval != ice->pro_volumes[priv_idx];
1344 ice->pro_volumes[priv_idx] = nval;
1345 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1346 spin_unlock_irq(&ice->reg_lock);
1347 return change;
1348}
1349
6ca308d4 1350static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1351{
1352 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1353 uinfo->count = 2;
1354 uinfo->value.integer.min = 0;
1355 uinfo->value.integer.max = 96;
1356 return 0;
1357}
1358
6ca308d4 1359static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1360{
6ca308d4 1361 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1362 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1363 kcontrol->private_value;
3d8cb466 1364
1da177e4 1365 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1366 ucontrol->value.integer.value[0] =
1367 (ice->pro_volumes[priv_idx] >> 0) & 127;
1368 ucontrol->value.integer.value[1] =
1369 (ice->pro_volumes[priv_idx] >> 16) & 127;
1da177e4
LT		 1370 spin_unlock_irq(&ice->reg_lock);
1371 return 0;
1372}
1373
6ca308d4 1374static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1375{
6ca308d4 1376 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
c3daa92d
HH		 1377 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1378 kcontrol->private_value;
1da177e4
LT		 1379 unsigned int nval, change;
1380
1381 nval = (ucontrol->value.integer.value[0] & 127) |
1382 ((ucontrol->value.integer.value[1] & 127) << 16);
1383 spin_lock_irq(&ice->reg_lock);
c3daa92d
HH		 1384 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1385 change = nval != ice->pro_volumes[priv_idx];
1386 ice->pro_volumes[priv_idx] = nval;
1387 snd_ice1712_update_volume(ice, priv_idx);
1da177e4
LT		 1388 spin_unlock_irq(&ice->reg_lock);
1389 return change;
1390}
1391
0cb29ea0 1392static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1da177e4 1393
e23e7a14 1394static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1da177e4
LT		 1395 {
1396 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1397 .name = "Multi Playback Switch",
1398 .info = snd_ice1712_pro_mixer_switch_info,
1399 .get = snd_ice1712_pro_mixer_switch_get,
1400 .put = snd_ice1712_pro_mixer_switch_put,
1401 .private_value = 0,
1402 .count = 10,
1403 },
1404 {
1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1406 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1407 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1408 .name = "Multi Playback Volume",
1409 .info = snd_ice1712_pro_mixer_volume_info,
1410 .get = snd_ice1712_pro_mixer_volume_get,
1411 .put = snd_ice1712_pro_mixer_volume_put,
1412 .private_value = 0,
1413 .count = 10,
680ef792 1414 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1415 },
1416};
1417
e23e7a14 1418static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1da177e4
LT		 1419 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1420 .name = "H/W Multi Capture Switch",
1421 .info = snd_ice1712_pro_mixer_switch_info,
1422 .get = snd_ice1712_pro_mixer_switch_get,
1423 .put = snd_ice1712_pro_mixer_switch_put,
1424 .private_value = 10,
1425};
1426
e23e7a14 1427static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1da177e4 1428 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1429 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1da177e4
LT		 1430 .info = snd_ice1712_pro_mixer_switch_info,
1431 .get = snd_ice1712_pro_mixer_switch_get,
1432 .put = snd_ice1712_pro_mixer_switch_put,
1433 .private_value = 18,
1434 .count = 2,
1435};
1436
e23e7a14 1437static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1da177e4 1438 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
680ef792
TI		 1439 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1440 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 1441 .name = "H/W Multi Capture Volume",
1442 .info = snd_ice1712_pro_mixer_volume_info,
1443 .get = snd_ice1712_pro_mixer_volume_get,
1444 .put = snd_ice1712_pro_mixer_volume_put,
1445 .private_value = 10,
680ef792 1446 .tlv = { .p = db_scale_playback }
1da177e4
LT		 1447};
1448
e23e7a14 1449static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1da177e4 1450 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 1451 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1da177e4
LT		 1452 .info = snd_ice1712_pro_mixer_volume_info,
1453 .get = snd_ice1712_pro_mixer_volume_get,
1454 .put = snd_ice1712_pro_mixer_volume_put,
1455 .private_value = 18,
1456 .count = 2,
1457};
1458
e23e7a14 1459static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1da177e4 1460{
6ca308d4 1461 struct snd_card *card = ice->card;
1da177e4
LT		 1462 unsigned int idx;
1463 int err;
1464
1465 /* multi-channel mixer */
1466 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1467 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1468 if (err < 0)
1469 return err;
1470 }
3d8cb466 1471
1da177e4 1472 if (ice->num_total_adcs > 0) {
6ca308d4 1473 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1da177e4
LT		 1474 tmp.count = ice->num_total_adcs;
1475 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1476 if (err < 0)
1477 return err;
1478 }
1479
1480 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1481 if (err < 0)
1482 return err;
1483
1484 if (ice->num_total_adcs > 0) {
6ca308d4 1485 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1da177e4
LT		 1486 tmp.count = ice->num_total_adcs;
1487 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1488 if (err < 0)
1489 return err;
1490 }
1491
1492 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1493 if (err < 0)
1494 return err;
1495
1496 /* initialize volumes */
1497 for (idx = 0; idx < 10; idx++) {
1498 ice->pro_volumes[idx] = 0x80008000; /* mute */
1499 snd_ice1712_update_volume(ice, idx);
1500 }
1501 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1502 ice->pro_volumes[idx] = 0x80008000; /* mute */
1503 snd_ice1712_update_volume(ice, idx);
1504 }
1505 for (idx = 18; idx < 20; idx++) {
1506 ice->pro_volumes[idx] = 0x80008000; /* mute */
1507 snd_ice1712_update_volume(ice, idx);
1508 }
1509 return 0;
1510}
1511
6ca308d4 1512static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1513{
6ca308d4 1514 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 1515 ice->ac97 = NULL;
1516}
1517
e23e7a14 1518static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1519{
1520 int err, bus_num = 0;
6ca308d4
TI		 1521 struct snd_ac97_template ac97;
1522 struct snd_ac97_bus *pbus;
1523 static struct snd_ac97_bus_ops con_ops = {
1da177e4
LT		 1524 .write = snd_ice1712_ac97_write,
1525 .read = snd_ice1712_ac97_read,
1526 };
6ca308d4 1527 static struct snd_ac97_bus_ops pro_ops = {
1da177e4
LT		 1528 .write = snd_ice1712_pro_ac97_write,
1529 .read = snd_ice1712_pro_ac97_read,
1530 };
1531
1532 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 1533 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1534 if (err < 0)
1da177e4
LT		 1535 return err;
1536 memset(&ac97, 0, sizeof(ac97));
1537 ac97.private_data = ice;
1538 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1539 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1540 if (err < 0)
6dfb5aff
TI		 1541 dev_warn(ice->card->dev,
1542 "cannot initialize ac97 for consumer, skipped\n");
1da177e4 1543 else {
387417b5
SM		 1544 return snd_ctl_add(ice->card,
1545 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97,
1546 ice));
1da177e4
LT		 1547 }
1548 }
1549
3d8cb466
AB		 1550 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1551 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1552 if (err < 0)
1da177e4
LT		 1553 return err;
1554 memset(&ac97, 0, sizeof(ac97));
1555 ac97.private_data = ice;
1556 ac97.private_free = snd_ice1712_mixer_free_ac97;
3d8cb466
AB		 1557 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1558 if (err < 0)
6dfb5aff
TI		 1559 dev_warn(ice->card->dev,
1560 "cannot initialize pro ac97, skipped\n");
1da177e4
LT		 1561 else
1562 return 0;
1563 }
1564 /* I2S mixer only */
1565 strcat(ice->card->mixername, "ICE1712 - multitrack");
1566 return 0;
1567}
1568
1569/*
1570 *
1571 */
1572
6ca308d4 1573static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1574{
1575 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1576}
1577
3d8cb466 1578static void snd_ice1712_proc_read(struct snd_info_entry *entry,
6ca308d4 1579 struct snd_info_buffer *buffer)
1da177e4 1580{
6ca308d4 1581 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1582 unsigned int idx;
1583
1584 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1585 snd_iprintf(buffer, "EEPROM:\n");
1586
1587 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1588 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1589 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1590 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1591 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1592 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1593 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1594 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1595 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1596 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1597 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1598 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1599 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1600 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1601 for (idx = 0; idx < 4; idx++)
1602 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1603 for (idx = 0; idx < 4; idx++)
1604 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1605 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1606 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1607
1608 snd_iprintf(buffer, "\nRegisters:\n");
1609 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1610 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1611 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1612 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
f7004f39 1613 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
3d8cb466 1614 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
f7004f39 1615 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1da177e4
LT		 1616}
1617
e23e7a14 1618static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1da177e4 1619{
6ca308d4 1620 struct snd_info_entry *entry;
1da177e4 1621
3d8cb466 1622 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
bf850204 1623 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1da177e4
LT		 1624}
1625
1626/*
1627 *
1628 */
1629
6ca308d4
TI		 1630static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1632{
1633 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
6ca308d4 1634 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1635 return 0;
1636}
1637
6ca308d4
TI		 1638static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1639 struct snd_ctl_elem_value *ucontrol)
1da177e4 1640{
6ca308d4 1641 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 1642
1da177e4
LT		 1643 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1644 return 0;
1645}
1646
e23e7a14 1647static struct snd_kcontrol_new snd_ice1712_eeprom = {
1da177e4
LT		 1648 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1649 .name = "ICE1712 EEPROM",
1650 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1651 .info = snd_ice1712_eeprom_info,
1652 .get = snd_ice1712_eeprom_get
1653};
1654
1655/*
1656 */
6ca308d4
TI		 1657static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1658 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1659{
1660 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1661 uinfo->count = 1;
1662 return 0;
1663}
1664
6ca308d4
TI		 1665static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1666 struct snd_ctl_elem_value *ucontrol)
1da177e4 1667{
6ca308d4 1668 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1669 if (ice->spdif.ops.default_get)
3d8cb466 1670 ice->spdif.ops.default_get(ice, ucontrol);
1da177e4
LT		 1671 return 0;
1672}
1673
6ca308d4
TI		 1674static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1675 struct snd_ctl_elem_value *ucontrol)
1da177e4 1676{
6ca308d4 1677 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1678 if (ice->spdif.ops.default_put)
1679 return ice->spdif.ops.default_put(ice, ucontrol);
1680 return 0;
1681}
1682
e23e7a14 1683static struct snd_kcontrol_new snd_ice1712_spdif_default =
1da177e4
LT		 1684{
1685 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1686 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1687 .info = snd_ice1712_spdif_info,
1688 .get = snd_ice1712_spdif_default_get,
1689 .put = snd_ice1712_spdif_default_put
1690};
1691
6ca308d4
TI		 1692static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1693 struct snd_ctl_elem_value *ucontrol)
1da177e4 1694{
6ca308d4 1695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1696 if (ice->spdif.ops.default_get) {
1697 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1698 IEC958_AES0_PROFESSIONAL |
1699 IEC958_AES0_CON_NOT_COPYRIGHT |
1700 IEC958_AES0_CON_EMPHASIS;
1701 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1702 IEC958_AES1_CON_CATEGORY;
1703 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1704 } else {
1705 ucontrol->value.iec958.status[0] = 0xff;
1706 ucontrol->value.iec958.status[1] = 0xff;
1707 ucontrol->value.iec958.status[2] = 0xff;
1708 ucontrol->value.iec958.status[3] = 0xff;
1709 ucontrol->value.iec958.status[4] = 0xff;
1710 }
1711 return 0;
1712}
1713
6ca308d4
TI		 1714static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1715 struct snd_ctl_elem_value *ucontrol)
1da177e4 1716{
6ca308d4 1717 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1718 if (ice->spdif.ops.default_get) {
1719 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1720 IEC958_AES0_PROFESSIONAL |
1721 IEC958_AES0_PRO_FS |
1722 IEC958_AES0_PRO_EMPHASIS;
1723 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1724 } else {
1725 ucontrol->value.iec958.status[0] = 0xff;
1726 ucontrol->value.iec958.status[1] = 0xff;
1727 ucontrol->value.iec958.status[2] = 0xff;
1728 ucontrol->value.iec958.status[3] = 0xff;
1729 ucontrol->value.iec958.status[4] = 0xff;
1730 }
1731 return 0;
1732}
1733
e23e7a14 1734static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1da177e4
LT		 1735{
1736 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1737 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1738 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1739 .info = snd_ice1712_spdif_info,
1740 .get = snd_ice1712_spdif_maskc_get,
1741};
1742
e23e7a14 1743static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1da177e4
LT		 1744{
1745 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1746 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1747 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1748 .info = snd_ice1712_spdif_info,
1749 .get = snd_ice1712_spdif_maskp_get,
1750};
1751
6ca308d4
TI		 1752static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_value *ucontrol)
1da177e4 1754{
6ca308d4 1755 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1756 if (ice->spdif.ops.stream_get)
1757 ice->spdif.ops.stream_get(ice, ucontrol);
1758 return 0;
1759}
1760
6ca308d4
TI		 1761static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_value *ucontrol)
1da177e4 1763{
6ca308d4 1764 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1765 if (ice->spdif.ops.stream_put)
1766 return ice->spdif.ops.stream_put(ice, ucontrol);
1767 return 0;
1768}
1769
e23e7a14 1770static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1da177e4 1771{
6ca308d4
TI		 1772 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1773 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1da177e4 1774 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3d8cb466 1775 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1da177e4
LT		 1776 .info = snd_ice1712_spdif_info,
1777 .get = snd_ice1712_spdif_stream_get,
1778 .put = snd_ice1712_spdif_stream_put
1779};
1780
6ca308d4
TI		 1781int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1da177e4 1783{
6ca308d4 1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1785 unsigned char mask = kcontrol->private_value & 0xff;
1786 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
3d8cb466 1787
1da177e4 1788 snd_ice1712_save_gpio_status(ice);
6ca308d4
TI		 1789 ucontrol->value.integer.value[0] =
1790 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1da177e4
LT		 1791 snd_ice1712_restore_gpio_status(ice);
1792 return 0;
1793}
1794
6ca308d4
TI		 1795int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1da177e4 1797{
6ca308d4 1798 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1799 unsigned char mask = kcontrol->private_value & 0xff;
1800 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1801 unsigned int val, nval;
1802
1803 if (kcontrol->private_value & (1 << 31))
1804 return -EPERM;
1805 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1806 snd_ice1712_save_gpio_status(ice);
1807 val = snd_ice1712_gpio_read(ice);
1808 nval |= val & ~mask;
1809 if (val != nval)
1810 snd_ice1712_gpio_write(ice, nval);
1811 snd_ice1712_restore_gpio_status(ice);
1812 return val != nval;
1813}
1814
1815/*
1816 * rate
1817 */
6ca308d4
TI		 1818static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1819 struct snd_ctl_elem_info *uinfo)
1da177e4 1820{
32b47da0 1821 static const char * const texts[] = {
1da177e4
LT		 1822 "8000", /* 0: 6 */
1823 "9600", /* 1: 3 */
1824 "11025", /* 2: 10 */
1825 "12000", /* 3: 2 */
1826 "16000", /* 4: 5 */
1827 "22050", /* 5: 9 */
1828 "24000", /* 6: 1 */
1829 "32000", /* 7: 4 */
1830 "44100", /* 8: 8 */
1831 "48000", /* 9: 0 */
1832 "64000", /* 10: 15 */
1833 "88200", /* 11: 11 */
1834 "96000", /* 12: 7 */
1835 "IEC958 Input", /* 13: -- */
1836 };
c4fa251f 1837 return snd_ctl_enum_info(uinfo, 1, 14, texts);
1da177e4
LT		 1838}
1839
6ca308d4
TI		 1840static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1841 struct snd_ctl_elem_value *ucontrol)
1da177e4 1842{
6ca308d4 1843 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1844 static const unsigned char xlate[16] = {
1da177e4
LT		 1845 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1846 };
1847 unsigned char val;
3d8cb466 1848
1da177e4
LT		 1849 spin_lock_irq(&ice->reg_lock);
1850 if (is_spdif_master(ice)) {
1851 ucontrol->value.enumerated.item[0] = 13;
1852 } else {
1853 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1854 if (val == 255) {
1855 snd_BUG();
1856 val = 0;
1857 }
1858 ucontrol->value.enumerated.item[0] = val;
1859 }
1860 spin_unlock_irq(&ice->reg_lock);
1861 return 0;
1862}
1863
6ca308d4
TI		 1864static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1da177e4 1866{
6ca308d4 1867 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
32b47da0 1868 static const unsigned int xrate[13] = {
fe25befd 1869 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1870 32000, 44100, 48000, 64000, 88200, 96000
1871 };
1872 unsigned char oval;
1873 int change = 0;
1874
1875 spin_lock_irq(&ice->reg_lock);
1876 oval = inb(ICEMT(ice, RATE));
1877 if (ucontrol->value.enumerated.item[0] == 13) {
1878 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1879 } else {
1880 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1881 spin_unlock_irq(&ice->reg_lock);
1882 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1883 spin_lock_irq(&ice->reg_lock);
1884 }
1885 change = inb(ICEMT(ice, RATE)) != oval;
1886 spin_unlock_irq(&ice->reg_lock);
1887
6ca308d4 1888 if ((oval & ICE1712_SPDIF_MASTER) !=
e957ebf1 1889 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
3d8cb466 1890 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1da177e4
LT		 1891
1892 return change;
1893}
1894
e23e7a14 1895static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1da177e4
LT		 1896 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1897 .name = "Multi Track Internal Clock",
1898 .info = snd_ice1712_pro_internal_clock_info,
1899 .get = snd_ice1712_pro_internal_clock_get,
1900 .put = snd_ice1712_pro_internal_clock_put
1901};
1902
6ca308d4
TI		 1903static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1904 struct snd_ctl_elem_info *uinfo)
1da177e4 1905{
32b47da0 1906 static const char * const texts[] = {
1da177e4
LT		 1907 "8000", /* 0: 6 */
1908 "9600", /* 1: 3 */
1909 "11025", /* 2: 10 */
1910 "12000", /* 3: 2 */
1911 "16000", /* 4: 5 */
1912 "22050", /* 5: 9 */
1913 "24000", /* 6: 1 */
1914 "32000", /* 7: 4 */
1915 "44100", /* 8: 8 */
1916 "48000", /* 9: 0 */
1917 "64000", /* 10: 15 */
1918 "88200", /* 11: 11 */
1919 "96000", /* 12: 7 */
3d8cb466 1920 /* "IEC958 Input", 13: -- */
1da177e4 1921 };
c4fa251f 1922 return snd_ctl_enum_info(uinfo, 1, 13, texts);
1da177e4
LT		 1923}
1924
6ca308d4
TI		 1925static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1927{
1928 int val;
32b47da0 1929 static const unsigned int xrate[13] = {
fe25befd 1930 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1931 32000, 44100, 48000, 64000, 88200, 96000
1932 };
1933
1934 for (val = 0; val < 13; val++) {
1935 if (xrate[val] == PRO_RATE_DEFAULT)
1936 break;
1937 }
1938
1939 ucontrol->value.enumerated.item[0] = val;
1940 return 0;
1941}
1942
6ca308d4
TI		 1943static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1944 struct snd_ctl_elem_value *ucontrol)
1da177e4 1945{
32b47da0 1946 static const unsigned int xrate[13] = {
fe25befd 1947 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1da177e4
LT		 1948 32000, 44100, 48000, 64000, 88200, 96000
1949 };
1950 unsigned char oval;
1951 int change = 0;
1952
1953 oval = PRO_RATE_DEFAULT;
1954 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1955 change = PRO_RATE_DEFAULT != oval;
1956
1957 return change;
1958}
1959
e23e7a14 1960static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1da177e4
LT		 1961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1962 .name = "Multi Track Internal Clock Default",
1963 .info = snd_ice1712_pro_internal_clock_default_info,
1964 .get = snd_ice1712_pro_internal_clock_default_get,
1965 .put = snd_ice1712_pro_internal_clock_default_put
1966};
1967
a5ce8890 1968#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1969
6ca308d4
TI		 1970static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1971 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1972{
1973 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1974 return 0;
1975}
1976
6ca308d4
TI		 1977static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1978 struct snd_ctl_elem_value *ucontrol)
1da177e4 1979{
6ca308d4 1980 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1981 int change = 0, nval;
1982
1983 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1984 spin_lock_irq(&ice->reg_lock);
1985 change = PRO_RATE_LOCKED != nval;
1986 PRO_RATE_LOCKED = nval;
1987 spin_unlock_irq(&ice->reg_lock);
1988 return change;
1989}
1990
e23e7a14 1991static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1da177e4
LT		 1992 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1993 .name = "Multi Track Rate Locking",
1994 .info = snd_ice1712_pro_rate_locking_info,
1995 .get = snd_ice1712_pro_rate_locking_get,
1996 .put = snd_ice1712_pro_rate_locking_put
1997};
1998
a5ce8890 1999#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 2000
6ca308d4
TI		 2001static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2002 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 2003{
2004 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2005 return 0;
2006}
2007
6ca308d4
TI		 2008static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2009 struct snd_ctl_elem_value *ucontrol)
1da177e4 2010{
6ca308d4 2011 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2012 int change = 0, nval;
2013
2014 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2015 spin_lock_irq(&ice->reg_lock);
2016 change = PRO_RATE_RESET != nval;
2017 PRO_RATE_RESET = nval;
2018 spin_unlock_irq(&ice->reg_lock);
2019 return change;
2020}
2021
e23e7a14 2022static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
1da177e4
LT		 2023 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2024 .name = "Multi Track Rate Reset",
2025 .info = snd_ice1712_pro_rate_reset_info,
2026 .get = snd_ice1712_pro_rate_reset_get,
2027 .put = snd_ice1712_pro_rate_reset_put
2028};
2029
2030/*
2031 * routing
2032 */
6ca308d4
TI		 2033static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2034 struct snd_ctl_elem_info *uinfo)
1da177e4 2035{
32b47da0 2036 static const char * const texts[] = {
1da177e4
LT		 2037 "PCM Out", /* 0 */
2038 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2039 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2040 "IEC958 In L", "IEC958 In R", /* 9-10 */
2041 "Digital Mixer", /* 11 - optional */
2042 };
c4fa251f
TI		 2043 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2044 return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1da177e4
LT		 2045}
2046
6ca308d4
TI		 2047static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2048 struct snd_ctl_elem_value *ucontrol)
1da177e4 2049{
6ca308d4 2050 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2051 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2052 unsigned int val, cval;
2053
2054 spin_lock_irq(&ice->reg_lock);
2055 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2056 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2057 spin_unlock_irq(&ice->reg_lock);
2058
2059 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2060 val &= 3;
2061 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2062 if (val == 1 && idx < 2)
2063 ucontrol->value.enumerated.item[0] = 11;
2064 else if (val == 2)
2065 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2066 else if (val == 3)
2067 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2068 else
2069 ucontrol->value.enumerated.item[0] = 0;
2070 return 0;
2071}
2072
6ca308d4
TI		 2073static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2074 struct snd_ctl_elem_value *ucontrol)
1da177e4 2075{
6ca308d4 2076 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2077 int change, shift;
2078 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2079 unsigned int val, old_val, nval;
3d8cb466 2080
1da177e4
LT		 2081 /* update PSDOUT */
2082 if (ucontrol->value.enumerated.item[0] >= 11)
2083 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2084 else if (ucontrol->value.enumerated.item[0] >= 9)
2085 nval = 3; /* spdif in */
2086 else if (ucontrol->value.enumerated.item[0] >= 1)
2087 nval = 2; /* analog in */
2088 else
2089 nval = 0; /* pcm */
2090 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2091 spin_lock_irq(&ice->reg_lock);
2092 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2093 val &= ~(0x03 << shift);
2094 val |= nval << shift;
2095 change = val != old_val;
2096 if (change)
2097 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2098 spin_unlock_irq(&ice->reg_lock);
2099 if (nval < 2) /* dig mixer of pcm */
2100 return change;
2101
2102 /* update CAPTURE */
2103 spin_lock_irq(&ice->reg_lock);
2104 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2105 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2106 if (nval == 2) { /* analog in */
2107 nval = ucontrol->value.enumerated.item[0] - 1;
2108 val &= ~(0x07 << shift);
2109 val |= nval << shift;
2110 } else { /* spdif in */
2111 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2112 val &= ~(0x08 << shift);
2113 val |= nval << shift;
2114 }
2115 if (val != old_val) {
2116 change = 1;
2117 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2118 }
2119 spin_unlock_irq(&ice->reg_lock);
2120 return change;
2121}
2122
6ca308d4
TI		 2123static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2124 struct snd_ctl_elem_value *ucontrol)
1da177e4 2125{
6ca308d4 2126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2127 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2128 unsigned int val, cval;
2129 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2130 cval = (val >> (idx * 4 + 8)) & 0x0f;
2131 val = (val >> (idx * 2)) & 0x03;
2132 if (val == 1)
2133 ucontrol->value.enumerated.item[0] = 11;
2134 else if (val == 2)
2135 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2136 else if (val == 3)
2137 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2138 else
2139 ucontrol->value.enumerated.item[0] = 0;
2140 return 0;
2141}
2142
6ca308d4
TI		 2143static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2144 struct snd_ctl_elem_value *ucontrol)
1da177e4 2145{
6ca308d4 2146 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2147 int change, shift;
2148 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2149 unsigned int val, old_val, nval;
3d8cb466 2150
1da177e4
LT		 2151 /* update SPDOUT */
2152 spin_lock_irq(&ice->reg_lock);
2153 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2154 if (ucontrol->value.enumerated.item[0] >= 11)
2155 nval = 1;
2156 else if (ucontrol->value.enumerated.item[0] >= 9)
2157 nval = 3;
2158 else if (ucontrol->value.enumerated.item[0] >= 1)
2159 nval = 2;
2160 else
2161 nval = 0;
2162 shift = idx * 2;
2163 val &= ~(0x03 << shift);
2164 val |= nval << shift;
2165 shift = idx * 4 + 8;
2166 if (nval == 2) {
2167 nval = ucontrol->value.enumerated.item[0] - 1;
2168 val &= ~(0x07 << shift);
2169 val |= nval << shift;
2170 } else if (nval == 3) {
2171 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2172 val &= ~(0x08 << shift);
2173 val |= nval << shift;
2174 }
2175 change = val != old_val;
2176 if (change)
2177 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2178 spin_unlock_irq(&ice->reg_lock);
2179 return change;
2180}
2181
e23e7a14 2182static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
1da177e4
LT		 2183 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2184 .name = "H/W Playback Route",
2185 .info = snd_ice1712_pro_route_info,
2186 .get = snd_ice1712_pro_route_analog_get,
2187 .put = snd_ice1712_pro_route_analog_put,
2188};
2189
e23e7a14 2190static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
1da177e4 2191 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3d8cb466 2192 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2193 .info = snd_ice1712_pro_route_info,
2194 .get = snd_ice1712_pro_route_spdif_get,
2195 .put = snd_ice1712_pro_route_spdif_put,
2196 .count = 2,
2197};
2198
2199
6ca308d4
TI		 2200static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2201 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2202{
2203 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2204 uinfo->count = 1;
2205 uinfo->value.integer.min = 0;
2206 uinfo->value.integer.max = 255;
2207 return 0;
2208}
2209
6ca308d4
TI		 2210static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2211 struct snd_ctl_elem_value *ucontrol)
1da177e4 2212{
6ca308d4 2213 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
3d8cb466 2214
1da177e4
LT		 2215 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2216 return 0;
2217}
2218
6ca308d4
TI		 2219static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2220 struct snd_ctl_elem_value *ucontrol)
1da177e4 2221{
6ca308d4 2222 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2223 int change;
2224
2225 spin_lock_irq(&ice->reg_lock);
2226 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2227 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2228 spin_unlock_irq(&ice->reg_lock);
2229 return change;
2230}
2231
e23e7a14 2232static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
1da177e4
LT		 2233 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2234 .name = "Multi Track Volume Rate",
2235 .info = snd_ice1712_pro_volume_rate_info,
2236 .get = snd_ice1712_pro_volume_rate_get,
2237 .put = snd_ice1712_pro_volume_rate_put
2238};
2239
6ca308d4
TI		 2240static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2241 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2242{
2243 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2244 uinfo->count = 22;
2245 uinfo->value.integer.min = 0;
2246 uinfo->value.integer.max = 255;
2247 return 0;
2248}
2249
6ca308d4
TI		 2250static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2251 struct snd_ctl_elem_value *ucontrol)
1da177e4 2252{
6ca308d4 2253 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2254 int idx;
3d8cb466 2255
1da177e4
LT		 2256 spin_lock_irq(&ice->reg_lock);
2257 for (idx = 0; idx < 22; idx++) {
2258 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2259 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2260 }
2261 spin_unlock_irq(&ice->reg_lock);
2262 return 0;
2263}
2264
e23e7a14 2265static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2bdf6633 2266 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 2267 .name = "Multi Track Peak",
2268 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2269 .info = snd_ice1712_pro_peak_info,
2270 .get = snd_ice1712_pro_peak_get
2271};
2272
2273/*
2274 *
2275 */
2276
2277/*
2278 * list of available boards
2279 */
e23e7a14 2280static struct snd_ice1712_card_info *card_tables[] = {
1da177e4
LT		 2281 snd_ice1712_hoontech_cards,
2282 snd_ice1712_delta_cards,
2283 snd_ice1712_ews_cards,
2284 NULL,
2285};
2286
e23e7a14
BP		 2287static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2288 unsigned char dev,
2289 unsigned char addr)
1da177e4
LT		 2290{
2291 long t = 0x10000;
2292
2293 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2294 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2295 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2296 return inb(ICEREG(ice, I2C_DATA));
2297}
2298
e23e7a14
BP		 2299static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2300 const char *modelname)
1da177e4
LT		 2301{
2302 int dev = 0xa0; /* EEPROM device address */
2303 unsigned int i, size;
bf748ed7 2304 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2305
3d8cb466 2306 if (!modelname || !*modelname) {
1da177e4
LT		 2307 ice->eeprom.subvendor = 0;
2308 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2309 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
3d8cb466
AB		 2310 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2311 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2312 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
6ca308d4
TI		 2313 if (ice->eeprom.subvendor == 0 ||
2314 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2315 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2316 u16 vendor, device;
2317 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2318 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2319 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2320 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
6dfb5aff
TI		 2321 dev_err(ice->card->dev,
2322 "No valid ID is found\n");
1da177e4
LT		 2323 return -ENXIO;
2324 }
2325 }
2326 }
2327 for (tbl = card_tables; *tbl; tbl++) {
2328 for (c = *tbl; c->subvendor; c++) {
3d8cb466 2329 if (modelname && c->model && !strcmp(modelname, c->model)) {
6dfb5aff
TI		 2330 dev_info(ice->card->dev,
2331 "Using board model %s\n", c->name);
1da177e4
LT		 2332 ice->eeprom.subvendor = c->subvendor;
2333 } else if (c->subvendor != ice->eeprom.subvendor)
2334 continue;
3d8cb466 2335 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2336 goto found;
2337 /* if the EEPROM is given by the driver, use it */
6dfb5aff 2338 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
1da177e4
LT		 2339 ice->eeprom.version = 1;
2340 ice->eeprom.size = c->eeprom_size + 6;
2341 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2342 goto read_skipped;
2343 }
2344 }
6dfb5aff 2345 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
6ca308d4 2346 ice->eeprom.subvendor);
1da177e4
LT		 2347
2348 found:
2349 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2350 if (ice->eeprom.size < 6)
2351 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2352 else if (ice->eeprom.size > 32) {
6dfb5aff
TI		 2353 dev_err(ice->card->dev,
2354 "invalid EEPROM (size = %i)\n", ice->eeprom.size);
1da177e4
LT		 2355 return -EIO;
2356 }
2357 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2358 if (ice->eeprom.version != 1) {
6dfb5aff 2359 dev_err(ice->card->dev, "invalid EEPROM version %i\n",
6ca308d4 2360 ice->eeprom.version);
1da177e4
LT		 2361 /* return -EIO; */
2362 }
2363 size = ice->eeprom.size - 6;
2364 for (i = 0; i < size; i++)
2365 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2366
2367 read_skipped:
2368 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2369 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2370 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2371
2372 return 0;
2373}
2374
2375
2376
e23e7a14 2377static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2378{
2379 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2380 udelay(200);
2381 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2382 udelay(200);
721b8a29
AH		 2383 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2384 !ice->dxr_enable)
2385 /* Set eeprom value to limit active ADCs and DACs to 6;
2386 * Also disable AC97 as no hardware in standard 6fire card/box
2387 * Note: DXR extensions are not currently supported
2388 */
2389 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2390 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
1da177e4
LT		 2391 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2392 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2393 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2394 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2395 ice->gpio.write_mask = ice->eeprom.gpiomask;
2396 ice->gpio.direction = ice->eeprom.gpiodir;
6ca308d4
TI		 2397 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2398 ice->eeprom.gpiomask);
2399 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2400 ice->eeprom.gpiodir);
2401 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2402 ice->eeprom.gpiostate);
1da177e4
LT		 2403 } else {
2404 ice->gpio.write_mask = 0xc0;
2405 ice->gpio.direction = 0xff;
2406 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2407 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
6ca308d4
TI		 2408 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2409 ICE1712_STDSP24_CLOCK_BIT);
1da177e4
LT		 2410 }
2411 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2412 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2413 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2414 udelay(100);
2415 outb(0, ICEREG(ice, AC97_CMD));
2416 udelay(200);
2417 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2418 }
2419 snd_ice1712_set_pro_rate(ice, 48000, 1);
ca051e8a
OZ		 2420 /* unmask used interrupts */
2421 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2422 ICE1712_IRQ_MPU2 : 0) |
2423 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2424 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2425 ICEREG(ice, IRQMASK));
2426 outb(0x00, ICEMT(ice, IRQ));
1da177e4
LT		 2427
2428 return 0;
2429}
2430
e23e7a14 2431int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2432{
2433 int err;
6ca308d4 2434 struct snd_kcontrol *kctl;
1da177e4 2435
da3cec35
TI		 2436 if (snd_BUG_ON(!ice->pcm_pro))
2437 return -EIO;
1da177e4
LT		 2438 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2439 if (err < 0)
2440 return err;
2441 kctl->id.device = ice->pcm_pro->device;
2442 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2443 if (err < 0)
2444 return err;
2445 kctl->id.device = ice->pcm_pro->device;
2446 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2447 if (err < 0)
2448 return err;
2449 kctl->id.device = ice->pcm_pro->device;
2450 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2451 if (err < 0)
2452 return err;
2453 kctl->id.device = ice->pcm_pro->device;
2454 ice->spdif.stream_ctl = kctl;
2455 return 0;
2456}
2457
2458
e23e7a14 2459static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2460{
2461 int err;
2462
2463 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2464 if (err < 0)
2465 return err;
2466 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2467 if (err < 0)
2468 return err;
2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2470 if (err < 0)
2471 return err;
2472
2473 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2474 if (err < 0)
2475 return err;
2476 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2477 if (err < 0)
2478 return err;
2479
2480 if (ice->num_total_dacs > 0) {
6ca308d4 2481 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
1da177e4
LT		 2482 tmp.count = ice->num_total_dacs;
2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2484 if (err < 0)
2485 return err;
2486 }
2487
2488 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2489 if (err < 0)
2490 return err;
2491
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2493 if (err < 0)
2494 return err;
387417b5
SM		 2495 return snd_ctl_add(ice->card,
2496 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
1da177e4
LT		 2497}
2498
6ca308d4 2499static int snd_ice1712_free(struct snd_ice1712 *ice)
1da177e4 2500{
3d8cb466 2501 if (!ice->port)
1da177e4
LT		 2502 goto __hw_end;
2503 /* mask all interrupts */
890b13a3 2504 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
1da177e4
LT		 2505 outb(0xff, ICEREG(ice, IRQMASK));
2506 /* --- */
3d8cb466 2507__hw_end:
f000fd80 2508 if (ice->irq >= 0)
6ca308d4 2509 free_irq(ice->irq, ice);
f000fd80 2510
1da177e4
LT		 2511 if (ice->port)
2512 pci_release_regions(ice->pci);
2513 snd_ice1712_akm4xxx_free(ice);
2514 pci_disable_device(ice->pci);
7cda8ba9 2515 kfree(ice->spec);
1da177e4
LT		 2516 kfree(ice);
2517 return 0;
2518}
2519
6ca308d4 2520static int snd_ice1712_dev_free(struct snd_device *device)
1da177e4 2521{
6ca308d4 2522 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2523 return snd_ice1712_free(ice);
2524}
2525
e23e7a14
BP		 2526static int snd_ice1712_create(struct snd_card *card,
2527 struct pci_dev *pci,
2528 const char *modelname,
2529 int omni,
2530 int cs8427_timeout,
2531 int dxr_enable,
2532 struct snd_ice1712 **r_ice1712)
1da177e4 2533{
6ca308d4 2534 struct snd_ice1712 *ice;
1da177e4 2535 int err;
6ca308d4 2536 static struct snd_device_ops ops = {
1da177e4
LT		 2537 .dev_free = snd_ice1712_dev_free,
2538 };
2539
2540 *r_ice1712 = NULL;
2541
3d8cb466
AB		 2542 /* enable PCI device */
2543 err = pci_enable_device(pci);
2544 if (err < 0)
1da177e4
LT		 2545 return err;
2546 /* check, if we can restrict PCI DMA transfers to 28 bits */
ce0b6201
YH		 2547 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2548 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
6dfb5aff
TI		 2549 dev_err(card->dev,
2550 "architecture does not support 28bit PCI busmaster DMA\n");
1da177e4
LT		 2551 pci_disable_device(pci);
2552 return -ENXIO;
2553 }
2554
e560d8d8 2555 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2556 if (ice == NULL) {
2557 pci_disable_device(pci);
2558 return -ENOMEM;
2559 }
2560 ice->omni = omni ? 1 : 0;
2561 if (cs8427_timeout < 1)
2562 cs8427_timeout = 1;
2563 else if (cs8427_timeout > 1000)
2564 cs8427_timeout = 1000;
2565 ice->cs8427_timeout = cs8427_timeout;
531af462 2566 ice->dxr_enable = dxr_enable;
1da177e4 2567 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2568 mutex_init(&ice->gpio_mutex);
2569 mutex_init(&ice->i2c_mutex);
2570 mutex_init(&ice->open_mutex);
1da177e4 2571 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
49470306 2572 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
1da177e4 2573 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
49470306 2574 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
1da177e4
LT		 2575 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2576 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2577
2578 ice->spdif.cs8403_bits =
2579 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2580 0x10 | /* no emphasis */
2581 0x20); /* PCM encoder/decoder */
2582 ice->card = card;
2583 ice->pci = pci;
2584 ice->irq = -1;
2585 pci_set_master(pci);
ca051e8a 2586 /* disable legacy emulation */
1da177e4
LT		 2587 pci_write_config_word(ice->pci, 0x40, 0x807f);
2588 pci_write_config_word(ice->pci, 0x42, 0x0006);
2589 snd_ice1712_proc_init(ice);
2590 synchronize_irq(pci->irq);
2591
69a4cfdd
SC		 2592 card->private_data = ice;
2593
3d8cb466
AB		 2594 err = pci_request_regions(pci, "ICE1712");
2595 if (err < 0) {
1da177e4
LT		 2596 kfree(ice);
2597 pci_disable_device(pci);
2598 return err;
2599 }
2600 ice->port = pci_resource_start(pci, 0);
2601 ice->ddma_port = pci_resource_start(pci, 1);
2602 ice->dmapath_port = pci_resource_start(pci, 2);
2603 ice->profi_port = pci_resource_start(pci, 3);
2604
437a5a46 2605 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
934c2b6d 2606 KBUILD_MODNAME, ice)) {
6dfb5aff 2607 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2608 snd_ice1712_free(ice);
2609 return -EIO;
2610 }
3d8cb466 2611
1da177e4
LT		 2612 ice->irq = pci->irq;
2613
2614 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2615 snd_ice1712_free(ice);
2616 return -EIO;
2617 }
2618 if (snd_ice1712_chip_init(ice) < 0) {
2619 snd_ice1712_free(ice);
2620 return -EIO;
2621 }
2622
3d8cb466
AB		 2623 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2624 if (err < 0) {
1da177e4 2625 snd_ice1712_free(ice);
3d8cb466 2626 return err;
1da177e4
LT		 2627 }
2628
1da177e4
LT		 2629 *r_ice1712 = ice;
2630 return 0;
2631}
2632
2633
2634/*
2635 *
2636 * Registration
2637 *
2638 */
2639
e23e7a14 2640static struct snd_ice1712_card_info no_matched;
1da177e4 2641
e23e7a14
BP		 2642static int snd_ice1712_probe(struct pci_dev *pci,
2643 const struct pci_device_id *pci_id)
1da177e4
LT		 2644{
2645 static int dev;
6ca308d4
TI		 2646 struct snd_card *card;
2647 struct snd_ice1712 *ice;
1da177e4 2648 int pcm_dev = 0, err;
bf748ed7 2649 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2650
2651 if (dev >= SNDRV_CARDS)
2652 return -ENODEV;
2653 if (!enable[dev]) {
2654 dev++;
2655 return -ENOENT;
2656 }
2657
60c5772b
TI		 2658 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2659 0, &card);
e58de7ba
TI		 2660 if (err < 0)
2661 return err;
1da177e4
LT		 2662
2663 strcpy(card->driver, "ICE1712");
2664 strcpy(card->shortname, "ICEnsemble ICE1712");
3d8cb466
AB		 2665
2666 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2667 cs8427_timeout[dev], dxr_enable[dev], &ice);
2668 if (err < 0) {
1da177e4
LT		 2669 snd_card_free(card);
2670 return err;
2671 }
2672
2673 for (tbl = card_tables; *tbl; tbl++) {
2674 for (c = *tbl; c->subvendor; c++) {
2675 if (c->subvendor == ice->eeprom.subvendor) {
267bccaf 2676 ice->card_info = c;
1da177e4
LT		 2677 strcpy(card->shortname, c->name);
2678 if (c->driver) /* specific driver? */
2679 strcpy(card->driver, c->driver);
2680 if (c->chip_init) {
3d8cb466
AB		 2681 err = c->chip_init(ice);
2682 if (err < 0) {
1da177e4
LT		 2683 snd_card_free(card);
2684 return err;
2685 }
2686 }
2687 goto __found;
2688 }
2689 }
2690 }
2691 c = &no_matched;
2692 __found:
2693
3d8cb466
AB		 2694 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2695 if (err < 0) {
1da177e4
LT		 2696 snd_card_free(card);
2697 return err;
2698 }
3d8cb466 2699
8cd2b264 2700 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2701 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2702 if (err < 0) {
1da177e4
LT		 2703 snd_card_free(card);
2704 return err;
2705 }
8cd2b264 2706 }
1da177e4 2707
3d8cb466
AB		 2708 err = snd_ice1712_ac97_mixer(ice);
2709 if (err < 0) {
1da177e4
LT		 2710 snd_card_free(card);
2711 return err;
2712 }
2713
3d8cb466
AB		 2714 err = snd_ice1712_build_controls(ice);
2715 if (err < 0) {
1da177e4
LT		 2716 snd_card_free(card);
2717 return err;
2718 }
2719
2720 if (c->build_controls) {
3d8cb466
AB		 2721 err = c->build_controls(ice);
2722 if (err < 0) {
1da177e4
LT		 2723 snd_card_free(card);
2724 return err;
2725 }
2726 }
2727
8cd2b264 2728 if (ice_has_con_ac97(ice)) {
3d8cb466
AB		 2729 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2730 if (err < 0) {
1da177e4
LT		 2731 snd_card_free(card);
2732 return err;
2733 }
8cd2b264 2734 }
1da177e4 2735
3d8cb466
AB		 2736 if (!c->no_mpu401) {
2737 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2738 ICEREG(ice, MPU1_CTRL),
dba8b469
CL		 2739 c->mpu401_1_info_flags |
2740 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2741 -1, &ice->rmidi[0]);
3d8cb466 2742 if (err < 0) {
1da177e4
LT		 2743 snd_card_free(card);
2744 return err;
2745 }
3bef229e 2746 if (c->mpu401_1_name)
25985edc 2747 /* Preferred name available in card_info */
3bef229e
AH		 2748 snprintf(ice->rmidi[0]->name,
2749 sizeof(ice->rmidi[0]->name),
2750 "%s %d", c->mpu401_1_name, card->number);
2751
2752 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2753 /* 2nd port used */
3d8cb466
AB		 2754 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2755 ICEREG(ice, MPU2_CTRL),
dba8b469
CL		 2756 c->mpu401_2_info_flags |
2757 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2758 -1, &ice->rmidi[1]);
3d8cb466
AB		 2759
2760 if (err < 0) {
1da177e4
LT		 2761 snd_card_free(card);
2762 return err;
2763 }
3bef229e 2764 if (c->mpu401_2_name)
25985edc 2765 /* Preferred name available in card_info */
3bef229e
AH		 2766 snprintf(ice->rmidi[1]->name,
2767 sizeof(ice->rmidi[1]->name),
2768 "%s %d", c->mpu401_2_name,
2769 card->number);
2770 }
1da177e4
LT		 2771 }
2772
e957ebf1
JK		 2773 snd_ice1712_set_input_clock_source(ice, 0);
2774
1da177e4
LT		 2775 sprintf(card->longname, "%s at 0x%lx, irq %i",
2776 card->shortname, ice->port, ice->irq);
2777
3d8cb466
AB		 2778 err = snd_card_register(card);
2779 if (err < 0) {
1da177e4
LT		 2780 snd_card_free(card);
2781 return err;
2782 }
2783 pci_set_drvdata(pci, card);
2784 dev++;
2785 return 0;
2786}
2787
e23e7a14 2788static void snd_ice1712_remove(struct pci_dev *pci)
1da177e4 2789{
267bccaf
OZ		 2790 struct snd_card *card = pci_get_drvdata(pci);
2791 struct snd_ice1712 *ice = card->private_data;
2792
2793 if (ice->card_info && ice->card_info->chip_exit)
2794 ice->card_info->chip_exit(ice);
2795 snd_card_free(card);
1da177e4
LT		 2796}
2797
ca051e8a
OZ		 2798#ifdef CONFIG_PM_SLEEP
2799static int snd_ice1712_suspend(struct device *dev)
2800{
2801 struct pci_dev *pci = to_pci_dev(dev);
2802 struct snd_card *card = dev_get_drvdata(dev);
2803 struct snd_ice1712 *ice = card->private_data;
2804
2805 if (!ice->pm_suspend_enabled)
2806 return 0;
2807
2808 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2809
2810 snd_pcm_suspend_all(ice->pcm);
2811 snd_pcm_suspend_all(ice->pcm_pro);
2812 snd_pcm_suspend_all(ice->pcm_ds);
2813 snd_ac97_suspend(ice->ac97);
2814
6ea0cae7
OZ		 2815 spin_lock_irq(&ice->reg_lock);
2816 ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2817 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2818 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2819 spin_unlock_irq(&ice->reg_lock);
2820
ca051e8a
OZ		 2821 if (ice->pm_suspend)
2822 ice->pm_suspend(ice);
2823
2824 pci_disable_device(pci);
2825 pci_save_state(pci);
2826 pci_set_power_state(pci, PCI_D3hot);
2827 return 0;
2828}
2829
2830static int snd_ice1712_resume(struct device *dev)
2831{
2832 struct pci_dev *pci = to_pci_dev(dev);
2833 struct snd_card *card = dev_get_drvdata(dev);
2834 struct snd_ice1712 *ice = card->private_data;
6ea0cae7 2835 int rate;
ca051e8a
OZ		 2836
2837 if (!ice->pm_suspend_enabled)
2838 return 0;
2839
2840 pci_set_power_state(pci, PCI_D0);
2841 pci_restore_state(pci);
2842
2843 if (pci_enable_device(pci) < 0) {
2844 snd_card_disconnect(card);
2845 return -EIO;
2846 }
2847
2848 pci_set_master(pci);
2849
6ea0cae7
OZ		 2850 if (ice->cur_rate)
2851 rate = ice->cur_rate;
2852 else
2853 rate = PRO_RATE_DEFAULT;
2854
ca051e8a
OZ		 2855 if (snd_ice1712_chip_init(ice) < 0) {
2856 snd_card_disconnect(card);
2857 return -EIO;
2858 }
2859
6ea0cae7
OZ		 2860 ice->cur_rate = rate;
2861
ca051e8a
OZ		 2862 if (ice->pm_resume)
2863 ice->pm_resume(ice);
2864
6ea0cae7
OZ		 2865 if (ice->pm_saved_is_spdif_master) {
2866 /* switching to external clock via SPDIF */
2867 spin_lock_irq(&ice->reg_lock);
2868 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2869 ICEMT(ice, RATE));
2870 spin_unlock_irq(&ice->reg_lock);
2871 snd_ice1712_set_input_clock_source(ice, 1);
2872 } else {
2873 /* internal on-card clock */
2874 snd_ice1712_set_pro_rate(ice, rate, 1);
2875 snd_ice1712_set_input_clock_source(ice, 0);
2876 }
2877
2878 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2879 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2880
ca051e8a
OZ		 2881 if (ice->ac97)
2882 snd_ac97_resume(ice->ac97);
2883
2884 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2885 return 0;
2886}
2887
2888static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2889#define SND_VT1712_PM_OPS &snd_ice1712_pm
2890#else
2891#define SND_VT1712_PM_OPS NULL
2892#endif /* CONFIG_PM_SLEEP */
2893
e9f66d9b 2894static struct pci_driver ice1712_driver = {
3733e424 2895 .name = KBUILD_MODNAME,
1da177e4
LT		 2896 .id_table = snd_ice1712_ids,
2897 .probe = snd_ice1712_probe,
e23e7a14 2898 .remove = snd_ice1712_remove,
ca051e8a
OZ		 2899 .driver = {
2900 .pm = SND_VT1712_PM_OPS,
2901 },
1da177e4
LT		 2902};
2903
e9f66d9b 2904module_pci_driver(ice1712_driver);
Linux kernel - Deliverables
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