Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) | |
3 | * VIA VT1720 (Envy24PT) | |
4 | * | |
c1017a4c | 5 | * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
6 | * 2002 James Stafford <jstafford@ampltd.com> |
7 | * 2003 Takashi Iwai <tiwai@suse.de> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
1de9fdc2 | 23 | */ |
1da177e4 | 24 | |
1de9fdc2 | 25 | #include <linux/io.h> |
1da177e4 LT |
26 | #include <linux/delay.h> |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/moduleparam.h> | |
62932df8 | 32 | #include <linux/mutex.h> |
1da177e4 LT |
33 | #include <sound/core.h> |
34 | #include <sound/info.h> | |
aea3bfbc | 35 | #include <sound/rawmidi.h> |
1da177e4 LT |
36 | #include <sound/initval.h> |
37 | ||
38 | #include <sound/asoundef.h> | |
39 | ||
40 | #include "ice1712.h" | |
41 | #include "envy24ht.h" | |
42 | ||
43 | /* lowlevel routines */ | |
44 | #include "amp.h" | |
45 | #include "revo.h" | |
46 | #include "aureon.h" | |
47 | #include "vt1720_mobo.h" | |
48 | #include "pontis.h" | |
49 | #include "prodigy192.h" | |
6b8d6e55 | 50 | #include "prodigy_hifi.h" |
1da177e4 LT |
51 | #include "juli.h" |
52 | #include "phase.h" | |
f6cdab5f | 53 | #include "wtm.h" |
f31639b8 | 54 | #include "se.h" |
1da177e4 | 55 | |
c1017a4c | 56 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
57 | MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); |
58 | MODULE_LICENSE("GPL"); | |
59 | MODULE_SUPPORTED_DEVICE("{" | |
60 | REVO_DEVICE_DESC | |
61 | AMP_AUDIO2000_DEVICE_DESC | |
62 | AUREON_DEVICE_DESC | |
63 | VT1720_MOBO_DEVICE_DESC | |
64 | PONTIS_DEVICE_DESC | |
65 | PRODIGY192_DEVICE_DESC | |
6b8d6e55 | 66 | PRODIGY_HIFI_DEVICE_DESC |
1da177e4 LT |
67 | JULI_DEVICE_DESC |
68 | PHASE_DEVICE_DESC | |
f6cdab5f | 69 | WTM_DEVICE_DESC |
f31639b8 | 70 | SE_DEVICE_DESC |
1da177e4 LT |
71 | "{VIA,VT1720}," |
72 | "{VIA,VT1724}," | |
73 | "{ICEnsemble,Generic ICE1724}," | |
74 | "{ICEnsemble,Generic Envy24HT}" | |
75 | "{ICEnsemble,Generic Envy24PT}}"); | |
76 | ||
77 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
78 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
79 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
80 | static char *model[SNDRV_CARDS]; | |
81 | ||
82 | module_param_array(index, int, NULL, 0444); | |
83 | MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); | |
84 | module_param_array(id, charp, NULL, 0444); | |
85 | MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); | |
86 | module_param_array(enable, bool, NULL, 0444); | |
87 | MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); | |
88 | module_param_array(model, charp, NULL, 0444); | |
89 | MODULE_PARM_DESC(model, "Use the given board model."); | |
90 | ||
1da177e4 LT |
91 | |
92 | /* Both VT1720 and VT1724 have the same PCI IDs */ | |
32b47da0 | 93 | static const struct pci_device_id snd_vt1724_ids[] = { |
1da177e4 LT |
94 | { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
95 | { 0, } | |
96 | }; | |
97 | ||
98 | MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); | |
99 | ||
100 | ||
101 | static int PRO_RATE_LOCKED; | |
102 | static int PRO_RATE_RESET = 1; | |
103 | static unsigned int PRO_RATE_DEFAULT = 44100; | |
104 | ||
105 | /* | |
106 | * Basic I/O | |
107 | */ | |
1de9fdc2 | 108 | |
d16be8ed PH |
109 | /* |
110 | * default rates, default clock routines | |
111 | */ | |
112 | ||
1da177e4 | 113 | /* check whether the clock mode is spdif-in */ |
d16be8ed | 114 | static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) |
1da177e4 LT |
115 | { |
116 | return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; | |
117 | } | |
118 | ||
ab0c7d72 | 119 | static inline int is_pro_rate_locked(struct snd_ice1712 *ice) |
1da177e4 | 120 | { |
d16be8ed | 121 | return ice->is_spdif_master(ice) || PRO_RATE_LOCKED; |
1da177e4 LT |
122 | } |
123 | ||
124 | /* | |
125 | * ac97 section | |
126 | */ | |
127 | ||
ab0c7d72 | 128 | static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) |
1da177e4 LT |
129 | { |
130 | unsigned char old_cmd; | |
131 | int tm; | |
132 | for (tm = 0; tm < 0x10000; tm++) { | |
133 | old_cmd = inb(ICEMT1724(ice, AC97_CMD)); | |
134 | if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) | |
135 | continue; | |
136 | if (!(old_cmd & VT1724_AC97_READY)) | |
137 | continue; | |
138 | return old_cmd; | |
139 | } | |
140 | snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n"); | |
141 | return old_cmd; | |
142 | } | |
143 | ||
ab0c7d72 | 144 | static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) |
1da177e4 LT |
145 | { |
146 | int tm; | |
147 | for (tm = 0; tm < 0x10000; tm++) | |
148 | if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) | |
149 | return 0; | |
150 | snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n"); | |
151 | return -EIO; | |
152 | } | |
153 | ||
ab0c7d72 | 154 | static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, |
1da177e4 LT |
155 | unsigned short reg, |
156 | unsigned short val) | |
157 | { | |
ab0c7d72 | 158 | struct snd_ice1712 *ice = ac97->private_data; |
1da177e4 LT |
159 | unsigned char old_cmd; |
160 | ||
161 | old_cmd = snd_vt1724_ac97_ready(ice); | |
162 | old_cmd &= ~VT1724_AC97_ID_MASK; | |
163 | old_cmd |= ac97->num; | |
164 | outb(reg, ICEMT1724(ice, AC97_INDEX)); | |
165 | outw(val, ICEMT1724(ice, AC97_DATA)); | |
166 | outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); | |
167 | snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); | |
168 | } | |
169 | ||
ab0c7d72 | 170 | static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 171 | { |
ab0c7d72 | 172 | struct snd_ice1712 *ice = ac97->private_data; |
1da177e4 LT |
173 | unsigned char old_cmd; |
174 | ||
175 | old_cmd = snd_vt1724_ac97_ready(ice); | |
176 | old_cmd &= ~VT1724_AC97_ID_MASK; | |
177 | old_cmd |= ac97->num; | |
178 | outb(reg, ICEMT1724(ice, AC97_INDEX)); | |
179 | outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); | |
180 | if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) | |
181 | return ~0; | |
182 | return inw(ICEMT1724(ice, AC97_DATA)); | |
183 | } | |
184 | ||
185 | ||
186 | /* | |
187 | * GPIO operations | |
188 | */ | |
189 | ||
190 | /* set gpio direction 0 = read, 1 = write */ | |
ab0c7d72 | 191 | static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
192 | { |
193 | outl(data, ICEREG1724(ice, GPIO_DIRECTION)); | |
194 | inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ | |
195 | } | |
196 | ||
197 | /* set the gpio mask (0 = writable) */ | |
ab0c7d72 | 198 | static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
199 | { |
200 | outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); | |
1de9fdc2 | 201 | if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ |
1da177e4 LT |
202 | outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); |
203 | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ | |
204 | } | |
205 | ||
ab0c7d72 | 206 | static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
207 | { |
208 | outw(data, ICEREG1724(ice, GPIO_DATA)); | |
1de9fdc2 | 209 | if (!ice->vt1720) |
1da177e4 LT |
210 | outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); |
211 | inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ | |
212 | } | |
213 | ||
ab0c7d72 | 214 | static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) |
1da177e4 LT |
215 | { |
216 | unsigned int data; | |
1de9fdc2 | 217 | if (!ice->vt1720) |
1da177e4 LT |
218 | data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); |
219 | else | |
220 | data = 0; | |
221 | data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); | |
222 | return data; | |
223 | } | |
224 | ||
3a841d51 | 225 | /* |
aea3bfbc | 226 | * MIDI |
3a841d51 | 227 | */ |
aea3bfbc CL |
228 | |
229 | static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) | |
230 | { | |
231 | unsigned int count; | |
232 | ||
233 | for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) | |
234 | inb(ICEREG1724(ice, MPU_DATA)); | |
235 | } | |
236 | ||
237 | static inline struct snd_rawmidi_substream * | |
238 | get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) | |
3a841d51 | 239 | { |
aea3bfbc CL |
240 | return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, |
241 | struct snd_rawmidi_substream, list); | |
242 | } | |
243 | ||
244 | static void vt1724_midi_write(struct snd_ice1712 *ice) | |
245 | { | |
246 | struct snd_rawmidi_substream *s; | |
247 | int count, i; | |
248 | u8 buffer[32]; | |
249 | ||
250 | s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); | |
251 | count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); | |
252 | if (count > 0) { | |
253 | count = snd_rawmidi_transmit(s, buffer, count); | |
254 | for (i = 0; i < count; ++i) | |
255 | outb(buffer[i], ICEREG1724(ice, MPU_DATA)); | |
256 | } | |
257 | } | |
258 | ||
259 | static void vt1724_midi_read(struct snd_ice1712 *ice) | |
260 | { | |
261 | struct snd_rawmidi_substream *s; | |
262 | int count, i; | |
263 | u8 buffer[32]; | |
264 | ||
265 | s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); | |
266 | count = inb(ICEREG1724(ice, MPU_RXFIFO)); | |
267 | if (count > 0) { | |
268 | count = min(count, 32); | |
269 | for (i = 0; i < count; ++i) | |
270 | buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); | |
271 | snd_rawmidi_receive(s, buffer, count); | |
272 | } | |
273 | } | |
274 | ||
275 | static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, | |
276 | u8 flag, int enable) | |
277 | { | |
278 | struct snd_ice1712 *ice = substream->rmidi->private_data; | |
279 | u8 mask; | |
280 | ||
281 | spin_lock_irq(&ice->reg_lock); | |
282 | mask = inb(ICEREG1724(ice, IRQMASK)); | |
283 | if (enable) | |
284 | mask &= ~flag; | |
3a841d51 | 285 | else |
aea3bfbc CL |
286 | mask |= flag; |
287 | outb(mask, ICEREG1724(ice, IRQMASK)); | |
288 | spin_unlock_irq(&ice->reg_lock); | |
3a841d51 TI |
289 | } |
290 | ||
aea3bfbc | 291 | static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) |
3a841d51 | 292 | { |
aea3bfbc CL |
293 | vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 1); |
294 | return 0; | |
295 | } | |
296 | ||
297 | static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) | |
298 | { | |
299 | vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); | |
300 | return 0; | |
3a841d51 TI |
301 | } |
302 | ||
aea3bfbc CL |
303 | static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) |
304 | { | |
305 | struct snd_ice1712 *ice = s->rmidi->private_data; | |
306 | unsigned long flags; | |
307 | ||
308 | spin_lock_irqsave(&ice->reg_lock, flags); | |
309 | if (up) { | |
310 | ice->midi_output = 1; | |
311 | vt1724_midi_write(ice); | |
312 | } else { | |
313 | ice->midi_output = 0; | |
314 | } | |
315 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
316 | } | |
317 | ||
318 | static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) | |
319 | { | |
320 | struct snd_ice1712 *ice = s->rmidi->private_data; | |
321 | unsigned long timeout; | |
322 | ||
323 | /* 32 bytes should be transmitted in less than about 12 ms */ | |
324 | timeout = jiffies + msecs_to_jiffies(15); | |
325 | do { | |
326 | if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) | |
327 | break; | |
328 | schedule_timeout_uninterruptible(1); | |
329 | } while (time_after(timeout, jiffies)); | |
330 | } | |
331 | ||
332 | static struct snd_rawmidi_ops vt1724_midi_output_ops = { | |
333 | .open = vt1724_midi_output_open, | |
334 | .close = vt1724_midi_output_close, | |
335 | .trigger = vt1724_midi_output_trigger, | |
336 | .drain = vt1724_midi_output_drain, | |
337 | }; | |
338 | ||
339 | static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) | |
340 | { | |
341 | vt1724_midi_clear_rx(s->rmidi->private_data); | |
342 | vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); | |
343 | return 0; | |
344 | } | |
345 | ||
346 | static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) | |
347 | { | |
348 | vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); | |
349 | return 0; | |
350 | } | |
351 | ||
352 | static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) | |
353 | { | |
354 | struct snd_ice1712 *ice = s->rmidi->private_data; | |
355 | unsigned long flags; | |
356 | ||
357 | spin_lock_irqsave(&ice->reg_lock, flags); | |
358 | if (up) { | |
359 | ice->midi_input = 1; | |
360 | vt1724_midi_read(ice); | |
361 | } else { | |
362 | ice->midi_input = 0; | |
363 | } | |
364 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
365 | } | |
366 | ||
367 | static struct snd_rawmidi_ops vt1724_midi_input_ops = { | |
368 | .open = vt1724_midi_input_open, | |
369 | .close = vt1724_midi_input_close, | |
370 | .trigger = vt1724_midi_input_trigger, | |
371 | }; | |
372 | ||
3a841d51 | 373 | |
1da177e4 LT |
374 | /* |
375 | * Interrupt handler | |
376 | */ | |
377 | ||
7d12e780 | 378 | static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) |
1da177e4 | 379 | { |
ab0c7d72 | 380 | struct snd_ice1712 *ice = dev_id; |
1da177e4 | 381 | unsigned char status; |
3a841d51 TI |
382 | unsigned char status_mask = |
383 | VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; | |
1da177e4 | 384 | int handled = 0; |
3a841d51 TI |
385 | #ifdef CONFIG_SND_DEBUG |
386 | int timeout = 0; | |
387 | #endif | |
1da177e4 LT |
388 | |
389 | while (1) { | |
390 | status = inb(ICEREG1724(ice, IRQSTAT)); | |
3a841d51 | 391 | status &= status_mask; |
1da177e4 LT |
392 | if (status == 0) |
393 | break; | |
3a841d51 TI |
394 | #ifdef CONFIG_SND_DEBUG |
395 | if (++timeout > 10) { | |
396 | printk(KERN_ERR | |
397 | "ice1724: Too long irq loop, status = 0x%x\n", | |
398 | status); | |
399 | break; | |
400 | } | |
401 | #endif | |
1de9fdc2 | 402 | handled = 1; |
3a841d51 | 403 | if (status & VT1724_IRQ_MPU_TX) { |
aea3bfbc CL |
404 | spin_lock(&ice->reg_lock); |
405 | if (ice->midi_output) | |
406 | vt1724_midi_write(ice); | |
407 | spin_unlock(&ice->reg_lock); | |
3a841d51 TI |
408 | /* Due to mysterical reasons, MPU_TX is always |
409 | * generated (and can't be cleared) when a PCM | |
410 | * playback is going. So let's ignore at the | |
411 | * next loop. | |
412 | */ | |
413 | status_mask &= ~VT1724_IRQ_MPU_TX; | |
414 | } | |
415 | if (status & VT1724_IRQ_MPU_RX) { | |
aea3bfbc CL |
416 | spin_lock(&ice->reg_lock); |
417 | if (ice->midi_input) | |
418 | vt1724_midi_read(ice); | |
419 | else | |
420 | vt1724_midi_clear_rx(ice); | |
421 | spin_unlock(&ice->reg_lock); | |
1da177e4 | 422 | } |
3a841d51 TI |
423 | /* ack MPU irq */ |
424 | outb(status, ICEREG1724(ice, IRQSTAT)); | |
1da177e4 LT |
425 | if (status & VT1724_IRQ_MTPCM) { |
426 | /* | |
427 | * Multi-track PCM | |
428 | * PCM assignment are: | |
429 | * Playback DMA0 (M/C) = playback_pro_substream | |
430 | * Playback DMA1 = playback_con_substream_ds[0] | |
431 | * Playback DMA2 = playback_con_substream_ds[1] | |
432 | * Playback DMA3 = playback_con_substream_ds[2] | |
433 | * Playback DMA4 (SPDIF) = playback_con_substream | |
434 | * Record DMA0 = capture_pro_substream | |
435 | * Record DMA1 = capture_con_substream | |
436 | */ | |
437 | unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); | |
438 | if (mtstat & VT1724_MULTI_PDMA0) { | |
439 | if (ice->playback_pro_substream) | |
440 | snd_pcm_period_elapsed(ice->playback_pro_substream); | |
441 | } | |
442 | if (mtstat & VT1724_MULTI_RDMA0) { | |
443 | if (ice->capture_pro_substream) | |
444 | snd_pcm_period_elapsed(ice->capture_pro_substream); | |
445 | } | |
446 | if (mtstat & VT1724_MULTI_PDMA1) { | |
447 | if (ice->playback_con_substream_ds[0]) | |
448 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); | |
449 | } | |
450 | if (mtstat & VT1724_MULTI_PDMA2) { | |
451 | if (ice->playback_con_substream_ds[1]) | |
452 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); | |
453 | } | |
454 | if (mtstat & VT1724_MULTI_PDMA3) { | |
455 | if (ice->playback_con_substream_ds[2]) | |
456 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); | |
457 | } | |
458 | if (mtstat & VT1724_MULTI_PDMA4) { | |
459 | if (ice->playback_con_substream) | |
460 | snd_pcm_period_elapsed(ice->playback_con_substream); | |
461 | } | |
462 | if (mtstat & VT1724_MULTI_RDMA1) { | |
463 | if (ice->capture_con_substream) | |
464 | snd_pcm_period_elapsed(ice->capture_con_substream); | |
465 | } | |
466 | /* ack anyway to avoid freeze */ | |
467 | outb(mtstat, ICEMT1724(ice, IRQ)); | |
468 | /* ought to really handle this properly */ | |
469 | if (mtstat & VT1724_MULTI_FIFO_ERR) { | |
470 | unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); | |
1de9fdc2 AB |
471 | outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); |
472 | outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); | |
1da177e4 LT |
473 | /* If I don't do this, I get machine lockup due to continual interrupts */ |
474 | } | |
475 | ||
476 | } | |
477 | } | |
478 | return IRQ_RETVAL(handled); | |
479 | } | |
480 | ||
481 | /* | |
482 | * PCM code - professional part (multitrack) | |
483 | */ | |
484 | ||
485 | static unsigned int rates[] = { | |
486 | 8000, 9600, 11025, 12000, 16000, 22050, 24000, | |
487 | 32000, 44100, 48000, 64000, 88200, 96000, | |
488 | 176400, 192000, | |
489 | }; | |
490 | ||
ab0c7d72 | 491 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { |
1da177e4 LT |
492 | .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ |
493 | .list = rates, | |
494 | .mask = 0, | |
495 | }; | |
496 | ||
ab0c7d72 | 497 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { |
1da177e4 LT |
498 | .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ |
499 | .list = rates, | |
500 | .mask = 0, | |
501 | }; | |
502 | ||
ab0c7d72 | 503 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { |
1da177e4 LT |
504 | .count = ARRAY_SIZE(rates), |
505 | .list = rates, | |
506 | .mask = 0, | |
507 | }; | |
508 | ||
509 | struct vt1724_pcm_reg { | |
510 | unsigned int addr; /* ADDR register offset */ | |
511 | unsigned int size; /* SIZE register offset */ | |
512 | unsigned int count; /* COUNT register offset */ | |
513 | unsigned int start; /* start & pause bit */ | |
514 | }; | |
515 | ||
ab0c7d72 | 516 | static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 517 | { |
ab0c7d72 | 518 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
519 | unsigned char what; |
520 | unsigned char old; | |
ab0c7d72 | 521 | struct snd_pcm_substream *s; |
1da177e4 LT |
522 | |
523 | what = 0; | |
ef991b95 | 524 | snd_pcm_group_for_each_entry(s, substream) { |
29998d24 CL |
525 | if (snd_pcm_substream_chip(s) == ice) { |
526 | const struct vt1724_pcm_reg *reg; | |
527 | reg = s->runtime->private_data; | |
528 | what |= reg->start; | |
529 | snd_pcm_trigger_done(s, substream); | |
530 | } | |
1da177e4 LT |
531 | } |
532 | ||
533 | switch (cmd) { | |
534 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
535 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
536 | spin_lock(&ice->reg_lock); | |
537 | old = inb(ICEMT1724(ice, DMA_PAUSE)); | |
538 | if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) | |
539 | old |= what; | |
540 | else | |
541 | old &= ~what; | |
542 | outb(old, ICEMT1724(ice, DMA_PAUSE)); | |
543 | spin_unlock(&ice->reg_lock); | |
544 | break; | |
545 | ||
546 | case SNDRV_PCM_TRIGGER_START: | |
547 | case SNDRV_PCM_TRIGGER_STOP: | |
548 | spin_lock(&ice->reg_lock); | |
549 | old = inb(ICEMT1724(ice, DMA_CONTROL)); | |
550 | if (cmd == SNDRV_PCM_TRIGGER_START) | |
551 | old |= what; | |
552 | else | |
553 | old &= ~what; | |
554 | outb(old, ICEMT1724(ice, DMA_CONTROL)); | |
555 | spin_unlock(&ice->reg_lock); | |
556 | break; | |
557 | ||
558 | default: | |
559 | return -EINVAL; | |
560 | } | |
561 | return 0; | |
562 | } | |
563 | ||
564 | /* | |
565 | */ | |
566 | ||
567 | #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ | |
568 | VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) | |
569 | #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ | |
570 | VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) | |
571 | ||
d16be8ed PH |
572 | static const unsigned int stdclock_rate_list[16] = { |
573 | 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, | |
574 | 22050, 11025, 88200, 176400, 0, 192000, 64000 | |
575 | }; | |
576 | ||
577 | static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) | |
1da177e4 | 578 | { |
d16be8ed PH |
579 | unsigned int rate; |
580 | rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; | |
581 | return rate; | |
582 | } | |
583 | ||
584 | static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) | |
585 | { | |
586 | int i; | |
587 | for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { | |
588 | if (stdclock_rate_list[i] == rate) { | |
589 | outb(i, ICEMT1724(ice, RATE)); | |
590 | return; | |
591 | } | |
592 | } | |
593 | } | |
594 | ||
595 | static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, | |
596 | unsigned int rate) | |
597 | { | |
598 | unsigned char val, old; | |
599 | /* check MT02 */ | |
1da177e4 | 600 | if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { |
d16be8ed PH |
601 | val = old = inb(ICEMT1724(ice, I2S_FORMAT)); |
602 | if (rate > 96000) | |
603 | val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ | |
1da177e4 | 604 | else |
d16be8ed PH |
605 | val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ |
606 | if (val != old) { | |
607 | outb(val, ICEMT1724(ice, I2S_FORMAT)); | |
608 | /* master clock changed */ | |
609 | return 1; | |
610 | } | |
611 | } | |
612 | /* no change in master clock */ | |
613 | return 0; | |
1da177e4 LT |
614 | } |
615 | ||
ab0c7d72 TI |
616 | static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, |
617 | int force) | |
1da177e4 LT |
618 | { |
619 | unsigned long flags; | |
d16be8ed PH |
620 | unsigned char mclk_change; |
621 | unsigned int i, old_rate; | |
1da177e4 | 622 | |
d16be8ed | 623 | if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) |
1da177e4 | 624 | return; |
1da177e4 | 625 | spin_lock_irqsave(&ice->reg_lock, flags); |
d16be8ed | 626 | if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || |
1da177e4 LT |
627 | (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { |
628 | /* running? we cannot change the rate now... */ | |
629 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
630 | return; | |
631 | } | |
632 | if (!force && is_pro_rate_locked(ice)) { | |
633 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
634 | return; | |
635 | } | |
636 | ||
d16be8ed PH |
637 | old_rate = ice->get_rate(ice); |
638 | if (force || (old_rate != rate)) | |
639 | ice->set_rate(ice, rate); | |
1da177e4 LT |
640 | else if (rate == ice->cur_rate) { |
641 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
642 | return; | |
643 | } | |
644 | ||
645 | ice->cur_rate = rate; | |
646 | ||
d16be8ed PH |
647 | /* setting master clock */ |
648 | mclk_change = ice->set_mclk(ice, rate); | |
649 | ||
1da177e4 LT |
650 | spin_unlock_irqrestore(&ice->reg_lock, flags); |
651 | ||
652 | if (mclk_change && ice->gpio.i2s_mclk_changed) | |
653 | ice->gpio.i2s_mclk_changed(ice); | |
654 | if (ice->gpio.set_pro_rate) | |
655 | ice->gpio.set_pro_rate(ice, rate); | |
656 | ||
657 | /* set up codecs */ | |
658 | for (i = 0; i < ice->akm_codecs; i++) { | |
659 | if (ice->akm[i].ops.set_rate_val) | |
660 | ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); | |
661 | } | |
662 | if (ice->spdif.ops.setup_rate) | |
663 | ice->spdif.ops.setup_rate(ice, rate); | |
664 | } | |
665 | ||
ab0c7d72 TI |
666 | static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, |
667 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 668 | { |
ab0c7d72 | 669 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
670 | int i, chs; |
671 | ||
672 | chs = params_channels(hw_params); | |
62932df8 | 673 | mutex_lock(&ice->open_mutex); |
1da177e4 LT |
674 | /* mark surround channels */ |
675 | if (substream == ice->playback_pro_substream) { | |
676 | /* PDMA0 can be multi-channel up to 8 */ | |
677 | chs = chs / 2 - 1; | |
678 | for (i = 0; i < chs; i++) { | |
ab0c7d72 TI |
679 | if (ice->pcm_reserved[i] && |
680 | ice->pcm_reserved[i] != substream) { | |
62932df8 | 681 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
682 | return -EBUSY; |
683 | } | |
684 | ice->pcm_reserved[i] = substream; | |
685 | } | |
686 | for (; i < 3; i++) { | |
687 | if (ice->pcm_reserved[i] == substream) | |
688 | ice->pcm_reserved[i] = NULL; | |
689 | } | |
690 | } else { | |
691 | for (i = 0; i < 3; i++) { | |
692 | /* check individual playback stream */ | |
693 | if (ice->playback_con_substream_ds[i] == substream) { | |
ab0c7d72 TI |
694 | if (ice->pcm_reserved[i] && |
695 | ice->pcm_reserved[i] != substream) { | |
62932df8 | 696 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
697 | return -EBUSY; |
698 | } | |
699 | ice->pcm_reserved[i] = substream; | |
700 | break; | |
701 | } | |
702 | } | |
703 | } | |
62932df8 | 704 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
705 | snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); |
706 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
707 | } | |
708 | ||
ab0c7d72 | 709 | static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 710 | { |
ab0c7d72 | 711 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
712 | int i; |
713 | ||
62932df8 | 714 | mutex_lock(&ice->open_mutex); |
1da177e4 LT |
715 | /* unmark surround channels */ |
716 | for (i = 0; i < 3; i++) | |
717 | if (ice->pcm_reserved[i] == substream) | |
718 | ice->pcm_reserved[i] = NULL; | |
62932df8 | 719 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
720 | return snd_pcm_lib_free_pages(substream); |
721 | } | |
722 | ||
ab0c7d72 | 723 | static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 724 | { |
ab0c7d72 | 725 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
726 | unsigned char val; |
727 | unsigned int size; | |
728 | ||
729 | spin_lock_irq(&ice->reg_lock); | |
730 | val = (8 - substream->runtime->channels) >> 1; | |
731 | outb(val, ICEMT1724(ice, BURST)); | |
732 | ||
733 | outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); | |
734 | ||
735 | size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; | |
1de9fdc2 | 736 | /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ |
1da177e4 LT |
737 | outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); |
738 | outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); | |
739 | size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; | |
1de9fdc2 | 740 | /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ |
1da177e4 LT |
741 | outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); |
742 | outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); | |
743 | ||
744 | spin_unlock_irq(&ice->reg_lock); | |
745 | ||
1de9fdc2 | 746 | /* printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); */ |
1da177e4 LT |
747 | return 0; |
748 | } | |
749 | ||
ab0c7d72 | 750 | static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 751 | { |
ab0c7d72 | 752 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
753 | size_t ptr; |
754 | ||
755 | if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) | |
756 | return 0; | |
757 | #if 0 /* read PLAYBACK_ADDR */ | |
758 | ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); | |
759 | if (ptr < substream->runtime->dma_addr) { | |
760 | snd_printd("ice1724: invalid negative ptr\n"); | |
761 | return 0; | |
762 | } | |
763 | ptr -= substream->runtime->dma_addr; | |
764 | ptr = bytes_to_frames(substream->runtime, ptr); | |
765 | if (ptr >= substream->runtime->buffer_size) { | |
ab0c7d72 TI |
766 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
767 | (int)ptr, (int)substream->runtime->period_size); | |
1da177e4 LT |
768 | return 0; |
769 | } | |
770 | #else /* read PLAYBACK_SIZE */ | |
771 | ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; | |
772 | ptr = (ptr + 1) << 2; | |
773 | ptr = bytes_to_frames(substream->runtime, ptr); | |
1de9fdc2 | 774 | if (!ptr) |
1da177e4 LT |
775 | ; |
776 | else if (ptr <= substream->runtime->buffer_size) | |
777 | ptr = substream->runtime->buffer_size - ptr; | |
778 | else { | |
ab0c7d72 TI |
779 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
780 | (int)ptr, (int)substream->runtime->buffer_size); | |
1da177e4 LT |
781 | ptr = 0; |
782 | } | |
783 | #endif | |
784 | return ptr; | |
785 | } | |
786 | ||
ab0c7d72 | 787 | static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 788 | { |
ab0c7d72 | 789 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
32b47da0 | 790 | const struct vt1724_pcm_reg *reg = substream->runtime->private_data; |
1da177e4 LT |
791 | |
792 | spin_lock_irq(&ice->reg_lock); | |
793 | outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); | |
ab0c7d72 TI |
794 | outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, |
795 | ice->profi_port + reg->size); | |
796 | outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, | |
797 | ice->profi_port + reg->count); | |
1da177e4 LT |
798 | spin_unlock_irq(&ice->reg_lock); |
799 | return 0; | |
800 | } | |
801 | ||
ab0c7d72 | 802 | static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 803 | { |
ab0c7d72 | 804 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
32b47da0 | 805 | const struct vt1724_pcm_reg *reg = substream->runtime->private_data; |
1da177e4 LT |
806 | size_t ptr; |
807 | ||
808 | if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) | |
809 | return 0; | |
810 | #if 0 /* use ADDR register */ | |
811 | ptr = inl(ice->profi_port + reg->addr); | |
812 | ptr -= substream->runtime->dma_addr; | |
813 | return bytes_to_frames(substream->runtime, ptr); | |
814 | #else /* use SIZE register */ | |
815 | ptr = inw(ice->profi_port + reg->size); | |
816 | ptr = (ptr + 1) << 2; | |
817 | ptr = bytes_to_frames(substream->runtime, ptr); | |
1de9fdc2 | 818 | if (!ptr) |
1da177e4 LT |
819 | ; |
820 | else if (ptr <= substream->runtime->buffer_size) | |
821 | ptr = substream->runtime->buffer_size - ptr; | |
822 | else { | |
ab0c7d72 TI |
823 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
824 | (int)ptr, (int)substream->runtime->buffer_size); | |
1da177e4 LT |
825 | ptr = 0; |
826 | } | |
827 | return ptr; | |
828 | #endif | |
829 | } | |
830 | ||
32b47da0 | 831 | static const struct vt1724_pcm_reg vt1724_playback_pro_reg = { |
1da177e4 LT |
832 | .addr = VT1724_MT_PLAYBACK_ADDR, |
833 | .size = VT1724_MT_PLAYBACK_SIZE, | |
834 | .count = VT1724_MT_PLAYBACK_COUNT, | |
835 | .start = VT1724_PDMA0_START, | |
836 | }; | |
837 | ||
32b47da0 | 838 | static const struct vt1724_pcm_reg vt1724_capture_pro_reg = { |
1da177e4 LT |
839 | .addr = VT1724_MT_CAPTURE_ADDR, |
840 | .size = VT1724_MT_CAPTURE_SIZE, | |
841 | .count = VT1724_MT_CAPTURE_COUNT, | |
842 | .start = VT1724_RDMA0_START, | |
843 | }; | |
844 | ||
1de9fdc2 | 845 | static const struct snd_pcm_hardware snd_vt1724_playback_pro = { |
1da177e4 LT |
846 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
847 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
848 | SNDRV_PCM_INFO_MMAP_VALID | | |
849 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
850 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
851 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, | |
852 | .rate_min = 8000, | |
853 | .rate_max = 192000, | |
854 | .channels_min = 2, | |
855 | .channels_max = 8, | |
856 | .buffer_bytes_max = (1UL << 21), /* 19bits dword */ | |
857 | .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ | |
858 | .period_bytes_max = (1UL << 21), | |
859 | .periods_min = 2, | |
860 | .periods_max = 1024, | |
861 | }; | |
862 | ||
1de9fdc2 | 863 | static const struct snd_pcm_hardware snd_vt1724_spdif = { |
1da177e4 LT |
864 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
865 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
866 | SNDRV_PCM_INFO_MMAP_VALID | | |
867 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
868 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2dfbeca9 TI |
869 | .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| |
870 | SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| | |
871 | SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| | |
872 | SNDRV_PCM_RATE_192000), | |
1da177e4 | 873 | .rate_min = 32000, |
2dfbeca9 | 874 | .rate_max = 192000, |
1da177e4 LT |
875 | .channels_min = 2, |
876 | .channels_max = 2, | |
877 | .buffer_bytes_max = (1UL << 18), /* 16bits dword */ | |
878 | .period_bytes_min = 2 * 4 * 2, | |
879 | .period_bytes_max = (1UL << 18), | |
880 | .periods_min = 2, | |
881 | .periods_max = 1024, | |
882 | }; | |
883 | ||
1de9fdc2 | 884 | static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { |
1da177e4 LT |
885 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
886 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
887 | SNDRV_PCM_INFO_MMAP_VALID | | |
888 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
889 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
890 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, | |
891 | .rate_min = 8000, | |
892 | .rate_max = 192000, | |
893 | .channels_min = 2, | |
894 | .channels_max = 2, | |
895 | .buffer_bytes_max = (1UL << 18), /* 16bits dword */ | |
896 | .period_bytes_min = 2 * 4 * 2, | |
897 | .period_bytes_max = (1UL << 18), | |
898 | .periods_min = 2, | |
899 | .periods_max = 1024, | |
900 | }; | |
901 | ||
902 | /* | |
903 | * set rate constraints | |
904 | */ | |
d16be8ed | 905 | static void set_std_hw_rates(struct snd_ice1712 *ice) |
1da177e4 | 906 | { |
1da177e4 LT |
907 | if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { |
908 | /* I2S */ | |
909 | /* VT1720 doesn't support more than 96kHz */ | |
910 | if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) | |
d16be8ed PH |
911 | ice->hw_rates = &hw_constraints_rates_192; |
912 | else | |
913 | ice->hw_rates = &hw_constraints_rates_96; | |
914 | } else { | |
1da177e4 | 915 | /* ACLINK */ |
d16be8ed | 916 | ice->hw_rates = &hw_constraints_rates_48; |
1da177e4 | 917 | } |
d16be8ed PH |
918 | } |
919 | ||
920 | static int set_rate_constraints(struct snd_ice1712 *ice, | |
921 | struct snd_pcm_substream *substream) | |
922 | { | |
923 | struct snd_pcm_runtime *runtime = substream->runtime; | |
924 | ||
925 | runtime->hw.rate_min = ice->hw_rates->list[0]; | |
926 | runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; | |
927 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT; | |
928 | return snd_pcm_hw_constraint_list(runtime, 0, | |
929 | SNDRV_PCM_HW_PARAM_RATE, | |
930 | ice->hw_rates); | |
1da177e4 LT |
931 | } |
932 | ||
933 | /* multi-channel playback needs alignment 8x32bit regardless of the channels | |
934 | * actually used | |
935 | */ | |
936 | #define VT1724_BUFFER_ALIGN 0x20 | |
937 | ||
ab0c7d72 | 938 | static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) |
1da177e4 | 939 | { |
ab0c7d72 TI |
940 | struct snd_pcm_runtime *runtime = substream->runtime; |
941 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); | |
a6b936b9 | 942 | int chs, num_indeps; |
1da177e4 | 943 | |
32b47da0 | 944 | runtime->private_data = (void *)&vt1724_playback_pro_reg; |
1da177e4 LT |
945 | ice->playback_pro_substream = substream; |
946 | runtime->hw = snd_vt1724_playback_pro; | |
947 | snd_pcm_set_sync(substream); | |
948 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
949 | set_rate_constraints(ice, substream); | |
62932df8 | 950 | mutex_lock(&ice->open_mutex); |
1da177e4 | 951 | /* calculate the currently available channels */ |
a6b936b9 TI |
952 | num_indeps = ice->num_total_dacs / 2 - 1; |
953 | for (chs = 0; chs < num_indeps; chs++) { | |
1da177e4 LT |
954 | if (ice->pcm_reserved[chs]) |
955 | break; | |
956 | } | |
957 | chs = (chs + 1) * 2; | |
958 | runtime->hw.channels_max = chs; | |
959 | if (chs > 2) /* channels must be even */ | |
960 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); | |
62932df8 | 961 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
962 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
963 | VT1724_BUFFER_ALIGN); | |
964 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
965 | VT1724_BUFFER_ALIGN); | |
966 | return 0; | |
967 | } | |
968 | ||
ab0c7d72 | 969 | static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) |
1da177e4 | 970 | { |
ab0c7d72 TI |
971 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
972 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 | 973 | |
32b47da0 | 974 | runtime->private_data = (void *)&vt1724_capture_pro_reg; |
1da177e4 LT |
975 | ice->capture_pro_substream = substream; |
976 | runtime->hw = snd_vt1724_2ch_stereo; | |
977 | snd_pcm_set_sync(substream); | |
978 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
979 | set_rate_constraints(ice, substream); | |
980 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
981 | VT1724_BUFFER_ALIGN); | |
982 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
983 | VT1724_BUFFER_ALIGN); | |
984 | return 0; | |
985 | } | |
986 | ||
ab0c7d72 | 987 | static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) |
1da177e4 | 988 | { |
ab0c7d72 | 989 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
990 | |
991 | if (PRO_RATE_RESET) | |
d16be8ed | 992 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); |
1da177e4 LT |
993 | ice->playback_pro_substream = NULL; |
994 | ||
995 | return 0; | |
996 | } | |
997 | ||
ab0c7d72 | 998 | static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) |
1da177e4 | 999 | { |
ab0c7d72 | 1000 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1001 | |
1002 | if (PRO_RATE_RESET) | |
d16be8ed | 1003 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); |
1da177e4 LT |
1004 | ice->capture_pro_substream = NULL; |
1005 | return 0; | |
1006 | } | |
1007 | ||
ab0c7d72 | 1008 | static struct snd_pcm_ops snd_vt1724_playback_pro_ops = { |
1da177e4 LT |
1009 | .open = snd_vt1724_playback_pro_open, |
1010 | .close = snd_vt1724_playback_pro_close, | |
1011 | .ioctl = snd_pcm_lib_ioctl, | |
1012 | .hw_params = snd_vt1724_pcm_hw_params, | |
1013 | .hw_free = snd_vt1724_pcm_hw_free, | |
1014 | .prepare = snd_vt1724_playback_pro_prepare, | |
1015 | .trigger = snd_vt1724_pcm_trigger, | |
1016 | .pointer = snd_vt1724_playback_pro_pointer, | |
1017 | }; | |
1018 | ||
ab0c7d72 | 1019 | static struct snd_pcm_ops snd_vt1724_capture_pro_ops = { |
1da177e4 LT |
1020 | .open = snd_vt1724_capture_pro_open, |
1021 | .close = snd_vt1724_capture_pro_close, | |
1022 | .ioctl = snd_pcm_lib_ioctl, | |
1023 | .hw_params = snd_vt1724_pcm_hw_params, | |
1024 | .hw_free = snd_vt1724_pcm_hw_free, | |
1025 | .prepare = snd_vt1724_pcm_prepare, | |
1026 | .trigger = snd_vt1724_pcm_trigger, | |
1027 | .pointer = snd_vt1724_pcm_pointer, | |
1028 | }; | |
1029 | ||
1de9fdc2 | 1030 | static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) |
1da177e4 | 1031 | { |
ab0c7d72 | 1032 | struct snd_pcm *pcm; |
1da177e4 LT |
1033 | int err; |
1034 | ||
1035 | err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm); | |
1036 | if (err < 0) | |
1037 | return err; | |
1038 | ||
1039 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); | |
1040 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops); | |
1041 | ||
1042 | pcm->private_data = ice; | |
1043 | pcm->info_flags = 0; | |
1044 | strcpy(pcm->name, "ICE1724"); | |
1045 | ||
1046 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
1047 | snd_dma_pci_data(ice->pci), |
1048 | 256*1024, 256*1024); | |
1da177e4 LT |
1049 | |
1050 | ice->pcm_pro = pcm; | |
1051 | ||
1052 | return 0; | |
1053 | } | |
1054 | ||
1055 | ||
1056 | /* | |
1057 | * SPDIF PCM | |
1058 | */ | |
1059 | ||
32b47da0 | 1060 | static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = { |
1da177e4 LT |
1061 | .addr = VT1724_MT_PDMA4_ADDR, |
1062 | .size = VT1724_MT_PDMA4_SIZE, | |
1063 | .count = VT1724_MT_PDMA4_COUNT, | |
1064 | .start = VT1724_PDMA4_START, | |
1065 | }; | |
1066 | ||
32b47da0 | 1067 | static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = { |
1da177e4 LT |
1068 | .addr = VT1724_MT_RDMA1_ADDR, |
1069 | .size = VT1724_MT_RDMA1_SIZE, | |
1070 | .count = VT1724_MT_RDMA1_COUNT, | |
1071 | .start = VT1724_RDMA1_START, | |
1072 | }; | |
1073 | ||
1074 | /* update spdif control bits; call with reg_lock */ | |
ab0c7d72 | 1075 | static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) |
1da177e4 LT |
1076 | { |
1077 | unsigned char cbit, disabled; | |
1078 | ||
1079 | cbit = inb(ICEREG1724(ice, SPDIF_CFG)); | |
1080 | disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; | |
1081 | if (cbit != disabled) | |
1082 | outb(disabled, ICEREG1724(ice, SPDIF_CFG)); | |
1083 | outw(val, ICEMT1724(ice, SPDIF_CTRL)); | |
1084 | if (cbit != disabled) | |
1085 | outb(cbit, ICEREG1724(ice, SPDIF_CFG)); | |
1086 | outw(val, ICEMT1724(ice, SPDIF_CTRL)); | |
1087 | } | |
1088 | ||
1089 | /* update SPDIF control bits according to the given rate */ | |
ab0c7d72 | 1090 | static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) |
1da177e4 LT |
1091 | { |
1092 | unsigned int val, nval; | |
1093 | unsigned long flags; | |
1094 | ||
1095 | spin_lock_irqsave(&ice->reg_lock, flags); | |
1096 | nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
1097 | nval &= ~(7 << 12); | |
1098 | switch (rate) { | |
1099 | case 44100: break; | |
1100 | case 48000: nval |= 2 << 12; break; | |
1101 | case 32000: nval |= 3 << 12; break; | |
2dfbeca9 TI |
1102 | case 88200: nval |= 4 << 12; break; |
1103 | case 96000: nval |= 5 << 12; break; | |
1104 | case 192000: nval |= 6 << 12; break; | |
1105 | case 176400: nval |= 7 << 12; break; | |
1da177e4 LT |
1106 | } |
1107 | if (val != nval) | |
1108 | update_spdif_bits(ice, nval); | |
1109 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
1110 | } | |
1111 | ||
ab0c7d72 | 1112 | static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1113 | { |
ab0c7d72 | 1114 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1de9fdc2 | 1115 | if (!ice->force_pdma4) |
1da177e4 LT |
1116 | update_spdif_rate(ice, substream->runtime->rate); |
1117 | return snd_vt1724_pcm_prepare(substream); | |
1118 | } | |
1119 | ||
ab0c7d72 | 1120 | static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) |
1da177e4 | 1121 | { |
ab0c7d72 TI |
1122 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1123 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 | 1124 | |
32b47da0 | 1125 | runtime->private_data = (void *)&vt1724_playback_spdif_reg; |
1da177e4 LT |
1126 | ice->playback_con_substream = substream; |
1127 | if (ice->force_pdma4) { | |
1128 | runtime->hw = snd_vt1724_2ch_stereo; | |
1129 | set_rate_constraints(ice, substream); | |
1130 | } else | |
1131 | runtime->hw = snd_vt1724_spdif; | |
1132 | snd_pcm_set_sync(substream); | |
1133 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
1134 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
1135 | VT1724_BUFFER_ALIGN); | |
1136 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
1137 | VT1724_BUFFER_ALIGN); | |
c93f5a1e TI |
1138 | if (ice->spdif.ops.open) |
1139 | ice->spdif.ops.open(ice, substream); | |
1da177e4 LT |
1140 | return 0; |
1141 | } | |
1142 | ||
ab0c7d72 | 1143 | static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) |
1da177e4 | 1144 | { |
ab0c7d72 | 1145 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1146 | |
1147 | if (PRO_RATE_RESET) | |
d16be8ed | 1148 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); |
1da177e4 | 1149 | ice->playback_con_substream = NULL; |
c93f5a1e TI |
1150 | if (ice->spdif.ops.close) |
1151 | ice->spdif.ops.close(ice, substream); | |
1da177e4 LT |
1152 | |
1153 | return 0; | |
1154 | } | |
1155 | ||
ab0c7d72 | 1156 | static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) |
1da177e4 | 1157 | { |
ab0c7d72 TI |
1158 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1159 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 | 1160 | |
32b47da0 | 1161 | runtime->private_data = (void *)&vt1724_capture_spdif_reg; |
1da177e4 LT |
1162 | ice->capture_con_substream = substream; |
1163 | if (ice->force_rdma1) { | |
1164 | runtime->hw = snd_vt1724_2ch_stereo; | |
1165 | set_rate_constraints(ice, substream); | |
1166 | } else | |
1167 | runtime->hw = snd_vt1724_spdif; | |
1168 | snd_pcm_set_sync(substream); | |
1169 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
1170 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
1171 | VT1724_BUFFER_ALIGN); | |
1172 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
1173 | VT1724_BUFFER_ALIGN); | |
c93f5a1e TI |
1174 | if (ice->spdif.ops.open) |
1175 | ice->spdif.ops.open(ice, substream); | |
1da177e4 LT |
1176 | return 0; |
1177 | } | |
1178 | ||
ab0c7d72 | 1179 | static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) |
1da177e4 | 1180 | { |
ab0c7d72 | 1181 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1182 | |
1183 | if (PRO_RATE_RESET) | |
d16be8ed | 1184 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); |
1da177e4 | 1185 | ice->capture_con_substream = NULL; |
c93f5a1e TI |
1186 | if (ice->spdif.ops.close) |
1187 | ice->spdif.ops.close(ice, substream); | |
1da177e4 LT |
1188 | |
1189 | return 0; | |
1190 | } | |
1191 | ||
ab0c7d72 | 1192 | static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { |
1da177e4 LT |
1193 | .open = snd_vt1724_playback_spdif_open, |
1194 | .close = snd_vt1724_playback_spdif_close, | |
1195 | .ioctl = snd_pcm_lib_ioctl, | |
1196 | .hw_params = snd_vt1724_pcm_hw_params, | |
1197 | .hw_free = snd_vt1724_pcm_hw_free, | |
1198 | .prepare = snd_vt1724_playback_spdif_prepare, | |
1199 | .trigger = snd_vt1724_pcm_trigger, | |
1200 | .pointer = snd_vt1724_pcm_pointer, | |
1201 | }; | |
1202 | ||
ab0c7d72 | 1203 | static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { |
1da177e4 LT |
1204 | .open = snd_vt1724_capture_spdif_open, |
1205 | .close = snd_vt1724_capture_spdif_close, | |
1206 | .ioctl = snd_pcm_lib_ioctl, | |
1207 | .hw_params = snd_vt1724_pcm_hw_params, | |
1208 | .hw_free = snd_vt1724_pcm_hw_free, | |
1209 | .prepare = snd_vt1724_pcm_prepare, | |
1210 | .trigger = snd_vt1724_pcm_trigger, | |
1211 | .pointer = snd_vt1724_pcm_pointer, | |
1212 | }; | |
1213 | ||
1214 | ||
1de9fdc2 | 1215 | static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) |
1da177e4 LT |
1216 | { |
1217 | char *name; | |
ab0c7d72 | 1218 | struct snd_pcm *pcm; |
1da177e4 LT |
1219 | int play, capt; |
1220 | int err; | |
1221 | ||
1222 | if (ice->force_pdma4 || | |
1223 | (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { | |
1224 | play = 1; | |
1225 | ice->has_spdif = 1; | |
1226 | } else | |
1227 | play = 0; | |
1228 | if (ice->force_rdma1 || | |
1229 | (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { | |
1230 | capt = 1; | |
1231 | ice->has_spdif = 1; | |
1232 | } else | |
1233 | capt = 0; | |
1de9fdc2 | 1234 | if (!play && !capt) |
1da177e4 LT |
1235 | return 0; /* no spdif device */ |
1236 | ||
1237 | if (ice->force_pdma4 || ice->force_rdma1) | |
1238 | name = "ICE1724 Secondary"; | |
1239 | else | |
1240 | name = "IEC1724 IEC958"; | |
1241 | err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); | |
1242 | if (err < 0) | |
1243 | return err; | |
1244 | ||
1245 | if (play) | |
1246 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1247 | &snd_vt1724_playback_spdif_ops); | |
1248 | if (capt) | |
1249 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
1250 | &snd_vt1724_capture_spdif_ops); | |
1251 | ||
1252 | pcm->private_data = ice; | |
1253 | pcm->info_flags = 0; | |
1254 | strcpy(pcm->name, name); | |
1255 | ||
1256 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
1257 | snd_dma_pci_data(ice->pci), |
1258 | 64*1024, 64*1024); | |
1da177e4 LT |
1259 | |
1260 | ice->pcm = pcm; | |
1261 | ||
1262 | return 0; | |
1263 | } | |
1264 | ||
1265 | ||
1266 | /* | |
1267 | * independent surround PCMs | |
1268 | */ | |
1269 | ||
32b47da0 | 1270 | static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { |
1da177e4 LT |
1271 | { |
1272 | .addr = VT1724_MT_PDMA1_ADDR, | |
1273 | .size = VT1724_MT_PDMA1_SIZE, | |
1274 | .count = VT1724_MT_PDMA1_COUNT, | |
1275 | .start = VT1724_PDMA1_START, | |
1276 | }, | |
1277 | { | |
1278 | .addr = VT1724_MT_PDMA2_ADDR, | |
1279 | .size = VT1724_MT_PDMA2_SIZE, | |
1280 | .count = VT1724_MT_PDMA2_COUNT, | |
1281 | .start = VT1724_PDMA2_START, | |
1282 | }, | |
1283 | { | |
1284 | .addr = VT1724_MT_PDMA3_ADDR, | |
1285 | .size = VT1724_MT_PDMA3_SIZE, | |
1286 | .count = VT1724_MT_PDMA3_COUNT, | |
1287 | .start = VT1724_PDMA3_START, | |
1288 | }, | |
1289 | }; | |
1290 | ||
ab0c7d72 | 1291 | static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1292 | { |
ab0c7d72 | 1293 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1294 | unsigned char val; |
1295 | ||
1296 | spin_lock_irq(&ice->reg_lock); | |
1297 | val = 3 - substream->number; | |
1298 | if (inb(ICEMT1724(ice, BURST)) < val) | |
1299 | outb(val, ICEMT1724(ice, BURST)); | |
1300 | spin_unlock_irq(&ice->reg_lock); | |
1301 | return snd_vt1724_pcm_prepare(substream); | |
1302 | } | |
1303 | ||
ab0c7d72 | 1304 | static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) |
1da177e4 | 1305 | { |
ab0c7d72 TI |
1306 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1307 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 | 1308 | |
62932df8 | 1309 | mutex_lock(&ice->open_mutex); |
1da177e4 LT |
1310 | /* already used by PDMA0? */ |
1311 | if (ice->pcm_reserved[substream->number]) { | |
62932df8 | 1312 | mutex_unlock(&ice->open_mutex); |
1da177e4 LT |
1313 | return -EBUSY; /* FIXME: should handle blocking mode properly */ |
1314 | } | |
62932df8 | 1315 | mutex_unlock(&ice->open_mutex); |
32b47da0 | 1316 | runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; |
1da177e4 LT |
1317 | ice->playback_con_substream_ds[substream->number] = substream; |
1318 | runtime->hw = snd_vt1724_2ch_stereo; | |
1319 | snd_pcm_set_sync(substream); | |
1320 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
1321 | set_rate_constraints(ice, substream); | |
1322 | return 0; | |
1323 | } | |
1324 | ||
ab0c7d72 | 1325 | static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) |
1da177e4 | 1326 | { |
ab0c7d72 | 1327 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1328 | |
1329 | if (PRO_RATE_RESET) | |
d16be8ed | 1330 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); |
1da177e4 LT |
1331 | ice->playback_con_substream_ds[substream->number] = NULL; |
1332 | ice->pcm_reserved[substream->number] = NULL; | |
1333 | ||
1334 | return 0; | |
1335 | } | |
1336 | ||
ab0c7d72 | 1337 | static struct snd_pcm_ops snd_vt1724_playback_indep_ops = { |
1da177e4 LT |
1338 | .open = snd_vt1724_playback_indep_open, |
1339 | .close = snd_vt1724_playback_indep_close, | |
1340 | .ioctl = snd_pcm_lib_ioctl, | |
1341 | .hw_params = snd_vt1724_pcm_hw_params, | |
1342 | .hw_free = snd_vt1724_pcm_hw_free, | |
1343 | .prepare = snd_vt1724_playback_indep_prepare, | |
1344 | .trigger = snd_vt1724_pcm_trigger, | |
1345 | .pointer = snd_vt1724_pcm_pointer, | |
1346 | }; | |
1347 | ||
1348 | ||
1de9fdc2 | 1349 | static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) |
1da177e4 | 1350 | { |
ab0c7d72 | 1351 | struct snd_pcm *pcm; |
1da177e4 LT |
1352 | int play; |
1353 | int err; | |
1354 | ||
1355 | play = ice->num_total_dacs / 2 - 1; | |
1356 | if (play <= 0) | |
1357 | return 0; | |
1358 | ||
1359 | err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); | |
1360 | if (err < 0) | |
1361 | return err; | |
1362 | ||
1363 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1364 | &snd_vt1724_playback_indep_ops); | |
1365 | ||
1366 | pcm->private_data = ice; | |
1367 | pcm->info_flags = 0; | |
1368 | strcpy(pcm->name, "ICE1724 Surround PCM"); | |
1369 | ||
1370 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
1371 | snd_dma_pci_data(ice->pci), |
1372 | 64*1024, 64*1024); | |
1da177e4 LT |
1373 | |
1374 | ice->pcm_ds = pcm; | |
1375 | ||
1376 | return 0; | |
1377 | } | |
1378 | ||
1379 | ||
1380 | /* | |
1381 | * Mixer section | |
1382 | */ | |
1383 | ||
1de9fdc2 | 1384 | static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) |
1da177e4 LT |
1385 | { |
1386 | int err; | |
1387 | ||
1de9fdc2 | 1388 | if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { |
ab0c7d72 TI |
1389 | struct snd_ac97_bus *pbus; |
1390 | struct snd_ac97_template ac97; | |
1391 | static struct snd_ac97_bus_ops ops = { | |
1da177e4 LT |
1392 | .write = snd_vt1724_ac97_write, |
1393 | .read = snd_vt1724_ac97_read, | |
1394 | }; | |
1395 | ||
1396 | /* cold reset */ | |
1397 | outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); | |
1398 | mdelay(5); /* FIXME */ | |
1399 | outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); | |
1400 | ||
1de9fdc2 AB |
1401 | err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); |
1402 | if (err < 0) | |
1da177e4 LT |
1403 | return err; |
1404 | memset(&ac97, 0, sizeof(ac97)); | |
1405 | ac97.private_data = ice; | |
1de9fdc2 AB |
1406 | err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); |
1407 | if (err < 0) | |
1da177e4 LT |
1408 | printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); |
1409 | else | |
1410 | return 0; | |
1411 | } | |
1412 | /* I2S mixer only */ | |
1413 | strcat(ice->card->mixername, "ICE1724 - multitrack"); | |
1414 | return 0; | |
1415 | } | |
1416 | ||
1417 | /* | |
1418 | * | |
1419 | */ | |
1420 | ||
ab0c7d72 | 1421 | static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) |
1da177e4 LT |
1422 | { |
1423 | return (unsigned int)ice->eeprom.data[idx] | \ | |
1424 | ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ | |
1425 | ((unsigned int)ice->eeprom.data[idx + 2] << 16); | |
1426 | } | |
1427 | ||
1de9fdc2 | 1428 | static void snd_vt1724_proc_read(struct snd_info_entry *entry, |
ab0c7d72 | 1429 | struct snd_info_buffer *buffer) |
1da177e4 | 1430 | { |
ab0c7d72 | 1431 | struct snd_ice1712 *ice = entry->private_data; |
1da177e4 LT |
1432 | unsigned int idx; |
1433 | ||
1434 | snd_iprintf(buffer, "%s\n\n", ice->card->longname); | |
1435 | snd_iprintf(buffer, "EEPROM:\n"); | |
1436 | ||
1437 | snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); | |
1438 | snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); | |
1439 | snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); | |
ab0c7d72 TI |
1440 | snd_iprintf(buffer, " System Config : 0x%x\n", |
1441 | ice->eeprom.data[ICE_EEP2_SYSCONF]); | |
1442 | snd_iprintf(buffer, " ACLink : 0x%x\n", | |
1443 | ice->eeprom.data[ICE_EEP2_ACLINK]); | |
1444 | snd_iprintf(buffer, " I2S : 0x%x\n", | |
1445 | ice->eeprom.data[ICE_EEP2_I2S]); | |
1446 | snd_iprintf(buffer, " S/PDIF : 0x%x\n", | |
1447 | ice->eeprom.data[ICE_EEP2_SPDIF]); | |
1448 | snd_iprintf(buffer, " GPIO direction : 0x%x\n", | |
1449 | ice->eeprom.gpiodir); | |
1450 | snd_iprintf(buffer, " GPIO mask : 0x%x\n", | |
1451 | ice->eeprom.gpiomask); | |
1452 | snd_iprintf(buffer, " GPIO state : 0x%x\n", | |
1453 | ice->eeprom.gpiostate); | |
1da177e4 | 1454 | for (idx = 0x12; idx < ice->eeprom.size; idx++) |
ab0c7d72 TI |
1455 | snd_iprintf(buffer, " Extra #%02i : 0x%x\n", |
1456 | idx, ice->eeprom.data[idx]); | |
1da177e4 LT |
1457 | |
1458 | snd_iprintf(buffer, "\nRegisters:\n"); | |
1459 | ||
ab0c7d72 TI |
1460 | snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", |
1461 | (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); | |
1da177e4 | 1462 | for (idx = 0x0; idx < 0x20 ; idx++) |
ab0c7d72 TI |
1463 | snd_iprintf(buffer, " CCS%02x : 0x%02x\n", |
1464 | idx, inb(ice->port+idx)); | |
1da177e4 | 1465 | for (idx = 0x0; idx < 0x30 ; idx++) |
ab0c7d72 TI |
1466 | snd_iprintf(buffer, " MT%02x : 0x%02x\n", |
1467 | idx, inb(ice->profi_port+idx)); | |
1da177e4 LT |
1468 | } |
1469 | ||
1de9fdc2 | 1470 | static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice) |
1da177e4 | 1471 | { |
ab0c7d72 | 1472 | struct snd_info_entry *entry; |
1da177e4 | 1473 | |
1de9fdc2 | 1474 | if (!snd_card_proc_new(ice->card, "ice1724", &entry)) |
bf850204 | 1475 | snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read); |
1da177e4 LT |
1476 | } |
1477 | ||
1478 | /* | |
1479 | * | |
1480 | */ | |
1481 | ||
ab0c7d72 TI |
1482 | static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, |
1483 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1484 | { |
1485 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
ab0c7d72 | 1486 | uinfo->count = sizeof(struct snd_ice1712_eeprom); |
1da177e4 LT |
1487 | return 0; |
1488 | } | |
1489 | ||
ab0c7d72 TI |
1490 | static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, |
1491 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1492 | { |
ab0c7d72 | 1493 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1de9fdc2 | 1494 | |
1da177e4 LT |
1495 | memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); |
1496 | return 0; | |
1497 | } | |
1498 | ||
1b60f6b0 | 1499 | static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = { |
1da177e4 LT |
1500 | .iface = SNDRV_CTL_ELEM_IFACE_CARD, |
1501 | .name = "ICE1724 EEPROM", | |
1502 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1503 | .info = snd_vt1724_eeprom_info, | |
1504 | .get = snd_vt1724_eeprom_get | |
1505 | }; | |
1506 | ||
1507 | /* | |
1508 | */ | |
ab0c7d72 TI |
1509 | static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, |
1510 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1511 | { |
1512 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1513 | uinfo->count = 1; | |
1514 | return 0; | |
1515 | } | |
1516 | ||
ab0c7d72 | 1517 | static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) |
1da177e4 | 1518 | { |
2dfbeca9 | 1519 | unsigned int val, rbits; |
1da177e4 LT |
1520 | |
1521 | val = diga->status[0] & 0x03; /* professional, non-audio */ | |
1522 | if (val & 0x01) { | |
1523 | /* professional */ | |
ab0c7d72 TI |
1524 | if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == |
1525 | IEC958_AES0_PRO_EMPHASIS_5015) | |
1da177e4 | 1526 | val |= 1U << 3; |
2dfbeca9 TI |
1527 | rbits = (diga->status[4] >> 3) & 0x0f; |
1528 | if (rbits) { | |
1529 | switch (rbits) { | |
1530 | case 2: val |= 5 << 12; break; /* 96k */ | |
1531 | case 3: val |= 6 << 12; break; /* 192k */ | |
1532 | case 10: val |= 4 << 12; break; /* 88.2k */ | |
1533 | case 11: val |= 7 << 12; break; /* 176.4k */ | |
1534 | } | |
1535 | } else { | |
1536 | switch (diga->status[0] & IEC958_AES0_PRO_FS) { | |
1537 | case IEC958_AES0_PRO_FS_44100: | |
1538 | break; | |
1539 | case IEC958_AES0_PRO_FS_32000: | |
1540 | val |= 3U << 12; | |
1541 | break; | |
1542 | default: | |
1543 | val |= 2U << 12; | |
1544 | break; | |
1545 | } | |
1da177e4 LT |
1546 | } |
1547 | } else { | |
1548 | /* consumer */ | |
1549 | val |= diga->status[1] & 0x04; /* copyright */ | |
ab0c7d72 TI |
1550 | if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == |
1551 | IEC958_AES0_CON_EMPHASIS_5015) | |
1da177e4 LT |
1552 | val |= 1U << 3; |
1553 | val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ | |
1554 | val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ | |
1555 | } | |
1556 | return val; | |
1557 | } | |
1558 | ||
ab0c7d72 | 1559 | static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) |
1da177e4 LT |
1560 | { |
1561 | memset(diga->status, 0, sizeof(diga->status)); | |
1562 | diga->status[0] = val & 0x03; /* professional, non-audio */ | |
1563 | if (val & 0x01) { | |
1564 | /* professional */ | |
1565 | if (val & (1U << 3)) | |
1566 | diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; | |
1567 | switch ((val >> 12) & 0x7) { | |
1568 | case 0: | |
1569 | break; | |
1570 | case 2: | |
1571 | diga->status[0] |= IEC958_AES0_PRO_FS_32000; | |
1572 | break; | |
1573 | default: | |
1574 | diga->status[0] |= IEC958_AES0_PRO_FS_48000; | |
1575 | break; | |
1576 | } | |
1577 | } else { | |
1578 | /* consumer */ | |
1579 | diga->status[0] |= val & (1U << 2); /* copyright */ | |
1580 | if (val & (1U << 3)) | |
1581 | diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; | |
1582 | diga->status[1] |= (val >> 4) & 0x3f; /* category */ | |
1583 | diga->status[3] |= (val >> 12) & 0x07; /* fs */ | |
1584 | } | |
1585 | } | |
1586 | ||
ab0c7d72 TI |
1587 | static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, |
1588 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1589 | { |
ab0c7d72 | 1590 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1591 | unsigned int val; |
1592 | val = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
1593 | decode_spdif_bits(&ucontrol->value.iec958, val); | |
1594 | return 0; | |
1595 | } | |
1596 | ||
ab0c7d72 TI |
1597 | static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, |
1598 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1599 | { |
ab0c7d72 | 1600 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1601 | unsigned int val, old; |
1602 | ||
1603 | val = encode_spdif_bits(&ucontrol->value.iec958); | |
1604 | spin_lock_irq(&ice->reg_lock); | |
1605 | old = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
1606 | if (val != old) | |
1607 | update_spdif_bits(ice, val); | |
1608 | spin_unlock_irq(&ice->reg_lock); | |
1de9fdc2 | 1609 | return val != old; |
1da177e4 LT |
1610 | } |
1611 | ||
1b60f6b0 | 1612 | static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata = |
1da177e4 LT |
1613 | { |
1614 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1de9fdc2 | 1615 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), |
1da177e4 LT |
1616 | .info = snd_vt1724_spdif_info, |
1617 | .get = snd_vt1724_spdif_default_get, | |
1618 | .put = snd_vt1724_spdif_default_put | |
1619 | }; | |
1620 | ||
ab0c7d72 TI |
1621 | static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, |
1622 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1623 | { |
1624 | ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | | |
1625 | IEC958_AES0_PROFESSIONAL | | |
1626 | IEC958_AES0_CON_NOT_COPYRIGHT | | |
1627 | IEC958_AES0_CON_EMPHASIS; | |
1628 | ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | | |
1629 | IEC958_AES1_CON_CATEGORY; | |
1630 | ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; | |
1631 | return 0; | |
1632 | } | |
1633 | ||
ab0c7d72 TI |
1634 | static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, |
1635 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1636 | { |
1637 | ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | | |
1638 | IEC958_AES0_PROFESSIONAL | | |
1639 | IEC958_AES0_PRO_FS | | |
1640 | IEC958_AES0_PRO_EMPHASIS; | |
1641 | return 0; | |
1642 | } | |
1643 | ||
1b60f6b0 | 1644 | static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata = |
1da177e4 LT |
1645 | { |
1646 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
67ed4161 | 1647 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1de9fdc2 | 1648 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), |
1da177e4 LT |
1649 | .info = snd_vt1724_spdif_info, |
1650 | .get = snd_vt1724_spdif_maskc_get, | |
1651 | }; | |
1652 | ||
1b60f6b0 | 1653 | static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata = |
1da177e4 LT |
1654 | { |
1655 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
67ed4161 | 1656 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1de9fdc2 | 1657 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), |
1da177e4 LT |
1658 | .info = snd_vt1724_spdif_info, |
1659 | .get = snd_vt1724_spdif_maskp_get, | |
1660 | }; | |
1661 | ||
a5ce8890 | 1662 | #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info |
1da177e4 | 1663 | |
ab0c7d72 TI |
1664 | static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, |
1665 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1666 | { |
ab0c7d72 TI |
1667 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1668 | ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & | |
1669 | VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; | |
1da177e4 LT |
1670 | return 0; |
1671 | } | |
1672 | ||
ab0c7d72 TI |
1673 | static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, |
1674 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1675 | { |
ab0c7d72 | 1676 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1677 | unsigned char old, val; |
1678 | ||
1679 | spin_lock_irq(&ice->reg_lock); | |
1680 | old = val = inb(ICEREG1724(ice, SPDIF_CFG)); | |
1681 | val &= ~VT1724_CFG_SPDIF_OUT_EN; | |
1682 | if (ucontrol->value.integer.value[0]) | |
1683 | val |= VT1724_CFG_SPDIF_OUT_EN; | |
1684 | if (old != val) | |
1685 | outb(val, ICEREG1724(ice, SPDIF_CFG)); | |
1686 | spin_unlock_irq(&ice->reg_lock); | |
1687 | return old != val; | |
1688 | } | |
1689 | ||
1b60f6b0 | 1690 | static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata = |
1da177e4 LT |
1691 | { |
1692 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1693 | /* FIXME: the following conflict with IEC958 Playback Route */ | |
1de9fdc2 AB |
1694 | /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ |
1695 | .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), | |
1da177e4 LT |
1696 | .info = snd_vt1724_spdif_sw_info, |
1697 | .get = snd_vt1724_spdif_sw_get, | |
1698 | .put = snd_vt1724_spdif_sw_put | |
1699 | }; | |
1700 | ||
1701 | ||
1702 | #if 0 /* NOT USED YET */ | |
1703 | /* | |
1704 | * GPIO access from extern | |
1705 | */ | |
1706 | ||
a5ce8890 | 1707 | #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info |
1da177e4 | 1708 | |
ab0c7d72 TI |
1709 | int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, |
1710 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1711 | { |
ab0c7d72 | 1712 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1713 | int shift = kcontrol->private_value & 0xff; |
1714 | int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; | |
1de9fdc2 | 1715 | |
1da177e4 | 1716 | snd_ice1712_save_gpio_status(ice); |
ab0c7d72 TI |
1717 | ucontrol->value.integer.value[0] = |
1718 | (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; | |
1da177e4 LT |
1719 | snd_ice1712_restore_gpio_status(ice); |
1720 | return 0; | |
1721 | } | |
1722 | ||
ab0c7d72 TI |
1723 | int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, |
1724 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1725 | { |
ab0c7d72 | 1726 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1727 | int shift = kcontrol->private_value & 0xff; |
1728 | int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; | |
1729 | unsigned int val, nval; | |
1730 | ||
1731 | if (kcontrol->private_value & (1 << 31)) | |
1732 | return -EPERM; | |
1733 | nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; | |
1734 | snd_ice1712_save_gpio_status(ice); | |
1735 | val = snd_ice1712_gpio_read(ice); | |
1736 | nval |= val & ~(1 << shift); | |
1737 | if (val != nval) | |
1738 | snd_ice1712_gpio_write(ice, nval); | |
1739 | snd_ice1712_restore_gpio_status(ice); | |
1740 | return val != nval; | |
1741 | } | |
1742 | #endif /* NOT USED YET */ | |
1743 | ||
1744 | /* | |
1745 | * rate | |
1746 | */ | |
ab0c7d72 TI |
1747 | static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, |
1748 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 1749 | { |
ab0c7d72 | 1750 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1751 | |
1752 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1753 | uinfo->count = 1; | |
d16be8ed | 1754 | uinfo->value.enumerated.items = ice->hw_rates->count + 1; |
1da177e4 LT |
1755 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) |
1756 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
d16be8ed PH |
1757 | if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1) |
1758 | strcpy(uinfo->value.enumerated.name, "IEC958 Input"); | |
1759 | else | |
1760 | sprintf(uinfo->value.enumerated.name, "%d", | |
1761 | ice->hw_rates->list[uinfo->value.enumerated.item]); | |
1da177e4 LT |
1762 | return 0; |
1763 | } | |
1764 | ||
ab0c7d72 TI |
1765 | static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, |
1766 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1767 | { |
ab0c7d72 | 1768 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
d16be8ed | 1769 | unsigned int i, rate; |
1de9fdc2 | 1770 | |
1da177e4 | 1771 | spin_lock_irq(&ice->reg_lock); |
d16be8ed PH |
1772 | if (ice->is_spdif_master(ice)) { |
1773 | ucontrol->value.enumerated.item[0] = ice->hw_rates->count; | |
1da177e4 | 1774 | } else { |
d16be8ed PH |
1775 | rate = ice->get_rate(ice); |
1776 | ucontrol->value.enumerated.item[0] = 0; | |
1777 | for (i = 0; i < ice->hw_rates->count; i++) { | |
1778 | if (ice->hw_rates->list[i] == rate) { | |
1779 | ucontrol->value.enumerated.item[0] = i; | |
1780 | break; | |
1781 | } | |
1da177e4 | 1782 | } |
1da177e4 LT |
1783 | } |
1784 | spin_unlock_irq(&ice->reg_lock); | |
1785 | return 0; | |
1786 | } | |
1787 | ||
d16be8ed PH |
1788 | /* setting clock to external - SPDIF */ |
1789 | static void stdclock_set_spdif_clock(struct snd_ice1712 *ice) | |
1790 | { | |
1791 | unsigned char oval; | |
1792 | unsigned char i2s_oval; | |
1793 | oval = inb(ICEMT1724(ice, RATE)); | |
1794 | outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); | |
1795 | /* setting 256fs */ | |
1796 | i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); | |
1797 | outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); | |
1798 | } | |
1799 | ||
ab0c7d72 TI |
1800 | static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, |
1801 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1802 | { |
ab0c7d72 | 1803 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
d16be8ed PH |
1804 | unsigned int old_rate, new_rate; |
1805 | unsigned int item = ucontrol->value.enumerated.item[0]; | |
1806 | unsigned int spdif = ice->hw_rates->count; | |
1807 | ||
1808 | if (item > spdif) | |
1809 | return -EINVAL; | |
1da177e4 LT |
1810 | |
1811 | spin_lock_irq(&ice->reg_lock); | |
d16be8ed PH |
1812 | if (ice->is_spdif_master(ice)) |
1813 | old_rate = 0; | |
1814 | else | |
1815 | old_rate = ice->get_rate(ice); | |
1816 | if (item == spdif) { | |
1817 | /* switching to external clock via SPDIF */ | |
1818 | ice->set_spdif_clock(ice); | |
1819 | new_rate = 0; | |
1da177e4 | 1820 | } else { |
d16be8ed PH |
1821 | /* internal on-card clock */ |
1822 | new_rate = ice->hw_rates->list[item]; | |
1823 | ice->pro_rate_default = new_rate; | |
1824 | spin_unlock_irq(&ice->reg_lock); | |
1825 | snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); | |
1826 | spin_lock_irq(&ice->reg_lock); | |
1da177e4 | 1827 | } |
1da177e4 LT |
1828 | spin_unlock_irq(&ice->reg_lock); |
1829 | ||
d16be8ed PH |
1830 | /* the first reset to the SPDIF master mode? */ |
1831 | if (old_rate != new_rate && !new_rate) { | |
1da177e4 | 1832 | /* notify akm chips as well */ |
d16be8ed PH |
1833 | unsigned int i; |
1834 | if (ice->gpio.set_pro_rate) | |
1835 | ice->gpio.set_pro_rate(ice, 0); | |
1836 | for (i = 0; i < ice->akm_codecs; i++) { | |
1837 | if (ice->akm[i].ops.set_rate_val) | |
1838 | ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); | |
1da177e4 LT |
1839 | } |
1840 | } | |
d16be8ed | 1841 | return old_rate != new_rate; |
1da177e4 LT |
1842 | } |
1843 | ||
1b60f6b0 | 1844 | static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { |
1da177e4 LT |
1845 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1846 | .name = "Multi Track Internal Clock", | |
1847 | .info = snd_vt1724_pro_internal_clock_info, | |
1848 | .get = snd_vt1724_pro_internal_clock_get, | |
1849 | .put = snd_vt1724_pro_internal_clock_put | |
1850 | }; | |
1851 | ||
a5ce8890 | 1852 | #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info |
1da177e4 | 1853 | |
ab0c7d72 TI |
1854 | static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, |
1855 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1856 | { |
1857 | ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; | |
1858 | return 0; | |
1859 | } | |
1860 | ||
ab0c7d72 TI |
1861 | static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, |
1862 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1863 | { |
ab0c7d72 | 1864 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1865 | int change = 0, nval; |
1866 | ||
1867 | nval = ucontrol->value.integer.value[0] ? 1 : 0; | |
1868 | spin_lock_irq(&ice->reg_lock); | |
1869 | change = PRO_RATE_LOCKED != nval; | |
1870 | PRO_RATE_LOCKED = nval; | |
1871 | spin_unlock_irq(&ice->reg_lock); | |
1872 | return change; | |
1873 | } | |
1874 | ||
1b60f6b0 | 1875 | static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = { |
1da177e4 LT |
1876 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1877 | .name = "Multi Track Rate Locking", | |
1878 | .info = snd_vt1724_pro_rate_locking_info, | |
1879 | .get = snd_vt1724_pro_rate_locking_get, | |
1880 | .put = snd_vt1724_pro_rate_locking_put | |
1881 | }; | |
1882 | ||
a5ce8890 | 1883 | #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info |
1da177e4 | 1884 | |
ab0c7d72 TI |
1885 | static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, |
1886 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1887 | { |
1888 | ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; | |
1889 | return 0; | |
1890 | } | |
1891 | ||
ab0c7d72 TI |
1892 | static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, |
1893 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1894 | { |
ab0c7d72 | 1895 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1896 | int change = 0, nval; |
1897 | ||
1898 | nval = ucontrol->value.integer.value[0] ? 1 : 0; | |
1899 | spin_lock_irq(&ice->reg_lock); | |
1900 | change = PRO_RATE_RESET != nval; | |
1901 | PRO_RATE_RESET = nval; | |
1902 | spin_unlock_irq(&ice->reg_lock); | |
1903 | return change; | |
1904 | } | |
1905 | ||
1b60f6b0 | 1906 | static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = { |
1da177e4 LT |
1907 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1908 | .name = "Multi Track Rate Reset", | |
1909 | .info = snd_vt1724_pro_rate_reset_info, | |
1910 | .get = snd_vt1724_pro_rate_reset_get, | |
1911 | .put = snd_vt1724_pro_rate_reset_put | |
1912 | }; | |
1913 | ||
1914 | ||
1915 | /* | |
1916 | * routing | |
1917 | */ | |
ab0c7d72 TI |
1918 | static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, |
1919 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1920 | { |
1921 | static char *texts[] = { | |
1922 | "PCM Out", /* 0 */ | |
1923 | "H/W In 0", "H/W In 1", /* 1-2 */ | |
1924 | "IEC958 In L", "IEC958 In R", /* 3-4 */ | |
1925 | }; | |
1de9fdc2 | 1926 | |
1da177e4 LT |
1927 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
1928 | uinfo->count = 1; | |
1929 | uinfo->value.enumerated.items = 5; | |
1930 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1931 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1932 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1933 | return 0; | |
1934 | } | |
1935 | ||
1936 | static inline int analog_route_shift(int idx) | |
1937 | { | |
1938 | return (idx % 2) * 12 + ((idx / 2) * 3) + 8; | |
1939 | } | |
1940 | ||
1941 | static inline int digital_route_shift(int idx) | |
1942 | { | |
1943 | return idx * 3; | |
1944 | } | |
1945 | ||
ab0c7d72 | 1946 | static int get_route_val(struct snd_ice1712 *ice, int shift) |
1da177e4 LT |
1947 | { |
1948 | unsigned long val; | |
1949 | unsigned char eitem; | |
32b47da0 | 1950 | static const unsigned char xlate[8] = { |
1da177e4 LT |
1951 | 0, 255, 1, 2, 255, 255, 3, 4, |
1952 | }; | |
1953 | ||
1954 | val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1955 | val >>= shift; | |
1de9fdc2 | 1956 | val &= 7; /* we now have 3 bits per output */ |
1da177e4 LT |
1957 | eitem = xlate[val]; |
1958 | if (eitem == 255) { | |
1959 | snd_BUG(); | |
1960 | return 0; | |
1961 | } | |
1962 | return eitem; | |
1963 | } | |
1964 | ||
ab0c7d72 | 1965 | static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift) |
1da177e4 LT |
1966 | { |
1967 | unsigned int old_val, nval; | |
1968 | int change; | |
32b47da0 | 1969 | static const unsigned char xroute[8] = { |
1da177e4 LT |
1970 | 0, /* PCM */ |
1971 | 2, /* PSDIN0 Left */ | |
1972 | 3, /* PSDIN0 Right */ | |
1973 | 6, /* SPDIN Left */ | |
1974 | 7, /* SPDIN Right */ | |
1975 | }; | |
1976 | ||
1977 | nval = xroute[val % 5]; | |
1978 | val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1979 | val &= ~(0x07 << shift); | |
1980 | val |= nval << shift; | |
1981 | change = val != old_val; | |
1982 | if (change) | |
1983 | outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1984 | return change; | |
1985 | } | |
1986 | ||
ab0c7d72 TI |
1987 | static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, |
1988 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1989 | { |
ab0c7d72 | 1990 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1991 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
ab0c7d72 TI |
1992 | ucontrol->value.enumerated.item[0] = |
1993 | get_route_val(ice, analog_route_shift(idx)); | |
1da177e4 LT |
1994 | return 0; |
1995 | } | |
1996 | ||
ab0c7d72 TI |
1997 | static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, |
1998 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1999 | { |
ab0c7d72 | 2000 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
2001 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
2002 | return put_route_val(ice, ucontrol->value.enumerated.item[0], | |
2003 | analog_route_shift(idx)); | |
2004 | } | |
2005 | ||
ab0c7d72 TI |
2006 | static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, |
2007 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 2008 | { |
ab0c7d72 | 2009 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 2010 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
ab0c7d72 TI |
2011 | ucontrol->value.enumerated.item[0] = |
2012 | get_route_val(ice, digital_route_shift(idx)); | |
1da177e4 LT |
2013 | return 0; |
2014 | } | |
2015 | ||
ab0c7d72 TI |
2016 | static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, |
2017 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 2018 | { |
ab0c7d72 | 2019 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
2020 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
2021 | return put_route_val(ice, ucontrol->value.enumerated.item[0], | |
2022 | digital_route_shift(idx)); | |
2023 | } | |
2024 | ||
1b60f6b0 | 2025 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = { |
1da177e4 LT |
2026 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
2027 | .name = "H/W Playback Route", | |
2028 | .info = snd_vt1724_pro_route_info, | |
2029 | .get = snd_vt1724_pro_route_analog_get, | |
2030 | .put = snd_vt1724_pro_route_analog_put, | |
2031 | }; | |
2032 | ||
1b60f6b0 | 2033 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = { |
1da177e4 | 2034 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1de9fdc2 | 2035 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", |
1da177e4 LT |
2036 | .info = snd_vt1724_pro_route_info, |
2037 | .get = snd_vt1724_pro_route_spdif_get, | |
2038 | .put = snd_vt1724_pro_route_spdif_put, | |
2039 | .count = 2, | |
2040 | }; | |
2041 | ||
2042 | ||
ab0c7d72 TI |
2043 | static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, |
2044 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
2045 | { |
2046 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
2047 | uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ | |
2048 | uinfo->value.integer.min = 0; | |
2049 | uinfo->value.integer.max = 255; | |
2050 | return 0; | |
2051 | } | |
2052 | ||
ab0c7d72 TI |
2053 | static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, |
2054 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 2055 | { |
ab0c7d72 | 2056 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 2057 | int idx; |
1de9fdc2 | 2058 | |
1da177e4 LT |
2059 | spin_lock_irq(&ice->reg_lock); |
2060 | for (idx = 0; idx < 22; idx++) { | |
2061 | outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); | |
ab0c7d72 TI |
2062 | ucontrol->value.integer.value[idx] = |
2063 | inb(ICEMT1724(ice, MONITOR_PEAKDATA)); | |
1da177e4 LT |
2064 | } |
2065 | spin_unlock_irq(&ice->reg_lock); | |
2066 | return 0; | |
2067 | } | |
2068 | ||
1b60f6b0 | 2069 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = { |
1da177e4 LT |
2070 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
2071 | .name = "Multi Track Peak", | |
2072 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
2073 | .info = snd_vt1724_pro_peak_info, | |
2074 | .get = snd_vt1724_pro_peak_get | |
2075 | }; | |
2076 | ||
2077 | /* | |
2078 | * | |
2079 | */ | |
2080 | ||
1b60f6b0 | 2081 | static struct snd_ice1712_card_info no_matched __devinitdata; |
1da177e4 | 2082 | |
1b60f6b0 | 2083 | static struct snd_ice1712_card_info *card_tables[] __devinitdata = { |
1da177e4 | 2084 | snd_vt1724_revo_cards, |
1de9fdc2 | 2085 | snd_vt1724_amp_cards, |
1da177e4 LT |
2086 | snd_vt1724_aureon_cards, |
2087 | snd_vt1720_mobo_cards, | |
2088 | snd_vt1720_pontis_cards, | |
6b8d6e55 | 2089 | snd_vt1724_prodigy_hifi_cards, |
1da177e4 LT |
2090 | snd_vt1724_prodigy192_cards, |
2091 | snd_vt1724_juli_cards, | |
2092 | snd_vt1724_phase_cards, | |
f6cdab5f | 2093 | snd_vt1724_wtm_cards, |
f31639b8 | 2094 | snd_vt1724_se_cards, |
1da177e4 LT |
2095 | NULL, |
2096 | }; | |
2097 | ||
2098 | ||
2099 | /* | |
2100 | */ | |
2101 | ||
ab0c7d72 | 2102 | static void wait_i2c_busy(struct snd_ice1712 *ice) |
1da177e4 LT |
2103 | { |
2104 | int t = 0x10000; | |
2105 | while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) | |
2106 | ; | |
2107 | if (t == -1) | |
2108 | printk(KERN_ERR "ice1724: i2c busy timeout\n"); | |
2109 | } | |
2110 | ||
ab0c7d72 TI |
2111 | unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, |
2112 | unsigned char dev, unsigned char addr) | |
1da177e4 LT |
2113 | { |
2114 | unsigned char val; | |
2115 | ||
62932df8 | 2116 | mutex_lock(&ice->i2c_mutex); |
acec30ff | 2117 | wait_i2c_busy(ice); |
1da177e4 LT |
2118 | outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); |
2119 | outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); | |
2120 | wait_i2c_busy(ice); | |
2121 | val = inb(ICEREG1724(ice, I2C_DATA)); | |
62932df8 | 2122 | mutex_unlock(&ice->i2c_mutex); |
1de9fdc2 | 2123 | /* printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); */ |
1da177e4 LT |
2124 | return val; |
2125 | } | |
2126 | ||
ab0c7d72 TI |
2127 | void snd_vt1724_write_i2c(struct snd_ice1712 *ice, |
2128 | unsigned char dev, unsigned char addr, unsigned char data) | |
1da177e4 | 2129 | { |
62932df8 | 2130 | mutex_lock(&ice->i2c_mutex); |
1da177e4 | 2131 | wait_i2c_busy(ice); |
1de9fdc2 | 2132 | /* printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); */ |
1da177e4 LT |
2133 | outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); |
2134 | outb(data, ICEREG1724(ice, I2C_DATA)); | |
2135 | outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); | |
2136 | wait_i2c_busy(ice); | |
62932df8 | 2137 | mutex_unlock(&ice->i2c_mutex); |
1da177e4 LT |
2138 | } |
2139 | ||
ab0c7d72 TI |
2140 | static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice, |
2141 | const char *modelname) | |
1da177e4 LT |
2142 | { |
2143 | const int dev = 0xa0; /* EEPROM device address */ | |
2144 | unsigned int i, size; | |
1b60f6b0 | 2145 | struct snd_ice1712_card_info * const *tbl, *c; |
1da177e4 | 2146 | |
1de9fdc2 | 2147 | if (!modelname || !*modelname) { |
1da177e4 LT |
2148 | ice->eeprom.subvendor = 0; |
2149 | if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) | |
2150 | ice->eeprom.subvendor = | |
2151 | (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | | |
1de9fdc2 AB |
2152 | (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | |
2153 | (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | | |
1da177e4 | 2154 | (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); |
ab0c7d72 TI |
2155 | if (ice->eeprom.subvendor == 0 || |
2156 | ice->eeprom.subvendor == (unsigned int)-1) { | |
2157 | /* invalid subvendor from EEPROM, try the PCI | |
2158 | * subststem ID instead | |
2159 | */ | |
1da177e4 | 2160 | u16 vendor, device; |
ab0c7d72 TI |
2161 | pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, |
2162 | &vendor); | |
1da177e4 | 2163 | pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); |
ab0c7d72 TI |
2164 | ice->eeprom.subvendor = |
2165 | ((unsigned int)swab16(vendor) << 16) | swab16(device); | |
2166 | if (ice->eeprom.subvendor == 0 || | |
2167 | ice->eeprom.subvendor == (unsigned int)-1) { | |
1da177e4 LT |
2168 | printk(KERN_ERR "ice1724: No valid ID is found\n"); |
2169 | return -ENXIO; | |
2170 | } | |
2171 | } | |
2172 | } | |
2173 | for (tbl = card_tables; *tbl; tbl++) { | |
2174 | for (c = *tbl; c->subvendor; c++) { | |
ab0c7d72 | 2175 | if (modelname && c->model && |
1de9fdc2 | 2176 | !strcmp(modelname, c->model)) { |
ab0c7d72 TI |
2177 | printk(KERN_INFO "ice1724: Using board model %s\n", |
2178 | c->name); | |
1da177e4 LT |
2179 | ice->eeprom.subvendor = c->subvendor; |
2180 | } else if (c->subvendor != ice->eeprom.subvendor) | |
2181 | continue; | |
1de9fdc2 | 2182 | if (!c->eeprom_size || !c->eeprom_data) |
1da177e4 LT |
2183 | goto found; |
2184 | /* if the EEPROM is given by the driver, use it */ | |
2185 | snd_printdd("using the defined eeprom..\n"); | |
2186 | ice->eeprom.version = 2; | |
2187 | ice->eeprom.size = c->eeprom_size + 6; | |
2188 | memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); | |
2189 | goto read_skipped; | |
2190 | } | |
2191 | } | |
ab0c7d72 TI |
2192 | printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", |
2193 | ice->eeprom.subvendor); | |
1da177e4 LT |
2194 | |
2195 | found: | |
2196 | ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); | |
2197 | if (ice->eeprom.size < 6) | |
2198 | ice->eeprom.size = 32; | |
2199 | else if (ice->eeprom.size > 32) { | |
ab0c7d72 TI |
2200 | printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", |
2201 | ice->eeprom.size); | |
1da177e4 LT |
2202 | return -EIO; |
2203 | } | |
2204 | ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); | |
2205 | if (ice->eeprom.version != 2) | |
ab0c7d72 TI |
2206 | printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", |
2207 | ice->eeprom.version); | |
1da177e4 LT |
2208 | size = ice->eeprom.size - 6; |
2209 | for (i = 0; i < size; i++) | |
2210 | ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); | |
2211 | ||
2212 | read_skipped: | |
2213 | ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); | |
2214 | ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); | |
2215 | ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); | |
2216 | ||
2217 | return 0; | |
2218 | } | |
2219 | ||
2220 | ||
2221 | ||
988f0664 | 2222 | static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice) |
1da177e4 LT |
2223 | { |
2224 | outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); | |
988f0664 | 2225 | msleep(10); |
1da177e4 | 2226 | outb(0, ICEREG1724(ice, CONTROL)); |
988f0664 KW |
2227 | msleep(10); |
2228 | } | |
2229 | ||
2230 | static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice) | |
2231 | { | |
1da177e4 LT |
2232 | outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); |
2233 | outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); | |
2234 | outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); | |
2235 | outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); | |
2236 | ||
2237 | ice->gpio.write_mask = ice->eeprom.gpiomask; | |
2238 | ice->gpio.direction = ice->eeprom.gpiodir; | |
2239 | snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); | |
2240 | snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); | |
2241 | snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); | |
2242 | ||
2243 | outb(0, ICEREG1724(ice, POWERDOWN)); | |
2244 | ||
2245 | return 0; | |
2246 | } | |
2247 | ||
ab0c7d72 | 2248 | static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) |
1da177e4 LT |
2249 | { |
2250 | int err; | |
ab0c7d72 | 2251 | struct snd_kcontrol *kctl; |
1da177e4 | 2252 | |
da3cec35 TI |
2253 | if (snd_BUG_ON(!ice->pcm)) |
2254 | return -EIO; | |
1da177e4 LT |
2255 | |
2256 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); | |
2257 | if (err < 0) | |
2258 | return err; | |
2259 | ||
2260 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); | |
2261 | if (err < 0) | |
2262 | return err; | |
2263 | ||
2264 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); | |
2265 | if (err < 0) | |
2266 | return err; | |
2267 | kctl->id.device = ice->pcm->device; | |
2268 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); | |
2269 | if (err < 0) | |
2270 | return err; | |
2271 | kctl->id.device = ice->pcm->device; | |
2272 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); | |
2273 | if (err < 0) | |
2274 | return err; | |
2275 | kctl->id.device = ice->pcm->device; | |
2276 | #if 0 /* use default only */ | |
2277 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); | |
2278 | if (err < 0) | |
2279 | return err; | |
2280 | kctl->id.device = ice->pcm->device; | |
2281 | ice->spdif.stream_ctl = kctl; | |
2282 | #endif | |
2283 | return 0; | |
2284 | } | |
2285 | ||
2286 | ||
ab0c7d72 | 2287 | static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice) |
1da177e4 LT |
2288 | { |
2289 | int err; | |
2290 | ||
2291 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); | |
2292 | if (err < 0) | |
2293 | return err; | |
2294 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); | |
2295 | if (err < 0) | |
2296 | return err; | |
2297 | ||
2298 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); | |
2299 | if (err < 0) | |
2300 | return err; | |
2301 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); | |
2302 | if (err < 0) | |
2303 | return err; | |
2304 | ||
2305 | if (ice->num_total_dacs > 0) { | |
ab0c7d72 | 2306 | struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; |
1da177e4 LT |
2307 | tmp.count = ice->num_total_dacs; |
2308 | if (ice->vt1720 && tmp.count > 2) | |
2309 | tmp.count = 2; | |
2310 | err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); | |
2311 | if (err < 0) | |
2312 | return err; | |
2313 | } | |
2314 | ||
2315 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); | |
2316 | if (err < 0) | |
2317 | return err; | |
2318 | ||
2319 | return 0; | |
2320 | } | |
2321 | ||
ab0c7d72 | 2322 | static int snd_vt1724_free(struct snd_ice1712 *ice) |
1da177e4 | 2323 | { |
1de9fdc2 | 2324 | if (!ice->port) |
1da177e4 LT |
2325 | goto __hw_end; |
2326 | /* mask all interrupts */ | |
2327 | outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); | |
2328 | outb(0xff, ICEREG1724(ice, IRQMASK)); | |
2329 | /* --- */ | |
1de9fdc2 | 2330 | __hw_end: |
f000fd80 | 2331 | if (ice->irq >= 0) |
ab0c7d72 | 2332 | free_irq(ice->irq, ice); |
1da177e4 LT |
2333 | pci_release_regions(ice->pci); |
2334 | snd_ice1712_akm4xxx_free(ice); | |
2335 | pci_disable_device(ice->pci); | |
7cda8ba9 | 2336 | kfree(ice->spec); |
1da177e4 LT |
2337 | kfree(ice); |
2338 | return 0; | |
2339 | } | |
2340 | ||
ab0c7d72 | 2341 | static int snd_vt1724_dev_free(struct snd_device *device) |
1da177e4 | 2342 | { |
ab0c7d72 | 2343 | struct snd_ice1712 *ice = device->device_data; |
1da177e4 LT |
2344 | return snd_vt1724_free(ice); |
2345 | } | |
2346 | ||
ab0c7d72 | 2347 | static int __devinit snd_vt1724_create(struct snd_card *card, |
1da177e4 LT |
2348 | struct pci_dev *pci, |
2349 | const char *modelname, | |
1de9fdc2 | 2350 | struct snd_ice1712 **r_ice1712) |
1da177e4 | 2351 | { |
ab0c7d72 | 2352 | struct snd_ice1712 *ice; |
1da177e4 LT |
2353 | int err; |
2354 | unsigned char mask; | |
ab0c7d72 | 2355 | static struct snd_device_ops ops = { |
1da177e4 LT |
2356 | .dev_free = snd_vt1724_dev_free, |
2357 | }; | |
2358 | ||
2359 | *r_ice1712 = NULL; | |
2360 | ||
1de9fdc2 AB |
2361 | /* enable PCI device */ |
2362 | err = pci_enable_device(pci); | |
2363 | if (err < 0) | |
1da177e4 LT |
2364 | return err; |
2365 | ||
e560d8d8 | 2366 | ice = kzalloc(sizeof(*ice), GFP_KERNEL); |
1da177e4 LT |
2367 | if (ice == NULL) { |
2368 | pci_disable_device(pci); | |
2369 | return -ENOMEM; | |
2370 | } | |
2371 | ice->vt1724 = 1; | |
2372 | spin_lock_init(&ice->reg_lock); | |
62932df8 IM |
2373 | mutex_init(&ice->gpio_mutex); |
2374 | mutex_init(&ice->open_mutex); | |
2375 | mutex_init(&ice->i2c_mutex); | |
1da177e4 LT |
2376 | ice->gpio.set_mask = snd_vt1724_set_gpio_mask; |
2377 | ice->gpio.set_dir = snd_vt1724_set_gpio_dir; | |
2378 | ice->gpio.set_data = snd_vt1724_set_gpio_data; | |
2379 | ice->gpio.get_data = snd_vt1724_get_gpio_data; | |
2380 | ice->card = card; | |
2381 | ice->pci = pci; | |
2382 | ice->irq = -1; | |
2383 | pci_set_master(pci); | |
2384 | snd_vt1724_proc_init(ice); | |
2385 | synchronize_irq(pci->irq); | |
2386 | ||
1de9fdc2 AB |
2387 | err = pci_request_regions(pci, "ICE1724"); |
2388 | if (err < 0) { | |
1da177e4 LT |
2389 | kfree(ice); |
2390 | pci_disable_device(pci); | |
2391 | return err; | |
2392 | } | |
2393 | ice->port = pci_resource_start(pci, 0); | |
2394 | ice->profi_port = pci_resource_start(pci, 1); | |
2395 | ||
ab0c7d72 | 2396 | if (request_irq(pci->irq, snd_vt1724_interrupt, |
437a5a46 | 2397 | IRQF_SHARED, "ICE1724", ice)) { |
99b359ba | 2398 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
2399 | snd_vt1724_free(ice); |
2400 | return -EIO; | |
2401 | } | |
2402 | ||
2403 | ice->irq = pci->irq; | |
2404 | ||
988f0664 | 2405 | snd_vt1724_chip_reset(ice); |
1da177e4 LT |
2406 | if (snd_vt1724_read_eeprom(ice, modelname) < 0) { |
2407 | snd_vt1724_free(ice); | |
2408 | return -EIO; | |
2409 | } | |
2410 | if (snd_vt1724_chip_init(ice) < 0) { | |
2411 | snd_vt1724_free(ice); | |
2412 | return -EIO; | |
2413 | } | |
2414 | ||
2415 | /* unmask used interrupts */ | |
3a841d51 | 2416 | mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX; |
1da177e4 | 2417 | outb(mask, ICEREG1724(ice, IRQMASK)); |
ab0c7d72 TI |
2418 | /* don't handle FIFO overrun/underruns (just yet), |
2419 | * since they cause machine lockups | |
2420 | */ | |
1da177e4 LT |
2421 | outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); |
2422 | ||
1de9fdc2 AB |
2423 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); |
2424 | if (err < 0) { | |
1da177e4 | 2425 | snd_vt1724_free(ice); |
1de9fdc2 | 2426 | return err; |
1da177e4 LT |
2427 | } |
2428 | ||
2429 | snd_card_set_dev(card, &pci->dev); | |
2430 | ||
2431 | *r_ice1712 = ice; | |
2432 | return 0; | |
2433 | } | |
2434 | ||
2435 | ||
2436 | /* | |
2437 | * | |
2438 | * Registration | |
2439 | * | |
2440 | */ | |
2441 | ||
2442 | static int __devinit snd_vt1724_probe(struct pci_dev *pci, | |
2443 | const struct pci_device_id *pci_id) | |
2444 | { | |
2445 | static int dev; | |
ab0c7d72 TI |
2446 | struct snd_card *card; |
2447 | struct snd_ice1712 *ice; | |
1da177e4 | 2448 | int pcm_dev = 0, err; |
1b60f6b0 | 2449 | struct snd_ice1712_card_info * const *tbl, *c; |
1da177e4 LT |
2450 | |
2451 | if (dev >= SNDRV_CARDS) | |
2452 | return -ENODEV; | |
2453 | if (!enable[dev]) { | |
2454 | dev++; | |
2455 | return -ENOENT; | |
2456 | } | |
2457 | ||
2458 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | |
2459 | if (card == NULL) | |
2460 | return -ENOMEM; | |
2461 | ||
2462 | strcpy(card->driver, "ICE1724"); | |
2463 | strcpy(card->shortname, "ICEnsemble ICE1724"); | |
1de9fdc2 AB |
2464 | |
2465 | err = snd_vt1724_create(card, pci, model[dev], &ice); | |
2466 | if (err < 0) { | |
1da177e4 LT |
2467 | snd_card_free(card); |
2468 | return err; | |
2469 | } | |
2470 | ||
2471 | for (tbl = card_tables; *tbl; tbl++) { | |
2472 | for (c = *tbl; c->subvendor; c++) { | |
2473 | if (c->subvendor == ice->eeprom.subvendor) { | |
2474 | strcpy(card->shortname, c->name); | |
2475 | if (c->driver) /* specific driver? */ | |
2476 | strcpy(card->driver, c->driver); | |
2477 | if (c->chip_init) { | |
1de9fdc2 AB |
2478 | err = c->chip_init(ice); |
2479 | if (err < 0) { | |
1da177e4 LT |
2480 | snd_card_free(card); |
2481 | return err; | |
2482 | } | |
2483 | } | |
2484 | goto __found; | |
2485 | } | |
2486 | } | |
2487 | } | |
2488 | c = &no_matched; | |
1de9fdc2 AB |
2489 | __found: |
2490 | /* | |
2491 | * VT1724 has separate DMAs for the analog and the SPDIF streams while | |
2492 | * ICE1712 has only one for both (mixed up). | |
2493 | * | |
2494 | * Confusingly the analog PCM is named "professional" here because it | |
2495 | * was called so in ice1712 driver, and vt1724 driver is derived from | |
2496 | * ice1712 driver. | |
2497 | */ | |
d16be8ed PH |
2498 | ice->pro_rate_default = PRO_RATE_DEFAULT; |
2499 | if (!ice->is_spdif_master) | |
2500 | ice->is_spdif_master = stdclock_is_spdif_master; | |
2501 | if (!ice->get_rate) | |
2502 | ice->get_rate = stdclock_get_rate; | |
2503 | if (!ice->set_rate) | |
2504 | ice->set_rate = stdclock_set_rate; | |
2505 | if (!ice->set_mclk) | |
2506 | ice->set_mclk = stdclock_set_mclk; | |
2507 | if (!ice->set_spdif_clock) | |
2508 | ice->set_spdif_clock = stdclock_set_spdif_clock; | |
2509 | if (!ice->hw_rates) | |
2510 | set_std_hw_rates(ice); | |
1da177e4 | 2511 | |
1de9fdc2 AB |
2512 | err = snd_vt1724_pcm_profi(ice, pcm_dev++); |
2513 | if (err < 0) { | |
1da177e4 LT |
2514 | snd_card_free(card); |
2515 | return err; | |
2516 | } | |
1de9fdc2 AB |
2517 | |
2518 | err = snd_vt1724_pcm_spdif(ice, pcm_dev++); | |
2519 | if (err < 0) { | |
1da177e4 LT |
2520 | snd_card_free(card); |
2521 | return err; | |
2522 | } | |
1de9fdc2 AB |
2523 | |
2524 | err = snd_vt1724_pcm_indep(ice, pcm_dev++); | |
2525 | if (err < 0) { | |
1da177e4 LT |
2526 | snd_card_free(card); |
2527 | return err; | |
2528 | } | |
2529 | ||
1de9fdc2 AB |
2530 | err = snd_vt1724_ac97_mixer(ice); |
2531 | if (err < 0) { | |
1da177e4 LT |
2532 | snd_card_free(card); |
2533 | return err; | |
2534 | } | |
2535 | ||
1de9fdc2 AB |
2536 | err = snd_vt1724_build_controls(ice); |
2537 | if (err < 0) { | |
1da177e4 LT |
2538 | snd_card_free(card); |
2539 | return err; | |
2540 | } | |
2541 | ||
2542 | if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ | |
1de9fdc2 AB |
2543 | err = snd_vt1724_spdif_build_controls(ice); |
2544 | if (err < 0) { | |
1da177e4 LT |
2545 | snd_card_free(card); |
2546 | return err; | |
2547 | } | |
2548 | } | |
2549 | ||
2550 | if (c->build_controls) { | |
1de9fdc2 AB |
2551 | err = c->build_controls(ice); |
2552 | if (err < 0) { | |
1da177e4 LT |
2553 | snd_card_free(card); |
2554 | return err; | |
2555 | } | |
2556 | } | |
2557 | ||
1de9fdc2 | 2558 | if (!c->no_mpu401) { |
1da177e4 | 2559 | if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { |
aea3bfbc CL |
2560 | struct snd_rawmidi *rmidi; |
2561 | ||
2562 | err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); | |
2563 | if (err < 0) { | |
1da177e4 LT |
2564 | snd_card_free(card); |
2565 | return err; | |
2566 | } | |
aea3bfbc CL |
2567 | ice->rmidi[0] = rmidi; |
2568 | rmidi->private_data = ice; | |
2569 | strcpy(rmidi->name, "ICE1724 MIDI"); | |
2570 | rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | | |
2571 | SNDRV_RAWMIDI_INFO_INPUT | | |
2572 | SNDRV_RAWMIDI_INFO_DUPLEX; | |
2573 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, | |
2574 | &vt1724_midi_output_ops); | |
2575 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, | |
2576 | &vt1724_midi_input_ops); | |
2577 | ||
3a841d51 TI |
2578 | /* set watermarks */ |
2579 | outb(VT1724_MPU_RX_FIFO | 0x1, | |
2580 | ICEREG1724(ice, MPU_FIFO_WM)); | |
2581 | outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); | |
aea3bfbc CL |
2582 | /* set UART mode */ |
2583 | outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); | |
1da177e4 LT |
2584 | } |
2585 | } | |
2586 | ||
2587 | sprintf(card->longname, "%s at 0x%lx, irq %i", | |
2588 | card->shortname, ice->port, ice->irq); | |
2589 | ||
1de9fdc2 AB |
2590 | err = snd_card_register(card); |
2591 | if (err < 0) { | |
1da177e4 LT |
2592 | snd_card_free(card); |
2593 | return err; | |
2594 | } | |
2595 | pci_set_drvdata(pci, card); | |
2596 | dev++; | |
2597 | return 0; | |
2598 | } | |
2599 | ||
2600 | static void __devexit snd_vt1724_remove(struct pci_dev *pci) | |
2601 | { | |
2602 | snd_card_free(pci_get_drvdata(pci)); | |
2603 | pci_set_drvdata(pci, NULL); | |
2604 | } | |
2605 | ||
2606 | static struct pci_driver driver = { | |
2607 | .name = "ICE1724", | |
2608 | .id_table = snd_vt1724_ids, | |
2609 | .probe = snd_vt1724_probe, | |
2610 | .remove = __devexit_p(snd_vt1724_remove), | |
2611 | }; | |
2612 | ||
2613 | static int __init alsa_card_ice1724_init(void) | |
2614 | { | |
01d25d46 | 2615 | return pci_register_driver(&driver); |
1da177e4 LT |
2616 | } |
2617 | ||
2618 | static void __exit alsa_card_ice1724_exit(void) | |
2619 | { | |
2620 | pci_unregister_driver(&driver); | |
2621 | } | |
2622 | ||
2623 | module_init(alsa_card_ice1724_init) | |
2624 | module_exit(alsa_card_ice1724_exit) |