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ALSA: ice1724 - Check error in set_rate function
[deliverable/linux.git] / sound / pci / ice1712 / ice1724.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
c1017a4c 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
1de9fdc2 23 */
1da177e4 24
1de9fdc2 25#include <linux/io.h>
1da177e4
LT		 26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/moduleparam.h>
62932df8 32#include <linux/mutex.h>
1da177e4
LT		 33#include <sound/core.h>
34#include <sound/info.h>
aea3bfbc 35#include <sound/rawmidi.h>
1da177e4
LT		 36#include <sound/initval.h>
37
38#include <sound/asoundef.h>
39
40#include "ice1712.h"
41#include "envy24ht.h"
42
43/* lowlevel routines */
44#include "amp.h"
45#include "revo.h"
46#include "aureon.h"
47#include "vt1720_mobo.h"
48#include "pontis.h"
49#include "prodigy192.h"
6b8d6e55 50#include "prodigy_hifi.h"
1da177e4
LT		 51#include "juli.h"
52#include "phase.h"
f6cdab5f 53#include "wtm.h"
f31639b8 54#include "se.h"
1da177e4 55
c1017a4c 56MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 57MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
58MODULE_LICENSE("GPL");
59MODULE_SUPPORTED_DEVICE("{"
60 REVO_DEVICE_DESC
61 AMP_AUDIO2000_DEVICE_DESC
62 AUREON_DEVICE_DESC
63 VT1720_MOBO_DEVICE_DESC
64 PONTIS_DEVICE_DESC
65 PRODIGY192_DEVICE_DESC
6b8d6e55 66 PRODIGY_HIFI_DEVICE_DESC
1da177e4
LT		 67 JULI_DEVICE_DESC
68 PHASE_DEVICE_DESC
f6cdab5f 69 WTM_DEVICE_DESC
f31639b8 70 SE_DEVICE_DESC
1da177e4
LT		 71 "{VIA,VT1720},"
72 "{VIA,VT1724},"
73 "{ICEnsemble,Generic ICE1724},"
74 "{ICEnsemble,Generic Envy24HT}"
75 "{ICEnsemble,Generic Envy24PT}}");
76
77static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
78static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
79static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
80static char *model[SNDRV_CARDS];
81
82module_param_array(index, int, NULL, 0444);
83MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
84module_param_array(id, charp, NULL, 0444);
85MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
86module_param_array(enable, bool, NULL, 0444);
87MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
88module_param_array(model, charp, NULL, 0444);
89MODULE_PARM_DESC(model, "Use the given board model.");
90
1da177e4
LT		 91
92/* Both VT1720 and VT1724 have the same PCI IDs */
32b47da0 93static const struct pci_device_id snd_vt1724_ids[] = {
1da177e4
LT		 94 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
95 { 0, }
96};
97
98MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
99
100
101static int PRO_RATE_LOCKED;
102static int PRO_RATE_RESET = 1;
103static unsigned int PRO_RATE_DEFAULT = 44100;
104
105/*
106 * Basic I/O
107 */
1de9fdc2 108
d16be8ed
PH		 109/*
110 * default rates, default clock routines
111 */
112
1da177e4 113/* check whether the clock mode is spdif-in */
d16be8ed 114static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 115{
116 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
117}
118
ab0c7d72 119static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4 120{
d16be8ed 121 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
1da177e4
LT		 122}
123
124/*
125 * ac97 section
126 */
127
ab0c7d72 128static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT		 129{
130 unsigned char old_cmd;
131 int tm;
132 for (tm = 0; tm < 0x10000; tm++) {
133 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
134 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
135 continue;
136 if (!(old_cmd & VT1724_AC97_READY))
137 continue;
138 return old_cmd;
139 }
140 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
141 return old_cmd;
142}
143
ab0c7d72 144static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT		 145{
146 int tm;
147 for (tm = 0; tm < 0x10000; tm++)
148 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
149 return 0;
150 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
151 return -EIO;
152}
153
ab0c7d72 154static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 155 unsigned short reg,
156 unsigned short val)
157{
ab0c7d72 158 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 159 unsigned char old_cmd;
160
161 old_cmd = snd_vt1724_ac97_ready(ice);
162 old_cmd &= ~VT1724_AC97_ID_MASK;
163 old_cmd |= ac97->num;
164 outb(reg, ICEMT1724(ice, AC97_INDEX));
165 outw(val, ICEMT1724(ice, AC97_DATA));
166 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
167 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
168}
169
ab0c7d72 170static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 171{
ab0c7d72 172 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 173 unsigned char old_cmd;
174
175 old_cmd = snd_vt1724_ac97_ready(ice);
176 old_cmd &= ~VT1724_AC97_ID_MASK;
177 old_cmd |= ac97->num;
178 outb(reg, ICEMT1724(ice, AC97_INDEX));
179 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
180 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
181 return ~0;
182 return inw(ICEMT1724(ice, AC97_DATA));
183}
184
185
186/*
187 * GPIO operations
188 */
189
190/* set gpio direction 0 = read, 1 = write */
ab0c7d72 191static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 192{
193 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
194 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
195}
196
197/* set the gpio mask (0 = writable) */
ab0c7d72 198static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 199{
200 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
1de9fdc2 201 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
1da177e4
LT		 202 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
203 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
204}
205
ab0c7d72 206static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 207{
208 outw(data, ICEREG1724(ice, GPIO_DATA));
1de9fdc2 209 if (!ice->vt1720)
1da177e4
LT		 210 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
211 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
212}
213
ab0c7d72 214static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 215{
216 unsigned int data;
1de9fdc2 217 if (!ice->vt1720)
1da177e4
LT		 218 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
219 else
220 data = 0;
221 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
222 return data;
223}
224
3a841d51 225/*
aea3bfbc 226 * MIDI
3a841d51 227 */
aea3bfbc
CL		 228
229static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
230{
231 unsigned int count;
232
233 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
234 inb(ICEREG1724(ice, MPU_DATA));
235}
236
237static inline struct snd_rawmidi_substream *
238get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
3a841d51 239{
aea3bfbc
CL		 240 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
241 struct snd_rawmidi_substream, list);
242}
243
e683ec46
TI		 244static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
245
aea3bfbc
CL		 246static void vt1724_midi_write(struct snd_ice1712 *ice)
247{
248 struct snd_rawmidi_substream *s;
249 int count, i;
250 u8 buffer[32];
251
252 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
253 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
254 if (count > 0) {
255 count = snd_rawmidi_transmit(s, buffer, count);
256 for (i = 0; i < count; ++i)
257 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
258 }
e683ec46
TI		 259 /* mask irq when all bytes have been transmitted.
260 * enabled again in output_trigger when the new data comes in.
261 */
262 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
263 !snd_rawmidi_transmit_empty(s));
aea3bfbc
CL		 264}
265
266static void vt1724_midi_read(struct snd_ice1712 *ice)
267{
268 struct snd_rawmidi_substream *s;
269 int count, i;
270 u8 buffer[32];
271
272 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
273 count = inb(ICEREG1724(ice, MPU_RXFIFO));
274 if (count > 0) {
275 count = min(count, 32);
276 for (i = 0; i < count; ++i)
277 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
278 snd_rawmidi_receive(s, buffer, count);
279 }
280}
281
e683ec46
TI		 282/* call with ice->reg_lock */
283static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
aea3bfbc 284{
e683ec46 285 u8 mask = inb(ICEREG1724(ice, IRQMASK));
aea3bfbc
CL		 286 if (enable)
287 mask &= ~flag;
3a841d51 288 else
aea3bfbc
CL		 289 mask |= flag;
290 outb(mask, ICEREG1724(ice, IRQMASK));
e683ec46
TI		 291}
292
293static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
294 u8 flag, int enable)
295{
296 struct snd_ice1712 *ice = substream->rmidi->private_data;
297
298 spin_lock_irq(&ice->reg_lock);
299 enable_midi_irq(ice, flag, enable);
aea3bfbc 300 spin_unlock_irq(&ice->reg_lock);
3a841d51
TI		 301}
302
aea3bfbc 303static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
3a841d51 304{
aea3bfbc
CL		 305 return 0;
306}
307
308static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
309{
aea3bfbc 310 return 0;
3a841d51
TI		 311}
312
aea3bfbc
CL		 313static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
314{
315 struct snd_ice1712 *ice = s->rmidi->private_data;
316 unsigned long flags;
317
318 spin_lock_irqsave(&ice->reg_lock, flags);
319 if (up) {
320 ice->midi_output = 1;
321 vt1724_midi_write(ice);
322 } else {
323 ice->midi_output = 0;
e683ec46 324 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
aea3bfbc
CL		 325 }
326 spin_unlock_irqrestore(&ice->reg_lock, flags);
327}
328
329static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
330{
331 struct snd_ice1712 *ice = s->rmidi->private_data;
332 unsigned long timeout;
333
e683ec46 334 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
aea3bfbc
CL		 335 /* 32 bytes should be transmitted in less than about 12 ms */
336 timeout = jiffies + msecs_to_jiffies(15);
337 do {
338 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
339 break;
340 schedule_timeout_uninterruptible(1);
341 } while (time_after(timeout, jiffies));
342}
343
344static struct snd_rawmidi_ops vt1724_midi_output_ops = {
345 .open = vt1724_midi_output_open,
346 .close = vt1724_midi_output_close,
347 .trigger = vt1724_midi_output_trigger,
348 .drain = vt1724_midi_output_drain,
349};
350
351static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
352{
353 vt1724_midi_clear_rx(s->rmidi->private_data);
354 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
355 return 0;
356}
357
358static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
359{
360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
361 return 0;
362}
363
364static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
365{
366 struct snd_ice1712 *ice = s->rmidi->private_data;
367 unsigned long flags;
368
369 spin_lock_irqsave(&ice->reg_lock, flags);
370 if (up) {
371 ice->midi_input = 1;
372 vt1724_midi_read(ice);
373 } else {
374 ice->midi_input = 0;
375 }
376 spin_unlock_irqrestore(&ice->reg_lock, flags);
377}
378
379static struct snd_rawmidi_ops vt1724_midi_input_ops = {
380 .open = vt1724_midi_input_open,
381 .close = vt1724_midi_input_close,
382 .trigger = vt1724_midi_input_trigger,
383};
384
3a841d51 385
1da177e4
LT		 386/*
387 * Interrupt handler
388 */
389
7d12e780 390static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
1da177e4 391{
ab0c7d72 392 struct snd_ice1712 *ice = dev_id;
1da177e4 393 unsigned char status;
3a841d51
TI		 394 unsigned char status_mask =
395 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
1da177e4 396 int handled = 0;
3a841d51 397 int timeout = 0;
1da177e4
LT		 398
399 while (1) {
400 status = inb(ICEREG1724(ice, IRQSTAT));
3a841d51 401 status &= status_mask;
1da177e4
LT		 402 if (status == 0)
403 break;
e683ec46 404 spin_lock(&ice->reg_lock);
3a841d51 405 if (++timeout > 10) {
1083206f
TI		 406 status = inb(ICEREG1724(ice, IRQSTAT));
407 printk(KERN_ERR "ice1724: Too long irq loop, "
408 "status = 0x%x\n", status);
409 if (status & VT1724_IRQ_MPU_TX) {
410 printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
e683ec46 411 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
1083206f 412 }
e683ec46 413 spin_unlock(&ice->reg_lock);
3a841d51
TI		 414 break;
415 }
1de9fdc2 416 handled = 1;
3a841d51 417 if (status & VT1724_IRQ_MPU_TX) {
aea3bfbc
CL		 418 if (ice->midi_output)
419 vt1724_midi_write(ice);
e683ec46
TI		 420 else
421 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
3a841d51
TI		 422 /* Due to mysterical reasons, MPU_TX is always
423 * generated (and can't be cleared) when a PCM
424 * playback is going. So let's ignore at the
425 * next loop.
426 */
427 status_mask &= ~VT1724_IRQ_MPU_TX;
428 }
429 if (status & VT1724_IRQ_MPU_RX) {
aea3bfbc
CL		 430 if (ice->midi_input)
431 vt1724_midi_read(ice);
432 else
433 vt1724_midi_clear_rx(ice);
1da177e4 434 }
3a841d51
TI		 435 /* ack MPU irq */
436 outb(status, ICEREG1724(ice, IRQSTAT));
e683ec46 437 spin_unlock(&ice->reg_lock);
1da177e4
LT		 438 if (status & VT1724_IRQ_MTPCM) {
439 /*
440 * Multi-track PCM
441 * PCM assignment are:
442 * Playback DMA0 (M/C) = playback_pro_substream
443 * Playback DMA1 = playback_con_substream_ds[0]
444 * Playback DMA2 = playback_con_substream_ds[1]
445 * Playback DMA3 = playback_con_substream_ds[2]
446 * Playback DMA4 (SPDIF) = playback_con_substream
447 * Record DMA0 = capture_pro_substream
448 * Record DMA1 = capture_con_substream
449 */
450 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
451 if (mtstat & VT1724_MULTI_PDMA0) {
452 if (ice->playback_pro_substream)
453 snd_pcm_period_elapsed(ice->playback_pro_substream);
454 }
455 if (mtstat & VT1724_MULTI_RDMA0) {
456 if (ice->capture_pro_substream)
457 snd_pcm_period_elapsed(ice->capture_pro_substream);
458 }
459 if (mtstat & VT1724_MULTI_PDMA1) {
460 if (ice->playback_con_substream_ds[0])
461 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
462 }
463 if (mtstat & VT1724_MULTI_PDMA2) {
464 if (ice->playback_con_substream_ds[1])
465 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
466 }
467 if (mtstat & VT1724_MULTI_PDMA3) {
468 if (ice->playback_con_substream_ds[2])
469 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
470 }
471 if (mtstat & VT1724_MULTI_PDMA4) {
472 if (ice->playback_con_substream)
473 snd_pcm_period_elapsed(ice->playback_con_substream);
474 }
475 if (mtstat & VT1724_MULTI_RDMA1) {
476 if (ice->capture_con_substream)
477 snd_pcm_period_elapsed(ice->capture_con_substream);
478 }
479 /* ack anyway to avoid freeze */
480 outb(mtstat, ICEMT1724(ice, IRQ));
481 /* ought to really handle this properly */
482 if (mtstat & VT1724_MULTI_FIFO_ERR) {
483 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
1de9fdc2
AB		 484 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
485 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
1da177e4
LT		 486 /* If I don't do this, I get machine lockup due to continual interrupts */
487 }
488
489 }
490 }
491 return IRQ_RETVAL(handled);
492}
493
494/*
495 * PCM code - professional part (multitrack)
496 */
497
498static unsigned int rates[] = {
499 8000, 9600, 11025, 12000, 16000, 22050, 24000,
500 32000, 44100, 48000, 64000, 88200, 96000,
501 176400, 192000,
502};
503
ab0c7d72 504static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT		 505 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
506 .list = rates,
507 .mask = 0,
508};
509
ab0c7d72 510static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT		 511 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
512 .list = rates,
513 .mask = 0,
514};
515
ab0c7d72 516static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT		 517 .count = ARRAY_SIZE(rates),
518 .list = rates,
519 .mask = 0,
520};
521
522struct vt1724_pcm_reg {
523 unsigned int addr; /* ADDR register offset */
524 unsigned int size; /* SIZE register offset */
525 unsigned int count; /* COUNT register offset */
526 unsigned int start; /* start & pause bit */
527};
528
ab0c7d72 529static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 530{
ab0c7d72 531 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 532 unsigned char what;
533 unsigned char old;
ab0c7d72 534 struct snd_pcm_substream *s;
1da177e4
LT		 535
536 what = 0;
ef991b95 537 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL		 538 if (snd_pcm_substream_chip(s) == ice) {
539 const struct vt1724_pcm_reg *reg;
540 reg = s->runtime->private_data;
541 what |= reg->start;
542 snd_pcm_trigger_done(s, substream);
543 }
1da177e4
LT		 544 }
545
546 switch (cmd) {
547 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
548 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
549 spin_lock(&ice->reg_lock);
550 old = inb(ICEMT1724(ice, DMA_PAUSE));
551 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
552 old |= what;
553 else
554 old &= ~what;
555 outb(old, ICEMT1724(ice, DMA_PAUSE));
556 spin_unlock(&ice->reg_lock);
557 break;
558
559 case SNDRV_PCM_TRIGGER_START:
560 case SNDRV_PCM_TRIGGER_STOP:
561 spin_lock(&ice->reg_lock);
562 old = inb(ICEMT1724(ice, DMA_CONTROL));
563 if (cmd == SNDRV_PCM_TRIGGER_START)
564 old |= what;
565 else
566 old &= ~what;
567 outb(old, ICEMT1724(ice, DMA_CONTROL));
568 spin_unlock(&ice->reg_lock);
569 break;
570
571 default:
572 return -EINVAL;
573 }
574 return 0;
575}
576
577/*
578 */
579
580#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
581 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
582#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
583 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
584
d16be8ed
PH		 585static const unsigned int stdclock_rate_list[16] = {
586 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
587 22050, 11025, 88200, 176400, 0, 192000, 64000
588};
589
590static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
1da177e4 591{
d16be8ed
PH		 592 unsigned int rate;
593 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
594 return rate;
595}
596
597static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
598{
599 int i;
600 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
601 if (stdclock_rate_list[i] == rate) {
602 outb(i, ICEMT1724(ice, RATE));
603 return;
604 }
605 }
606}
607
608static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
609 unsigned int rate)
610{
611 unsigned char val, old;
612 /* check MT02 */
1da177e4 613 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
d16be8ed
PH		 614 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
615 if (rate > 96000)
616 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
1da177e4 617 else
d16be8ed
PH		 618 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
619 if (val != old) {
620 outb(val, ICEMT1724(ice, I2S_FORMAT));
621 /* master clock changed */
622 return 1;
623 }
624 }
625 /* no change in master clock */
626 return 0;
1da177e4
LT		 627}
628
92d71005 629static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
ab0c7d72 630 int force)
1da177e4
LT		 631{
632 unsigned long flags;
d16be8ed
PH		 633 unsigned char mclk_change;
634 unsigned int i, old_rate;
1da177e4 635
d16be8ed 636 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
92d71005
TI		 637 return -EINVAL;
638
1da177e4 639 spin_lock_irqsave(&ice->reg_lock, flags);
d16be8ed 640 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
1da177e4
LT		 641 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
642 /* running? we cannot change the rate now... */
643 spin_unlock_irqrestore(&ice->reg_lock, flags);
92d71005 644 return -EBUSY;
1da177e4
LT		 645 }
646 if (!force && is_pro_rate_locked(ice)) {
647 spin_unlock_irqrestore(&ice->reg_lock, flags);
92d71005 648 return (rate == ice->cur_rate) ? 0 : -EBUSY;
1da177e4
LT		 649 }
650
d16be8ed
PH		 651 old_rate = ice->get_rate(ice);
652 if (force || (old_rate != rate))
653 ice->set_rate(ice, rate);
1da177e4
LT		 654 else if (rate == ice->cur_rate) {
655 spin_unlock_irqrestore(&ice->reg_lock, flags);
92d71005 656 return 0;
1da177e4
LT		 657 }
658
659 ice->cur_rate = rate;
660
d16be8ed
PH		 661 /* setting master clock */
662 mclk_change = ice->set_mclk(ice, rate);
663
1da177e4
LT		 664 spin_unlock_irqrestore(&ice->reg_lock, flags);
665
666 if (mclk_change && ice->gpio.i2s_mclk_changed)
667 ice->gpio.i2s_mclk_changed(ice);
668 if (ice->gpio.set_pro_rate)
669 ice->gpio.set_pro_rate(ice, rate);
670
671 /* set up codecs */
672 for (i = 0; i < ice->akm_codecs; i++) {
673 if (ice->akm[i].ops.set_rate_val)
674 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
675 }
676 if (ice->spdif.ops.setup_rate)
677 ice->spdif.ops.setup_rate(ice, rate);
92d71005
TI		 678
679 return 0;
1da177e4
LT		 680}
681
ab0c7d72
TI		 682static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
683 struct snd_pcm_hw_params *hw_params)
1da177e4 684{
ab0c7d72 685 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
92d71005 686 int i, chs, err;
1da177e4
LT		 687
688 chs = params_channels(hw_params);
62932df8 689 mutex_lock(&ice->open_mutex);
1da177e4
LT		 690 /* mark surround channels */
691 if (substream == ice->playback_pro_substream) {
692 /* PDMA0 can be multi-channel up to 8 */
693 chs = chs / 2 - 1;
694 for (i = 0; i < chs; i++) {
ab0c7d72
TI		 695 if (ice->pcm_reserved[i] &&
696 ice->pcm_reserved[i] != substream) {
62932df8 697 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 698 return -EBUSY;
699 }
700 ice->pcm_reserved[i] = substream;
701 }
702 for (; i < 3; i++) {
703 if (ice->pcm_reserved[i] == substream)
704 ice->pcm_reserved[i] = NULL;
705 }
706 } else {
707 for (i = 0; i < 3; i++) {
708 /* check individual playback stream */
709 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI		 710 if (ice->pcm_reserved[i] &&
711 ice->pcm_reserved[i] != substream) {
62932df8 712 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 713 return -EBUSY;
714 }
715 ice->pcm_reserved[i] = substream;
716 break;
717 }
718 }
719 }
62932df8 720 mutex_unlock(&ice->open_mutex);
92d71005
TI		 721
722 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
723 if (err < 0)
724 return err;
725
1da177e4
LT		 726 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
727}
728
ab0c7d72 729static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 730{
ab0c7d72 731 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 732 int i;
733
62932df8 734 mutex_lock(&ice->open_mutex);
1da177e4
LT		 735 /* unmark surround channels */
736 for (i = 0; i < 3; i++)
737 if (ice->pcm_reserved[i] == substream)
738 ice->pcm_reserved[i] = NULL;
62932df8 739 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 740 return snd_pcm_lib_free_pages(substream);
741}
742
ab0c7d72 743static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 744{
ab0c7d72 745 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 746 unsigned char val;
747 unsigned int size;
748
749 spin_lock_irq(&ice->reg_lock);
750 val = (8 - substream->runtime->channels) >> 1;
751 outb(val, ICEMT1724(ice, BURST));
752
753 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
754
755 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
1de9fdc2 756 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
1da177e4
LT		 757 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
758 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
759 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
1de9fdc2 760 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
1da177e4
LT		 761 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
762 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
763
764 spin_unlock_irq(&ice->reg_lock);
765
e2ea7cfc
TI		 766 /*
767 printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
768 "buffer = 0x%x, period = 0x%x\n",
769 substream->runtime->channels,
770 (unsigned int)substream->runtime->dma_addr,
771 snd_pcm_lib_buffer_bytes(substream),
772 snd_pcm_lib_period_bytes(substream));
773 */
1da177e4
LT		 774 return 0;
775}
776
ab0c7d72 777static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 778{
ab0c7d72 779 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 780 size_t ptr;
781
782 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
783 return 0;
784#if 0 /* read PLAYBACK_ADDR */
785 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
786 if (ptr < substream->runtime->dma_addr) {
787 snd_printd("ice1724: invalid negative ptr\n");
788 return 0;
789 }
790 ptr -= substream->runtime->dma_addr;
791 ptr = bytes_to_frames(substream->runtime, ptr);
792 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI		 793 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
794 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT		 795 return 0;
796 }
797#else /* read PLAYBACK_SIZE */
798 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
799 ptr = (ptr + 1) << 2;
800 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 801 if (!ptr)
1da177e4
LT		 802 ;
803 else if (ptr <= substream->runtime->buffer_size)
804 ptr = substream->runtime->buffer_size - ptr;
805 else {
ab0c7d72
TI		 806 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
807 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 808 ptr = 0;
809 }
810#endif
811 return ptr;
812}
813
ab0c7d72 814static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 815{
ab0c7d72 816 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 817 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 818
819 spin_lock_irq(&ice->reg_lock);
820 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI		 821 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
822 ice->profi_port + reg->size);
823 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
824 ice->profi_port + reg->count);
1da177e4
LT		 825 spin_unlock_irq(&ice->reg_lock);
826 return 0;
827}
828
ab0c7d72 829static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 830{
ab0c7d72 831 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 832 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 833 size_t ptr;
834
835 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
836 return 0;
837#if 0 /* use ADDR register */
838 ptr = inl(ice->profi_port + reg->addr);
839 ptr -= substream->runtime->dma_addr;
840 return bytes_to_frames(substream->runtime, ptr);
841#else /* use SIZE register */
842 ptr = inw(ice->profi_port + reg->size);
843 ptr = (ptr + 1) << 2;
844 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 845 if (!ptr)
1da177e4
LT		 846 ;
847 else if (ptr <= substream->runtime->buffer_size)
848 ptr = substream->runtime->buffer_size - ptr;
849 else {
ab0c7d72
TI		 850 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
851 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 852 ptr = 0;
853 }
854 return ptr;
855#endif
856}
857
32b47da0 858static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
1da177e4
LT		 859 .addr = VT1724_MT_PLAYBACK_ADDR,
860 .size = VT1724_MT_PLAYBACK_SIZE,
861 .count = VT1724_MT_PLAYBACK_COUNT,
862 .start = VT1724_PDMA0_START,
863};
864
32b47da0 865static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
1da177e4
LT		 866 .addr = VT1724_MT_CAPTURE_ADDR,
867 .size = VT1724_MT_CAPTURE_SIZE,
868 .count = VT1724_MT_CAPTURE_COUNT,
869 .start = VT1724_RDMA0_START,
870};
871
1de9fdc2 872static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
1da177e4
LT		 873 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
874 SNDRV_PCM_INFO_BLOCK_TRANSFER |
875 SNDRV_PCM_INFO_MMAP_VALID |
876 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
877 .formats = SNDRV_PCM_FMTBIT_S32_LE,
878 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
879 .rate_min = 8000,
880 .rate_max = 192000,
881 .channels_min = 2,
882 .channels_max = 8,
883 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
884 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
885 .period_bytes_max = (1UL << 21),
886 .periods_min = 2,
887 .periods_max = 1024,
888};
889
1de9fdc2 890static const struct snd_pcm_hardware snd_vt1724_spdif = {
1da177e4
LT		 891 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
892 SNDRV_PCM_INFO_BLOCK_TRANSFER |
893 SNDRV_PCM_INFO_MMAP_VALID |
894 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
895 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI		 896 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
897 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
898 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
899 SNDRV_PCM_RATE_192000),
1da177e4 900 .rate_min = 32000,
2dfbeca9 901 .rate_max = 192000,
1da177e4
LT		 902 .channels_min = 2,
903 .channels_max = 2,
904 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
905 .period_bytes_min = 2 * 4 * 2,
906 .period_bytes_max = (1UL << 18),
907 .periods_min = 2,
908 .periods_max = 1024,
909};
910
1de9fdc2 911static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
1da177e4
LT		 912 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
913 SNDRV_PCM_INFO_BLOCK_TRANSFER |
914 SNDRV_PCM_INFO_MMAP_VALID |
915 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
916 .formats = SNDRV_PCM_FMTBIT_S32_LE,
917 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
918 .rate_min = 8000,
919 .rate_max = 192000,
920 .channels_min = 2,
921 .channels_max = 2,
922 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
923 .period_bytes_min = 2 * 4 * 2,
924 .period_bytes_max = (1UL << 18),
925 .periods_min = 2,
926 .periods_max = 1024,
927};
928
929/*
930 * set rate constraints
931 */
d16be8ed 932static void set_std_hw_rates(struct snd_ice1712 *ice)
1da177e4 933{
1da177e4
LT		 934 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
935 /* I2S */
936 /* VT1720 doesn't support more than 96kHz */
937 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
d16be8ed
PH		 938 ice->hw_rates = &hw_constraints_rates_192;
939 else
940 ice->hw_rates = &hw_constraints_rates_96;
941 } else {
1da177e4 942 /* ACLINK */
d16be8ed 943 ice->hw_rates = &hw_constraints_rates_48;
1da177e4 944 }
d16be8ed
PH		 945}
946
947static int set_rate_constraints(struct snd_ice1712 *ice,
948 struct snd_pcm_substream *substream)
949{
950 struct snd_pcm_runtime *runtime = substream->runtime;
951
952 runtime->hw.rate_min = ice->hw_rates->list[0];
953 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
954 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
955 return snd_pcm_hw_constraint_list(runtime, 0,
956 SNDRV_PCM_HW_PARAM_RATE,
957 ice->hw_rates);
1da177e4
LT		 958}
959
960/* multi-channel playback needs alignment 8x32bit regardless of the channels
961 * actually used
962 */
963#define VT1724_BUFFER_ALIGN 0x20
964
ab0c7d72 965static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 966{
ab0c7d72
TI		 967 struct snd_pcm_runtime *runtime = substream->runtime;
968 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
a6b936b9 969 int chs, num_indeps;
1da177e4 970
32b47da0 971 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1da177e4
LT		 972 ice->playback_pro_substream = substream;
973 runtime->hw = snd_vt1724_playback_pro;
974 snd_pcm_set_sync(substream);
975 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
976 set_rate_constraints(ice, substream);
62932df8 977 mutex_lock(&ice->open_mutex);
1da177e4 978 /* calculate the currently available channels */
a6b936b9
TI		 979 num_indeps = ice->num_total_dacs / 2 - 1;
980 for (chs = 0; chs < num_indeps; chs++) {
1da177e4
LT		 981 if (ice->pcm_reserved[chs])
982 break;
983 }
984 chs = (chs + 1) * 2;
985 runtime->hw.channels_max = chs;
986 if (chs > 2) /* channels must be even */
987 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 988 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 989 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
990 VT1724_BUFFER_ALIGN);
991 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
992 VT1724_BUFFER_ALIGN);
993 return 0;
994}
995
ab0c7d72 996static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 997{
ab0c7d72
TI		 998 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
999 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1000
32b47da0 1001 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1da177e4
LT		 1002 ice->capture_pro_substream = substream;
1003 runtime->hw = snd_vt1724_2ch_stereo;
1004 snd_pcm_set_sync(substream);
1005 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1006 set_rate_constraints(ice, substream);
1007 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1008 VT1724_BUFFER_ALIGN);
1009 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1010 VT1724_BUFFER_ALIGN);
1011 return 0;
1012}
1013
ab0c7d72 1014static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1015{
ab0c7d72 1016 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1017
1018 if (PRO_RATE_RESET)
d16be8ed 1019 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1020 ice->playback_pro_substream = NULL;
1021
1022 return 0;
1023}
1024
ab0c7d72 1025static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1026{
ab0c7d72 1027 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1028
1029 if (PRO_RATE_RESET)
d16be8ed 1030 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1031 ice->capture_pro_substream = NULL;
1032 return 0;
1033}
1034
ab0c7d72 1035static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT		 1036 .open = snd_vt1724_playback_pro_open,
1037 .close = snd_vt1724_playback_pro_close,
1038 .ioctl = snd_pcm_lib_ioctl,
1039 .hw_params = snd_vt1724_pcm_hw_params,
1040 .hw_free = snd_vt1724_pcm_hw_free,
1041 .prepare = snd_vt1724_playback_pro_prepare,
1042 .trigger = snd_vt1724_pcm_trigger,
1043 .pointer = snd_vt1724_playback_pro_pointer,
1044};
1045
ab0c7d72 1046static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT		 1047 .open = snd_vt1724_capture_pro_open,
1048 .close = snd_vt1724_capture_pro_close,
1049 .ioctl = snd_pcm_lib_ioctl,
1050 .hw_params = snd_vt1724_pcm_hw_params,
1051 .hw_free = snd_vt1724_pcm_hw_free,
1052 .prepare = snd_vt1724_pcm_prepare,
1053 .trigger = snd_vt1724_pcm_trigger,
1054 .pointer = snd_vt1724_pcm_pointer,
1055};
1056
1de9fdc2 1057static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1da177e4 1058{
ab0c7d72 1059 struct snd_pcm *pcm;
1da177e4
LT		 1060 int err;
1061
1062 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
1063 if (err < 0)
1064 return err;
1065
1066 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1067 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
1068
1069 pcm->private_data = ice;
1070 pcm->info_flags = 0;
1071 strcpy(pcm->name, "ICE1724");
1072
1073 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1074 snd_dma_pci_data(ice->pci),
1075 256*1024, 256*1024);
1da177e4
LT		 1076
1077 ice->pcm_pro = pcm;
1078
1079 return 0;
1080}
1081
1082
1083/*
1084 * SPDIF PCM
1085 */
1086
32b47da0 1087static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
1da177e4
LT		 1088 .addr = VT1724_MT_PDMA4_ADDR,
1089 .size = VT1724_MT_PDMA4_SIZE,
1090 .count = VT1724_MT_PDMA4_COUNT,
1091 .start = VT1724_PDMA4_START,
1092};
1093
32b47da0 1094static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
1da177e4
LT		 1095 .addr = VT1724_MT_RDMA1_ADDR,
1096 .size = VT1724_MT_RDMA1_SIZE,
1097 .count = VT1724_MT_RDMA1_COUNT,
1098 .start = VT1724_RDMA1_START,
1099};
1100
1101/* update spdif control bits; call with reg_lock */
ab0c7d72 1102static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 1103{
1104 unsigned char cbit, disabled;
1105
1106 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1107 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1108 if (cbit != disabled)
1109 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1110 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1111 if (cbit != disabled)
1112 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1113 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1114}
1115
1116/* update SPDIF control bits according to the given rate */
ab0c7d72 1117static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT		 1118{
1119 unsigned int val, nval;
1120 unsigned long flags;
1121
1122 spin_lock_irqsave(&ice->reg_lock, flags);
1123 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1124 nval &= ~(7 << 12);
1125 switch (rate) {
1126 case 44100: break;
1127 case 48000: nval |= 2 << 12; break;
1128 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI		 1129 case 88200: nval |= 4 << 12; break;
1130 case 96000: nval |= 5 << 12; break;
1131 case 192000: nval |= 6 << 12; break;
1132 case 176400: nval |= 7 << 12; break;
1da177e4
LT		 1133 }
1134 if (val != nval)
1135 update_spdif_bits(ice, nval);
1136 spin_unlock_irqrestore(&ice->reg_lock, flags);
1137}
1138
ab0c7d72 1139static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 1140{
ab0c7d72 1141 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1de9fdc2 1142 if (!ice->force_pdma4)
1da177e4
LT		 1143 update_spdif_rate(ice, substream->runtime->rate);
1144 return snd_vt1724_pcm_prepare(substream);
1145}
1146
ab0c7d72 1147static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1148{
ab0c7d72
TI		 1149 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1150 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1151
32b47da0 1152 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1da177e4
LT		 1153 ice->playback_con_substream = substream;
1154 if (ice->force_pdma4) {
1155 runtime->hw = snd_vt1724_2ch_stereo;
1156 set_rate_constraints(ice, substream);
1157 } else
1158 runtime->hw = snd_vt1724_spdif;
1159 snd_pcm_set_sync(substream);
1160 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1161 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1162 VT1724_BUFFER_ALIGN);
1163 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1164 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1165 if (ice->spdif.ops.open)
1166 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1167 return 0;
1168}
1169
ab0c7d72 1170static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1171{
ab0c7d72 1172 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1173
1174 if (PRO_RATE_RESET)
d16be8ed 1175 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1176 ice->playback_con_substream = NULL;
c93f5a1e
TI		 1177 if (ice->spdif.ops.close)
1178 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1179
1180 return 0;
1181}
1182
ab0c7d72 1183static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1184{
ab0c7d72
TI		 1185 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1186 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1187
32b47da0 1188 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1da177e4
LT		 1189 ice->capture_con_substream = substream;
1190 if (ice->force_rdma1) {
1191 runtime->hw = snd_vt1724_2ch_stereo;
1192 set_rate_constraints(ice, substream);
1193 } else
1194 runtime->hw = snd_vt1724_spdif;
1195 snd_pcm_set_sync(substream);
1196 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1197 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1198 VT1724_BUFFER_ALIGN);
1199 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1200 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1201 if (ice->spdif.ops.open)
1202 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1203 return 0;
1204}
1205
ab0c7d72 1206static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1207{
ab0c7d72 1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1209
1210 if (PRO_RATE_RESET)
d16be8ed 1211 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1212 ice->capture_con_substream = NULL;
c93f5a1e
TI		 1213 if (ice->spdif.ops.close)
1214 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1215
1216 return 0;
1217}
1218
ab0c7d72 1219static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT		 1220 .open = snd_vt1724_playback_spdif_open,
1221 .close = snd_vt1724_playback_spdif_close,
1222 .ioctl = snd_pcm_lib_ioctl,
1223 .hw_params = snd_vt1724_pcm_hw_params,
1224 .hw_free = snd_vt1724_pcm_hw_free,
1225 .prepare = snd_vt1724_playback_spdif_prepare,
1226 .trigger = snd_vt1724_pcm_trigger,
1227 .pointer = snd_vt1724_pcm_pointer,
1228};
1229
ab0c7d72 1230static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT		 1231 .open = snd_vt1724_capture_spdif_open,
1232 .close = snd_vt1724_capture_spdif_close,
1233 .ioctl = snd_pcm_lib_ioctl,
1234 .hw_params = snd_vt1724_pcm_hw_params,
1235 .hw_free = snd_vt1724_pcm_hw_free,
1236 .prepare = snd_vt1724_pcm_prepare,
1237 .trigger = snd_vt1724_pcm_trigger,
1238 .pointer = snd_vt1724_pcm_pointer,
1239};
1240
1241
1de9fdc2 1242static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1da177e4
LT		 1243{
1244 char *name;
ab0c7d72 1245 struct snd_pcm *pcm;
1da177e4
LT		 1246 int play, capt;
1247 int err;
1248
1249 if (ice->force_pdma4 ||
1250 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1251 play = 1;
1252 ice->has_spdif = 1;
1253 } else
1254 play = 0;
1255 if (ice->force_rdma1 ||
1256 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1257 capt = 1;
1258 ice->has_spdif = 1;
1259 } else
1260 capt = 0;
1de9fdc2 1261 if (!play && !capt)
1da177e4
LT		 1262 return 0; /* no spdif device */
1263
1264 if (ice->force_pdma4 || ice->force_rdma1)
1265 name = "ICE1724 Secondary";
1266 else
8eca7538 1267 name = "ICE1724 IEC958";
1da177e4
LT		 1268 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1269 if (err < 0)
1270 return err;
1271
1272 if (play)
1273 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1274 &snd_vt1724_playback_spdif_ops);
1275 if (capt)
1276 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1277 &snd_vt1724_capture_spdif_ops);
1278
1279 pcm->private_data = ice;
1280 pcm->info_flags = 0;
1281 strcpy(pcm->name, name);
1282
1283 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1284 snd_dma_pci_data(ice->pci),
1285 64*1024, 64*1024);
1da177e4
LT		 1286
1287 ice->pcm = pcm;
1288
1289 return 0;
1290}
1291
1292
1293/*
1294 * independent surround PCMs
1295 */
1296
32b47da0 1297static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1da177e4
LT		 1298 {
1299 .addr = VT1724_MT_PDMA1_ADDR,
1300 .size = VT1724_MT_PDMA1_SIZE,
1301 .count = VT1724_MT_PDMA1_COUNT,
1302 .start = VT1724_PDMA1_START,
1303 },
1304 {
1305 .addr = VT1724_MT_PDMA2_ADDR,
1306 .size = VT1724_MT_PDMA2_SIZE,
1307 .count = VT1724_MT_PDMA2_COUNT,
1308 .start = VT1724_PDMA2_START,
1309 },
1310 {
1311 .addr = VT1724_MT_PDMA3_ADDR,
1312 .size = VT1724_MT_PDMA3_SIZE,
1313 .count = VT1724_MT_PDMA3_COUNT,
1314 .start = VT1724_PDMA3_START,
1315 },
1316};
1317
ab0c7d72 1318static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1319{
ab0c7d72 1320 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1321 unsigned char val;
1322
1323 spin_lock_irq(&ice->reg_lock);
1324 val = 3 - substream->number;
1325 if (inb(ICEMT1724(ice, BURST)) < val)
1326 outb(val, ICEMT1724(ice, BURST));
1327 spin_unlock_irq(&ice->reg_lock);
1328 return snd_vt1724_pcm_prepare(substream);
1329}
1330
ab0c7d72 1331static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1332{
ab0c7d72
TI		 1333 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1334 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1335
62932df8 1336 mutex_lock(&ice->open_mutex);
1da177e4
LT		 1337 /* already used by PDMA0? */
1338 if (ice->pcm_reserved[substream->number]) {
62932df8 1339 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1340 return -EBUSY; /* FIXME: should handle blocking mode properly */
1341 }
62932df8 1342 mutex_unlock(&ice->open_mutex);
32b47da0 1343 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1da177e4
LT		 1344 ice->playback_con_substream_ds[substream->number] = substream;
1345 runtime->hw = snd_vt1724_2ch_stereo;
1346 snd_pcm_set_sync(substream);
1347 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1348 set_rate_constraints(ice, substream);
1349 return 0;
1350}
1351
ab0c7d72 1352static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1353{
ab0c7d72 1354 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1355
1356 if (PRO_RATE_RESET)
d16be8ed 1357 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1358 ice->playback_con_substream_ds[substream->number] = NULL;
1359 ice->pcm_reserved[substream->number] = NULL;
1360
1361 return 0;
1362}
1363
ab0c7d72 1364static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT		 1365 .open = snd_vt1724_playback_indep_open,
1366 .close = snd_vt1724_playback_indep_close,
1367 .ioctl = snd_pcm_lib_ioctl,
1368 .hw_params = snd_vt1724_pcm_hw_params,
1369 .hw_free = snd_vt1724_pcm_hw_free,
1370 .prepare = snd_vt1724_playback_indep_prepare,
1371 .trigger = snd_vt1724_pcm_trigger,
1372 .pointer = snd_vt1724_pcm_pointer,
1373};
1374
1375
1de9fdc2 1376static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1da177e4 1377{
ab0c7d72 1378 struct snd_pcm *pcm;
1da177e4
LT		 1379 int play;
1380 int err;
1381
1382 play = ice->num_total_dacs / 2 - 1;
1383 if (play <= 0)
1384 return 0;
1385
1386 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1387 if (err < 0)
1388 return err;
1389
1390 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1391 &snd_vt1724_playback_indep_ops);
1392
1393 pcm->private_data = ice;
1394 pcm->info_flags = 0;
1395 strcpy(pcm->name, "ICE1724 Surround PCM");
1396
1397 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1398 snd_dma_pci_data(ice->pci),
1399 64*1024, 64*1024);
1da177e4
LT		 1400
1401 ice->pcm_ds = pcm;
1402
1403 return 0;
1404}
1405
1406
1407/*
1408 * Mixer section
1409 */
1410
1de9fdc2 1411static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1412{
1413 int err;
1414
1de9fdc2 1415 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI		 1416 struct snd_ac97_bus *pbus;
1417 struct snd_ac97_template ac97;
1418 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1419 .write = snd_vt1724_ac97_write,
1420 .read = snd_vt1724_ac97_read,
1421 };
1422
1423 /* cold reset */
1424 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1425 mdelay(5); /* FIXME */
1426 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1427
1de9fdc2
AB		 1428 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1429 if (err < 0)
1da177e4
LT		 1430 return err;
1431 memset(&ac97, 0, sizeof(ac97));
1432 ac97.private_data = ice;
1de9fdc2
AB		 1433 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1434 if (err < 0)
1da177e4
LT		 1435 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1436 else
1437 return 0;
1438 }
1439 /* I2S mixer only */
1440 strcat(ice->card->mixername, "ICE1724 - multitrack");
1441 return 0;
1442}
1443
1444/*
1445 *
1446 */
1447
ab0c7d72 1448static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1449{
1450 return (unsigned int)ice->eeprom.data[idx] | \
1451 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1452 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1453}
1454
1de9fdc2 1455static void snd_vt1724_proc_read(struct snd_info_entry *entry,
ab0c7d72 1456 struct snd_info_buffer *buffer)
1da177e4 1457{
ab0c7d72 1458 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1459 unsigned int idx;
1460
1461 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1462 snd_iprintf(buffer, "EEPROM:\n");
1463
1464 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1465 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1466 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI		 1467 snd_iprintf(buffer, " System Config : 0x%x\n",
1468 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1469 snd_iprintf(buffer, " ACLink : 0x%x\n",
1470 ice->eeprom.data[ICE_EEP2_ACLINK]);
1471 snd_iprintf(buffer, " I2S : 0x%x\n",
1472 ice->eeprom.data[ICE_EEP2_I2S]);
1473 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1474 ice->eeprom.data[ICE_EEP2_SPDIF]);
1475 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1476 ice->eeprom.gpiodir);
1477 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1478 ice->eeprom.gpiomask);
1479 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1480 ice->eeprom.gpiostate);
1da177e4 1481 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI		 1482 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1483 idx, ice->eeprom.data[idx]);
1da177e4
LT		 1484
1485 snd_iprintf(buffer, "\nRegisters:\n");
1486
ab0c7d72
TI		 1487 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1488 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1489 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI		 1490 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1491 idx, inb(ice->port+idx));
1da177e4 1492 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI		 1493 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1494 idx, inb(ice->profi_port+idx));
1da177e4
LT		 1495}
1496
1de9fdc2 1497static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
1da177e4 1498{
ab0c7d72 1499 struct snd_info_entry *entry;
1da177e4 1500
1de9fdc2 1501 if (!snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1502 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT		 1503}
1504
1505/*
1506 *
1507 */
1508
ab0c7d72
TI		 1509static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1510 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1511{
1512 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1513 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1514 return 0;
1515}
1516
ab0c7d72
TI		 1517static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1518 struct snd_ctl_elem_value *ucontrol)
1da177e4 1519{
ab0c7d72 1520 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1de9fdc2 1521
1da177e4
LT		 1522 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1523 return 0;
1524}
1525
1b60f6b0 1526static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT		 1527 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1528 .name = "ICE1724 EEPROM",
1529 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1530 .info = snd_vt1724_eeprom_info,
1531 .get = snd_vt1724_eeprom_get
1532};
1533
1534/*
1535 */
ab0c7d72
TI		 1536static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1537 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1538{
1539 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1540 uinfo->count = 1;
1541 return 0;
1542}
1543
ab0c7d72 1544static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1545{
2dfbeca9 1546 unsigned int val, rbits;
1da177e4
LT		 1547
1548 val = diga->status[0] & 0x03; /* professional, non-audio */
1549 if (val & 0x01) {
1550 /* professional */
ab0c7d72
TI		 1551 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1552 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1553 val |= 1U << 3;
2dfbeca9
TI		 1554 rbits = (diga->status[4] >> 3) & 0x0f;
1555 if (rbits) {
1556 switch (rbits) {
1557 case 2: val |= 5 << 12; break; /* 96k */
1558 case 3: val |= 6 << 12; break; /* 192k */
1559 case 10: val |= 4 << 12; break; /* 88.2k */
1560 case 11: val |= 7 << 12; break; /* 176.4k */
1561 }
1562 } else {
1563 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1564 case IEC958_AES0_PRO_FS_44100:
1565 break;
1566 case IEC958_AES0_PRO_FS_32000:
1567 val |= 3U << 12;
1568 break;
1569 default:
1570 val |= 2U << 12;
1571 break;
1572 }
1da177e4
LT		 1573 }
1574 } else {
1575 /* consumer */
1576 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI		 1577 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1578 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT		 1579 val |= 1U << 3;
1580 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1581 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1582 }
1583 return val;
1584}
1585
ab0c7d72 1586static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT		 1587{
1588 memset(diga->status, 0, sizeof(diga->status));
1589 diga->status[0] = val & 0x03; /* professional, non-audio */
1590 if (val & 0x01) {
1591 /* professional */
1592 if (val & (1U << 3))
1593 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1594 switch ((val >> 12) & 0x7) {
1595 case 0:
1596 break;
1597 case 2:
1598 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1599 break;
1600 default:
1601 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1602 break;
1603 }
1604 } else {
1605 /* consumer */
1606 diga->status[0] |= val & (1U << 2); /* copyright */
1607 if (val & (1U << 3))
1608 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1609 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1610 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1611 }
1612}
1613
ab0c7d72
TI		 1614static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1615 struct snd_ctl_elem_value *ucontrol)
1da177e4 1616{
ab0c7d72 1617 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1618 unsigned int val;
1619 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1620 decode_spdif_bits(&ucontrol->value.iec958, val);
1621 return 0;
1622}
1623
ab0c7d72
TI		 1624static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1625 struct snd_ctl_elem_value *ucontrol)
1da177e4 1626{
ab0c7d72 1627 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1628 unsigned int val, old;
1629
1630 val = encode_spdif_bits(&ucontrol->value.iec958);
1631 spin_lock_irq(&ice->reg_lock);
1632 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1633 if (val != old)
1634 update_spdif_bits(ice, val);
1635 spin_unlock_irq(&ice->reg_lock);
1de9fdc2 1636 return val != old;
1da177e4
LT		 1637}
1638
1b60f6b0 1639static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT		 1640{
1641 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1642 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1643 .info = snd_vt1724_spdif_info,
1644 .get = snd_vt1724_spdif_default_get,
1645 .put = snd_vt1724_spdif_default_put
1646};
1647
ab0c7d72
TI		 1648static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1649 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1650{
1651 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1652 IEC958_AES0_PROFESSIONAL |
1653 IEC958_AES0_CON_NOT_COPYRIGHT |
1654 IEC958_AES0_CON_EMPHASIS;
1655 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1656 IEC958_AES1_CON_CATEGORY;
1657 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1658 return 0;
1659}
1660
ab0c7d72
TI		 1661static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1662 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1663{
1664 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1665 IEC958_AES0_PROFESSIONAL |
1666 IEC958_AES0_PRO_FS |
1667 IEC958_AES0_PRO_EMPHASIS;
1668 return 0;
1669}
1670
1b60f6b0 1671static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT		 1672{
1673 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1674 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1675 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1676 .info = snd_vt1724_spdif_info,
1677 .get = snd_vt1724_spdif_maskc_get,
1678};
1679
1b60f6b0 1680static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT		 1681{
1682 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1683 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1684 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1685 .info = snd_vt1724_spdif_info,
1686 .get = snd_vt1724_spdif_maskp_get,
1687};
1688
a5ce8890 1689#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1da177e4 1690
ab0c7d72
TI		 1691static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1692 struct snd_ctl_elem_value *ucontrol)
1da177e4 1693{
ab0c7d72
TI		 1694 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1695 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1696 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT		 1697 return 0;
1698}
1699
ab0c7d72
TI		 1700static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1701 struct snd_ctl_elem_value *ucontrol)
1da177e4 1702{
ab0c7d72 1703 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1704 unsigned char old, val;
1705
1706 spin_lock_irq(&ice->reg_lock);
1707 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1708 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1709 if (ucontrol->value.integer.value[0])
1710 val |= VT1724_CFG_SPDIF_OUT_EN;
1711 if (old != val)
1712 outb(val, ICEREG1724(ice, SPDIF_CFG));
1713 spin_unlock_irq(&ice->reg_lock);
1714 return old != val;
1715}
1716
1b60f6b0 1717static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT		 1718{
1719 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1720 /* FIXME: the following conflict with IEC958 Playback Route */
1de9fdc2
AB		 1721 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1722 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1da177e4
LT		 1723 .info = snd_vt1724_spdif_sw_info,
1724 .get = snd_vt1724_spdif_sw_get,
1725 .put = snd_vt1724_spdif_sw_put
1726};
1727
1728
1729#if 0 /* NOT USED YET */
1730/*
1731 * GPIO access from extern
1732 */
1733
a5ce8890 1734#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1da177e4 1735
ab0c7d72
TI		 1736int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1737 struct snd_ctl_elem_value *ucontrol)
1da177e4 1738{
ab0c7d72 1739 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1740 int shift = kcontrol->private_value & 0xff;
1741 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1de9fdc2 1742
1da177e4 1743 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI		 1744 ucontrol->value.integer.value[0] =
1745 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT		 1746 snd_ice1712_restore_gpio_status(ice);
1747 return 0;
1748}
1749
ab0c7d72
TI		 1750int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1751 struct snd_ctl_elem_value *ucontrol)
1da177e4 1752{
ab0c7d72 1753 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1754 int shift = kcontrol->private_value & 0xff;
1755 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1756 unsigned int val, nval;
1757
1758 if (kcontrol->private_value & (1 << 31))
1759 return -EPERM;
1760 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1761 snd_ice1712_save_gpio_status(ice);
1762 val = snd_ice1712_gpio_read(ice);
1763 nval |= val & ~(1 << shift);
1764 if (val != nval)
1765 snd_ice1712_gpio_write(ice, nval);
1766 snd_ice1712_restore_gpio_status(ice);
1767 return val != nval;
1768}
1769#endif /* NOT USED YET */
1770
1771/*
1772 * rate
1773 */
ab0c7d72
TI		 1774static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1775 struct snd_ctl_elem_info *uinfo)
1da177e4 1776{
ab0c7d72 1777 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1778
1779 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1780 uinfo->count = 1;
d16be8ed 1781 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1da177e4
LT		 1782 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1783 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
d16be8ed
PH		 1784 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1785 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1786 else
1787 sprintf(uinfo->value.enumerated.name, "%d",
1788 ice->hw_rates->list[uinfo->value.enumerated.item]);
1da177e4
LT		 1789 return 0;
1790}
1791
ab0c7d72
TI		 1792static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1793 struct snd_ctl_elem_value *ucontrol)
1da177e4 1794{
ab0c7d72 1795 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed 1796 unsigned int i, rate;
1de9fdc2 1797
1da177e4 1798 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1799 if (ice->is_spdif_master(ice)) {
1800 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1da177e4 1801 } else {
d16be8ed
PH		 1802 rate = ice->get_rate(ice);
1803 ucontrol->value.enumerated.item[0] = 0;
1804 for (i = 0; i < ice->hw_rates->count; i++) {
1805 if (ice->hw_rates->list[i] == rate) {
1806 ucontrol->value.enumerated.item[0] = i;
1807 break;
1808 }
1da177e4 1809 }
1da177e4
LT		 1810 }
1811 spin_unlock_irq(&ice->reg_lock);
1812 return 0;
1813}
1814
d16be8ed
PH		 1815/* setting clock to external - SPDIF */
1816static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1817{
1818 unsigned char oval;
1819 unsigned char i2s_oval;
1820 oval = inb(ICEMT1724(ice, RATE));
1821 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1822 /* setting 256fs */
1823 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1824 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1825}
1826
ab0c7d72
TI		 1827static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1828 struct snd_ctl_elem_value *ucontrol)
1da177e4 1829{
ab0c7d72 1830 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed
PH		 1831 unsigned int old_rate, new_rate;
1832 unsigned int item = ucontrol->value.enumerated.item[0];
1833 unsigned int spdif = ice->hw_rates->count;
1834
1835 if (item > spdif)
1836 return -EINVAL;
1da177e4
LT		 1837
1838 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1839 if (ice->is_spdif_master(ice))
1840 old_rate = 0;
1841 else
1842 old_rate = ice->get_rate(ice);
1843 if (item == spdif) {
1844 /* switching to external clock via SPDIF */
1845 ice->set_spdif_clock(ice);
1846 new_rate = 0;
1da177e4 1847 } else {
d16be8ed
PH		 1848 /* internal on-card clock */
1849 new_rate = ice->hw_rates->list[item];
1850 ice->pro_rate_default = new_rate;
1851 spin_unlock_irq(&ice->reg_lock);
1852 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1853 spin_lock_irq(&ice->reg_lock);
1da177e4 1854 }
1da177e4
LT		 1855 spin_unlock_irq(&ice->reg_lock);
1856
d16be8ed
PH		 1857 /* the first reset to the SPDIF master mode? */
1858 if (old_rate != new_rate && !new_rate) {
1da177e4 1859 /* notify akm chips as well */
d16be8ed
PH		 1860 unsigned int i;
1861 if (ice->gpio.set_pro_rate)
1862 ice->gpio.set_pro_rate(ice, 0);
1863 for (i = 0; i < ice->akm_codecs; i++) {
1864 if (ice->akm[i].ops.set_rate_val)
1865 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1da177e4
LT		 1866 }
1867 }
d16be8ed 1868 return old_rate != new_rate;
1da177e4
LT		 1869}
1870
1b60f6b0 1871static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT		 1872 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1873 .name = "Multi Track Internal Clock",
1874 .info = snd_vt1724_pro_internal_clock_info,
1875 .get = snd_vt1724_pro_internal_clock_get,
1876 .put = snd_vt1724_pro_internal_clock_put
1877};
1878
a5ce8890 1879#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1880
ab0c7d72
TI		 1881static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1882 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1883{
1884 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1885 return 0;
1886}
1887
ab0c7d72
TI		 1888static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1889 struct snd_ctl_elem_value *ucontrol)
1da177e4 1890{
ab0c7d72 1891 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1892 int change = 0, nval;
1893
1894 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1895 spin_lock_irq(&ice->reg_lock);
1896 change = PRO_RATE_LOCKED != nval;
1897 PRO_RATE_LOCKED = nval;
1898 spin_unlock_irq(&ice->reg_lock);
1899 return change;
1900}
1901
1b60f6b0 1902static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT		 1903 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1904 .name = "Multi Track Rate Locking",
1905 .info = snd_vt1724_pro_rate_locking_info,
1906 .get = snd_vt1724_pro_rate_locking_get,
1907 .put = snd_vt1724_pro_rate_locking_put
1908};
1909
a5ce8890 1910#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 1911
ab0c7d72
TI		 1912static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1913 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1914{
1915 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1916 return 0;
1917}
1918
ab0c7d72
TI		 1919static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1920 struct snd_ctl_elem_value *ucontrol)
1da177e4 1921{
ab0c7d72 1922 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1923 int change = 0, nval;
1924
1925 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1926 spin_lock_irq(&ice->reg_lock);
1927 change = PRO_RATE_RESET != nval;
1928 PRO_RATE_RESET = nval;
1929 spin_unlock_irq(&ice->reg_lock);
1930 return change;
1931}
1932
1b60f6b0 1933static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT		 1934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1935 .name = "Multi Track Rate Reset",
1936 .info = snd_vt1724_pro_rate_reset_info,
1937 .get = snd_vt1724_pro_rate_reset_get,
1938 .put = snd_vt1724_pro_rate_reset_put
1939};
1940
1941
1942/*
1943 * routing
1944 */
ab0c7d72
TI		 1945static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1947{
1948 static char *texts[] = {
1949 "PCM Out", /* 0 */
1950 "H/W In 0", "H/W In 1", /* 1-2 */
1951 "IEC958 In L", "IEC958 In R", /* 3-4 */
1952 };
1de9fdc2 1953
1da177e4
LT		 1954 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1955 uinfo->count = 1;
1956 uinfo->value.enumerated.items = 5;
1957 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1958 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1959 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1960 return 0;
1961}
1962
1963static inline int analog_route_shift(int idx)
1964{
1965 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1966}
1967
1968static inline int digital_route_shift(int idx)
1969{
1970 return idx * 3;
1971}
1972
ab0c7d72 1973static int get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT		 1974{
1975 unsigned long val;
1976 unsigned char eitem;
32b47da0 1977 static const unsigned char xlate[8] = {
1da177e4
LT		 1978 0, 255, 1, 2, 255, 255, 3, 4,
1979 };
1980
1981 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1982 val >>= shift;
1de9fdc2 1983 val &= 7; /* we now have 3 bits per output */
1da177e4
LT		 1984 eitem = xlate[val];
1985 if (eitem == 255) {
1986 snd_BUG();
1987 return 0;
1988 }
1989 return eitem;
1990}
1991
ab0c7d72 1992static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
1da177e4
LT		 1993{
1994 unsigned int old_val, nval;
1995 int change;
32b47da0 1996 static const unsigned char xroute[8] = {
1da177e4
LT		 1997 0, /* PCM */
1998 2, /* PSDIN0 Left */
1999 3, /* PSDIN0 Right */
2000 6, /* SPDIN Left */
2001 7, /* SPDIN Right */
2002 };
2003
2004 nval = xroute[val % 5];
2005 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2006 val &= ~(0x07 << shift);
2007 val |= nval << shift;
2008 change = val != old_val;
2009 if (change)
2010 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2011 return change;
2012}
2013
ab0c7d72
TI		 2014static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
1da177e4 2016{
ab0c7d72 2017 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2018 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 2019 ucontrol->value.enumerated.item[0] =
2020 get_route_val(ice, analog_route_shift(idx));
1da177e4
LT		 2021 return 0;
2022}
2023
ab0c7d72
TI		 2024static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2025 struct snd_ctl_elem_value *ucontrol)
1da177e4 2026{
ab0c7d72 2027 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2028 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2029 return put_route_val(ice, ucontrol->value.enumerated.item[0],
2030 analog_route_shift(idx));
2031}
2032
ab0c7d72
TI		 2033static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2034 struct snd_ctl_elem_value *ucontrol)
1da177e4 2035{
ab0c7d72 2036 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2037 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 2038 ucontrol->value.enumerated.item[0] =
2039 get_route_val(ice, digital_route_shift(idx));
1da177e4
LT		 2040 return 0;
2041}
2042
ab0c7d72
TI		 2043static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2044 struct snd_ctl_elem_value *ucontrol)
1da177e4 2045{
ab0c7d72 2046 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2047 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2048 return put_route_val(ice, ucontrol->value.enumerated.item[0],
2049 digital_route_shift(idx));
2050}
2051
1b60f6b0 2052static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
1da177e4
LT		 2053 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2054 .name = "H/W Playback Route",
2055 .info = snd_vt1724_pro_route_info,
2056 .get = snd_vt1724_pro_route_analog_get,
2057 .put = snd_vt1724_pro_route_analog_put,
2058};
2059
1b60f6b0 2060static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4 2061 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1de9fdc2 2062 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2063 .info = snd_vt1724_pro_route_info,
2064 .get = snd_vt1724_pro_route_spdif_get,
2065 .put = snd_vt1724_pro_route_spdif_put,
2066 .count = 2,
2067};
2068
2069
ab0c7d72
TI		 2070static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2071 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2072{
2073 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2074 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2075 uinfo->value.integer.min = 0;
2076 uinfo->value.integer.max = 255;
2077 return 0;
2078}
2079
ab0c7d72
TI		 2080static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2081 struct snd_ctl_elem_value *ucontrol)
1da177e4 2082{
ab0c7d72 2083 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2084 int idx;
1de9fdc2 2085
1da177e4
LT		 2086 spin_lock_irq(&ice->reg_lock);
2087 for (idx = 0; idx < 22; idx++) {
2088 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI		 2089 ucontrol->value.integer.value[idx] =
2090 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT		 2091 }
2092 spin_unlock_irq(&ice->reg_lock);
2093 return 0;
2094}
2095
1b60f6b0 2096static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
1da177e4
LT		 2097 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2098 .name = "Multi Track Peak",
2099 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2100 .info = snd_vt1724_pro_peak_info,
2101 .get = snd_vt1724_pro_peak_get
2102};
2103
2104/*
2105 *
2106 */
2107
1b60f6b0 2108static struct snd_ice1712_card_info no_matched __devinitdata;
1da177e4 2109
1b60f6b0 2110static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1da177e4 2111 snd_vt1724_revo_cards,
1de9fdc2 2112 snd_vt1724_amp_cards,
1da177e4
LT		 2113 snd_vt1724_aureon_cards,
2114 snd_vt1720_mobo_cards,
2115 snd_vt1720_pontis_cards,
6b8d6e55 2116 snd_vt1724_prodigy_hifi_cards,
1da177e4
LT		 2117 snd_vt1724_prodigy192_cards,
2118 snd_vt1724_juli_cards,
2119 snd_vt1724_phase_cards,
f6cdab5f 2120 snd_vt1724_wtm_cards,
f31639b8 2121 snd_vt1724_se_cards,
1da177e4
LT		 2122 NULL,
2123};
2124
2125
2126/*
2127 */
2128
ab0c7d72 2129static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT		 2130{
2131 int t = 0x10000;
2132 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2133 ;
2134 if (t == -1)
2135 printk(KERN_ERR "ice1724: i2c busy timeout\n");
2136}
2137
ab0c7d72
TI		 2138unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2139 unsigned char dev, unsigned char addr)
1da177e4
LT		 2140{
2141 unsigned char val;
2142
62932df8 2143 mutex_lock(&ice->i2c_mutex);
acec30ff 2144 wait_i2c_busy(ice);
1da177e4
LT		 2145 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2146 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2147 wait_i2c_busy(ice);
2148 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 2149 mutex_unlock(&ice->i2c_mutex);
e2ea7cfc
TI		 2150 /*
2151 printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2152 */
1da177e4
LT		 2153 return val;
2154}
2155
ab0c7d72
TI		 2156void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2157 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 2158{
62932df8 2159 mutex_lock(&ice->i2c_mutex);
1da177e4 2160 wait_i2c_busy(ice);
e2ea7cfc
TI		 2161 /*
2162 printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2163 */
1da177e4
LT		 2164 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2165 outb(data, ICEREG1724(ice, I2C_DATA));
2166 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2167 wait_i2c_busy(ice);
62932df8 2168 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT		 2169}
2170
ab0c7d72
TI		 2171static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2172 const char *modelname)
1da177e4
LT		 2173{
2174 const int dev = 0xa0; /* EEPROM device address */
2175 unsigned int i, size;
1b60f6b0 2176 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2177
1de9fdc2 2178 if (!modelname || !*modelname) {
1da177e4
LT		 2179 ice->eeprom.subvendor = 0;
2180 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2181 ice->eeprom.subvendor =
2182 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1de9fdc2
AB		 2183 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2184 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2185 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI		 2186 if (ice->eeprom.subvendor == 0 ||
2187 ice->eeprom.subvendor == (unsigned int)-1) {
2188 /* invalid subvendor from EEPROM, try the PCI
2189 * subststem ID instead
2190 */
1da177e4 2191 u16 vendor, device;
ab0c7d72
TI		 2192 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2193 &vendor);
1da177e4 2194 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI		 2195 ice->eeprom.subvendor =
2196 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2197 if (ice->eeprom.subvendor == 0 ||
2198 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2199 printk(KERN_ERR "ice1724: No valid ID is found\n");
2200 return -ENXIO;
2201 }
2202 }
2203 }
2204 for (tbl = card_tables; *tbl; tbl++) {
2205 for (c = *tbl; c->subvendor; c++) {
ab0c7d72 2206 if (modelname && c->model &&
1de9fdc2 2207 !strcmp(modelname, c->model)) {
ab0c7d72
TI		 2208 printk(KERN_INFO "ice1724: Using board model %s\n",
2209 c->name);
1da177e4
LT		 2210 ice->eeprom.subvendor = c->subvendor;
2211 } else if (c->subvendor != ice->eeprom.subvendor)
2212 continue;
1de9fdc2 2213 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2214 goto found;
2215 /* if the EEPROM is given by the driver, use it */
2216 snd_printdd("using the defined eeprom..\n");
2217 ice->eeprom.version = 2;
2218 ice->eeprom.size = c->eeprom_size + 6;
2219 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2220 goto read_skipped;
2221 }
2222 }
ab0c7d72
TI		 2223 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2224 ice->eeprom.subvendor);
1da177e4
LT		 2225
2226 found:
2227 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2228 if (ice->eeprom.size < 6)
2229 ice->eeprom.size = 32;
2230 else if (ice->eeprom.size > 32) {
ab0c7d72
TI		 2231 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2232 ice->eeprom.size);
1da177e4
LT		 2233 return -EIO;
2234 }
2235 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2236 if (ice->eeprom.version != 2)
ab0c7d72
TI		 2237 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2238 ice->eeprom.version);
1da177e4
LT		 2239 size = ice->eeprom.size - 6;
2240 for (i = 0; i < size; i++)
2241 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2242
2243 read_skipped:
2244 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2245 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2246 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2247
2248 return 0;
2249}
2250
2251
2252
988f0664 2253static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
1da177e4
LT		 2254{
2255 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
988f0664 2256 msleep(10);
1da177e4 2257 outb(0, ICEREG1724(ice, CONTROL));
988f0664
KW		 2258 msleep(10);
2259}
2260
2261static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
2262{
1da177e4
LT		 2263 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2264 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2265 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2266 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2267
2268 ice->gpio.write_mask = ice->eeprom.gpiomask;
2269 ice->gpio.direction = ice->eeprom.gpiodir;
2270 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2271 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2272 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2273
2274 outb(0, ICEREG1724(ice, POWERDOWN));
2275
2276 return 0;
2277}
2278
ab0c7d72 2279static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2280{
2281 int err;
ab0c7d72 2282 struct snd_kcontrol *kctl;
1da177e4 2283
da3cec35
TI		 2284 if (snd_BUG_ON(!ice->pcm))
2285 return -EIO;
1da177e4
LT		 2286
2287 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2288 if (err < 0)
2289 return err;
2290
2291 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2292 if (err < 0)
2293 return err;
2294
2295 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2296 if (err < 0)
2297 return err;
2298 kctl->id.device = ice->pcm->device;
2299 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2300 if (err < 0)
2301 return err;
2302 kctl->id.device = ice->pcm->device;
2303 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2304 if (err < 0)
2305 return err;
2306 kctl->id.device = ice->pcm->device;
2307#if 0 /* use default only */
2308 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2309 if (err < 0)
2310 return err;
2311 kctl->id.device = ice->pcm->device;
2312 ice->spdif.stream_ctl = kctl;
2313#endif
2314 return 0;
2315}
2316
2317
ab0c7d72 2318static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2319{
2320 int err;
2321
2322 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2323 if (err < 0)
2324 return err;
2325 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2326 if (err < 0)
2327 return err;
2328
2329 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2330 if (err < 0)
2331 return err;
2332 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2333 if (err < 0)
2334 return err;
2335
2336 if (ice->num_total_dacs > 0) {
ab0c7d72 2337 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT		 2338 tmp.count = ice->num_total_dacs;
2339 if (ice->vt1720 && tmp.count > 2)
2340 tmp.count = 2;
2341 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2342 if (err < 0)
2343 return err;
2344 }
2345
2346 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2347 if (err < 0)
2348 return err;
2349
2350 return 0;
2351}
2352
ab0c7d72 2353static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4 2354{
1de9fdc2 2355 if (!ice->port)
1da177e4
LT		 2356 goto __hw_end;
2357 /* mask all interrupts */
2358 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2359 outb(0xff, ICEREG1724(ice, IRQMASK));
2360 /* --- */
1de9fdc2 2361__hw_end:
f000fd80 2362 if (ice->irq >= 0)
ab0c7d72 2363 free_irq(ice->irq, ice);
1da177e4
LT		 2364 pci_release_regions(ice->pci);
2365 snd_ice1712_akm4xxx_free(ice);
2366 pci_disable_device(ice->pci);
7cda8ba9 2367 kfree(ice->spec);
1da177e4
LT		 2368 kfree(ice);
2369 return 0;
2370}
2371
ab0c7d72 2372static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2373{
ab0c7d72 2374 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2375 return snd_vt1724_free(ice);
2376}
2377
ab0c7d72 2378static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT		 2379 struct pci_dev *pci,
2380 const char *modelname,
1de9fdc2 2381 struct snd_ice1712 **r_ice1712)
1da177e4 2382{
ab0c7d72 2383 struct snd_ice1712 *ice;
1da177e4 2384 int err;
ab0c7d72 2385 static struct snd_device_ops ops = {
1da177e4
LT		 2386 .dev_free = snd_vt1724_dev_free,
2387 };
2388
2389 *r_ice1712 = NULL;
2390
1de9fdc2
AB		 2391 /* enable PCI device */
2392 err = pci_enable_device(pci);
2393 if (err < 0)
1da177e4
LT		 2394 return err;
2395
e560d8d8 2396 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2397 if (ice == NULL) {
2398 pci_disable_device(pci);
2399 return -ENOMEM;
2400 }
2401 ice->vt1724 = 1;
2402 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2403 mutex_init(&ice->gpio_mutex);
2404 mutex_init(&ice->open_mutex);
2405 mutex_init(&ice->i2c_mutex);
1da177e4
LT		 2406 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2407 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2408 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2409 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2410 ice->card = card;
2411 ice->pci = pci;
2412 ice->irq = -1;
2413 pci_set_master(pci);
2414 snd_vt1724_proc_init(ice);
2415 synchronize_irq(pci->irq);
2416
1de9fdc2
AB		 2417 err = pci_request_regions(pci, "ICE1724");
2418 if (err < 0) {
1da177e4
LT		 2419 kfree(ice);
2420 pci_disable_device(pci);
2421 return err;
2422 }
2423 ice->port = pci_resource_start(pci, 0);
2424 ice->profi_port = pci_resource_start(pci, 1);
2425
ab0c7d72 2426 if (request_irq(pci->irq, snd_vt1724_interrupt,
437a5a46 2427 IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2428 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2429 snd_vt1724_free(ice);
2430 return -EIO;
2431 }
2432
2433 ice->irq = pci->irq;
2434
988f0664 2435 snd_vt1724_chip_reset(ice);
1da177e4
LT		 2436 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2437 snd_vt1724_free(ice);
2438 return -EIO;
2439 }
2440 if (snd_vt1724_chip_init(ice) < 0) {
2441 snd_vt1724_free(ice);
2442 return -EIO;
2443 }
2444
6834d7ce
TI		 2445 /* MPU_RX and TX irq masks are cleared later dynamically */
2446 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
4074ea21 2447
ab0c7d72
TI		 2448 /* don't handle FIFO overrun/underruns (just yet),
2449 * since they cause machine lockups
2450 */
1da177e4
LT		 2451 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2452
1de9fdc2
AB		 2453 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2454 if (err < 0) {
1da177e4 2455 snd_vt1724_free(ice);
1de9fdc2 2456 return err;
1da177e4
LT		 2457 }
2458
2459 snd_card_set_dev(card, &pci->dev);
2460
2461 *r_ice1712 = ice;
2462 return 0;
2463}
2464
2465
2466/*
2467 *
2468 * Registration
2469 *
2470 */
2471
2472static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2473 const struct pci_device_id *pci_id)
2474{
2475 static int dev;
ab0c7d72
TI		 2476 struct snd_card *card;
2477 struct snd_ice1712 *ice;
1da177e4 2478 int pcm_dev = 0, err;
1b60f6b0 2479 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2480
2481 if (dev >= SNDRV_CARDS)
2482 return -ENODEV;
2483 if (!enable[dev]) {
2484 dev++;
2485 return -ENOENT;
2486 }
2487
e58de7ba
TI		 2488 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2489 if (err < 0)
2490 return err;
1da177e4
LT		 2491
2492 strcpy(card->driver, "ICE1724");
2493 strcpy(card->shortname, "ICEnsemble ICE1724");
1de9fdc2
AB		 2494
2495 err = snd_vt1724_create(card, pci, model[dev], &ice);
2496 if (err < 0) {
1da177e4
LT		 2497 snd_card_free(card);
2498 return err;
2499 }
2500
2501 for (tbl = card_tables; *tbl; tbl++) {
2502 for (c = *tbl; c->subvendor; c++) {
2503 if (c->subvendor == ice->eeprom.subvendor) {
2504 strcpy(card->shortname, c->name);
2505 if (c->driver) /* specific driver? */
2506 strcpy(card->driver, c->driver);
2507 if (c->chip_init) {
1de9fdc2
AB		 2508 err = c->chip_init(ice);
2509 if (err < 0) {
1da177e4
LT		 2510 snd_card_free(card);
2511 return err;
2512 }
2513 }
2514 goto __found;
2515 }
2516 }
2517 }
2518 c = &no_matched;
1de9fdc2
AB		 2519__found:
2520 /*
2521 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2522 * ICE1712 has only one for both (mixed up).
2523 *
2524 * Confusingly the analog PCM is named "professional" here because it
2525 * was called so in ice1712 driver, and vt1724 driver is derived from
2526 * ice1712 driver.
2527 */
d16be8ed
PH		 2528 ice->pro_rate_default = PRO_RATE_DEFAULT;
2529 if (!ice->is_spdif_master)
2530 ice->is_spdif_master = stdclock_is_spdif_master;
2531 if (!ice->get_rate)
2532 ice->get_rate = stdclock_get_rate;
2533 if (!ice->set_rate)
2534 ice->set_rate = stdclock_set_rate;
2535 if (!ice->set_mclk)
2536 ice->set_mclk = stdclock_set_mclk;
2537 if (!ice->set_spdif_clock)
2538 ice->set_spdif_clock = stdclock_set_spdif_clock;
2539 if (!ice->hw_rates)
2540 set_std_hw_rates(ice);
1da177e4 2541
1de9fdc2
AB		 2542 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2543 if (err < 0) {
1da177e4
LT		 2544 snd_card_free(card);
2545 return err;
2546 }
1de9fdc2
AB		 2547
2548 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2549 if (err < 0) {
1da177e4
LT		 2550 snd_card_free(card);
2551 return err;
2552 }
1de9fdc2
AB		 2553
2554 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2555 if (err < 0) {
1da177e4
LT		 2556 snd_card_free(card);
2557 return err;
2558 }
2559
1de9fdc2
AB		 2560 err = snd_vt1724_ac97_mixer(ice);
2561 if (err < 0) {
1da177e4
LT		 2562 snd_card_free(card);
2563 return err;
2564 }
2565
1de9fdc2
AB		 2566 err = snd_vt1724_build_controls(ice);
2567 if (err < 0) {
1da177e4
LT		 2568 snd_card_free(card);
2569 return err;
2570 }
2571
2572 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
1de9fdc2
AB		 2573 err = snd_vt1724_spdif_build_controls(ice);
2574 if (err < 0) {
1da177e4
LT		 2575 snd_card_free(card);
2576 return err;
2577 }
2578 }
2579
2580 if (c->build_controls) {
1de9fdc2
AB		 2581 err = c->build_controls(ice);
2582 if (err < 0) {
1da177e4
LT		 2583 snd_card_free(card);
2584 return err;
2585 }
2586 }
2587
1de9fdc2 2588 if (!c->no_mpu401) {
1da177e4 2589 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
aea3bfbc
CL		 2590 struct snd_rawmidi *rmidi;
2591
2592 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2593 if (err < 0) {
1da177e4
LT		 2594 snd_card_free(card);
2595 return err;
2596 }
aea3bfbc
CL		 2597 ice->rmidi[0] = rmidi;
2598 rmidi->private_data = ice;
2599 strcpy(rmidi->name, "ICE1724 MIDI");
2600 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2601 SNDRV_RAWMIDI_INFO_INPUT |
2602 SNDRV_RAWMIDI_INFO_DUPLEX;
2603 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2604 &vt1724_midi_output_ops);
2605 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2606 &vt1724_midi_input_ops);
2607
3a841d51
TI		 2608 /* set watermarks */
2609 outb(VT1724_MPU_RX_FIFO | 0x1,
2610 ICEREG1724(ice, MPU_FIFO_WM));
2611 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
aea3bfbc
CL		 2612 /* set UART mode */
2613 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
1da177e4
LT		 2614 }
2615 }
2616
2617 sprintf(card->longname, "%s at 0x%lx, irq %i",
2618 card->shortname, ice->port, ice->irq);
2619
1de9fdc2
AB		 2620 err = snd_card_register(card);
2621 if (err < 0) {
1da177e4
LT		 2622 snd_card_free(card);
2623 return err;
2624 }
2625 pci_set_drvdata(pci, card);
2626 dev++;
2627 return 0;
2628}
2629
2630static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2631{
2632 snd_card_free(pci_get_drvdata(pci));
2633 pci_set_drvdata(pci, NULL);
2634}
2635
2636static struct pci_driver driver = {
2637 .name = "ICE1724",
2638 .id_table = snd_vt1724_ids,
2639 .probe = snd_vt1724_probe,
2640 .remove = __devexit_p(snd_vt1724_remove),
2641};
2642
2643static int __init alsa_card_ice1724_init(void)
2644{
01d25d46 2645 return pci_register_driver(&driver);
1da177e4
LT		 2646}
2647
2648static void __exit alsa_card_ice1724_exit(void)
2649{
2650 pci_unregister_driver(&driver);
2651}
2652
2653module_init(alsa_card_ice1724_init)
2654module_exit(alsa_card_ice1724_exit)
Linux kernel - Deliverables
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