[ALSA] ice1724 - Improved the Juli rate setting
[deliverable/linux.git] / sound / pci / ice1712 / juli.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for ICEnsemble VT1724 (Envy24HT)
3 *
4 * Lowlevel functions for ESI Juli@ cards
5 *
c1017a4c 6 * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
d16be8ed
PH
7 * 2008 Pavel Hofman <dustin@seznam.cz>
8 *
1da177e4
LT
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
1da177e4
LT
26#include <asm/io.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <sound/core.h>
d16be8ed 32#include <sound/tlv.h>
1da177e4
LT
33
34#include "ice1712.h"
35#include "envy24ht.h"
36#include "juli.h"
7cda8ba9
TI
37struct juli_spec {
38 struct ak4114 *ak4114;
39 unsigned int analog: 1;
40};
41
1da177e4
LT
42/*
43 * chip addresses on I2C bus
44 */
45#define AK4114_ADDR 0x20 /* S/PDIF receiver */
46#define AK4358_ADDR 0x22 /* DAC */
47
d16be8ed
PH
48/*
49 * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
50 * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
51 * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
52 *
53 * The clock circuitry is supplied by the two ice1724 crystals. This
54 * arrangement allows to generate independent clock signal for AK4114's input
55 * rate detection circuit. As a result, Juli, unlike most other
56 * ice1724+ak4114-based cards, detects spdif input rate correctly.
57 * This fact is applied in the driver, allowing to modify PCM stream rate
58 * parameter according to the actual input rate.
59 *
60 * Juli uses the remaining three stereo-channels of its DAC to optionally
61 * monitor analog input, digital input, and digital output. The corresponding
62 * I2S signals are routed by Xilinx, controlled by GPIOs.
63 *
64 * The master mute is implemented using output muting transistors (GPIO) in
65 * combination with smuting the DAC.
66 *
67 * The card itself has no HW master volume control, implemented using the
68 * vmaster control.
69 *
70 * TODO:
71 * researching and fixing the input monitors
72 */
73
1da177e4
LT
74/*
75 * GPIO pins
76 */
77#define GPIO_FREQ_MASK (3<<0)
78#define GPIO_FREQ_32KHZ (0<<0)
79#define GPIO_FREQ_44KHZ (1<<0)
80#define GPIO_FREQ_48KHZ (2<<0)
81#define GPIO_MULTI_MASK (3<<2)
82#define GPIO_MULTI_4X (0<<2)
83#define GPIO_MULTI_2X (1<<2)
84#define GPIO_MULTI_1X (2<<2) /* also external */
85#define GPIO_MULTI_HALF (3<<2)
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86#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
87#define GPIO_CLOCK_MASK (1<<4)
1da177e4
LT
88#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
89#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
90#define GPIO_AK5385A_CKS0 (1<<8)
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91#define GPIO_AK5385A_DFS1 (1<<9)
92#define GPIO_AK5385A_DFS0 (1<<10)
1da177e4
LT
93#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
94#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
95#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
d16be8ed
PH
96#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
97#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
98
99#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
100 GPIO_CLOCK_MASK)
101#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
102 GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
103
104#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
105 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
106 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
107 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
108 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
109
110#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
111 GPIO_INTERNAL_CLOCK)
112#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
113 GPIO_INTERNAL_CLOCK)
114#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
115 GPIO_INTERNAL_CLOCK)
116#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
117 GPIO_INTERNAL_CLOCK)
118#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
119 GPIO_INTERNAL_CLOCK)
120#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
121 GPIO_INTERNAL_CLOCK)
122#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
123 GPIO_INTERNAL_CLOCK)
124#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
125 GPIO_INTERNAL_CLOCK)
126#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
127 GPIO_INTERNAL_CLOCK)
128#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
129 GPIO_INTERNAL_CLOCK)
130#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
131 GPIO_INTERNAL_CLOCK)
132
133/*
134 * Initial setup of the conversion array GPIO <-> rate
135 */
136static unsigned int juli_rates[] = {
137 16000, 22050, 24000, 32000,
138 44100, 48000, 64000, 88200,
139 96000, 176400, 192000,
140};
141
142static unsigned int gpio_vals[] = {
143 GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
144 GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
145 GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
146};
147
148static struct snd_pcm_hw_constraint_list juli_rates_info = {
149 .count = ARRAY_SIZE(juli_rates),
150 .list = juli_rates,
151 .mask = 0,
152};
153
154static int get_gpio_val(int rate)
155{
156 int i;
157 for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
158 if (juli_rates[i] == rate)
159 return gpio_vals[i];
160 return 0;
161}
1da177e4
LT
162
163static void juli_ak4114_write(void *private_data, unsigned char reg, unsigned char val)
164{
ab0c7d72 165 snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, reg, val);
1da177e4
LT
166}
167
168static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
169{
ab0c7d72 170 return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR, reg);
1da177e4
LT
171}
172
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173/*
174 * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
175 * to the external rate
176 */
c93f5a1e
TI
177static void juli_spdif_in_open(struct snd_ice1712 *ice,
178 struct snd_pcm_substream *substream)
179{
180 struct juli_spec *spec = ice->spec;
181 struct snd_pcm_runtime *runtime = substream->runtime;
182 int rate;
183
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184 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
185 !ice->is_spdif_master(ice))
c93f5a1e
TI
186 return;
187 rate = snd_ak4114_external_rate(spec->ak4114);
188 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
189 runtime->hw.rate_min = rate;
190 runtime->hw.rate_max = rate;
191 }
192}
193
1da177e4
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194/*
195 * AK4358 section
196 */
197
ab0c7d72 198static void juli_akm_lock(struct snd_akm4xxx *ak, int chip)
1da177e4
LT
199{
200}
201
ab0c7d72 202static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip)
1da177e4
LT
203{
204}
205
ab0c7d72 206static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
1da177e4
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207 unsigned char addr, unsigned char data)
208{
ab0c7d72 209 struct snd_ice1712 *ice = ak->private_data[0];
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210
211 snd_assert(chip == 0, return);
212 snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data);
213}
214
215/*
d16be8ed 216 * change the rate of envy24HT, AK4358, AK5385
1da177e4 217 */
ab0c7d72 218static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
1da177e4 219{
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PH
220 unsigned char old, tmp, ak4358_dfs;
221 unsigned int ak5385_pins, old_gpio, new_gpio;
222 struct snd_ice1712 *ice = ak->private_data[0];
223 struct juli_spec *spec = ice->spec;
1da177e4 224
d16be8ed
PH
225 if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
226 input rate undetected, simply return */
1da177e4 227 return;
d16be8ed 228
1da177e4 229 /* adjust DFS on codecs */
d16be8ed
PH
230 if (rate > 96000) {
231 ak4358_dfs = 2;
232 ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
233 } else if (rate > 48000) {
234 ak4358_dfs = 1;
235 ak5385_pins = GPIO_AK5385A_DFS0;
236 } else {
237 ak4358_dfs = 0;
238 ak5385_pins = 0;
239 }
240 /* AK5385 first, since it requires cold reset affecting both codecs */
241 old_gpio = ice->gpio.get_data(ice);
242 new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
243 /* printk(KERN_DEBUG "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
244 new_gpio); */
245 ice->gpio.set_data(ice, new_gpio);
246
247 /* cold reset */
248 old = inb(ICEMT1724(ice, AC97_CMD));
249 outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
250 udelay(1);
251 outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
252
253 /* AK4358 */
254 /* set new value, reset DFS */
1da177e4 255 tmp = snd_akm4xxx_get(ak, 0, 2);
1da177e4
LT
256 snd_akm4xxx_reset(ak, 1);
257 tmp = snd_akm4xxx_get(ak, 0, 2);
258 tmp &= ~(0x03 << 4);
d16be8ed 259 tmp |= ak4358_dfs << 4;
1da177e4
LT
260 snd_akm4xxx_set(ak, 0, 2, tmp);
261 snd_akm4xxx_reset(ak, 0);
d16be8ed
PH
262
263 /* reinit ak4114 */
264 snd_ak4114_reinit(spec->ak4114);
1da177e4
LT
265}
266
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PH
267#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
268#define PCM_VOLUME "PCM Playback Volume"
269#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
270#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
271#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
272
273static const struct snd_akm4xxx_dac_channel juli_dac[] = {
274 AK_DAC(PCM_VOLUME, 2),
275 AK_DAC(MONITOR_AN_IN_VOLUME, 2),
276 AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
277 AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
278};
279
280
1b60f6b0 281static struct snd_akm4xxx akm_juli_dac __devinitdata = {
1da177e4 282 .type = SND_AK4358,
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PH
283 .num_dacs = 8, /* DAC1 - analog out
284 DAC2 - analog in monitor
285 DAC3 - digital out monitor
286 DAC4 - digital in monitor
287 */
1da177e4
LT
288 .ops = {
289 .lock = juli_akm_lock,
290 .unlock = juli_akm_unlock,
291 .write = juli_akm_write,
292 .set_rate_val = juli_akm_set_rate_val
d16be8ed
PH
293 },
294 .dac_info = juli_dac,
295};
296
297#define juli_mute_info snd_ctl_boolean_mono_info
298
299static int juli_mute_get(struct snd_kcontrol *kcontrol,
300 struct snd_ctl_elem_value *ucontrol)
301{
302 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
303 unsigned int val;
304 val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
305 if (kcontrol->private_value == GPIO_MUTE_CONTROL)
306 /* val 0 = signal on */
307 ucontrol->value.integer.value[0] = (val) ? 0 : 1;
308 else
309 /* val 1 = signal on */
310 ucontrol->value.integer.value[0] = (val) ? 1 : 0;
311 return 0;
312}
313
314static int juli_mute_put(struct snd_kcontrol *kcontrol,
315 struct snd_ctl_elem_value *ucontrol)
316{
317 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
318 unsigned int old_gpio, new_gpio;
319 old_gpio = ice->gpio.get_data(ice);
320 if (ucontrol->value.integer.value[0]) {
321 /* unmute */
322 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
323 /* 0 = signal on */
324 new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
325 /* un-smuting DAC */
326 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
327 } else
328 /* 1 = signal on */
329 new_gpio = old_gpio |
330 (unsigned int) kcontrol->private_value;
331 } else {
332 /* mute */
333 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
334 /* 1 = signal off */
335 new_gpio = old_gpio | GPIO_MUTE_CONTROL;
336 /* smuting DAC */
337 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
338 } else
339 /* 0 = signal off */
340 new_gpio = old_gpio &
341 ~((unsigned int) kcontrol->private_value);
342 }
343 /* printk("JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, \
344 new_gpio 0x%x\n",
345 (unsigned int)ucontrol->value.integer.value[0], old_gpio,
346 new_gpio); */
347 if (old_gpio != new_gpio) {
348 ice->gpio.set_data(ice, new_gpio);
349 return 1;
350 }
351 /* no change */
352 return 0;
353}
354
355static struct snd_kcontrol_new juli_mute_controls[] __devinitdata = {
356 {
357 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
358 .name = "Master Playback Switch",
359 .info = juli_mute_info,
360 .get = juli_mute_get,
361 .put = juli_mute_put,
362 .private_value = GPIO_MUTE_CONTROL,
363 },
364 /* Although the following functionality respects the succint NDA'd
365 * documentation from the card manufacturer, and the same way of
366 * operation is coded in OSS Juli driver, only Digital Out monitor
367 * seems to work. Surprisingly, Analog input monitor outputs Digital
368 * output data. The two are independent, as enabling both doubles
369 * volume of the monitor sound.
370 *
371 * Checking traces on the board suggests the functionality described
372 * by the manufacturer is correct - I2S from ADC and AK4114
373 * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
374 * inputs) are fed from Xilinx.
375 *
376 * I even checked traces on board and coded a support in driver for
377 * an alternative possiblity - the unused I2S ICE output channels
378 * switched to HW-IN/SPDIF-IN and providing the monitoring signal to
379 * the DAC - to no avail. The I2S outputs seem to be unconnected.
380 *
381 * The windows driver supports the monitoring correctly.
382 */
383 {
384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
385 .name = "Monitor Analog In Switch",
386 .info = juli_mute_info,
387 .get = juli_mute_get,
388 .put = juli_mute_put,
389 .private_value = GPIO_ANAIN_MONITOR,
390 },
391 {
392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
393 .name = "Monitor Digital Out Switch",
394 .info = juli_mute_info,
395 .get = juli_mute_get,
396 .put = juli_mute_put,
397 .private_value = GPIO_DIGOUT_MONITOR,
398 },
399 {
400 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
401 .name = "Monitor Digital In Switch",
402 .info = juli_mute_info,
403 .get = juli_mute_get,
404 .put = juli_mute_put,
405 .private_value = GPIO_DIGIN_MONITOR,
406 },
407};
408
409
410static void ak4358_proc_regs_read(struct snd_info_entry *entry,
411 struct snd_info_buffer *buffer)
412{
413 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
414 int reg, val;
415 for (reg = 0; reg <= 0xf; reg++) {
416 val = snd_akm4xxx_get(ice->akm, 0, reg);
417 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
1da177e4 418 }
d16be8ed
PH
419}
420
421static void ak4358_proc_init(struct snd_ice1712 *ice)
422{
423 struct snd_info_entry *entry;
424 if (!snd_card_proc_new(ice->card, "ak4358_codec", &entry))
425 snd_info_set_text_ops(entry, ice, ak4358_proc_regs_read);
426}
427
428static char *slave_vols[] __devinitdata = {
429 PCM_VOLUME,
430 MONITOR_AN_IN_VOLUME,
431 MONITOR_DIG_IN_VOLUME,
432 MONITOR_DIG_OUT_VOLUME,
433 NULL
1da177e4
LT
434};
435
d16be8ed
PH
436static __devinitdata
437DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
438
439static struct snd_kcontrol __devinit *ctl_find(struct snd_card *card,
440 const char *name)
441{
442 struct snd_ctl_elem_id sid;
443 memset(&sid, 0, sizeof(sid));
444 /* FIXME: strcpy is bad. */
445 strcpy(sid.name, name);
446 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
447 return snd_ctl_find_id(card, &sid);
448}
449
450static void __devinit add_slaves(struct snd_card *card,
451 struct snd_kcontrol *master, char **list)
452{
453 for (; *list; list++) {
454 struct snd_kcontrol *slave = ctl_find(card, *list);
455 /* printk(KERN_DEBUG "add_slaves - %s\n", *list); */
456 if (slave) {
457 /* printk(KERN_DEBUG "slave %s found\n", *list); */
458 snd_ctl_add_slave(master, slave);
459 }
460 }
461}
462
ab0c7d72 463static int __devinit juli_add_controls(struct snd_ice1712 *ice)
1da177e4 464{
7cda8ba9 465 struct juli_spec *spec = ice->spec;
fdd4bb49 466 int err;
d16be8ed
PH
467 unsigned int i;
468 struct snd_kcontrol *vmaster;
469
fdd4bb49
TI
470 err = snd_ice1712_akm4xxx_build_controls(ice);
471 if (err < 0)
472 return err;
d16be8ed
PH
473
474 for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
475 err = snd_ctl_add(ice->card,
476 snd_ctl_new1(&juli_mute_controls[i], ice));
477 if (err < 0)
478 return err;
479 }
480 /* Create virtual master control */
481 vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
482 juli_master_db_scale);
483 if (!vmaster)
484 return -ENOMEM;
485 add_slaves(ice->card, vmaster, slave_vols);
486 err = snd_ctl_add(ice->card, vmaster);
487 if (err < 0)
488 return err;
489
fdd4bb49 490 /* only capture SPDIF over AK4114 */
7cda8ba9 491 err = snd_ak4114_build(spec->ak4114, NULL,
d16be8ed
PH
492 ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
493
494 ak4358_proc_init(ice);
fdd4bb49
TI
495 if (err < 0)
496 return err;
497 return 0;
1da177e4
LT
498}
499
500/*
501 * initialize the chip
502 */
d16be8ed
PH
503
504static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
505{
506 return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
507}
508
509static unsigned int juli_get_rate(struct snd_ice1712 *ice)
510{
511 int i;
512 unsigned char result;
513
514 result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
515 for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
516 if (gpio_vals[i] == result)
517 return juli_rates[i];
518 return 0;
519}
520
521/* setting new rate */
522static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
523{
524 unsigned int old, new;
525 unsigned char val;
526
527 old = ice->gpio.get_data(ice);
528 new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
529 /* printk(KERN_DEBUG "JULI - set_rate: old %x, new %x\n",
530 old & GPIO_RATE_MASK,
531 new & GPIO_RATE_MASK); */
532
533 ice->gpio.set_data(ice, new);
534 /* switching to external clock - supplied by external circuits */
535 val = inb(ICEMT1724(ice, RATE));
536 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
537}
538
539static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
540 unsigned int rate)
541{
542 /* no change in master clock */
543 return 0;
544}
545
546/* setting clock to external - SPDIF */
547static void juli_set_spdif_clock(struct snd_ice1712 *ice)
548{
549 unsigned int old;
550 old = ice->gpio.get_data(ice);
551 /* external clock (= 0), multiply 1x, 48kHz */
552 ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
553 GPIO_FREQ_48KHZ);
554}
555
556/* Called when ak4114 detects change in the input SPDIF stream */
557static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
558 unsigned char c1)
559{
560 struct snd_ice1712 *ice = ak4114->change_callback_private;
561 int rate;
562 if (ice->is_spdif_master(ice) && c1) {
563 /* only for SPDIF master mode, rate was changed */
564 rate = snd_ak4114_external_rate(ak4114);
565 /* printk(KERN_DEBUG "ak4114 - input rate changed to %d\n",
566 rate); */
567 juli_akm_set_rate_val(ice->akm, rate);
568 }
569}
570
ab0c7d72 571static int __devinit juli_init(struct snd_ice1712 *ice)
1da177e4 572{
517400cb 573 static const unsigned char ak4114_init_vals[] = {
1da177e4
LT
574 /* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN | AK4114_OCKS0 | AK4114_OCKS1,
575 /* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S,
576 /* AK4114_REG_IO0 */ AK4114_TX1E,
577 /* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT | AK4114_IPS(1),
578 /* AK4114_REG_INT0_MASK */ 0,
579 /* AK4114_REG_INT1_MASK */ 0
580 };
517400cb 581 static const unsigned char ak4114_init_txcsb[] = {
1da177e4
LT
582 0x41, 0x02, 0x2c, 0x00, 0x00
583 };
584 int err;
7cda8ba9 585 struct juli_spec *spec;
ab0c7d72 586 struct snd_akm4xxx *ak;
1da177e4 587
7cda8ba9
TI
588 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
589 if (!spec)
590 return -ENOMEM;
591 ice->spec = spec;
592
1da177e4
LT
593 err = snd_ak4114_create(ice->card,
594 juli_ak4114_read,
595 juli_ak4114_write,
596 ak4114_init_vals, ak4114_init_txcsb,
7cda8ba9 597 ice, &spec->ak4114);
1da177e4
LT
598 if (err < 0)
599 return err;
d16be8ed
PH
600 /* callback for codecs rate setting */
601 spec->ak4114->change_callback = juli_ak4114_change;
602 spec->ak4114->change_callback_private = ice;
603 /* AK4114 in Juli can detect external rate correctly */
604 spec->ak4114->check_flags = 0;
1da177e4 605
fd6715e5
JK
606#if 0
607 /* it seems that the analog doughter board detection does not work
608 reliably, so force the analog flag; it should be very rare
609 to use Juli@ without the analog doughter board */
7cda8ba9 610 spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1;
fd6715e5 611#else
7cda8ba9 612 spec->analog = 1;
fd6715e5 613#endif
1da177e4 614
7cda8ba9 615 if (spec->analog) {
1da177e4
LT
616 printk(KERN_INFO "juli@: analog I/O detected\n");
617 ice->num_total_dacs = 2;
618 ice->num_total_adcs = 2;
619
ab0c7d72 620 ak = ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
1da177e4
LT
621 if (! ak)
622 return -ENOMEM;
623 ice->akm_codecs = 1;
624 if ((err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice)) < 0)
625 return err;
626 }
627
d16be8ed
PH
628 /* juli is clocked by Xilinx array */
629 ice->hw_rates = &juli_rates_info;
630 ice->is_spdif_master = juli_is_spdif_master;
631 ice->get_rate = juli_get_rate;
632 ice->set_rate = juli_set_rate;
633 ice->set_mclk = juli_set_mclk;
634 ice->set_spdif_clock = juli_set_spdif_clock;
635
c93f5a1e 636 ice->spdif.ops.open = juli_spdif_in_open;
1da177e4
LT
637 return 0;
638}
639
640
641/*
642 * Juli@ boards don't provide the EEPROM data except for the vendor IDs.
643 * hence the driver needs to sets up it properly.
644 */
645
1b60f6b0 646static unsigned char juli_eeprom[] __devinitdata = {
d16be8ed
PH
647 [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
648 SPDIF in */
189bc171
TI
649 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
650 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
651 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
d16be8ed 652 [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
189bc171
TI
653 [ICE_EEP2_GPIO_DIR1] = 0xff,
654 [ICE_EEP2_GPIO_DIR2] = 0x7f,
d16be8ed
PH
655 [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
656 [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
189bc171 657 [ICE_EEP2_GPIO_MASK2] = 0x7f,
d16be8ed
PH
658 [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
659 GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
660 [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
189bc171 661 [ICE_EEP2_GPIO_STATE2] = 0x00,
1da177e4
LT
662};
663
664/* entry point */
1b60f6b0 665struct snd_ice1712_card_info snd_vt1724_juli_cards[] __devinitdata = {
1da177e4
LT
666 {
667 .subvendor = VT1724_SUBDEVICE_JULI,
668 .name = "ESI Juli@",
669 .model = "juli",
670 .chip_init = juli_init,
671 .build_controls = juli_add_controls,
672 .eeprom_size = sizeof(juli_eeprom),
673 .eeprom_data = juli_eeprom,
674 },
675 { } /* terminator */
676};
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