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[ALSA] ice1712 - Reorganize existing eeprom data
[deliverable/linux.git] / sound / pci / ice1712 / pontis.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for ICEnsemble VT1724 (Envy24HT)
3 *
4 * Lowlevel functions for Pontis MS300
5 *
6 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <sound/driver.h>
25#include <asm/io.h>
26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/slab.h>
62932df8
IM		 30#include <linux/mutex.h>
31
1da177e4
LT		 32#include <sound/core.h>
33#include <sound/info.h>
f640c320 34#include <sound/tlv.h>
1da177e4
LT		 35
36#include "ice1712.h"
37#include "envy24ht.h"
38#include "pontis.h"
39
40/* I2C addresses */
41#define WM_DEV 0x34
42#define CS_DEV 0x20
43
44/* WM8776 registers */
45#define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
46#define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
47#define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */
48#define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
49#define WM_DAC_ATTEN_R 0x04
50#define WM_DAC_MASTER 0x05
51#define WM_PHASE_SWAP 0x06 /* DAC phase swap */
52#define WM_DAC_CTRL1 0x07
53#define WM_DAC_MUTE 0x08
54#define WM_DAC_CTRL2 0x09
55#define WM_DAC_INT 0x0a
56#define WM_ADC_INT 0x0b
57#define WM_MASTER_CTRL 0x0c
58#define WM_POWERDOWN 0x0d
59#define WM_ADC_ATTEN_L 0x0e
60#define WM_ADC_ATTEN_R 0x0f
61#define WM_ALC_CTRL1 0x10
62#define WM_ALC_CTRL2 0x11
63#define WM_ALC_CTRL3 0x12
64#define WM_NOISE_GATE 0x13
65#define WM_LIMITER 0x14
66#define WM_ADC_MUX 0x15
67#define WM_OUT_MUX 0x16
68#define WM_RESET 0x17
69
70/*
71 * GPIO
72 */
73#define PONTIS_CS_CS (1<<4) /* CS */
74#define PONTIS_CS_CLK (1<<5) /* CLK */
75#define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
76#define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
77
78
79/*
80 * get the current register value of WM codec
81 */
ab0c7d72 82static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
1da177e4
LT		 83{
84 reg <<= 1;
85 return ((unsigned short)ice->akm[0].images[reg] << 8) |
86 ice->akm[0].images[reg + 1];
87}
88
89/*
90 * set the register value of WM codec and remember it
91 */
ab0c7d72 92static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
1da177e4
LT		 93{
94 unsigned short cval;
95 cval = (reg << 9) | val;
96 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
97}
98
ab0c7d72 99static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
1da177e4
LT		 100{
101 wm_put_nocache(ice, reg, val);
102 reg <<= 1;
103 ice->akm[0].images[reg] = val >> 8;
104 ice->akm[0].images[reg + 1] = val;
105}
106
107/*
108 * DAC volume attenuation mixer control (-64dB to 0dB)
109 */
110
111#define DAC_0dB 0xff
112#define DAC_RES 128
113#define DAC_MIN (DAC_0dB - DAC_RES)
114
ab0c7d72 115static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 116{
117 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
118 uinfo->count = 2;
119 uinfo->value.integer.min = 0; /* mute */
120 uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
121 return 0;
122}
123
ab0c7d72 124static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 125{
ab0c7d72 126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 127 unsigned short val;
128 int i;
129
62932df8 130 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 131 for (i = 0; i < 2; i++) {
132 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
133 val = val > DAC_MIN ? (val - DAC_MIN) : 0;
134 ucontrol->value.integer.value[i] = val;
135 }
62932df8 136 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 137 return 0;
138}
139
ab0c7d72 140static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 141{
ab0c7d72 142 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 143 unsigned short oval, nval;
144 int i, idx, change = 0;
145
62932df8 146 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 147 for (i = 0; i < 2; i++) {
148 nval = ucontrol->value.integer.value[i];
149 nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
150 idx = WM_DAC_ATTEN_L + i;
151 oval = wm_get(ice, idx) & 0xff;
152 if (oval != nval) {
153 wm_put(ice, idx, nval);
154 wm_put_nocache(ice, idx, nval | 0x100);
155 change = 1;
156 }
157 }
62932df8 158 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 159 return change;
160}
161
162/*
163 * ADC gain mixer control (-64dB to 0dB)
164 */
165
166#define ADC_0dB 0xcf
167#define ADC_RES 128
168#define ADC_MIN (ADC_0dB - ADC_RES)
169
ab0c7d72 170static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 171{
172 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
173 uinfo->count = 2;
174 uinfo->value.integer.min = 0; /* mute (-64dB) */
175 uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
176 return 0;
177}
178
ab0c7d72 179static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 180{
ab0c7d72 181 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 182 unsigned short val;
183 int i;
184
62932df8 185 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 186 for (i = 0; i < 2; i++) {
187 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
188 val = val > ADC_MIN ? (val - ADC_MIN) : 0;
189 ucontrol->value.integer.value[i] = val;
190 }
62932df8 191 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 192 return 0;
193}
194
ab0c7d72 195static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 196{
ab0c7d72 197 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 198 unsigned short ovol, nvol;
199 int i, idx, change = 0;
200
62932df8 201 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 202 for (i = 0; i < 2; i++) {
203 nvol = ucontrol->value.integer.value[i];
204 nvol = nvol ? (nvol + ADC_MIN) : 0;
205 idx = WM_ADC_ATTEN_L + i;
206 ovol = wm_get(ice, idx) & 0xff;
207 if (ovol != nvol) {
208 wm_put(ice, idx, nvol);
209 change = 1;
210 }
211 }
62932df8 212 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 213 return change;
214}
215
216/*
217 * ADC input mux mixer control
218 */
ab0c7d72 219static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 220{
221 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
222 uinfo->count = 1;
223 uinfo->value.integer.min = 0;
224 uinfo->value.integer.max = 1;
225 return 0;
226}
227
ab0c7d72 228static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 229{
ab0c7d72 230 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 231 int bit = kcontrol->private_value;
232
62932df8 233 mutex_lock(&ice->gpio_mutex);
1da177e4 234 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
62932df8 235 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 236 return 0;
237}
238
ab0c7d72 239static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 240{
ab0c7d72 241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 242 int bit = kcontrol->private_value;
243 unsigned short oval, nval;
244 int change;
245
62932df8 246 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 247 nval = oval = wm_get(ice, WM_ADC_MUX);
248 if (ucontrol->value.integer.value[0])
249 nval |= (1 << bit);
250 else
251 nval &= ~(1 << bit);
252 change = nval != oval;
253 if (change) {
254 wm_put(ice, WM_ADC_MUX, nval);
255 }
62932df8 256 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 257 return 0;
258}
259
260/*
261 * Analog bypass (In -> Out)
262 */
ab0c7d72 263static int wm_bypass_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 264{
265 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
266 uinfo->count = 1;
267 uinfo->value.integer.min = 0;
268 uinfo->value.integer.max = 1;
269 return 0;
270}
271
ab0c7d72 272static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 273{
ab0c7d72 274 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 275
62932df8 276 mutex_lock(&ice->gpio_mutex);
1da177e4 277 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
62932df8 278 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 279 return 0;
280}
281
ab0c7d72 282static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 283{
ab0c7d72 284 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 285 unsigned short val, oval;
286 int change = 0;
287
62932df8 288 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 289 val = oval = wm_get(ice, WM_OUT_MUX);
290 if (ucontrol->value.integer.value[0])
291 val |= 0x04;
292 else
293 val &= ~0x04;
294 if (val != oval) {
295 wm_put(ice, WM_OUT_MUX, val);
296 change = 1;
297 }
62932df8 298 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 299 return change;
300}
301
302/*
303 * Left/Right swap
304 */
ab0c7d72 305static int wm_chswap_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 306{
307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
308 uinfo->count = 1;
309 uinfo->value.integer.min = 0;
310 uinfo->value.integer.max = 1;
311 return 0;
312}
313
ab0c7d72 314static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 315{
ab0c7d72 316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 317
62932df8 318 mutex_lock(&ice->gpio_mutex);
1da177e4 319 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
62932df8 320 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 321 return 0;
322}
323
ab0c7d72 324static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 325{
ab0c7d72 326 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 327 unsigned short val, oval;
328 int change = 0;
329
62932df8 330 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 331 oval = wm_get(ice, WM_DAC_CTRL1);
332 val = oval & 0x0f;
333 if (ucontrol->value.integer.value[0])
334 val |= 0x60;
335 else
336 val |= 0x90;
337 if (val != oval) {
338 wm_put(ice, WM_DAC_CTRL1, val);
339 wm_put_nocache(ice, WM_DAC_CTRL1, val);
340 change = 1;
341 }
62932df8 342 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 343 return change;
344}
345
346/*
347 * write data in the SPI mode
348 */
ab0c7d72 349static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
1da177e4
LT		 350{
351 unsigned int tmp = snd_ice1712_gpio_read(ice);
352 if (val)
353 tmp |= bit;
354 else
355 tmp &= ~bit;
356 snd_ice1712_gpio_write(ice, tmp);
357}
358
ab0c7d72 359static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
1da177e4
LT		 360{
361 int i;
362 for (i = 0; i < 8; i++) {
363 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
364 udelay(1);
365 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
366 udelay(1);
367 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
368 udelay(1);
369 data <<= 1;
370 }
371}
372
ab0c7d72 373static unsigned int spi_read_byte(struct snd_ice1712 *ice)
1da177e4
LT		 374{
375 int i;
376 unsigned int val = 0;
377
378 for (i = 0; i < 8; i++) {
379 val <<= 1;
380 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
381 udelay(1);
382 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
383 val |= 1;
384 udelay(1);
385 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
386 udelay(1);
387 }
388 return val;
389}
390
391
ab0c7d72 392static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
1da177e4
LT		 393{
394 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
395 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
396 set_gpio_bit(ice, PONTIS_CS_CS, 0);
397 spi_send_byte(ice, dev & ~1); /* WRITE */
398 spi_send_byte(ice, reg); /* MAP */
399 spi_send_byte(ice, data); /* DATA */
400 /* trigger */
401 set_gpio_bit(ice, PONTIS_CS_CS, 1);
402 udelay(1);
403 /* restore */
404 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
405 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
406}
407
ab0c7d72 408static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
1da177e4
LT		 409{
410 unsigned int val;
411 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
412 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
413 set_gpio_bit(ice, PONTIS_CS_CS, 0);
414 spi_send_byte(ice, dev & ~1); /* WRITE */
415 spi_send_byte(ice, reg); /* MAP */
416 /* trigger */
417 set_gpio_bit(ice, PONTIS_CS_CS, 1);
418 udelay(1);
419 set_gpio_bit(ice, PONTIS_CS_CS, 0);
420 spi_send_byte(ice, dev | 1); /* READ */
421 val = spi_read_byte(ice);
422 /* trigger */
423 set_gpio_bit(ice, PONTIS_CS_CS, 1);
424 udelay(1);
425 /* restore */
426 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
427 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
428 return val;
429}
430
431
432/*
433 * SPDIF input source
434 */
ab0c7d72 435static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 436{
437 static char *texts[] = {
438 "Coax", /* RXP0 */
439 "Optical", /* RXP1 */
440 "CD", /* RXP2 */
441 };
442 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
443 uinfo->count = 1;
444 uinfo->value.enumerated.items = 3;
445 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
446 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
447 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
448 return 0;
449}
450
ab0c7d72 451static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 452{
ab0c7d72 453 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 454
62932df8 455 mutex_lock(&ice->gpio_mutex);
1da177e4 456 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
62932df8 457 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 458 return 0;
459}
460
ab0c7d72 461static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 462{
ab0c7d72 463 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 464 unsigned char val;
465 int change = 0;
466
62932df8 467 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 468 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
469 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
470 val = 0x80 | (ice->gpio.saved[0] << 3);
471 spi_write(ice, CS_DEV, 0x04, val);
472 change = 1;
473 }
62932df8 474 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 475 return 0;
476}
477
478
479/*
480 * GPIO controls
481 */
ab0c7d72 482static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 483{
484 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
485 uinfo->count = 1;
486 uinfo->value.integer.min = 0;
487 uinfo->value.integer.max = 0xffff; /* 16bit */
488 return 0;
489}
490
ab0c7d72 491static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 492{
ab0c7d72 493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
62932df8 494 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 495 /* 4-7 reserved */
496 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
62932df8 497 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 498 return 0;
499}
500
ab0c7d72 501static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 502{
ab0c7d72 503 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 504 unsigned int val;
505 int changed;
62932df8 506 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 507 /* 4-7 reserved */
508 val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
509 changed = val != ice->gpio.write_mask;
510 ice->gpio.write_mask = val;
62932df8 511 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 512 return changed;
513}
514
ab0c7d72 515static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 516{
ab0c7d72 517 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
62932df8 518 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 519 /* 4-7 reserved */
520 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
62932df8 521 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 522 return 0;
523}
524
ab0c7d72 525static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 526{
ab0c7d72 527 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 528 unsigned int val;
529 int changed;
62932df8 530 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 531 /* 4-7 reserved */
532 val = ucontrol->value.integer.value[0] & 0xff0f;
533 changed = (val != ice->gpio.direction);
534 ice->gpio.direction = val;
62932df8 535 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 536 return changed;
537}
538
ab0c7d72 539static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 540{
ab0c7d72 541 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
62932df8 542 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 543 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
544 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
545 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
62932df8 546 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 547 return 0;
548}
549
ab0c7d72 550static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 551{
ab0c7d72 552 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 553 unsigned int val, nval;
554 int changed = 0;
62932df8 555 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 556 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
557 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
558 val = snd_ice1712_gpio_read(ice) & 0xffff;
559 nval = ucontrol->value.integer.value[0] & 0xffff;
560 if (val != nval) {
561 snd_ice1712_gpio_write(ice, nval);
562 changed = 1;
563 }
62932df8 564 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 565 return changed;
566}
567
f640c320
TI		 568static DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
569
1da177e4
LT		 570/*
571 * mixers
572 */
573
ab0c7d72 574static struct snd_kcontrol_new pontis_controls[] __devinitdata = {
1da177e4
LT		 575 {
576 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
f640c320
TI		 577 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
578 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 579 .name = "PCM Playback Volume",
580 .info = wm_dac_vol_info,
581 .get = wm_dac_vol_get,
582 .put = wm_dac_vol_put,
f640c320 583 .tlv = { .p = db_scale_volume },
1da177e4
LT		 584 },
585 {
586 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
f640c320
TI		 587 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
588 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4
LT		 589 .name = "Capture Volume",
590 .info = wm_adc_vol_info,
591 .get = wm_adc_vol_get,
592 .put = wm_adc_vol_put,
f640c320 593 .tlv = { .p = db_scale_volume },
1da177e4
LT		 594 },
595 {
596 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
597 .name = "CD Capture Switch",
598 .info = wm_adc_mux_info,
599 .get = wm_adc_mux_get,
600 .put = wm_adc_mux_put,
601 .private_value = 0,
602 },
603 {
604 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
605 .name = "Line Capture Switch",
606 .info = wm_adc_mux_info,
607 .get = wm_adc_mux_get,
608 .put = wm_adc_mux_put,
609 .private_value = 1,
610 },
611 {
612 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
613 .name = "Analog Bypass Switch",
614 .info = wm_bypass_info,
615 .get = wm_bypass_get,
616 .put = wm_bypass_put,
617 },
618 {
619 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
620 .name = "Swap Output Channels",
621 .info = wm_chswap_info,
622 .get = wm_chswap_get,
623 .put = wm_chswap_put,
624 },
625 {
626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
627 .name = "IEC958 Input Source",
628 .info = cs_source_info,
629 .get = cs_source_get,
630 .put = cs_source_put,
631 },
632 /* FIXME: which interface? */
633 {
634 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
635 .name = "GPIO Mask",
636 .info = pontis_gpio_mask_info,
637 .get = pontis_gpio_mask_get,
638 .put = pontis_gpio_mask_put,
639 },
640 {
641 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
642 .name = "GPIO Direction",
643 .info = pontis_gpio_mask_info,
644 .get = pontis_gpio_dir_get,
645 .put = pontis_gpio_dir_put,
646 },
647 {
648 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
649 .name = "GPIO Data",
650 .info = pontis_gpio_mask_info,
651 .get = pontis_gpio_data_get,
652 .put = pontis_gpio_data_put,
653 },
654};
655
656
657/*
658 * WM codec registers
659 */
ab0c7d72 660static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1da177e4 661{
ab0c7d72 662 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
1da177e4
LT		 663 char line[64];
664 unsigned int reg, val;
62932df8 665 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 666 while (!snd_info_get_line(buffer, line, sizeof(line))) {
667 if (sscanf(line, "%x %x", &reg, &val) != 2)
668 continue;
669 if (reg <= 0x17 && val <= 0xffff)
670 wm_put(ice, reg, val);
671 }
62932df8 672 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 673}
674
ab0c7d72 675static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1da177e4 676{
ab0c7d72 677 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
1da177e4
LT		 678 int reg, val;
679
62932df8 680 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 681 for (reg = 0; reg <= 0x17; reg++) {
682 val = wm_get(ice, reg);
683 snd_iprintf(buffer, "%02x = %04x\n", reg, val);
684 }
62932df8 685 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 686}
687
ab0c7d72 688static void wm_proc_init(struct snd_ice1712 *ice)
1da177e4 689{
ab0c7d72 690 struct snd_info_entry *entry;
1da177e4 691 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
bf850204 692 snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
1da177e4 693 entry->mode |= S_IWUSR;
1da177e4
LT		 694 entry->c.text.write = wm_proc_regs_write;
695 }
696}
697
ab0c7d72 698static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1da177e4 699{
ab0c7d72 700 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
1da177e4
LT		 701 int reg, val;
702
62932df8 703 mutex_lock(&ice->gpio_mutex);
1da177e4
LT		 704 for (reg = 0; reg <= 0x26; reg++) {
705 val = spi_read(ice, CS_DEV, reg);
706 snd_iprintf(buffer, "%02x = %02x\n", reg, val);
707 }
708 val = spi_read(ice, CS_DEV, 0x7f);
709 snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
62932df8 710 mutex_unlock(&ice->gpio_mutex);
1da177e4
LT		 711}
712
ab0c7d72 713static void cs_proc_init(struct snd_ice1712 *ice)
1da177e4 714{
ab0c7d72 715 struct snd_info_entry *entry;
bf850204
TI		 716 if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
717 snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
1da177e4
LT		 718}
719
720
ab0c7d72 721static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
1da177e4
LT		 722{
723 unsigned int i;
724 int err;
725
726 for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
727 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
728 if (err < 0)
729 return err;
730 }
731
732 wm_proc_init(ice);
733 cs_proc_init(ice);
734
735 return 0;
736}
737
738
739/*
740 * initialize the chip
741 */
ab0c7d72 742static int __devinit pontis_init(struct snd_ice1712 *ice)
1da177e4
LT		 743{
744 static unsigned short wm_inits[] = {
745 /* These come first to reduce init pop noise */
746 WM_ADC_MUX, 0x00c0, /* ADC mute */
747 WM_DAC_MUTE, 0x0001, /* DAC softmute */
748 WM_DAC_CTRL1, 0x0000, /* DAC mute */
749
750 WM_POWERDOWN, 0x0008, /* All power-up except HP */
751 WM_RESET, 0x0000, /* reset */
752 };
753 static unsigned short wm_inits2[] = {
754 WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
755 WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
756 WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
757 WM_DAC_CTRL1, 0x0090, /* DAC L/R */
758 WM_OUT_MUX, 0x0001, /* OUT DAC */
759 WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
760 WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
761 WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
762 WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
763 WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
764 WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
765 // WM_DAC_MASTER, 0x0100, /* DAC master muted */
766 WM_PHASE_SWAP, 0x0000, /* phase normal */
767 WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
768 WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
769 WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
770#if 0
771 WM_ALC_CTRL1, 0x007b, /* */
772 WM_ALC_CTRL2, 0x0000, /* */
773 WM_ALC_CTRL3, 0x0000, /* */
774 WM_NOISE_GATE, 0x0000, /* */
775#endif
776 WM_DAC_MUTE, 0x0000, /* DAC unmute */
777 WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
778 };
779 static unsigned char cs_inits[] = {
780 0x04, 0x80, /* RUN, RXP0 */
781 0x05, 0x05, /* slave, 24bit */
782 0x01, 0x00,
783 0x02, 0x00,
784 0x03, 0x00,
785 };
786 unsigned int i;
787
788 ice->vt1720 = 1;
789 ice->num_total_dacs = 2;
790 ice->num_total_adcs = 2;
791
792 /* to remeber the register values */
ab0c7d72 793 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
1da177e4
LT		 794 if (! ice->akm)
795 return -ENOMEM;
796 ice->akm_codecs = 1;
797
798 /* HACK - use this as the SPDIF source.
799 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
800 */
801 ice->gpio.saved[0] = 0;
802
803 /* initialize WM8776 codec */
804 for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
805 wm_put(ice, wm_inits[i], wm_inits[i+1]);
8433a509 806 schedule_timeout_uninterruptible(1);
1da177e4
LT		 807 for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
808 wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
809
810 /* initialize CS8416 codec */
811 /* assert PRST#; MT05 bit 7 */
812 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
813 mdelay(5);
814 /* deassert PRST# */
815 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
816
817 for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
818 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
819
820 return 0;
821}
822
823
824/*
825 * Pontis boards don't provide the EEPROM data at all.
826 * hence the driver needs to sets up it properly.
827 */
828
829static unsigned char pontis_eeprom[] __devinitdata = {
189bc171
TI		 830 [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */
831 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
832 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
833 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
834 [ICE_EEP2_GPIO_DIR] = 0x07,
835 [ICE_EEP2_GPIO_DIR1] = 0x00,
836 [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */
837 [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */
838 [ICE_EEP2_GPIO_MASK1] = 0xff,
839 [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */
840 [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */
841 [ICE_EEP2_GPIO_STATE1] = 0x00,
842 [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */
1da177e4
LT		 843};
844
845/* entry point */
846struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
847 {
848 .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
849 .name = "Pontis MS300",
850 .model = "ms300",
851 .chip_init = pontis_init,
852 .build_controls = pontis_add_controls,
853 .eeprom_size = sizeof(pontis_eeprom),
854 .eeprom_data = pontis_eeprom,
855 },
856 { } /* terminator */
857};
Linux kernel - Deliverables
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