Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for Digigram miXart soundcards | |
3 | * | |
4 | * main file with alsa callbacks | |
5 | * | |
6 | * Copyright (c) 2003 by Digigram <alsa@digigram.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | ||
1da177e4 LT |
24 | #include <linux/init.h> |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
9d2f928d | 27 | #include <linux/dma-mapping.h> |
65a77217 | 28 | #include <linux/module.h> |
62932df8 | 29 | #include <linux/mutex.h> |
5a0e3ad6 | 30 | #include <linux/slab.h> |
910638ae | 31 | |
1da177e4 LT |
32 | #include <sound/core.h> |
33 | #include <sound/initval.h> | |
34 | #include <sound/info.h> | |
35 | #include <sound/control.h> | |
36 | #include <sound/pcm.h> | |
37 | #include <sound/pcm_params.h> | |
38 | #include "mixart.h" | |
39 | #include "mixart_hwdep.h" | |
40 | #include "mixart_core.h" | |
41 | #include "mixart_mixer.h" | |
42 | ||
43 | #define CARD_NAME "miXart" | |
44 | ||
45 | MODULE_AUTHOR("Digigram <alsa@digigram.com>"); | |
46 | MODULE_DESCRIPTION("Digigram " CARD_NAME); | |
47 | MODULE_LICENSE("GPL"); | |
48 | MODULE_SUPPORTED_DEVICE("{{Digigram," CARD_NAME "}}"); | |
49 | ||
50 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
51 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
a67ff6a5 | 52 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
1da177e4 LT |
53 | |
54 | module_param_array(index, int, NULL, 0444); | |
55 | MODULE_PARM_DESC(index, "Index value for Digigram " CARD_NAME " soundcard."); | |
56 | module_param_array(id, charp, NULL, 0444); | |
57 | MODULE_PARM_DESC(id, "ID string for Digigram " CARD_NAME " soundcard."); | |
58 | module_param_array(enable, bool, NULL, 0444); | |
59 | MODULE_PARM_DESC(enable, "Enable Digigram " CARD_NAME " soundcard."); | |
60 | ||
61 | /* | |
62 | */ | |
63 | ||
9baa3c34 | 64 | static const struct pci_device_id snd_mixart_ids[] = { |
28d27aae | 65 | { PCI_VDEVICE(MOTOROLA, 0x0003), 0, }, /* MC8240 */ |
1da177e4 LT |
66 | { 0, } |
67 | }; | |
68 | ||
69 | MODULE_DEVICE_TABLE(pci, snd_mixart_ids); | |
70 | ||
71 | ||
67b48b88 TI |
72 | static int mixart_set_pipe_state(struct mixart_mgr *mgr, |
73 | struct mixart_pipe *pipe, int start) | |
1da177e4 | 74 | { |
67b48b88 TI |
75 | struct mixart_group_state_req group_state; |
76 | struct mixart_group_state_resp group_state_resp; | |
77 | struct mixart_msg request; | |
1da177e4 LT |
78 | int err; |
79 | u32 system_msg_uid; | |
80 | ||
81 | switch(pipe->status) { | |
82 | case PIPE_RUNNING: | |
83 | case PIPE_CLOCK_SET: | |
84 | if(start) return 0; /* already started */ | |
85 | break; | |
86 | case PIPE_STOPPED: | |
87 | if(!start) return 0; /* already stopped */ | |
88 | break; | |
89 | default: | |
6414e35d TI |
90 | dev_err(&mgr->pci->dev, |
91 | "error mixart_set_pipe_state called with wrong pipe->status!\n"); | |
1da177e4 LT |
92 | return -EINVAL; /* function called with wrong pipe status */ |
93 | } | |
94 | ||
95 | system_msg_uid = 0x12345678; /* the event ! (take care: the MSB and two LSB's have to be 0) */ | |
96 | ||
97 | /* wait on the last MSG_SYSTEM_SEND_SYNCHRO_CMD command to be really finished */ | |
98 | ||
99 | request.message_id = MSG_SYSTEM_WAIT_SYNCHRO_CMD; | |
67b48b88 | 100 | request.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
101 | request.data = &system_msg_uid; |
102 | request.size = sizeof(system_msg_uid); | |
103 | ||
104 | err = snd_mixart_send_msg_wait_notif(mgr, &request, system_msg_uid); | |
105 | if(err) { | |
6414e35d TI |
106 | dev_err(&mgr->pci->dev, |
107 | "error : MSG_SYSTEM_WAIT_SYNCHRO_CMD was not notified !\n"); | |
1da177e4 LT |
108 | return err; |
109 | } | |
110 | ||
111 | /* start or stop the pipe (1 pipe) */ | |
112 | ||
113 | memset(&group_state, 0, sizeof(group_state)); | |
114 | group_state.pipe_count = 1; | |
115 | group_state.pipe_uid[0] = pipe->group_uid; | |
116 | ||
117 | if(start) | |
118 | request.message_id = MSG_STREAM_START_STREAM_GRP_PACKET; | |
119 | else | |
120 | request.message_id = MSG_STREAM_STOP_STREAM_GRP_PACKET; | |
121 | ||
67b48b88 | 122 | request.uid = pipe->group_uid; /*(struct mixart_uid){0,0};*/ |
1da177e4 LT |
123 | request.data = &group_state; |
124 | request.size = sizeof(group_state); | |
125 | ||
126 | err = snd_mixart_send_msg(mgr, &request, sizeof(group_state_resp), &group_state_resp); | |
127 | if (err < 0 || group_state_resp.txx_status != 0) { | |
6414e35d TI |
128 | dev_err(&mgr->pci->dev, |
129 | "error MSG_STREAM_ST***_STREAM_GRP_PACKET err=%x stat=%x !\n", | |
130 | err, group_state_resp.txx_status); | |
1da177e4 LT |
131 | return -EINVAL; |
132 | } | |
133 | ||
134 | if(start) { | |
135 | u32 stat; | |
136 | ||
137 | group_state.pipe_count = 0; /* in case of start same command once again with pipe_count=0 */ | |
138 | ||
139 | err = snd_mixart_send_msg(mgr, &request, sizeof(group_state_resp), &group_state_resp); | |
140 | if (err < 0 || group_state_resp.txx_status != 0) { | |
6414e35d TI |
141 | dev_err(&mgr->pci->dev, |
142 | "error MSG_STREAM_START_STREAM_GRP_PACKET err=%x stat=%x !\n", | |
143 | err, group_state_resp.txx_status); | |
1da177e4 LT |
144 | return -EINVAL; |
145 | } | |
146 | ||
147 | /* in case of start send a synchro top */ | |
148 | ||
149 | request.message_id = MSG_SYSTEM_SEND_SYNCHRO_CMD; | |
67b48b88 | 150 | request.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
151 | request.data = NULL; |
152 | request.size = 0; | |
153 | ||
154 | err = snd_mixart_send_msg(mgr, &request, sizeof(stat), &stat); | |
155 | if (err < 0 || stat != 0) { | |
6414e35d TI |
156 | dev_err(&mgr->pci->dev, |
157 | "error MSG_SYSTEM_SEND_SYNCHRO_CMD err=%x stat=%x !\n", | |
158 | err, stat); | |
1da177e4 LT |
159 | return -EINVAL; |
160 | } | |
161 | ||
162 | pipe->status = PIPE_RUNNING; | |
163 | } | |
164 | else /* !start */ | |
165 | pipe->status = PIPE_STOPPED; | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
170 | ||
67b48b88 TI |
171 | static int mixart_set_clock(struct mixart_mgr *mgr, |
172 | struct mixart_pipe *pipe, unsigned int rate) | |
1da177e4 | 173 | { |
67b48b88 TI |
174 | struct mixart_msg request; |
175 | struct mixart_clock_properties clock_properties; | |
176 | struct mixart_clock_properties_resp clock_prop_resp; | |
1da177e4 LT |
177 | int err; |
178 | ||
179 | switch(pipe->status) { | |
180 | case PIPE_CLOCK_SET: | |
181 | break; | |
182 | case PIPE_RUNNING: | |
183 | if(rate != 0) | |
184 | break; | |
185 | default: | |
186 | if(rate == 0) | |
187 | return 0; /* nothing to do */ | |
188 | else { | |
6414e35d TI |
189 | dev_err(&mgr->pci->dev, |
190 | "error mixart_set_clock(%d) called with wrong pipe->status !\n", | |
191 | rate); | |
1da177e4 LT |
192 | return -EINVAL; |
193 | } | |
194 | } | |
195 | ||
196 | memset(&clock_properties, 0, sizeof(clock_properties)); | |
197 | clock_properties.clock_generic_type = (rate != 0) ? CGT_INTERNAL_CLOCK : CGT_NO_CLOCK; | |
198 | clock_properties.clock_mode = CM_STANDALONE; | |
199 | clock_properties.frequency = rate; | |
200 | clock_properties.nb_callers = 1; /* only one entry in uid_caller ! */ | |
201 | clock_properties.uid_caller[0] = pipe->group_uid; | |
202 | ||
6414e35d | 203 | dev_dbg(&mgr->pci->dev, "mixart_set_clock to %d kHz\n", rate); |
1da177e4 LT |
204 | |
205 | request.message_id = MSG_CLOCK_SET_PROPERTIES; | |
206 | request.uid = mgr->uid_console_manager; | |
207 | request.data = &clock_properties; | |
208 | request.size = sizeof(clock_properties); | |
209 | ||
210 | err = snd_mixart_send_msg(mgr, &request, sizeof(clock_prop_resp), &clock_prop_resp); | |
211 | if (err < 0 || clock_prop_resp.status != 0 || clock_prop_resp.clock_mode != CM_STANDALONE) { | |
6414e35d TI |
212 | dev_err(&mgr->pci->dev, |
213 | "error MSG_CLOCK_SET_PROPERTIES err=%x stat=%x mod=%x !\n", | |
214 | err, clock_prop_resp.status, clock_prop_resp.clock_mode); | |
1da177e4 LT |
215 | return -EINVAL; |
216 | } | |
217 | ||
218 | if(rate) pipe->status = PIPE_CLOCK_SET; | |
219 | else pipe->status = PIPE_RUNNING; | |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
224 | ||
225 | /* | |
226 | * Allocate or reference output pipe for analog IOs (pcmp0/1) | |
227 | */ | |
67b48b88 TI |
228 | struct mixart_pipe * |
229 | snd_mixart_add_ref_pipe(struct snd_mixart *chip, int pcm_number, int capture, | |
230 | int monitoring) | |
1da177e4 LT |
231 | { |
232 | int stream_count; | |
67b48b88 TI |
233 | struct mixart_pipe *pipe; |
234 | struct mixart_msg request; | |
1da177e4 LT |
235 | |
236 | if(capture) { | |
237 | if (pcm_number == MIXART_PCM_ANALOG) { | |
238 | pipe = &(chip->pipe_in_ana); /* analog inputs */ | |
239 | } else { | |
240 | pipe = &(chip->pipe_in_dig); /* digital inputs */ | |
241 | } | |
242 | request.message_id = MSG_STREAM_ADD_OUTPUT_GROUP; | |
243 | stream_count = MIXART_CAPTURE_STREAMS; | |
244 | } else { | |
245 | if (pcm_number == MIXART_PCM_ANALOG) { | |
246 | pipe = &(chip->pipe_out_ana); /* analog outputs */ | |
247 | } else { | |
248 | pipe = &(chip->pipe_out_dig); /* digital outputs */ | |
249 | } | |
250 | request.message_id = MSG_STREAM_ADD_INPUT_GROUP; | |
251 | stream_count = MIXART_PLAYBACK_STREAMS; | |
252 | } | |
253 | ||
254 | /* a new stream is opened and there are already all streams in use */ | |
255 | if( (monitoring == 0) && (pipe->references >= stream_count) ) { | |
256 | return NULL; | |
257 | } | |
258 | ||
259 | /* pipe is not yet defined */ | |
260 | if( pipe->status == PIPE_UNDEFINED ) { | |
261 | int err, i; | |
262 | struct { | |
67b48b88 TI |
263 | struct mixart_streaming_group_req sgroup_req; |
264 | struct mixart_streaming_group sgroup_resp; | |
1da177e4 LT |
265 | } *buf; |
266 | ||
6414e35d TI |
267 | dev_dbg(chip->card->dev, |
268 | "add_ref_pipe audio chip(%d) pcm(%d)\n", | |
269 | chip->chip_idx, pcm_number); | |
1da177e4 LT |
270 | |
271 | buf = kmalloc(sizeof(*buf), GFP_KERNEL); | |
272 | if (!buf) | |
273 | return NULL; | |
274 | ||
67b48b88 | 275 | request.uid = (struct mixart_uid){0,0}; /* should be StreamManagerUID, but zero is OK if there is only one ! */ |
1da177e4 LT |
276 | request.data = &buf->sgroup_req; |
277 | request.size = sizeof(buf->sgroup_req); | |
278 | ||
279 | memset(&buf->sgroup_req, 0, sizeof(buf->sgroup_req)); | |
280 | ||
281 | buf->sgroup_req.stream_count = stream_count; | |
282 | buf->sgroup_req.channel_count = 2; | |
283 | buf->sgroup_req.latency = 256; | |
284 | buf->sgroup_req.connector = pipe->uid_left_connector; /* the left connector */ | |
285 | ||
286 | for (i=0; i<stream_count; i++) { | |
287 | int j; | |
288 | struct mixart_flowinfo *flowinfo; | |
289 | struct mixart_bufferinfo *bufferinfo; | |
290 | ||
291 | /* we don't yet know the format, so config 16 bit pcm audio for instance */ | |
292 | buf->sgroup_req.stream_info[i].size_max_byte_frame = 1024; | |
293 | buf->sgroup_req.stream_info[i].size_max_sample_frame = 256; | |
294 | buf->sgroup_req.stream_info[i].nb_bytes_max_per_sample = MIXART_FLOAT_P__4_0_TO_HEX; /* is 4.0f */ | |
295 | ||
296 | /* find the right bufferinfo_array */ | |
297 | j = (chip->chip_idx * MIXART_MAX_STREAM_PER_CARD) + (pcm_number * (MIXART_PLAYBACK_STREAMS + MIXART_CAPTURE_STREAMS)) + i; | |
298 | if(capture) j += MIXART_PLAYBACK_STREAMS; /* in the array capture is behind playback */ | |
299 | ||
300 | buf->sgroup_req.flow_entry[i] = j; | |
301 | ||
302 | flowinfo = (struct mixart_flowinfo *)chip->mgr->flowinfo.area; | |
67b48b88 | 303 | flowinfo[j].bufferinfo_array_phy_address = (u32)chip->mgr->bufferinfo.addr + (j * sizeof(struct mixart_bufferinfo)); |
1da177e4 LT |
304 | flowinfo[j].bufferinfo_count = 1; /* 1 will set the miXart to ring-buffer mode ! */ |
305 | ||
306 | bufferinfo = (struct mixart_bufferinfo *)chip->mgr->bufferinfo.area; | |
307 | bufferinfo[j].buffer_address = 0; /* buffer is not yet allocated */ | |
308 | bufferinfo[j].available_length = 0; /* buffer is not yet allocated */ | |
309 | ||
310 | /* construct the identifier of the stream buffer received in the interrupts ! */ | |
311 | bufferinfo[j].buffer_id = (chip->chip_idx << MIXART_NOTIFY_CARD_OFFSET) + (pcm_number << MIXART_NOTIFY_PCM_OFFSET ) + i; | |
312 | if(capture) { | |
313 | bufferinfo[j].buffer_id |= MIXART_NOTIFY_CAPT_MASK; | |
314 | } | |
315 | } | |
316 | ||
317 | err = snd_mixart_send_msg(chip->mgr, &request, sizeof(buf->sgroup_resp), &buf->sgroup_resp); | |
318 | if((err < 0) || (buf->sgroup_resp.status != 0)) { | |
6414e35d TI |
319 | dev_err(chip->card->dev, |
320 | "error MSG_STREAM_ADD_**PUT_GROUP err=%x stat=%x !\n", | |
321 | err, buf->sgroup_resp.status); | |
1da177e4 LT |
322 | kfree(buf); |
323 | return NULL; | |
324 | } | |
325 | ||
326 | pipe->group_uid = buf->sgroup_resp.group; /* id of the pipe, as returned by embedded */ | |
327 | pipe->stream_count = buf->sgroup_resp.stream_count; | |
328 | /* pipe->stream_uid[i] = buf->sgroup_resp.stream[i].stream_uid; */ | |
329 | ||
330 | pipe->status = PIPE_STOPPED; | |
331 | kfree(buf); | |
332 | } | |
333 | ||
334 | if(monitoring) pipe->monitoring = 1; | |
335 | else pipe->references++; | |
336 | ||
337 | return pipe; | |
338 | } | |
339 | ||
340 | ||
67b48b88 TI |
341 | int snd_mixart_kill_ref_pipe(struct mixart_mgr *mgr, |
342 | struct mixart_pipe *pipe, int monitoring) | |
1da177e4 LT |
343 | { |
344 | int err = 0; | |
345 | ||
346 | if(pipe->status == PIPE_UNDEFINED) | |
347 | return 0; | |
348 | ||
349 | if(monitoring) | |
350 | pipe->monitoring = 0; | |
351 | else | |
352 | pipe->references--; | |
353 | ||
354 | if((pipe->references <= 0) && (pipe->monitoring == 0)) { | |
355 | ||
67b48b88 TI |
356 | struct mixart_msg request; |
357 | struct mixart_delete_group_resp delete_resp; | |
1da177e4 LT |
358 | |
359 | /* release the clock */ | |
360 | err = mixart_set_clock( mgr, pipe, 0); | |
361 | if( err < 0 ) { | |
6414e35d TI |
362 | dev_err(&mgr->pci->dev, |
363 | "mixart_set_clock(0) return error!\n"); | |
1da177e4 LT |
364 | } |
365 | ||
366 | /* stop the pipe */ | |
367 | err = mixart_set_pipe_state(mgr, pipe, 0); | |
368 | if( err < 0 ) { | |
6414e35d | 369 | dev_err(&mgr->pci->dev, "error stopping pipe!\n"); |
1da177e4 LT |
370 | } |
371 | ||
372 | request.message_id = MSG_STREAM_DELETE_GROUP; | |
67b48b88 | 373 | request.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
374 | request.data = &pipe->group_uid; /* the streaming group ! */ |
375 | request.size = sizeof(pipe->group_uid); | |
376 | ||
377 | /* delete the pipe */ | |
378 | err = snd_mixart_send_msg(mgr, &request, sizeof(delete_resp), &delete_resp); | |
379 | if ((err < 0) || (delete_resp.status != 0)) { | |
6414e35d TI |
380 | dev_err(&mgr->pci->dev, |
381 | "error MSG_STREAM_DELETE_GROUP err(%x), status(%x)\n", | |
382 | err, delete_resp.status); | |
1da177e4 LT |
383 | } |
384 | ||
67b48b88 | 385 | pipe->group_uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
386 | pipe->stream_count = 0; |
387 | pipe->status = PIPE_UNDEFINED; | |
388 | } | |
389 | ||
390 | return err; | |
391 | } | |
392 | ||
67b48b88 | 393 | static int mixart_set_stream_state(struct mixart_stream *stream, int start) |
1da177e4 | 394 | { |
67b48b88 TI |
395 | struct snd_mixart *chip; |
396 | struct mixart_stream_state_req stream_state_req; | |
397 | struct mixart_msg request; | |
1da177e4 LT |
398 | |
399 | if(!stream->substream) | |
400 | return -EINVAL; | |
401 | ||
402 | memset(&stream_state_req, 0, sizeof(stream_state_req)); | |
403 | stream_state_req.stream_count = 1; | |
404 | stream_state_req.stream_info.stream_desc.uid_pipe = stream->pipe->group_uid; | |
405 | stream_state_req.stream_info.stream_desc.stream_idx = stream->substream->number; | |
406 | ||
407 | if (stream->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
408 | request.message_id = start ? MSG_STREAM_START_INPUT_STAGE_PACKET : MSG_STREAM_STOP_INPUT_STAGE_PACKET; | |
409 | else | |
410 | request.message_id = start ? MSG_STREAM_START_OUTPUT_STAGE_PACKET : MSG_STREAM_STOP_OUTPUT_STAGE_PACKET; | |
411 | ||
67b48b88 | 412 | request.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
413 | request.data = &stream_state_req; |
414 | request.size = sizeof(stream_state_req); | |
415 | ||
416 | stream->abs_period_elapsed = 0; /* reset stream pos */ | |
417 | stream->buf_periods = 0; | |
418 | stream->buf_period_frag = 0; | |
419 | ||
420 | chip = snd_pcm_substream_chip(stream->substream); | |
421 | ||
422 | return snd_mixart_send_msg_nonblock(chip->mgr, &request); | |
423 | } | |
424 | ||
425 | /* | |
426 | * Trigger callback | |
427 | */ | |
428 | ||
67b48b88 | 429 | static int snd_mixart_trigger(struct snd_pcm_substream *subs, int cmd) |
1da177e4 | 430 | { |
67b48b88 | 431 | struct mixart_stream *stream = subs->runtime->private_data; |
1da177e4 LT |
432 | |
433 | switch (cmd) { | |
434 | case SNDRV_PCM_TRIGGER_START: | |
435 | ||
6414e35d | 436 | dev_dbg(subs->pcm->card->dev, "SNDRV_PCM_TRIGGER_START\n"); |
1da177e4 LT |
437 | |
438 | /* START_STREAM */ | |
439 | if( mixart_set_stream_state(stream, 1) ) | |
440 | return -EINVAL; | |
441 | ||
442 | stream->status = MIXART_STREAM_STATUS_RUNNING; | |
443 | ||
444 | break; | |
445 | case SNDRV_PCM_TRIGGER_STOP: | |
446 | ||
447 | /* STOP_STREAM */ | |
448 | if( mixart_set_stream_state(stream, 0) ) | |
449 | return -EINVAL; | |
450 | ||
451 | stream->status = MIXART_STREAM_STATUS_OPEN; | |
452 | ||
6414e35d | 453 | dev_dbg(subs->pcm->card->dev, "SNDRV_PCM_TRIGGER_STOP\n"); |
1da177e4 LT |
454 | |
455 | break; | |
456 | ||
457 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
458 | /* TODO */ | |
459 | stream->status = MIXART_STREAM_STATUS_PAUSE; | |
6414e35d | 460 | dev_dbg(subs->pcm->card->dev, "SNDRV_PCM_PAUSE_PUSH\n"); |
1da177e4 LT |
461 | break; |
462 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
463 | /* TODO */ | |
464 | stream->status = MIXART_STREAM_STATUS_RUNNING; | |
6414e35d | 465 | dev_dbg(subs->pcm->card->dev, "SNDRV_PCM_PAUSE_RELEASE\n"); |
1da177e4 LT |
466 | break; |
467 | default: | |
468 | return -EINVAL; | |
469 | } | |
470 | return 0; | |
471 | } | |
472 | ||
67b48b88 | 473 | static int mixart_sync_nonblock_events(struct mixart_mgr *mgr) |
1da177e4 | 474 | { |
ef21ca24 | 475 | unsigned long timeout = jiffies + HZ; |
1da177e4 | 476 | while (atomic_read(&mgr->msg_processed) > 0) { |
ef21ca24 | 477 | if (time_after(jiffies, timeout)) { |
6414e35d TI |
478 | dev_err(&mgr->pci->dev, |
479 | "mixart: cannot process nonblock events!\n"); | |
1da177e4 LT |
480 | return -EBUSY; |
481 | } | |
8433a509 | 482 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
483 | } |
484 | return 0; | |
485 | } | |
486 | ||
487 | /* | |
488 | * prepare callback for all pcms | |
489 | */ | |
67b48b88 | 490 | static int snd_mixart_prepare(struct snd_pcm_substream *subs) |
1da177e4 | 491 | { |
67b48b88 TI |
492 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
493 | struct mixart_stream *stream = subs->runtime->private_data; | |
1da177e4 | 494 | |
7bb2acb7 | 495 | /* TODO de façon non bloquante, réappliquer les hw_params (rate, bits, codec) */ |
1da177e4 | 496 | |
6414e35d | 497 | dev_dbg(chip->card->dev, "snd_mixart_prepare\n"); |
1da177e4 LT |
498 | |
499 | mixart_sync_nonblock_events(chip->mgr); | |
500 | ||
501 | /* only the first stream can choose the sample rate */ | |
502 | /* the further opened streams will be limited to its frequency (see open) */ | |
503 | if(chip->mgr->ref_count_rate == 1) | |
504 | chip->mgr->sample_rate = subs->runtime->rate; | |
505 | ||
506 | /* set the clock only once (first stream) on the same pipe */ | |
507 | if(stream->pipe->references == 1) { | |
508 | if( mixart_set_clock(chip->mgr, stream->pipe, subs->runtime->rate) ) | |
509 | return -EINVAL; | |
510 | } | |
511 | ||
512 | return 0; | |
513 | } | |
514 | ||
515 | ||
67b48b88 | 516 | static int mixart_set_format(struct mixart_stream *stream, snd_pcm_format_t format) |
1da177e4 LT |
517 | { |
518 | int err; | |
67b48b88 TI |
519 | struct snd_mixart *chip; |
520 | struct mixart_msg request; | |
521 | struct mixart_stream_param_desc stream_param; | |
522 | struct mixart_return_uid resp; | |
1da177e4 LT |
523 | |
524 | chip = snd_pcm_substream_chip(stream->substream); | |
525 | ||
526 | memset(&stream_param, 0, sizeof(stream_param)); | |
527 | ||
528 | stream_param.coding_type = CT_LINEAR; | |
529 | stream_param.number_of_channel = stream->channels; | |
530 | ||
531 | stream_param.sampling_freq = chip->mgr->sample_rate; | |
532 | if(stream_param.sampling_freq == 0) | |
533 | stream_param.sampling_freq = 44100; /* if frequency not yet defined, use some default */ | |
534 | ||
535 | switch(format){ | |
536 | case SNDRV_PCM_FORMAT_U8: | |
537 | stream_param.sample_type = ST_INTEGER_8; | |
538 | stream_param.sample_size = 8; | |
539 | break; | |
540 | case SNDRV_PCM_FORMAT_S16_LE: | |
541 | stream_param.sample_type = ST_INTEGER_16LE; | |
542 | stream_param.sample_size = 16; | |
543 | break; | |
544 | case SNDRV_PCM_FORMAT_S16_BE: | |
545 | stream_param.sample_type = ST_INTEGER_16BE; | |
546 | stream_param.sample_size = 16; | |
547 | break; | |
548 | case SNDRV_PCM_FORMAT_S24_3LE: | |
549 | stream_param.sample_type = ST_INTEGER_24LE; | |
550 | stream_param.sample_size = 24; | |
551 | break; | |
552 | case SNDRV_PCM_FORMAT_S24_3BE: | |
553 | stream_param.sample_type = ST_INTEGER_24BE; | |
554 | stream_param.sample_size = 24; | |
555 | break; | |
556 | case SNDRV_PCM_FORMAT_FLOAT_LE: | |
557 | stream_param.sample_type = ST_FLOATING_POINT_32LE; | |
558 | stream_param.sample_size = 32; | |
559 | break; | |
560 | case SNDRV_PCM_FORMAT_FLOAT_BE: | |
561 | stream_param.sample_type = ST_FLOATING_POINT_32BE; | |
562 | stream_param.sample_size = 32; | |
563 | break; | |
564 | default: | |
6414e35d TI |
565 | dev_err(chip->card->dev, |
566 | "error mixart_set_format() : unknown format\n"); | |
1da177e4 LT |
567 | return -EINVAL; |
568 | } | |
569 | ||
6414e35d TI |
570 | dev_dbg(chip->card->dev, |
571 | "set SNDRV_PCM_FORMAT sample_type(%d) sample_size(%d) freq(%d) channels(%d)\n", | |
1da177e4 LT |
572 | stream_param.sample_type, stream_param.sample_size, stream_param.sampling_freq, stream->channels); |
573 | ||
574 | /* TODO: what else to configure ? */ | |
575 | /* stream_param.samples_per_frame = 2; */ | |
576 | /* stream_param.bytes_per_frame = 4; */ | |
577 | /* stream_param.bytes_per_sample = 2; */ | |
578 | ||
579 | stream_param.pipe_count = 1; /* set to 1 */ | |
580 | stream_param.stream_count = 1; /* set to 1 */ | |
581 | stream_param.stream_desc[0].uid_pipe = stream->pipe->group_uid; | |
582 | stream_param.stream_desc[0].stream_idx = stream->substream->number; | |
583 | ||
584 | request.message_id = MSG_STREAM_SET_INPUT_STAGE_PARAM; | |
67b48b88 | 585 | request.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
586 | request.data = &stream_param; |
587 | request.size = sizeof(stream_param); | |
588 | ||
589 | err = snd_mixart_send_msg(chip->mgr, &request, sizeof(resp), &resp); | |
590 | if((err < 0) || resp.error_code) { | |
6414e35d TI |
591 | dev_err(chip->card->dev, |
592 | "MSG_STREAM_SET_INPUT_STAGE_PARAM err=%x; resp=%x\n", | |
593 | err, resp.error_code); | |
1da177e4 LT |
594 | return -EINVAL; |
595 | } | |
596 | return 0; | |
597 | } | |
598 | ||
599 | ||
600 | /* | |
601 | * HW_PARAMS callback for all pcms | |
602 | */ | |
67b48b88 TI |
603 | static int snd_mixart_hw_params(struct snd_pcm_substream *subs, |
604 | struct snd_pcm_hw_params *hw) | |
1da177e4 | 605 | { |
67b48b88 TI |
606 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
607 | struct mixart_mgr *mgr = chip->mgr; | |
608 | struct mixart_stream *stream = subs->runtime->private_data; | |
1da177e4 LT |
609 | snd_pcm_format_t format; |
610 | int err; | |
611 | int channels; | |
612 | ||
613 | /* set up channels */ | |
614 | channels = params_channels(hw); | |
615 | ||
616 | /* set up format for the stream */ | |
617 | format = params_format(hw); | |
618 | ||
62932df8 | 619 | mutex_lock(&mgr->setup_mutex); |
1da177e4 LT |
620 | |
621 | /* update the stream levels */ | |
622 | if( stream->pcm_number <= MIXART_PCM_DIGITAL ) { | |
623 | int is_aes = stream->pcm_number > MIXART_PCM_ANALOG; | |
624 | if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) | |
625 | mixart_update_playback_stream_level(chip, is_aes, subs->number); | |
626 | else | |
627 | mixart_update_capture_stream_level( chip, is_aes); | |
628 | } | |
629 | ||
630 | stream->channels = channels; | |
631 | ||
632 | /* set the format to the board */ | |
633 | err = mixart_set_format(stream, format); | |
634 | if(err < 0) { | |
82f5d571 | 635 | mutex_unlock(&mgr->setup_mutex); |
1da177e4 LT |
636 | return err; |
637 | } | |
638 | ||
639 | /* allocate buffer */ | |
640 | err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw)); | |
641 | ||
642 | if (err > 0) { | |
643 | struct mixart_bufferinfo *bufferinfo; | |
644 | int i = (chip->chip_idx * MIXART_MAX_STREAM_PER_CARD) + (stream->pcm_number * (MIXART_PLAYBACK_STREAMS+MIXART_CAPTURE_STREAMS)) + subs->number; | |
645 | if( subs->stream == SNDRV_PCM_STREAM_CAPTURE ) { | |
646 | i += MIXART_PLAYBACK_STREAMS; /* in array capture is behind playback */ | |
647 | } | |
648 | ||
649 | bufferinfo = (struct mixart_bufferinfo *)chip->mgr->bufferinfo.area; | |
650 | bufferinfo[i].buffer_address = subs->runtime->dma_addr; | |
651 | bufferinfo[i].available_length = subs->runtime->dma_bytes; | |
652 | /* bufferinfo[i].buffer_id is already defined */ | |
653 | ||
6414e35d TI |
654 | dev_dbg(chip->card->dev, |
655 | "snd_mixart_hw_params(pcm %d) : dma_addr(%x) dma_bytes(%x) subs-number(%d)\n", | |
656 | i, bufferinfo[i].buffer_address, | |
1da177e4 LT |
657 | bufferinfo[i].available_length, |
658 | subs->number); | |
659 | } | |
62932df8 | 660 | mutex_unlock(&mgr->setup_mutex); |
1da177e4 LT |
661 | |
662 | return err; | |
663 | } | |
664 | ||
67b48b88 | 665 | static int snd_mixart_hw_free(struct snd_pcm_substream *subs) |
1da177e4 | 666 | { |
67b48b88 | 667 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
1da177e4 LT |
668 | snd_pcm_lib_free_pages(subs); |
669 | mixart_sync_nonblock_events(chip->mgr); | |
670 | return 0; | |
671 | } | |
672 | ||
673 | ||
674 | ||
675 | /* | |
676 | * TODO CONFIGURATION SPACE for all pcms, mono pcm must update channels_max | |
677 | */ | |
67b48b88 | 678 | static struct snd_pcm_hardware snd_mixart_analog_caps = |
1da177e4 LT |
679 | { |
680 | .info = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
b83f346b | 681 | SNDRV_PCM_INFO_MMAP_VALID | |
1da177e4 LT |
682 | SNDRV_PCM_INFO_PAUSE), |
683 | .formats = ( SNDRV_PCM_FMTBIT_U8 | | |
684 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | | |
685 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | | |
686 | SNDRV_PCM_FMTBIT_FLOAT_LE | SNDRV_PCM_FMTBIT_FLOAT_BE ), | |
687 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
688 | .rate_min = 8000, | |
689 | .rate_max = 48000, | |
690 | .channels_min = 1, | |
691 | .channels_max = 2, | |
692 | .buffer_bytes_max = (32*1024), | |
693 | .period_bytes_min = 256, /* 256 frames U8 mono*/ | |
694 | .period_bytes_max = (16*1024), | |
695 | .periods_min = 2, | |
696 | .periods_max = (32*1024/256), | |
697 | }; | |
698 | ||
67b48b88 | 699 | static struct snd_pcm_hardware snd_mixart_digital_caps = |
1da177e4 LT |
700 | { |
701 | .info = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
b83f346b | 702 | SNDRV_PCM_INFO_MMAP_VALID | |
1da177e4 LT |
703 | SNDRV_PCM_INFO_PAUSE), |
704 | .formats = ( SNDRV_PCM_FMTBIT_U8 | | |
705 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | | |
706 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | | |
707 | SNDRV_PCM_FMTBIT_FLOAT_LE | SNDRV_PCM_FMTBIT_FLOAT_BE ), | |
708 | .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, | |
709 | .rate_min = 32000, | |
710 | .rate_max = 48000, | |
711 | .channels_min = 1, | |
712 | .channels_max = 2, | |
713 | .buffer_bytes_max = (32*1024), | |
714 | .period_bytes_min = 256, /* 256 frames U8 mono*/ | |
715 | .period_bytes_max = (16*1024), | |
716 | .periods_min = 2, | |
717 | .periods_max = (32*1024/256), | |
718 | }; | |
719 | ||
720 | ||
67b48b88 | 721 | static int snd_mixart_playback_open(struct snd_pcm_substream *subs) |
1da177e4 | 722 | { |
67b48b88 TI |
723 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
724 | struct mixart_mgr *mgr = chip->mgr; | |
725 | struct snd_pcm_runtime *runtime = subs->runtime; | |
726 | struct snd_pcm *pcm = subs->pcm; | |
727 | struct mixart_stream *stream; | |
728 | struct mixart_pipe *pipe; | |
1da177e4 LT |
729 | int err = 0; |
730 | int pcm_number; | |
731 | ||
62932df8 | 732 | mutex_lock(&mgr->setup_mutex); |
1da177e4 LT |
733 | |
734 | if ( pcm == chip->pcm ) { | |
735 | pcm_number = MIXART_PCM_ANALOG; | |
736 | runtime->hw = snd_mixart_analog_caps; | |
737 | } else { | |
da3cec35 | 738 | snd_BUG_ON(pcm != chip->pcm_dig); |
1da177e4 LT |
739 | pcm_number = MIXART_PCM_DIGITAL; |
740 | runtime->hw = snd_mixart_digital_caps; | |
741 | } | |
6414e35d TI |
742 | dev_dbg(chip->card->dev, |
743 | "snd_mixart_playback_open C%d/P%d/Sub%d\n", | |
744 | chip->chip_idx, pcm_number, subs->number); | |
1da177e4 LT |
745 | |
746 | /* get stream info */ | |
747 | stream = &(chip->playback_stream[pcm_number][subs->number]); | |
748 | ||
749 | if (stream->status != MIXART_STREAM_STATUS_FREE){ | |
750 | /* streams in use */ | |
6414e35d TI |
751 | dev_err(chip->card->dev, |
752 | "snd_mixart_playback_open C%d/P%d/Sub%d in use\n", | |
753 | chip->chip_idx, pcm_number, subs->number); | |
1da177e4 LT |
754 | err = -EBUSY; |
755 | goto _exit_open; | |
756 | } | |
757 | ||
758 | /* get pipe pointer (out pipe) */ | |
759 | pipe = snd_mixart_add_ref_pipe(chip, pcm_number, 0, 0); | |
760 | ||
761 | if (pipe == NULL) { | |
762 | err = -EINVAL; | |
763 | goto _exit_open; | |
764 | } | |
765 | ||
766 | /* start the pipe if necessary */ | |
767 | err = mixart_set_pipe_state(chip->mgr, pipe, 1); | |
768 | if( err < 0 ) { | |
6414e35d | 769 | dev_err(chip->card->dev, "error starting pipe!\n"); |
1da177e4 LT |
770 | snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0); |
771 | err = -EINVAL; | |
772 | goto _exit_open; | |
773 | } | |
774 | ||
775 | stream->pipe = pipe; | |
776 | stream->pcm_number = pcm_number; | |
777 | stream->status = MIXART_STREAM_STATUS_OPEN; | |
778 | stream->substream = subs; | |
779 | stream->channels = 0; /* not configured yet */ | |
780 | ||
781 | runtime->private_data = stream; | |
782 | ||
783 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32); | |
784 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 64); | |
785 | ||
786 | /* if a sample rate is already used, another stream cannot change */ | |
787 | if(mgr->ref_count_rate++) { | |
788 | if(mgr->sample_rate) { | |
789 | runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; | |
790 | } | |
791 | } | |
792 | ||
793 | _exit_open: | |
62932df8 | 794 | mutex_unlock(&mgr->setup_mutex); |
1da177e4 LT |
795 | |
796 | return err; | |
797 | } | |
798 | ||
799 | ||
67b48b88 | 800 | static int snd_mixart_capture_open(struct snd_pcm_substream *subs) |
1da177e4 | 801 | { |
67b48b88 TI |
802 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
803 | struct mixart_mgr *mgr = chip->mgr; | |
804 | struct snd_pcm_runtime *runtime = subs->runtime; | |
805 | struct snd_pcm *pcm = subs->pcm; | |
806 | struct mixart_stream *stream; | |
807 | struct mixart_pipe *pipe; | |
1da177e4 LT |
808 | int err = 0; |
809 | int pcm_number; | |
810 | ||
62932df8 | 811 | mutex_lock(&mgr->setup_mutex); |
1da177e4 LT |
812 | |
813 | if ( pcm == chip->pcm ) { | |
814 | pcm_number = MIXART_PCM_ANALOG; | |
815 | runtime->hw = snd_mixart_analog_caps; | |
816 | } else { | |
da3cec35 | 817 | snd_BUG_ON(pcm != chip->pcm_dig); |
1da177e4 LT |
818 | pcm_number = MIXART_PCM_DIGITAL; |
819 | runtime->hw = snd_mixart_digital_caps; | |
820 | } | |
821 | ||
822 | runtime->hw.channels_min = 2; /* for instance, no mono */ | |
823 | ||
6414e35d TI |
824 | dev_dbg(chip->card->dev, "snd_mixart_capture_open C%d/P%d/Sub%d\n", |
825 | chip->chip_idx, pcm_number, subs->number); | |
1da177e4 LT |
826 | |
827 | /* get stream info */ | |
828 | stream = &(chip->capture_stream[pcm_number]); | |
829 | ||
830 | if (stream->status != MIXART_STREAM_STATUS_FREE){ | |
831 | /* streams in use */ | |
6414e35d TI |
832 | dev_err(chip->card->dev, |
833 | "snd_mixart_capture_open C%d/P%d/Sub%d in use\n", | |
834 | chip->chip_idx, pcm_number, subs->number); | |
1da177e4 LT |
835 | err = -EBUSY; |
836 | goto _exit_open; | |
837 | } | |
838 | ||
839 | /* get pipe pointer (in pipe) */ | |
840 | pipe = snd_mixart_add_ref_pipe(chip, pcm_number, 1, 0); | |
841 | ||
842 | if (pipe == NULL) { | |
843 | err = -EINVAL; | |
844 | goto _exit_open; | |
845 | } | |
846 | ||
847 | /* start the pipe if necessary */ | |
848 | err = mixart_set_pipe_state(chip->mgr, pipe, 1); | |
849 | if( err < 0 ) { | |
6414e35d | 850 | dev_err(chip->card->dev, "error starting pipe!\n"); |
1da177e4 LT |
851 | snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0); |
852 | err = -EINVAL; | |
853 | goto _exit_open; | |
854 | } | |
855 | ||
856 | stream->pipe = pipe; | |
857 | stream->pcm_number = pcm_number; | |
858 | stream->status = MIXART_STREAM_STATUS_OPEN; | |
859 | stream->substream = subs; | |
860 | stream->channels = 0; /* not configured yet */ | |
861 | ||
862 | runtime->private_data = stream; | |
863 | ||
864 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32); | |
865 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 64); | |
866 | ||
867 | /* if a sample rate is already used, another stream cannot change */ | |
868 | if(mgr->ref_count_rate++) { | |
869 | if(mgr->sample_rate) { | |
870 | runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; | |
871 | } | |
872 | } | |
873 | ||
874 | _exit_open: | |
62932df8 | 875 | mutex_unlock(&mgr->setup_mutex); |
1da177e4 LT |
876 | |
877 | return err; | |
878 | } | |
879 | ||
880 | ||
881 | ||
67b48b88 | 882 | static int snd_mixart_close(struct snd_pcm_substream *subs) |
1da177e4 | 883 | { |
67b48b88 TI |
884 | struct snd_mixart *chip = snd_pcm_substream_chip(subs); |
885 | struct mixart_mgr *mgr = chip->mgr; | |
886 | struct mixart_stream *stream = subs->runtime->private_data; | |
1da177e4 | 887 | |
62932df8 | 888 | mutex_lock(&mgr->setup_mutex); |
1da177e4 | 889 | |
6414e35d TI |
890 | dev_dbg(chip->card->dev, "snd_mixart_close C%d/P%d/Sub%d\n", |
891 | chip->chip_idx, stream->pcm_number, subs->number); | |
1da177e4 LT |
892 | |
893 | /* sample rate released */ | |
894 | if(--mgr->ref_count_rate == 0) { | |
895 | mgr->sample_rate = 0; | |
896 | } | |
897 | ||
898 | /* delete pipe */ | |
899 | if (snd_mixart_kill_ref_pipe(mgr, stream->pipe, 0 ) < 0) { | |
900 | ||
6414e35d TI |
901 | dev_err(chip->card->dev, |
902 | "error snd_mixart_kill_ref_pipe C%dP%d\n", | |
903 | chip->chip_idx, stream->pcm_number); | |
1da177e4 LT |
904 | } |
905 | ||
906 | stream->pipe = NULL; | |
907 | stream->status = MIXART_STREAM_STATUS_FREE; | |
908 | stream->substream = NULL; | |
909 | ||
62932df8 | 910 | mutex_unlock(&mgr->setup_mutex); |
1da177e4 LT |
911 | return 0; |
912 | } | |
913 | ||
914 | ||
67b48b88 | 915 | static snd_pcm_uframes_t snd_mixart_stream_pointer(struct snd_pcm_substream *subs) |
1da177e4 | 916 | { |
67b48b88 TI |
917 | struct snd_pcm_runtime *runtime = subs->runtime; |
918 | struct mixart_stream *stream = runtime->private_data; | |
1da177e4 LT |
919 | |
920 | return (snd_pcm_uframes_t)((stream->buf_periods * runtime->period_size) + stream->buf_period_frag); | |
921 | } | |
922 | ||
923 | ||
924 | ||
67b48b88 | 925 | static struct snd_pcm_ops snd_mixart_playback_ops = { |
1da177e4 LT |
926 | .open = snd_mixart_playback_open, |
927 | .close = snd_mixart_close, | |
928 | .ioctl = snd_pcm_lib_ioctl, | |
929 | .prepare = snd_mixart_prepare, | |
930 | .hw_params = snd_mixart_hw_params, | |
931 | .hw_free = snd_mixart_hw_free, | |
932 | .trigger = snd_mixart_trigger, | |
933 | .pointer = snd_mixart_stream_pointer, | |
934 | }; | |
935 | ||
67b48b88 | 936 | static struct snd_pcm_ops snd_mixart_capture_ops = { |
1da177e4 LT |
937 | .open = snd_mixart_capture_open, |
938 | .close = snd_mixart_close, | |
939 | .ioctl = snd_pcm_lib_ioctl, | |
940 | .prepare = snd_mixart_prepare, | |
941 | .hw_params = snd_mixart_hw_params, | |
942 | .hw_free = snd_mixart_hw_free, | |
943 | .trigger = snd_mixart_trigger, | |
944 | .pointer = snd_mixart_stream_pointer, | |
945 | }; | |
946 | ||
67b48b88 | 947 | static void preallocate_buffers(struct snd_mixart *chip, struct snd_pcm *pcm) |
1da177e4 LT |
948 | { |
949 | #if 0 | |
67b48b88 | 950 | struct snd_pcm_substream *subs; |
1da177e4 LT |
951 | int stream; |
952 | ||
953 | for (stream = 0; stream < 2; stream++) { | |
954 | int idx = 0; | |
955 | for (subs = pcm->streams[stream].substream; subs; subs = subs->next, idx++) | |
956 | /* set up the unique device id with the chip index */ | |
957 | subs->dma_device.id = subs->pcm->device << 16 | | |
958 | subs->stream << 8 | (subs->number + 1) | | |
959 | (chip->chip_idx + 1) << 24; | |
960 | } | |
961 | #endif | |
962 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
963 | snd_dma_pci_data(chip->mgr->pci), 32*1024, 32*1024); | |
964 | } | |
965 | ||
966 | /* | |
967 | */ | |
67b48b88 | 968 | static int snd_mixart_pcm_analog(struct snd_mixart *chip) |
1da177e4 LT |
969 | { |
970 | int err; | |
67b48b88 | 971 | struct snd_pcm *pcm; |
1da177e4 LT |
972 | char name[32]; |
973 | ||
974 | sprintf(name, "miXart analog %d", chip->chip_idx); | |
975 | if ((err = snd_pcm_new(chip->card, name, MIXART_PCM_ANALOG, | |
976 | MIXART_PLAYBACK_STREAMS, | |
977 | MIXART_CAPTURE_STREAMS, &pcm)) < 0) { | |
6414e35d TI |
978 | dev_err(chip->card->dev, |
979 | "cannot create the analog pcm %d\n", chip->chip_idx); | |
1da177e4 LT |
980 | return err; |
981 | } | |
982 | ||
983 | pcm->private_data = chip; | |
984 | ||
985 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_mixart_playback_ops); | |
986 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_mixart_capture_ops); | |
987 | ||
988 | pcm->info_flags = 0; | |
8d3a8b5c | 989 | pcm->nonatomic = true; |
1da177e4 LT |
990 | strcpy(pcm->name, name); |
991 | ||
992 | preallocate_buffers(chip, pcm); | |
993 | ||
994 | chip->pcm = pcm; | |
995 | return 0; | |
996 | } | |
997 | ||
998 | ||
999 | /* | |
1000 | */ | |
67b48b88 | 1001 | static int snd_mixart_pcm_digital(struct snd_mixart *chip) |
1da177e4 LT |
1002 | { |
1003 | int err; | |
67b48b88 | 1004 | struct snd_pcm *pcm; |
1da177e4 LT |
1005 | char name[32]; |
1006 | ||
1007 | sprintf(name, "miXart AES/EBU %d", chip->chip_idx); | |
1008 | if ((err = snd_pcm_new(chip->card, name, MIXART_PCM_DIGITAL, | |
1009 | MIXART_PLAYBACK_STREAMS, | |
1010 | MIXART_CAPTURE_STREAMS, &pcm)) < 0) { | |
6414e35d TI |
1011 | dev_err(chip->card->dev, |
1012 | "cannot create the digital pcm %d\n", chip->chip_idx); | |
1da177e4 LT |
1013 | return err; |
1014 | } | |
1015 | ||
1016 | pcm->private_data = chip; | |
1017 | ||
1018 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_mixart_playback_ops); | |
1019 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_mixart_capture_ops); | |
1020 | ||
1021 | pcm->info_flags = 0; | |
8d3a8b5c | 1022 | pcm->nonatomic = true; |
1da177e4 LT |
1023 | strcpy(pcm->name, name); |
1024 | ||
1025 | preallocate_buffers(chip, pcm); | |
1026 | ||
1027 | chip->pcm_dig = pcm; | |
1028 | return 0; | |
1029 | } | |
1030 | ||
67b48b88 | 1031 | static int snd_mixart_chip_free(struct snd_mixart *chip) |
1da177e4 LT |
1032 | { |
1033 | kfree(chip); | |
1034 | return 0; | |
1035 | } | |
1036 | ||
67b48b88 | 1037 | static int snd_mixart_chip_dev_free(struct snd_device *device) |
1da177e4 | 1038 | { |
67b48b88 | 1039 | struct snd_mixart *chip = device->device_data; |
1da177e4 LT |
1040 | return snd_mixart_chip_free(chip); |
1041 | } | |
1042 | ||
1043 | ||
1044 | /* | |
1045 | */ | |
e23e7a14 | 1046 | static int snd_mixart_create(struct mixart_mgr *mgr, struct snd_card *card, int idx) |
1da177e4 LT |
1047 | { |
1048 | int err; | |
67b48b88 TI |
1049 | struct snd_mixart *chip; |
1050 | static struct snd_device_ops ops = { | |
1da177e4 LT |
1051 | .dev_free = snd_mixart_chip_dev_free, |
1052 | }; | |
1053 | ||
73f6a12e | 1054 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 | 1055 | if (! chip) { |
6414e35d | 1056 | dev_err(card->dev, "cannot allocate chip\n"); |
1da177e4 LT |
1057 | return -ENOMEM; |
1058 | } | |
1059 | ||
1060 | chip->card = card; | |
1061 | chip->chip_idx = idx; | |
1062 | chip->mgr = mgr; | |
1063 | ||
1064 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1065 | snd_mixart_chip_free(chip); | |
1066 | return err; | |
1067 | } | |
1068 | ||
73f6a12e | 1069 | mgr->chip[idx] = chip; |
1da177e4 LT |
1070 | return 0; |
1071 | } | |
1072 | ||
67b48b88 | 1073 | int snd_mixart_create_pcm(struct snd_mixart* chip) |
1da177e4 LT |
1074 | { |
1075 | int err; | |
1076 | ||
1077 | err = snd_mixart_pcm_analog(chip); | |
1078 | if (err < 0) | |
1079 | return err; | |
1080 | ||
1081 | if(chip->mgr->board_type == MIXART_DAUGHTER_TYPE_AES) { | |
1082 | ||
1083 | err = snd_mixart_pcm_digital(chip); | |
1084 | if (err < 0) | |
1085 | return err; | |
1086 | } | |
1087 | return err; | |
1088 | } | |
1089 | ||
1090 | ||
1091 | /* | |
1092 | * release all the cards assigned to a manager instance | |
1093 | */ | |
67b48b88 | 1094 | static int snd_mixart_free(struct mixart_mgr *mgr) |
1da177e4 LT |
1095 | { |
1096 | unsigned int i; | |
1097 | ||
1098 | for (i = 0; i < mgr->num_cards; i++) { | |
1099 | if (mgr->chip[i]) | |
1100 | snd_card_free(mgr->chip[i]->card); | |
1101 | } | |
1102 | ||
1103 | /* stop mailbox */ | |
1104 | snd_mixart_exit_mailbox(mgr); | |
1105 | ||
1106 | /* release irq */ | |
1107 | if (mgr->irq >= 0) | |
437a5a46 | 1108 | free_irq(mgr->irq, mgr); |
1da177e4 LT |
1109 | |
1110 | /* reset board if some firmware was loaded */ | |
1111 | if(mgr->dsp_loaded) { | |
1112 | snd_mixart_reset_board(mgr); | |
6414e35d | 1113 | dev_dbg(&mgr->pci->dev, "reset miXart !\n"); |
1da177e4 LT |
1114 | } |
1115 | ||
1116 | /* release the i/o ports */ | |
ff6defa6 ME |
1117 | for (i = 0; i < 2; ++i) |
1118 | iounmap(mgr->mem[i].virt); | |
1119 | ||
1da177e4 LT |
1120 | pci_release_regions(mgr->pci); |
1121 | ||
1122 | /* free flowarray */ | |
1123 | if(mgr->flowinfo.area) { | |
1124 | snd_dma_free_pages(&mgr->flowinfo); | |
1125 | mgr->flowinfo.area = NULL; | |
1126 | } | |
1127 | /* free bufferarray */ | |
1128 | if(mgr->bufferinfo.area) { | |
1129 | snd_dma_free_pages(&mgr->bufferinfo); | |
1130 | mgr->bufferinfo.area = NULL; | |
1131 | } | |
1132 | ||
1133 | pci_disable_device(mgr->pci); | |
1134 | kfree(mgr); | |
1135 | return 0; | |
1136 | } | |
1137 | ||
1138 | /* | |
1139 | * proc interface | |
1140 | */ | |
1da177e4 LT |
1141 | |
1142 | /* | |
1143 | mixart_BA0 proc interface for BAR 0 - read callback | |
1144 | */ | |
24e4a121 TI |
1145 | static ssize_t snd_mixart_BA0_read(struct snd_info_entry *entry, |
1146 | void *file_private_data, | |
1147 | struct file *file, char __user *buf, | |
1148 | size_t count, loff_t pos) | |
1da177e4 | 1149 | { |
67b48b88 | 1150 | struct mixart_mgr *mgr = entry->private_data; |
1da177e4 | 1151 | |
b0cc58a2 DC |
1152 | count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ |
1153 | if (copy_to_user_fromio(buf, MIXART_MEM(mgr, pos), count)) | |
1da177e4 LT |
1154 | return -EFAULT; |
1155 | return count; | |
1156 | } | |
1157 | ||
1158 | /* | |
1159 | mixart_BA1 proc interface for BAR 1 - read callback | |
1160 | */ | |
24e4a121 TI |
1161 | static ssize_t snd_mixart_BA1_read(struct snd_info_entry *entry, |
1162 | void *file_private_data, | |
1163 | struct file *file, char __user *buf, | |
1164 | size_t count, loff_t pos) | |
1da177e4 | 1165 | { |
67b48b88 | 1166 | struct mixart_mgr *mgr = entry->private_data; |
1da177e4 | 1167 | |
b0cc58a2 DC |
1168 | count = count & ~3; /* make sure the read size is a multiple of 4 bytes */ |
1169 | if (copy_to_user_fromio(buf, MIXART_REG(mgr, pos), count)) | |
1da177e4 LT |
1170 | return -EFAULT; |
1171 | return count; | |
1172 | } | |
1173 | ||
1174 | static struct snd_info_entry_ops snd_mixart_proc_ops_BA0 = { | |
1175 | .read = snd_mixart_BA0_read, | |
1da177e4 LT |
1176 | }; |
1177 | ||
1178 | static struct snd_info_entry_ops snd_mixart_proc_ops_BA1 = { | |
1179 | .read = snd_mixart_BA1_read, | |
1da177e4 LT |
1180 | }; |
1181 | ||
1182 | ||
67b48b88 TI |
1183 | static void snd_mixart_proc_read(struct snd_info_entry *entry, |
1184 | struct snd_info_buffer *buffer) | |
1da177e4 | 1185 | { |
67b48b88 | 1186 | struct snd_mixart *chip = entry->private_data; |
1da177e4 LT |
1187 | u32 ref; |
1188 | ||
1189 | snd_iprintf(buffer, "Digigram miXart (alsa card %d)\n\n", chip->chip_idx); | |
1190 | ||
1191 | /* stats available when embedded OS is running */ | |
1192 | if (chip->mgr->dsp_loaded & ( 1 << MIXART_MOTHERBOARD_ELF_INDEX)) { | |
1193 | snd_iprintf(buffer, "- hardware -\n"); | |
1194 | switch (chip->mgr->board_type ) { | |
1195 | case MIXART_DAUGHTER_TYPE_NONE : snd_iprintf(buffer, "\tmiXart8 (no daughter board)\n\n"); break; | |
1196 | case MIXART_DAUGHTER_TYPE_AES : snd_iprintf(buffer, "\tmiXart8 AES/EBU\n\n"); break; | |
1197 | case MIXART_DAUGHTER_TYPE_COBRANET : snd_iprintf(buffer, "\tmiXart8 Cobranet\n\n"); break; | |
1198 | default: snd_iprintf(buffer, "\tUNKNOWN!\n\n"); break; | |
1199 | } | |
1200 | ||
1201 | snd_iprintf(buffer, "- system load -\n"); | |
1202 | ||
1203 | /* get perf reference */ | |
1204 | ||
1205 | ref = readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET)); | |
1206 | ||
1207 | if (ref) { | |
1208 | u32 mailbox = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET)) / ref; | |
1209 | u32 streaming = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET)) / ref; | |
1210 | u32 interr = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET)) / ref; | |
1211 | ||
1212 | snd_iprintf(buffer, "\tstreaming : %d\n", streaming); | |
1213 | snd_iprintf(buffer, "\tmailbox : %d\n", mailbox); | |
cf2fbdd2 | 1214 | snd_iprintf(buffer, "\tinterrupts handling : %d\n\n", interr); |
1da177e4 LT |
1215 | } |
1216 | } /* endif elf loaded */ | |
1217 | } | |
1218 | ||
e23e7a14 | 1219 | static void snd_mixart_proc_init(struct snd_mixart *chip) |
1da177e4 | 1220 | { |
67b48b88 | 1221 | struct snd_info_entry *entry; |
1da177e4 LT |
1222 | |
1223 | /* text interface to read perf and temp meters */ | |
1224 | if (! snd_card_proc_new(chip->card, "board_info", &entry)) { | |
1225 | entry->private_data = chip; | |
1da177e4 LT |
1226 | entry->c.text.read = snd_mixart_proc_read; |
1227 | } | |
1228 | ||
1229 | if (! snd_card_proc_new(chip->card, "mixart_BA0", &entry)) { | |
1230 | entry->content = SNDRV_INFO_CONTENT_DATA; | |
1231 | entry->private_data = chip->mgr; | |
1232 | entry->c.ops = &snd_mixart_proc_ops_BA0; | |
1233 | entry->size = MIXART_BA0_SIZE; | |
1234 | } | |
1235 | if (! snd_card_proc_new(chip->card, "mixart_BA1", &entry)) { | |
1236 | entry->content = SNDRV_INFO_CONTENT_DATA; | |
1237 | entry->private_data = chip->mgr; | |
1238 | entry->c.ops = &snd_mixart_proc_ops_BA1; | |
1239 | entry->size = MIXART_BA1_SIZE; | |
1240 | } | |
1241 | } | |
1242 | /* end of proc interface */ | |
1243 | ||
1244 | ||
1245 | /* | |
1246 | * probe function - creates the card manager | |
1247 | */ | |
e23e7a14 BP |
1248 | static int snd_mixart_probe(struct pci_dev *pci, |
1249 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
1250 | { |
1251 | static int dev; | |
67b48b88 | 1252 | struct mixart_mgr *mgr; |
1da177e4 LT |
1253 | unsigned int i; |
1254 | int err; | |
1255 | size_t size; | |
1256 | ||
1257 | /* | |
1258 | */ | |
1259 | if (dev >= SNDRV_CARDS) | |
1260 | return -ENODEV; | |
1261 | if (! enable[dev]) { | |
1262 | dev++; | |
1263 | return -ENOENT; | |
1264 | } | |
1265 | ||
1266 | /* enable PCI device */ | |
1267 | if ((err = pci_enable_device(pci)) < 0) | |
1268 | return err; | |
1269 | pci_set_master(pci); | |
1270 | ||
1271 | /* check if we can restrict PCI DMA transfers to 32 bits */ | |
412b979c | 1272 | if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) { |
6414e35d TI |
1273 | dev_err(&pci->dev, |
1274 | "architecture does not support 32bit PCI busmaster DMA\n"); | |
1da177e4 LT |
1275 | pci_disable_device(pci); |
1276 | return -ENXIO; | |
1277 | } | |
1278 | ||
1279 | /* | |
1280 | */ | |
e560d8d8 | 1281 | mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); |
1da177e4 LT |
1282 | if (! mgr) { |
1283 | pci_disable_device(pci); | |
1284 | return -ENOMEM; | |
1285 | } | |
1286 | ||
1287 | mgr->pci = pci; | |
1288 | mgr->irq = -1; | |
1289 | ||
1290 | /* resource assignment */ | |
1291 | if ((err = pci_request_regions(pci, CARD_NAME)) < 0) { | |
1292 | kfree(mgr); | |
1293 | pci_disable_device(pci); | |
1294 | return err; | |
1295 | } | |
1296 | for (i = 0; i < 2; i++) { | |
1297 | mgr->mem[i].phys = pci_resource_start(pci, i); | |
2f5ad54e | 1298 | mgr->mem[i].virt = pci_ioremap_bar(pci, i); |
f9ff161a | 1299 | if (!mgr->mem[i].virt) { |
6414e35d | 1300 | dev_err(&pci->dev, "unable to remap resource 0x%lx\n", |
f9ff161a TI |
1301 | mgr->mem[i].phys); |
1302 | snd_mixart_free(mgr); | |
1303 | return -EBUSY; | |
1304 | } | |
1da177e4 LT |
1305 | } |
1306 | ||
8d3a8b5c TI |
1307 | if (request_threaded_irq(pci->irq, snd_mixart_interrupt, |
1308 | snd_mixart_threaded_irq, IRQF_SHARED, | |
1309 | KBUILD_MODNAME, mgr)) { | |
6414e35d | 1310 | dev_err(&pci->dev, "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
1311 | snd_mixart_free(mgr); |
1312 | return -EBUSY; | |
1313 | } | |
1314 | mgr->irq = pci->irq; | |
1315 | ||
1316 | sprintf(mgr->shortname, "Digigram miXart"); | |
1317 | sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, irq %i", mgr->shortname, mgr->mem[0].phys, mgr->mem[1].phys, mgr->irq); | |
1318 | ||
1da177e4 LT |
1319 | /* init mailbox */ |
1320 | mgr->msg_fifo_readptr = 0; | |
1321 | mgr->msg_fifo_writeptr = 0; | |
1322 | ||
8d3a8b5c TI |
1323 | mutex_init(&mgr->lock); |
1324 | mutex_init(&mgr->msg_lock); | |
1da177e4 LT |
1325 | init_waitqueue_head(&mgr->msg_sleep); |
1326 | atomic_set(&mgr->msg_processed, 0); | |
1327 | ||
1328 | /* init setup mutex*/ | |
62932df8 | 1329 | mutex_init(&mgr->setup_mutex); |
1da177e4 | 1330 | |
1da177e4 LT |
1331 | /* card assignment */ |
1332 | mgr->num_cards = MIXART_MAX_CARDS; /* 4 FIXME: configurable? */ | |
1333 | for (i = 0; i < mgr->num_cards; i++) { | |
67b48b88 | 1334 | struct snd_card *card; |
1da177e4 LT |
1335 | char tmpid[16]; |
1336 | int idx; | |
1337 | ||
1338 | if (index[dev] < 0) | |
1339 | idx = index[dev]; | |
1340 | else | |
1341 | idx = index[dev] + i; | |
1342 | snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : "MIXART", i); | |
60c5772b TI |
1343 | err = snd_card_new(&pci->dev, idx, tmpid, THIS_MODULE, |
1344 | 0, &card); | |
1da177e4 | 1345 | |
e58de7ba | 1346 | if (err < 0) { |
6414e35d | 1347 | dev_err(&pci->dev, "cannot allocate the card %d\n", i); |
1da177e4 | 1348 | snd_mixart_free(mgr); |
e58de7ba | 1349 | return err; |
1da177e4 LT |
1350 | } |
1351 | ||
1352 | strcpy(card->driver, CARD_NAME); | |
1353 | sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i); | |
1354 | sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i); | |
1355 | ||
1356 | if ((err = snd_mixart_create(mgr, card, i)) < 0) { | |
73f6a12e | 1357 | snd_card_free(card); |
1da177e4 LT |
1358 | snd_mixart_free(mgr); |
1359 | return err; | |
1360 | } | |
1361 | ||
1362 | if(i==0) { | |
1363 | /* init proc interface only for chip0 */ | |
1364 | snd_mixart_proc_init(mgr->chip[i]); | |
1365 | } | |
1366 | ||
1367 | if ((err = snd_card_register(card)) < 0) { | |
1368 | snd_mixart_free(mgr); | |
1369 | return err; | |
1370 | } | |
1371 | } | |
1372 | ||
1373 | /* init firmware status (mgr->dsp_loaded reset in hwdep_new) */ | |
1374 | mgr->board_type = MIXART_DAUGHTER_TYPE_NONE; | |
1375 | ||
1376 | /* create array of streaminfo */ | |
67b48b88 TI |
1377 | size = PAGE_ALIGN( (MIXART_MAX_STREAM_PER_CARD * MIXART_MAX_CARDS * |
1378 | sizeof(struct mixart_flowinfo)) ); | |
1da177e4 LT |
1379 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
1380 | size, &mgr->flowinfo) < 0) { | |
1381 | snd_mixart_free(mgr); | |
1382 | return -ENOMEM; | |
1383 | } | |
1384 | /* init streaminfo_array */ | |
1385 | memset(mgr->flowinfo.area, 0, size); | |
1386 | ||
1387 | /* create array of bufferinfo */ | |
67b48b88 TI |
1388 | size = PAGE_ALIGN( (MIXART_MAX_STREAM_PER_CARD * MIXART_MAX_CARDS * |
1389 | sizeof(struct mixart_bufferinfo)) ); | |
1da177e4 LT |
1390 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
1391 | size, &mgr->bufferinfo) < 0) { | |
1392 | snd_mixart_free(mgr); | |
1393 | return -ENOMEM; | |
1394 | } | |
1395 | /* init bufferinfo_array */ | |
1396 | memset(mgr->bufferinfo.area, 0, size); | |
1397 | ||
1398 | /* set up firmware */ | |
1399 | err = snd_mixart_setup_firmware(mgr); | |
1400 | if (err < 0) { | |
1401 | snd_mixart_free(mgr); | |
1402 | return err; | |
1403 | } | |
1404 | ||
1405 | pci_set_drvdata(pci, mgr); | |
1406 | dev++; | |
1407 | return 0; | |
1408 | } | |
1409 | ||
e23e7a14 | 1410 | static void snd_mixart_remove(struct pci_dev *pci) |
1da177e4 LT |
1411 | { |
1412 | snd_mixart_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
1413 | } |
1414 | ||
e9f66d9b | 1415 | static struct pci_driver mixart_driver = { |
3733e424 | 1416 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1417 | .id_table = snd_mixart_ids, |
1418 | .probe = snd_mixart_probe, | |
e23e7a14 | 1419 | .remove = snd_mixart_remove, |
1da177e4 LT |
1420 | }; |
1421 | ||
e9f66d9b | 1422 | module_pci_driver(mixart_driver); |