[deliverable/linux.git] / sound / pci / oxygen / oxygen.c

/*
 * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
 *
 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
 *
 *
 *  This driver is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License, version 2.
 *
 *  This driver is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this driver; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

/*
 * SPI 0 -> 1st AK4396 (front)
 * SPI 1 -> 2nd AK4396 (surround)
 * SPI 2 -> 3rd AK4396 (center/LFE)
 * SPI 3 -> WM8785
 * SPI 4 -> 4th AK4396 (back)
 *
 * GPIO 0 -> DFS0 of AK5385
 * GPIO 1 -> DFS1 of AK5385
 */

#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/pci.h>
#include <sound/ac97_codec.h>
#include <sound/control.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/tlv.h>
#include "oxygen.h"
#include "ak4396.h"
#include "wm8785.h"

MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
MODULE_DESCRIPTION("C-Media CMI8788 driver");
MODULE_LICENSE("GPL v2");
MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");

static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;

module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "card index");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "enable card");

enum {
	MODEL_CMEDIA_REF,	/* C-Media's reference design */
	MODEL_MERIDIAN,		/* AuzenTech X-Meridian */
	MODEL_HALO,		/* HT-Omega Claro halo */
};

static struct pci_device_id oxygen_ids[] __devinitdata = {
	{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
	{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CMEDIA_REF },
	{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_HALO },
	{ }
};
MODULE_DEVICE_TABLE(pci, oxygen_ids);


#define GPIO_AK5385_DFS_MASK	0x0003
#define GPIO_AK5385_DFS_NORMAL	0x0000
#define GPIO_AK5385_DFS_DOUBLE	0x0001
#define GPIO_AK5385_DFS_QUAD	0x0002

struct generic_data {
	u8 ak4396_ctl2;
	u16 saved_wm8785_registers[2];
};

static void ak4396_write(struct oxygen *chip, unsigned int codec,
			 u8 reg, u8 value)
{
	/* maps ALSA channel pair number to SPI output */
	static const u8 codec_spi_map[4] = {
		0, 1, 2, 4
	};
	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
			 OXYGEN_SPI_DATA_LENGTH_2 |
			 OXYGEN_SPI_CLOCK_160 |
			 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
			 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
			 AK4396_WRITE | (reg << 8) | value);
}

static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
{
	struct generic_data *data = chip->model_data;

	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
			 OXYGEN_SPI_DATA_LENGTH_2 |
			 OXYGEN_SPI_CLOCK_160 |
			 (3 << OXYGEN_SPI_CODEC_SHIFT) |
			 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
			 (reg << 9) | value);
	if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
		data->saved_wm8785_registers[reg] = value;
}

static void update_ak4396_volume(struct oxygen *chip)
{
	unsigned int i;

	for (i = 0; i < 4; ++i) {
		ak4396_write(chip, i,
			     AK4396_LCH_ATT, chip->dac_volume[i * 2]);
		ak4396_write(chip, i,
			     AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
	}
}

static void ak4396_registers_init(struct oxygen *chip)
{
	struct generic_data *data = chip->model_data;
	unsigned int i;

	for (i = 0; i < 4; ++i) {
		ak4396_write(chip, i,
			     AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
		ak4396_write(chip, i,
			     AK4396_CONTROL_2, data->ak4396_ctl2);
		ak4396_write(chip, i,
			     AK4396_CONTROL_3, AK4396_PCM);
	}
	update_ak4396_volume(chip);
}

static void ak4396_init(struct oxygen *chip)
{
	struct generic_data *data = chip->model_data;

	data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
	ak4396_registers_init(chip);
	snd_component_add(chip->card, "AK4396");
}

static void ak5385_init(struct oxygen *chip)
{
	oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
	oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
	snd_component_add(chip->card, "AK5385");
}

static void wm8785_registers_init(struct oxygen *chip)
{
	struct generic_data *data = chip->model_data;

	wm8785_write(chip, WM8785_R7, 0);
	wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
	wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
}

static void wm8785_init(struct oxygen *chip)
{
	struct generic_data *data = chip->model_data;

	data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
		WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
	data->saved_wm8785_registers[1] = WM8785_WL_24;
	wm8785_registers_init(chip);
	snd_component_add(chip->card, "WM8785");
}

static void generic_init(struct oxygen *chip)
{
	ak4396_init(chip);
	wm8785_init(chip);
}

static void meridian_init(struct oxygen *chip)
{
	ak4396_init(chip);
	ak5385_init(chip);
}

static void generic_cleanup(struct oxygen *chip)
{
}

static void generic_resume(struct oxygen *chip)
{
	ak4396_registers_init(chip);
	wm8785_registers_init(chip);
}

static void meridian_resume(struct oxygen *chip)
{
	ak4396_registers_init(chip);
}

static void set_ak4396_params(struct oxygen *chip,
			      struct snd_pcm_hw_params *params)
{
	struct generic_data *data = chip->model_data;
	unsigned int i;
	u8 value;

	value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
	if (params_rate(params) <= 54000)
		value |= AK4396_DFS_NORMAL;
	else if (params_rate(params) <= 108000)
		value |= AK4396_DFS_DOUBLE;
	else
		value |= AK4396_DFS_QUAD;
	data->ak4396_ctl2 = value;

	msleep(1); /* wait for the new MCLK to become stable */

	for (i = 0; i < 4; ++i) {
		ak4396_write(chip, i,
			     AK4396_CONTROL_1, AK4396_DIF_24_MSB);
		ak4396_write(chip, i,
			     AK4396_CONTROL_2, value);
		ak4396_write(chip, i,
			     AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
	}
}

static void update_ak4396_mute(struct oxygen *chip)
{
	struct generic_data *data = chip->model_data;
	unsigned int i;
	u8 value;

	value = data->ak4396_ctl2 & ~AK4396_SMUTE;
	if (chip->dac_mute)
		value |= AK4396_SMUTE;
	data->ak4396_ctl2 = value;
	for (i = 0; i < 4; ++i)
		ak4396_write(chip, i, AK4396_CONTROL_2, value);
}

static void set_wm8785_params(struct oxygen *chip,
			      struct snd_pcm_hw_params *params)
{
	unsigned int value;

	wm8785_write(chip, WM8785_R7, 0);

	value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
	if (params_rate(params) <= 48000)
		value |= WM8785_OSR_SINGLE;
	else if (params_rate(params) <= 96000)
		value |= WM8785_OSR_DOUBLE;
	else
		value |= WM8785_OSR_QUAD;
	wm8785_write(chip, WM8785_R0, value);

	if (snd_pcm_format_width(params_format(params)) <= 16)
		value = WM8785_WL_16;
	else
		value = WM8785_WL_24;
	wm8785_write(chip, WM8785_R1, value);
}

static void set_ak5385_params(struct oxygen *chip,
			      struct snd_pcm_hw_params *params)
{
	unsigned int value;

	if (params_rate(params) <= 54000)
		value = GPIO_AK5385_DFS_NORMAL;
	else if (params_rate(params) <= 108000)
		value = GPIO_AK5385_DFS_DOUBLE;
	else
		value = GPIO_AK5385_DFS_QUAD;
	oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
			      value, GPIO_AK5385_DFS_MASK);
}

static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);

static int generic_probe(struct oxygen *chip, unsigned long driver_data)
{
	if (driver_data == MODEL_MERIDIAN) {
		chip->model.init = meridian_init;
		chip->model.resume = meridian_resume;
		chip->model.set_adc_params = set_ak5385_params;
		chip->model.device_config = PLAYBACK_0_TO_I2S |
					    PLAYBACK_1_TO_SPDIF |
					    CAPTURE_0_FROM_I2S_2 |
					    CAPTURE_1_FROM_SPDIF;
	}
	if (driver_data == MODEL_MERIDIAN || driver_data == MODEL_HALO) {
		chip->model.misc_flags = OXYGEN_MISC_MIDI;
		chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
	}
	return 0;
}

static const struct oxygen_model model_generic = {
	.shortname = "C-Media CMI8788",
	.longname = "C-Media Oxygen HD Audio",
	.chip = "CMI8788",
	.owner = THIS_MODULE,
	.probe = generic_probe,
	.init = generic_init,
	.cleanup = generic_cleanup,
	.resume = generic_resume,
	.set_dac_params = set_ak4396_params,
	.set_adc_params = set_wm8785_params,
	.update_dac_volume = update_ak4396_volume,
	.update_dac_mute = update_ak4396_mute,
	.dac_tlv = ak4396_db_scale,
	.model_data_size = sizeof(struct generic_data),
	.device_config = PLAYBACK_0_TO_I2S |
			 PLAYBACK_1_TO_SPDIF |
			 PLAYBACK_2_TO_AC97_1 |
			 CAPTURE_0_FROM_I2S_1 |
			 CAPTURE_1_FROM_SPDIF |
			 CAPTURE_2_FROM_AC97_1,
	.dac_channels = 8,
	.dac_volume_min = 0,
	.dac_volume_max = 255,
	.function_flags = OXYGEN_FUNCTION_SPI |
			  OXYGEN_FUNCTION_ENABLE_SPI_4_5,
	.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
	.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
};

static int __devinit generic_oxygen_probe(struct pci_dev *pci,
					  const struct pci_device_id *pci_id)
{
	static int dev;
	int err;

	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		++dev;
		return -ENOENT;
	}
	err = oxygen_pci_probe(pci, index[dev], id[dev],
			       &model_generic, pci_id->driver_data);
	if (err >= 0)
		++dev;
	return err;
}

static struct pci_driver oxygen_driver = {
	.name = "CMI8788",
	.id_table = oxygen_ids,
	.probe = generic_oxygen_probe,
	.remove = __devexit_p(oxygen_pci_remove),
#ifdef CONFIG_PM
	.suspend = oxygen_pci_suspend,
	.resume = oxygen_pci_resume,
#endif
};

static int __init alsa_card_oxygen_init(void)
{
	return pci_register_driver(&oxygen_driver);
}

static void __exit alsa_card_oxygen_exit(void)
{
	pci_unregister_driver(&oxygen_driver);
}

module_init(alsa_card_oxygen_init)
module_exit(alsa_card_oxygen_exit)
Commit	Line	Data
d0ce9946 CL	1	/*
	2	* C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
	3	*
	4	* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
	5	*
	6	*
	7	* This driver is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License, version 2.
	9	*
	10	* This driver is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this driver; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	*/
	19
	20	/*
	21	* SPI 0 -> 1st AK4396 (front)
7113e958	22	* SPI 1 -> 2nd AK4396 (surround)
d0ce9946 CL	23	* SPI 2 -> 3rd AK4396 (center/LFE)
d0ce9946 CL	24	* SPI 3 -> WM8785
7113e958	25	* SPI 4 -> 4th AK4396 (back)
d0ce9946 CL	26	*
	27	* GPIO 0 -> DFS0 of AK5385
	28	* GPIO 1 -> DFS1 of AK5385
	29	*/
	30
df91bc23	31	#include <linux/delay.h>
902b05c1	32	#include <linux/mutex.h>
d0ce9946	33	#include <linux/pci.h>
902b05c1	34	#include <sound/ac97_codec.h>
ccc80fb4	35	#include <sound/control.h>
d0ce9946 CL	36	#include <sound/core.h>
	37	#include <sound/initval.h>
	38	#include <sound/pcm.h>
	39	#include <sound/pcm_params.h>
	40	#include <sound/tlv.h>
	41	#include "oxygen.h"
c626026d	42	#include "ak4396.h"
f5b2368b	43	#include "wm8785.h"
d0ce9946 CL	44
	45	MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
	46	MODULE_DESCRIPTION("C-Media CMI8788 driver");
d023dc0a	47	MODULE_LICENSE("GPL v2");
d0ce9946 CL	48	MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
	49
	50	static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
	51	static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
	52	static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
	53
	54	module_param_array(index, int, NULL, 0444);
	55	MODULE_PARM_DESC(index, "card index");
	56	module_param_array(id, charp, NULL, 0444);
	57	MODULE_PARM_DESC(id, "ID string");
	58	module_param_array(enable, bool, NULL, 0444);
	59	MODULE_PARM_DESC(enable, "enable card");
	60
2f1b0ec7 CL	61	enum {
	62	MODEL_CMEDIA_REF, /* C-Media's reference design */
	63	MODEL_MERIDIAN, /* AuzenTech X-Meridian */
de04b102	64	MODEL_HALO, /* HT-Omega Claro halo */
2f1b0ec7 CL	65	};
2f1b0ec7 CL	66
d0ce9946	67	static struct pci_device_id oxygen_ids[] __devinitdata = {
2f1b0ec7 CL	68	{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
	69	{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
	70	{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
	71	{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
	72	{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
	73	{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
	74	{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
	75	{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
	76	{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
	77	{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CMEDIA_REF },
de04b102	78	{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_HALO },
d0ce9946 CL	79	{ }
	80	};
	81	MODULE_DEVICE_TABLE(pci, oxygen_ids);
	82
878ac3ee CL	83
	84	#define GPIO_AK5385_DFS_MASK 0x0003
	85	#define GPIO_AK5385_DFS_NORMAL 0x0000
	86	#define GPIO_AK5385_DFS_DOUBLE 0x0001
	87	#define GPIO_AK5385_DFS_QUAD 0x0002
	88
7ef37cd9 CL	89	struct generic_data {
7ef37cd9 CL	90	u8 ak4396_ctl2;
e58aee95	91	u16 saved_wm8785_registers[2];
7ef37cd9 CL	92	};
7ef37cd9 CL	93
d0ce9946 CL	94	static void ak4396_write(struct oxygen *chip, unsigned int codec,
	95	u8 reg, u8 value)
	96	{
	97	/* maps ALSA channel pair number to SPI output */
	98	static const u8 codec_spi_map[4] = {
7113e958	99	0, 1, 2, 4
d0ce9946	100	};
c2353a08	101	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER \|
d0ce9946	102	OXYGEN_SPI_DATA_LENGTH_2 \|
2ea85986	103	OXYGEN_SPI_CLOCK_160 \|
d0ce9946	104	(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) \|
c2353a08	105	OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
d0ce9946 CL	106	AK4396_WRITE \| (reg << 8) \| value);
	107	}
	108
	109	static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
	110	{
e58aee95 CL	111	struct generic_data *data = chip->model_data;
e58aee95 CL	112
c2353a08	113	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER \|
d0ce9946	114	OXYGEN_SPI_DATA_LENGTH_2 \|
2ea85986	115	OXYGEN_SPI_CLOCK_160 \|
c2353a08 CL	116	(3 << OXYGEN_SPI_CODEC_SHIFT) \|
c2353a08 CL	117	OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
d0ce9946	118	(reg << 9) \| value);
e58aee95 CL	119	if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
e58aee95 CL	120	data->saved_wm8785_registers[reg] = value;
d0ce9946 CL	121	}
d0ce9946 CL	122
bbbfb552 CL	123	static void update_ak4396_volume(struct oxygen *chip)
	124	{
	125	unsigned int i;
	126
	127	for (i = 0; i < 4; ++i) {
	128	ak4396_write(chip, i,
	129	AK4396_LCH_ATT, chip->dac_volume[i * 2]);
	130	ak4396_write(chip, i,
	131	AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
	132	}
	133	}
	134
75146fc0	135	static void ak4396_registers_init(struct oxygen *chip)
d0ce9946	136	{
7ef37cd9	137	struct generic_data *data = chip->model_data;
d0ce9946 CL	138	unsigned int i;
d0ce9946 CL	139
d0ce9946	140	for (i = 0; i < 4; ++i) {
878ac3ee CL	141	ak4396_write(chip, i,
	142	AK4396_CONTROL_1, AK4396_DIF_24_MSB \| AK4396_RSTN);
	143	ak4396_write(chip, i,
7ef37cd9	144	AK4396_CONTROL_2, data->ak4396_ctl2);
878ac3ee CL	145	ak4396_write(chip, i,
878ac3ee CL	146	AK4396_CONTROL_3, AK4396_PCM);
d0ce9946	147	}
bbbfb552	148	update_ak4396_volume(chip);
75146fc0 CL	149	}
	150
	151	static void ak4396_init(struct oxygen *chip)
	152	{
	153	struct generic_data *data = chip->model_data;
	154
	155	data->ak4396_ctl2 = AK4396_SMUTE \| AK4396_DEM_OFF \| AK4396_DFS_NORMAL;
	156	ak4396_registers_init(chip);
d0ce9946 CL	157	snd_component_add(chip->card, "AK4396");
	158	}
	159
	160	static void ak5385_init(struct oxygen *chip)
	161	{
878ac3ee CL	162	oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
878ac3ee CL	163	oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
d0ce9946 CL	164	snd_component_add(chip->card, "AK5385");
	165	}
	166
75146fc0	167	static void wm8785_registers_init(struct oxygen *chip)
d0ce9946	168	{
e58aee95 CL	169	struct generic_data *data = chip->model_data;
e58aee95 CL	170
878ac3ee	171	wm8785_write(chip, WM8785_R7, 0);
e58aee95 CL	172	wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
e58aee95 CL	173	wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
75146fc0	174	}
e58aee95	175
75146fc0 CL	176	static void wm8785_init(struct oxygen *chip)
	177	{
	178	struct generic_data *data = chip->model_data;
	179
	180	data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE \|
	181	WM8785_OSR_SINGLE \| WM8785_FORMAT_LJUST;
	182	data->saved_wm8785_registers[1] = WM8785_WL_24;
	183	wm8785_registers_init(chip);
d0ce9946 CL	184	snd_component_add(chip->card, "WM8785");
	185	}
	186
	187	static void generic_init(struct oxygen *chip)
	188	{
	189	ak4396_init(chip);
	190	wm8785_init(chip);
	191	}
	192
	193	static void meridian_init(struct oxygen *chip)
	194	{
	195	ak4396_init(chip);
	196	ak5385_init(chip);
	197	}
	198
	199	static void generic_cleanup(struct oxygen *chip)
	200	{
	201	}
	202
4a4bc53b CL	203	static void generic_resume(struct oxygen *chip)
	204	{
	205	ak4396_registers_init(chip);
	206	wm8785_registers_init(chip);
	207	}
	208
c2bc4ff5 CL	209	static void meridian_resume(struct oxygen *chip)
	210	{
	211	ak4396_registers_init(chip);
	212	}
	213
d0ce9946 CL	214	static void set_ak4396_params(struct oxygen *chip,
	215	struct snd_pcm_hw_params *params)
	216	{
7ef37cd9	217	struct generic_data *data = chip->model_data;
d0ce9946 CL	218	unsigned int i;
	219	u8 value;
	220
7ef37cd9	221	value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
d0ce9946 CL	222	if (params_rate(params) <= 54000)
d0ce9946 CL	223	value \|= AK4396_DFS_NORMAL;
236c4920	224	else if (params_rate(params) <= 108000)
d0ce9946 CL	225	value \|= AK4396_DFS_DOUBLE;
	226	else
	227	value \|= AK4396_DFS_QUAD;
7ef37cd9	228	data->ak4396_ctl2 = value;
df91bc23 CL	229
	230	msleep(1); /* wait for the new MCLK to become stable */
	231
d0ce9946	232	for (i = 0; i < 4; ++i) {
878ac3ee CL	233	ak4396_write(chip, i,
	234	AK4396_CONTROL_1, AK4396_DIF_24_MSB);
	235	ak4396_write(chip, i,
	236	AK4396_CONTROL_2, value);
	237	ak4396_write(chip, i,
	238	AK4396_CONTROL_1, AK4396_DIF_24_MSB \| AK4396_RSTN);
d0ce9946 CL	239	}
	240	}
	241
d0ce9946 CL	242	static void update_ak4396_mute(struct oxygen *chip)
d0ce9946 CL	243	{
7ef37cd9	244	struct generic_data *data = chip->model_data;
d0ce9946 CL	245	unsigned int i;
	246	u8 value;
	247
7ef37cd9	248	value = data->ak4396_ctl2 & ~AK4396_SMUTE;
d0ce9946 CL	249	if (chip->dac_mute)
d0ce9946 CL	250	value \|= AK4396_SMUTE;
7ef37cd9	251	data->ak4396_ctl2 = value;
d0ce9946	252	for (i = 0; i < 4; ++i)
878ac3ee	253	ak4396_write(chip, i, AK4396_CONTROL_2, value);
d0ce9946 CL	254	}
	255
	256	static void set_wm8785_params(struct oxygen *chip,
	257	struct snd_pcm_hw_params *params)
	258	{
	259	unsigned int value;
	260
878ac3ee	261	wm8785_write(chip, WM8785_R7, 0);
d0ce9946	262
878ac3ee	263	value = WM8785_MCR_SLAVE \| WM8785_FORMAT_LJUST;
71e22a4b CL	264	if (params_rate(params) <= 48000)
	265	value \|= WM8785_OSR_SINGLE;
	266	else if (params_rate(params) <= 96000)
d0ce9946	267	value \|= WM8785_OSR_DOUBLE;
d0ce9946	268	else
71e22a4b	269	value \|= WM8785_OSR_QUAD;
878ac3ee	270	wm8785_write(chip, WM8785_R0, value);
d0ce9946 CL	271
	272	if (snd_pcm_format_width(params_format(params)) <= 16)
	273	value = WM8785_WL_16;
	274	else
	275	value = WM8785_WL_24;
878ac3ee	276	wm8785_write(chip, WM8785_R1, value);
d0ce9946 CL	277	}
	278
	279	static void set_ak5385_params(struct oxygen *chip,
	280	struct snd_pcm_hw_params *params)
	281	{
	282	unsigned int value;
	283
	284	if (params_rate(params) <= 54000)
878ac3ee	285	value = GPIO_AK5385_DFS_NORMAL;
d0ce9946	286	else if (params_rate(params) <= 108000)
878ac3ee	287	value = GPIO_AK5385_DFS_DOUBLE;
d0ce9946	288	else
878ac3ee CL	289	value = GPIO_AK5385_DFS_QUAD;
	290	oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
	291	value, GPIO_AK5385_DFS_MASK);
d0ce9946 CL	292	}
	293
	294	static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
	295
4bd0c3a6 CL	296	static int generic_probe(struct oxygen *chip, unsigned long driver_data)
	297	{
	298	if (driver_data == MODEL_MERIDIAN) {
	299	chip->model.init = meridian_init;
c2bc4ff5	300	chip->model.resume = meridian_resume;
4bd0c3a6	301	chip->model.set_adc_params = set_ak5385_params;
d76596b1 CL	302	chip->model.device_config = PLAYBACK_0_TO_I2S \|
	303	PLAYBACK_1_TO_SPDIF \|
	304	CAPTURE_0_FROM_I2S_2 \|
	305	CAPTURE_1_FROM_SPDIF;
de04b102 CL	306	}
de04b102 CL	307	if (driver_data == MODEL_MERIDIAN \|\| driver_data == MODEL_HALO) {
4bd0c3a6	308	chip->model.misc_flags = OXYGEN_MISC_MIDI;
dbbbd674	309	chip->model.device_config \|= MIDI_OUTPUT \| MIDI_INPUT;
4bd0c3a6 CL	310	}
	311	return 0;
	312	}
	313
d0ce9946 CL	314	static const struct oxygen_model model_generic = {
	315	.shortname = "C-Media CMI8788",
	316	.longname = "C-Media Oxygen HD Audio",
	317	.chip = "CMI8788",
	318	.owner = THIS_MODULE,
4bd0c3a6	319	.probe = generic_probe,
d0ce9946 CL	320	.init = generic_init,
d0ce9946 CL	321	.cleanup = generic_cleanup,
4a4bc53b	322	.resume = generic_resume,
d0ce9946 CL	323	.set_dac_params = set_ak4396_params,
	324	.set_adc_params = set_wm8785_params,
	325	.update_dac_volume = update_ak4396_volume,
	326	.update_dac_mute = update_ak4396_mute,
4972a177	327	.dac_tlv = ak4396_db_scale,
7ef37cd9	328	.model_data_size = sizeof(struct generic_data),
d76596b1 CL	329	.device_config = PLAYBACK_0_TO_I2S \|
	330	PLAYBACK_1_TO_SPDIF \|
	331	PLAYBACK_2_TO_AC97_1 \|
	332	CAPTURE_0_FROM_I2S_1 \|
	333	CAPTURE_1_FROM_SPDIF \|
	334	CAPTURE_2_FROM_AC97_1,
976cd627	335	.dac_channels = 8,
193e8138 CL	336	.dac_volume_min = 0,
193e8138 CL	337	.dac_volume_max = 255,
87eedd2f CL	338	.function_flags = OXYGEN_FUNCTION_SPI \|
87eedd2f CL	339	OXYGEN_FUNCTION_ENABLE_SPI_4_5,
05855ba3 CL	340	.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
05855ba3 CL	341	.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
d0ce9946	342	};
d0ce9946 CL	343
	344	static int __devinit generic_oxygen_probe(struct pci_dev *pci,
	345	const struct pci_device_id *pci_id)
	346	{
	347	static int dev;
d0ce9946 CL	348	int err;
	349
	350	if (dev >= SNDRV_CARDS)
	351	return -ENODEV;
	352	if (!enable[dev]) {
	353	++dev;
	354	return -ENOENT;
	355	}
db12b8e3	356	err = oxygen_pci_probe(pci, index[dev], id[dev],
4bd0c3a6	357	&model_generic, pci_id->driver_data);
d0ce9946 CL	358	if (err >= 0)
	359	++dev;
	360	return err;
	361	}
	362
	363	static struct pci_driver oxygen_driver = {
	364	.name = "CMI8788",
	365	.id_table = oxygen_ids,
	366	.probe = generic_oxygen_probe,
	367	.remove = __devexit_p(oxygen_pci_remove),
4a4bc53b CL	368	#ifdef CONFIG_PM
	369	.suspend = oxygen_pci_suspend,
	370	.resume = oxygen_pci_resume,
	371	#endif
d0ce9946 CL	372	};
	373
	374	static int __init alsa_card_oxygen_init(void)
	375	{
	376	return pci_register_driver(&oxygen_driver);
	377	}
	378
	379	static void __exit alsa_card_oxygen_exit(void)
	380	{
	381	pci_unregister_driver(&oxygen_driver);
	382	}
	383
	384	module_init(alsa_card_oxygen_init)
	385	module_exit(alsa_card_oxygen_exit)