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1 | /* |
2 | * Driver for Digigram pcxhr compatible soundcards | |
3 | * | |
4 | * main file with alsa callbacks | |
5 | * | |
6 | * Copyright (c) 2004 by Digigram <alsa@digigram.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | ||
24 | #include <sound/driver.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/moduleparam.h> | |
62932df8 IM |
31 | #include <linux/mutex.h> |
32 | ||
e12229b4 MB |
33 | #include <sound/core.h> |
34 | #include <sound/initval.h> | |
35 | #include <sound/info.h> | |
36 | #include <sound/control.h> | |
37 | #include <sound/pcm.h> | |
38 | #include <sound/pcm_params.h> | |
39 | #include "pcxhr.h" | |
40 | #include "pcxhr_mixer.h" | |
41 | #include "pcxhr_hwdep.h" | |
42 | #include "pcxhr_core.h" | |
43 | ||
44 | #define DRIVER_NAME "pcxhr" | |
45 | ||
46 | MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>"); | |
47 | MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING); | |
48 | MODULE_LICENSE("GPL"); | |
49 | MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}"); | |
50 | ||
51 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
52 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
53 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
54 | static int mono[SNDRV_CARDS]; /* capture in mono only */ | |
55 | ||
56 | module_param_array(index, int, NULL, 0444); | |
57 | MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard"); | |
58 | module_param_array(id, charp, NULL, 0444); | |
59 | MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard"); | |
60 | module_param_array(enable, bool, NULL, 0444); | |
61 | MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard"); | |
62 | module_param_array(mono, bool, NULL, 0444); | |
63 | MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)"); | |
64 | ||
65 | enum { | |
66 | PCI_ID_VX882HR, | |
67 | PCI_ID_PCX882HR, | |
68 | PCI_ID_VX881HR, | |
69 | PCI_ID_PCX881HR, | |
70 | PCI_ID_PCX1222HR, | |
71 | PCI_ID_PCX1221HR, | |
72 | PCI_ID_LAST | |
73 | }; | |
74 | ||
75 | static struct pci_device_id pcxhr_ids[] = { | |
76 | { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, }, /* VX882HR */ | |
77 | { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, }, /* PCX882HR */ | |
78 | { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, }, /* VX881HR */ | |
79 | { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, }, /* PCX881HR */ | |
80 | { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */ | |
81 | { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */ | |
82 | { 0, } | |
83 | }; | |
84 | ||
85 | MODULE_DEVICE_TABLE(pci, pcxhr_ids); | |
86 | ||
87 | struct board_parameters { | |
88 | char* board_name; | |
89 | short playback_chips; | |
90 | short capture_chips; | |
91 | short firmware_num; | |
92 | }; | |
93 | static struct board_parameters pcxhr_board_params[] = { | |
94 | [PCI_ID_VX882HR] = { "VX882HR", 4, 4, 41, }, | |
95 | [PCI_ID_PCX882HR] = { "PCX882HR", 4, 4, 41, }, | |
96 | [PCI_ID_VX881HR] = { "VX881HR", 4, 4, 41, }, | |
97 | [PCI_ID_PCX881HR] = { "PCX881HR", 4, 4, 41, }, | |
98 | [PCI_ID_PCX1222HR] = { "PCX1222HR", 6, 1, 42, }, | |
99 | [PCI_ID_PCX1221HR] = { "PCX1221HR", 6, 1, 42, }, | |
100 | }; | |
101 | ||
102 | ||
103 | static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, | |
104 | unsigned int* realfreq) | |
105 | { | |
106 | unsigned int reg; | |
107 | ||
108 | if (freq < 6900 || freq > 110250) | |
109 | return -EINVAL; | |
110 | reg = (28224000 * 10) / freq; | |
111 | reg = (reg + 5) / 10; | |
112 | if (reg < 0x200) | |
113 | *pllreg = reg + 0x800; | |
114 | else if (reg < 0x400) | |
115 | *pllreg = reg & 0x1ff; | |
116 | else if (reg < 0x800) { | |
117 | *pllreg = ((reg >> 1) & 0x1ff) + 0x200; | |
118 | reg &= ~1; | |
119 | } else { | |
120 | *pllreg = ((reg >> 2) & 0x1ff) + 0x400; | |
121 | reg &= ~3; | |
122 | } | |
123 | if (realfreq) | |
124 | *realfreq = ((28224000 * 10) / reg + 5) / 10; | |
125 | return 0; | |
126 | } | |
127 | ||
128 | ||
129 | #define PCXHR_FREQ_REG_MASK 0x1f | |
130 | #define PCXHR_FREQ_QUARTZ_48000 0x00 | |
131 | #define PCXHR_FREQ_QUARTZ_24000 0x01 | |
132 | #define PCXHR_FREQ_QUARTZ_12000 0x09 | |
133 | #define PCXHR_FREQ_QUARTZ_32000 0x08 | |
134 | #define PCXHR_FREQ_QUARTZ_16000 0x04 | |
135 | #define PCXHR_FREQ_QUARTZ_8000 0x0c | |
136 | #define PCXHR_FREQ_QUARTZ_44100 0x02 | |
137 | #define PCXHR_FREQ_QUARTZ_22050 0x0a | |
138 | #define PCXHR_FREQ_QUARTZ_11025 0x06 | |
139 | #define PCXHR_FREQ_PLL 0x05 | |
140 | #define PCXHR_FREQ_QUARTZ_192000 0x10 | |
141 | #define PCXHR_FREQ_QUARTZ_96000 0x18 | |
142 | #define PCXHR_FREQ_QUARTZ_176400 0x14 | |
143 | #define PCXHR_FREQ_QUARTZ_88200 0x1c | |
144 | #define PCXHR_FREQ_QUARTZ_128000 0x12 | |
145 | #define PCXHR_FREQ_QUARTZ_64000 0x1a | |
146 | ||
147 | #define PCXHR_FREQ_WORD_CLOCK 0x0f | |
148 | #define PCXHR_FREQ_SYNC_AES 0x0e | |
149 | #define PCXHR_FREQ_AES_1 0x07 | |
150 | #define PCXHR_FREQ_AES_2 0x0b | |
151 | #define PCXHR_FREQ_AES_3 0x03 | |
152 | #define PCXHR_FREQ_AES_4 0x0d | |
153 | ||
154 | #define PCXHR_MODIFY_CLOCK_S_BIT 0x04 | |
155 | ||
156 | #define PCXHR_IRQ_TIMER_FREQ 92000 | |
157 | #define PCXHR_IRQ_TIMER_PERIOD 48 | |
158 | ||
159 | static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate, | |
160 | unsigned int *reg, unsigned int *freq) | |
161 | { | |
162 | unsigned int val, realfreq, pllreg; | |
163 | struct pcxhr_rmh rmh; | |
164 | int err; | |
165 | ||
166 | realfreq = rate; | |
167 | switch (mgr->use_clock_type) { | |
168 | case PCXHR_CLOCK_TYPE_INTERNAL : /* clock by quartz or pll */ | |
169 | switch (rate) { | |
170 | case 48000 : val = PCXHR_FREQ_QUARTZ_48000; break; | |
171 | case 24000 : val = PCXHR_FREQ_QUARTZ_24000; break; | |
172 | case 12000 : val = PCXHR_FREQ_QUARTZ_12000; break; | |
173 | case 32000 : val = PCXHR_FREQ_QUARTZ_32000; break; | |
174 | case 16000 : val = PCXHR_FREQ_QUARTZ_16000; break; | |
175 | case 8000 : val = PCXHR_FREQ_QUARTZ_8000; break; | |
176 | case 44100 : val = PCXHR_FREQ_QUARTZ_44100; break; | |
177 | case 22050 : val = PCXHR_FREQ_QUARTZ_22050; break; | |
178 | case 11025 : val = PCXHR_FREQ_QUARTZ_11025; break; | |
179 | case 192000 : val = PCXHR_FREQ_QUARTZ_192000; break; | |
180 | case 96000 : val = PCXHR_FREQ_QUARTZ_96000; break; | |
181 | case 176400 : val = PCXHR_FREQ_QUARTZ_176400; break; | |
182 | case 88200 : val = PCXHR_FREQ_QUARTZ_88200; break; | |
183 | case 128000 : val = PCXHR_FREQ_QUARTZ_128000; break; | |
184 | case 64000 : val = PCXHR_FREQ_QUARTZ_64000; break; | |
185 | default : | |
186 | val = PCXHR_FREQ_PLL; | |
187 | /* get the value for the pll register */ | |
188 | err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq); | |
189 | if (err) | |
190 | return err; | |
191 | pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); | |
192 | rmh.cmd[0] |= IO_NUM_REG_GENCLK; | |
193 | rmh.cmd[1] = pllreg & MASK_DSP_WORD; | |
194 | rmh.cmd[2] = pllreg >> 24; | |
195 | rmh.cmd_len = 3; | |
196 | err = pcxhr_send_msg(mgr, &rmh); | |
197 | if (err < 0) { | |
198 | snd_printk(KERN_ERR | |
199 | "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n", | |
200 | err ); | |
201 | return err; | |
202 | } | |
203 | } | |
204 | break; | |
205 | case PCXHR_CLOCK_TYPE_WORD_CLOCK : val = PCXHR_FREQ_WORD_CLOCK; break; | |
206 | case PCXHR_CLOCK_TYPE_AES_SYNC : val = PCXHR_FREQ_SYNC_AES; break; | |
207 | case PCXHR_CLOCK_TYPE_AES_1 : val = PCXHR_FREQ_AES_1; break; | |
208 | case PCXHR_CLOCK_TYPE_AES_2 : val = PCXHR_FREQ_AES_2; break; | |
209 | case PCXHR_CLOCK_TYPE_AES_3 : val = PCXHR_FREQ_AES_3; break; | |
210 | case PCXHR_CLOCK_TYPE_AES_4 : val = PCXHR_FREQ_AES_4; break; | |
211 | default : return -EINVAL; | |
212 | } | |
213 | *reg = val; | |
214 | *freq = realfreq; | |
215 | return 0; | |
216 | } | |
217 | ||
218 | ||
219 | int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate) | |
220 | { | |
221 | unsigned int val, realfreq, speed; | |
222 | struct pcxhr_rmh rmh; | |
223 | int err, changed; | |
224 | ||
225 | if (rate == 0) | |
226 | return 0; /* nothing to do */ | |
227 | ||
228 | err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq); | |
229 | if (err) | |
230 | return err; | |
231 | ||
232 | /* codec speed modes */ | |
233 | if (rate < 55000) | |
234 | speed = 0; /* single speed */ | |
235 | else if (rate < 100000) | |
236 | speed = 1; /* dual speed */ | |
237 | else | |
238 | speed = 2; /* quad speed */ | |
239 | if (mgr->codec_speed != speed) { | |
240 | pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */ | |
241 | rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; | |
242 | err = pcxhr_send_msg(mgr, &rmh); | |
243 | if (err) | |
244 | return err; | |
245 | ||
246 | pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */ | |
247 | rmh.cmd[0] |= IO_NUM_SPEED_RATIO; | |
248 | rmh.cmd[1] = speed; | |
249 | rmh.cmd_len = 2; | |
250 | err = pcxhr_send_msg(mgr, &rmh); | |
251 | if (err) | |
252 | return err; | |
253 | } | |
254 | /* set the new frequency */ | |
255 | snd_printdd("clock register : set %x\n", val); | |
256 | err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed); | |
257 | if (err) | |
258 | return err; | |
259 | mgr->sample_rate_real = realfreq; | |
260 | mgr->cur_clock_type = mgr->use_clock_type; | |
261 | ||
262 | /* unmute after codec speed modes */ | |
263 | if (mgr->codec_speed != speed) { | |
264 | pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */ | |
265 | rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; | |
266 | err = pcxhr_send_msg(mgr, &rmh); | |
267 | if (err) | |
268 | return err; | |
269 | mgr->codec_speed = speed; /* save new codec speed */ | |
270 | } | |
271 | ||
272 | if (changed) { | |
273 | pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK); | |
274 | rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */ | |
275 | if (rate < PCXHR_IRQ_TIMER_FREQ) | |
276 | rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD; | |
277 | else | |
278 | rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2; | |
279 | rmh.cmd[2] = rate; | |
280 | rmh.cmd_len = 3; | |
281 | err = pcxhr_send_msg(mgr, &rmh); | |
282 | if (err) | |
283 | return err; | |
284 | } | |
285 | snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq); | |
286 | return 0; | |
287 | } | |
288 | ||
289 | ||
290 | int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, | |
291 | int *sample_rate) | |
292 | { | |
293 | struct pcxhr_rmh rmh; | |
294 | unsigned char reg; | |
295 | int err, rate; | |
296 | ||
297 | switch (clock_type) { | |
298 | case PCXHR_CLOCK_TYPE_WORD_CLOCK : reg = REG_STATUS_WORD_CLOCK; break; | |
299 | case PCXHR_CLOCK_TYPE_AES_SYNC : reg = REG_STATUS_AES_SYNC; break; | |
300 | case PCXHR_CLOCK_TYPE_AES_1 : reg = REG_STATUS_AES_1; break; | |
301 | case PCXHR_CLOCK_TYPE_AES_2 : reg = REG_STATUS_AES_2; break; | |
302 | case PCXHR_CLOCK_TYPE_AES_3 : reg = REG_STATUS_AES_3; break; | |
303 | case PCXHR_CLOCK_TYPE_AES_4 : reg = REG_STATUS_AES_4; break; | |
304 | default : return -EINVAL; | |
305 | } | |
306 | pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); | |
307 | rmh.cmd_len = 2; | |
308 | rmh.cmd[0] |= IO_NUM_REG_STATUS; | |
309 | if (mgr->last_reg_stat != reg) { | |
310 | rmh.cmd[1] = reg; | |
311 | err = pcxhr_send_msg(mgr, &rmh); | |
312 | if (err) | |
313 | return err; | |
314 | udelay(100); /* wait minimum 2 sample_frames at 32kHz ! */ | |
315 | mgr->last_reg_stat = reg; | |
316 | } | |
317 | rmh.cmd[1] = REG_STATUS_CURRENT; | |
318 | err = pcxhr_send_msg(mgr, &rmh); | |
319 | if (err) | |
320 | return err; | |
321 | switch (rmh.stat[1] & 0x0f) { | |
322 | case REG_STATUS_SYNC_32000 : rate = 32000; break; | |
323 | case REG_STATUS_SYNC_44100 : rate = 44100; break; | |
324 | case REG_STATUS_SYNC_48000 : rate = 48000; break; | |
325 | case REG_STATUS_SYNC_64000 : rate = 64000; break; | |
326 | case REG_STATUS_SYNC_88200 : rate = 88200; break; | |
327 | case REG_STATUS_SYNC_96000 : rate = 96000; break; | |
328 | case REG_STATUS_SYNC_128000 : rate = 128000; break; | |
329 | case REG_STATUS_SYNC_176400 : rate = 176400; break; | |
330 | case REG_STATUS_SYNC_192000 : rate = 192000; break; | |
331 | default: rate = 0; | |
332 | } | |
333 | snd_printdd("External clock is at %d Hz\n", rate); | |
334 | *sample_rate = rate; | |
335 | return 0; | |
336 | } | |
337 | ||
338 | ||
339 | /* | |
340 | * start or stop playback/capture substream | |
341 | */ | |
342 | static int pcxhr_set_stream_state(struct pcxhr_stream *stream) | |
343 | { | |
344 | int err; | |
345 | struct snd_pcxhr *chip; | |
346 | struct pcxhr_rmh rmh; | |
347 | int stream_mask, start; | |
348 | ||
349 | if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) | |
350 | start = 1; | |
351 | else { | |
352 | if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) { | |
353 | snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n"); | |
354 | return -EINVAL; | |
355 | } | |
356 | start = 0; | |
357 | } | |
358 | if (!stream->substream) | |
359 | return -EINVAL; | |
360 | ||
361 | stream->timer_abs_periods = 0; | |
362 | stream->timer_period_frag = 0; /* reset theoretical stream pos */ | |
363 | stream->timer_buf_periods = 0; | |
364 | stream->timer_is_synced = 0; | |
365 | ||
366 | stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number; | |
367 | ||
368 | pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM); | |
369 | pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, | |
370 | stream->pipe->first_audio, 0, stream_mask); | |
371 | ||
372 | chip = snd_pcm_substream_chip(stream->substream); | |
373 | ||
374 | err = pcxhr_send_msg(chip->mgr, &rmh); | |
375 | if (err) | |
376 | snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err); | |
377 | stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED; | |
378 | return err; | |
379 | } | |
380 | ||
381 | #define HEADER_FMT_BASE_LIN 0xfed00000 | |
382 | #define HEADER_FMT_BASE_FLOAT 0xfad00000 | |
383 | #define HEADER_FMT_INTEL 0x00008000 | |
384 | #define HEADER_FMT_24BITS 0x00004000 | |
385 | #define HEADER_FMT_16BITS 0x00002000 | |
386 | #define HEADER_FMT_UPTO11 0x00000200 | |
387 | #define HEADER_FMT_UPTO32 0x00000100 | |
388 | #define HEADER_FMT_MONO 0x00000080 | |
389 | ||
390 | static int pcxhr_set_format(struct pcxhr_stream *stream) | |
391 | { | |
392 | int err, is_capture, sample_rate, stream_num; | |
393 | struct snd_pcxhr *chip; | |
394 | struct pcxhr_rmh rmh; | |
395 | unsigned int header; | |
396 | ||
397 | switch (stream->format) { | |
398 | case SNDRV_PCM_FORMAT_U8: | |
399 | header = HEADER_FMT_BASE_LIN; | |
400 | break; | |
401 | case SNDRV_PCM_FORMAT_S16_LE: | |
402 | header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL; | |
403 | break; | |
404 | case SNDRV_PCM_FORMAT_S16_BE: | |
405 | header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS; | |
406 | break; | |
407 | case SNDRV_PCM_FORMAT_S24_3LE: | |
408 | header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL; | |
409 | break; | |
410 | case SNDRV_PCM_FORMAT_S24_3BE: | |
411 | header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS; | |
412 | break; | |
413 | case SNDRV_PCM_FORMAT_FLOAT_LE: | |
414 | header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL; | |
415 | break; | |
416 | default: | |
417 | snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n"); | |
418 | return -EINVAL; | |
419 | } | |
420 | chip = snd_pcm_substream_chip(stream->substream); | |
421 | ||
422 | sample_rate = chip->mgr->sample_rate; | |
423 | if (sample_rate <= 32000 && sample_rate !=0) { | |
424 | if (sample_rate <= 11025) | |
425 | header |= HEADER_FMT_UPTO11; | |
426 | else | |
427 | header |= HEADER_FMT_UPTO32; | |
428 | } | |
429 | if (stream->channels == 1) | |
430 | header |= HEADER_FMT_MONO; | |
431 | ||
432 | is_capture = stream->pipe->is_capture; | |
433 | stream_num = is_capture ? 0 : stream->substream->number; | |
434 | ||
435 | pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT); | |
436 | pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0); | |
437 | if (is_capture) | |
438 | rmh.cmd[0] |= 1<<12; | |
439 | rmh.cmd[1] = 0; | |
440 | rmh.cmd[2] = header >> 8; | |
441 | rmh.cmd[3] = (header & 0xff) << 16; | |
442 | rmh.cmd_len = 4; | |
443 | err = pcxhr_send_msg(chip->mgr, &rmh); | |
444 | if (err) | |
445 | snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err); | |
446 | return err; | |
447 | } | |
448 | ||
449 | static int pcxhr_update_r_buffer(struct pcxhr_stream *stream) | |
450 | { | |
451 | int err, is_capture, stream_num; | |
452 | struct pcxhr_rmh rmh; | |
453 | struct snd_pcm_substream *subs = stream->substream; | |
454 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
455 | ||
456 | is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE); | |
457 | stream_num = is_capture ? 0 : subs->number; | |
458 | ||
20cd2262 | 459 | snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n", |
e12229b4 MB |
460 | is_capture ? 'c' : 'p', |
461 | chip->chip_idx, (void*)subs->runtime->dma_addr, | |
462 | subs->runtime->dma_bytes, subs->number); | |
463 | ||
464 | pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS); | |
465 | pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0); | |
466 | ||
467 | snd_assert(subs->runtime->dma_bytes < 0x200000); /* max buffer size is 2 MByte */ | |
468 | rmh.cmd[1] = subs->runtime->dma_bytes * 8; /* size in bits */ | |
469 | rmh.cmd[2] = subs->runtime->dma_addr >> 24; /* most significant byte */ | |
470 | rmh.cmd[2] |= 1<<19; /* this is a circular buffer */ | |
471 | rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD; /* least 3 significant bytes */ | |
472 | rmh.cmd_len = 4; | |
473 | err = pcxhr_send_msg(chip->mgr, &rmh); | |
474 | if (err) | |
475 | snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err); | |
476 | return err; | |
477 | } | |
478 | ||
479 | ||
480 | #if 0 | |
481 | static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count) | |
482 | { | |
483 | struct pcxhr_rmh rmh; | |
484 | int err; | |
485 | pcxhr_t *chip = snd_pcm_substream_chip(stream->substream); | |
486 | pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT); | |
487 | pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0, | |
488 | 1<<stream->pipe->first_audio); | |
489 | err = pcxhr_send_msg(chip->mgr, &rmh); | |
490 | if (err == 0) { | |
491 | *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24; | |
492 | *sample_count += (snd_pcm_uframes_t)rmh.stat[1]; | |
493 | } | |
494 | snd_printdd("PIPE_SAMPLE_COUNT = %lx\n", *sample_count); | |
495 | return err; | |
496 | } | |
497 | #endif | |
498 | ||
499 | static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream, | |
500 | struct pcxhr_pipe **pipe) | |
501 | { | |
502 | if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) { | |
503 | *pipe = stream->pipe; | |
504 | return 1; | |
505 | } | |
506 | return 0; | |
507 | } | |
508 | ||
509 | static void pcxhr_trigger_tasklet(unsigned long arg) | |
510 | { | |
511 | unsigned long flags; | |
512 | int i, j, err; | |
513 | struct pcxhr_pipe *pipe; | |
514 | struct snd_pcxhr *chip; | |
515 | struct pcxhr_mgr *mgr = (struct pcxhr_mgr*)(arg); | |
516 | int capture_mask = 0; | |
517 | int playback_mask = 0; | |
518 | ||
519 | #ifdef CONFIG_SND_DEBUG_DETECT | |
520 | struct timeval my_tv1, my_tv2; | |
521 | do_gettimeofday(&my_tv1); | |
522 | #endif | |
62932df8 | 523 | mutex_lock(&mgr->setup_mutex); |
e12229b4 MB |
524 | |
525 | /* check the pipes concerned and build pipe_array */ | |
526 | for (i = 0; i < mgr->num_cards; i++) { | |
527 | chip = mgr->chip[i]; | |
528 | for (j = 0; j < chip->nb_streams_capt; j++) { | |
529 | if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe)) | |
530 | capture_mask |= (1 << pipe->first_audio); | |
531 | } | |
532 | for (j = 0; j < chip->nb_streams_play; j++) { | |
533 | if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) { | |
534 | playback_mask |= (1 << pipe->first_audio); | |
535 | break; /* add only once, as all playback streams of | |
536 | * one chip use the same pipe | |
537 | */ | |
538 | } | |
539 | } | |
540 | } | |
541 | if (capture_mask == 0 && playback_mask == 0) { | |
62932df8 | 542 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
543 | snd_printk(KERN_ERR "pcxhr_trigger_tasklet : no pipes\n"); |
544 | return; | |
545 | } | |
546 | ||
547 | snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n", | |
548 | playback_mask, capture_mask); | |
549 | ||
550 | /* synchronous stop of all the pipes concerned */ | |
551 | err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); | |
552 | if (err) { | |
62932df8 | 553 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
554 | snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n", |
555 | playback_mask, capture_mask); | |
556 | return; | |
557 | } | |
558 | ||
559 | /* unfortunately the dsp lost format and buffer info with the stop pipe */ | |
560 | for (i = 0; i < mgr->num_cards; i++) { | |
561 | struct pcxhr_stream *stream; | |
562 | chip = mgr->chip[i]; | |
563 | for (j = 0; j < chip->nb_streams_capt; j++) { | |
564 | stream = &chip->capture_stream[j]; | |
565 | if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { | |
566 | err = pcxhr_set_format(stream); | |
567 | err = pcxhr_update_r_buffer(stream); | |
568 | } | |
569 | } | |
570 | for (j = 0; j < chip->nb_streams_play; j++) { | |
571 | stream = &chip->playback_stream[j]; | |
572 | if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { | |
573 | err = pcxhr_set_format(stream); | |
574 | err = pcxhr_update_r_buffer(stream); | |
575 | } | |
576 | } | |
577 | } | |
578 | /* start all the streams */ | |
579 | for (i = 0; i < mgr->num_cards; i++) { | |
580 | struct pcxhr_stream *stream; | |
581 | chip = mgr->chip[i]; | |
582 | for (j = 0; j < chip->nb_streams_capt; j++) { | |
583 | stream = &chip->capture_stream[j]; | |
584 | if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) | |
585 | err = pcxhr_set_stream_state(stream); | |
586 | } | |
587 | for (j = 0; j < chip->nb_streams_play; j++) { | |
588 | stream = &chip->playback_stream[j]; | |
589 | if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) | |
590 | err = pcxhr_set_stream_state(stream); | |
591 | } | |
592 | } | |
593 | ||
594 | /* synchronous start of all the pipes concerned */ | |
595 | err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); | |
596 | if (err) { | |
62932df8 | 597 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
598 | snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n", |
599 | playback_mask, capture_mask); | |
600 | return; | |
601 | } | |
602 | ||
603 | /* put the streams into the running state now (increment pointer by interrupt) */ | |
604 | spin_lock_irqsave(&mgr->lock, flags); | |
605 | for ( i =0; i < mgr->num_cards; i++) { | |
606 | struct pcxhr_stream *stream; | |
607 | chip = mgr->chip[i]; | |
608 | for(j = 0; j < chip->nb_streams_capt; j++) { | |
609 | stream = &chip->capture_stream[j]; | |
610 | if(stream->status == PCXHR_STREAM_STATUS_STARTED) | |
611 | stream->status = PCXHR_STREAM_STATUS_RUNNING; | |
612 | } | |
613 | for (j = 0; j < chip->nb_streams_play; j++) { | |
614 | stream = &chip->playback_stream[j]; | |
615 | if (stream->status == PCXHR_STREAM_STATUS_STARTED) { | |
616 | /* playback will already have advanced ! */ | |
617 | stream->timer_period_frag += PCXHR_GRANULARITY; | |
618 | stream->status = PCXHR_STREAM_STATUS_RUNNING; | |
619 | } | |
620 | } | |
621 | } | |
622 | spin_unlock_irqrestore(&mgr->lock, flags); | |
623 | ||
62932df8 | 624 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
625 | |
626 | #ifdef CONFIG_SND_DEBUG_DETECT | |
627 | do_gettimeofday(&my_tv2); | |
628 | snd_printdd("***TRIGGER TASKLET*** TIME = %ld (err = %x)\n", | |
629 | my_tv2.tv_usec - my_tv1.tv_usec, err); | |
630 | #endif | |
631 | } | |
632 | ||
633 | ||
634 | /* | |
635 | * trigger callback | |
636 | */ | |
637 | static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd) | |
638 | { | |
639 | struct pcxhr_stream *stream; | |
640 | struct list_head *pos; | |
641 | struct snd_pcm_substream *s; | |
642 | int i; | |
643 | ||
644 | switch (cmd) { | |
645 | case SNDRV_PCM_TRIGGER_START: | |
646 | snd_printdd("SNDRV_PCM_TRIGGER_START\n"); | |
647 | i = 0; | |
648 | snd_pcm_group_for_each(pos, subs) { | |
649 | s = snd_pcm_group_substream_entry(pos); | |
650 | stream = s->runtime->private_data; | |
651 | stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN; | |
652 | snd_pcm_trigger_done(s, subs); | |
653 | i++; | |
654 | } | |
655 | if (i==1) { | |
656 | snd_printdd("Only one Substream %c %d\n", | |
657 | stream->pipe->is_capture ? 'C' : 'P', | |
658 | stream->pipe->first_audio); | |
659 | if (pcxhr_set_format(stream)) | |
660 | return -EINVAL; | |
661 | if (pcxhr_update_r_buffer(stream)) | |
662 | return -EINVAL; | |
663 | ||
664 | if (pcxhr_set_stream_state(stream)) | |
665 | return -EINVAL; | |
666 | stream->status = PCXHR_STREAM_STATUS_RUNNING; | |
667 | } else { | |
668 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
669 | tasklet_hi_schedule(&chip->mgr->trigger_taskq); | |
670 | } | |
671 | break; | |
672 | case SNDRV_PCM_TRIGGER_STOP: | |
673 | snd_printdd("SNDRV_PCM_TRIGGER_STOP\n"); | |
674 | snd_pcm_group_for_each(pos, subs) { | |
675 | s = snd_pcm_group_substream_entry(pos); | |
676 | stream = s->runtime->private_data; | |
677 | stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP; | |
678 | if (pcxhr_set_stream_state(stream)) | |
679 | return -EINVAL; | |
680 | snd_pcm_trigger_done(s, subs); | |
681 | } | |
682 | break; | |
683 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
684 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
685 | /* TODO */ | |
686 | default: | |
687 | return -EINVAL; | |
688 | } | |
689 | return 0; | |
690 | } | |
691 | ||
692 | ||
693 | static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start) | |
694 | { | |
695 | struct pcxhr_rmh rmh; | |
696 | int err; | |
697 | ||
698 | pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT); | |
699 | if (start) { | |
700 | mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; /* last dsp time invalid */ | |
701 | rmh.cmd[0] |= PCXHR_GRANULARITY; | |
702 | } | |
703 | err = pcxhr_send_msg(mgr, &rmh); | |
704 | if (err < 0) | |
705 | snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err); | |
706 | return err; | |
707 | } | |
708 | ||
709 | /* | |
710 | * prepare callback for all pcms | |
711 | */ | |
712 | static int pcxhr_prepare(struct snd_pcm_substream *subs) | |
713 | { | |
714 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
715 | struct pcxhr_mgr *mgr = chip->mgr; | |
716 | /* | |
717 | struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data; | |
718 | */ | |
719 | int err = 0; | |
720 | ||
721 | snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n", | |
722 | subs->runtime->period_size, subs->runtime->periods, | |
723 | subs->runtime->buffer_size); | |
724 | ||
725 | /* | |
726 | if(subs->runtime->period_size <= PCXHR_GRANULARITY) { | |
727 | snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n", | |
728 | (unsigned int)subs->runtime->period_size); | |
729 | return -EINVAL; | |
730 | } | |
731 | */ | |
732 | ||
62932df8 | 733 | mutex_lock(&mgr->setup_mutex); |
e12229b4 MB |
734 | |
735 | do { | |
736 | /* if the stream was stopped before, format and buffer were reset */ | |
737 | /* | |
738 | if(stream->status == PCXHR_STREAM_STATUS_STOPPED) { | |
739 | err = pcxhr_set_format(stream); | |
740 | if(err) break; | |
741 | err = pcxhr_update_r_buffer(stream); | |
742 | if(err) break; | |
743 | } | |
744 | */ | |
745 | ||
746 | /* only the first stream can choose the sample rate */ | |
747 | /* the further opened streams will be limited to its frequency (see open) */ | |
748 | /* set the clock only once (first stream) */ | |
8937fd88 | 749 | if (mgr->sample_rate != subs->runtime->rate) { |
e12229b4 MB |
750 | err = pcxhr_set_clock(mgr, subs->runtime->rate); |
751 | if (err) | |
752 | break; | |
8937fd88 TI |
753 | if (mgr->sample_rate == 0) |
754 | /* start the DSP-timer */ | |
755 | err = pcxhr_hardware_timer(mgr, 1); | |
e12229b4 | 756 | mgr->sample_rate = subs->runtime->rate; |
e12229b4 MB |
757 | } |
758 | } while(0); /* do only once (so we can use break instead of goto) */ | |
759 | ||
62932df8 | 760 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
761 | |
762 | return err; | |
763 | } | |
764 | ||
765 | ||
766 | /* | |
767 | * HW_PARAMS callback for all pcms | |
768 | */ | |
769 | static int pcxhr_hw_params(struct snd_pcm_substream *subs, | |
770 | struct snd_pcm_hw_params *hw) | |
771 | { | |
772 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
773 | struct pcxhr_mgr *mgr = chip->mgr; | |
774 | struct pcxhr_stream *stream = subs->runtime->private_data; | |
775 | snd_pcm_format_t format; | |
776 | int err; | |
777 | int channels; | |
778 | ||
779 | /* set up channels */ | |
780 | channels = params_channels(hw); | |
781 | ||
782 | /* set up format for the stream */ | |
783 | format = params_format(hw); | |
784 | ||
62932df8 | 785 | mutex_lock(&mgr->setup_mutex); |
e12229b4 MB |
786 | |
787 | stream->channels = channels; | |
788 | stream->format = format; | |
789 | ||
790 | /* set the format to the board */ | |
791 | /* | |
792 | err = pcxhr_set_format(stream); | |
793 | if(err) { | |
62932df8 | 794 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
795 | return err; |
796 | } | |
797 | */ | |
798 | /* allocate buffer */ | |
799 | err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw)); | |
800 | ||
801 | /* | |
802 | if (err > 0) { | |
803 | err = pcxhr_update_r_buffer(stream); | |
804 | } | |
805 | */ | |
62932df8 | 806 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
807 | |
808 | return err; | |
809 | } | |
810 | ||
811 | static int pcxhr_hw_free(struct snd_pcm_substream *subs) | |
812 | { | |
813 | snd_pcm_lib_free_pages(subs); | |
814 | return 0; | |
815 | } | |
816 | ||
817 | ||
818 | /* | |
819 | * CONFIGURATION SPACE for all pcms, mono pcm must update channels_max | |
820 | */ | |
821 | static struct snd_pcm_hardware pcxhr_caps = | |
822 | { | |
823 | .info = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
824 | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START | | |
825 | 0 /*SNDRV_PCM_INFO_PAUSE*/), | |
826 | .formats = ( SNDRV_PCM_FMTBIT_U8 | | |
827 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | | |
828 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | | |
829 | SNDRV_PCM_FMTBIT_FLOAT_LE ), | |
830 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000, | |
831 | .rate_min = 8000, | |
832 | .rate_max = 192000, | |
833 | .channels_min = 1, | |
834 | .channels_max = 2, | |
835 | .buffer_bytes_max = (32*1024), | |
836 | /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */ | |
837 | .period_bytes_min = (2*PCXHR_GRANULARITY), | |
838 | .period_bytes_max = (16*1024), | |
839 | .periods_min = 2, | |
840 | .periods_max = (32*1024/PCXHR_GRANULARITY), | |
841 | }; | |
842 | ||
843 | ||
844 | static int pcxhr_open(struct snd_pcm_substream *subs) | |
845 | { | |
846 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
847 | struct pcxhr_mgr *mgr = chip->mgr; | |
848 | struct snd_pcm_runtime *runtime = subs->runtime; | |
849 | struct pcxhr_stream *stream; | |
850 | int is_capture; | |
851 | ||
62932df8 | 852 | mutex_lock(&mgr->setup_mutex); |
e12229b4 MB |
853 | |
854 | /* copy the struct snd_pcm_hardware struct */ | |
855 | runtime->hw = pcxhr_caps; | |
856 | ||
857 | if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) { | |
858 | snd_printdd("pcxhr_open playback chip%d subs%d\n", | |
859 | chip->chip_idx, subs->number); | |
860 | is_capture = 0; | |
861 | stream = &chip->playback_stream[subs->number]; | |
862 | } else { | |
863 | snd_printdd("pcxhr_open capture chip%d subs%d\n", | |
864 | chip->chip_idx, subs->number); | |
865 | is_capture = 1; | |
866 | if (mgr->mono_capture) | |
867 | runtime->hw.channels_max = 1; | |
868 | else | |
869 | runtime->hw.channels_min = 2; | |
870 | stream = &chip->capture_stream[subs->number]; | |
871 | } | |
872 | if (stream->status != PCXHR_STREAM_STATUS_FREE){ | |
873 | /* streams in use */ | |
874 | snd_printk(KERN_ERR "pcxhr_open chip%d subs%d in use\n", | |
875 | chip->chip_idx, subs->number); | |
62932df8 | 876 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
877 | return -EBUSY; |
878 | } | |
879 | ||
880 | /* if a sample rate is already used or fixed by external clock, | |
881 | * the stream cannot change | |
882 | */ | |
883 | if (mgr->sample_rate) | |
884 | runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; | |
885 | else { | |
886 | if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) { | |
887 | int external_rate; | |
888 | if (pcxhr_get_external_clock(mgr, mgr->use_clock_type, | |
889 | &external_rate) || | |
890 | external_rate == 0) { | |
891 | /* cannot detect the external clock rate */ | |
62932df8 | 892 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
893 | return -EBUSY; |
894 | } | |
895 | runtime->hw.rate_min = runtime->hw.rate_max = external_rate; | |
896 | } | |
897 | } | |
898 | ||
899 | stream->status = PCXHR_STREAM_STATUS_OPEN; | |
900 | stream->substream = subs; | |
901 | stream->channels = 0; /* not configured yet */ | |
902 | ||
903 | runtime->private_data = stream; | |
904 | ||
905 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4); | |
906 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); | |
907 | ||
908 | mgr->ref_count_rate++; | |
909 | ||
62932df8 | 910 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
911 | return 0; |
912 | } | |
913 | ||
914 | ||
915 | static int pcxhr_close(struct snd_pcm_substream *subs) | |
916 | { | |
917 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
918 | struct pcxhr_mgr *mgr = chip->mgr; | |
919 | struct pcxhr_stream *stream = subs->runtime->private_data; | |
920 | ||
62932df8 | 921 | mutex_lock(&mgr->setup_mutex); |
e12229b4 MB |
922 | |
923 | snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number); | |
924 | ||
925 | /* sample rate released */ | |
926 | if (--mgr->ref_count_rate == 0) { | |
927 | mgr->sample_rate = 0; /* the sample rate is no more locked */ | |
928 | pcxhr_hardware_timer(mgr, 0); /* stop the DSP-timer */ | |
929 | } | |
930 | ||
931 | stream->status = PCXHR_STREAM_STATUS_FREE; | |
932 | stream->substream = NULL; | |
933 | ||
62932df8 | 934 | mutex_unlock(&mgr->setup_mutex); |
e12229b4 MB |
935 | |
936 | return 0; | |
937 | } | |
938 | ||
939 | ||
940 | static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs) | |
941 | { | |
942 | unsigned long flags; | |
943 | u_int32_t timer_period_frag; | |
944 | int timer_buf_periods; | |
945 | struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); | |
946 | struct snd_pcm_runtime *runtime = subs->runtime; | |
947 | struct pcxhr_stream *stream = runtime->private_data; | |
948 | ||
949 | spin_lock_irqsave(&chip->mgr->lock, flags); | |
950 | ||
951 | /* get the period fragment and the nb of periods in the buffer */ | |
952 | timer_period_frag = stream->timer_period_frag; | |
953 | timer_buf_periods = stream->timer_buf_periods; | |
954 | ||
955 | spin_unlock_irqrestore(&chip->mgr->lock, flags); | |
956 | ||
957 | return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) + | |
958 | timer_period_frag); | |
959 | } | |
960 | ||
961 | ||
962 | static struct snd_pcm_ops pcxhr_ops = { | |
963 | .open = pcxhr_open, | |
964 | .close = pcxhr_close, | |
965 | .ioctl = snd_pcm_lib_ioctl, | |
966 | .prepare = pcxhr_prepare, | |
967 | .hw_params = pcxhr_hw_params, | |
968 | .hw_free = pcxhr_hw_free, | |
969 | .trigger = pcxhr_trigger, | |
970 | .pointer = pcxhr_stream_pointer, | |
971 | }; | |
972 | ||
973 | /* | |
974 | */ | |
975 | int pcxhr_create_pcm(struct snd_pcxhr *chip) | |
976 | { | |
977 | int err; | |
978 | struct snd_pcm *pcm; | |
979 | char name[32]; | |
980 | ||
981 | sprintf(name, "pcxhr %d", chip->chip_idx); | |
982 | if ((err = snd_pcm_new(chip->card, name, 0, | |
983 | chip->nb_streams_play, | |
984 | chip->nb_streams_capt, &pcm)) < 0) { | |
985 | snd_printk(KERN_ERR "cannot create pcm %s\n", name); | |
986 | return err; | |
987 | } | |
988 | pcm->private_data = chip; | |
989 | ||
990 | if (chip->nb_streams_play) | |
991 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops); | |
992 | if (chip->nb_streams_capt) | |
993 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops); | |
994 | ||
995 | pcm->info_flags = 0; | |
996 | strcpy(pcm->name, name); | |
997 | ||
998 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
999 | snd_dma_pci_data(chip->mgr->pci), | |
1000 | 32*1024, 32*1024); | |
1001 | chip->pcm = pcm; | |
1002 | return 0; | |
1003 | } | |
1004 | ||
1005 | static int pcxhr_chip_free(struct snd_pcxhr *chip) | |
1006 | { | |
1007 | kfree(chip); | |
1008 | return 0; | |
1009 | } | |
1010 | ||
1011 | static int pcxhr_chip_dev_free(struct snd_device *device) | |
1012 | { | |
1013 | struct snd_pcxhr *chip = device->device_data; | |
1014 | return pcxhr_chip_free(chip); | |
1015 | } | |
1016 | ||
1017 | ||
1018 | /* | |
1019 | */ | |
1020 | static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx) | |
1021 | { | |
1022 | int err; | |
1023 | struct snd_pcxhr *chip; | |
1024 | static struct snd_device_ops ops = { | |
1025 | .dev_free = pcxhr_chip_dev_free, | |
1026 | }; | |
1027 | ||
1028 | mgr->chip[idx] = chip = kzalloc(sizeof(*chip), GFP_KERNEL); | |
1029 | if (! chip) { | |
1030 | snd_printk(KERN_ERR "cannot allocate chip\n"); | |
1031 | return -ENOMEM; | |
1032 | } | |
1033 | ||
1034 | chip->card = card; | |
1035 | chip->chip_idx = idx; | |
1036 | chip->mgr = mgr; | |
1037 | ||
1038 | if (idx < mgr->playback_chips) | |
1039 | /* stereo or mono streams */ | |
1040 | chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS; | |
1041 | ||
1042 | if (idx < mgr->capture_chips) { | |
1043 | if (mgr->mono_capture) | |
1044 | chip->nb_streams_capt = 2; /* 2 mono streams (left+right) */ | |
1045 | else | |
1046 | chip->nb_streams_capt = 1; /* or 1 stereo stream */ | |
1047 | } | |
1048 | ||
1049 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1050 | pcxhr_chip_free(chip); | |
1051 | return err; | |
1052 | } | |
1053 | ||
1054 | snd_card_set_dev(card, &mgr->pci->dev); | |
1055 | ||
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | /* proc interface */ | |
1060 | static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer) | |
1061 | { | |
1062 | struct snd_pcxhr *chip = entry->private_data; | |
1063 | struct pcxhr_mgr *mgr = chip->mgr; | |
1064 | ||
1065 | snd_iprintf(buffer, "\n%s\n", mgr->longname); | |
1066 | ||
1067 | /* stats available when embedded DSP is running */ | |
1068 | if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { | |
1069 | struct pcxhr_rmh rmh; | |
1070 | short ver_maj = (mgr->dsp_version >> 16) & 0xff; | |
1071 | short ver_min = (mgr->dsp_version >> 8) & 0xff; | |
1072 | short ver_build = mgr->dsp_version & 0xff; | |
1073 | snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING); | |
1074 | snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build); | |
1075 | if (mgr->board_has_analog) | |
1076 | snd_iprintf(buffer, "analog io available\n"); | |
1077 | else | |
1078 | snd_iprintf(buffer, "digital only board\n"); | |
1079 | ||
1080 | /* calc cpu load of the dsp */ | |
1081 | pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES); | |
1082 | if( ! pcxhr_send_msg(mgr, &rmh) ) { | |
1083 | int cur = rmh.stat[0]; | |
1084 | int ref = rmh.stat[1]; | |
1085 | if (ref > 0) { | |
1086 | if (mgr->sample_rate_real != 0 && | |
1087 | mgr->sample_rate_real != 48000) { | |
1088 | ref = (ref * 48000) / mgr->sample_rate_real; | |
1089 | if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ) | |
1090 | ref *= 2; | |
1091 | } | |
1092 | cur = 100 - (100 * cur) / ref; | |
1093 | snd_iprintf(buffer, "cpu load %d%%\n", cur); | |
1094 | snd_iprintf(buffer, "buffer pool %d/%d kWords\n", | |
1095 | rmh.stat[2], rmh.stat[3]); | |
1096 | } | |
1097 | } | |
1098 | snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY); | |
1099 | snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err); | |
1100 | snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n", | |
1101 | mgr->async_err_pipe_xrun); | |
1102 | snd_iprintf(buffer, "dsp async stream xrun errors : %d\n", | |
1103 | mgr->async_err_stream_xrun); | |
1104 | snd_iprintf(buffer, "dsp async last other error : %x\n", | |
1105 | mgr->async_err_other_last); | |
1106 | /* debug zone dsp */ | |
1107 | rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS; | |
1108 | rmh.cmd_len = 1; | |
1109 | rmh.stat_len = PCXHR_SIZE_MAX_STATUS; | |
1110 | rmh.dsp_stat = 0; | |
1111 | rmh.cmd_idx = CMD_LAST_INDEX; | |
1112 | if( ! pcxhr_send_msg(mgr, &rmh) ) { | |
1113 | int i; | |
1114 | for (i = 0; i < rmh.stat_len; i++) | |
1115 | snd_iprintf(buffer, "debug[%02d] = %06x\n", i, rmh.stat[i]); | |
1116 | } | |
1117 | } else | |
1118 | snd_iprintf(buffer, "no firmware loaded\n"); | |
1119 | snd_iprintf(buffer, "\n"); | |
1120 | } | |
1121 | static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer) | |
1122 | { | |
1123 | struct snd_pcxhr *chip = entry->private_data; | |
1124 | struct pcxhr_mgr *mgr = chip->mgr; | |
1125 | static char *texts[7] = { | |
1126 | "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4" | |
1127 | }; | |
1128 | ||
1129 | snd_iprintf(buffer, "\n%s\n", mgr->longname); | |
1130 | snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]); | |
1131 | snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real); | |
1132 | ||
1133 | /* commands available when embedded DSP is running */ | |
1134 | if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { | |
1135 | int i, err, sample_rate; | |
1136 | for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) { | |
1137 | err = pcxhr_get_external_clock(mgr, i, &sample_rate); | |
1138 | if (err) | |
1139 | break; | |
1140 | snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate); | |
1141 | } | |
1142 | } else | |
1143 | snd_iprintf(buffer, "no firmware loaded\n"); | |
1144 | snd_iprintf(buffer, "\n"); | |
1145 | } | |
1146 | ||
1147 | static void __devinit pcxhr_proc_init(struct snd_pcxhr *chip) | |
1148 | { | |
1149 | struct snd_info_entry *entry; | |
1150 | ||
1151 | if (! snd_card_proc_new(chip->card, "info", &entry)) | |
1152 | snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_info); | |
1153 | if (! snd_card_proc_new(chip->card, "sync", &entry)) | |
1154 | snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_sync); | |
1155 | } | |
1156 | /* end of proc interface */ | |
1157 | ||
1158 | /* | |
1159 | * release all the cards assigned to a manager instance | |
1160 | */ | |
1161 | static int pcxhr_free(struct pcxhr_mgr *mgr) | |
1162 | { | |
1163 | unsigned int i; | |
1164 | ||
1165 | for (i = 0; i < mgr->num_cards; i++) { | |
1166 | if (mgr->chip[i]) | |
1167 | snd_card_free(mgr->chip[i]->card); | |
1168 | } | |
1169 | ||
1170 | /* reset board if some firmware was loaded */ | |
1171 | if(mgr->dsp_loaded) { | |
1172 | pcxhr_reset_board(mgr); | |
1173 | snd_printdd("reset pcxhr !\n"); | |
1174 | } | |
1175 | ||
1176 | /* release irq */ | |
1177 | if (mgr->irq >= 0) | |
1178 | free_irq(mgr->irq, mgr); | |
1179 | ||
1180 | pci_release_regions(mgr->pci); | |
1181 | ||
1182 | /* free hostport purgebuffer */ | |
1183 | if (mgr->hostport.area) { | |
1184 | snd_dma_free_pages(&mgr->hostport); | |
1185 | mgr->hostport.area = NULL; | |
1186 | } | |
1187 | ||
1188 | kfree(mgr->prmh); | |
1189 | ||
1190 | pci_disable_device(mgr->pci); | |
1191 | kfree(mgr); | |
1192 | return 0; | |
1193 | } | |
1194 | ||
1195 | /* | |
1196 | * probe function - creates the card manager | |
1197 | */ | |
1198 | static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) | |
1199 | { | |
1200 | static int dev; | |
1201 | struct pcxhr_mgr *mgr; | |
1202 | unsigned int i; | |
1203 | int err; | |
1204 | size_t size; | |
1205 | char *card_name; | |
1206 | ||
1207 | if (dev >= SNDRV_CARDS) | |
1208 | return -ENODEV; | |
1209 | if (! enable[dev]) { | |
1210 | dev++; | |
1211 | return -ENOENT; | |
1212 | } | |
1213 | ||
1214 | /* enable PCI device */ | |
1215 | if ((err = pci_enable_device(pci)) < 0) | |
1216 | return err; | |
1217 | pci_set_master(pci); | |
1218 | ||
1219 | /* check if we can restrict PCI DMA transfers to 32 bits */ | |
1220 | if (pci_set_dma_mask(pci, 0xffffffff) < 0) { | |
1221 | snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n"); | |
1222 | pci_disable_device(pci); | |
1223 | return -ENXIO; | |
1224 | } | |
1225 | ||
1226 | /* alloc card manager */ | |
1227 | mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); | |
1228 | if (! mgr) { | |
1229 | pci_disable_device(pci); | |
1230 | return -ENOMEM; | |
1231 | } | |
1232 | ||
1233 | snd_assert(pci_id->driver_data < PCI_ID_LAST, return -ENODEV); | |
1234 | card_name = pcxhr_board_params[pci_id->driver_data].board_name; | |
1235 | mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips; | |
1236 | mgr->capture_chips = pcxhr_board_params[pci_id->driver_data].capture_chips; | |
1237 | mgr->firmware_num = pcxhr_board_params[pci_id->driver_data].firmware_num; | |
1238 | mgr->mono_capture = mono[dev]; | |
1239 | ||
1240 | /* resource assignment */ | |
1241 | if ((err = pci_request_regions(pci, card_name)) < 0) { | |
1242 | kfree(mgr); | |
1243 | pci_disable_device(pci); | |
1244 | return err; | |
1245 | } | |
1246 | for (i = 0; i < 3; i++) | |
1247 | mgr->port[i] = pci_resource_start(pci, i); | |
1248 | ||
1249 | mgr->pci = pci; | |
1250 | mgr->irq = -1; | |
1251 | ||
1252 | if (request_irq(pci->irq, pcxhr_interrupt, SA_INTERRUPT|SA_SHIRQ, | |
1253 | card_name, mgr)) { | |
1254 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); | |
1255 | pcxhr_free(mgr); | |
1256 | return -EBUSY; | |
1257 | } | |
1258 | mgr->irq = pci->irq; | |
1259 | ||
1260 | sprintf(mgr->shortname, "Digigram %s", card_name); | |
1261 | sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname, | |
1262 | mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq); | |
1263 | ||
1264 | /* ISR spinlock */ | |
1265 | spin_lock_init(&mgr->lock); | |
1266 | spin_lock_init(&mgr->msg_lock); | |
1267 | ||
1268 | /* init setup mutex*/ | |
62932df8 | 1269 | mutex_init(&mgr->setup_mutex); |
e12229b4 MB |
1270 | |
1271 | /* init taslket */ | |
1272 | tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr); | |
1273 | tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr); | |
1274 | mgr->prmh = kmalloc(sizeof(*mgr->prmh) + | |
1275 | sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS), | |
1276 | GFP_KERNEL); | |
1277 | if (! mgr->prmh) { | |
1278 | pcxhr_free(mgr); | |
1279 | return -ENOMEM; | |
1280 | } | |
1281 | ||
1282 | for (i=0; i < PCXHR_MAX_CARDS; i++) { | |
1283 | struct snd_card *card; | |
1284 | char tmpid[16]; | |
1285 | int idx; | |
1286 | ||
1287 | if (i >= max(mgr->playback_chips, mgr->capture_chips)) | |
1288 | break; | |
1289 | mgr->num_cards++; | |
1290 | ||
1291 | if (index[dev] < 0) | |
1292 | idx = index[dev]; | |
1293 | else | |
1294 | idx = index[dev] + i; | |
1295 | ||
1296 | snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i); | |
1297 | card = snd_card_new(idx, tmpid, THIS_MODULE, 0); | |
1298 | ||
1299 | if (! card) { | |
1300 | snd_printk(KERN_ERR "cannot allocate the card %d\n", i); | |
1301 | pcxhr_free(mgr); | |
1302 | return -ENOMEM; | |
1303 | } | |
1304 | ||
1305 | strcpy(card->driver, DRIVER_NAME); | |
1306 | sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i); | |
1307 | sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i); | |
1308 | ||
1309 | if ((err = pcxhr_create(mgr, card, i)) < 0) { | |
1310 | pcxhr_free(mgr); | |
1311 | return err; | |
1312 | } | |
1313 | ||
1314 | if (i == 0) | |
1315 | /* init proc interface only for chip0 */ | |
1316 | pcxhr_proc_init(mgr->chip[i]); | |
1317 | ||
1318 | if ((err = snd_card_register(card)) < 0) { | |
1319 | pcxhr_free(mgr); | |
1320 | return err; | |
1321 | } | |
1322 | } | |
1323 | ||
1324 | /* create hostport purgebuffer */ | |
1325 | size = PAGE_ALIGN(sizeof(struct pcxhr_hostport)); | |
1326 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
1327 | size, &mgr->hostport) < 0) { | |
1328 | pcxhr_free(mgr); | |
1329 | return -ENOMEM; | |
1330 | } | |
1331 | /* init purgebuffer */ | |
1332 | memset(mgr->hostport.area, 0, size); | |
1333 | ||
1334 | /* create a DSP loader */ | |
1335 | err = pcxhr_setup_firmware(mgr); | |
1336 | if (err < 0) { | |
1337 | pcxhr_free(mgr); | |
1338 | return err; | |
1339 | } | |
1340 | ||
1341 | pci_set_drvdata(pci, mgr); | |
1342 | dev++; | |
1343 | return 0; | |
1344 | } | |
1345 | ||
1346 | static void __devexit pcxhr_remove(struct pci_dev *pci) | |
1347 | { | |
1348 | pcxhr_free(pci_get_drvdata(pci)); | |
1349 | pci_set_drvdata(pci, NULL); | |
1350 | } | |
1351 | ||
1352 | static struct pci_driver driver = { | |
1353 | .name = "Digigram pcxhr", | |
1354 | .id_table = pcxhr_ids, | |
1355 | .probe = pcxhr_probe, | |
1356 | .remove = __devexit_p(pcxhr_remove), | |
1357 | }; | |
1358 | ||
1359 | static int __init pcxhr_module_init(void) | |
1360 | { | |
1361 | return pci_register_driver(&driver); | |
1362 | } | |
1363 | ||
1364 | static void __exit pcxhr_module_exit(void) | |
1365 | { | |
1366 | pci_unregister_driver(&driver); | |
1367 | } | |
1368 | ||
1369 | module_init(pcxhr_module_init) | |
1370 | module_exit(pcxhr_module_exit) |