Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ALSA driver for RME Digi9652 audio interfaces | |
3 | * | |
4 | * Copyright (c) 1999 IEM - Winfried Ritsch | |
5 | * Copyright (c) 1999-2001 Paul Davis | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/delay.h> |
24 | #include <linux/init.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/moduleparam.h> | |
29 | ||
30 | #include <sound/core.h> | |
31 | #include <sound/control.h> | |
32 | #include <sound/pcm.h> | |
33 | #include <sound/info.h> | |
34 | #include <sound/asoundef.h> | |
35 | #include <sound/initval.h> | |
36 | ||
37 | #include <asm/current.h> | |
38 | #include <asm/io.h> | |
39 | ||
40 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
41 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
42 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
6581f4e7 | 43 | static int precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ |
1da177e4 LT |
44 | |
45 | module_param_array(index, int, NULL, 0444); | |
46 | MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); | |
47 | module_param_array(id, charp, NULL, 0444); | |
48 | MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); | |
49 | module_param_array(enable, bool, NULL, 0444); | |
50 | MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); | |
51 | module_param_array(precise_ptr, bool, NULL, 0444); | |
52 | MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); | |
53 | MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); | |
54 | MODULE_DESCRIPTION("RME Digi9652/Digi9636"); | |
55 | MODULE_LICENSE("GPL"); | |
56 | MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," | |
57 | "{RME,Hammerfall-Light}}"); | |
58 | ||
59 | /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for | |
60 | capture, one for playback. Both the ADAT and S/PDIF channels appear | |
61 | to the host CPU in the same block of memory. There is no functional | |
62 | difference between them in terms of access. | |
63 | ||
64 | The Hammerfall Light is identical to the Hammerfall, except that it | |
65 | has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. | |
66 | */ | |
67 | ||
68 | #define RME9652_NCHANNELS 26 | |
69 | #define RME9636_NCHANNELS 18 | |
70 | ||
71 | /* Preferred sync source choices - used by "sync_pref" control switch */ | |
72 | ||
73 | #define RME9652_SYNC_FROM_SPDIF 0 | |
74 | #define RME9652_SYNC_FROM_ADAT1 1 | |
75 | #define RME9652_SYNC_FROM_ADAT2 2 | |
76 | #define RME9652_SYNC_FROM_ADAT3 3 | |
77 | ||
78 | /* Possible sources of S/PDIF input */ | |
79 | ||
80 | #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ | |
81 | #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ | |
82 | #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ | |
83 | ||
84 | /* ------------- Status-Register bits --------------------- */ | |
85 | ||
86 | #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ | |
87 | #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ | |
88 | #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ | |
89 | #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ | |
90 | #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ | |
91 | #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ | |
92 | /* bits 6-15 encode h/w buffer pointer position */ | |
93 | #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ | |
94 | #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ | |
95 | #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ | |
96 | #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ | |
97 | #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ | |
98 | #define RME9652_tc_out (1<<21) /* time-code out bit */ | |
99 | #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ | |
100 | #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ | |
101 | #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ | |
102 | #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ | |
103 | #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ | |
104 | #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ | |
105 | #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ | |
106 | ||
107 | #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) | |
108 | #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) | |
109 | #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) | |
110 | #define rme9652_decode_spdif_rate(x) ((x)>>22) | |
111 | ||
112 | /* Bit 6..15 : h/w buffer pointer */ | |
113 | ||
114 | #define RME9652_buf_pos 0x000FFC0 | |
115 | ||
116 | /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later | |
117 | Rev G EEPROMS and Rev 1.5 cards or later. | |
118 | */ | |
119 | ||
120 | #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) | |
121 | ||
1da177e4 LT |
122 | /* amount of io space we remap for register access. i'm not sure we |
123 | even need this much, but 1K is nice round number :) | |
124 | */ | |
125 | ||
126 | #define RME9652_IO_EXTENT 1024 | |
127 | ||
128 | #define RME9652_init_buffer 0 | |
129 | #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ | |
130 | #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ | |
131 | #define RME9652_control_register 64 | |
132 | #define RME9652_irq_clear 96 | |
133 | #define RME9652_time_code 100 /* useful if used with alesis adat */ | |
134 | #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ | |
135 | ||
136 | /* Read-only registers */ | |
137 | ||
138 | /* Writing to any of the register locations writes to the status | |
139 | register. We'll use the first location as our point of access. | |
140 | */ | |
141 | ||
142 | #define RME9652_status_register 0 | |
143 | ||
144 | /* --------- Control-Register Bits ---------------- */ | |
145 | ||
146 | ||
147 | #define RME9652_start_bit (1<<0) /* start record/play */ | |
148 | /* bits 1-3 encode buffersize/latency */ | |
149 | #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ | |
561de31a | 150 | #define RME9652_IE (1<<5) /* Interrupt Enable */ |
1da177e4 LT |
151 | #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ |
152 | #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ | |
153 | #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ | |
154 | #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ | |
155 | #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ | |
156 | #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ | |
157 | #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ | |
158 | #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ | |
159 | #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ | |
160 | #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ | |
161 | #define RME9652_SyncPref_ADAT2 (1<<16) | |
162 | #define RME9652_SyncPref_ADAT3 (1<<17) | |
163 | #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ | |
164 | #define RME9652_SPDIF_SELECT (1<<19) | |
165 | #define RME9652_SPDIF_CLOCK (1<<20) | |
166 | #define RME9652_SPDIF_WRITE (1<<21) | |
167 | #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ | |
168 | ||
169 | /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ | |
170 | ||
171 | #define RME9652_latency 0x0e | |
172 | #define rme9652_encode_latency(x) (((x)&0x7)<<1) | |
173 | #define rme9652_decode_latency(x) (((x)>>1)&0x7) | |
174 | #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) | |
175 | #define RME9652_inp (RME9652_inp_0|RME9652_inp_1) | |
176 | #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) | |
177 | #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) | |
178 | ||
179 | #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) | |
180 | #define RME9652_SyncPref_ADAT1 0 | |
181 | #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) | |
182 | ||
183 | /* the size of a substream (1 mono data stream) */ | |
184 | ||
185 | #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) | |
186 | #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) | |
187 | ||
188 | /* the size of the area we need to allocate for DMA transfers. the | |
189 | size is the same regardless of the number of channels - the | |
190 | 9636 still uses the same memory area. | |
191 | ||
192 | Note that we allocate 1 more channel than is apparently needed | |
193 | because the h/w seems to write 1 byte beyond the end of the last | |
194 | page. Sigh. | |
195 | */ | |
196 | ||
197 | #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) | |
198 | #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) | |
199 | ||
abfd67bd | 200 | struct snd_rme9652 { |
1da177e4 LT |
201 | int dev; |
202 | ||
203 | spinlock_t lock; | |
204 | int irq; | |
205 | unsigned long port; | |
206 | void __iomem *iobase; | |
207 | ||
208 | int precise_ptr; | |
209 | ||
210 | u32 control_register; /* cached value */ | |
211 | u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ | |
212 | ||
213 | u32 creg_spdif; | |
214 | u32 creg_spdif_stream; | |
215 | ||
216 | char *card_name; /* hammerfall or hammerfall light names */ | |
217 | ||
218 | size_t hw_offsetmask; /* &-with status register to get real hw_offset */ | |
219 | size_t prev_hw_offset; /* previous hw offset */ | |
220 | size_t max_jitter; /* maximum jitter in frames for | |
221 | hw pointer */ | |
222 | size_t period_bytes; /* guess what this is */ | |
223 | ||
224 | unsigned char ds_channels; | |
225 | unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ | |
226 | ||
227 | struct snd_dma_buffer playback_dma_buf; | |
228 | struct snd_dma_buffer capture_dma_buf; | |
229 | ||
230 | unsigned char *capture_buffer; /* suitably aligned address */ | |
231 | unsigned char *playback_buffer; /* suitably aligned address */ | |
232 | ||
233 | pid_t capture_pid; | |
234 | pid_t playback_pid; | |
235 | ||
abfd67bd TI |
236 | struct snd_pcm_substream *capture_substream; |
237 | struct snd_pcm_substream *playback_substream; | |
1da177e4 LT |
238 | int running; |
239 | ||
240 | int passthru; /* non-zero if doing pass-thru */ | |
241 | int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ | |
242 | ||
243 | int last_spdif_sample_rate; /* so that we can catch externally ... */ | |
244 | int last_adat_sample_rate; /* ... induced rate changes */ | |
245 | ||
246 | char *channel_map; | |
247 | ||
abfd67bd TI |
248 | struct snd_card *card; |
249 | struct snd_pcm *pcm; | |
1da177e4 | 250 | struct pci_dev *pci; |
abfd67bd | 251 | struct snd_kcontrol *spdif_ctl; |
1da177e4 | 252 | |
abfd67bd | 253 | }; |
1da177e4 LT |
254 | |
255 | /* These tables map the ALSA channels 1..N to the channels that we | |
256 | need to use in order to find the relevant channel buffer. RME | |
257 | refer to this kind of mapping as between "the ADAT channel and | |
258 | the DMA channel." We index it using the logical audio channel, | |
259 | and the value is the DMA channel (i.e. channel buffer number) | |
260 | where the data for that channel can be read/written from/to. | |
261 | */ | |
262 | ||
263 | static char channel_map_9652_ss[26] = { | |
264 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, | |
265 | 18, 19, 20, 21, 22, 23, 24, 25 | |
266 | }; | |
267 | ||
268 | static char channel_map_9636_ss[26] = { | |
269 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, | |
270 | /* channels 16 and 17 are S/PDIF */ | |
271 | 24, 25, | |
272 | /* channels 18-25 don't exist */ | |
273 | -1, -1, -1, -1, -1, -1, -1, -1 | |
274 | }; | |
275 | ||
276 | static char channel_map_9652_ds[26] = { | |
277 | /* ADAT channels are remapped */ | |
278 | 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, | |
279 | /* channels 12 and 13 are S/PDIF */ | |
280 | 24, 25, | |
281 | /* others don't exist */ | |
282 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 | |
283 | }; | |
284 | ||
285 | static char channel_map_9636_ds[26] = { | |
286 | /* ADAT channels are remapped */ | |
287 | 1, 3, 5, 7, 9, 11, 13, 15, | |
288 | /* channels 8 and 9 are S/PDIF */ | |
289 | 24, 25 | |
290 | /* others don't exist */ | |
291 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 | |
292 | }; | |
293 | ||
294 | static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) | |
295 | { | |
296 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; | |
297 | dmab->dev.dev = snd_dma_pci_data(pci); | |
b6a96915 TI |
298 | if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { |
299 | if (dmab->bytes >= size) | |
300 | return 0; | |
1da177e4 | 301 | } |
b6a96915 TI |
302 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
303 | size, dmab) < 0) | |
304 | return -ENOMEM; | |
1da177e4 LT |
305 | return 0; |
306 | } | |
307 | ||
308 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) | |
309 | { | |
b6a96915 TI |
310 | if (dmab->area) { |
311 | dmab->dev.dev = NULL; /* make it anonymous */ | |
1da177e4 | 312 | snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); |
b6a96915 | 313 | } |
1da177e4 LT |
314 | } |
315 | ||
316 | ||
f40b6890 | 317 | static struct pci_device_id snd_rme9652_ids[] = { |
1da177e4 LT |
318 | { |
319 | .vendor = 0x10ee, | |
320 | .device = 0x3fc4, | |
321 | .subvendor = PCI_ANY_ID, | |
322 | .subdevice = PCI_ANY_ID, | |
323 | }, /* RME Digi9652 */ | |
324 | { 0, }, | |
325 | }; | |
326 | ||
327 | MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); | |
328 | ||
abfd67bd | 329 | static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) |
1da177e4 LT |
330 | { |
331 | writel(val, rme9652->iobase + reg); | |
332 | } | |
333 | ||
abfd67bd | 334 | static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) |
1da177e4 LT |
335 | { |
336 | return readl(rme9652->iobase + reg); | |
337 | } | |
338 | ||
abfd67bd | 339 | static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) |
1da177e4 LT |
340 | { |
341 | unsigned long flags; | |
342 | int ret = 1; | |
343 | ||
344 | spin_lock_irqsave(&rme9652->lock, flags); | |
345 | if ((rme9652->playback_pid != rme9652->capture_pid) && | |
346 | (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { | |
347 | ret = 0; | |
348 | } | |
349 | spin_unlock_irqrestore(&rme9652->lock, flags); | |
350 | return ret; | |
351 | } | |
352 | ||
abfd67bd | 353 | static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) |
1da177e4 LT |
354 | { |
355 | if (rme9652_running_double_speed(rme9652)) { | |
356 | return (rme9652_read(rme9652, RME9652_status_register) & | |
357 | RME9652_fs48) ? 96000 : 88200; | |
358 | } else { | |
359 | return (rme9652_read(rme9652, RME9652_status_register) & | |
360 | RME9652_fs48) ? 48000 : 44100; | |
361 | } | |
362 | } | |
363 | ||
abfd67bd | 364 | static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) |
1da177e4 LT |
365 | { |
366 | unsigned int i; | |
367 | ||
368 | i = rme9652->control_register & RME9652_latency; | |
369 | rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); | |
370 | rme9652->hw_offsetmask = | |
371 | (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; | |
372 | rme9652->max_jitter = 80; | |
373 | } | |
374 | ||
abfd67bd | 375 | static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) |
1da177e4 LT |
376 | { |
377 | int status; | |
378 | unsigned int offset, frag; | |
379 | snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; | |
380 | snd_pcm_sframes_t delta; | |
381 | ||
382 | status = rme9652_read(rme9652, RME9652_status_register); | |
383 | if (!rme9652->precise_ptr) | |
384 | return (status & RME9652_buffer_id) ? period_size : 0; | |
385 | offset = status & RME9652_buf_pos; | |
386 | ||
387 | /* The hardware may give a backward movement for up to 80 frames | |
388 | Martin Kirst <martin.kirst@freenet.de> knows the details. | |
389 | */ | |
390 | ||
391 | delta = rme9652->prev_hw_offset - offset; | |
392 | delta &= 0xffff; | |
393 | if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) | |
394 | offset = rme9652->prev_hw_offset; | |
395 | else | |
396 | rme9652->prev_hw_offset = offset; | |
397 | offset &= rme9652->hw_offsetmask; | |
398 | offset /= 4; | |
399 | frag = status & RME9652_buffer_id; | |
400 | ||
401 | if (offset < period_size) { | |
402 | if (offset > rme9652->max_jitter) { | |
403 | if (frag) | |
404 | printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); | |
405 | } else if (!frag) | |
406 | return 0; | |
407 | offset -= rme9652->max_jitter; | |
304e3bb7 | 408 | if ((int)offset < 0) |
1da177e4 LT |
409 | offset += period_size * 2; |
410 | } else { | |
411 | if (offset > period_size + rme9652->max_jitter) { | |
412 | if (!frag) | |
413 | printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); | |
414 | } else if (frag) | |
415 | return period_size; | |
416 | offset -= rme9652->max_jitter; | |
417 | } | |
418 | ||
419 | return offset; | |
420 | } | |
421 | ||
abfd67bd | 422 | static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) |
1da177e4 LT |
423 | { |
424 | int i; | |
425 | ||
426 | /* reset the FIFO pointer to zero. We do this by writing to 8 | |
427 | registers, each of which is a 32bit wide register, and set | |
428 | them all to zero. Note that s->iobase is a pointer to | |
429 | int32, not pointer to char. | |
430 | */ | |
431 | ||
432 | for (i = 0; i < 8; i++) { | |
433 | rme9652_write(rme9652, i * 4, 0); | |
434 | udelay(10); | |
435 | } | |
436 | rme9652->prev_hw_offset = 0; | |
437 | } | |
438 | ||
abfd67bd | 439 | static inline void rme9652_start(struct snd_rme9652 *s) |
1da177e4 LT |
440 | { |
441 | s->control_register |= (RME9652_IE | RME9652_start_bit); | |
442 | rme9652_write(s, RME9652_control_register, s->control_register); | |
443 | } | |
444 | ||
abfd67bd | 445 | static inline void rme9652_stop(struct snd_rme9652 *s) |
1da177e4 LT |
446 | { |
447 | s->control_register &= ~(RME9652_start_bit | RME9652_IE); | |
448 | rme9652_write(s, RME9652_control_register, s->control_register); | |
449 | } | |
450 | ||
abfd67bd | 451 | static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, |
1da177e4 LT |
452 | unsigned int frames) |
453 | { | |
454 | int restart = 0; | |
455 | int n; | |
456 | ||
457 | spin_lock_irq(&s->lock); | |
458 | ||
459 | if ((restart = s->running)) { | |
460 | rme9652_stop(s); | |
461 | } | |
462 | ||
463 | frames >>= 7; | |
464 | n = 0; | |
465 | while (frames) { | |
466 | n++; | |
467 | frames >>= 1; | |
468 | } | |
469 | ||
470 | s->control_register &= ~RME9652_latency; | |
471 | s->control_register |= rme9652_encode_latency(n); | |
472 | ||
473 | rme9652_write(s, RME9652_control_register, s->control_register); | |
474 | ||
475 | rme9652_compute_period_size(s); | |
476 | ||
477 | if (restart) | |
478 | rme9652_start(s); | |
479 | ||
480 | spin_unlock_irq(&s->lock); | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
abfd67bd | 485 | static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) |
1da177e4 LT |
486 | { |
487 | int restart; | |
488 | int reject_if_open = 0; | |
489 | int xrate; | |
490 | ||
491 | if (!snd_rme9652_use_is_exclusive (rme9652)) { | |
492 | return -EBUSY; | |
493 | } | |
494 | ||
495 | /* Changing from a "single speed" to a "double speed" rate is | |
496 | not allowed if any substreams are open. This is because | |
497 | such a change causes a shift in the location of | |
498 | the DMA buffers and a reduction in the number of available | |
499 | buffers. | |
500 | ||
501 | Note that a similar but essentially insoluble problem | |
502 | exists for externally-driven rate changes. All we can do | |
503 | is to flag rate changes in the read/write routines. | |
504 | */ | |
505 | ||
506 | spin_lock_irq(&rme9652->lock); | |
507 | xrate = rme9652_adat_sample_rate(rme9652); | |
508 | ||
509 | switch (rate) { | |
510 | case 44100: | |
511 | if (xrate > 48000) { | |
512 | reject_if_open = 1; | |
513 | } | |
514 | rate = 0; | |
515 | break; | |
516 | case 48000: | |
517 | if (xrate > 48000) { | |
518 | reject_if_open = 1; | |
519 | } | |
520 | rate = RME9652_freq; | |
521 | break; | |
522 | case 88200: | |
523 | if (xrate < 48000) { | |
524 | reject_if_open = 1; | |
525 | } | |
526 | rate = RME9652_DS; | |
527 | break; | |
528 | case 96000: | |
529 | if (xrate < 48000) { | |
530 | reject_if_open = 1; | |
531 | } | |
532 | rate = RME9652_DS | RME9652_freq; | |
533 | break; | |
534 | default: | |
535 | spin_unlock_irq(&rme9652->lock); | |
536 | return -EINVAL; | |
537 | } | |
538 | ||
539 | if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { | |
540 | spin_unlock_irq(&rme9652->lock); | |
541 | return -EBUSY; | |
542 | } | |
543 | ||
544 | if ((restart = rme9652->running)) { | |
545 | rme9652_stop(rme9652); | |
546 | } | |
547 | rme9652->control_register &= ~(RME9652_freq | RME9652_DS); | |
548 | rme9652->control_register |= rate; | |
549 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
550 | ||
551 | if (restart) { | |
552 | rme9652_start(rme9652); | |
553 | } | |
554 | ||
555 | if (rate & RME9652_DS) { | |
556 | if (rme9652->ss_channels == RME9652_NCHANNELS) { | |
557 | rme9652->channel_map = channel_map_9652_ds; | |
558 | } else { | |
559 | rme9652->channel_map = channel_map_9636_ds; | |
560 | } | |
561 | } else { | |
562 | if (rme9652->ss_channels == RME9652_NCHANNELS) { | |
563 | rme9652->channel_map = channel_map_9652_ss; | |
564 | } else { | |
565 | rme9652->channel_map = channel_map_9636_ss; | |
566 | } | |
567 | } | |
568 | ||
569 | spin_unlock_irq(&rme9652->lock); | |
570 | return 0; | |
571 | } | |
572 | ||
abfd67bd | 573 | static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) |
1da177e4 LT |
574 | { |
575 | int i; | |
576 | ||
577 | rme9652->passthru = 0; | |
578 | ||
579 | if (channel < 0) { | |
580 | ||
581 | /* set thru for all channels */ | |
582 | ||
583 | if (enable) { | |
584 | for (i = 0; i < RME9652_NCHANNELS; i++) { | |
585 | rme9652->thru_bits |= (1 << i); | |
586 | rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); | |
587 | } | |
588 | } else { | |
589 | for (i = 0; i < RME9652_NCHANNELS; i++) { | |
590 | rme9652->thru_bits &= ~(1 << i); | |
591 | rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); | |
592 | } | |
593 | } | |
594 | ||
595 | } else { | |
596 | int mapped_channel; | |
597 | ||
1da177e4 LT |
598 | mapped_channel = rme9652->channel_map[channel]; |
599 | ||
600 | if (enable) { | |
601 | rme9652->thru_bits |= (1 << mapped_channel); | |
602 | } else { | |
603 | rme9652->thru_bits &= ~(1 << mapped_channel); | |
604 | } | |
605 | ||
606 | rme9652_write(rme9652, | |
607 | RME9652_thru_base + mapped_channel * 4, | |
608 | enable ? 1 : 0); | |
609 | } | |
610 | } | |
611 | ||
abfd67bd | 612 | static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) |
1da177e4 LT |
613 | { |
614 | if (onoff) { | |
615 | rme9652_set_thru(rme9652, -1, 1); | |
616 | ||
617 | /* we don't want interrupts, so do a | |
618 | custom version of rme9652_start(). | |
619 | */ | |
620 | ||
621 | rme9652->control_register = | |
622 | RME9652_inp_0 | | |
623 | rme9652_encode_latency(7) | | |
624 | RME9652_start_bit; | |
625 | ||
626 | rme9652_reset_hw_pointer(rme9652); | |
627 | ||
628 | rme9652_write(rme9652, RME9652_control_register, | |
629 | rme9652->control_register); | |
630 | rme9652->passthru = 1; | |
631 | } else { | |
632 | rme9652_set_thru(rme9652, -1, 0); | |
633 | rme9652_stop(rme9652); | |
634 | rme9652->passthru = 0; | |
635 | } | |
636 | ||
637 | return 0; | |
638 | } | |
639 | ||
abfd67bd | 640 | static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) |
1da177e4 LT |
641 | { |
642 | if (onoff) | |
643 | rme9652->control_register |= mask; | |
644 | else | |
645 | rme9652->control_register &= ~mask; | |
646 | ||
647 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
648 | } | |
649 | ||
abfd67bd | 650 | static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) |
1da177e4 LT |
651 | { |
652 | long mask; | |
653 | long i; | |
654 | ||
655 | for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { | |
656 | if (val & mask) | |
657 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); | |
658 | else | |
659 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); | |
660 | ||
661 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); | |
662 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); | |
663 | } | |
664 | } | |
665 | ||
abfd67bd | 666 | static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) |
1da177e4 LT |
667 | { |
668 | long mask; | |
669 | long val; | |
670 | long i; | |
671 | ||
672 | val = 0; | |
673 | ||
674 | for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { | |
675 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); | |
676 | if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) | |
677 | val |= mask; | |
678 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); | |
679 | } | |
680 | ||
681 | return val; | |
682 | } | |
683 | ||
abfd67bd | 684 | static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) |
1da177e4 LT |
685 | { |
686 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
687 | rme9652_spdif_write_byte (rme9652, 0x20); | |
688 | rme9652_spdif_write_byte (rme9652, address); | |
689 | rme9652_spdif_write_byte (rme9652, data); | |
690 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
691 | } | |
692 | ||
693 | ||
abfd67bd | 694 | static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) |
1da177e4 LT |
695 | { |
696 | int ret; | |
697 | ||
698 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
699 | rme9652_spdif_write_byte (rme9652, 0x20); | |
700 | rme9652_spdif_write_byte (rme9652, address); | |
701 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
702 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
703 | ||
704 | rme9652_spdif_write_byte (rme9652, 0x21); | |
705 | ret = rme9652_spdif_read_byte (rme9652); | |
706 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
707 | ||
708 | return ret; | |
709 | } | |
710 | ||
abfd67bd | 711 | static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) |
1da177e4 LT |
712 | { |
713 | /* XXX what unsets this ? */ | |
714 | ||
715 | rme9652->control_register |= RME9652_SPDIF_RESET; | |
716 | ||
717 | rme9652_write_spdif_codec (rme9652, 4, 0x40); | |
718 | rme9652_write_spdif_codec (rme9652, 17, 0x13); | |
719 | rme9652_write_spdif_codec (rme9652, 6, 0x02); | |
720 | } | |
721 | ||
abfd67bd | 722 | static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) |
1da177e4 LT |
723 | { |
724 | unsigned int rate_bits; | |
725 | ||
726 | if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { | |
727 | return -1; /* error condition */ | |
728 | } | |
729 | ||
730 | if (s->hw_rev == 15) { | |
731 | ||
732 | int x, y, ret; | |
733 | ||
734 | x = rme9652_spdif_read_codec (s, 30); | |
735 | ||
736 | if (x != 0) | |
737 | y = 48000 * 64 / x; | |
738 | else | |
739 | y = 0; | |
740 | ||
741 | if (y > 30400 && y < 33600) ret = 32000; | |
742 | else if (y > 41900 && y < 46000) ret = 44100; | |
743 | else if (y > 46000 && y < 50400) ret = 48000; | |
744 | else if (y > 60800 && y < 67200) ret = 64000; | |
745 | else if (y > 83700 && y < 92000) ret = 88200; | |
746 | else if (y > 92000 && y < 100000) ret = 96000; | |
747 | else ret = 0; | |
748 | return ret; | |
749 | } | |
750 | ||
751 | rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; | |
752 | ||
753 | switch (rme9652_decode_spdif_rate(rate_bits)) { | |
754 | case 0x7: | |
755 | return 32000; | |
756 | break; | |
757 | ||
758 | case 0x6: | |
759 | return 44100; | |
760 | break; | |
761 | ||
762 | case 0x5: | |
763 | return 48000; | |
764 | break; | |
765 | ||
766 | case 0x4: | |
767 | return 88200; | |
768 | break; | |
769 | ||
770 | case 0x3: | |
771 | return 96000; | |
772 | break; | |
773 | ||
774 | case 0x0: | |
775 | return 64000; | |
776 | break; | |
777 | ||
778 | default: | |
99b359ba | 779 | snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n", |
1da177e4 LT |
780 | s->card_name, rate_bits); |
781 | return 0; | |
782 | break; | |
783 | } | |
784 | } | |
785 | ||
786 | /*----------------------------------------------------------------------------- | |
787 | Control Interface | |
788 | ----------------------------------------------------------------------------*/ | |
789 | ||
abfd67bd | 790 | static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) |
1da177e4 LT |
791 | { |
792 | u32 val = 0; | |
793 | val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; | |
794 | val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; | |
795 | if (val & RME9652_PRO) | |
796 | val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; | |
797 | else | |
798 | val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; | |
799 | return val; | |
800 | } | |
801 | ||
abfd67bd | 802 | static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) |
1da177e4 LT |
803 | { |
804 | aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | | |
805 | ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); | |
806 | if (val & RME9652_PRO) | |
807 | aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; | |
808 | else | |
809 | aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; | |
810 | } | |
811 | ||
abfd67bd | 812 | static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
813 | { |
814 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
815 | uinfo->count = 1; | |
816 | return 0; | |
817 | } | |
818 | ||
abfd67bd | 819 | static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 820 | { |
abfd67bd | 821 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
822 | |
823 | snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); | |
824 | return 0; | |
825 | } | |
826 | ||
abfd67bd | 827 | static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 828 | { |
abfd67bd | 829 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
830 | int change; |
831 | u32 val; | |
832 | ||
833 | val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); | |
834 | spin_lock_irq(&rme9652->lock); | |
835 | change = val != rme9652->creg_spdif; | |
836 | rme9652->creg_spdif = val; | |
837 | spin_unlock_irq(&rme9652->lock); | |
838 | return change; | |
839 | } | |
840 | ||
abfd67bd | 841 | static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
842 | { |
843 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
844 | uinfo->count = 1; | |
845 | return 0; | |
846 | } | |
847 | ||
abfd67bd | 848 | static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 849 | { |
abfd67bd | 850 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
851 | |
852 | snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); | |
853 | return 0; | |
854 | } | |
855 | ||
abfd67bd | 856 | static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 857 | { |
abfd67bd | 858 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
859 | int change; |
860 | u32 val; | |
861 | ||
862 | val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); | |
863 | spin_lock_irq(&rme9652->lock); | |
864 | change = val != rme9652->creg_spdif_stream; | |
865 | rme9652->creg_spdif_stream = val; | |
866 | rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); | |
867 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); | |
868 | spin_unlock_irq(&rme9652->lock); | |
869 | return change; | |
870 | } | |
871 | ||
abfd67bd | 872 | static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
873 | { |
874 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
875 | uinfo->count = 1; | |
876 | return 0; | |
877 | } | |
878 | ||
abfd67bd | 879 | static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 LT |
880 | { |
881 | ucontrol->value.iec958.status[0] = kcontrol->private_value; | |
882 | return 0; | |
883 | } | |
884 | ||
885 | #define RME9652_ADAT1_IN(xname, xindex) \ | |
67ed4161 | 886 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
887 | .info = snd_rme9652_info_adat1_in, \ |
888 | .get = snd_rme9652_get_adat1_in, \ | |
889 | .put = snd_rme9652_put_adat1_in } | |
890 | ||
abfd67bd | 891 | static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) |
1da177e4 LT |
892 | { |
893 | if (rme9652->control_register & RME9652_ADAT1_INTERNAL) | |
894 | return 1; | |
895 | return 0; | |
896 | } | |
897 | ||
abfd67bd | 898 | static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) |
1da177e4 LT |
899 | { |
900 | int restart = 0; | |
901 | ||
902 | if (internal) { | |
903 | rme9652->control_register |= RME9652_ADAT1_INTERNAL; | |
904 | } else { | |
905 | rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; | |
906 | } | |
907 | ||
908 | /* XXX do we actually need to stop the card when we do this ? */ | |
909 | ||
910 | if ((restart = rme9652->running)) { | |
911 | rme9652_stop(rme9652); | |
912 | } | |
913 | ||
914 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
915 | ||
916 | if (restart) { | |
917 | rme9652_start(rme9652); | |
918 | } | |
919 | ||
920 | return 0; | |
921 | } | |
922 | ||
abfd67bd | 923 | static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
924 | { |
925 | static char *texts[2] = {"ADAT1", "Internal"}; | |
926 | ||
927 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
928 | uinfo->count = 1; | |
929 | uinfo->value.enumerated.items = 2; | |
930 | if (uinfo->value.enumerated.item > 1) | |
931 | uinfo->value.enumerated.item = 1; | |
932 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
933 | return 0; | |
934 | } | |
935 | ||
abfd67bd | 936 | static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 937 | { |
abfd67bd | 938 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
939 | |
940 | spin_lock_irq(&rme9652->lock); | |
941 | ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); | |
942 | spin_unlock_irq(&rme9652->lock); | |
943 | return 0; | |
944 | } | |
945 | ||
abfd67bd | 946 | static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 947 | { |
abfd67bd | 948 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
949 | int change; |
950 | unsigned int val; | |
951 | ||
952 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
953 | return -EBUSY; | |
954 | val = ucontrol->value.enumerated.item[0] % 2; | |
955 | spin_lock_irq(&rme9652->lock); | |
956 | change = val != rme9652_adat1_in(rme9652); | |
957 | if (change) | |
958 | rme9652_set_adat1_input(rme9652, val); | |
959 | spin_unlock_irq(&rme9652->lock); | |
960 | return change; | |
961 | } | |
962 | ||
963 | #define RME9652_SPDIF_IN(xname, xindex) \ | |
67ed4161 | 964 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
965 | .info = snd_rme9652_info_spdif_in, \ |
966 | .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } | |
967 | ||
abfd67bd | 968 | static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) |
1da177e4 LT |
969 | { |
970 | return rme9652_decode_spdif_in(rme9652->control_register & | |
971 | RME9652_inp); | |
972 | } | |
973 | ||
abfd67bd | 974 | static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) |
1da177e4 LT |
975 | { |
976 | int restart = 0; | |
977 | ||
978 | rme9652->control_register &= ~RME9652_inp; | |
979 | rme9652->control_register |= rme9652_encode_spdif_in(in); | |
980 | ||
981 | if ((restart = rme9652->running)) { | |
982 | rme9652_stop(rme9652); | |
983 | } | |
984 | ||
985 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
986 | ||
987 | if (restart) { | |
988 | rme9652_start(rme9652); | |
989 | } | |
990 | ||
991 | return 0; | |
992 | } | |
993 | ||
abfd67bd | 994 | static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
995 | { |
996 | static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; | |
997 | ||
998 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
999 | uinfo->count = 1; | |
1000 | uinfo->value.enumerated.items = 3; | |
1001 | if (uinfo->value.enumerated.item > 2) | |
1002 | uinfo->value.enumerated.item = 2; | |
1003 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1004 | return 0; | |
1005 | } | |
1006 | ||
abfd67bd | 1007 | static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1008 | { |
abfd67bd | 1009 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1010 | |
1011 | spin_lock_irq(&rme9652->lock); | |
1012 | ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); | |
1013 | spin_unlock_irq(&rme9652->lock); | |
1014 | return 0; | |
1015 | } | |
1016 | ||
abfd67bd | 1017 | static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1018 | { |
abfd67bd | 1019 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1020 | int change; |
1021 | unsigned int val; | |
1022 | ||
1023 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1024 | return -EBUSY; | |
1025 | val = ucontrol->value.enumerated.item[0] % 3; | |
1026 | spin_lock_irq(&rme9652->lock); | |
1027 | change = val != rme9652_spdif_in(rme9652); | |
1028 | if (change) | |
1029 | rme9652_set_spdif_input(rme9652, val); | |
1030 | spin_unlock_irq(&rme9652->lock); | |
1031 | return change; | |
1032 | } | |
1033 | ||
1034 | #define RME9652_SPDIF_OUT(xname, xindex) \ | |
67ed4161 | 1035 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1036 | .info = snd_rme9652_info_spdif_out, \ |
1037 | .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } | |
1038 | ||
abfd67bd | 1039 | static int rme9652_spdif_out(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1040 | { |
1041 | return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; | |
1042 | } | |
1043 | ||
abfd67bd | 1044 | static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) |
1da177e4 LT |
1045 | { |
1046 | int restart = 0; | |
1047 | ||
1048 | if (out) { | |
1049 | rme9652->control_register |= RME9652_opt_out; | |
1050 | } else { | |
1051 | rme9652->control_register &= ~RME9652_opt_out; | |
1052 | } | |
1053 | ||
1054 | if ((restart = rme9652->running)) { | |
1055 | rme9652_stop(rme9652); | |
1056 | } | |
1057 | ||
1058 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1059 | ||
1060 | if (restart) { | |
1061 | rme9652_start(rme9652); | |
1062 | } | |
1063 | ||
1064 | return 0; | |
1065 | } | |
1066 | ||
a5ce8890 | 1067 | #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info |
1da177e4 | 1068 | |
abfd67bd | 1069 | static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1070 | { |
abfd67bd | 1071 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1072 | |
1073 | spin_lock_irq(&rme9652->lock); | |
1074 | ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); | |
1075 | spin_unlock_irq(&rme9652->lock); | |
1076 | return 0; | |
1077 | } | |
1078 | ||
abfd67bd | 1079 | static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1080 | { |
abfd67bd | 1081 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1082 | int change; |
1083 | unsigned int val; | |
1084 | ||
1085 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1086 | return -EBUSY; | |
1087 | val = ucontrol->value.integer.value[0] & 1; | |
1088 | spin_lock_irq(&rme9652->lock); | |
1089 | change = (int)val != rme9652_spdif_out(rme9652); | |
1090 | rme9652_set_spdif_output(rme9652, val); | |
1091 | spin_unlock_irq(&rme9652->lock); | |
1092 | return change; | |
1093 | } | |
1094 | ||
1095 | #define RME9652_SYNC_MODE(xname, xindex) \ | |
67ed4161 | 1096 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1097 | .info = snd_rme9652_info_sync_mode, \ |
1098 | .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } | |
1099 | ||
abfd67bd | 1100 | static int rme9652_sync_mode(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1101 | { |
1102 | if (rme9652->control_register & RME9652_wsel) { | |
1103 | return 2; | |
1104 | } else if (rme9652->control_register & RME9652_Master) { | |
1105 | return 1; | |
1106 | } else { | |
1107 | return 0; | |
1108 | } | |
1109 | } | |
1110 | ||
abfd67bd | 1111 | static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) |
1da177e4 LT |
1112 | { |
1113 | int restart = 0; | |
1114 | ||
1115 | switch (mode) { | |
1116 | case 0: | |
1117 | rme9652->control_register &= | |
1118 | ~(RME9652_Master | RME9652_wsel); | |
1119 | break; | |
1120 | case 1: | |
1121 | rme9652->control_register = | |
1122 | (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; | |
1123 | break; | |
1124 | case 2: | |
1125 | rme9652->control_register |= | |
1126 | (RME9652_Master | RME9652_wsel); | |
1127 | break; | |
1128 | } | |
1129 | ||
1130 | if ((restart = rme9652->running)) { | |
1131 | rme9652_stop(rme9652); | |
1132 | } | |
1133 | ||
1134 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1135 | ||
1136 | if (restart) { | |
1137 | rme9652_start(rme9652); | |
1138 | } | |
1139 | ||
1140 | return 0; | |
1141 | } | |
1142 | ||
abfd67bd | 1143 | static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1144 | { |
1145 | static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; | |
1146 | ||
1147 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1148 | uinfo->count = 1; | |
1149 | uinfo->value.enumerated.items = 3; | |
1150 | if (uinfo->value.enumerated.item > 2) | |
1151 | uinfo->value.enumerated.item = 2; | |
1152 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1153 | return 0; | |
1154 | } | |
1155 | ||
abfd67bd | 1156 | static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1157 | { |
abfd67bd | 1158 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1159 | |
1160 | spin_lock_irq(&rme9652->lock); | |
1161 | ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); | |
1162 | spin_unlock_irq(&rme9652->lock); | |
1163 | return 0; | |
1164 | } | |
1165 | ||
abfd67bd | 1166 | static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1167 | { |
abfd67bd | 1168 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1169 | int change; |
1170 | unsigned int val; | |
1171 | ||
1172 | val = ucontrol->value.enumerated.item[0] % 3; | |
1173 | spin_lock_irq(&rme9652->lock); | |
1174 | change = (int)val != rme9652_sync_mode(rme9652); | |
1175 | rme9652_set_sync_mode(rme9652, val); | |
1176 | spin_unlock_irq(&rme9652->lock); | |
1177 | return change; | |
1178 | } | |
1179 | ||
1180 | #define RME9652_SYNC_PREF(xname, xindex) \ | |
67ed4161 | 1181 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1182 | .info = snd_rme9652_info_sync_pref, \ |
1183 | .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } | |
1184 | ||
abfd67bd | 1185 | static int rme9652_sync_pref(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1186 | { |
1187 | switch (rme9652->control_register & RME9652_SyncPref_Mask) { | |
1188 | case RME9652_SyncPref_ADAT1: | |
1189 | return RME9652_SYNC_FROM_ADAT1; | |
1190 | case RME9652_SyncPref_ADAT2: | |
1191 | return RME9652_SYNC_FROM_ADAT2; | |
1192 | case RME9652_SyncPref_ADAT3: | |
1193 | return RME9652_SYNC_FROM_ADAT3; | |
1194 | case RME9652_SyncPref_SPDIF: | |
1195 | return RME9652_SYNC_FROM_SPDIF; | |
1196 | } | |
1197 | /* Not reachable */ | |
1198 | return 0; | |
1199 | } | |
1200 | ||
abfd67bd | 1201 | static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) |
1da177e4 LT |
1202 | { |
1203 | int restart; | |
1204 | ||
1205 | rme9652->control_register &= ~RME9652_SyncPref_Mask; | |
1206 | switch (pref) { | |
1207 | case RME9652_SYNC_FROM_ADAT1: | |
1208 | rme9652->control_register |= RME9652_SyncPref_ADAT1; | |
1209 | break; | |
1210 | case RME9652_SYNC_FROM_ADAT2: | |
1211 | rme9652->control_register |= RME9652_SyncPref_ADAT2; | |
1212 | break; | |
1213 | case RME9652_SYNC_FROM_ADAT3: | |
1214 | rme9652->control_register |= RME9652_SyncPref_ADAT3; | |
1215 | break; | |
1216 | case RME9652_SYNC_FROM_SPDIF: | |
1217 | rme9652->control_register |= RME9652_SyncPref_SPDIF; | |
1218 | break; | |
1219 | } | |
1220 | ||
1221 | if ((restart = rme9652->running)) { | |
1222 | rme9652_stop(rme9652); | |
1223 | } | |
1224 | ||
1225 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1226 | ||
1227 | if (restart) { | |
1228 | rme9652_start(rme9652); | |
1229 | } | |
1230 | ||
1231 | return 0; | |
1232 | } | |
1233 | ||
abfd67bd | 1234 | static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1235 | { |
1236 | static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; | |
abfd67bd | 1237 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1238 | |
1239 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1240 | uinfo->count = 1; | |
1241 | uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; | |
1242 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1243 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1244 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1245 | return 0; | |
1246 | } | |
1247 | ||
abfd67bd | 1248 | static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1249 | { |
abfd67bd | 1250 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1251 | |
1252 | spin_lock_irq(&rme9652->lock); | |
1253 | ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); | |
1254 | spin_unlock_irq(&rme9652->lock); | |
1255 | return 0; | |
1256 | } | |
1257 | ||
abfd67bd | 1258 | static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1259 | { |
abfd67bd | 1260 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1261 | int change, max; |
1262 | unsigned int val; | |
1263 | ||
1264 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1265 | return -EBUSY; | |
1266 | max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; | |
1267 | val = ucontrol->value.enumerated.item[0] % max; | |
1268 | spin_lock_irq(&rme9652->lock); | |
1269 | change = (int)val != rme9652_sync_pref(rme9652); | |
1270 | rme9652_set_sync_pref(rme9652, val); | |
1271 | spin_unlock_irq(&rme9652->lock); | |
1272 | return change; | |
1273 | } | |
1274 | ||
abfd67bd | 1275 | static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 | 1276 | { |
abfd67bd | 1277 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1278 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; |
1279 | uinfo->count = rme9652->ss_channels; | |
1280 | uinfo->value.integer.min = 0; | |
1281 | uinfo->value.integer.max = 1; | |
1282 | return 0; | |
1283 | } | |
1284 | ||
abfd67bd | 1285 | static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1286 | { |
abfd67bd | 1287 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1288 | unsigned int k; |
1289 | u32 thru_bits = rme9652->thru_bits; | |
1290 | ||
1291 | for (k = 0; k < rme9652->ss_channels; ++k) { | |
1292 | ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); | |
1293 | } | |
1294 | return 0; | |
1295 | } | |
1296 | ||
abfd67bd | 1297 | static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1298 | { |
abfd67bd | 1299 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1300 | int change; |
1301 | unsigned int chn; | |
1302 | u32 thru_bits = 0; | |
1303 | ||
1304 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1305 | return -EBUSY; | |
1306 | ||
1307 | for (chn = 0; chn < rme9652->ss_channels; ++chn) { | |
1308 | if (ucontrol->value.integer.value[chn]) | |
1309 | thru_bits |= 1 << chn; | |
1310 | } | |
1311 | ||
1312 | spin_lock_irq(&rme9652->lock); | |
1313 | change = thru_bits ^ rme9652->thru_bits; | |
1314 | if (change) { | |
1315 | for (chn = 0; chn < rme9652->ss_channels; ++chn) { | |
1316 | if (!(change & (1 << chn))) | |
1317 | continue; | |
1318 | rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); | |
1319 | } | |
1320 | } | |
1321 | spin_unlock_irq(&rme9652->lock); | |
1322 | return !!change; | |
1323 | } | |
1324 | ||
1325 | #define RME9652_PASSTHRU(xname, xindex) \ | |
67ed4161 | 1326 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1327 | .info = snd_rme9652_info_passthru, \ |
1328 | .put = snd_rme9652_put_passthru, \ | |
1329 | .get = snd_rme9652_get_passthru } | |
1330 | ||
a5ce8890 | 1331 | #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info |
1da177e4 | 1332 | |
abfd67bd | 1333 | static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1334 | { |
abfd67bd | 1335 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1336 | |
1337 | spin_lock_irq(&rme9652->lock); | |
1338 | ucontrol->value.integer.value[0] = rme9652->passthru; | |
1339 | spin_unlock_irq(&rme9652->lock); | |
1340 | return 0; | |
1341 | } | |
1342 | ||
abfd67bd | 1343 | static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1344 | { |
abfd67bd | 1345 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1346 | int change; |
1347 | unsigned int val; | |
1348 | int err = 0; | |
1349 | ||
1350 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1351 | return -EBUSY; | |
1352 | ||
1353 | val = ucontrol->value.integer.value[0] & 1; | |
1354 | spin_lock_irq(&rme9652->lock); | |
1355 | change = (ucontrol->value.integer.value[0] != rme9652->passthru); | |
1356 | if (change) | |
1357 | err = rme9652_set_passthru(rme9652, val); | |
1358 | spin_unlock_irq(&rme9652->lock); | |
1359 | return err ? err : change; | |
1360 | } | |
1361 | ||
1362 | /* Read-only switches */ | |
1363 | ||
1364 | #define RME9652_SPDIF_RATE(xname, xindex) \ | |
67ed4161 | 1365 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1366 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1367 | .info = snd_rme9652_info_spdif_rate, \ | |
1368 | .get = snd_rme9652_get_spdif_rate } | |
1369 | ||
abfd67bd | 1370 | static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1371 | { |
1372 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1373 | uinfo->count = 1; | |
1374 | uinfo->value.integer.min = 0; | |
1375 | uinfo->value.integer.max = 96000; | |
1376 | return 0; | |
1377 | } | |
1378 | ||
abfd67bd | 1379 | static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1380 | { |
abfd67bd | 1381 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1382 | |
1383 | spin_lock_irq(&rme9652->lock); | |
1384 | ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); | |
1385 | spin_unlock_irq(&rme9652->lock); | |
1386 | return 0; | |
1387 | } | |
1388 | ||
1389 | #define RME9652_ADAT_SYNC(xname, xindex, xidx) \ | |
67ed4161 | 1390 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1391 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1392 | .info = snd_rme9652_info_adat_sync, \ | |
1393 | .get = snd_rme9652_get_adat_sync, .private_value = xidx } | |
1394 | ||
abfd67bd | 1395 | static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1396 | { |
1397 | static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; | |
1398 | ||
1399 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1400 | uinfo->count = 1; | |
1401 | uinfo->value.enumerated.items = 4; | |
1402 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1403 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1404 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1405 | return 0; | |
1406 | } | |
1407 | ||
abfd67bd | 1408 | static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1409 | { |
abfd67bd | 1410 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1411 | unsigned int mask1, mask2, val; |
1412 | ||
1413 | switch (kcontrol->private_value) { | |
1414 | case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; | |
1415 | case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; | |
1416 | case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; | |
1417 | default: return -EINVAL; | |
1418 | } | |
1419 | val = rme9652_read(rme9652, RME9652_status_register); | |
1420 | ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; | |
1421 | ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; | |
1422 | return 0; | |
1423 | } | |
1424 | ||
1425 | #define RME9652_TC_VALID(xname, xindex) \ | |
67ed4161 | 1426 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1427 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1428 | .info = snd_rme9652_info_tc_valid, \ | |
1429 | .get = snd_rme9652_get_tc_valid } | |
1430 | ||
a5ce8890 | 1431 | #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info |
1da177e4 | 1432 | |
abfd67bd | 1433 | static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1434 | { |
abfd67bd | 1435 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1436 | |
1437 | ucontrol->value.integer.value[0] = | |
1438 | (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; | |
1439 | return 0; | |
1440 | } | |
1441 | ||
44456d37 | 1442 | #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE |
1da177e4 LT |
1443 | |
1444 | /* FIXME: this routine needs a port to the new control API --jk */ | |
1445 | ||
1446 | static int snd_rme9652_get_tc_value(void *private_data, | |
1447 | snd_kswitch_t *kswitch, | |
1448 | snd_switch_t *uswitch) | |
1449 | { | |
abfd67bd | 1450 | struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; |
1da177e4 LT |
1451 | u32 value; |
1452 | int i; | |
1453 | ||
1454 | uswitch->type = SNDRV_SW_TYPE_DWORD; | |
1455 | ||
1456 | if ((rme9652_read(s, RME9652_status_register) & | |
1457 | RME9652_tc_valid) == 0) { | |
1458 | uswitch->value.data32[0] = 0; | |
1459 | return 0; | |
1460 | } | |
1461 | ||
1462 | /* timecode request */ | |
1463 | ||
1464 | rme9652_write(s, RME9652_time_code, 0); | |
1465 | ||
1466 | /* XXX bug alert: loop-based timing !!!! */ | |
1467 | ||
1468 | for (i = 0; i < 50; i++) { | |
1469 | if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) | |
1470 | break; | |
1471 | } | |
1472 | ||
1473 | if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { | |
1474 | return -EIO; | |
1475 | } | |
1476 | ||
1477 | value = 0; | |
1478 | ||
1479 | for (i = 0; i < 32; i++) { | |
1480 | value >>= 1; | |
1481 | ||
1482 | if (rme9652_read(s, i * 4) & RME9652_tc_out) | |
1483 | value |= 0x80000000; | |
1484 | } | |
1485 | ||
1486 | if (value > 2 * 60 * 48000) { | |
1487 | value -= 2 * 60 * 48000; | |
1488 | } else { | |
1489 | value = 0; | |
1490 | } | |
1491 | ||
1492 | uswitch->value.data32[0] = value; | |
1493 | ||
1494 | return 0; | |
1495 | } | |
1496 | ||
1497 | #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ | |
1498 | ||
abfd67bd | 1499 | static struct snd_kcontrol_new snd_rme9652_controls[] = { |
1da177e4 | 1500 | { |
5549d549 | 1501 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1502 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), |
1503 | .info = snd_rme9652_control_spdif_info, | |
1504 | .get = snd_rme9652_control_spdif_get, | |
1505 | .put = snd_rme9652_control_spdif_put, | |
1506 | }, | |
1507 | { | |
1508 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
5549d549 | 1509 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1510 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), |
1511 | .info = snd_rme9652_control_spdif_stream_info, | |
1512 | .get = snd_rme9652_control_spdif_stream_get, | |
1513 | .put = snd_rme9652_control_spdif_stream_put, | |
1514 | }, | |
1515 | { | |
1516 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
5549d549 | 1517 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1518 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), |
1519 | .info = snd_rme9652_control_spdif_mask_info, | |
1520 | .get = snd_rme9652_control_spdif_mask_get, | |
1521 | .private_value = IEC958_AES0_NONAUDIO | | |
1522 | IEC958_AES0_PROFESSIONAL | | |
1523 | IEC958_AES0_CON_EMPHASIS, | |
1524 | }, | |
1525 | { | |
1526 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
5549d549 | 1527 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1528 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), |
1529 | .info = snd_rme9652_control_spdif_mask_info, | |
1530 | .get = snd_rme9652_control_spdif_mask_get, | |
1531 | .private_value = IEC958_AES0_NONAUDIO | | |
1532 | IEC958_AES0_PROFESSIONAL | | |
1533 | IEC958_AES0_PRO_EMPHASIS, | |
1534 | }, | |
1535 | RME9652_SPDIF_IN("IEC958 Input Connector", 0), | |
1536 | RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), | |
1537 | RME9652_SYNC_MODE("Sync Mode", 0), | |
1538 | RME9652_SYNC_PREF("Preferred Sync Source", 0), | |
1539 | { | |
67ed4161 | 1540 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1da177e4 LT |
1541 | .name = "Channels Thru", |
1542 | .index = 0, | |
1543 | .info = snd_rme9652_info_thru, | |
1544 | .get = snd_rme9652_get_thru, | |
1545 | .put = snd_rme9652_put_thru, | |
1546 | }, | |
1547 | RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), | |
1548 | RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), | |
1549 | RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), | |
1550 | RME9652_TC_VALID("Timecode Valid", 0), | |
1551 | RME9652_PASSTHRU("Passthru", 0) | |
1552 | }; | |
1553 | ||
abfd67bd | 1554 | static struct snd_kcontrol_new snd_rme9652_adat3_check = |
1da177e4 LT |
1555 | RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); |
1556 | ||
abfd67bd | 1557 | static struct snd_kcontrol_new snd_rme9652_adat1_input = |
1da177e4 LT |
1558 | RME9652_ADAT1_IN("ADAT1 Input Source", 0); |
1559 | ||
abfd67bd | 1560 | static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) |
1da177e4 LT |
1561 | { |
1562 | unsigned int idx; | |
1563 | int err; | |
abfd67bd | 1564 | struct snd_kcontrol *kctl; |
1da177e4 LT |
1565 | |
1566 | for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { | |
1567 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) | |
1568 | return err; | |
1569 | if (idx == 1) /* IEC958 (S/PDIF) Stream */ | |
1570 | rme9652->spdif_ctl = kctl; | |
1571 | } | |
1572 | ||
1573 | if (rme9652->ss_channels == RME9652_NCHANNELS) | |
1574 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) | |
1575 | return err; | |
1576 | ||
1577 | if (rme9652->hw_rev >= 15) | |
1578 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) | |
1579 | return err; | |
1580 | ||
1581 | return 0; | |
1582 | } | |
1583 | ||
1584 | /*------------------------------------------------------------ | |
1585 | /proc interface | |
1586 | ------------------------------------------------------------*/ | |
1587 | ||
1588 | static void | |
abfd67bd | 1589 | snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
1da177e4 | 1590 | { |
abfd67bd | 1591 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; |
1da177e4 LT |
1592 | u32 thru_bits = rme9652->thru_bits; |
1593 | int show_auto_sync_source = 0; | |
1594 | int i; | |
1595 | unsigned int status; | |
1596 | int x; | |
1597 | ||
1598 | status = rme9652_read(rme9652, RME9652_status_register); | |
1599 | ||
1600 | snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); | |
1601 | snd_iprintf(buffer, "Buffers: capture %p playback %p\n", | |
1602 | rme9652->capture_buffer, rme9652->playback_buffer); | |
1603 | snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", | |
1604 | rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); | |
1605 | snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); | |
1606 | ||
1607 | snd_iprintf(buffer, "\n"); | |
1608 | ||
1609 | x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & | |
1610 | RME9652_latency)); | |
1611 | ||
1612 | snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", | |
1613 | x, (unsigned long) rme9652->period_bytes); | |
1614 | snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", | |
1615 | rme9652_hw_pointer(rme9652)); | |
1616 | snd_iprintf(buffer, "Passthru: %s\n", | |
1617 | rme9652->passthru ? "yes" : "no"); | |
1618 | ||
1619 | if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { | |
1620 | snd_iprintf(buffer, "Clock mode: autosync\n"); | |
1621 | show_auto_sync_source = 1; | |
1622 | } else if (rme9652->control_register & RME9652_wsel) { | |
1623 | if (status & RME9652_wsel_rd) { | |
1624 | snd_iprintf(buffer, "Clock mode: word clock\n"); | |
1625 | } else { | |
1626 | snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); | |
1627 | } | |
1628 | } else { | |
1629 | snd_iprintf(buffer, "Clock mode: master\n"); | |
1630 | } | |
1631 | ||
1632 | if (show_auto_sync_source) { | |
1633 | switch (rme9652->control_register & RME9652_SyncPref_Mask) { | |
1634 | case RME9652_SyncPref_ADAT1: | |
1635 | snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); | |
1636 | break; | |
1637 | case RME9652_SyncPref_ADAT2: | |
1638 | snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); | |
1639 | break; | |
1640 | case RME9652_SyncPref_ADAT3: | |
1641 | snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); | |
1642 | break; | |
1643 | case RME9652_SyncPref_SPDIF: | |
1644 | snd_iprintf(buffer, "Pref. sync source: IEC958\n"); | |
1645 | break; | |
1646 | default: | |
1647 | snd_iprintf(buffer, "Pref. sync source: ???\n"); | |
1648 | } | |
1649 | } | |
1650 | ||
1651 | if (rme9652->hw_rev >= 15) | |
1652 | snd_iprintf(buffer, "\nADAT1 Input source: %s\n", | |
1653 | (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? | |
1654 | "Internal" : "ADAT1 optical"); | |
1655 | ||
1656 | snd_iprintf(buffer, "\n"); | |
1657 | ||
1658 | switch (rme9652_decode_spdif_in(rme9652->control_register & | |
1659 | RME9652_inp)) { | |
1660 | case RME9652_SPDIFIN_OPTICAL: | |
1661 | snd_iprintf(buffer, "IEC958 input: ADAT1\n"); | |
1662 | break; | |
1663 | case RME9652_SPDIFIN_COAXIAL: | |
1664 | snd_iprintf(buffer, "IEC958 input: Coaxial\n"); | |
1665 | break; | |
1666 | case RME9652_SPDIFIN_INTERN: | |
1667 | snd_iprintf(buffer, "IEC958 input: Internal\n"); | |
1668 | break; | |
1669 | default: | |
1670 | snd_iprintf(buffer, "IEC958 input: ???\n"); | |
1671 | break; | |
1672 | } | |
1673 | ||
1674 | if (rme9652->control_register & RME9652_opt_out) { | |
1675 | snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); | |
1676 | } else { | |
1677 | snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); | |
1678 | } | |
1679 | ||
1680 | if (rme9652->control_register & RME9652_PRO) { | |
1681 | snd_iprintf(buffer, "IEC958 quality: Professional\n"); | |
1682 | } else { | |
1683 | snd_iprintf(buffer, "IEC958 quality: Consumer\n"); | |
1684 | } | |
1685 | ||
1686 | if (rme9652->control_register & RME9652_EMP) { | |
1687 | snd_iprintf(buffer, "IEC958 emphasis: on\n"); | |
1688 | } else { | |
1689 | snd_iprintf(buffer, "IEC958 emphasis: off\n"); | |
1690 | } | |
1691 | ||
1692 | if (rme9652->control_register & RME9652_Dolby) { | |
1693 | snd_iprintf(buffer, "IEC958 Dolby: on\n"); | |
1694 | } else { | |
1695 | snd_iprintf(buffer, "IEC958 Dolby: off\n"); | |
1696 | } | |
1697 | ||
1698 | i = rme9652_spdif_sample_rate(rme9652); | |
1699 | ||
1700 | if (i < 0) { | |
1701 | snd_iprintf(buffer, | |
1702 | "IEC958 sample rate: error flag set\n"); | |
1703 | } else if (i == 0) { | |
1704 | snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); | |
1705 | } else { | |
1706 | snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); | |
1707 | } | |
1708 | ||
1709 | snd_iprintf(buffer, "\n"); | |
1710 | ||
1711 | snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", | |
1712 | rme9652_adat_sample_rate(rme9652)); | |
1713 | ||
1714 | /* Sync Check */ | |
1715 | ||
1716 | x = status & RME9652_sync_0; | |
1717 | if (status & RME9652_lock_0) { | |
1718 | snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); | |
1719 | } else { | |
1720 | snd_iprintf(buffer, "ADAT1: No Lock\n"); | |
1721 | } | |
1722 | ||
1723 | x = status & RME9652_sync_1; | |
1724 | if (status & RME9652_lock_1) { | |
1725 | snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); | |
1726 | } else { | |
1727 | snd_iprintf(buffer, "ADAT2: No Lock\n"); | |
1728 | } | |
1729 | ||
1730 | x = status & RME9652_sync_2; | |
1731 | if (status & RME9652_lock_2) { | |
1732 | snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); | |
1733 | } else { | |
1734 | snd_iprintf(buffer, "ADAT3: No Lock\n"); | |
1735 | } | |
1736 | ||
1737 | snd_iprintf(buffer, "\n"); | |
1738 | ||
1739 | snd_iprintf(buffer, "Timecode signal: %s\n", | |
1740 | (status & RME9652_tc_valid) ? "yes" : "no"); | |
1741 | ||
1742 | /* thru modes */ | |
1743 | ||
1744 | snd_iprintf(buffer, "Punch Status:\n\n"); | |
1745 | ||
1746 | for (i = 0; i < rme9652->ss_channels; i++) { | |
1747 | if (thru_bits & (1 << i)) { | |
1748 | snd_iprintf(buffer, "%2d: on ", i + 1); | |
1749 | } else { | |
1750 | snd_iprintf(buffer, "%2d: off ", i + 1); | |
1751 | } | |
1752 | ||
1753 | if (((i + 1) % 8) == 0) { | |
1754 | snd_iprintf(buffer, "\n"); | |
1755 | } | |
1756 | } | |
1757 | ||
1758 | snd_iprintf(buffer, "\n"); | |
1759 | } | |
1760 | ||
abfd67bd | 1761 | static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652) |
1da177e4 | 1762 | { |
abfd67bd | 1763 | struct snd_info_entry *entry; |
1da177e4 LT |
1764 | |
1765 | if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) | |
bf850204 | 1766 | snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); |
1da177e4 LT |
1767 | } |
1768 | ||
abfd67bd | 1769 | static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1770 | { |
1771 | snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); | |
1772 | snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); | |
1773 | } | |
1774 | ||
abfd67bd | 1775 | static int snd_rme9652_free(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1776 | { |
1777 | if (rme9652->irq >= 0) | |
1778 | rme9652_stop(rme9652); | |
1779 | snd_rme9652_free_buffers(rme9652); | |
1780 | ||
1781 | if (rme9652->irq >= 0) | |
1782 | free_irq(rme9652->irq, (void *)rme9652); | |
1783 | if (rme9652->iobase) | |
1784 | iounmap(rme9652->iobase); | |
1785 | if (rme9652->port) | |
1786 | pci_release_regions(rme9652->pci); | |
1787 | ||
1788 | pci_disable_device(rme9652->pci); | |
1789 | return 0; | |
1790 | } | |
1791 | ||
abfd67bd | 1792 | static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1793 | { |
1794 | unsigned long pb_bus, cb_bus; | |
1795 | ||
1796 | if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || | |
1797 | snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { | |
1798 | if (rme9652->capture_dma_buf.area) | |
1799 | snd_dma_free_pages(&rme9652->capture_dma_buf); | |
1800 | printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); | |
1801 | return -ENOMEM; | |
1802 | } | |
1803 | ||
1804 | /* Align to bus-space 64K boundary */ | |
1805 | ||
7ab39926 CL |
1806 | cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); |
1807 | pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); | |
1da177e4 LT |
1808 | |
1809 | /* Tell the card where it is */ | |
1810 | ||
1811 | rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); | |
1812 | rme9652_write(rme9652, RME9652_play_buffer, pb_bus); | |
1813 | ||
1814 | rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); | |
1815 | rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); | |
1816 | ||
1817 | return 0; | |
1818 | } | |
1819 | ||
abfd67bd | 1820 | static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1821 | { |
1822 | unsigned int k; | |
1823 | ||
1824 | /* ASSUMPTION: rme9652->lock is either held, or | |
1825 | there is no need to hold it (e.g. during module | |
561de31a | 1826 | initialization). |
1da177e4 LT |
1827 | */ |
1828 | ||
1829 | /* set defaults: | |
1830 | ||
1831 | SPDIF Input via Coax | |
1832 | autosync clock mode | |
1833 | maximum latency (7 = 8192 samples, 64Kbyte buffer, | |
1834 | which implies 2 4096 sample, 32Kbyte periods). | |
1835 | ||
1836 | if rev 1.5, initialize the S/PDIF receiver. | |
1837 | ||
1838 | */ | |
1839 | ||
1840 | rme9652->control_register = | |
1841 | RME9652_inp_0 | rme9652_encode_latency(7); | |
1842 | ||
1843 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1844 | ||
1845 | rme9652_reset_hw_pointer(rme9652); | |
1846 | rme9652_compute_period_size(rme9652); | |
1847 | ||
1848 | /* default: thru off for all channels */ | |
1849 | ||
1850 | for (k = 0; k < RME9652_NCHANNELS; ++k) | |
1851 | rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); | |
1852 | ||
1853 | rme9652->thru_bits = 0; | |
1854 | rme9652->passthru = 0; | |
1855 | ||
1856 | /* set a default rate so that the channel map is set up */ | |
1857 | ||
1858 | rme9652_set_rate(rme9652, 48000); | |
1859 | } | |
1860 | ||
7d12e780 | 1861 | static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) |
1da177e4 | 1862 | { |
abfd67bd | 1863 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; |
1da177e4 LT |
1864 | |
1865 | if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { | |
1866 | return IRQ_NONE; | |
1867 | } | |
1868 | ||
1869 | rme9652_write(rme9652, RME9652_irq_clear, 0); | |
1870 | ||
1871 | if (rme9652->capture_substream) { | |
1872 | snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); | |
1873 | } | |
1874 | ||
1875 | if (rme9652->playback_substream) { | |
1876 | snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); | |
1877 | } | |
1878 | return IRQ_HANDLED; | |
1879 | } | |
1880 | ||
abfd67bd | 1881 | static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1882 | { |
abfd67bd | 1883 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1884 | return rme9652_hw_pointer(rme9652); |
1885 | } | |
1886 | ||
abfd67bd | 1887 | static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, |
1da177e4 LT |
1888 | int stream, |
1889 | int channel) | |
1890 | ||
1891 | { | |
1892 | int mapped_channel; | |
1893 | ||
da3cec35 TI |
1894 | if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS)) |
1895 | return NULL; | |
1da177e4 LT |
1896 | |
1897 | if ((mapped_channel = rme9652->channel_map[channel]) < 0) { | |
1898 | return NULL; | |
1899 | } | |
1900 | ||
1901 | if (stream == SNDRV_PCM_STREAM_CAPTURE) { | |
1902 | return rme9652->capture_buffer + | |
1903 | (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); | |
1904 | } else { | |
1905 | return rme9652->playback_buffer + | |
1906 | (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); | |
1907 | } | |
1908 | } | |
1909 | ||
abfd67bd | 1910 | static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1911 | snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) |
1912 | { | |
abfd67bd | 1913 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1914 | char *channel_buf; |
1915 | ||
da3cec35 TI |
1916 | if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) |
1917 | return -EINVAL; | |
1da177e4 LT |
1918 | |
1919 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1920 | substream->pstr->stream, | |
1921 | channel); | |
da3cec35 TI |
1922 | if (snd_BUG_ON(!channel_buf)) |
1923 | return -EIO; | |
1da177e4 LT |
1924 | if (copy_from_user(channel_buf + pos * 4, src, count * 4)) |
1925 | return -EFAULT; | |
1926 | return count; | |
1927 | } | |
1928 | ||
abfd67bd | 1929 | static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1930 | snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) |
1931 | { | |
abfd67bd | 1932 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1933 | char *channel_buf; |
1934 | ||
da3cec35 TI |
1935 | if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) |
1936 | return -EINVAL; | |
1da177e4 LT |
1937 | |
1938 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1939 | substream->pstr->stream, | |
1940 | channel); | |
da3cec35 TI |
1941 | if (snd_BUG_ON(!channel_buf)) |
1942 | return -EIO; | |
1da177e4 LT |
1943 | if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) |
1944 | return -EFAULT; | |
1945 | return count; | |
1946 | } | |
1947 | ||
abfd67bd | 1948 | static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1949 | snd_pcm_uframes_t pos, snd_pcm_uframes_t count) |
1950 | { | |
abfd67bd | 1951 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1952 | char *channel_buf; |
1953 | ||
1954 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1955 | substream->pstr->stream, | |
1956 | channel); | |
da3cec35 TI |
1957 | if (snd_BUG_ON(!channel_buf)) |
1958 | return -EIO; | |
1da177e4 LT |
1959 | memset(channel_buf + pos * 4, 0, count * 4); |
1960 | return count; | |
1961 | } | |
1962 | ||
abfd67bd | 1963 | static int snd_rme9652_reset(struct snd_pcm_substream *substream) |
1da177e4 | 1964 | { |
abfd67bd TI |
1965 | struct snd_pcm_runtime *runtime = substream->runtime; |
1966 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); | |
1967 | struct snd_pcm_substream *other; | |
1da177e4 LT |
1968 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
1969 | other = rme9652->capture_substream; | |
1970 | else | |
1971 | other = rme9652->playback_substream; | |
1972 | if (rme9652->running) | |
1973 | runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); | |
1974 | else | |
1975 | runtime->status->hw_ptr = 0; | |
1976 | if (other) { | |
abfd67bd TI |
1977 | struct snd_pcm_substream *s; |
1978 | struct snd_pcm_runtime *oruntime = other->runtime; | |
ef991b95 | 1979 | snd_pcm_group_for_each_entry(s, substream) { |
1da177e4 LT |
1980 | if (s == other) { |
1981 | oruntime->status->hw_ptr = runtime->status->hw_ptr; | |
1982 | break; | |
1983 | } | |
1984 | } | |
1985 | } | |
1986 | return 0; | |
1987 | } | |
1988 | ||
abfd67bd TI |
1989 | static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, |
1990 | struct snd_pcm_hw_params *params) | |
1da177e4 | 1991 | { |
abfd67bd | 1992 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1993 | int err; |
1994 | pid_t this_pid; | |
1995 | pid_t other_pid; | |
1996 | ||
1997 | spin_lock_irq(&rme9652->lock); | |
1998 | ||
1999 | if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
2000 | rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); | |
2001 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); | |
2002 | this_pid = rme9652->playback_pid; | |
2003 | other_pid = rme9652->capture_pid; | |
2004 | } else { | |
2005 | this_pid = rme9652->capture_pid; | |
2006 | other_pid = rme9652->playback_pid; | |
2007 | } | |
2008 | ||
2009 | if ((other_pid > 0) && (this_pid != other_pid)) { | |
2010 | ||
2011 | /* The other stream is open, and not by the same | |
2012 | task as this one. Make sure that the parameters | |
2013 | that matter are the same. | |
2014 | */ | |
2015 | ||
2016 | if ((int)params_rate(params) != | |
2017 | rme9652_adat_sample_rate(rme9652)) { | |
2018 | spin_unlock_irq(&rme9652->lock); | |
2019 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); | |
2020 | return -EBUSY; | |
2021 | } | |
2022 | ||
2023 | if (params_period_size(params) != rme9652->period_bytes / 4) { | |
2024 | spin_unlock_irq(&rme9652->lock); | |
2025 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); | |
2026 | return -EBUSY; | |
2027 | } | |
2028 | ||
2029 | /* We're fine. */ | |
2030 | ||
2031 | spin_unlock_irq(&rme9652->lock); | |
2032 | return 0; | |
2033 | ||
2034 | } else { | |
2035 | spin_unlock_irq(&rme9652->lock); | |
2036 | } | |
2037 | ||
2038 | /* how to make sure that the rate matches an externally-set one ? | |
2039 | */ | |
2040 | ||
2041 | if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { | |
2042 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); | |
2043 | return err; | |
2044 | } | |
2045 | ||
2046 | if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { | |
2047 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); | |
2048 | return err; | |
2049 | } | |
2050 | ||
2051 | return 0; | |
2052 | } | |
2053 | ||
abfd67bd TI |
2054 | static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, |
2055 | struct snd_pcm_channel_info *info) | |
1da177e4 | 2056 | { |
abfd67bd | 2057 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2058 | int chn; |
2059 | ||
da3cec35 TI |
2060 | if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS)) |
2061 | return -EINVAL; | |
1da177e4 LT |
2062 | |
2063 | if ((chn = rme9652->channel_map[info->channel]) < 0) { | |
2064 | return -EINVAL; | |
2065 | } | |
2066 | ||
2067 | info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; | |
2068 | info->first = 0; | |
2069 | info->step = 32; | |
2070 | return 0; | |
2071 | } | |
2072 | ||
abfd67bd | 2073 | static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, |
1da177e4 LT |
2074 | unsigned int cmd, void *arg) |
2075 | { | |
2076 | switch (cmd) { | |
2077 | case SNDRV_PCM_IOCTL1_RESET: | |
2078 | { | |
2079 | return snd_rme9652_reset(substream); | |
2080 | } | |
2081 | case SNDRV_PCM_IOCTL1_CHANNEL_INFO: | |
2082 | { | |
abfd67bd | 2083 | struct snd_pcm_channel_info *info = arg; |
1da177e4 LT |
2084 | return snd_rme9652_channel_info(substream, info); |
2085 | } | |
2086 | default: | |
2087 | break; | |
2088 | } | |
2089 | ||
2090 | return snd_pcm_lib_ioctl(substream, cmd, arg); | |
2091 | } | |
2092 | ||
abfd67bd | 2093 | static void rme9652_silence_playback(struct snd_rme9652 *rme9652) |
1da177e4 LT |
2094 | { |
2095 | memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); | |
2096 | } | |
2097 | ||
abfd67bd | 2098 | static int snd_rme9652_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
2099 | int cmd) |
2100 | { | |
abfd67bd TI |
2101 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2102 | struct snd_pcm_substream *other; | |
1da177e4 LT |
2103 | int running; |
2104 | spin_lock(&rme9652->lock); | |
2105 | running = rme9652->running; | |
2106 | switch (cmd) { | |
2107 | case SNDRV_PCM_TRIGGER_START: | |
2108 | running |= 1 << substream->stream; | |
2109 | break; | |
2110 | case SNDRV_PCM_TRIGGER_STOP: | |
2111 | running &= ~(1 << substream->stream); | |
2112 | break; | |
2113 | default: | |
2114 | snd_BUG(); | |
2115 | spin_unlock(&rme9652->lock); | |
2116 | return -EINVAL; | |
2117 | } | |
2118 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
2119 | other = rme9652->capture_substream; | |
2120 | else | |
2121 | other = rme9652->playback_substream; | |
2122 | ||
2123 | if (other) { | |
abfd67bd | 2124 | struct snd_pcm_substream *s; |
ef991b95 | 2125 | snd_pcm_group_for_each_entry(s, substream) { |
1da177e4 LT |
2126 | if (s == other) { |
2127 | snd_pcm_trigger_done(s, substream); | |
2128 | if (cmd == SNDRV_PCM_TRIGGER_START) | |
2129 | running |= 1 << s->stream; | |
2130 | else | |
2131 | running &= ~(1 << s->stream); | |
2132 | goto _ok; | |
2133 | } | |
2134 | } | |
2135 | if (cmd == SNDRV_PCM_TRIGGER_START) { | |
2136 | if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && | |
2137 | substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
2138 | rme9652_silence_playback(rme9652); | |
2139 | } else { | |
2140 | if (running && | |
2141 | substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
2142 | rme9652_silence_playback(rme9652); | |
2143 | } | |
2144 | } else { | |
2145 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
2146 | rme9652_silence_playback(rme9652); | |
2147 | } | |
2148 | _ok: | |
2149 | snd_pcm_trigger_done(substream, substream); | |
2150 | if (!rme9652->running && running) | |
2151 | rme9652_start(rme9652); | |
2152 | else if (rme9652->running && !running) | |
2153 | rme9652_stop(rme9652); | |
2154 | rme9652->running = running; | |
2155 | spin_unlock(&rme9652->lock); | |
2156 | ||
2157 | return 0; | |
2158 | } | |
2159 | ||
abfd67bd | 2160 | static int snd_rme9652_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 2161 | { |
abfd67bd | 2162 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2163 | unsigned long flags; |
2164 | int result = 0; | |
2165 | ||
2166 | spin_lock_irqsave(&rme9652->lock, flags); | |
2167 | if (!rme9652->running) | |
2168 | rme9652_reset_hw_pointer(rme9652); | |
2169 | spin_unlock_irqrestore(&rme9652->lock, flags); | |
2170 | return result; | |
2171 | } | |
2172 | ||
abfd67bd | 2173 | static struct snd_pcm_hardware snd_rme9652_playback_subinfo = |
1da177e4 LT |
2174 | { |
2175 | .info = (SNDRV_PCM_INFO_MMAP | | |
2176 | SNDRV_PCM_INFO_MMAP_VALID | | |
2177 | SNDRV_PCM_INFO_NONINTERLEAVED | | |
2178 | SNDRV_PCM_INFO_SYNC_START | | |
2179 | SNDRV_PCM_INFO_DOUBLE), | |
2180 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2181 | .rates = (SNDRV_PCM_RATE_44100 | | |
2182 | SNDRV_PCM_RATE_48000 | | |
2183 | SNDRV_PCM_RATE_88200 | | |
2184 | SNDRV_PCM_RATE_96000), | |
2185 | .rate_min = 44100, | |
2186 | .rate_max = 96000, | |
2187 | .channels_min = 10, | |
2188 | .channels_max = 26, | |
2189 | .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, | |
2190 | .period_bytes_min = (64 * 4) * 10, | |
2191 | .period_bytes_max = (8192 * 4) * 26, | |
2192 | .periods_min = 2, | |
2193 | .periods_max = 2, | |
2194 | .fifo_size = 0, | |
2195 | }; | |
2196 | ||
abfd67bd | 2197 | static struct snd_pcm_hardware snd_rme9652_capture_subinfo = |
1da177e4 LT |
2198 | { |
2199 | .info = (SNDRV_PCM_INFO_MMAP | | |
2200 | SNDRV_PCM_INFO_MMAP_VALID | | |
2201 | SNDRV_PCM_INFO_NONINTERLEAVED | | |
2202 | SNDRV_PCM_INFO_SYNC_START), | |
2203 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2204 | .rates = (SNDRV_PCM_RATE_44100 | | |
2205 | SNDRV_PCM_RATE_48000 | | |
2206 | SNDRV_PCM_RATE_88200 | | |
2207 | SNDRV_PCM_RATE_96000), | |
2208 | .rate_min = 44100, | |
2209 | .rate_max = 96000, | |
2210 | .channels_min = 10, | |
2211 | .channels_max = 26, | |
2212 | .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, | |
2213 | .period_bytes_min = (64 * 4) * 10, | |
2214 | .period_bytes_max = (8192 * 4) * 26, | |
2215 | .periods_min = 2, | |
2216 | .periods_max = 2, | |
2217 | .fifo_size = 0, | |
2218 | }; | |
2219 | ||
2220 | static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; | |
2221 | ||
abfd67bd | 2222 | static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { |
1da177e4 LT |
2223 | .count = ARRAY_SIZE(period_sizes), |
2224 | .list = period_sizes, | |
2225 | .mask = 0 | |
2226 | }; | |
2227 | ||
abfd67bd TI |
2228 | static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, |
2229 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2230 | { |
abfd67bd TI |
2231 | struct snd_rme9652 *rme9652 = rule->private; |
2232 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
1da177e4 LT |
2233 | unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; |
2234 | return snd_interval_list(c, 2, list, 0); | |
2235 | } | |
2236 | ||
abfd67bd TI |
2237 | static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, |
2238 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2239 | { |
abfd67bd TI |
2240 | struct snd_rme9652 *rme9652 = rule->private; |
2241 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
2242 | struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); | |
1da177e4 | 2243 | if (r->min > 48000) { |
abfd67bd | 2244 | struct snd_interval t = { |
1da177e4 LT |
2245 | .min = rme9652->ds_channels, |
2246 | .max = rme9652->ds_channels, | |
2247 | .integer = 1, | |
2248 | }; | |
2249 | return snd_interval_refine(c, &t); | |
2250 | } else if (r->max < 88200) { | |
abfd67bd | 2251 | struct snd_interval t = { |
1da177e4 LT |
2252 | .min = rme9652->ss_channels, |
2253 | .max = rme9652->ss_channels, | |
2254 | .integer = 1, | |
2255 | }; | |
2256 | return snd_interval_refine(c, &t); | |
2257 | } | |
2258 | return 0; | |
2259 | } | |
2260 | ||
abfd67bd TI |
2261 | static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, |
2262 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2263 | { |
abfd67bd TI |
2264 | struct snd_rme9652 *rme9652 = rule->private; |
2265 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
2266 | struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); | |
1da177e4 | 2267 | if (c->min >= rme9652->ss_channels) { |
abfd67bd | 2268 | struct snd_interval t = { |
1da177e4 LT |
2269 | .min = 44100, |
2270 | .max = 48000, | |
2271 | .integer = 1, | |
2272 | }; | |
2273 | return snd_interval_refine(r, &t); | |
2274 | } else if (c->max <= rme9652->ds_channels) { | |
abfd67bd | 2275 | struct snd_interval t = { |
1da177e4 LT |
2276 | .min = 88200, |
2277 | .max = 96000, | |
2278 | .integer = 1, | |
2279 | }; | |
2280 | return snd_interval_refine(r, &t); | |
2281 | } | |
2282 | return 0; | |
2283 | } | |
2284 | ||
abfd67bd | 2285 | static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 2286 | { |
abfd67bd TI |
2287 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2288 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
2289 | |
2290 | spin_lock_irq(&rme9652->lock); | |
2291 | ||
2292 | snd_pcm_set_sync(substream); | |
2293 | ||
2294 | runtime->hw = snd_rme9652_playback_subinfo; | |
2295 | runtime->dma_area = rme9652->playback_buffer; | |
2296 | runtime->dma_bytes = RME9652_DMA_AREA_BYTES; | |
2297 | ||
2298 | if (rme9652->capture_substream == NULL) { | |
2299 | rme9652_stop(rme9652); | |
2300 | rme9652_set_thru(rme9652, -1, 0); | |
2301 | } | |
2302 | ||
2303 | rme9652->playback_pid = current->pid; | |
2304 | rme9652->playback_substream = substream; | |
2305 | ||
2306 | spin_unlock_irq(&rme9652->lock); | |
2307 | ||
2308 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
2309 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); | |
2310 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2311 | snd_rme9652_hw_rule_channels, rme9652, | |
2312 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2313 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2314 | snd_rme9652_hw_rule_channels_rate, rme9652, | |
2315 | SNDRV_PCM_HW_PARAM_RATE, -1); | |
2316 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
2317 | snd_rme9652_hw_rule_rate_channels, rme9652, | |
2318 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2319 | ||
2320 | rme9652->creg_spdif_stream = rme9652->creg_spdif; | |
2321 | rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
2322 | snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
2323 | SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); | |
2324 | return 0; | |
2325 | } | |
2326 | ||
abfd67bd | 2327 | static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) |
1da177e4 | 2328 | { |
abfd67bd | 2329 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2330 | |
2331 | spin_lock_irq(&rme9652->lock); | |
2332 | ||
2333 | rme9652->playback_pid = -1; | |
2334 | rme9652->playback_substream = NULL; | |
2335 | ||
2336 | spin_unlock_irq(&rme9652->lock); | |
2337 | ||
2338 | rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
2339 | snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
2340 | SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); | |
2341 | return 0; | |
2342 | } | |
2343 | ||
2344 | ||
abfd67bd | 2345 | static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 2346 | { |
abfd67bd TI |
2347 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2348 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
2349 | |
2350 | spin_lock_irq(&rme9652->lock); | |
2351 | ||
2352 | snd_pcm_set_sync(substream); | |
2353 | ||
2354 | runtime->hw = snd_rme9652_capture_subinfo; | |
2355 | runtime->dma_area = rme9652->capture_buffer; | |
2356 | runtime->dma_bytes = RME9652_DMA_AREA_BYTES; | |
2357 | ||
2358 | if (rme9652->playback_substream == NULL) { | |
2359 | rme9652_stop(rme9652); | |
2360 | rme9652_set_thru(rme9652, -1, 0); | |
2361 | } | |
2362 | ||
2363 | rme9652->capture_pid = current->pid; | |
2364 | rme9652->capture_substream = substream; | |
2365 | ||
2366 | spin_unlock_irq(&rme9652->lock); | |
2367 | ||
2368 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
2369 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); | |
2370 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2371 | snd_rme9652_hw_rule_channels, rme9652, | |
2372 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2373 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2374 | snd_rme9652_hw_rule_channels_rate, rme9652, | |
2375 | SNDRV_PCM_HW_PARAM_RATE, -1); | |
2376 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
2377 | snd_rme9652_hw_rule_rate_channels, rme9652, | |
2378 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2379 | return 0; | |
2380 | } | |
2381 | ||
abfd67bd | 2382 | static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) |
1da177e4 | 2383 | { |
abfd67bd | 2384 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2385 | |
2386 | spin_lock_irq(&rme9652->lock); | |
2387 | ||
2388 | rme9652->capture_pid = -1; | |
2389 | rme9652->capture_substream = NULL; | |
2390 | ||
2391 | spin_unlock_irq(&rme9652->lock); | |
2392 | return 0; | |
2393 | } | |
2394 | ||
abfd67bd | 2395 | static struct snd_pcm_ops snd_rme9652_playback_ops = { |
1da177e4 LT |
2396 | .open = snd_rme9652_playback_open, |
2397 | .close = snd_rme9652_playback_release, | |
2398 | .ioctl = snd_rme9652_ioctl, | |
2399 | .hw_params = snd_rme9652_hw_params, | |
2400 | .prepare = snd_rme9652_prepare, | |
2401 | .trigger = snd_rme9652_trigger, | |
2402 | .pointer = snd_rme9652_hw_pointer, | |
2403 | .copy = snd_rme9652_playback_copy, | |
2404 | .silence = snd_rme9652_hw_silence, | |
2405 | }; | |
2406 | ||
abfd67bd | 2407 | static struct snd_pcm_ops snd_rme9652_capture_ops = { |
1da177e4 LT |
2408 | .open = snd_rme9652_capture_open, |
2409 | .close = snd_rme9652_capture_release, | |
2410 | .ioctl = snd_rme9652_ioctl, | |
2411 | .hw_params = snd_rme9652_hw_params, | |
2412 | .prepare = snd_rme9652_prepare, | |
2413 | .trigger = snd_rme9652_trigger, | |
2414 | .pointer = snd_rme9652_hw_pointer, | |
2415 | .copy = snd_rme9652_capture_copy, | |
2416 | }; | |
2417 | ||
abfd67bd TI |
2418 | static int __devinit snd_rme9652_create_pcm(struct snd_card *card, |
2419 | struct snd_rme9652 *rme9652) | |
1da177e4 | 2420 | { |
abfd67bd | 2421 | struct snd_pcm *pcm; |
1da177e4 LT |
2422 | int err; |
2423 | ||
2424 | if ((err = snd_pcm_new(card, | |
2425 | rme9652->card_name, | |
2426 | 0, 1, 1, &pcm)) < 0) { | |
2427 | return err; | |
2428 | } | |
2429 | ||
2430 | rme9652->pcm = pcm; | |
2431 | pcm->private_data = rme9652; | |
2432 | strcpy(pcm->name, rme9652->card_name); | |
2433 | ||
2434 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); | |
2435 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); | |
2436 | ||
2437 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; | |
2438 | ||
2439 | return 0; | |
2440 | } | |
2441 | ||
abfd67bd TI |
2442 | static int __devinit snd_rme9652_create(struct snd_card *card, |
2443 | struct snd_rme9652 *rme9652, | |
1da177e4 LT |
2444 | int precise_ptr) |
2445 | { | |
2446 | struct pci_dev *pci = rme9652->pci; | |
2447 | int err; | |
2448 | int status; | |
2449 | unsigned short rev; | |
2450 | ||
2451 | rme9652->irq = -1; | |
2452 | rme9652->card = card; | |
2453 | ||
2454 | pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); | |
2455 | ||
2456 | switch (rev & 0xff) { | |
2457 | case 3: | |
2458 | case 4: | |
2459 | case 8: | |
2460 | case 9: | |
2461 | break; | |
2462 | ||
2463 | default: | |
2464 | /* who knows? */ | |
2465 | return -ENODEV; | |
2466 | } | |
2467 | ||
2468 | if ((err = pci_enable_device(pci)) < 0) | |
2469 | return err; | |
2470 | ||
2471 | spin_lock_init(&rme9652->lock); | |
2472 | ||
2473 | if ((err = pci_request_regions(pci, "rme9652")) < 0) | |
2474 | return err; | |
2475 | rme9652->port = pci_resource_start(pci, 0); | |
2476 | rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); | |
2477 | if (rme9652->iobase == NULL) { | |
99b359ba | 2478 | snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); |
1da177e4 LT |
2479 | return -EBUSY; |
2480 | } | |
2481 | ||
437a5a46 TI |
2482 | if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, |
2483 | "rme9652", rme9652)) { | |
99b359ba | 2484 | snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq); |
1da177e4 LT |
2485 | return -EBUSY; |
2486 | } | |
2487 | rme9652->irq = pci->irq; | |
2488 | rme9652->precise_ptr = precise_ptr; | |
2489 | ||
2490 | /* Determine the h/w rev level of the card. This seems like | |
2491 | a particularly kludgy way to encode it, but its what RME | |
2492 | chose to do, so we follow them ... | |
2493 | */ | |
2494 | ||
2495 | status = rme9652_read(rme9652, RME9652_status_register); | |
2496 | if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { | |
2497 | rme9652->hw_rev = 15; | |
2498 | } else { | |
2499 | rme9652->hw_rev = 11; | |
2500 | } | |
2501 | ||
2502 | /* Differentiate between the standard Hammerfall, and the | |
2503 | "Light", which does not have the expansion board. This | |
2504 | method comes from information received from Mathhias | |
2505 | Clausen at RME. Display the EEPROM and h/w revID where | |
2506 | relevant. | |
2507 | */ | |
2508 | ||
2509 | switch (rev) { | |
2510 | case 8: /* original eprom */ | |
2511 | strcpy(card->driver, "RME9636"); | |
2512 | if (rme9652->hw_rev == 15) { | |
2513 | rme9652->card_name = "RME Digi9636 (Rev 1.5)"; | |
2514 | } else { | |
2515 | rme9652->card_name = "RME Digi9636"; | |
2516 | } | |
2517 | rme9652->ss_channels = RME9636_NCHANNELS; | |
2518 | break; | |
2519 | case 9: /* W36_G EPROM */ | |
2520 | strcpy(card->driver, "RME9636"); | |
2521 | rme9652->card_name = "RME Digi9636 (Rev G)"; | |
2522 | rme9652->ss_channels = RME9636_NCHANNELS; | |
2523 | break; | |
2524 | case 4: /* W52_G EPROM */ | |
2525 | strcpy(card->driver, "RME9652"); | |
2526 | rme9652->card_name = "RME Digi9652 (Rev G)"; | |
2527 | rme9652->ss_channels = RME9652_NCHANNELS; | |
2528 | break; | |
2529 | case 3: /* original eprom */ | |
2530 | strcpy(card->driver, "RME9652"); | |
2531 | if (rme9652->hw_rev == 15) { | |
2532 | rme9652->card_name = "RME Digi9652 (Rev 1.5)"; | |
2533 | } else { | |
2534 | rme9652->card_name = "RME Digi9652"; | |
2535 | } | |
2536 | rme9652->ss_channels = RME9652_NCHANNELS; | |
2537 | break; | |
2538 | } | |
2539 | ||
2540 | rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; | |
2541 | ||
2542 | pci_set_master(rme9652->pci); | |
2543 | ||
2544 | if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { | |
2545 | return err; | |
2546 | } | |
2547 | ||
2548 | if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { | |
2549 | return err; | |
2550 | } | |
2551 | ||
2552 | if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { | |
2553 | return err; | |
2554 | } | |
2555 | ||
2556 | snd_rme9652_proc_init(rme9652); | |
2557 | ||
2558 | rme9652->last_spdif_sample_rate = -1; | |
2559 | rme9652->last_adat_sample_rate = -1; | |
2560 | rme9652->playback_pid = -1; | |
2561 | rme9652->capture_pid = -1; | |
2562 | rme9652->capture_substream = NULL; | |
2563 | rme9652->playback_substream = NULL; | |
2564 | ||
2565 | snd_rme9652_set_defaults(rme9652); | |
2566 | ||
2567 | if (rme9652->hw_rev == 15) { | |
2568 | rme9652_initialize_spdif_receiver (rme9652); | |
2569 | } | |
2570 | ||
2571 | return 0; | |
2572 | } | |
2573 | ||
abfd67bd | 2574 | static void snd_rme9652_card_free(struct snd_card *card) |
1da177e4 | 2575 | { |
abfd67bd | 2576 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; |
1da177e4 LT |
2577 | |
2578 | if (rme9652) | |
2579 | snd_rme9652_free(rme9652); | |
2580 | } | |
2581 | ||
2582 | static int __devinit snd_rme9652_probe(struct pci_dev *pci, | |
2583 | const struct pci_device_id *pci_id) | |
2584 | { | |
2585 | static int dev; | |
abfd67bd TI |
2586 | struct snd_rme9652 *rme9652; |
2587 | struct snd_card *card; | |
1da177e4 LT |
2588 | int err; |
2589 | ||
2590 | if (dev >= SNDRV_CARDS) | |
2591 | return -ENODEV; | |
2592 | if (!enable[dev]) { | |
2593 | dev++; | |
2594 | return -ENOENT; | |
2595 | } | |
2596 | ||
e58de7ba TI |
2597 | err = snd_card_create(index[dev], id[dev], THIS_MODULE, |
2598 | sizeof(struct snd_rme9652), &card); | |
1da177e4 | 2599 | |
e58de7ba TI |
2600 | if (err < 0) |
2601 | return err; | |
1da177e4 | 2602 | |
abfd67bd | 2603 | rme9652 = (struct snd_rme9652 *) card->private_data; |
1da177e4 LT |
2604 | card->private_free = snd_rme9652_card_free; |
2605 | rme9652->dev = dev; | |
2606 | rme9652->pci = pci; | |
2607 | snd_card_set_dev(card, &pci->dev); | |
2608 | ||
2609 | if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { | |
2610 | snd_card_free(card); | |
2611 | return err; | |
2612 | } | |
2613 | ||
2614 | strcpy(card->shortname, rme9652->card_name); | |
2615 | ||
2616 | sprintf(card->longname, "%s at 0x%lx, irq %d", | |
2617 | card->shortname, rme9652->port, rme9652->irq); | |
2618 | ||
2619 | ||
2620 | if ((err = snd_card_register(card)) < 0) { | |
2621 | snd_card_free(card); | |
2622 | return err; | |
2623 | } | |
2624 | pci_set_drvdata(pci, card); | |
2625 | dev++; | |
2626 | return 0; | |
2627 | } | |
2628 | ||
2629 | static void __devexit snd_rme9652_remove(struct pci_dev *pci) | |
2630 | { | |
2631 | snd_card_free(pci_get_drvdata(pci)); | |
2632 | pci_set_drvdata(pci, NULL); | |
2633 | } | |
2634 | ||
2635 | static struct pci_driver driver = { | |
2636 | .name = "RME Digi9652 (Hammerfall)", | |
2637 | .id_table = snd_rme9652_ids, | |
2638 | .probe = snd_rme9652_probe, | |
2639 | .remove = __devexit_p(snd_rme9652_remove), | |
2640 | }; | |
2641 | ||
2642 | static int __init alsa_card_hammerfall_init(void) | |
2643 | { | |
01d25d46 | 2644 | return pci_register_driver(&driver); |
1da177e4 LT |
2645 | } |
2646 | ||
2647 | static void __exit alsa_card_hammerfall_exit(void) | |
2648 | { | |
2649 | pci_unregister_driver(&driver); | |
2650 | } | |
2651 | ||
2652 | module_init(alsa_card_hammerfall_init) | |
2653 | module_exit(alsa_card_hammerfall_exit) |