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[ALSA] Add the definition of linear volume TLV
[deliverable/linux.git] / sound / pci / ymfpci / ymfpci_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * BUGS:
6 * --
7 *
8 * TODO:
9 * --
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27#include <sound/driver.h>
28#include <linux/delay.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
32#include <linux/sched.h>
33#include <linux/slab.h>
34#include <linux/vmalloc.h>
35
36#include <sound/core.h>
37#include <sound/control.h>
38#include <sound/info.h>
39#include <sound/ymfpci.h>
40#include <sound/asoundef.h>
41#include <sound/mpu401.h>
42
43#include <asm/io.h>
44
45/*
46 * constants
47 */
48
49/*
50 * common I/O routines
51 */
52
208a1b4c 53static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 54
208a1b4c 55static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 56{
57 return readb(chip->reg_area_virt + offset);
58}
59
208a1b4c 60static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT		 61{
62 writeb(val, chip->reg_area_virt + offset);
63}
64
208a1b4c 65static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 66{
67 return readw(chip->reg_area_virt + offset);
68}
69
208a1b4c 70static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT		 71{
72 writew(val, chip->reg_area_virt + offset);
73}
74
208a1b4c 75static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 76{
77 return readl(chip->reg_area_virt + offset);
78}
79
208a1b4c 80static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT		 81{
82 writel(val, chip->reg_area_virt + offset);
83}
84
208a1b4c 85static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 86{
ef21ca24 87 unsigned long end_time;
1da177e4
LT		 88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
89
ef21ca24 90 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 91 do {
92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
93 return 0;
94 set_current_state(TASK_UNINTERRUPTIBLE);
8433a509 95 schedule_timeout_uninterruptible(1);
ef21ca24 96 } while (time_before(jiffies, end_time));
99b359ba 97 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT		 98 return -EBUSY;
99}
100
208a1b4c 101static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 102{
208a1b4c 103 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 104 u32 cmd;
105
106 snd_ymfpci_codec_ready(chip, 0);
107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
109}
110
208a1b4c 111static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 112{
208a1b4c 113 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 114
115 if (snd_ymfpci_codec_ready(chip, 0))
116 return ~0;
117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
118 if (snd_ymfpci_codec_ready(chip, 0))
119 return ~0;
120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
121 int i;
122 for (i = 0; i < 600; i++)
123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
124 }
125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
126}
127
128/*
129 * Misc routines
130 */
131
132static u32 snd_ymfpci_calc_delta(u32 rate)
133{
134 switch (rate) {
135 case 8000: return 0x02aaab00;
136 case 11025: return 0x03accd00;
137 case 16000: return 0x05555500;
138 case 22050: return 0x07599a00;
139 case 32000: return 0x0aaaab00;
140 case 44100: return 0x0eb33300;
141 default: return ((rate << 16) / 375) << 5;
142 }
143}
144
145static u32 def_rate[8] = {
146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
147};
148
149static u32 snd_ymfpci_calc_lpfK(u32 rate)
150{
151 u32 i;
152 static u32 val[8] = {
153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
155 };
156
157 if (rate == 44100)
158 return 0x40000000; /* FIXME: What's the right value? */
159 for (i = 0; i < 8; i++)
160 if (rate <= def_rate[i])
161 return val[i];
162 return val[0];
163}
164
165static u32 snd_ymfpci_calc_lpfQ(u32 rate)
166{
167 u32 i;
168 static u32 val[8] = {
169 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
171 };
172
173 if (rate == 44100)
174 return 0x370A0000;
175 for (i = 0; i < 8; i++)
176 if (rate <= def_rate[i])
177 return val[i];
178 return val[0];
179}
180
181/*
182 * Hardware start management
183 */
184
208a1b4c 185static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT		 186{
187 unsigned long flags;
188
189 spin_lock_irqsave(&chip->reg_lock, flags);
190 if (chip->start_count++ > 0)
191 goto __end;
192 snd_ymfpci_writel(chip, YDSXGR_MODE,
193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
195 __end:
196 spin_unlock_irqrestore(&chip->reg_lock, flags);
197}
198
208a1b4c 199static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT		 200{
201 unsigned long flags;
202 long timeout = 1000;
203
204 spin_lock_irqsave(&chip->reg_lock, flags);
205 if (--chip->start_count > 0)
206 goto __end;
207 snd_ymfpci_writel(chip, YDSXGR_MODE,
208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
209 while (timeout-- > 0) {
210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
211 break;
212 }
213 if (atomic_read(&chip->interrupt_sleep_count)) {
214 atomic_set(&chip->interrupt_sleep_count, 0);
215 wake_up(&chip->interrupt_sleep);
216 }
217 __end:
218 spin_unlock_irqrestore(&chip->reg_lock, flags);
219}
220
221/*
222 * Playback voice management
223 */
224
208a1b4c
TI		 225static int voice_alloc(struct snd_ymfpci *chip,
226 enum snd_ymfpci_voice_type type, int pair,
227 struct snd_ymfpci_voice **rvoice)
1da177e4 228{
208a1b4c 229 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT		 230 int idx;
231
232 *rvoice = NULL;
233 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
234 voice = &chip->voices[idx];
235 voice2 = pair ? &chip->voices[idx+1] : NULL;
236 if (voice->use || (voice2 && voice2->use))
237 continue;
238 voice->use = 1;
239 if (voice2)
240 voice2->use = 1;
241 switch (type) {
242 case YMFPCI_PCM:
243 voice->pcm = 1;
244 if (voice2)
245 voice2->pcm = 1;
246 break;
247 case YMFPCI_SYNTH:
248 voice->synth = 1;
249 break;
250 case YMFPCI_MIDI:
251 voice->midi = 1;
252 break;
253 }
254 snd_ymfpci_hw_start(chip);
255 if (voice2)
256 snd_ymfpci_hw_start(chip);
257 *rvoice = voice;
258 return 0;
259 }
260 return -ENOMEM;
261}
262
208a1b4c
TI		 263static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
264 enum snd_ymfpci_voice_type type, int pair,
265 struct snd_ymfpci_voice **rvoice)
1da177e4
LT		 266{
267 unsigned long flags;
268 int result;
269
270 snd_assert(rvoice != NULL, return -EINVAL);
271 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
272
273 spin_lock_irqsave(&chip->voice_lock, flags);
274 for (;;) {
275 result = voice_alloc(chip, type, pair, rvoice);
276 if (result == 0 || type != YMFPCI_PCM)
277 break;
278 /* TODO: synth/midi voice deallocation */
279 break;
280 }
281 spin_unlock_irqrestore(&chip->voice_lock, flags);
282 return result;
283}
284
208a1b4c 285static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT		 286{
287 unsigned long flags;
288
289 snd_assert(pvoice != NULL, return -EINVAL);
290 snd_ymfpci_hw_stop(chip);
291 spin_lock_irqsave(&chip->voice_lock, flags);
292 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
293 pvoice->ypcm = NULL;
294 pvoice->interrupt = NULL;
295 spin_unlock_irqrestore(&chip->voice_lock, flags);
296 return 0;
297}
298
299/*
300 * PCM part
301 */
302
208a1b4c 303static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 304{
208a1b4c 305 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 306 u32 pos, delta;
307
308 if ((ypcm = voice->ypcm) == NULL)
309 return;
310 if (ypcm->substream == NULL)
311 return;
312 spin_lock(&chip->reg_lock);
313 if (ypcm->running) {
314 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
315 if (pos < ypcm->last_pos)
316 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
317 else
318 delta = pos - ypcm->last_pos;
319 ypcm->period_pos += delta;
320 ypcm->last_pos = pos;
321 if (ypcm->period_pos >= ypcm->period_size) {
322 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
323 ypcm->period_pos %= ypcm->period_size;
324 spin_unlock(&chip->reg_lock);
325 snd_pcm_period_elapsed(ypcm->substream);
326 spin_lock(&chip->reg_lock);
327 }
9bcf6551
CL		 328
329 if (unlikely(ypcm->update_pcm_vol)) {
330 unsigned int subs = ypcm->substream->number;
331 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 332 struct snd_ymfpci_playback_bank *bank;
9bcf6551
CL		 333 u32 volume;
334
335 bank = &voice->bank[next_bank];
336 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
337 bank->left_gain_end = volume;
338 if (ypcm->output_rear)
339 bank->eff2_gain_end = volume;
340 if (ypcm->voices[1])
341 bank = &ypcm->voices[1]->bank[next_bank];
342 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
343 bank->right_gain_end = volume;
344 if (ypcm->output_rear)
345 bank->eff3_gain_end = volume;
346 ypcm->update_pcm_vol--;
347 }
1da177e4
LT		 348 }
349 spin_unlock(&chip->reg_lock);
350}
351
208a1b4c 352static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 353{
208a1b4c
TI		 354 struct snd_pcm_runtime *runtime = substream->runtime;
355 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
356 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT		 357 u32 pos, delta;
358
359 spin_lock(&chip->reg_lock);
360 if (ypcm->running) {
361 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
362 if (pos < ypcm->last_pos)
363 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
364 else
365 delta = pos - ypcm->last_pos;
366 ypcm->period_pos += delta;
367 ypcm->last_pos = pos;
368 if (ypcm->period_pos >= ypcm->period_size) {
369 ypcm->period_pos %= ypcm->period_size;
370 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
371 spin_unlock(&chip->reg_lock);
372 snd_pcm_period_elapsed(substream);
373 spin_lock(&chip->reg_lock);
374 }
375 }
376 spin_unlock(&chip->reg_lock);
377}
378
208a1b4c 379static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 380 int cmd)
381{
208a1b4c
TI		 382 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
383 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 384 int result = 0;
385
386 spin_lock(&chip->reg_lock);
387 if (ypcm->voices[0] == NULL) {
388 result = -EINVAL;
389 goto __unlock;
390 }
391 switch (cmd) {
392 case SNDRV_PCM_TRIGGER_START:
393 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
394 case SNDRV_PCM_TRIGGER_RESUME:
395 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
396 if (ypcm->voices[1] != NULL)
397 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
398 ypcm->running = 1;
399 break;
400 case SNDRV_PCM_TRIGGER_STOP:
401 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
402 case SNDRV_PCM_TRIGGER_SUSPEND:
403 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
404 if (ypcm->voices[1] != NULL)
405 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
406 ypcm->running = 0;
407 break;
408 default:
409 result = -EINVAL;
410 break;
411 }
412 __unlock:
413 spin_unlock(&chip->reg_lock);
414 return result;
415}
208a1b4c 416static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 417 int cmd)
418{
208a1b4c
TI		 419 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
420 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 421 int result = 0;
422 u32 tmp;
423
424 spin_lock(&chip->reg_lock);
425 switch (cmd) {
426 case SNDRV_PCM_TRIGGER_START:
427 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
428 case SNDRV_PCM_TRIGGER_RESUME:
429 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
430 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
431 ypcm->running = 1;
432 break;
433 case SNDRV_PCM_TRIGGER_STOP:
434 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
435 case SNDRV_PCM_TRIGGER_SUSPEND:
436 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
437 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
438 ypcm->running = 0;
439 break;
440 default:
441 result = -EINVAL;
442 break;
443 }
444 spin_unlock(&chip->reg_lock);
445 return result;
446}
447
208a1b4c 448static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT		 449{
450 int err;
451
452 if (ypcm->voices[1] != NULL && voices < 2) {
453 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
454 ypcm->voices[1] = NULL;
455 }
456 if (voices == 1 && ypcm->voices[0] != NULL)
457 return 0; /* already allocated */
458 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
459 return 0; /* already allocated */
460 if (voices > 1) {
461 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
462 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
463 ypcm->voices[0] = NULL;
464 }
465 }
466 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
467 if (err < 0)
468 return err;
469 ypcm->voices[0]->ypcm = ypcm;
470 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
471 if (voices > 1) {
472 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
473 ypcm->voices[1]->ypcm = ypcm;
474 }
475 return 0;
476}
477
208a1b4c
TI		 478static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
479 struct snd_pcm_runtime *runtime,
9bcf6551 480 int has_pcm_volume)
1da177e4 481{
208a1b4c 482 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 483 u32 format;
9bcf6551
CL		 484 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
485 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
486 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 487 struct snd_ymfpci_playback_bank *bank;
1da177e4 488 unsigned int nbank;
9bcf6551
CL		 489 u32 vol_left, vol_right;
490 u8 use_left, use_right;
1da177e4
LT		 491
492 snd_assert(voice != NULL, return);
9bcf6551
CL		 493 if (runtime->channels == 1) {
494 use_left = 1;
495 use_right = 1;
496 } else {
497 use_left = (voiceidx & 1) == 0;
498 use_right = !use_left;
499 }
500 if (has_pcm_volume) {
501 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
502 [ypcm->substream->number].left << 15);
503 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
504 [ypcm->substream->number].right << 15);
505 } else {
506 vol_left = cpu_to_le32(0x40000000);
507 vol_right = cpu_to_le32(0x40000000);
508 }
509 format = runtime->channels == 2 ? 0x00010000 : 0;
510 if (snd_pcm_format_width(runtime->format) == 8)
511 format |= 0x80000000;
512 if (runtime->channels == 2 && (voiceidx & 1) != 0)
513 format |= 1;
1da177e4
LT		 514 for (nbank = 0; nbank < 2; nbank++) {
515 bank = &voice->bank[nbank];
9bcf6551 516 memset(bank, 0, sizeof(*bank));
1da177e4 517 bank->format = cpu_to_le32(format);
9bcf6551
CL		 518 bank->base = cpu_to_le32(runtime->dma_addr);
519 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 520 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT		 521 bank->delta =
522 bank->delta_end = cpu_to_le32(delta);
523 bank->lpfK =
524 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL		 525 bank->eg_gain =
526 bank->eg_gain_end = cpu_to_le32(0x40000000);
527
528 if (ypcm->output_front) {
529 if (use_left) {
530 bank->left_gain =
531 bank->left_gain_end = vol_left;
532 }
533 if (use_right) {
1da177e4 534 bank->right_gain =
9bcf6551 535 bank->right_gain_end = vol_right;
1da177e4 536 }
9bcf6551
CL		 537 }
538 if (ypcm->output_rear) {
5a25c5cf
JK		 539 if (!ypcm->swap_rear) {
540 if (use_left) {
541 bank->eff2_gain =
542 bank->eff2_gain_end = vol_left;
543 }
544 if (use_right) {
545 bank->eff3_gain =
546 bank->eff3_gain_end = vol_right;
547 }
548 } else {
549 /* The SPDIF out channels seem to be swapped, so we have
550 * to swap them here, too. The rear analog out channels
551 * will be wrong, but otherwise AC3 would not work.
552 */
553 if (use_left) {
554 bank->eff3_gain =
555 bank->eff3_gain_end = vol_left;
556 }
557 if (use_right) {
558 bank->eff2_gain =
559 bank->eff2_gain_end = vol_right;
560 }
561 }
562 }
1da177e4
LT		 563 }
564}
565
208a1b4c 566static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4
LT		 567{
568 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
569 4096, &chip->ac3_tmp_base) < 0)
570 return -ENOMEM;
571
572 chip->bank_effect[3][0]->base =
573 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
574 chip->bank_effect[3][0]->loop_end =
575 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
576 chip->bank_effect[4][0]->base =
577 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
578 chip->bank_effect[4][0]->loop_end =
579 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
580
581 spin_lock_irq(&chip->reg_lock);
582 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
583 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
584 spin_unlock_irq(&chip->reg_lock);
585 return 0;
586}
587
208a1b4c 588static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT		 589{
590 spin_lock_irq(&chip->reg_lock);
591 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
592 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
593 spin_unlock_irq(&chip->reg_lock);
594 // snd_ymfpci_irq_wait(chip);
595 if (chip->ac3_tmp_base.area) {
596 snd_dma_free_pages(&chip->ac3_tmp_base);
597 chip->ac3_tmp_base.area = NULL;
598 }
599 return 0;
600}
601
208a1b4c
TI		 602static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
603 struct snd_pcm_hw_params *hw_params)
1da177e4 604{
208a1b4c
TI		 605 struct snd_pcm_runtime *runtime = substream->runtime;
606 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 607 int err;
608
609 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
610 return err;
611 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
612 return err;
613 return 0;
614}
615
208a1b4c 616static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 617{
208a1b4c
TI		 618 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
619 struct snd_pcm_runtime *runtime = substream->runtime;
620 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 621
622 if (runtime->private_data == NULL)
623 return 0;
624 ypcm = runtime->private_data;
625
626 /* wait, until the PCI operations are not finished */
627 snd_ymfpci_irq_wait(chip);
628 snd_pcm_lib_free_pages(substream);
629 if (ypcm->voices[1]) {
630 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
631 ypcm->voices[1] = NULL;
632 }
633 if (ypcm->voices[0]) {
634 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
635 ypcm->voices[0] = NULL;
636 }
637 return 0;
638}
639
208a1b4c 640static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 641{
208a1b4c
TI		 642 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
643 struct snd_pcm_runtime *runtime = substream->runtime;
644 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 645 unsigned int nvoice;
646
647 ypcm->period_size = runtime->period_size;
648 ypcm->buffer_size = runtime->buffer_size;
649 ypcm->period_pos = 0;
650 ypcm->last_pos = 0;
651 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL		 652 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
653 substream->pcm == chip->pcm);
1da177e4
LT		 654 return 0;
655}
656
208a1b4c
TI		 657static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
658 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 659{
660 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
661}
662
208a1b4c 663static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 664{
208a1b4c 665 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 666
667 /* wait, until the PCI operations are not finished */
668 snd_ymfpci_irq_wait(chip);
669 return snd_pcm_lib_free_pages(substream);
670}
671
208a1b4c 672static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 673{
208a1b4c
TI		 674 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
675 struct snd_pcm_runtime *runtime = substream->runtime;
676 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
677 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT		 678 int nbank;
679 u32 rate, format;
680
681 ypcm->period_size = runtime->period_size;
682 ypcm->buffer_size = runtime->buffer_size;
683 ypcm->period_pos = 0;
684 ypcm->last_pos = 0;
685 ypcm->shift = 0;
686 rate = ((48000 * 4096) / runtime->rate) - 1;
687 format = 0;
688 if (runtime->channels == 2) {
689 format |= 2;
690 ypcm->shift++;
691 }
692 if (snd_pcm_format_width(runtime->format) == 8)
693 format |= 1;
694 else
695 ypcm->shift++;
696 switch (ypcm->capture_bank_number) {
697 case 0:
698 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
699 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
700 break;
701 case 1:
702 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
703 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
704 break;
705 }
706 for (nbank = 0; nbank < 2; nbank++) {
707 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
708 bank->base = cpu_to_le32(runtime->dma_addr);
709 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
710 bank->start = 0;
711 bank->num_of_loops = 0;
712 }
713 return 0;
714}
715
208a1b4c 716static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 717{
208a1b4c
TI		 718 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
719 struct snd_pcm_runtime *runtime = substream->runtime;
720 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
721 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT		 722
723 if (!(ypcm->running && voice))
724 return 0;
725 return le32_to_cpu(voice->bank[chip->active_bank].start);
726}
727
208a1b4c 728static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 729{
208a1b4c
TI		 730 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
731 struct snd_pcm_runtime *runtime = substream->runtime;
732 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 733
734 if (!ypcm->running)
735 return 0;
736 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
737}
738
208a1b4c 739static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4
LT		 740{
741 wait_queue_t wait;
742 int loops = 4;
743
744 while (loops-- > 0) {
745 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
746 continue;
747 init_waitqueue_entry(&wait, current);
748 add_wait_queue(&chip->interrupt_sleep, &wait);
749 atomic_inc(&chip->interrupt_sleep_count);
8433a509 750 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT		 751 remove_wait_queue(&chip->interrupt_sleep, &wait);
752 }
753}
754
755static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
756{
208a1b4c 757 struct snd_ymfpci *chip = dev_id;
1da177e4 758 u32 status, nvoice, mode;
208a1b4c 759 struct snd_ymfpci_voice *voice;
1da177e4
LT		 760
761 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
762 if (status & 0x80000000) {
763 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
764 spin_lock(&chip->voice_lock);
765 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
766 voice = &chip->voices[nvoice];
767 if (voice->interrupt)
768 voice->interrupt(chip, voice);
769 }
770 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
771 if (chip->capture_substream[nvoice])
772 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
773 }
774#if 0
775 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
776 if (chip->effect_substream[nvoice])
777 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
778 }
779#endif
780 spin_unlock(&chip->voice_lock);
781 spin_lock(&chip->reg_lock);
782 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
783 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
784 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
785 spin_unlock(&chip->reg_lock);
786
787 if (atomic_read(&chip->interrupt_sleep_count)) {
788 atomic_set(&chip->interrupt_sleep_count, 0);
789 wake_up(&chip->interrupt_sleep);
790 }
791 }
792
793 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
794 if (status & 1) {
795 if (chip->timer)
796 snd_timer_interrupt(chip->timer, chip->timer->sticks);
797 }
798 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
799
800 if (chip->rawmidi)
801 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
802 return IRQ_HANDLED;
803}
804
208a1b4c 805static struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT		 806{
807 .info = (SNDRV_PCM_INFO_MMAP |
808 SNDRV_PCM_INFO_MMAP_VALID |
809 SNDRV_PCM_INFO_INTERLEAVED |
810 SNDRV_PCM_INFO_BLOCK_TRANSFER |
811 SNDRV_PCM_INFO_PAUSE |
812 SNDRV_PCM_INFO_RESUME),
813 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
814 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
815 .rate_min = 8000,
816 .rate_max = 48000,
817 .channels_min = 1,
818 .channels_max = 2,
819 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
820 .period_bytes_min = 64,
821 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
822 .periods_min = 3,
823 .periods_max = 1024,
824 .fifo_size = 0,
825};
826
208a1b4c 827static struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT		 828{
829 .info = (SNDRV_PCM_INFO_MMAP |
830 SNDRV_PCM_INFO_MMAP_VALID |
831 SNDRV_PCM_INFO_INTERLEAVED |
832 SNDRV_PCM_INFO_BLOCK_TRANSFER |
833 SNDRV_PCM_INFO_PAUSE |
834 SNDRV_PCM_INFO_RESUME),
835 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
836 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
837 .rate_min = 8000,
838 .rate_max = 48000,
839 .channels_min = 1,
840 .channels_max = 2,
841 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
842 .period_bytes_min = 64,
843 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
844 .periods_min = 3,
845 .periods_max = 1024,
846 .fifo_size = 0,
847};
848
208a1b4c 849static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 850{
4d572776 851 kfree(runtime->private_data);
1da177e4
LT		 852}
853
208a1b4c 854static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 855{
208a1b4c
TI		 856 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
857 struct snd_pcm_runtime *runtime = substream->runtime;
858 struct snd_ymfpci_pcm *ypcm;
1da177e4 859
e560d8d8 860 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 861 if (ypcm == NULL)
862 return -ENOMEM;
863 ypcm->chip = chip;
864 ypcm->type = PLAYBACK_VOICE;
865 ypcm->substream = substream;
866 runtime->hw = snd_ymfpci_playback;
867 runtime->private_data = ypcm;
868 runtime->private_free = snd_ymfpci_pcm_free_substream;
869 /* FIXME? True value is 256/48 = 5.33333 ms */
870 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
871 return 0;
872}
873
874/* call with spinlock held */
208a1b4c 875static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT		 876{
877 if (! chip->rear_opened) {
878 if (! chip->spdif_opened) /* set AC3 */
879 snd_ymfpci_writel(chip, YDSXGR_MODE,
880 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
881 /* enable second codec (4CHEN) */
882 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
883 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
884 }
885}
886
887/* call with spinlock held */
208a1b4c 888static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT		 889{
890 if (! chip->rear_opened) {
891 if (! chip->spdif_opened)
892 snd_ymfpci_writel(chip, YDSXGR_MODE,
893 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
894 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
895 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
896 }
897}
898
208a1b4c 899static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 900{
208a1b4c
TI		 901 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
902 struct snd_pcm_runtime *runtime = substream->runtime;
903 struct snd_ymfpci_pcm *ypcm;
904 struct snd_kcontrol *kctl;
1da177e4
LT		 905 int err;
906
907 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
908 return err;
909 ypcm = runtime->private_data;
910 ypcm->output_front = 1;
911 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
5a25c5cf 912 ypcm->swap_rear = chip->rear_swap;
1da177e4
LT		 913 spin_lock_irq(&chip->reg_lock);
914 if (ypcm->output_rear) {
915 ymfpci_open_extension(chip);
916 chip->rear_opened++;
917 }
918 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL		 919
920 kctl = chip->pcm_mixer[substream->number].ctl;
921 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
922 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 923 return 0;
924}
925
208a1b4c 926static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 927{
208a1b4c
TI		 928 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
929 struct snd_pcm_runtime *runtime = substream->runtime;
930 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 931 int err;
932
933 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
934 return err;
935 ypcm = runtime->private_data;
936 ypcm->output_front = 0;
937 ypcm->output_rear = 1;
938 spin_lock_irq(&chip->reg_lock);
939 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
940 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
941 ymfpci_open_extension(chip);
942 chip->spdif_pcm_bits = chip->spdif_bits;
943 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
944 chip->spdif_opened++;
945 spin_unlock_irq(&chip->reg_lock);
946
947 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
948 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
949 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
950 return 0;
951}
952
208a1b4c 953static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 954{
208a1b4c
TI		 955 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
956 struct snd_pcm_runtime *runtime = substream->runtime;
957 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 958 int err;
959
960 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
961 return err;
962 ypcm = runtime->private_data;
963 ypcm->output_front = 0;
964 ypcm->output_rear = 1;
965 spin_lock_irq(&chip->reg_lock);
966 ymfpci_open_extension(chip);
967 chip->rear_opened++;
968 spin_unlock_irq(&chip->reg_lock);
969 return 0;
970}
971
208a1b4c 972static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT		 973 u32 capture_bank_number)
974{
208a1b4c
TI		 975 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
976 struct snd_pcm_runtime *runtime = substream->runtime;
977 struct snd_ymfpci_pcm *ypcm;
1da177e4 978
e560d8d8 979 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 980 if (ypcm == NULL)
981 return -ENOMEM;
982 ypcm->chip = chip;
983 ypcm->type = capture_bank_number + CAPTURE_REC;
984 ypcm->substream = substream;
985 ypcm->capture_bank_number = capture_bank_number;
986 chip->capture_substream[capture_bank_number] = substream;
987 runtime->hw = snd_ymfpci_capture;
988 /* FIXME? True value is 256/48 = 5.33333 ms */
989 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
990 runtime->private_data = ypcm;
991 runtime->private_free = snd_ymfpci_pcm_free_substream;
992 snd_ymfpci_hw_start(chip);
993 return 0;
994}
995
208a1b4c 996static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT		 997{
998 return snd_ymfpci_capture_open(substream, 0);
999}
1000
208a1b4c 1001static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT		 1002{
1003 return snd_ymfpci_capture_open(substream, 1);
1004}
1005
208a1b4c 1006static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT		 1007{
1008 return 0;
1009}
1010
208a1b4c 1011static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1012{
208a1b4c
TI		 1013 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1014 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1015 struct snd_kcontrol *kctl;
1da177e4
LT		 1016
1017 spin_lock_irq(&chip->reg_lock);
1018 if (ypcm->output_rear && chip->rear_opened > 0) {
1019 chip->rear_opened--;
1020 ymfpci_close_extension(chip);
1021 }
1022 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL		 1023 kctl = chip->pcm_mixer[substream->number].ctl;
1024 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1025 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 1026 return snd_ymfpci_playback_close_1(substream);
1027}
1028
208a1b4c 1029static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1030{
208a1b4c 1031 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1032
1033 spin_lock_irq(&chip->reg_lock);
1034 chip->spdif_opened = 0;
1035 ymfpci_close_extension(chip);
1036 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1037 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1038 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1039 spin_unlock_irq(&chip->reg_lock);
1040 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1041 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1042 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1043 return snd_ymfpci_playback_close_1(substream);
1044}
1045
208a1b4c 1046static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1047{
208a1b4c 1048 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1049
1050 spin_lock_irq(&chip->reg_lock);
1051 if (chip->rear_opened > 0) {
1052 chip->rear_opened--;
1053 ymfpci_close_extension(chip);
1054 }
1055 spin_unlock_irq(&chip->reg_lock);
1056 return snd_ymfpci_playback_close_1(substream);
1057}
1058
208a1b4c 1059static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1060{
208a1b4c
TI		 1061 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1062 struct snd_pcm_runtime *runtime = substream->runtime;
1063 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 1064
1065 if (ypcm != NULL) {
1066 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1067 snd_ymfpci_hw_stop(chip);
1068 }
1069 return 0;
1070}
1071
208a1b4c 1072static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT		 1073 .open = snd_ymfpci_playback_open,
1074 .close = snd_ymfpci_playback_close,
1075 .ioctl = snd_pcm_lib_ioctl,
1076 .hw_params = snd_ymfpci_playback_hw_params,
1077 .hw_free = snd_ymfpci_playback_hw_free,
1078 .prepare = snd_ymfpci_playback_prepare,
1079 .trigger = snd_ymfpci_playback_trigger,
1080 .pointer = snd_ymfpci_playback_pointer,
1081};
1082
208a1b4c 1083static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT		 1084 .open = snd_ymfpci_capture_rec_open,
1085 .close = snd_ymfpci_capture_close,
1086 .ioctl = snd_pcm_lib_ioctl,
1087 .hw_params = snd_ymfpci_capture_hw_params,
1088 .hw_free = snd_ymfpci_capture_hw_free,
1089 .prepare = snd_ymfpci_capture_prepare,
1090 .trigger = snd_ymfpci_capture_trigger,
1091 .pointer = snd_ymfpci_capture_pointer,
1092};
1093
208a1b4c 1094int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1095{
208a1b4c 1096 struct snd_pcm *pcm;
1da177e4
LT		 1097 int err;
1098
1099 if (rpcm)
1100 *rpcm = NULL;
1101 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1102 return err;
1103 pcm->private_data = chip;
1da177e4
LT		 1104
1105 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1106 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1107
1108 /* global setup */
1109 pcm->info_flags = 0;
1110 strcpy(pcm->name, "YMFPCI");
1111 chip->pcm = pcm;
1112
1113 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1114 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1115
1116 if (rpcm)
1117 *rpcm = pcm;
1118 return 0;
1119}
1120
208a1b4c 1121static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT		 1122 .open = snd_ymfpci_capture_ac97_open,
1123 .close = snd_ymfpci_capture_close,
1124 .ioctl = snd_pcm_lib_ioctl,
1125 .hw_params = snd_ymfpci_capture_hw_params,
1126 .hw_free = snd_ymfpci_capture_hw_free,
1127 .prepare = snd_ymfpci_capture_prepare,
1128 .trigger = snd_ymfpci_capture_trigger,
1129 .pointer = snd_ymfpci_capture_pointer,
1130};
1131
208a1b4c 1132int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1133{
208a1b4c 1134 struct snd_pcm *pcm;
1da177e4
LT		 1135 int err;
1136
1137 if (rpcm)
1138 *rpcm = NULL;
1139 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1140 return err;
1141 pcm->private_data = chip;
1da177e4
LT		 1142
1143 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1144
1145 /* global setup */
1146 pcm->info_flags = 0;
1147 sprintf(pcm->name, "YMFPCI - %s",
1148 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1149 chip->pcm2 = pcm;
1150
1151 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1152 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1153
1154 if (rpcm)
1155 *rpcm = pcm;
1156 return 0;
1157}
1158
208a1b4c 1159static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT		 1160 .open = snd_ymfpci_playback_spdif_open,
1161 .close = snd_ymfpci_playback_spdif_close,
1162 .ioctl = snd_pcm_lib_ioctl,
1163 .hw_params = snd_ymfpci_playback_hw_params,
1164 .hw_free = snd_ymfpci_playback_hw_free,
1165 .prepare = snd_ymfpci_playback_prepare,
1166 .trigger = snd_ymfpci_playback_trigger,
1167 .pointer = snd_ymfpci_playback_pointer,
1168};
1169
208a1b4c 1170int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1171{
208a1b4c 1172 struct snd_pcm *pcm;
1da177e4
LT		 1173 int err;
1174
1175 if (rpcm)
1176 *rpcm = NULL;
1177 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1178 return err;
1179 pcm->private_data = chip;
1da177e4
LT		 1180
1181 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1182
1183 /* global setup */
1184 pcm->info_flags = 0;
1185 strcpy(pcm->name, "YMFPCI - IEC958");
1186 chip->pcm_spdif = pcm;
1187
1188 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1189 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1190
1191 if (rpcm)
1192 *rpcm = pcm;
1193 return 0;
1194}
1195
208a1b4c 1196static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT		 1197 .open = snd_ymfpci_playback_4ch_open,
1198 .close = snd_ymfpci_playback_4ch_close,
1199 .ioctl = snd_pcm_lib_ioctl,
1200 .hw_params = snd_ymfpci_playback_hw_params,
1201 .hw_free = snd_ymfpci_playback_hw_free,
1202 .prepare = snd_ymfpci_playback_prepare,
1203 .trigger = snd_ymfpci_playback_trigger,
1204 .pointer = snd_ymfpci_playback_pointer,
1205};
1206
208a1b4c 1207int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1208{
208a1b4c 1209 struct snd_pcm *pcm;
1da177e4
LT		 1210 int err;
1211
1212 if (rpcm)
1213 *rpcm = NULL;
1214 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1215 return err;
1216 pcm->private_data = chip;
1da177e4
LT		 1217
1218 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1219
1220 /* global setup */
1221 pcm->info_flags = 0;
1222 strcpy(pcm->name, "YMFPCI - Rear PCM");
1223 chip->pcm_4ch = pcm;
1224
1225 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1226 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1227
1228 if (rpcm)
1229 *rpcm = pcm;
1230 return 0;
1231}
1232
208a1b4c 1233static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1234{
1235 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1236 uinfo->count = 1;
1237 return 0;
1238}
1239
208a1b4c
TI		 1240static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1241 struct snd_ctl_elem_value *ucontrol)
1da177e4 1242{
208a1b4c 1243 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1244
1245 spin_lock_irq(&chip->reg_lock);
1246 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1247 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1248 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1249 spin_unlock_irq(&chip->reg_lock);
1250 return 0;
1251}
1252
208a1b4c
TI		 1253static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1254 struct snd_ctl_elem_value *ucontrol)
1da177e4 1255{
208a1b4c 1256 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1257 unsigned int val;
1258 int change;
1259
1260 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1261 (ucontrol->value.iec958.status[1] << 8);
1262 spin_lock_irq(&chip->reg_lock);
1263 change = chip->spdif_bits != val;
1264 chip->spdif_bits = val;
1265 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1266 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1267 spin_unlock_irq(&chip->reg_lock);
1268 return change;
1269}
1270
208a1b4c 1271static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1da177e4
LT		 1272{
1273 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1274 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1275 .info = snd_ymfpci_spdif_default_info,
1276 .get = snd_ymfpci_spdif_default_get,
1277 .put = snd_ymfpci_spdif_default_put
1278};
1279
208a1b4c 1280static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1281{
1282 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1283 uinfo->count = 1;
1284 return 0;
1285}
1286
208a1b4c
TI		 1287static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1da177e4 1289{
208a1b4c 1290 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1291
1292 spin_lock_irq(&chip->reg_lock);
1293 ucontrol->value.iec958.status[0] = 0x3e;
1294 ucontrol->value.iec958.status[1] = 0xff;
1295 spin_unlock_irq(&chip->reg_lock);
1296 return 0;
1297}
1298
208a1b4c 1299static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1da177e4
LT		 1300{
1301 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1302 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1303 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1304 .info = snd_ymfpci_spdif_mask_info,
1305 .get = snd_ymfpci_spdif_mask_get,
1306};
1307
208a1b4c 1308static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1309{
1310 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1311 uinfo->count = 1;
1312 return 0;
1313}
1314
208a1b4c
TI		 1315static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1316 struct snd_ctl_elem_value *ucontrol)
1da177e4 1317{
208a1b4c 1318 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1319
1320 spin_lock_irq(&chip->reg_lock);
1321 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1322 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1323 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1324 spin_unlock_irq(&chip->reg_lock);
1325 return 0;
1326}
1327
208a1b4c
TI		 1328static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1329 struct snd_ctl_elem_value *ucontrol)
1da177e4 1330{
208a1b4c 1331 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1332 unsigned int val;
1333 int change;
1334
1335 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1336 (ucontrol->value.iec958.status[1] << 8);
1337 spin_lock_irq(&chip->reg_lock);
1338 change = chip->spdif_pcm_bits != val;
1339 chip->spdif_pcm_bits = val;
1340 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1341 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1342 spin_unlock_irq(&chip->reg_lock);
1343 return change;
1344}
1345
208a1b4c 1346static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1da177e4
LT		 1347{
1348 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1349 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1350 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1351 .info = snd_ymfpci_spdif_stream_info,
1352 .get = snd_ymfpci_spdif_stream_get,
1353 .put = snd_ymfpci_spdif_stream_put
1354};
1355
208a1b4c 1356static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4
LT		 1357{
1358 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1359
1360 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1361 info->count = 1;
1362 info->value.enumerated.items = 3;
1363 if (info->value.enumerated.item > 2)
1364 info->value.enumerated.item = 2;
1365 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1366 return 0;
1367}
1368
208a1b4c 1369static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1370{
208a1b4c 1371 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1372 u16 reg;
1373
1374 spin_lock_irq(&chip->reg_lock);
1375 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1376 spin_unlock_irq(&chip->reg_lock);
1377 if (!(reg & 0x100))
1378 value->value.enumerated.item[0] = 0;
1379 else
1380 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1381 return 0;
1382}
1383
208a1b4c 1384static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1385{
208a1b4c 1386 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1387 u16 reg, old_reg;
1388
1389 spin_lock_irq(&chip->reg_lock);
1390 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1391 if (value->value.enumerated.item[0] == 0)
1392 reg = old_reg & ~0x100;
1393 else
1394 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1395 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1396 spin_unlock_irq(&chip->reg_lock);
1397 return reg != old_reg;
1398}
1399
208a1b4c 1400static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1da177e4
LT		 1401 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1402 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1403 .name = "Direct Recording Source",
1404 .info = snd_ymfpci_drec_source_info,
1405 .get = snd_ymfpci_drec_source_get,
1406 .put = snd_ymfpci_drec_source_put
1407};
1408
1409/*
1410 * Mixer controls
1411 */
1412
d602c885 1413#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT		 1414{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1415 .info = snd_ymfpci_info_single, \
1416 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1417 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1418
208a1b4c
TI		 1419static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_info *uinfo)
1da177e4 1421{
d602c885
GM		 1422 int reg = kcontrol->private_value & 0xffff;
1423
1424 switch (reg) {
1da177e4
LT		 1425 case YDSXGR_SPDIFOUTCTRL: break;
1426 case YDSXGR_SPDIFINCTRL: break;
1427 default: return -EINVAL;
1428 }
467a8c2f 1429 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1da177e4
LT		 1430 uinfo->count = 1;
1431 uinfo->value.integer.min = 0;
467a8c2f 1432 uinfo->value.integer.max = 1;
1da177e4
LT		 1433 return 0;
1434}
1435
208a1b4c
TI		 1436static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1437 struct snd_ctl_elem_value *ucontrol)
1da177e4 1438{
208a1b4c 1439 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1440 int reg = kcontrol->private_value & 0xffff;
1441 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1442 unsigned int mask = 1;
1da177e4 1443
d602c885 1444 switch (reg) {
1da177e4
LT		 1445 case YDSXGR_SPDIFOUTCTRL: break;
1446 case YDSXGR_SPDIFINCTRL: break;
1447 default: return -EINVAL;
1448 }
d602c885
GM		 1449 ucontrol->value.integer.value[0] =
1450 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT		 1451 return 0;
1452}
1453
208a1b4c
TI		 1454static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1455 struct snd_ctl_elem_value *ucontrol)
1da177e4 1456{
208a1b4c 1457 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1458 int reg = kcontrol->private_value & 0xffff;
1459 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1460 unsigned int mask = 1;
1da177e4
LT		 1461 int change;
1462 unsigned int val, oval;
1463
d602c885 1464 switch (reg) {
1da177e4
LT		 1465 case YDSXGR_SPDIFOUTCTRL: break;
1466 case YDSXGR_SPDIFINCTRL: break;
1467 default: return -EINVAL;
1468 }
1469 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT		 1470 val <<= shift;
1471 spin_lock_irq(&chip->reg_lock);
1472 oval = snd_ymfpci_readl(chip, reg);
1473 val = (oval & ~(mask << shift)) | val;
1474 change = val != oval;
1475 snd_ymfpci_writel(chip, reg, val);
1476 spin_unlock_irq(&chip->reg_lock);
1477 return change;
1478}
1479
1480#define YMFPCI_DOUBLE(xname, xindex, reg) \
1481{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1482 .info = snd_ymfpci_info_double, \
1483 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1484 .private_value = reg }
1485
208a1b4c 1486static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1487{
1488 unsigned int reg = kcontrol->private_value;
1da177e4
LT		 1489
1490 if (reg < 0x80 || reg >= 0xc0)
1491 return -EINVAL;
467a8c2f 1492 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT		 1493 uinfo->count = 2;
1494 uinfo->value.integer.min = 0;
467a8c2f 1495 uinfo->value.integer.max = 16383;
1da177e4
LT		 1496 return 0;
1497}
1498
208a1b4c 1499static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1500{
208a1b4c 1501 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1502 unsigned int reg = kcontrol->private_value;
467a8c2f 1503 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1504 unsigned int val;
1505
1506 if (reg < 0x80 || reg >= 0xc0)
1507 return -EINVAL;
1508 spin_lock_irq(&chip->reg_lock);
1509 val = snd_ymfpci_readl(chip, reg);
1510 spin_unlock_irq(&chip->reg_lock);
1511 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1512 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT		 1513 return 0;
1514}
1515
208a1b4c 1516static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1517{
208a1b4c 1518 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1519 unsigned int reg = kcontrol->private_value;
467a8c2f 1520 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1521 int change;
1522 unsigned int val1, val2, oval;
1523
1524 if (reg < 0x80 || reg >= 0xc0)
1525 return -EINVAL;
1526 val1 = ucontrol->value.integer.value[0] & mask;
1527 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT		 1528 val1 <<= shift_left;
1529 val2 <<= shift_right;
1530 spin_lock_irq(&chip->reg_lock);
1531 oval = snd_ymfpci_readl(chip, reg);
1532 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1533 change = val1 != oval;
1534 snd_ymfpci_writel(chip, reg, val1);
1535 spin_unlock_irq(&chip->reg_lock);
1536 return change;
1537}
1538
1539/*
1540 * 4ch duplication
1541 */
208a1b4c 1542static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1543{
1544 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1545 uinfo->count = 1;
1546 uinfo->value.integer.min = 0;
1547 uinfo->value.integer.max = 1;
1548 return 0;
1549}
1550
208a1b4c 1551static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1552{
208a1b4c 1553 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1554 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1555 return 0;
1556}
1557
208a1b4c 1558static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1559{
208a1b4c 1560 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1561 int change;
1562 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1563 if (change)
1564 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1565 return change;
1566}
1567
1568
208a1b4c 1569static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1da177e4
LT		 1570YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1571YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1572YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1573YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1574YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1575YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1576YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1577YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1578YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1579YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1580YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1581YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1582YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM		 1583YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1584YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1585YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT		 1586{
1587 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1588 .name = "4ch Duplication",
1589 .info = snd_ymfpci_info_dup4ch,
1590 .get = snd_ymfpci_get_dup4ch,
1591 .put = snd_ymfpci_put_dup4ch,
1592},
1593};
1594
1595
1596/*
1597 * GPIO
1598 */
1599
208a1b4c 1600static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT		 1601{
1602 u16 reg, mode;
1603 unsigned long flags;
1604
1605 spin_lock_irqsave(&chip->reg_lock, flags);
1606 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1607 reg &= ~(1 << (pin + 8));
1608 reg |= (1 << pin);
1609 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1610 /* set the level mode for input line */
1611 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1612 mode &= ~(3 << (pin * 2));
1613 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1614 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1615 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1616 spin_unlock_irqrestore(&chip->reg_lock, flags);
1617 return (mode >> pin) & 1;
1618}
1619
208a1b4c 1620static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT		 1621{
1622 u16 reg;
1623 unsigned long flags;
1624
1625 spin_lock_irqsave(&chip->reg_lock, flags);
1626 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1627 reg &= ~(1 << pin);
1628 reg &= ~(1 << (pin + 8));
1629 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1630 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1631 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1632 spin_unlock_irqrestore(&chip->reg_lock, flags);
1633
1634 return 0;
1635}
1636
208a1b4c 1637static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1638{
1639 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1640 uinfo->count = 1;
1641 uinfo->value.integer.min = 0;
1642 uinfo->value.integer.max = 1;
1643 return 0;
1644}
1645
208a1b4c 1646static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1647{
208a1b4c 1648 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1649 int pin = (int)kcontrol->private_value;
1650 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1651 return 0;
1652}
1653
208a1b4c 1654static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1655{
208a1b4c 1656 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1657 int pin = (int)kcontrol->private_value;
1658
1659 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1660 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1661 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1662 return 1;
1663 }
1664 return 0;
1665}
1666
208a1b4c 1667static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1da177e4
LT		 1668 .name = "Shared Rear/Line-In Switch",
1669 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1670 .info = snd_ymfpci_gpio_sw_info,
1671 .get = snd_ymfpci_gpio_sw_get,
1672 .put = snd_ymfpci_gpio_sw_put,
1673 .private_value = 2,
1674};
1675
9bcf6551
CL		 1676/*
1677 * PCM voice volume
1678 */
1679
208a1b4c
TI		 1680static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1681 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL		 1682{
1683 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1684 uinfo->count = 2;
1685 uinfo->value.integer.min = 0;
1686 uinfo->value.integer.max = 0x8000;
1687 return 0;
1688}
1689
208a1b4c
TI		 1690static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1691 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1692{
208a1b4c 1693 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL		 1694 unsigned int subs = kcontrol->id.subdevice;
1695
1696 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1697 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1698 return 0;
1699}
1700
208a1b4c
TI		 1701static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1702 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1703{
208a1b4c 1704 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1705 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1706 struct snd_pcm_substream *substream;
9bcf6551
CL		 1707 unsigned long flags;
1708
1709 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1710 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1711 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1712 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1713
208a1b4c 1714 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL		 1715 spin_lock_irqsave(&chip->voice_lock, flags);
1716 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1717 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9bcf6551
CL		 1718 ypcm->update_pcm_vol = 2;
1719 }
1720 spin_unlock_irqrestore(&chip->voice_lock, flags);
1721 return 1;
1722 }
1723 return 0;
1724}
1725
208a1b4c 1726static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
9bcf6551
CL		 1727 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1728 .name = "PCM Playback Volume",
1729 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1730 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1731 .info = snd_ymfpci_pcm_vol_info,
1732 .get = snd_ymfpci_pcm_vol_get,
1733 .put = snd_ymfpci_pcm_vol_put,
1734};
1735
1da177e4
LT		 1736
1737/*
1738 * Mixer routines
1739 */
1740
208a1b4c 1741static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1742{
208a1b4c 1743 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT		 1744 chip->ac97_bus = NULL;
1745}
1746
208a1b4c 1747static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1748{
208a1b4c 1749 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 1750 chip->ac97 = NULL;
1751}
1752
5a25c5cf 1753int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch, int rear_swap)
1da177e4 1754{
208a1b4c
TI		 1755 struct snd_ac97_template ac97;
1756 struct snd_kcontrol *kctl;
1757 struct snd_pcm_substream *substream;
1da177e4
LT		 1758 unsigned int idx;
1759 int err;
208a1b4c 1760 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1761 .write = snd_ymfpci_codec_write,
1762 .read = snd_ymfpci_codec_read,
1763 };
1764
5a25c5cf 1765 chip->rear_swap = rear_swap;
1da177e4
LT		 1766 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1767 return err;
1768 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1769 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1770
1771 memset(&ac97, 0, sizeof(ac97));
1772 ac97.private_data = chip;
1773 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1774 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1775 return err;
1776
1777 /* to be sure */
1778 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1779 AC97_EA_VRA|AC97_EA_VRM, 0);
1780
1781 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1782 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1783 return err;
1784 }
1785
1786 /* add S/PDIF control */
1787 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1788 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1789 return err;
1790 kctl->id.device = chip->pcm_spdif->device;
1791 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1792 return err;
1793 kctl->id.device = chip->pcm_spdif->device;
1794 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1795 return err;
1796 kctl->id.device = chip->pcm_spdif->device;
1797 chip->spdif_pcm_ctl = kctl;
1798
1799 /* direct recording source */
1800 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1801 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1802 return err;
1803
1804 /*
1805 * shared rear/line-in
1806 */
1807 if (rear_switch) {
1808 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1809 return err;
1810 }
1811
9bcf6551
CL		 1812 /* per-voice volume */
1813 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1814 for (idx = 0; idx < 32; ++idx) {
1815 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1816 if (!kctl)
1817 return -ENOMEM;
1818 kctl->id.device = chip->pcm->device;
1819 kctl->id.subdevice = idx;
1820 kctl->private_value = (unsigned long)substream;
1821 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1822 return err;
1823 chip->pcm_mixer[idx].left = 0x8000;
1824 chip->pcm_mixer[idx].right = 0x8000;
1825 chip->pcm_mixer[idx].ctl = kctl;
1826 substream = substream->next;
1827 }
1828
1da177e4
LT		 1829 return 0;
1830}
1831
1832
1833/*
1834 * timer
1835 */
1836
208a1b4c 1837static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1838{
208a1b4c 1839 struct snd_ymfpci *chip;
1da177e4
LT		 1840 unsigned long flags;
1841 unsigned int count;
1842
1843 chip = snd_timer_chip(timer);
d44c39ac 1844 count = (timer->sticks << 1) - 1;
1da177e4
LT		 1845 spin_lock_irqsave(&chip->reg_lock, flags);
1846 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1847 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1848 spin_unlock_irqrestore(&chip->reg_lock, flags);
1849 return 0;
1850}
1851
208a1b4c 1852static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1853{
208a1b4c 1854 struct snd_ymfpci *chip;
1da177e4
LT		 1855 unsigned long flags;
1856
1857 chip = snd_timer_chip(timer);
1858 spin_lock_irqsave(&chip->reg_lock, flags);
1859 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1860 spin_unlock_irqrestore(&chip->reg_lock, flags);
1861 return 0;
1862}
1863
208a1b4c 1864static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT		 1865 unsigned long *num, unsigned long *den)
1866{
1867 *num = 1;
d44c39ac 1868 *den = 48000;
1da177e4
LT		 1869 return 0;
1870}
1871
208a1b4c 1872static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1873 .flags = SNDRV_TIMER_HW_AUTO,
d44c39ac
CL		 1874 .resolution = 20833, /* 1/fs = 20.8333...us */
1875 .ticks = 0x8000,
1da177e4
LT		 1876 .start = snd_ymfpci_timer_start,
1877 .stop = snd_ymfpci_timer_stop,
1878 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1879};
1880
208a1b4c 1881int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1882{
208a1b4c
TI		 1883 struct snd_timer *timer = NULL;
1884 struct snd_timer_id tid;
1da177e4
LT		 1885 int err;
1886
1887 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1888 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1889 tid.card = chip->card->number;
1890 tid.device = device;
1891 tid.subdevice = 0;
1892 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1893 strcpy(timer->name, "YMFPCI timer");
1894 timer->private_data = chip;
1895 timer->hw = snd_ymfpci_timer_hw;
1896 }
1897 chip->timer = timer;
1898 return err;
1899}
1900
1901
1902/*
1903 * proc interface
1904 */
1905
208a1b4c
TI		 1906static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1907 struct snd_info_buffer *buffer)
1da177e4 1908{
208a1b4c 1909 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT		 1910 int i;
1911
1912 snd_iprintf(buffer, "YMFPCI\n\n");
1913 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1914 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1915}
1916
208a1b4c 1917static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1918{
208a1b4c 1919 struct snd_info_entry *entry;
1da177e4
LT		 1920
1921 if (! snd_card_proc_new(card, "ymfpci", &entry))
bf850204 1922 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
1da177e4
LT		 1923 return 0;
1924}
1925
1926/*
1927 * initialization routines
1928 */
1929
1930static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1931{
1932 u8 cmd;
1933
1934 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1935#if 0 // force to reset
1936 if (cmd & 0x03) {
1937#endif
1938 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1939 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1940 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1941 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1942 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1943#if 0
1944 }
1945#endif
1946}
1947
208a1b4c 1948static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 1949{
1950 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1951}
1952
208a1b4c 1953static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 1954{
1955 u32 val;
1956 int timeout = 1000;
1957
1958 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1959 if (val)
1960 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1961 while (timeout-- > 0) {
1962 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1963 if ((val & 0x00000002) == 0)
1964 break;
1965 }
1966}
1967
1968#include "ymfpci_image.h"
1969
208a1b4c 1970static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT		 1971{
1972 int i;
1973 u16 ctrl;
1974 unsigned long *inst;
1975
1976 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1977 snd_ymfpci_disable_dsp(chip);
1978 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1979 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1980 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1981 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1982 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1983 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1984 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1985 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1986 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1987
1988 /* setup DSP instruction code */
1989 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1990 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1991
1992 /* setup control instruction code */
1993 switch (chip->device_id) {
1994 case PCI_DEVICE_ID_YAMAHA_724F:
1995 case PCI_DEVICE_ID_YAMAHA_740C:
1996 case PCI_DEVICE_ID_YAMAHA_744:
1997 case PCI_DEVICE_ID_YAMAHA_754:
1998 inst = CntrlInst1E;
1999 break;
2000 default:
2001 inst = CntrlInst;
2002 break;
2003 }
2004 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2005 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
2006
2007 snd_ymfpci_enable_dsp(chip);
2008}
2009
208a1b4c 2010static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT		 2011{
2012 long size, playback_ctrl_size;
2013 int voice, bank, reg;
2014 u8 *ptr;
2015 dma_addr_t ptr_addr;
2016
2017 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2018 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2019 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2020 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2021 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2022
2023 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
2024 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
2025 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
2026 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
2027 chip->work_size;
2028 /* work_ptr must be aligned to 256 bytes, but it's already
2029 covered with the kernel page allocation mechanism */
2030 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2031 size, &chip->work_ptr) < 0)
2032 return -ENOMEM;
2033 ptr = chip->work_ptr.area;
2034 ptr_addr = chip->work_ptr.addr;
2035 memset(ptr, 0, size); /* for sure */
2036
2037 chip->bank_base_playback = ptr;
2038 chip->bank_base_playback_addr = ptr_addr;
2039 chip->ctrl_playback = (u32 *)ptr;
2040 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2041 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2042 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2043 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2044 chip->voices[voice].number = voice;
208a1b4c 2045 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2046 chip->voices[voice].bank_addr = ptr_addr;
2047 for (bank = 0; bank < 2; bank++) {
208a1b4c 2048 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2049 ptr += chip->bank_size_playback;
2050 ptr_addr += chip->bank_size_playback;
2051 }
2052 }
2053 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2054 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2055 chip->bank_base_capture = ptr;
2056 chip->bank_base_capture_addr = ptr_addr;
2057 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2058 for (bank = 0; bank < 2; bank++) {
208a1b4c 2059 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT		 2060 ptr += chip->bank_size_capture;
2061 ptr_addr += chip->bank_size_capture;
2062 }
2063 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2064 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2065 chip->bank_base_effect = ptr;
2066 chip->bank_base_effect_addr = ptr_addr;
2067 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2068 for (bank = 0; bank < 2; bank++) {
208a1b4c 2069 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT		 2070 ptr += chip->bank_size_effect;
2071 ptr_addr += chip->bank_size_effect;
2072 }
2073 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2074 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2075 chip->work_base = ptr;
2076 chip->work_base_addr = ptr_addr;
2077
2078 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2079
2080 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2081 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2082 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2083 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2084 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2085
2086 /* S/PDIF output initialization */
2087 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2088 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2089 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2090
2091 /* S/PDIF input initialization */
2092 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2093
2094 /* digital mixer setup */
2095 for (reg = 0x80; reg < 0xc0; reg += 4)
2096 snd_ymfpci_writel(chip, reg, 0);
2097 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2098 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2099 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2100 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2101 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2102 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2103 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2104
2105 return 0;
2106}
2107
208a1b4c 2108static int snd_ymfpci_free(struct snd_ymfpci *chip)
1da177e4
LT		 2109{
2110 u16 ctrl;
2111
2112 snd_assert(chip != NULL, return -EINVAL);
2113
2114 if (chip->res_reg_area) { /* don't touch busy hardware */
2115 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2116 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2117 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2118 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2119 snd_ymfpci_disable_dsp(chip);
2120 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2121 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2122 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2123 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2124 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2125 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2126 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2127 }
2128
2129 snd_ymfpci_ac3_done(chip);
2130
2131 /* Set PCI device to D3 state */
2132#if 0
2133 /* FIXME: temporarily disabled, otherwise we cannot fire up
2134 * the chip again unless reboot. ACPI bug?
2135 */
2136 pci_set_power_state(chip->pci, 3);
2137#endif
2138
2139#ifdef CONFIG_PM
2140 vfree(chip->saved_regs);
2141#endif
b1d5776d
TI		 2142 release_and_free_resource(chip->mpu_res);
2143 release_and_free_resource(chip->fm_res);
1da177e4
LT		 2144 snd_ymfpci_free_gameport(chip);
2145 if (chip->reg_area_virt)
2146 iounmap(chip->reg_area_virt);
2147 if (chip->work_ptr.area)
2148 snd_dma_free_pages(&chip->work_ptr);
2149
2150 if (chip->irq >= 0)
2151 free_irq(chip->irq, (void *)chip);
b1d5776d 2152 release_and_free_resource(chip->res_reg_area);
1da177e4
LT		 2153
2154 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2155
2156 pci_disable_device(chip->pci);
2157 kfree(chip);
2158 return 0;
2159}
2160
208a1b4c 2161static int snd_ymfpci_dev_free(struct snd_device *device)
1da177e4 2162{
208a1b4c 2163 struct snd_ymfpci *chip = device->device_data;
1da177e4
LT		 2164 return snd_ymfpci_free(chip);
2165}
2166
2167#ifdef CONFIG_PM
2168static int saved_regs_index[] = {
2169 /* spdif */
2170 YDSXGR_SPDIFOUTCTRL,
2171 YDSXGR_SPDIFOUTSTATUS,
2172 YDSXGR_SPDIFINCTRL,
2173 /* volumes */
2174 YDSXGR_PRIADCLOOPVOL,
2175 YDSXGR_NATIVEDACINVOL,
2176 YDSXGR_NATIVEDACOUTVOL,
2177 // YDSXGR_BUF441OUTVOL,
2178 YDSXGR_NATIVEADCINVOL,
2179 YDSXGR_SPDIFLOOPVOL,
2180 YDSXGR_SPDIFOUTVOL,
2181 YDSXGR_ZVOUTVOL,
2182 YDSXGR_LEGACYOUTVOL,
2183 /* address bases */
2184 YDSXGR_PLAYCTRLBASE,
2185 YDSXGR_RECCTRLBASE,
2186 YDSXGR_EFFCTRLBASE,
2187 YDSXGR_WORKBASE,
2188 /* capture set up */
2189 YDSXGR_MAPOFREC,
2190 YDSXGR_RECFORMAT,
2191 YDSXGR_RECSLOTSR,
2192 YDSXGR_ADCFORMAT,
2193 YDSXGR_ADCSLOTSR,
2194};
2195#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2196
ded46235 2197int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2198{
ded46235
TI		 2199 struct snd_card *card = pci_get_drvdata(pci);
2200 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2201 unsigned int i;
2202
ded46235 2203 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 2204 snd_pcm_suspend_all(chip->pcm);
2205 snd_pcm_suspend_all(chip->pcm2);
2206 snd_pcm_suspend_all(chip->pcm_spdif);
2207 snd_pcm_suspend_all(chip->pcm_4ch);
2208 snd_ac97_suspend(chip->ac97);
2209 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2210 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2211 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2212 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2213 snd_ymfpci_disable_dsp(chip);
ded46235
TI		 2214 pci_disable_device(pci);
2215 pci_save_state(pci);
1da177e4
LT		 2216 return 0;
2217}
2218
ded46235 2219int snd_ymfpci_resume(struct pci_dev *pci)
1da177e4 2220{
ded46235
TI		 2221 struct snd_card *card = pci_get_drvdata(pci);
2222 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2223 unsigned int i;
2224
ded46235
TI		 2225 pci_restore_state(pci);
2226 pci_enable_device(pci);
2227 pci_set_master(pci);
2228 snd_ymfpci_aclink_reset(pci);
1da177e4
LT		 2229 snd_ymfpci_codec_ready(chip, 0);
2230 snd_ymfpci_download_image(chip);
2231 udelay(100);
2232
2233 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2234 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2235
2236 snd_ac97_resume(chip->ac97);
2237
2238 /* start hw again */
2239 if (chip->start_count > 0) {
2240 spin_lock_irq(&chip->reg_lock);
2241 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2242 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2243 spin_unlock_irq(&chip->reg_lock);
2244 }
ded46235 2245 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2246 return 0;
2247}
2248#endif /* CONFIG_PM */
2249
208a1b4c 2250int __devinit snd_ymfpci_create(struct snd_card *card,
1da177e4
LT		 2251 struct pci_dev * pci,
2252 unsigned short old_legacy_ctrl,
208a1b4c 2253 struct snd_ymfpci ** rchip)
1da177e4 2254{
208a1b4c 2255 struct snd_ymfpci *chip;
1da177e4 2256 int err;
208a1b4c 2257 static struct snd_device_ops ops = {
1da177e4
LT		 2258 .dev_free = snd_ymfpci_dev_free,
2259 };
2260
2261 *rchip = NULL;
2262
2263 /* enable PCI device */
2264 if ((err = pci_enable_device(pci)) < 0)
2265 return err;
2266
e560d8d8 2267 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 2268 if (chip == NULL) {
2269 pci_disable_device(pci);
2270 return -ENOMEM;
2271 }
2272 chip->old_legacy_ctrl = old_legacy_ctrl;
2273 spin_lock_init(&chip->reg_lock);
2274 spin_lock_init(&chip->voice_lock);
2275 init_waitqueue_head(&chip->interrupt_sleep);
2276 atomic_set(&chip->interrupt_sleep_count, 0);
2277 chip->card = card;
2278 chip->pci = pci;
2279 chip->irq = -1;
2280 chip->device_id = pci->device;
2281 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2282 chip->reg_area_phys = pci_resource_start(pci, 0);
2283 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2284 pci_set_master(pci);
2285
2286 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
99b359ba 2287 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
1da177e4
LT		 2288 snd_ymfpci_free(chip);
2289 return -EBUSY;
2290 }
65ca68b3 2291 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_DISABLED|IRQF_SHARED, "YMFPCI", (void *) chip)) {
99b359ba 2292 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2293 snd_ymfpci_free(chip);
2294 return -EBUSY;
2295 }
2296 chip->irq = pci->irq;
2297
2298 snd_ymfpci_aclink_reset(pci);
2299 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2300 snd_ymfpci_free(chip);
2301 return -EIO;
2302 }
2303
2304 snd_ymfpci_download_image(chip);
2305
2306 udelay(100); /* seems we need a delay after downloading image.. */
2307
2308 if (snd_ymfpci_memalloc(chip) < 0) {
2309 snd_ymfpci_free(chip);
2310 return -EIO;
2311 }
2312
5a25c5cf 2313 chip->rear_swap = 1;
1da177e4
LT		 2314 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2315 snd_ymfpci_free(chip);
2316 return err;
2317 }
2318
2319#ifdef CONFIG_PM
2320 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2321 if (chip->saved_regs == NULL) {
2322 snd_ymfpci_free(chip);
2323 return -ENOMEM;
2324 }
1da177e4
LT		 2325#endif
2326
2327 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2328 snd_ymfpci_free(chip);
2329 return err;
2330 }
2331
2332 snd_ymfpci_proc_init(card, chip);
2333
2334 snd_card_set_dev(card, &pci->dev);
2335
2336 *rchip = chip;
2337 return 0;
2338}
Linux kernel - Deliverables
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