[ALSA] hda-codec - Fix assignment of PCM devices for Realtek codecs
[deliverable/linux.git] / sound / pci / ymfpci / ymfpci_main.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * BUGS:
6 * --
7 *
8 * TODO:
9 * --
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27#include <sound/driver.h>
28#include <linux/delay.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
32#include <linux/sched.h>
33#include <linux/slab.h>
34#include <linux/vmalloc.h>
35
36#include <sound/core.h>
37#include <sound/control.h>
38#include <sound/info.h>
33925186 39#include <sound/tlv.h>
1da177e4
LT
40#include <sound/ymfpci.h>
41#include <sound/asoundef.h>
42#include <sound/mpu401.h>
43
44#include <asm/io.h>
45
46/*
47 * constants
48 */
49
50/*
51 * common I/O routines
52 */
53
208a1b4c 54static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 55
208a1b4c 56static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
57{
58 return readb(chip->reg_area_virt + offset);
59}
60
208a1b4c 61static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT
62{
63 writeb(val, chip->reg_area_virt + offset);
64}
65
208a1b4c 66static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
67{
68 return readw(chip->reg_area_virt + offset);
69}
70
208a1b4c 71static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT
72{
73 writew(val, chip->reg_area_virt + offset);
74}
75
208a1b4c 76static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
77{
78 return readl(chip->reg_area_virt + offset);
79}
80
208a1b4c 81static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT
82{
83 writel(val, chip->reg_area_virt + offset);
84}
85
208a1b4c 86static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 87{
ef21ca24 88 unsigned long end_time;
1da177e4
LT
89 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
90
ef21ca24 91 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
92 do {
93 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
94 return 0;
95 set_current_state(TASK_UNINTERRUPTIBLE);
8433a509 96 schedule_timeout_uninterruptible(1);
ef21ca24 97 } while (time_before(jiffies, end_time));
99b359ba 98 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT
99 return -EBUSY;
100}
101
208a1b4c 102static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 103{
208a1b4c 104 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
105 u32 cmd;
106
107 snd_ymfpci_codec_ready(chip, 0);
108 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
109 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
110}
111
208a1b4c 112static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 113{
208a1b4c 114 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
115
116 if (snd_ymfpci_codec_ready(chip, 0))
117 return ~0;
118 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
119 if (snd_ymfpci_codec_ready(chip, 0))
120 return ~0;
121 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
122 int i;
123 for (i = 0; i < 600; i++)
124 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
125 }
126 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
127}
128
129/*
130 * Misc routines
131 */
132
133static u32 snd_ymfpci_calc_delta(u32 rate)
134{
135 switch (rate) {
136 case 8000: return 0x02aaab00;
137 case 11025: return 0x03accd00;
138 case 16000: return 0x05555500;
139 case 22050: return 0x07599a00;
140 case 32000: return 0x0aaaab00;
141 case 44100: return 0x0eb33300;
142 default: return ((rate << 16) / 375) << 5;
143 }
144}
145
146static u32 def_rate[8] = {
147 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
148};
149
150static u32 snd_ymfpci_calc_lpfK(u32 rate)
151{
152 u32 i;
153 static u32 val[8] = {
154 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
155 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
156 };
157
158 if (rate == 44100)
159 return 0x40000000; /* FIXME: What's the right value? */
160 for (i = 0; i < 8; i++)
161 if (rate <= def_rate[i])
162 return val[i];
163 return val[0];
164}
165
166static u32 snd_ymfpci_calc_lpfQ(u32 rate)
167{
168 u32 i;
169 static u32 val[8] = {
170 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
171 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
172 };
173
174 if (rate == 44100)
175 return 0x370A0000;
176 for (i = 0; i < 8; i++)
177 if (rate <= def_rate[i])
178 return val[i];
179 return val[0];
180}
181
182/*
183 * Hardware start management
184 */
185
208a1b4c 186static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT
187{
188 unsigned long flags;
189
190 spin_lock_irqsave(&chip->reg_lock, flags);
191 if (chip->start_count++ > 0)
192 goto __end;
193 snd_ymfpci_writel(chip, YDSXGR_MODE,
194 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
195 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
196 __end:
197 spin_unlock_irqrestore(&chip->reg_lock, flags);
198}
199
208a1b4c 200static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT
201{
202 unsigned long flags;
203 long timeout = 1000;
204
205 spin_lock_irqsave(&chip->reg_lock, flags);
206 if (--chip->start_count > 0)
207 goto __end;
208 snd_ymfpci_writel(chip, YDSXGR_MODE,
209 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
210 while (timeout-- > 0) {
211 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
212 break;
213 }
214 if (atomic_read(&chip->interrupt_sleep_count)) {
215 atomic_set(&chip->interrupt_sleep_count, 0);
216 wake_up(&chip->interrupt_sleep);
217 }
218 __end:
219 spin_unlock_irqrestore(&chip->reg_lock, flags);
220}
221
222/*
223 * Playback voice management
224 */
225
208a1b4c
TI
226static int voice_alloc(struct snd_ymfpci *chip,
227 enum snd_ymfpci_voice_type type, int pair,
228 struct snd_ymfpci_voice **rvoice)
1da177e4 229{
208a1b4c 230 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT
231 int idx;
232
233 *rvoice = NULL;
234 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
235 voice = &chip->voices[idx];
236 voice2 = pair ? &chip->voices[idx+1] : NULL;
237 if (voice->use || (voice2 && voice2->use))
238 continue;
239 voice->use = 1;
240 if (voice2)
241 voice2->use = 1;
242 switch (type) {
243 case YMFPCI_PCM:
244 voice->pcm = 1;
245 if (voice2)
246 voice2->pcm = 1;
247 break;
248 case YMFPCI_SYNTH:
249 voice->synth = 1;
250 break;
251 case YMFPCI_MIDI:
252 voice->midi = 1;
253 break;
254 }
255 snd_ymfpci_hw_start(chip);
256 if (voice2)
257 snd_ymfpci_hw_start(chip);
258 *rvoice = voice;
259 return 0;
260 }
261 return -ENOMEM;
262}
263
208a1b4c
TI
264static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
265 enum snd_ymfpci_voice_type type, int pair,
266 struct snd_ymfpci_voice **rvoice)
1da177e4
LT
267{
268 unsigned long flags;
269 int result;
270
271 snd_assert(rvoice != NULL, return -EINVAL);
272 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
273
274 spin_lock_irqsave(&chip->voice_lock, flags);
275 for (;;) {
276 result = voice_alloc(chip, type, pair, rvoice);
277 if (result == 0 || type != YMFPCI_PCM)
278 break;
279 /* TODO: synth/midi voice deallocation */
280 break;
281 }
282 spin_unlock_irqrestore(&chip->voice_lock, flags);
283 return result;
284}
285
208a1b4c 286static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT
287{
288 unsigned long flags;
289
290 snd_assert(pvoice != NULL, return -EINVAL);
291 snd_ymfpci_hw_stop(chip);
292 spin_lock_irqsave(&chip->voice_lock, flags);
293 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
294 pvoice->ypcm = NULL;
295 pvoice->interrupt = NULL;
296 spin_unlock_irqrestore(&chip->voice_lock, flags);
297 return 0;
298}
299
300/*
301 * PCM part
302 */
303
208a1b4c 304static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 305{
208a1b4c 306 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
307 u32 pos, delta;
308
309 if ((ypcm = voice->ypcm) == NULL)
310 return;
311 if (ypcm->substream == NULL)
312 return;
313 spin_lock(&chip->reg_lock);
314 if (ypcm->running) {
315 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
316 if (pos < ypcm->last_pos)
317 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
318 else
319 delta = pos - ypcm->last_pos;
320 ypcm->period_pos += delta;
321 ypcm->last_pos = pos;
322 if (ypcm->period_pos >= ypcm->period_size) {
323 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
324 ypcm->period_pos %= ypcm->period_size;
325 spin_unlock(&chip->reg_lock);
326 snd_pcm_period_elapsed(ypcm->substream);
327 spin_lock(&chip->reg_lock);
328 }
9bcf6551
CL
329
330 if (unlikely(ypcm->update_pcm_vol)) {
331 unsigned int subs = ypcm->substream->number;
332 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 333 struct snd_ymfpci_playback_bank *bank;
9bcf6551
CL
334 u32 volume;
335
336 bank = &voice->bank[next_bank];
337 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
338 bank->left_gain_end = volume;
339 if (ypcm->output_rear)
340 bank->eff2_gain_end = volume;
341 if (ypcm->voices[1])
342 bank = &ypcm->voices[1]->bank[next_bank];
343 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
344 bank->right_gain_end = volume;
345 if (ypcm->output_rear)
346 bank->eff3_gain_end = volume;
347 ypcm->update_pcm_vol--;
348 }
1da177e4
LT
349 }
350 spin_unlock(&chip->reg_lock);
351}
352
208a1b4c 353static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 354{
208a1b4c
TI
355 struct snd_pcm_runtime *runtime = substream->runtime;
356 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
357 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT
358 u32 pos, delta;
359
360 spin_lock(&chip->reg_lock);
361 if (ypcm->running) {
362 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
363 if (pos < ypcm->last_pos)
364 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
365 else
366 delta = pos - ypcm->last_pos;
367 ypcm->period_pos += delta;
368 ypcm->last_pos = pos;
369 if (ypcm->period_pos >= ypcm->period_size) {
370 ypcm->period_pos %= ypcm->period_size;
371 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
372 spin_unlock(&chip->reg_lock);
373 snd_pcm_period_elapsed(substream);
374 spin_lock(&chip->reg_lock);
375 }
376 }
377 spin_unlock(&chip->reg_lock);
378}
379
208a1b4c 380static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
381 int cmd)
382{
208a1b4c
TI
383 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
384 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT
385 int result = 0;
386
387 spin_lock(&chip->reg_lock);
388 if (ypcm->voices[0] == NULL) {
389 result = -EINVAL;
390 goto __unlock;
391 }
392 switch (cmd) {
393 case SNDRV_PCM_TRIGGER_START:
394 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
395 case SNDRV_PCM_TRIGGER_RESUME:
396 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
397 if (ypcm->voices[1] != NULL)
398 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
399 ypcm->running = 1;
400 break;
401 case SNDRV_PCM_TRIGGER_STOP:
402 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
403 case SNDRV_PCM_TRIGGER_SUSPEND:
404 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
405 if (ypcm->voices[1] != NULL)
406 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
407 ypcm->running = 0;
408 break;
409 default:
410 result = -EINVAL;
411 break;
412 }
413 __unlock:
414 spin_unlock(&chip->reg_lock);
415 return result;
416}
208a1b4c 417static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
418 int cmd)
419{
208a1b4c
TI
420 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
421 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT
422 int result = 0;
423 u32 tmp;
424
425 spin_lock(&chip->reg_lock);
426 switch (cmd) {
427 case SNDRV_PCM_TRIGGER_START:
428 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
429 case SNDRV_PCM_TRIGGER_RESUME:
430 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
431 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
432 ypcm->running = 1;
433 break;
434 case SNDRV_PCM_TRIGGER_STOP:
435 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
436 case SNDRV_PCM_TRIGGER_SUSPEND:
437 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
438 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
439 ypcm->running = 0;
440 break;
441 default:
442 result = -EINVAL;
443 break;
444 }
445 spin_unlock(&chip->reg_lock);
446 return result;
447}
448
208a1b4c 449static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT
450{
451 int err;
452
453 if (ypcm->voices[1] != NULL && voices < 2) {
454 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
455 ypcm->voices[1] = NULL;
456 }
457 if (voices == 1 && ypcm->voices[0] != NULL)
458 return 0; /* already allocated */
459 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
460 return 0; /* already allocated */
461 if (voices > 1) {
462 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
463 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
464 ypcm->voices[0] = NULL;
465 }
466 }
467 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
468 if (err < 0)
469 return err;
470 ypcm->voices[0]->ypcm = ypcm;
471 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
472 if (voices > 1) {
473 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
474 ypcm->voices[1]->ypcm = ypcm;
475 }
476 return 0;
477}
478
208a1b4c
TI
479static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
480 struct snd_pcm_runtime *runtime,
9bcf6551 481 int has_pcm_volume)
1da177e4 482{
208a1b4c 483 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 484 u32 format;
9bcf6551
CL
485 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
486 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
487 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 488 struct snd_ymfpci_playback_bank *bank;
1da177e4 489 unsigned int nbank;
9bcf6551
CL
490 u32 vol_left, vol_right;
491 u8 use_left, use_right;
1da177e4
LT
492
493 snd_assert(voice != NULL, return);
9bcf6551
CL
494 if (runtime->channels == 1) {
495 use_left = 1;
496 use_right = 1;
497 } else {
498 use_left = (voiceidx & 1) == 0;
499 use_right = !use_left;
500 }
501 if (has_pcm_volume) {
502 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
503 [ypcm->substream->number].left << 15);
504 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
505 [ypcm->substream->number].right << 15);
506 } else {
507 vol_left = cpu_to_le32(0x40000000);
508 vol_right = cpu_to_le32(0x40000000);
509 }
510 format = runtime->channels == 2 ? 0x00010000 : 0;
511 if (snd_pcm_format_width(runtime->format) == 8)
512 format |= 0x80000000;
513 if (runtime->channels == 2 && (voiceidx & 1) != 0)
514 format |= 1;
1da177e4
LT
515 for (nbank = 0; nbank < 2; nbank++) {
516 bank = &voice->bank[nbank];
9bcf6551 517 memset(bank, 0, sizeof(*bank));
1da177e4 518 bank->format = cpu_to_le32(format);
9bcf6551
CL
519 bank->base = cpu_to_le32(runtime->dma_addr);
520 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 521 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT
522 bank->delta =
523 bank->delta_end = cpu_to_le32(delta);
524 bank->lpfK =
525 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL
526 bank->eg_gain =
527 bank->eg_gain_end = cpu_to_le32(0x40000000);
528
529 if (ypcm->output_front) {
530 if (use_left) {
531 bank->left_gain =
532 bank->left_gain_end = vol_left;
533 }
534 if (use_right) {
1da177e4 535 bank->right_gain =
9bcf6551 536 bank->right_gain_end = vol_right;
1da177e4 537 }
9bcf6551
CL
538 }
539 if (ypcm->output_rear) {
5a25c5cf
JK
540 if (!ypcm->swap_rear) {
541 if (use_left) {
542 bank->eff2_gain =
543 bank->eff2_gain_end = vol_left;
544 }
545 if (use_right) {
546 bank->eff3_gain =
547 bank->eff3_gain_end = vol_right;
548 }
549 } else {
550 /* The SPDIF out channels seem to be swapped, so we have
551 * to swap them here, too. The rear analog out channels
552 * will be wrong, but otherwise AC3 would not work.
553 */
554 if (use_left) {
555 bank->eff3_gain =
556 bank->eff3_gain_end = vol_left;
557 }
558 if (use_right) {
559 bank->eff2_gain =
560 bank->eff2_gain_end = vol_right;
561 }
562 }
563 }
1da177e4
LT
564 }
565}
566
208a1b4c 567static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4
LT
568{
569 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
570 4096, &chip->ac3_tmp_base) < 0)
571 return -ENOMEM;
572
573 chip->bank_effect[3][0]->base =
574 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
575 chip->bank_effect[3][0]->loop_end =
576 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
577 chip->bank_effect[4][0]->base =
578 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
579 chip->bank_effect[4][0]->loop_end =
580 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
581
582 spin_lock_irq(&chip->reg_lock);
583 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
584 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
585 spin_unlock_irq(&chip->reg_lock);
586 return 0;
587}
588
208a1b4c 589static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT
590{
591 spin_lock_irq(&chip->reg_lock);
592 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
593 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
594 spin_unlock_irq(&chip->reg_lock);
595 // snd_ymfpci_irq_wait(chip);
596 if (chip->ac3_tmp_base.area) {
597 snd_dma_free_pages(&chip->ac3_tmp_base);
598 chip->ac3_tmp_base.area = NULL;
599 }
600 return 0;
601}
602
208a1b4c
TI
603static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
604 struct snd_pcm_hw_params *hw_params)
1da177e4 605{
208a1b4c
TI
606 struct snd_pcm_runtime *runtime = substream->runtime;
607 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
608 int err;
609
610 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
611 return err;
612 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
613 return err;
614 return 0;
615}
616
208a1b4c 617static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 618{
208a1b4c
TI
619 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
620 struct snd_pcm_runtime *runtime = substream->runtime;
621 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
622
623 if (runtime->private_data == NULL)
624 return 0;
625 ypcm = runtime->private_data;
626
627 /* wait, until the PCI operations are not finished */
628 snd_ymfpci_irq_wait(chip);
629 snd_pcm_lib_free_pages(substream);
630 if (ypcm->voices[1]) {
631 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
632 ypcm->voices[1] = NULL;
633 }
634 if (ypcm->voices[0]) {
635 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
636 ypcm->voices[0] = NULL;
637 }
638 return 0;
639}
640
208a1b4c 641static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 642{
208a1b4c
TI
643 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
644 struct snd_pcm_runtime *runtime = substream->runtime;
645 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
646 unsigned int nvoice;
647
648 ypcm->period_size = runtime->period_size;
649 ypcm->buffer_size = runtime->buffer_size;
650 ypcm->period_pos = 0;
651 ypcm->last_pos = 0;
652 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL
653 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
654 substream->pcm == chip->pcm);
1da177e4
LT
655 return 0;
656}
657
208a1b4c
TI
658static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
659 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
660{
661 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
662}
663
208a1b4c 664static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 665{
208a1b4c 666 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
667
668 /* wait, until the PCI operations are not finished */
669 snd_ymfpci_irq_wait(chip);
670 return snd_pcm_lib_free_pages(substream);
671}
672
208a1b4c 673static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 674{
208a1b4c
TI
675 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
676 struct snd_pcm_runtime *runtime = substream->runtime;
677 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
678 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT
679 int nbank;
680 u32 rate, format;
681
682 ypcm->period_size = runtime->period_size;
683 ypcm->buffer_size = runtime->buffer_size;
684 ypcm->period_pos = 0;
685 ypcm->last_pos = 0;
686 ypcm->shift = 0;
687 rate = ((48000 * 4096) / runtime->rate) - 1;
688 format = 0;
689 if (runtime->channels == 2) {
690 format |= 2;
691 ypcm->shift++;
692 }
693 if (snd_pcm_format_width(runtime->format) == 8)
694 format |= 1;
695 else
696 ypcm->shift++;
697 switch (ypcm->capture_bank_number) {
698 case 0:
699 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
700 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
701 break;
702 case 1:
703 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
704 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
705 break;
706 }
707 for (nbank = 0; nbank < 2; nbank++) {
708 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
709 bank->base = cpu_to_le32(runtime->dma_addr);
710 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
711 bank->start = 0;
712 bank->num_of_loops = 0;
713 }
714 return 0;
715}
716
208a1b4c 717static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 718{
208a1b4c
TI
719 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
720 struct snd_pcm_runtime *runtime = substream->runtime;
721 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
722 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT
723
724 if (!(ypcm->running && voice))
725 return 0;
726 return le32_to_cpu(voice->bank[chip->active_bank].start);
727}
728
208a1b4c 729static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 730{
208a1b4c
TI
731 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
732 struct snd_pcm_runtime *runtime = substream->runtime;
733 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
734
735 if (!ypcm->running)
736 return 0;
737 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
738}
739
208a1b4c 740static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4
LT
741{
742 wait_queue_t wait;
743 int loops = 4;
744
745 while (loops-- > 0) {
746 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
747 continue;
748 init_waitqueue_entry(&wait, current);
749 add_wait_queue(&chip->interrupt_sleep, &wait);
750 atomic_inc(&chip->interrupt_sleep_count);
8433a509 751 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT
752 remove_wait_queue(&chip->interrupt_sleep, &wait);
753 }
754}
755
7d12e780 756static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
1da177e4 757{
208a1b4c 758 struct snd_ymfpci *chip = dev_id;
1da177e4 759 u32 status, nvoice, mode;
208a1b4c 760 struct snd_ymfpci_voice *voice;
1da177e4
LT
761
762 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
763 if (status & 0x80000000) {
764 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
765 spin_lock(&chip->voice_lock);
766 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
767 voice = &chip->voices[nvoice];
768 if (voice->interrupt)
769 voice->interrupt(chip, voice);
770 }
771 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
772 if (chip->capture_substream[nvoice])
773 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
774 }
775#if 0
776 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
777 if (chip->effect_substream[nvoice])
778 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
779 }
780#endif
781 spin_unlock(&chip->voice_lock);
782 spin_lock(&chip->reg_lock);
783 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
784 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
785 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
786 spin_unlock(&chip->reg_lock);
787
788 if (atomic_read(&chip->interrupt_sleep_count)) {
789 atomic_set(&chip->interrupt_sleep_count, 0);
790 wake_up(&chip->interrupt_sleep);
791 }
792 }
793
794 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
795 if (status & 1) {
796 if (chip->timer)
797 snd_timer_interrupt(chip->timer, chip->timer->sticks);
798 }
799 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
800
801 if (chip->rawmidi)
7d12e780 802 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
1da177e4
LT
803 return IRQ_HANDLED;
804}
805
208a1b4c 806static struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT
807{
808 .info = (SNDRV_PCM_INFO_MMAP |
809 SNDRV_PCM_INFO_MMAP_VALID |
810 SNDRV_PCM_INFO_INTERLEAVED |
811 SNDRV_PCM_INFO_BLOCK_TRANSFER |
812 SNDRV_PCM_INFO_PAUSE |
813 SNDRV_PCM_INFO_RESUME),
814 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
815 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
816 .rate_min = 8000,
817 .rate_max = 48000,
818 .channels_min = 1,
819 .channels_max = 2,
820 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
821 .period_bytes_min = 64,
822 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
823 .periods_min = 3,
824 .periods_max = 1024,
825 .fifo_size = 0,
826};
827
208a1b4c 828static struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT
829{
830 .info = (SNDRV_PCM_INFO_MMAP |
831 SNDRV_PCM_INFO_MMAP_VALID |
832 SNDRV_PCM_INFO_INTERLEAVED |
833 SNDRV_PCM_INFO_BLOCK_TRANSFER |
834 SNDRV_PCM_INFO_PAUSE |
835 SNDRV_PCM_INFO_RESUME),
836 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
837 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
838 .rate_min = 8000,
839 .rate_max = 48000,
840 .channels_min = 1,
841 .channels_max = 2,
842 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
843 .period_bytes_min = 64,
844 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
845 .periods_min = 3,
846 .periods_max = 1024,
847 .fifo_size = 0,
848};
849
208a1b4c 850static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 851{
4d572776 852 kfree(runtime->private_data);
1da177e4
LT
853}
854
208a1b4c 855static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 856{
208a1b4c
TI
857 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
858 struct snd_pcm_runtime *runtime = substream->runtime;
859 struct snd_ymfpci_pcm *ypcm;
1da177e4 860
e560d8d8 861 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT
862 if (ypcm == NULL)
863 return -ENOMEM;
864 ypcm->chip = chip;
865 ypcm->type = PLAYBACK_VOICE;
866 ypcm->substream = substream;
867 runtime->hw = snd_ymfpci_playback;
868 runtime->private_data = ypcm;
869 runtime->private_free = snd_ymfpci_pcm_free_substream;
870 /* FIXME? True value is 256/48 = 5.33333 ms */
871 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
872 return 0;
873}
874
875/* call with spinlock held */
208a1b4c 876static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT
877{
878 if (! chip->rear_opened) {
879 if (! chip->spdif_opened) /* set AC3 */
880 snd_ymfpci_writel(chip, YDSXGR_MODE,
881 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
882 /* enable second codec (4CHEN) */
883 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
884 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
885 }
886}
887
888/* call with spinlock held */
208a1b4c 889static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT
890{
891 if (! chip->rear_opened) {
892 if (! chip->spdif_opened)
893 snd_ymfpci_writel(chip, YDSXGR_MODE,
894 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
895 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
896 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
897 }
898}
899
208a1b4c 900static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 901{
208a1b4c
TI
902 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
903 struct snd_pcm_runtime *runtime = substream->runtime;
904 struct snd_ymfpci_pcm *ypcm;
905 struct snd_kcontrol *kctl;
1da177e4
LT
906 int err;
907
908 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
909 return err;
910 ypcm = runtime->private_data;
911 ypcm->output_front = 1;
912 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
5a25c5cf 913 ypcm->swap_rear = chip->rear_swap;
1da177e4
LT
914 spin_lock_irq(&chip->reg_lock);
915 if (ypcm->output_rear) {
916 ymfpci_open_extension(chip);
917 chip->rear_opened++;
918 }
919 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL
920
921 kctl = chip->pcm_mixer[substream->number].ctl;
922 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
923 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT
924 return 0;
925}
926
208a1b4c 927static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 928{
208a1b4c
TI
929 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
930 struct snd_pcm_runtime *runtime = substream->runtime;
931 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
932 int err;
933
934 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
935 return err;
936 ypcm = runtime->private_data;
937 ypcm->output_front = 0;
938 ypcm->output_rear = 1;
939 spin_lock_irq(&chip->reg_lock);
940 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
941 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
942 ymfpci_open_extension(chip);
943 chip->spdif_pcm_bits = chip->spdif_bits;
944 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
945 chip->spdif_opened++;
946 spin_unlock_irq(&chip->reg_lock);
947
948 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
949 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
950 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
951 return 0;
952}
953
208a1b4c 954static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 955{
208a1b4c
TI
956 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
957 struct snd_pcm_runtime *runtime = substream->runtime;
958 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
959 int err;
960
961 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
962 return err;
963 ypcm = runtime->private_data;
964 ypcm->output_front = 0;
965 ypcm->output_rear = 1;
966 spin_lock_irq(&chip->reg_lock);
967 ymfpci_open_extension(chip);
968 chip->rear_opened++;
969 spin_unlock_irq(&chip->reg_lock);
970 return 0;
971}
972
208a1b4c 973static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT
974 u32 capture_bank_number)
975{
208a1b4c
TI
976 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
977 struct snd_pcm_runtime *runtime = substream->runtime;
978 struct snd_ymfpci_pcm *ypcm;
1da177e4 979
e560d8d8 980 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT
981 if (ypcm == NULL)
982 return -ENOMEM;
983 ypcm->chip = chip;
984 ypcm->type = capture_bank_number + CAPTURE_REC;
985 ypcm->substream = substream;
986 ypcm->capture_bank_number = capture_bank_number;
987 chip->capture_substream[capture_bank_number] = substream;
988 runtime->hw = snd_ymfpci_capture;
989 /* FIXME? True value is 256/48 = 5.33333 ms */
990 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
991 runtime->private_data = ypcm;
992 runtime->private_free = snd_ymfpci_pcm_free_substream;
993 snd_ymfpci_hw_start(chip);
994 return 0;
995}
996
208a1b4c 997static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT
998{
999 return snd_ymfpci_capture_open(substream, 0);
1000}
1001
208a1b4c 1002static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT
1003{
1004 return snd_ymfpci_capture_open(substream, 1);
1005}
1006
208a1b4c 1007static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT
1008{
1009 return 0;
1010}
1011
208a1b4c 1012static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1013{
208a1b4c
TI
1014 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1015 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1016 struct snd_kcontrol *kctl;
1da177e4
LT
1017
1018 spin_lock_irq(&chip->reg_lock);
1019 if (ypcm->output_rear && chip->rear_opened > 0) {
1020 chip->rear_opened--;
1021 ymfpci_close_extension(chip);
1022 }
1023 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL
1024 kctl = chip->pcm_mixer[substream->number].ctl;
1025 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1026 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT
1027 return snd_ymfpci_playback_close_1(substream);
1028}
1029
208a1b4c 1030static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1031{
208a1b4c 1032 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
1033
1034 spin_lock_irq(&chip->reg_lock);
1035 chip->spdif_opened = 0;
1036 ymfpci_close_extension(chip);
1037 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1038 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1039 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1040 spin_unlock_irq(&chip->reg_lock);
1041 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1042 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1043 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1044 return snd_ymfpci_playback_close_1(substream);
1045}
1046
208a1b4c 1047static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1048{
208a1b4c 1049 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
1050
1051 spin_lock_irq(&chip->reg_lock);
1052 if (chip->rear_opened > 0) {
1053 chip->rear_opened--;
1054 ymfpci_close_extension(chip);
1055 }
1056 spin_unlock_irq(&chip->reg_lock);
1057 return snd_ymfpci_playback_close_1(substream);
1058}
1059
208a1b4c 1060static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1061{
208a1b4c
TI
1062 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1063 struct snd_pcm_runtime *runtime = substream->runtime;
1064 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
1065
1066 if (ypcm != NULL) {
1067 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1068 snd_ymfpci_hw_stop(chip);
1069 }
1070 return 0;
1071}
1072
208a1b4c 1073static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT
1074 .open = snd_ymfpci_playback_open,
1075 .close = snd_ymfpci_playback_close,
1076 .ioctl = snd_pcm_lib_ioctl,
1077 .hw_params = snd_ymfpci_playback_hw_params,
1078 .hw_free = snd_ymfpci_playback_hw_free,
1079 .prepare = snd_ymfpci_playback_prepare,
1080 .trigger = snd_ymfpci_playback_trigger,
1081 .pointer = snd_ymfpci_playback_pointer,
1082};
1083
208a1b4c 1084static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT
1085 .open = snd_ymfpci_capture_rec_open,
1086 .close = snd_ymfpci_capture_close,
1087 .ioctl = snd_pcm_lib_ioctl,
1088 .hw_params = snd_ymfpci_capture_hw_params,
1089 .hw_free = snd_ymfpci_capture_hw_free,
1090 .prepare = snd_ymfpci_capture_prepare,
1091 .trigger = snd_ymfpci_capture_trigger,
1092 .pointer = snd_ymfpci_capture_pointer,
1093};
1094
208a1b4c 1095int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1096{
208a1b4c 1097 struct snd_pcm *pcm;
1da177e4
LT
1098 int err;
1099
1100 if (rpcm)
1101 *rpcm = NULL;
1102 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1103 return err;
1104 pcm->private_data = chip;
1da177e4
LT
1105
1106 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1107 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1108
1109 /* global setup */
1110 pcm->info_flags = 0;
1111 strcpy(pcm->name, "YMFPCI");
1112 chip->pcm = pcm;
1113
1114 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1115 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1116
1117 if (rpcm)
1118 *rpcm = pcm;
1119 return 0;
1120}
1121
208a1b4c 1122static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT
1123 .open = snd_ymfpci_capture_ac97_open,
1124 .close = snd_ymfpci_capture_close,
1125 .ioctl = snd_pcm_lib_ioctl,
1126 .hw_params = snd_ymfpci_capture_hw_params,
1127 .hw_free = snd_ymfpci_capture_hw_free,
1128 .prepare = snd_ymfpci_capture_prepare,
1129 .trigger = snd_ymfpci_capture_trigger,
1130 .pointer = snd_ymfpci_capture_pointer,
1131};
1132
208a1b4c 1133int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1134{
208a1b4c 1135 struct snd_pcm *pcm;
1da177e4
LT
1136 int err;
1137
1138 if (rpcm)
1139 *rpcm = NULL;
1140 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1141 return err;
1142 pcm->private_data = chip;
1da177e4
LT
1143
1144 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1145
1146 /* global setup */
1147 pcm->info_flags = 0;
1148 sprintf(pcm->name, "YMFPCI - %s",
1149 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1150 chip->pcm2 = pcm;
1151
1152 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1153 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1154
1155 if (rpcm)
1156 *rpcm = pcm;
1157 return 0;
1158}
1159
208a1b4c 1160static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT
1161 .open = snd_ymfpci_playback_spdif_open,
1162 .close = snd_ymfpci_playback_spdif_close,
1163 .ioctl = snd_pcm_lib_ioctl,
1164 .hw_params = snd_ymfpci_playback_hw_params,
1165 .hw_free = snd_ymfpci_playback_hw_free,
1166 .prepare = snd_ymfpci_playback_prepare,
1167 .trigger = snd_ymfpci_playback_trigger,
1168 .pointer = snd_ymfpci_playback_pointer,
1169};
1170
208a1b4c 1171int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1172{
208a1b4c 1173 struct snd_pcm *pcm;
1da177e4
LT
1174 int err;
1175
1176 if (rpcm)
1177 *rpcm = NULL;
1178 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1179 return err;
1180 pcm->private_data = chip;
1da177e4
LT
1181
1182 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1183
1184 /* global setup */
1185 pcm->info_flags = 0;
1186 strcpy(pcm->name, "YMFPCI - IEC958");
1187 chip->pcm_spdif = pcm;
1188
1189 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1190 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1191
1192 if (rpcm)
1193 *rpcm = pcm;
1194 return 0;
1195}
1196
208a1b4c 1197static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT
1198 .open = snd_ymfpci_playback_4ch_open,
1199 .close = snd_ymfpci_playback_4ch_close,
1200 .ioctl = snd_pcm_lib_ioctl,
1201 .hw_params = snd_ymfpci_playback_hw_params,
1202 .hw_free = snd_ymfpci_playback_hw_free,
1203 .prepare = snd_ymfpci_playback_prepare,
1204 .trigger = snd_ymfpci_playback_trigger,
1205 .pointer = snd_ymfpci_playback_pointer,
1206};
1207
208a1b4c 1208int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1209{
208a1b4c 1210 struct snd_pcm *pcm;
1da177e4
LT
1211 int err;
1212
1213 if (rpcm)
1214 *rpcm = NULL;
1215 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1216 return err;
1217 pcm->private_data = chip;
1da177e4
LT
1218
1219 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1220
1221 /* global setup */
1222 pcm->info_flags = 0;
1223 strcpy(pcm->name, "YMFPCI - Rear PCM");
1224 chip->pcm_4ch = pcm;
1225
1226 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1227 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1228
1229 if (rpcm)
1230 *rpcm = pcm;
1231 return 0;
1232}
1233
208a1b4c 1234static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1235{
1236 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1237 uinfo->count = 1;
1238 return 0;
1239}
1240
208a1b4c
TI
1241static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1242 struct snd_ctl_elem_value *ucontrol)
1da177e4 1243{
208a1b4c 1244 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1245
1246 spin_lock_irq(&chip->reg_lock);
1247 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1248 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1249 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT
1250 spin_unlock_irq(&chip->reg_lock);
1251 return 0;
1252}
1253
208a1b4c
TI
1254static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1255 struct snd_ctl_elem_value *ucontrol)
1da177e4 1256{
208a1b4c 1257 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1258 unsigned int val;
1259 int change;
1260
1261 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1262 (ucontrol->value.iec958.status[1] << 8);
1263 spin_lock_irq(&chip->reg_lock);
1264 change = chip->spdif_bits != val;
1265 chip->spdif_bits = val;
1266 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1267 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1268 spin_unlock_irq(&chip->reg_lock);
1269 return change;
1270}
1271
208a1b4c 1272static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1da177e4
LT
1273{
1274 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1275 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1276 .info = snd_ymfpci_spdif_default_info,
1277 .get = snd_ymfpci_spdif_default_get,
1278 .put = snd_ymfpci_spdif_default_put
1279};
1280
208a1b4c 1281static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1282{
1283 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1284 uinfo->count = 1;
1285 return 0;
1286}
1287
208a1b4c
TI
1288static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1289 struct snd_ctl_elem_value *ucontrol)
1da177e4 1290{
208a1b4c 1291 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1292
1293 spin_lock_irq(&chip->reg_lock);
1294 ucontrol->value.iec958.status[0] = 0x3e;
1295 ucontrol->value.iec958.status[1] = 0xff;
1296 spin_unlock_irq(&chip->reg_lock);
1297 return 0;
1298}
1299
208a1b4c 1300static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1da177e4
LT
1301{
1302 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1303 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1304 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1305 .info = snd_ymfpci_spdif_mask_info,
1306 .get = snd_ymfpci_spdif_mask_get,
1307};
1308
208a1b4c 1309static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1310{
1311 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1312 uinfo->count = 1;
1313 return 0;
1314}
1315
208a1b4c
TI
1316static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1da177e4 1318{
208a1b4c 1319 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1320
1321 spin_lock_irq(&chip->reg_lock);
1322 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1323 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1324 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT
1325 spin_unlock_irq(&chip->reg_lock);
1326 return 0;
1327}
1328
208a1b4c
TI
1329static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1330 struct snd_ctl_elem_value *ucontrol)
1da177e4 1331{
208a1b4c 1332 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1333 unsigned int val;
1334 int change;
1335
1336 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1337 (ucontrol->value.iec958.status[1] << 8);
1338 spin_lock_irq(&chip->reg_lock);
1339 change = chip->spdif_pcm_bits != val;
1340 chip->spdif_pcm_bits = val;
1341 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1342 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1343 spin_unlock_irq(&chip->reg_lock);
1344 return change;
1345}
1346
208a1b4c 1347static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1da177e4
LT
1348{
1349 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1350 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1351 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1352 .info = snd_ymfpci_spdif_stream_info,
1353 .get = snd_ymfpci_spdif_stream_get,
1354 .put = snd_ymfpci_spdif_stream_put
1355};
1356
208a1b4c 1357static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4
LT
1358{
1359 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1360
1361 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1362 info->count = 1;
1363 info->value.enumerated.items = 3;
1364 if (info->value.enumerated.item > 2)
1365 info->value.enumerated.item = 2;
1366 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1367 return 0;
1368}
1369
208a1b4c 1370static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1371{
208a1b4c 1372 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1373 u16 reg;
1374
1375 spin_lock_irq(&chip->reg_lock);
1376 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1377 spin_unlock_irq(&chip->reg_lock);
1378 if (!(reg & 0x100))
1379 value->value.enumerated.item[0] = 0;
1380 else
1381 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1382 return 0;
1383}
1384
208a1b4c 1385static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1386{
208a1b4c 1387 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1388 u16 reg, old_reg;
1389
1390 spin_lock_irq(&chip->reg_lock);
1391 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1392 if (value->value.enumerated.item[0] == 0)
1393 reg = old_reg & ~0x100;
1394 else
1395 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1396 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1397 spin_unlock_irq(&chip->reg_lock);
1398 return reg != old_reg;
1399}
1400
208a1b4c 1401static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1da177e4
LT
1402 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1403 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1404 .name = "Direct Recording Source",
1405 .info = snd_ymfpci_drec_source_info,
1406 .get = snd_ymfpci_drec_source_get,
1407 .put = snd_ymfpci_drec_source_put
1408};
1409
1410/*
1411 * Mixer controls
1412 */
1413
d602c885 1414#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT
1415{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1416 .info = snd_ymfpci_info_single, \
1417 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1418 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1419
208a1b4c
TI
1420static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_info *uinfo)
1da177e4 1422{
d602c885
GM
1423 int reg = kcontrol->private_value & 0xffff;
1424
1425 switch (reg) {
1da177e4
LT
1426 case YDSXGR_SPDIFOUTCTRL: break;
1427 case YDSXGR_SPDIFINCTRL: break;
1428 default: return -EINVAL;
1429 }
467a8c2f 1430 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1da177e4
LT
1431 uinfo->count = 1;
1432 uinfo->value.integer.min = 0;
467a8c2f 1433 uinfo->value.integer.max = 1;
1da177e4
LT
1434 return 0;
1435}
1436
208a1b4c
TI
1437static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1438 struct snd_ctl_elem_value *ucontrol)
1da177e4 1439{
208a1b4c 1440 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM
1441 int reg = kcontrol->private_value & 0xffff;
1442 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1443 unsigned int mask = 1;
1da177e4 1444
d602c885 1445 switch (reg) {
1da177e4
LT
1446 case YDSXGR_SPDIFOUTCTRL: break;
1447 case YDSXGR_SPDIFINCTRL: break;
1448 default: return -EINVAL;
1449 }
d602c885
GM
1450 ucontrol->value.integer.value[0] =
1451 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT
1452 return 0;
1453}
1454
208a1b4c
TI
1455static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1456 struct snd_ctl_elem_value *ucontrol)
1da177e4 1457{
208a1b4c 1458 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM
1459 int reg = kcontrol->private_value & 0xffff;
1460 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1461 unsigned int mask = 1;
1da177e4
LT
1462 int change;
1463 unsigned int val, oval;
1464
d602c885 1465 switch (reg) {
1da177e4
LT
1466 case YDSXGR_SPDIFOUTCTRL: break;
1467 case YDSXGR_SPDIFINCTRL: break;
1468 default: return -EINVAL;
1469 }
1470 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT
1471 val <<= shift;
1472 spin_lock_irq(&chip->reg_lock);
1473 oval = snd_ymfpci_readl(chip, reg);
1474 val = (oval & ~(mask << shift)) | val;
1475 change = val != oval;
1476 snd_ymfpci_writel(chip, reg, val);
1477 spin_unlock_irq(&chip->reg_lock);
1478 return change;
1479}
1480
33925186
TI
1481static DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1482
1da177e4
LT
1483#define YMFPCI_DOUBLE(xname, xindex, reg) \
1484{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
33925186 1485 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1da177e4
LT
1486 .info = snd_ymfpci_info_double, \
1487 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
33925186
TI
1488 .private_value = reg, \
1489 .tlv = { .p = db_scale_native } }
1da177e4 1490
208a1b4c 1491static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1492{
1493 unsigned int reg = kcontrol->private_value;
1da177e4
LT
1494
1495 if (reg < 0x80 || reg >= 0xc0)
1496 return -EINVAL;
467a8c2f 1497 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT
1498 uinfo->count = 2;
1499 uinfo->value.integer.min = 0;
467a8c2f 1500 uinfo->value.integer.max = 16383;
1da177e4
LT
1501 return 0;
1502}
1503
208a1b4c 1504static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1505{
208a1b4c 1506 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1507 unsigned int reg = kcontrol->private_value;
467a8c2f 1508 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT
1509 unsigned int val;
1510
1511 if (reg < 0x80 || reg >= 0xc0)
1512 return -EINVAL;
1513 spin_lock_irq(&chip->reg_lock);
1514 val = snd_ymfpci_readl(chip, reg);
1515 spin_unlock_irq(&chip->reg_lock);
1516 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1517 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT
1518 return 0;
1519}
1520
208a1b4c 1521static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1522{
208a1b4c 1523 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1524 unsigned int reg = kcontrol->private_value;
467a8c2f 1525 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT
1526 int change;
1527 unsigned int val1, val2, oval;
1528
1529 if (reg < 0x80 || reg >= 0xc0)
1530 return -EINVAL;
1531 val1 = ucontrol->value.integer.value[0] & mask;
1532 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT
1533 val1 <<= shift_left;
1534 val2 <<= shift_right;
1535 spin_lock_irq(&chip->reg_lock);
1536 oval = snd_ymfpci_readl(chip, reg);
1537 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1538 change = val1 != oval;
1539 snd_ymfpci_writel(chip, reg, val1);
1540 spin_unlock_irq(&chip->reg_lock);
1541 return change;
1542}
1543
1544/*
1545 * 4ch duplication
1546 */
208a1b4c 1547static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1548{
1549 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1550 uinfo->count = 1;
1551 uinfo->value.integer.min = 0;
1552 uinfo->value.integer.max = 1;
1553 return 0;
1554}
1555
208a1b4c 1556static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1557{
208a1b4c 1558 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1559 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1560 return 0;
1561}
1562
208a1b4c 1563static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1564{
208a1b4c 1565 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1566 int change;
1567 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1568 if (change)
1569 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1570 return change;
1571}
1572
1573
208a1b4c 1574static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1da177e4
LT
1575YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1576YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1577YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1578YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1579YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1580YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1581YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1582YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1583YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1584YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1585YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1586YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1587YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM
1588YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1589YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1590YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT
1591{
1592 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1593 .name = "4ch Duplication",
1594 .info = snd_ymfpci_info_dup4ch,
1595 .get = snd_ymfpci_get_dup4ch,
1596 .put = snd_ymfpci_put_dup4ch,
1597},
1598};
1599
1600
1601/*
1602 * GPIO
1603 */
1604
208a1b4c 1605static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT
1606{
1607 u16 reg, mode;
1608 unsigned long flags;
1609
1610 spin_lock_irqsave(&chip->reg_lock, flags);
1611 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1612 reg &= ~(1 << (pin + 8));
1613 reg |= (1 << pin);
1614 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1615 /* set the level mode for input line */
1616 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1617 mode &= ~(3 << (pin * 2));
1618 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1619 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1620 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1621 spin_unlock_irqrestore(&chip->reg_lock, flags);
1622 return (mode >> pin) & 1;
1623}
1624
208a1b4c 1625static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT
1626{
1627 u16 reg;
1628 unsigned long flags;
1629
1630 spin_lock_irqsave(&chip->reg_lock, flags);
1631 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1632 reg &= ~(1 << pin);
1633 reg &= ~(1 << (pin + 8));
1634 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1635 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1636 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1637 spin_unlock_irqrestore(&chip->reg_lock, flags);
1638
1639 return 0;
1640}
1641
208a1b4c 1642static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1643{
1644 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1645 uinfo->count = 1;
1646 uinfo->value.integer.min = 0;
1647 uinfo->value.integer.max = 1;
1648 return 0;
1649}
1650
208a1b4c 1651static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1652{
208a1b4c 1653 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1654 int pin = (int)kcontrol->private_value;
1655 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1656 return 0;
1657}
1658
208a1b4c 1659static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1660{
208a1b4c 1661 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1662 int pin = (int)kcontrol->private_value;
1663
1664 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1665 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1666 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1667 return 1;
1668 }
1669 return 0;
1670}
1671
208a1b4c 1672static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1da177e4
LT
1673 .name = "Shared Rear/Line-In Switch",
1674 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1675 .info = snd_ymfpci_gpio_sw_info,
1676 .get = snd_ymfpci_gpio_sw_get,
1677 .put = snd_ymfpci_gpio_sw_put,
1678 .private_value = 2,
1679};
1680
9bcf6551
CL
1681/*
1682 * PCM voice volume
1683 */
1684
208a1b4c
TI
1685static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1686 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL
1687{
1688 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1689 uinfo->count = 2;
1690 uinfo->value.integer.min = 0;
1691 uinfo->value.integer.max = 0x8000;
1692 return 0;
1693}
1694
208a1b4c
TI
1695static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1696 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1697{
208a1b4c 1698 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL
1699 unsigned int subs = kcontrol->id.subdevice;
1700
1701 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1702 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1703 return 0;
1704}
1705
208a1b4c
TI
1706static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1707 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1708{
208a1b4c 1709 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1710 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1711 struct snd_pcm_substream *substream;
9bcf6551
CL
1712 unsigned long flags;
1713
1714 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1715 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1716 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1717 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1718
208a1b4c 1719 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL
1720 spin_lock_irqsave(&chip->voice_lock, flags);
1721 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1722 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9bcf6551
CL
1723 ypcm->update_pcm_vol = 2;
1724 }
1725 spin_unlock_irqrestore(&chip->voice_lock, flags);
1726 return 1;
1727 }
1728 return 0;
1729}
1730
208a1b4c 1731static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
9bcf6551
CL
1732 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1733 .name = "PCM Playback Volume",
1734 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1735 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1736 .info = snd_ymfpci_pcm_vol_info,
1737 .get = snd_ymfpci_pcm_vol_get,
1738 .put = snd_ymfpci_pcm_vol_put,
1739};
1740
1da177e4
LT
1741
1742/*
1743 * Mixer routines
1744 */
1745
208a1b4c 1746static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1747{
208a1b4c 1748 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT
1749 chip->ac97_bus = NULL;
1750}
1751
208a1b4c 1752static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1753{
208a1b4c 1754 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
1755 chip->ac97 = NULL;
1756}
1757
5a25c5cf 1758int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch, int rear_swap)
1da177e4 1759{
208a1b4c
TI
1760 struct snd_ac97_template ac97;
1761 struct snd_kcontrol *kctl;
1762 struct snd_pcm_substream *substream;
1da177e4
LT
1763 unsigned int idx;
1764 int err;
208a1b4c 1765 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1766 .write = snd_ymfpci_codec_write,
1767 .read = snd_ymfpci_codec_read,
1768 };
1769
5a25c5cf 1770 chip->rear_swap = rear_swap;
1da177e4
LT
1771 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1772 return err;
1773 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1774 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1775
1776 memset(&ac97, 0, sizeof(ac97));
1777 ac97.private_data = chip;
1778 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1779 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1780 return err;
1781
1782 /* to be sure */
1783 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1784 AC97_EA_VRA|AC97_EA_VRM, 0);
1785
1786 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1787 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1788 return err;
1789 }
1790
1791 /* add S/PDIF control */
1792 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1793 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1794 return err;
1795 kctl->id.device = chip->pcm_spdif->device;
1796 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1797 return err;
1798 kctl->id.device = chip->pcm_spdif->device;
1799 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1800 return err;
1801 kctl->id.device = chip->pcm_spdif->device;
1802 chip->spdif_pcm_ctl = kctl;
1803
1804 /* direct recording source */
1805 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1806 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1807 return err;
1808
1809 /*
1810 * shared rear/line-in
1811 */
1812 if (rear_switch) {
1813 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1814 return err;
1815 }
1816
9bcf6551
CL
1817 /* per-voice volume */
1818 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1819 for (idx = 0; idx < 32; ++idx) {
1820 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1821 if (!kctl)
1822 return -ENOMEM;
1823 kctl->id.device = chip->pcm->device;
1824 kctl->id.subdevice = idx;
1825 kctl->private_value = (unsigned long)substream;
1826 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1827 return err;
1828 chip->pcm_mixer[idx].left = 0x8000;
1829 chip->pcm_mixer[idx].right = 0x8000;
1830 chip->pcm_mixer[idx].ctl = kctl;
1831 substream = substream->next;
1832 }
1833
1da177e4
LT
1834 return 0;
1835}
1836
1837
1838/*
1839 * timer
1840 */
1841
208a1b4c 1842static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1843{
208a1b4c 1844 struct snd_ymfpci *chip;
1da177e4
LT
1845 unsigned long flags;
1846 unsigned int count;
1847
1848 chip = snd_timer_chip(timer);
d44c39ac 1849 count = (timer->sticks << 1) - 1;
1da177e4
LT
1850 spin_lock_irqsave(&chip->reg_lock, flags);
1851 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1852 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1853 spin_unlock_irqrestore(&chip->reg_lock, flags);
1854 return 0;
1855}
1856
208a1b4c 1857static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1858{
208a1b4c 1859 struct snd_ymfpci *chip;
1da177e4
LT
1860 unsigned long flags;
1861
1862 chip = snd_timer_chip(timer);
1863 spin_lock_irqsave(&chip->reg_lock, flags);
1864 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1865 spin_unlock_irqrestore(&chip->reg_lock, flags);
1866 return 0;
1867}
1868
208a1b4c 1869static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT
1870 unsigned long *num, unsigned long *den)
1871{
1872 *num = 1;
d44c39ac 1873 *den = 48000;
1da177e4
LT
1874 return 0;
1875}
1876
208a1b4c 1877static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1878 .flags = SNDRV_TIMER_HW_AUTO,
d44c39ac
CL
1879 .resolution = 20833, /* 1/fs = 20.8333...us */
1880 .ticks = 0x8000,
1da177e4
LT
1881 .start = snd_ymfpci_timer_start,
1882 .stop = snd_ymfpci_timer_stop,
1883 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1884};
1885
208a1b4c 1886int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1887{
208a1b4c
TI
1888 struct snd_timer *timer = NULL;
1889 struct snd_timer_id tid;
1da177e4
LT
1890 int err;
1891
1892 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1893 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1894 tid.card = chip->card->number;
1895 tid.device = device;
1896 tid.subdevice = 0;
1897 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1898 strcpy(timer->name, "YMFPCI timer");
1899 timer->private_data = chip;
1900 timer->hw = snd_ymfpci_timer_hw;
1901 }
1902 chip->timer = timer;
1903 return err;
1904}
1905
1906
1907/*
1908 * proc interface
1909 */
1910
208a1b4c
TI
1911static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1912 struct snd_info_buffer *buffer)
1da177e4 1913{
208a1b4c 1914 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT
1915 int i;
1916
1917 snd_iprintf(buffer, "YMFPCI\n\n");
1918 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1919 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1920}
1921
208a1b4c 1922static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1923{
208a1b4c 1924 struct snd_info_entry *entry;
1da177e4
LT
1925
1926 if (! snd_card_proc_new(card, "ymfpci", &entry))
bf850204 1927 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
1da177e4
LT
1928 return 0;
1929}
1930
1931/*
1932 * initialization routines
1933 */
1934
1935static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1936{
1937 u8 cmd;
1938
1939 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1940#if 0 // force to reset
1941 if (cmd & 0x03) {
1942#endif
1943 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1944 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1945 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1946 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1947 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1948#if 0
1949 }
1950#endif
1951}
1952
208a1b4c 1953static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT
1954{
1955 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1956}
1957
208a1b4c 1958static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT
1959{
1960 u32 val;
1961 int timeout = 1000;
1962
1963 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1964 if (val)
1965 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1966 while (timeout-- > 0) {
1967 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1968 if ((val & 0x00000002) == 0)
1969 break;
1970 }
1971}
1972
1973#include "ymfpci_image.h"
1974
208a1b4c 1975static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT
1976{
1977 int i;
1978 u16 ctrl;
1979 unsigned long *inst;
1980
1981 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1982 snd_ymfpci_disable_dsp(chip);
1983 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1984 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1985 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1986 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1987 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1988 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1989 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1990 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1991 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1992
1993 /* setup DSP instruction code */
1994 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1995 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1996
1997 /* setup control instruction code */
1998 switch (chip->device_id) {
1999 case PCI_DEVICE_ID_YAMAHA_724F:
2000 case PCI_DEVICE_ID_YAMAHA_740C:
2001 case PCI_DEVICE_ID_YAMAHA_744:
2002 case PCI_DEVICE_ID_YAMAHA_754:
2003 inst = CntrlInst1E;
2004 break;
2005 default:
2006 inst = CntrlInst;
2007 break;
2008 }
2009 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2010 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
2011
2012 snd_ymfpci_enable_dsp(chip);
2013}
2014
208a1b4c 2015static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT
2016{
2017 long size, playback_ctrl_size;
2018 int voice, bank, reg;
2019 u8 *ptr;
2020 dma_addr_t ptr_addr;
2021
2022 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2023 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2024 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2025 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2026 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2027
2028 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
2029 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
2030 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
2031 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
2032 chip->work_size;
2033 /* work_ptr must be aligned to 256 bytes, but it's already
2034 covered with the kernel page allocation mechanism */
2035 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2036 size, &chip->work_ptr) < 0)
2037 return -ENOMEM;
2038 ptr = chip->work_ptr.area;
2039 ptr_addr = chip->work_ptr.addr;
2040 memset(ptr, 0, size); /* for sure */
2041
2042 chip->bank_base_playback = ptr;
2043 chip->bank_base_playback_addr = ptr_addr;
2044 chip->ctrl_playback = (u32 *)ptr;
2045 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2046 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2047 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2048 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2049 chip->voices[voice].number = voice;
208a1b4c 2050 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT
2051 chip->voices[voice].bank_addr = ptr_addr;
2052 for (bank = 0; bank < 2; bank++) {
208a1b4c 2053 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT
2054 ptr += chip->bank_size_playback;
2055 ptr_addr += chip->bank_size_playback;
2056 }
2057 }
2058 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2059 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2060 chip->bank_base_capture = ptr;
2061 chip->bank_base_capture_addr = ptr_addr;
2062 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2063 for (bank = 0; bank < 2; bank++) {
208a1b4c 2064 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT
2065 ptr += chip->bank_size_capture;
2066 ptr_addr += chip->bank_size_capture;
2067 }
2068 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2069 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2070 chip->bank_base_effect = ptr;
2071 chip->bank_base_effect_addr = ptr_addr;
2072 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2073 for (bank = 0; bank < 2; bank++) {
208a1b4c 2074 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT
2075 ptr += chip->bank_size_effect;
2076 ptr_addr += chip->bank_size_effect;
2077 }
2078 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2079 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2080 chip->work_base = ptr;
2081 chip->work_base_addr = ptr_addr;
2082
2083 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2084
2085 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2086 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2087 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2088 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2089 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2090
2091 /* S/PDIF output initialization */
2092 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2093 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2094 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2095
2096 /* S/PDIF input initialization */
2097 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2098
2099 /* digital mixer setup */
2100 for (reg = 0x80; reg < 0xc0; reg += 4)
2101 snd_ymfpci_writel(chip, reg, 0);
2102 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2103 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2104 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2105 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2106 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2107 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2108 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2109
2110 return 0;
2111}
2112
208a1b4c 2113static int snd_ymfpci_free(struct snd_ymfpci *chip)
1da177e4
LT
2114{
2115 u16 ctrl;
2116
2117 snd_assert(chip != NULL, return -EINVAL);
2118
2119 if (chip->res_reg_area) { /* don't touch busy hardware */
2120 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2121 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2122 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2123 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2124 snd_ymfpci_disable_dsp(chip);
2125 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2126 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2127 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2128 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2129 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2130 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2131 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2132 }
2133
2134 snd_ymfpci_ac3_done(chip);
2135
2136 /* Set PCI device to D3 state */
2137#if 0
2138 /* FIXME: temporarily disabled, otherwise we cannot fire up
2139 * the chip again unless reboot. ACPI bug?
2140 */
2141 pci_set_power_state(chip->pci, 3);
2142#endif
2143
2144#ifdef CONFIG_PM
2145 vfree(chip->saved_regs);
2146#endif
b1d5776d
TI
2147 release_and_free_resource(chip->mpu_res);
2148 release_and_free_resource(chip->fm_res);
1da177e4
LT
2149 snd_ymfpci_free_gameport(chip);
2150 if (chip->reg_area_virt)
2151 iounmap(chip->reg_area_virt);
2152 if (chip->work_ptr.area)
2153 snd_dma_free_pages(&chip->work_ptr);
2154
2155 if (chip->irq >= 0)
2156 free_irq(chip->irq, (void *)chip);
b1d5776d 2157 release_and_free_resource(chip->res_reg_area);
1da177e4
LT
2158
2159 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2160
2161 pci_disable_device(chip->pci);
2162 kfree(chip);
2163 return 0;
2164}
2165
208a1b4c 2166static int snd_ymfpci_dev_free(struct snd_device *device)
1da177e4 2167{
208a1b4c 2168 struct snd_ymfpci *chip = device->device_data;
1da177e4
LT
2169 return snd_ymfpci_free(chip);
2170}
2171
2172#ifdef CONFIG_PM
2173static int saved_regs_index[] = {
2174 /* spdif */
2175 YDSXGR_SPDIFOUTCTRL,
2176 YDSXGR_SPDIFOUTSTATUS,
2177 YDSXGR_SPDIFINCTRL,
2178 /* volumes */
2179 YDSXGR_PRIADCLOOPVOL,
2180 YDSXGR_NATIVEDACINVOL,
2181 YDSXGR_NATIVEDACOUTVOL,
2182 // YDSXGR_BUF441OUTVOL,
2183 YDSXGR_NATIVEADCINVOL,
2184 YDSXGR_SPDIFLOOPVOL,
2185 YDSXGR_SPDIFOUTVOL,
2186 YDSXGR_ZVOUTVOL,
2187 YDSXGR_LEGACYOUTVOL,
2188 /* address bases */
2189 YDSXGR_PLAYCTRLBASE,
2190 YDSXGR_RECCTRLBASE,
2191 YDSXGR_EFFCTRLBASE,
2192 YDSXGR_WORKBASE,
2193 /* capture set up */
2194 YDSXGR_MAPOFREC,
2195 YDSXGR_RECFORMAT,
2196 YDSXGR_RECSLOTSR,
2197 YDSXGR_ADCFORMAT,
2198 YDSXGR_ADCSLOTSR,
2199};
2200#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2201
ded46235 2202int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2203{
ded46235
TI
2204 struct snd_card *card = pci_get_drvdata(pci);
2205 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT
2206 unsigned int i;
2207
ded46235 2208 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT
2209 snd_pcm_suspend_all(chip->pcm);
2210 snd_pcm_suspend_all(chip->pcm2);
2211 snd_pcm_suspend_all(chip->pcm_spdif);
2212 snd_pcm_suspend_all(chip->pcm_4ch);
2213 snd_ac97_suspend(chip->ac97);
2214 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2215 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2216 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2217 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2218 snd_ymfpci_disable_dsp(chip);
ded46235
TI
2219 pci_disable_device(pci);
2220 pci_save_state(pci);
1da177e4
LT
2221 return 0;
2222}
2223
ded46235 2224int snd_ymfpci_resume(struct pci_dev *pci)
1da177e4 2225{
ded46235
TI
2226 struct snd_card *card = pci_get_drvdata(pci);
2227 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT
2228 unsigned int i;
2229
ded46235
TI
2230 pci_restore_state(pci);
2231 pci_enable_device(pci);
2232 pci_set_master(pci);
2233 snd_ymfpci_aclink_reset(pci);
1da177e4
LT
2234 snd_ymfpci_codec_ready(chip, 0);
2235 snd_ymfpci_download_image(chip);
2236 udelay(100);
2237
2238 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2239 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2240
2241 snd_ac97_resume(chip->ac97);
2242
2243 /* start hw again */
2244 if (chip->start_count > 0) {
2245 spin_lock_irq(&chip->reg_lock);
2246 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2247 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2248 spin_unlock_irq(&chip->reg_lock);
2249 }
ded46235 2250 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
2251 return 0;
2252}
2253#endif /* CONFIG_PM */
2254
208a1b4c 2255int __devinit snd_ymfpci_create(struct snd_card *card,
1da177e4
LT
2256 struct pci_dev * pci,
2257 unsigned short old_legacy_ctrl,
208a1b4c 2258 struct snd_ymfpci ** rchip)
1da177e4 2259{
208a1b4c 2260 struct snd_ymfpci *chip;
1da177e4 2261 int err;
208a1b4c 2262 static struct snd_device_ops ops = {
1da177e4
LT
2263 .dev_free = snd_ymfpci_dev_free,
2264 };
2265
2266 *rchip = NULL;
2267
2268 /* enable PCI device */
2269 if ((err = pci_enable_device(pci)) < 0)
2270 return err;
2271
e560d8d8 2272 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
2273 if (chip == NULL) {
2274 pci_disable_device(pci);
2275 return -ENOMEM;
2276 }
2277 chip->old_legacy_ctrl = old_legacy_ctrl;
2278 spin_lock_init(&chip->reg_lock);
2279 spin_lock_init(&chip->voice_lock);
2280 init_waitqueue_head(&chip->interrupt_sleep);
2281 atomic_set(&chip->interrupt_sleep_count, 0);
2282 chip->card = card;
2283 chip->pci = pci;
2284 chip->irq = -1;
2285 chip->device_id = pci->device;
2286 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2287 chip->reg_area_phys = pci_resource_start(pci, 0);
2288 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2289 pci_set_master(pci);
2290
2291 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
99b359ba 2292 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
1da177e4
LT
2293 snd_ymfpci_free(chip);
2294 return -EBUSY;
2295 }
65ca68b3 2296 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_DISABLED|IRQF_SHARED, "YMFPCI", (void *) chip)) {
99b359ba 2297 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2298 snd_ymfpci_free(chip);
2299 return -EBUSY;
2300 }
2301 chip->irq = pci->irq;
2302
2303 snd_ymfpci_aclink_reset(pci);
2304 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2305 snd_ymfpci_free(chip);
2306 return -EIO;
2307 }
2308
2309 snd_ymfpci_download_image(chip);
2310
2311 udelay(100); /* seems we need a delay after downloading image.. */
2312
2313 if (snd_ymfpci_memalloc(chip) < 0) {
2314 snd_ymfpci_free(chip);
2315 return -EIO;
2316 }
2317
5a25c5cf 2318 chip->rear_swap = 1;
1da177e4
LT
2319 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2320 snd_ymfpci_free(chip);
2321 return err;
2322 }
2323
2324#ifdef CONFIG_PM
2325 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2326 if (chip->saved_regs == NULL) {
2327 snd_ymfpci_free(chip);
2328 return -ENOMEM;
2329 }
1da177e4
LT
2330#endif
2331
2332 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2333 snd_ymfpci_free(chip);
2334 return err;
2335 }
2336
2337 snd_ymfpci_proc_init(card, chip);
2338
2339 snd_card_set_dev(card, &pci->dev);
2340
2341 *rchip = chip;
2342 return 0;
2343}
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