Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
c1017a4c | 2 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
3 | * Routines for control of YMF724/740/744/754 chips |
4 | * | |
1da177e4 LT |
5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <sound/driver.h> | |
22 | #include <linux/delay.h> | |
102fa906 | 23 | #include <linux/firmware.h> |
1da177e4 LT |
24 | #include <linux/init.h> |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/sched.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/vmalloc.h> | |
30 | ||
31 | #include <sound/core.h> | |
32 | #include <sound/control.h> | |
33 | #include <sound/info.h> | |
33925186 | 34 | #include <sound/tlv.h> |
1da177e4 LT |
35 | #include <sound/ymfpci.h> |
36 | #include <sound/asoundef.h> | |
37 | #include <sound/mpu401.h> | |
38 | ||
39 | #include <asm/io.h> | |
102fa906 | 40 | #include <asm/byteorder.h> |
1da177e4 LT |
41 | |
42 | /* | |
43 | * common I/O routines | |
44 | */ | |
45 | ||
208a1b4c | 46 | static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); |
1da177e4 | 47 | |
208a1b4c | 48 | static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) |
1da177e4 LT |
49 | { |
50 | return readb(chip->reg_area_virt + offset); | |
51 | } | |
52 | ||
208a1b4c | 53 | static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) |
1da177e4 LT |
54 | { |
55 | writeb(val, chip->reg_area_virt + offset); | |
56 | } | |
57 | ||
208a1b4c | 58 | static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) |
1da177e4 LT |
59 | { |
60 | return readw(chip->reg_area_virt + offset); | |
61 | } | |
62 | ||
208a1b4c | 63 | static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) |
1da177e4 LT |
64 | { |
65 | writew(val, chip->reg_area_virt + offset); | |
66 | } | |
67 | ||
208a1b4c | 68 | static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) |
1da177e4 LT |
69 | { |
70 | return readl(chip->reg_area_virt + offset); | |
71 | } | |
72 | ||
208a1b4c | 73 | static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) |
1da177e4 LT |
74 | { |
75 | writel(val, chip->reg_area_virt + offset); | |
76 | } | |
77 | ||
208a1b4c | 78 | static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) |
1da177e4 | 79 | { |
ef21ca24 | 80 | unsigned long end_time; |
1da177e4 LT |
81 | u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; |
82 | ||
ef21ca24 | 83 | end_time = jiffies + msecs_to_jiffies(750); |
1da177e4 LT |
84 | do { |
85 | if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) | |
86 | return 0; | |
8433a509 | 87 | schedule_timeout_uninterruptible(1); |
ef21ca24 | 88 | } while (time_before(jiffies, end_time)); |
99b359ba | 89 | snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); |
1da177e4 LT |
90 | return -EBUSY; |
91 | } | |
92 | ||
208a1b4c | 93 | static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) |
1da177e4 | 94 | { |
208a1b4c | 95 | struct snd_ymfpci *chip = ac97->private_data; |
1da177e4 LT |
96 | u32 cmd; |
97 | ||
98 | snd_ymfpci_codec_ready(chip, 0); | |
99 | cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; | |
100 | snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); | |
101 | } | |
102 | ||
208a1b4c | 103 | static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) |
1da177e4 | 104 | { |
208a1b4c | 105 | struct snd_ymfpci *chip = ac97->private_data; |
1da177e4 LT |
106 | |
107 | if (snd_ymfpci_codec_ready(chip, 0)) | |
108 | return ~0; | |
109 | snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); | |
110 | if (snd_ymfpci_codec_ready(chip, 0)) | |
111 | return ~0; | |
112 | if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { | |
113 | int i; | |
114 | for (i = 0; i < 600; i++) | |
115 | snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); | |
116 | } | |
117 | return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); | |
118 | } | |
119 | ||
120 | /* | |
121 | * Misc routines | |
122 | */ | |
123 | ||
124 | static u32 snd_ymfpci_calc_delta(u32 rate) | |
125 | { | |
126 | switch (rate) { | |
127 | case 8000: return 0x02aaab00; | |
128 | case 11025: return 0x03accd00; | |
129 | case 16000: return 0x05555500; | |
130 | case 22050: return 0x07599a00; | |
131 | case 32000: return 0x0aaaab00; | |
132 | case 44100: return 0x0eb33300; | |
133 | default: return ((rate << 16) / 375) << 5; | |
134 | } | |
135 | } | |
136 | ||
137 | static u32 def_rate[8] = { | |
138 | 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 | |
139 | }; | |
140 | ||
141 | static u32 snd_ymfpci_calc_lpfK(u32 rate) | |
142 | { | |
143 | u32 i; | |
144 | static u32 val[8] = { | |
145 | 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, | |
146 | 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 | |
147 | }; | |
148 | ||
149 | if (rate == 44100) | |
150 | return 0x40000000; /* FIXME: What's the right value? */ | |
151 | for (i = 0; i < 8; i++) | |
152 | if (rate <= def_rate[i]) | |
153 | return val[i]; | |
154 | return val[0]; | |
155 | } | |
156 | ||
157 | static u32 snd_ymfpci_calc_lpfQ(u32 rate) | |
158 | { | |
159 | u32 i; | |
160 | static u32 val[8] = { | |
161 | 0x35280000, 0x34A70000, 0x32020000, 0x31770000, | |
162 | 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 | |
163 | }; | |
164 | ||
165 | if (rate == 44100) | |
166 | return 0x370A0000; | |
167 | for (i = 0; i < 8; i++) | |
168 | if (rate <= def_rate[i]) | |
169 | return val[i]; | |
170 | return val[0]; | |
171 | } | |
172 | ||
173 | /* | |
174 | * Hardware start management | |
175 | */ | |
176 | ||
208a1b4c | 177 | static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) |
1da177e4 LT |
178 | { |
179 | unsigned long flags; | |
180 | ||
181 | spin_lock_irqsave(&chip->reg_lock, flags); | |
182 | if (chip->start_count++ > 0) | |
183 | goto __end; | |
184 | snd_ymfpci_writel(chip, YDSXGR_MODE, | |
185 | snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); | |
186 | chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; | |
187 | __end: | |
188 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
189 | } | |
190 | ||
208a1b4c | 191 | static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) |
1da177e4 LT |
192 | { |
193 | unsigned long flags; | |
194 | long timeout = 1000; | |
195 | ||
196 | spin_lock_irqsave(&chip->reg_lock, flags); | |
197 | if (--chip->start_count > 0) | |
198 | goto __end; | |
199 | snd_ymfpci_writel(chip, YDSXGR_MODE, | |
200 | snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); | |
201 | while (timeout-- > 0) { | |
202 | if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) | |
203 | break; | |
204 | } | |
205 | if (atomic_read(&chip->interrupt_sleep_count)) { | |
206 | atomic_set(&chip->interrupt_sleep_count, 0); | |
207 | wake_up(&chip->interrupt_sleep); | |
208 | } | |
209 | __end: | |
210 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
211 | } | |
212 | ||
213 | /* | |
214 | * Playback voice management | |
215 | */ | |
216 | ||
208a1b4c TI |
217 | static int voice_alloc(struct snd_ymfpci *chip, |
218 | enum snd_ymfpci_voice_type type, int pair, | |
219 | struct snd_ymfpci_voice **rvoice) | |
1da177e4 | 220 | { |
208a1b4c | 221 | struct snd_ymfpci_voice *voice, *voice2; |
1da177e4 LT |
222 | int idx; |
223 | ||
224 | *rvoice = NULL; | |
225 | for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { | |
226 | voice = &chip->voices[idx]; | |
227 | voice2 = pair ? &chip->voices[idx+1] : NULL; | |
228 | if (voice->use || (voice2 && voice2->use)) | |
229 | continue; | |
230 | voice->use = 1; | |
231 | if (voice2) | |
232 | voice2->use = 1; | |
233 | switch (type) { | |
234 | case YMFPCI_PCM: | |
235 | voice->pcm = 1; | |
236 | if (voice2) | |
237 | voice2->pcm = 1; | |
238 | break; | |
239 | case YMFPCI_SYNTH: | |
240 | voice->synth = 1; | |
241 | break; | |
242 | case YMFPCI_MIDI: | |
243 | voice->midi = 1; | |
244 | break; | |
245 | } | |
246 | snd_ymfpci_hw_start(chip); | |
247 | if (voice2) | |
248 | snd_ymfpci_hw_start(chip); | |
249 | *rvoice = voice; | |
250 | return 0; | |
251 | } | |
252 | return -ENOMEM; | |
253 | } | |
254 | ||
208a1b4c TI |
255 | static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, |
256 | enum snd_ymfpci_voice_type type, int pair, | |
257 | struct snd_ymfpci_voice **rvoice) | |
1da177e4 LT |
258 | { |
259 | unsigned long flags; | |
260 | int result; | |
261 | ||
262 | snd_assert(rvoice != NULL, return -EINVAL); | |
263 | snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL); | |
264 | ||
265 | spin_lock_irqsave(&chip->voice_lock, flags); | |
266 | for (;;) { | |
267 | result = voice_alloc(chip, type, pair, rvoice); | |
268 | if (result == 0 || type != YMFPCI_PCM) | |
269 | break; | |
270 | /* TODO: synth/midi voice deallocation */ | |
271 | break; | |
272 | } | |
273 | spin_unlock_irqrestore(&chip->voice_lock, flags); | |
274 | return result; | |
275 | } | |
276 | ||
208a1b4c | 277 | static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) |
1da177e4 LT |
278 | { |
279 | unsigned long flags; | |
280 | ||
281 | snd_assert(pvoice != NULL, return -EINVAL); | |
282 | snd_ymfpci_hw_stop(chip); | |
283 | spin_lock_irqsave(&chip->voice_lock, flags); | |
9ed1261e TK |
284 | if (pvoice->number == chip->src441_used) { |
285 | chip->src441_used = -1; | |
286 | pvoice->ypcm->use_441_slot = 0; | |
287 | } | |
1da177e4 LT |
288 | pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; |
289 | pvoice->ypcm = NULL; | |
290 | pvoice->interrupt = NULL; | |
291 | spin_unlock_irqrestore(&chip->voice_lock, flags); | |
292 | return 0; | |
293 | } | |
294 | ||
295 | /* | |
296 | * PCM part | |
297 | */ | |
298 | ||
208a1b4c | 299 | static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) |
1da177e4 | 300 | { |
208a1b4c | 301 | struct snd_ymfpci_pcm *ypcm; |
1da177e4 LT |
302 | u32 pos, delta; |
303 | ||
304 | if ((ypcm = voice->ypcm) == NULL) | |
305 | return; | |
306 | if (ypcm->substream == NULL) | |
307 | return; | |
308 | spin_lock(&chip->reg_lock); | |
309 | if (ypcm->running) { | |
310 | pos = le32_to_cpu(voice->bank[chip->active_bank].start); | |
311 | if (pos < ypcm->last_pos) | |
312 | delta = pos + (ypcm->buffer_size - ypcm->last_pos); | |
313 | else | |
314 | delta = pos - ypcm->last_pos; | |
315 | ypcm->period_pos += delta; | |
316 | ypcm->last_pos = pos; | |
317 | if (ypcm->period_pos >= ypcm->period_size) { | |
318 | // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); | |
319 | ypcm->period_pos %= ypcm->period_size; | |
320 | spin_unlock(&chip->reg_lock); | |
321 | snd_pcm_period_elapsed(ypcm->substream); | |
322 | spin_lock(&chip->reg_lock); | |
323 | } | |
9bcf6551 CL |
324 | |
325 | if (unlikely(ypcm->update_pcm_vol)) { | |
326 | unsigned int subs = ypcm->substream->number; | |
327 | unsigned int next_bank = 1 - chip->active_bank; | |
208a1b4c | 328 | struct snd_ymfpci_playback_bank *bank; |
9bcf6551 CL |
329 | u32 volume; |
330 | ||
331 | bank = &voice->bank[next_bank]; | |
332 | volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); | |
333 | bank->left_gain_end = volume; | |
334 | if (ypcm->output_rear) | |
335 | bank->eff2_gain_end = volume; | |
336 | if (ypcm->voices[1]) | |
337 | bank = &ypcm->voices[1]->bank[next_bank]; | |
338 | volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); | |
339 | bank->right_gain_end = volume; | |
340 | if (ypcm->output_rear) | |
341 | bank->eff3_gain_end = volume; | |
342 | ypcm->update_pcm_vol--; | |
343 | } | |
1da177e4 LT |
344 | } |
345 | spin_unlock(&chip->reg_lock); | |
346 | } | |
347 | ||
208a1b4c | 348 | static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) |
1da177e4 | 349 | { |
208a1b4c TI |
350 | struct snd_pcm_runtime *runtime = substream->runtime; |
351 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
352 | struct snd_ymfpci *chip = ypcm->chip; | |
1da177e4 LT |
353 | u32 pos, delta; |
354 | ||
355 | spin_lock(&chip->reg_lock); | |
356 | if (ypcm->running) { | |
357 | pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; | |
358 | if (pos < ypcm->last_pos) | |
359 | delta = pos + (ypcm->buffer_size - ypcm->last_pos); | |
360 | else | |
361 | delta = pos - ypcm->last_pos; | |
362 | ypcm->period_pos += delta; | |
363 | ypcm->last_pos = pos; | |
364 | if (ypcm->period_pos >= ypcm->period_size) { | |
365 | ypcm->period_pos %= ypcm->period_size; | |
366 | // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start); | |
367 | spin_unlock(&chip->reg_lock); | |
368 | snd_pcm_period_elapsed(substream); | |
369 | spin_lock(&chip->reg_lock); | |
370 | } | |
371 | } | |
372 | spin_unlock(&chip->reg_lock); | |
373 | } | |
374 | ||
208a1b4c | 375 | static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
376 | int cmd) |
377 | { | |
208a1b4c TI |
378 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
379 | struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; | |
177a7cdb | 380 | struct snd_kcontrol *kctl = NULL; |
1da177e4 LT |
381 | int result = 0; |
382 | ||
383 | spin_lock(&chip->reg_lock); | |
384 | if (ypcm->voices[0] == NULL) { | |
385 | result = -EINVAL; | |
386 | goto __unlock; | |
387 | } | |
388 | switch (cmd) { | |
389 | case SNDRV_PCM_TRIGGER_START: | |
390 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
391 | case SNDRV_PCM_TRIGGER_RESUME: | |
392 | chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); | |
9ed1261e | 393 | if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) |
1da177e4 LT |
394 | chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); |
395 | ypcm->running = 1; | |
396 | break; | |
397 | case SNDRV_PCM_TRIGGER_STOP: | |
177a7cdb CL |
398 | if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { |
399 | kctl = chip->pcm_mixer[substream->number].ctl; | |
400 | kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
401 | } | |
402 | /* fall through */ | |
1da177e4 LT |
403 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
404 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
405 | chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; | |
9ed1261e | 406 | if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) |
1da177e4 LT |
407 | chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; |
408 | ypcm->running = 0; | |
409 | break; | |
410 | default: | |
411 | result = -EINVAL; | |
412 | break; | |
413 | } | |
414 | __unlock: | |
415 | spin_unlock(&chip->reg_lock); | |
177a7cdb CL |
416 | if (kctl) |
417 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); | |
1da177e4 LT |
418 | return result; |
419 | } | |
208a1b4c | 420 | static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
421 | int cmd) |
422 | { | |
208a1b4c TI |
423 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
424 | struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; | |
1da177e4 LT |
425 | int result = 0; |
426 | u32 tmp; | |
427 | ||
428 | spin_lock(&chip->reg_lock); | |
429 | switch (cmd) { | |
430 | case SNDRV_PCM_TRIGGER_START: | |
431 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
432 | case SNDRV_PCM_TRIGGER_RESUME: | |
433 | tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); | |
434 | snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); | |
435 | ypcm->running = 1; | |
436 | break; | |
437 | case SNDRV_PCM_TRIGGER_STOP: | |
438 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
439 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
440 | tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); | |
441 | snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); | |
442 | ypcm->running = 0; | |
443 | break; | |
444 | default: | |
445 | result = -EINVAL; | |
446 | break; | |
447 | } | |
448 | spin_unlock(&chip->reg_lock); | |
449 | return result; | |
450 | } | |
451 | ||
208a1b4c | 452 | static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) |
1da177e4 LT |
453 | { |
454 | int err; | |
455 | ||
456 | if (ypcm->voices[1] != NULL && voices < 2) { | |
457 | snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); | |
458 | ypcm->voices[1] = NULL; | |
459 | } | |
460 | if (voices == 1 && ypcm->voices[0] != NULL) | |
461 | return 0; /* already allocated */ | |
462 | if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) | |
463 | return 0; /* already allocated */ | |
464 | if (voices > 1) { | |
465 | if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { | |
466 | snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); | |
467 | ypcm->voices[0] = NULL; | |
468 | } | |
469 | } | |
470 | err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); | |
471 | if (err < 0) | |
472 | return err; | |
473 | ypcm->voices[0]->ypcm = ypcm; | |
474 | ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; | |
475 | if (voices > 1) { | |
476 | ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; | |
477 | ypcm->voices[1]->ypcm = ypcm; | |
478 | } | |
479 | return 0; | |
480 | } | |
481 | ||
208a1b4c TI |
482 | static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, |
483 | struct snd_pcm_runtime *runtime, | |
9bcf6551 | 484 | int has_pcm_volume) |
1da177e4 | 485 | { |
208a1b4c | 486 | struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; |
1da177e4 | 487 | u32 format; |
9bcf6551 CL |
488 | u32 delta = snd_ymfpci_calc_delta(runtime->rate); |
489 | u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); | |
490 | u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); | |
208a1b4c | 491 | struct snd_ymfpci_playback_bank *bank; |
1da177e4 | 492 | unsigned int nbank; |
9bcf6551 CL |
493 | u32 vol_left, vol_right; |
494 | u8 use_left, use_right; | |
9ed1261e | 495 | unsigned long flags; |
1da177e4 LT |
496 | |
497 | snd_assert(voice != NULL, return); | |
9bcf6551 CL |
498 | if (runtime->channels == 1) { |
499 | use_left = 1; | |
500 | use_right = 1; | |
501 | } else { | |
502 | use_left = (voiceidx & 1) == 0; | |
503 | use_right = !use_left; | |
504 | } | |
505 | if (has_pcm_volume) { | |
506 | vol_left = cpu_to_le32(ypcm->chip->pcm_mixer | |
507 | [ypcm->substream->number].left << 15); | |
508 | vol_right = cpu_to_le32(ypcm->chip->pcm_mixer | |
509 | [ypcm->substream->number].right << 15); | |
510 | } else { | |
511 | vol_left = cpu_to_le32(0x40000000); | |
512 | vol_right = cpu_to_le32(0x40000000); | |
513 | } | |
9ed1261e | 514 | spin_lock_irqsave(&ypcm->chip->voice_lock, flags); |
9bcf6551 CL |
515 | format = runtime->channels == 2 ? 0x00010000 : 0; |
516 | if (snd_pcm_format_width(runtime->format) == 8) | |
517 | format |= 0x80000000; | |
9ed1261e TK |
518 | else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && |
519 | runtime->rate == 44100 && runtime->channels == 2 && | |
520 | voiceidx == 0 && (ypcm->chip->src441_used == -1 || | |
521 | ypcm->chip->src441_used == voice->number)) { | |
522 | ypcm->chip->src441_used = voice->number; | |
523 | ypcm->use_441_slot = 1; | |
524 | format |= 0x10000000; | |
9ed1261e TK |
525 | } |
526 | if (ypcm->chip->src441_used == voice->number && | |
527 | (format & 0x10000000) == 0) { | |
528 | ypcm->chip->src441_used = -1; | |
529 | ypcm->use_441_slot = 0; | |
530 | } | |
9bcf6551 CL |
531 | if (runtime->channels == 2 && (voiceidx & 1) != 0) |
532 | format |= 1; | |
9ed1261e | 533 | spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); |
1da177e4 LT |
534 | for (nbank = 0; nbank < 2; nbank++) { |
535 | bank = &voice->bank[nbank]; | |
9bcf6551 | 536 | memset(bank, 0, sizeof(*bank)); |
1da177e4 | 537 | bank->format = cpu_to_le32(format); |
9bcf6551 CL |
538 | bank->base = cpu_to_le32(runtime->dma_addr); |
539 | bank->loop_end = cpu_to_le32(ypcm->buffer_size); | |
1da177e4 | 540 | bank->lpfQ = cpu_to_le32(lpfQ); |
1da177e4 LT |
541 | bank->delta = |
542 | bank->delta_end = cpu_to_le32(delta); | |
543 | bank->lpfK = | |
544 | bank->lpfK_end = cpu_to_le32(lpfK); | |
9bcf6551 CL |
545 | bank->eg_gain = |
546 | bank->eg_gain_end = cpu_to_le32(0x40000000); | |
547 | ||
548 | if (ypcm->output_front) { | |
549 | if (use_left) { | |
550 | bank->left_gain = | |
551 | bank->left_gain_end = vol_left; | |
552 | } | |
553 | if (use_right) { | |
1da177e4 | 554 | bank->right_gain = |
9bcf6551 | 555 | bank->right_gain_end = vol_right; |
1da177e4 | 556 | } |
9bcf6551 CL |
557 | } |
558 | if (ypcm->output_rear) { | |
5a25c5cf JK |
559 | if (!ypcm->swap_rear) { |
560 | if (use_left) { | |
561 | bank->eff2_gain = | |
562 | bank->eff2_gain_end = vol_left; | |
563 | } | |
564 | if (use_right) { | |
565 | bank->eff3_gain = | |
566 | bank->eff3_gain_end = vol_right; | |
567 | } | |
568 | } else { | |
569 | /* The SPDIF out channels seem to be swapped, so we have | |
570 | * to swap them here, too. The rear analog out channels | |
571 | * will be wrong, but otherwise AC3 would not work. | |
572 | */ | |
573 | if (use_left) { | |
574 | bank->eff3_gain = | |
575 | bank->eff3_gain_end = vol_left; | |
576 | } | |
577 | if (use_right) { | |
578 | bank->eff2_gain = | |
579 | bank->eff2_gain_end = vol_right; | |
580 | } | |
581 | } | |
582 | } | |
1da177e4 LT |
583 | } |
584 | } | |
585 | ||
208a1b4c | 586 | static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip) |
1da177e4 LT |
587 | { |
588 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
589 | 4096, &chip->ac3_tmp_base) < 0) | |
590 | return -ENOMEM; | |
591 | ||
592 | chip->bank_effect[3][0]->base = | |
593 | chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); | |
594 | chip->bank_effect[3][0]->loop_end = | |
595 | chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); | |
596 | chip->bank_effect[4][0]->base = | |
597 | chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); | |
598 | chip->bank_effect[4][0]->loop_end = | |
599 | chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); | |
600 | ||
601 | spin_lock_irq(&chip->reg_lock); | |
602 | snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, | |
603 | snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); | |
604 | spin_unlock_irq(&chip->reg_lock); | |
605 | return 0; | |
606 | } | |
607 | ||
208a1b4c | 608 | static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) |
1da177e4 LT |
609 | { |
610 | spin_lock_irq(&chip->reg_lock); | |
611 | snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, | |
612 | snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); | |
613 | spin_unlock_irq(&chip->reg_lock); | |
614 | // snd_ymfpci_irq_wait(chip); | |
615 | if (chip->ac3_tmp_base.area) { | |
616 | snd_dma_free_pages(&chip->ac3_tmp_base); | |
617 | chip->ac3_tmp_base.area = NULL; | |
618 | } | |
619 | return 0; | |
620 | } | |
621 | ||
208a1b4c TI |
622 | static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, |
623 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 624 | { |
208a1b4c TI |
625 | struct snd_pcm_runtime *runtime = substream->runtime; |
626 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
1da177e4 LT |
627 | int err; |
628 | ||
629 | if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) | |
630 | return err; | |
631 | if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) | |
632 | return err; | |
633 | return 0; | |
634 | } | |
635 | ||
208a1b4c | 636 | static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 637 | { |
208a1b4c TI |
638 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
639 | struct snd_pcm_runtime *runtime = substream->runtime; | |
640 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 LT |
641 | |
642 | if (runtime->private_data == NULL) | |
643 | return 0; | |
644 | ypcm = runtime->private_data; | |
645 | ||
646 | /* wait, until the PCI operations are not finished */ | |
647 | snd_ymfpci_irq_wait(chip); | |
648 | snd_pcm_lib_free_pages(substream); | |
649 | if (ypcm->voices[1]) { | |
650 | snd_ymfpci_voice_free(chip, ypcm->voices[1]); | |
651 | ypcm->voices[1] = NULL; | |
652 | } | |
653 | if (ypcm->voices[0]) { | |
654 | snd_ymfpci_voice_free(chip, ypcm->voices[0]); | |
655 | ypcm->voices[0] = NULL; | |
656 | } | |
657 | return 0; | |
658 | } | |
659 | ||
208a1b4c | 660 | static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 661 | { |
208a1b4c TI |
662 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
663 | struct snd_pcm_runtime *runtime = substream->runtime; | |
664 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
177a7cdb | 665 | struct snd_kcontrol *kctl; |
1da177e4 LT |
666 | unsigned int nvoice; |
667 | ||
668 | ypcm->period_size = runtime->period_size; | |
669 | ypcm->buffer_size = runtime->buffer_size; | |
670 | ypcm->period_pos = 0; | |
671 | ypcm->last_pos = 0; | |
672 | for (nvoice = 0; nvoice < runtime->channels; nvoice++) | |
9bcf6551 CL |
673 | snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, |
674 | substream->pcm == chip->pcm); | |
177a7cdb CL |
675 | |
676 | if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { | |
677 | kctl = chip->pcm_mixer[substream->number].ctl; | |
678 | kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
679 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); | |
680 | } | |
1da177e4 LT |
681 | return 0; |
682 | } | |
683 | ||
208a1b4c TI |
684 | static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream, |
685 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
686 | { |
687 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
688 | } | |
689 | ||
208a1b4c | 690 | static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 691 | { |
208a1b4c | 692 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
693 | |
694 | /* wait, until the PCI operations are not finished */ | |
695 | snd_ymfpci_irq_wait(chip); | |
696 | return snd_pcm_lib_free_pages(substream); | |
697 | } | |
698 | ||
208a1b4c | 699 | static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 700 | { |
208a1b4c TI |
701 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
702 | struct snd_pcm_runtime *runtime = substream->runtime; | |
703 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
704 | struct snd_ymfpci_capture_bank * bank; | |
1da177e4 LT |
705 | int nbank; |
706 | u32 rate, format; | |
707 | ||
708 | ypcm->period_size = runtime->period_size; | |
709 | ypcm->buffer_size = runtime->buffer_size; | |
710 | ypcm->period_pos = 0; | |
711 | ypcm->last_pos = 0; | |
712 | ypcm->shift = 0; | |
713 | rate = ((48000 * 4096) / runtime->rate) - 1; | |
714 | format = 0; | |
715 | if (runtime->channels == 2) { | |
716 | format |= 2; | |
717 | ypcm->shift++; | |
718 | } | |
719 | if (snd_pcm_format_width(runtime->format) == 8) | |
720 | format |= 1; | |
721 | else | |
722 | ypcm->shift++; | |
723 | switch (ypcm->capture_bank_number) { | |
724 | case 0: | |
725 | snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); | |
726 | snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); | |
727 | break; | |
728 | case 1: | |
729 | snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); | |
730 | snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); | |
731 | break; | |
732 | } | |
733 | for (nbank = 0; nbank < 2; nbank++) { | |
734 | bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; | |
735 | bank->base = cpu_to_le32(runtime->dma_addr); | |
736 | bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); | |
737 | bank->start = 0; | |
738 | bank->num_of_loops = 0; | |
739 | } | |
740 | return 0; | |
741 | } | |
742 | ||
208a1b4c | 743 | static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 744 | { |
208a1b4c TI |
745 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
746 | struct snd_pcm_runtime *runtime = substream->runtime; | |
747 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
748 | struct snd_ymfpci_voice *voice = ypcm->voices[0]; | |
1da177e4 LT |
749 | |
750 | if (!(ypcm->running && voice)) | |
751 | return 0; | |
752 | return le32_to_cpu(voice->bank[chip->active_bank].start); | |
753 | } | |
754 | ||
208a1b4c | 755 | static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 756 | { |
208a1b4c TI |
757 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
758 | struct snd_pcm_runtime *runtime = substream->runtime; | |
759 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
1da177e4 LT |
760 | |
761 | if (!ypcm->running) | |
762 | return 0; | |
763 | return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; | |
764 | } | |
765 | ||
208a1b4c | 766 | static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) |
1da177e4 LT |
767 | { |
768 | wait_queue_t wait; | |
769 | int loops = 4; | |
770 | ||
771 | while (loops-- > 0) { | |
772 | if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) | |
773 | continue; | |
774 | init_waitqueue_entry(&wait, current); | |
775 | add_wait_queue(&chip->interrupt_sleep, &wait); | |
776 | atomic_inc(&chip->interrupt_sleep_count); | |
8433a509 | 777 | schedule_timeout_uninterruptible(msecs_to_jiffies(50)); |
1da177e4 LT |
778 | remove_wait_queue(&chip->interrupt_sleep, &wait); |
779 | } | |
780 | } | |
781 | ||
7d12e780 | 782 | static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) |
1da177e4 | 783 | { |
208a1b4c | 784 | struct snd_ymfpci *chip = dev_id; |
1da177e4 | 785 | u32 status, nvoice, mode; |
208a1b4c | 786 | struct snd_ymfpci_voice *voice; |
1da177e4 LT |
787 | |
788 | status = snd_ymfpci_readl(chip, YDSXGR_STATUS); | |
789 | if (status & 0x80000000) { | |
790 | chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; | |
791 | spin_lock(&chip->voice_lock); | |
792 | for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { | |
793 | voice = &chip->voices[nvoice]; | |
794 | if (voice->interrupt) | |
795 | voice->interrupt(chip, voice); | |
796 | } | |
797 | for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { | |
798 | if (chip->capture_substream[nvoice]) | |
799 | snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); | |
800 | } | |
801 | #if 0 | |
802 | for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { | |
803 | if (chip->effect_substream[nvoice]) | |
804 | snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); | |
805 | } | |
806 | #endif | |
807 | spin_unlock(&chip->voice_lock); | |
808 | spin_lock(&chip->reg_lock); | |
809 | snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); | |
810 | mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; | |
811 | snd_ymfpci_writel(chip, YDSXGR_MODE, mode); | |
812 | spin_unlock(&chip->reg_lock); | |
813 | ||
814 | if (atomic_read(&chip->interrupt_sleep_count)) { | |
815 | atomic_set(&chip->interrupt_sleep_count, 0); | |
816 | wake_up(&chip->interrupt_sleep); | |
817 | } | |
818 | } | |
819 | ||
820 | status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); | |
821 | if (status & 1) { | |
822 | if (chip->timer) | |
823 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
824 | } | |
825 | snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); | |
826 | ||
827 | if (chip->rawmidi) | |
7d12e780 | 828 | snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); |
1da177e4 LT |
829 | return IRQ_HANDLED; |
830 | } | |
831 | ||
208a1b4c | 832 | static struct snd_pcm_hardware snd_ymfpci_playback = |
1da177e4 LT |
833 | { |
834 | .info = (SNDRV_PCM_INFO_MMAP | | |
835 | SNDRV_PCM_INFO_MMAP_VALID | | |
836 | SNDRV_PCM_INFO_INTERLEAVED | | |
837 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
838 | SNDRV_PCM_INFO_PAUSE | | |
839 | SNDRV_PCM_INFO_RESUME), | |
840 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
841 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
842 | .rate_min = 8000, | |
843 | .rate_max = 48000, | |
844 | .channels_min = 1, | |
845 | .channels_max = 2, | |
846 | .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ | |
847 | .period_bytes_min = 64, | |
848 | .period_bytes_max = 256 * 1024, /* FIXME: enough? */ | |
849 | .periods_min = 3, | |
850 | .periods_max = 1024, | |
851 | .fifo_size = 0, | |
852 | }; | |
853 | ||
208a1b4c | 854 | static struct snd_pcm_hardware snd_ymfpci_capture = |
1da177e4 LT |
855 | { |
856 | .info = (SNDRV_PCM_INFO_MMAP | | |
857 | SNDRV_PCM_INFO_MMAP_VALID | | |
858 | SNDRV_PCM_INFO_INTERLEAVED | | |
859 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
860 | SNDRV_PCM_INFO_PAUSE | | |
861 | SNDRV_PCM_INFO_RESUME), | |
862 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
863 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
864 | .rate_min = 8000, | |
865 | .rate_max = 48000, | |
866 | .channels_min = 1, | |
867 | .channels_max = 2, | |
868 | .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ | |
869 | .period_bytes_min = 64, | |
870 | .period_bytes_max = 256 * 1024, /* FIXME: enough? */ | |
871 | .periods_min = 3, | |
872 | .periods_max = 1024, | |
873 | .fifo_size = 0, | |
874 | }; | |
875 | ||
208a1b4c | 876 | static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) |
1da177e4 | 877 | { |
4d572776 | 878 | kfree(runtime->private_data); |
1da177e4 LT |
879 | } |
880 | ||
208a1b4c | 881 | static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) |
1da177e4 | 882 | { |
208a1b4c TI |
883 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
884 | struct snd_pcm_runtime *runtime = substream->runtime; | |
885 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 | 886 | |
e560d8d8 | 887 | ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); |
1da177e4 LT |
888 | if (ypcm == NULL) |
889 | return -ENOMEM; | |
890 | ypcm->chip = chip; | |
891 | ypcm->type = PLAYBACK_VOICE; | |
892 | ypcm->substream = substream; | |
893 | runtime->hw = snd_ymfpci_playback; | |
894 | runtime->private_data = ypcm; | |
895 | runtime->private_free = snd_ymfpci_pcm_free_substream; | |
896 | /* FIXME? True value is 256/48 = 5.33333 ms */ | |
897 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); | |
898 | return 0; | |
899 | } | |
900 | ||
901 | /* call with spinlock held */ | |
208a1b4c | 902 | static void ymfpci_open_extension(struct snd_ymfpci *chip) |
1da177e4 LT |
903 | { |
904 | if (! chip->rear_opened) { | |
905 | if (! chip->spdif_opened) /* set AC3 */ | |
906 | snd_ymfpci_writel(chip, YDSXGR_MODE, | |
907 | snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); | |
908 | /* enable second codec (4CHEN) */ | |
909 | snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, | |
910 | (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); | |
911 | } | |
912 | } | |
913 | ||
914 | /* call with spinlock held */ | |
208a1b4c | 915 | static void ymfpci_close_extension(struct snd_ymfpci *chip) |
1da177e4 LT |
916 | { |
917 | if (! chip->rear_opened) { | |
918 | if (! chip->spdif_opened) | |
919 | snd_ymfpci_writel(chip, YDSXGR_MODE, | |
920 | snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); | |
921 | snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, | |
922 | (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); | |
923 | } | |
924 | } | |
925 | ||
208a1b4c | 926 | static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 927 | { |
208a1b4c TI |
928 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
929 | struct snd_pcm_runtime *runtime = substream->runtime; | |
930 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 LT |
931 | int err; |
932 | ||
933 | if ((err = snd_ymfpci_playback_open_1(substream)) < 0) | |
934 | return err; | |
935 | ypcm = runtime->private_data; | |
936 | ypcm->output_front = 1; | |
937 | ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; | |
d9301263 | 938 | ypcm->swap_rear = 0; |
1da177e4 LT |
939 | spin_lock_irq(&chip->reg_lock); |
940 | if (ypcm->output_rear) { | |
941 | ymfpci_open_extension(chip); | |
942 | chip->rear_opened++; | |
943 | } | |
944 | spin_unlock_irq(&chip->reg_lock); | |
945 | return 0; | |
946 | } | |
947 | ||
208a1b4c | 948 | static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) |
1da177e4 | 949 | { |
208a1b4c TI |
950 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
951 | struct snd_pcm_runtime *runtime = substream->runtime; | |
952 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 LT |
953 | int err; |
954 | ||
955 | if ((err = snd_ymfpci_playback_open_1(substream)) < 0) | |
956 | return err; | |
957 | ypcm = runtime->private_data; | |
958 | ypcm->output_front = 0; | |
959 | ypcm->output_rear = 1; | |
d9301263 | 960 | ypcm->swap_rear = 1; |
1da177e4 LT |
961 | spin_lock_irq(&chip->reg_lock); |
962 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, | |
963 | snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); | |
964 | ymfpci_open_extension(chip); | |
965 | chip->spdif_pcm_bits = chip->spdif_bits; | |
966 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); | |
967 | chip->spdif_opened++; | |
968 | spin_unlock_irq(&chip->reg_lock); | |
969 | ||
970 | chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
971 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
972 | SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); | |
973 | return 0; | |
974 | } | |
975 | ||
208a1b4c | 976 | static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) |
1da177e4 | 977 | { |
208a1b4c TI |
978 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
979 | struct snd_pcm_runtime *runtime = substream->runtime; | |
980 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 LT |
981 | int err; |
982 | ||
983 | if ((err = snd_ymfpci_playback_open_1(substream)) < 0) | |
984 | return err; | |
985 | ypcm = runtime->private_data; | |
986 | ypcm->output_front = 0; | |
987 | ypcm->output_rear = 1; | |
d9301263 | 988 | ypcm->swap_rear = 0; |
1da177e4 LT |
989 | spin_lock_irq(&chip->reg_lock); |
990 | ymfpci_open_extension(chip); | |
991 | chip->rear_opened++; | |
992 | spin_unlock_irq(&chip->reg_lock); | |
993 | return 0; | |
994 | } | |
995 | ||
208a1b4c | 996 | static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, |
1da177e4 LT |
997 | u32 capture_bank_number) |
998 | { | |
208a1b4c TI |
999 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1000 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1001 | struct snd_ymfpci_pcm *ypcm; | |
1da177e4 | 1002 | |
e560d8d8 | 1003 | ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); |
1da177e4 LT |
1004 | if (ypcm == NULL) |
1005 | return -ENOMEM; | |
1006 | ypcm->chip = chip; | |
1007 | ypcm->type = capture_bank_number + CAPTURE_REC; | |
1008 | ypcm->substream = substream; | |
1009 | ypcm->capture_bank_number = capture_bank_number; | |
1010 | chip->capture_substream[capture_bank_number] = substream; | |
1011 | runtime->hw = snd_ymfpci_capture; | |
1012 | /* FIXME? True value is 256/48 = 5.33333 ms */ | |
1013 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); | |
1014 | runtime->private_data = ypcm; | |
1015 | runtime->private_free = snd_ymfpci_pcm_free_substream; | |
1016 | snd_ymfpci_hw_start(chip); | |
1017 | return 0; | |
1018 | } | |
1019 | ||
208a1b4c | 1020 | static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) |
1da177e4 LT |
1021 | { |
1022 | return snd_ymfpci_capture_open(substream, 0); | |
1023 | } | |
1024 | ||
208a1b4c | 1025 | static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) |
1da177e4 LT |
1026 | { |
1027 | return snd_ymfpci_capture_open(substream, 1); | |
1028 | } | |
1029 | ||
208a1b4c | 1030 | static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) |
1da177e4 LT |
1031 | { |
1032 | return 0; | |
1033 | } | |
1034 | ||
208a1b4c | 1035 | static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1036 | { |
208a1b4c TI |
1037 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1038 | struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; | |
1da177e4 LT |
1039 | |
1040 | spin_lock_irq(&chip->reg_lock); | |
1041 | if (ypcm->output_rear && chip->rear_opened > 0) { | |
1042 | chip->rear_opened--; | |
1043 | ymfpci_close_extension(chip); | |
1044 | } | |
1045 | spin_unlock_irq(&chip->reg_lock); | |
1046 | return snd_ymfpci_playback_close_1(substream); | |
1047 | } | |
1048 | ||
208a1b4c | 1049 | static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) |
1da177e4 | 1050 | { |
208a1b4c | 1051 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1052 | |
1053 | spin_lock_irq(&chip->reg_lock); | |
1054 | chip->spdif_opened = 0; | |
1055 | ymfpci_close_extension(chip); | |
1056 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, | |
1057 | snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); | |
1058 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); | |
1059 | spin_unlock_irq(&chip->reg_lock); | |
1060 | chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
1061 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
1062 | SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); | |
1063 | return snd_ymfpci_playback_close_1(substream); | |
1064 | } | |
1065 | ||
208a1b4c | 1066 | static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) |
1da177e4 | 1067 | { |
208a1b4c | 1068 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1069 | |
1070 | spin_lock_irq(&chip->reg_lock); | |
1071 | if (chip->rear_opened > 0) { | |
1072 | chip->rear_opened--; | |
1073 | ymfpci_close_extension(chip); | |
1074 | } | |
1075 | spin_unlock_irq(&chip->reg_lock); | |
1076 | return snd_ymfpci_playback_close_1(substream); | |
1077 | } | |
1078 | ||
208a1b4c | 1079 | static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1080 | { |
208a1b4c TI |
1081 | struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); |
1082 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1083 | struct snd_ymfpci_pcm *ypcm = runtime->private_data; | |
1da177e4 LT |
1084 | |
1085 | if (ypcm != NULL) { | |
1086 | chip->capture_substream[ypcm->capture_bank_number] = NULL; | |
1087 | snd_ymfpci_hw_stop(chip); | |
1088 | } | |
1089 | return 0; | |
1090 | } | |
1091 | ||
208a1b4c | 1092 | static struct snd_pcm_ops snd_ymfpci_playback_ops = { |
1da177e4 LT |
1093 | .open = snd_ymfpci_playback_open, |
1094 | .close = snd_ymfpci_playback_close, | |
1095 | .ioctl = snd_pcm_lib_ioctl, | |
1096 | .hw_params = snd_ymfpci_playback_hw_params, | |
1097 | .hw_free = snd_ymfpci_playback_hw_free, | |
1098 | .prepare = snd_ymfpci_playback_prepare, | |
1099 | .trigger = snd_ymfpci_playback_trigger, | |
1100 | .pointer = snd_ymfpci_playback_pointer, | |
1101 | }; | |
1102 | ||
208a1b4c | 1103 | static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { |
1da177e4 LT |
1104 | .open = snd_ymfpci_capture_rec_open, |
1105 | .close = snd_ymfpci_capture_close, | |
1106 | .ioctl = snd_pcm_lib_ioctl, | |
1107 | .hw_params = snd_ymfpci_capture_hw_params, | |
1108 | .hw_free = snd_ymfpci_capture_hw_free, | |
1109 | .prepare = snd_ymfpci_capture_prepare, | |
1110 | .trigger = snd_ymfpci_capture_trigger, | |
1111 | .pointer = snd_ymfpci_capture_pointer, | |
1112 | }; | |
1113 | ||
208a1b4c | 1114 | int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) |
1da177e4 | 1115 | { |
208a1b4c | 1116 | struct snd_pcm *pcm; |
1da177e4 LT |
1117 | int err; |
1118 | ||
1119 | if (rpcm) | |
1120 | *rpcm = NULL; | |
1121 | if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) | |
1122 | return err; | |
1123 | pcm->private_data = chip; | |
1da177e4 LT |
1124 | |
1125 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); | |
1126 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); | |
1127 | ||
1128 | /* global setup */ | |
1129 | pcm->info_flags = 0; | |
1130 | strcpy(pcm->name, "YMFPCI"); | |
1131 | chip->pcm = pcm; | |
1132 | ||
1133 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1134 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | |
1135 | ||
1136 | if (rpcm) | |
1137 | *rpcm = pcm; | |
1138 | return 0; | |
1139 | } | |
1140 | ||
208a1b4c | 1141 | static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { |
1da177e4 LT |
1142 | .open = snd_ymfpci_capture_ac97_open, |
1143 | .close = snd_ymfpci_capture_close, | |
1144 | .ioctl = snd_pcm_lib_ioctl, | |
1145 | .hw_params = snd_ymfpci_capture_hw_params, | |
1146 | .hw_free = snd_ymfpci_capture_hw_free, | |
1147 | .prepare = snd_ymfpci_capture_prepare, | |
1148 | .trigger = snd_ymfpci_capture_trigger, | |
1149 | .pointer = snd_ymfpci_capture_pointer, | |
1150 | }; | |
1151 | ||
208a1b4c | 1152 | int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) |
1da177e4 | 1153 | { |
208a1b4c | 1154 | struct snd_pcm *pcm; |
1da177e4 LT |
1155 | int err; |
1156 | ||
1157 | if (rpcm) | |
1158 | *rpcm = NULL; | |
1159 | if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) | |
1160 | return err; | |
1161 | pcm->private_data = chip; | |
1da177e4 LT |
1162 | |
1163 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); | |
1164 | ||
1165 | /* global setup */ | |
1166 | pcm->info_flags = 0; | |
1167 | sprintf(pcm->name, "YMFPCI - %s", | |
1168 | chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); | |
1169 | chip->pcm2 = pcm; | |
1170 | ||
1171 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1172 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | |
1173 | ||
1174 | if (rpcm) | |
1175 | *rpcm = pcm; | |
1176 | return 0; | |
1177 | } | |
1178 | ||
208a1b4c | 1179 | static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { |
1da177e4 LT |
1180 | .open = snd_ymfpci_playback_spdif_open, |
1181 | .close = snd_ymfpci_playback_spdif_close, | |
1182 | .ioctl = snd_pcm_lib_ioctl, | |
1183 | .hw_params = snd_ymfpci_playback_hw_params, | |
1184 | .hw_free = snd_ymfpci_playback_hw_free, | |
1185 | .prepare = snd_ymfpci_playback_prepare, | |
1186 | .trigger = snd_ymfpci_playback_trigger, | |
1187 | .pointer = snd_ymfpci_playback_pointer, | |
1188 | }; | |
1189 | ||
208a1b4c | 1190 | int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) |
1da177e4 | 1191 | { |
208a1b4c | 1192 | struct snd_pcm *pcm; |
1da177e4 LT |
1193 | int err; |
1194 | ||
1195 | if (rpcm) | |
1196 | *rpcm = NULL; | |
1197 | if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) | |
1198 | return err; | |
1199 | pcm->private_data = chip; | |
1da177e4 LT |
1200 | |
1201 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); | |
1202 | ||
1203 | /* global setup */ | |
1204 | pcm->info_flags = 0; | |
1205 | strcpy(pcm->name, "YMFPCI - IEC958"); | |
1206 | chip->pcm_spdif = pcm; | |
1207 | ||
1208 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1209 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | |
1210 | ||
1211 | if (rpcm) | |
1212 | *rpcm = pcm; | |
1213 | return 0; | |
1214 | } | |
1215 | ||
208a1b4c | 1216 | static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { |
1da177e4 LT |
1217 | .open = snd_ymfpci_playback_4ch_open, |
1218 | .close = snd_ymfpci_playback_4ch_close, | |
1219 | .ioctl = snd_pcm_lib_ioctl, | |
1220 | .hw_params = snd_ymfpci_playback_hw_params, | |
1221 | .hw_free = snd_ymfpci_playback_hw_free, | |
1222 | .prepare = snd_ymfpci_playback_prepare, | |
1223 | .trigger = snd_ymfpci_playback_trigger, | |
1224 | .pointer = snd_ymfpci_playback_pointer, | |
1225 | }; | |
1226 | ||
208a1b4c | 1227 | int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) |
1da177e4 | 1228 | { |
208a1b4c | 1229 | struct snd_pcm *pcm; |
1da177e4 LT |
1230 | int err; |
1231 | ||
1232 | if (rpcm) | |
1233 | *rpcm = NULL; | |
1234 | if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) | |
1235 | return err; | |
1236 | pcm->private_data = chip; | |
1da177e4 LT |
1237 | |
1238 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); | |
1239 | ||
1240 | /* global setup */ | |
1241 | pcm->info_flags = 0; | |
1242 | strcpy(pcm->name, "YMFPCI - Rear PCM"); | |
1243 | chip->pcm_4ch = pcm; | |
1244 | ||
1245 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1246 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | |
1247 | ||
1248 | if (rpcm) | |
1249 | *rpcm = pcm; | |
1250 | return 0; | |
1251 | } | |
1252 | ||
208a1b4c | 1253 | static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1254 | { |
1255 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1256 | uinfo->count = 1; | |
1257 | return 0; | |
1258 | } | |
1259 | ||
208a1b4c TI |
1260 | static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, |
1261 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1262 | { |
208a1b4c | 1263 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1264 | |
1265 | spin_lock_irq(&chip->reg_lock); | |
1266 | ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; | |
1267 | ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; | |
fc80a202 | 1268 | ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; |
1da177e4 LT |
1269 | spin_unlock_irq(&chip->reg_lock); |
1270 | return 0; | |
1271 | } | |
1272 | ||
208a1b4c TI |
1273 | static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, |
1274 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1275 | { |
208a1b4c | 1276 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1277 | unsigned int val; |
1278 | int change; | |
1279 | ||
1280 | val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | | |
1281 | (ucontrol->value.iec958.status[1] << 8); | |
1282 | spin_lock_irq(&chip->reg_lock); | |
1283 | change = chip->spdif_bits != val; | |
1284 | chip->spdif_bits = val; | |
1285 | if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) | |
1286 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); | |
1287 | spin_unlock_irq(&chip->reg_lock); | |
1288 | return change; | |
1289 | } | |
1290 | ||
208a1b4c | 1291 | static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata = |
1da177e4 LT |
1292 | { |
1293 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1294 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
1295 | .info = snd_ymfpci_spdif_default_info, | |
1296 | .get = snd_ymfpci_spdif_default_get, | |
1297 | .put = snd_ymfpci_spdif_default_put | |
1298 | }; | |
1299 | ||
208a1b4c | 1300 | static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1301 | { |
1302 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1303 | uinfo->count = 1; | |
1304 | return 0; | |
1305 | } | |
1306 | ||
208a1b4c TI |
1307 | static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, |
1308 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1309 | { |
208a1b4c | 1310 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1311 | |
1312 | spin_lock_irq(&chip->reg_lock); | |
1313 | ucontrol->value.iec958.status[0] = 0x3e; | |
1314 | ucontrol->value.iec958.status[1] = 0xff; | |
1315 | spin_unlock_irq(&chip->reg_lock); | |
1316 | return 0; | |
1317 | } | |
1318 | ||
208a1b4c | 1319 | static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata = |
1da177e4 LT |
1320 | { |
1321 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1322 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1323 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), | |
1324 | .info = snd_ymfpci_spdif_mask_info, | |
1325 | .get = snd_ymfpci_spdif_mask_get, | |
1326 | }; | |
1327 | ||
208a1b4c | 1328 | static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1329 | { |
1330 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1331 | uinfo->count = 1; | |
1332 | return 0; | |
1333 | } | |
1334 | ||
208a1b4c TI |
1335 | static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, |
1336 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1337 | { |
208a1b4c | 1338 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1339 | |
1340 | spin_lock_irq(&chip->reg_lock); | |
1341 | ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; | |
1342 | ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; | |
fc80a202 | 1343 | ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; |
1da177e4 LT |
1344 | spin_unlock_irq(&chip->reg_lock); |
1345 | return 0; | |
1346 | } | |
1347 | ||
208a1b4c TI |
1348 | static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, |
1349 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1350 | { |
208a1b4c | 1351 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1352 | unsigned int val; |
1353 | int change; | |
1354 | ||
1355 | val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | | |
1356 | (ucontrol->value.iec958.status[1] << 8); | |
1357 | spin_lock_irq(&chip->reg_lock); | |
1358 | change = chip->spdif_pcm_bits != val; | |
1359 | chip->spdif_pcm_bits = val; | |
1360 | if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) | |
1361 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); | |
1362 | spin_unlock_irq(&chip->reg_lock); | |
1363 | return change; | |
1364 | } | |
1365 | ||
208a1b4c | 1366 | static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata = |
1da177e4 LT |
1367 | { |
1368 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
1369 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1370 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), | |
1371 | .info = snd_ymfpci_spdif_stream_info, | |
1372 | .get = snd_ymfpci_spdif_stream_get, | |
1373 | .put = snd_ymfpci_spdif_stream_put | |
1374 | }; | |
1375 | ||
208a1b4c | 1376 | static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) |
1da177e4 LT |
1377 | { |
1378 | static char *texts[3] = {"AC'97", "IEC958", "ZV Port"}; | |
1379 | ||
1380 | info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1381 | info->count = 1; | |
1382 | info->value.enumerated.items = 3; | |
1383 | if (info->value.enumerated.item > 2) | |
1384 | info->value.enumerated.item = 2; | |
1385 | strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); | |
1386 | return 0; | |
1387 | } | |
1388 | ||
208a1b4c | 1389 | static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) |
1da177e4 | 1390 | { |
208a1b4c | 1391 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1392 | u16 reg; |
1393 | ||
1394 | spin_lock_irq(&chip->reg_lock); | |
1395 | reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); | |
1396 | spin_unlock_irq(&chip->reg_lock); | |
1397 | if (!(reg & 0x100)) | |
1398 | value->value.enumerated.item[0] = 0; | |
1399 | else | |
1400 | value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); | |
1401 | return 0; | |
1402 | } | |
1403 | ||
208a1b4c | 1404 | static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) |
1da177e4 | 1405 | { |
208a1b4c | 1406 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1407 | u16 reg, old_reg; |
1408 | ||
1409 | spin_lock_irq(&chip->reg_lock); | |
1410 | old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); | |
1411 | if (value->value.enumerated.item[0] == 0) | |
1412 | reg = old_reg & ~0x100; | |
1413 | else | |
1414 | reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); | |
1415 | snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); | |
1416 | spin_unlock_irq(&chip->reg_lock); | |
1417 | return reg != old_reg; | |
1418 | } | |
1419 | ||
208a1b4c | 1420 | static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = { |
1da177e4 LT |
1421 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, |
1422 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1423 | .name = "Direct Recording Source", | |
1424 | .info = snd_ymfpci_drec_source_info, | |
1425 | .get = snd_ymfpci_drec_source_get, | |
1426 | .put = snd_ymfpci_drec_source_put | |
1427 | }; | |
1428 | ||
1429 | /* | |
1430 | * Mixer controls | |
1431 | */ | |
1432 | ||
d602c885 | 1433 | #define YMFPCI_SINGLE(xname, xindex, reg, shift) \ |
1da177e4 LT |
1434 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1435 | .info = snd_ymfpci_info_single, \ | |
1436 | .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ | |
d602c885 | 1437 | .private_value = ((reg) | ((shift) << 16)) } |
1da177e4 | 1438 | |
a5ce8890 | 1439 | #define snd_ymfpci_info_single snd_ctl_boolean_mono_info |
1da177e4 | 1440 | |
208a1b4c TI |
1441 | static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, |
1442 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1443 | { |
208a1b4c | 1444 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
d602c885 GM |
1445 | int reg = kcontrol->private_value & 0xffff; |
1446 | unsigned int shift = (kcontrol->private_value >> 16) & 0xff; | |
1447 | unsigned int mask = 1; | |
1da177e4 | 1448 | |
d602c885 | 1449 | switch (reg) { |
1da177e4 LT |
1450 | case YDSXGR_SPDIFOUTCTRL: break; |
1451 | case YDSXGR_SPDIFINCTRL: break; | |
1452 | default: return -EINVAL; | |
1453 | } | |
d602c885 GM |
1454 | ucontrol->value.integer.value[0] = |
1455 | (snd_ymfpci_readl(chip, reg) >> shift) & mask; | |
1da177e4 LT |
1456 | return 0; |
1457 | } | |
1458 | ||
208a1b4c TI |
1459 | static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, |
1460 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1461 | { |
208a1b4c | 1462 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
d602c885 GM |
1463 | int reg = kcontrol->private_value & 0xffff; |
1464 | unsigned int shift = (kcontrol->private_value >> 16) & 0xff; | |
1465 | unsigned int mask = 1; | |
1da177e4 LT |
1466 | int change; |
1467 | unsigned int val, oval; | |
1468 | ||
d602c885 | 1469 | switch (reg) { |
1da177e4 LT |
1470 | case YDSXGR_SPDIFOUTCTRL: break; |
1471 | case YDSXGR_SPDIFINCTRL: break; | |
1472 | default: return -EINVAL; | |
1473 | } | |
1474 | val = (ucontrol->value.integer.value[0] & mask); | |
1da177e4 LT |
1475 | val <<= shift; |
1476 | spin_lock_irq(&chip->reg_lock); | |
1477 | oval = snd_ymfpci_readl(chip, reg); | |
1478 | val = (oval & ~(mask << shift)) | val; | |
1479 | change = val != oval; | |
1480 | snd_ymfpci_writel(chip, reg, val); | |
1481 | spin_unlock_irq(&chip->reg_lock); | |
1482 | return change; | |
1483 | } | |
1484 | ||
0cb29ea0 | 1485 | static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); |
33925186 | 1486 | |
1da177e4 LT |
1487 | #define YMFPCI_DOUBLE(xname, xindex, reg) \ |
1488 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ | |
33925186 | 1489 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ |
1da177e4 LT |
1490 | .info = snd_ymfpci_info_double, \ |
1491 | .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ | |
33925186 TI |
1492 | .private_value = reg, \ |
1493 | .tlv = { .p = db_scale_native } } | |
1da177e4 | 1494 | |
208a1b4c | 1495 | static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1496 | { |
1497 | unsigned int reg = kcontrol->private_value; | |
1da177e4 LT |
1498 | |
1499 | if (reg < 0x80 || reg >= 0xc0) | |
1500 | return -EINVAL; | |
467a8c2f | 1501 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
1da177e4 LT |
1502 | uinfo->count = 2; |
1503 | uinfo->value.integer.min = 0; | |
467a8c2f | 1504 | uinfo->value.integer.max = 16383; |
1da177e4 LT |
1505 | return 0; |
1506 | } | |
1507 | ||
208a1b4c | 1508 | static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1509 | { |
208a1b4c | 1510 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1511 | unsigned int reg = kcontrol->private_value; |
467a8c2f | 1512 | unsigned int shift_left = 0, shift_right = 16, mask = 16383; |
1da177e4 LT |
1513 | unsigned int val; |
1514 | ||
1515 | if (reg < 0x80 || reg >= 0xc0) | |
1516 | return -EINVAL; | |
1517 | spin_lock_irq(&chip->reg_lock); | |
1518 | val = snd_ymfpci_readl(chip, reg); | |
1519 | spin_unlock_irq(&chip->reg_lock); | |
1520 | ucontrol->value.integer.value[0] = (val >> shift_left) & mask; | |
1521 | ucontrol->value.integer.value[1] = (val >> shift_right) & mask; | |
1da177e4 LT |
1522 | return 0; |
1523 | } | |
1524 | ||
208a1b4c | 1525 | static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1526 | { |
208a1b4c | 1527 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1528 | unsigned int reg = kcontrol->private_value; |
467a8c2f | 1529 | unsigned int shift_left = 0, shift_right = 16, mask = 16383; |
1da177e4 LT |
1530 | int change; |
1531 | unsigned int val1, val2, oval; | |
1532 | ||
1533 | if (reg < 0x80 || reg >= 0xc0) | |
1534 | return -EINVAL; | |
1535 | val1 = ucontrol->value.integer.value[0] & mask; | |
1536 | val2 = ucontrol->value.integer.value[1] & mask; | |
1da177e4 LT |
1537 | val1 <<= shift_left; |
1538 | val2 <<= shift_right; | |
1539 | spin_lock_irq(&chip->reg_lock); | |
1540 | oval = snd_ymfpci_readl(chip, reg); | |
1541 | val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; | |
1542 | change = val1 != oval; | |
1543 | snd_ymfpci_writel(chip, reg, val1); | |
1544 | spin_unlock_irq(&chip->reg_lock); | |
1545 | return change; | |
1546 | } | |
1547 | ||
177a7cdb CL |
1548 | static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, |
1549 | struct snd_ctl_elem_value *ucontrol) | |
1550 | { | |
1551 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); | |
1552 | unsigned int reg = YDSXGR_NATIVEDACOUTVOL; | |
1553 | unsigned int reg2 = YDSXGR_BUF441OUTVOL; | |
1554 | int change; | |
1555 | unsigned int value, oval; | |
1556 | ||
1557 | value = ucontrol->value.integer.value[0] & 0x3fff; | |
1558 | value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; | |
1559 | spin_lock_irq(&chip->reg_lock); | |
1560 | oval = snd_ymfpci_readl(chip, reg); | |
1561 | change = value != oval; | |
1562 | snd_ymfpci_writel(chip, reg, value); | |
1563 | snd_ymfpci_writel(chip, reg2, value); | |
1564 | spin_unlock_irq(&chip->reg_lock); | |
1565 | return change; | |
1566 | } | |
1567 | ||
1da177e4 LT |
1568 | /* |
1569 | * 4ch duplication | |
1570 | */ | |
a5ce8890 | 1571 | #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info |
1da177e4 | 1572 | |
208a1b4c | 1573 | static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1574 | { |
208a1b4c | 1575 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1576 | ucontrol->value.integer.value[0] = chip->mode_dup4ch; |
1577 | return 0; | |
1578 | } | |
1579 | ||
208a1b4c | 1580 | static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1581 | { |
208a1b4c | 1582 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1583 | int change; |
1584 | change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); | |
1585 | if (change) | |
1586 | chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; | |
1587 | return change; | |
1588 | } | |
1589 | ||
1590 | ||
208a1b4c | 1591 | static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = { |
177a7cdb CL |
1592 | { |
1593 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1594 | .name = "Wave Playback Volume", | |
1595 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | | |
1596 | SNDRV_CTL_ELEM_ACCESS_TLV_READ, | |
1597 | .info = snd_ymfpci_info_double, | |
1598 | .get = snd_ymfpci_get_double, | |
1599 | .put = snd_ymfpci_put_nativedacvol, | |
1600 | .private_value = YDSXGR_NATIVEDACOUTVOL, | |
1601 | .tlv = { .p = db_scale_native }, | |
1602 | }, | |
1da177e4 LT |
1603 | YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), |
1604 | YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), | |
1605 | YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), | |
1606 | YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), | |
1607 | YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), | |
1608 | YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), | |
1609 | YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), | |
1610 | YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL), | |
1611 | YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), | |
1612 | YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), | |
1613 | YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), | |
1614 | YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), | |
d602c885 GM |
1615 | YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), |
1616 | YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), | |
1617 | YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), | |
1da177e4 LT |
1618 | { |
1619 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1620 | .name = "4ch Duplication", | |
1621 | .info = snd_ymfpci_info_dup4ch, | |
1622 | .get = snd_ymfpci_get_dup4ch, | |
1623 | .put = snd_ymfpci_put_dup4ch, | |
1624 | }, | |
1625 | }; | |
1626 | ||
1627 | ||
1628 | /* | |
1629 | * GPIO | |
1630 | */ | |
1631 | ||
208a1b4c | 1632 | static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) |
1da177e4 LT |
1633 | { |
1634 | u16 reg, mode; | |
1635 | unsigned long flags; | |
1636 | ||
1637 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1638 | reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); | |
1639 | reg &= ~(1 << (pin + 8)); | |
1640 | reg |= (1 << pin); | |
1641 | snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); | |
1642 | /* set the level mode for input line */ | |
1643 | mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); | |
1644 | mode &= ~(3 << (pin * 2)); | |
1645 | snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); | |
1646 | snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); | |
1647 | mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); | |
1648 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1649 | return (mode >> pin) & 1; | |
1650 | } | |
1651 | ||
208a1b4c | 1652 | static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) |
1da177e4 LT |
1653 | { |
1654 | u16 reg; | |
1655 | unsigned long flags; | |
1656 | ||
1657 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1658 | reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); | |
1659 | reg &= ~(1 << pin); | |
1660 | reg &= ~(1 << (pin + 8)); | |
1661 | snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); | |
1662 | snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); | |
1663 | snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); | |
1664 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1665 | ||
1666 | return 0; | |
1667 | } | |
1668 | ||
a5ce8890 | 1669 | #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info |
1da177e4 | 1670 | |
208a1b4c | 1671 | static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1672 | { |
208a1b4c | 1673 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1674 | int pin = (int)kcontrol->private_value; |
1675 | ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); | |
1676 | return 0; | |
1677 | } | |
1678 | ||
208a1b4c | 1679 | static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1680 | { |
208a1b4c | 1681 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1682 | int pin = (int)kcontrol->private_value; |
1683 | ||
1684 | if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { | |
1685 | snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); | |
1686 | ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); | |
1687 | return 1; | |
1688 | } | |
1689 | return 0; | |
1690 | } | |
1691 | ||
208a1b4c | 1692 | static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = { |
1da177e4 LT |
1693 | .name = "Shared Rear/Line-In Switch", |
1694 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1695 | .info = snd_ymfpci_gpio_sw_info, | |
1696 | .get = snd_ymfpci_gpio_sw_get, | |
1697 | .put = snd_ymfpci_gpio_sw_put, | |
1698 | .private_value = 2, | |
1699 | }; | |
1700 | ||
9bcf6551 CL |
1701 | /* |
1702 | * PCM voice volume | |
1703 | */ | |
1704 | ||
208a1b4c TI |
1705 | static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, |
1706 | struct snd_ctl_elem_info *uinfo) | |
9bcf6551 CL |
1707 | { |
1708 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1709 | uinfo->count = 2; | |
1710 | uinfo->value.integer.min = 0; | |
1711 | uinfo->value.integer.max = 0x8000; | |
1712 | return 0; | |
1713 | } | |
1714 | ||
208a1b4c TI |
1715 | static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, |
1716 | struct snd_ctl_elem_value *ucontrol) | |
9bcf6551 | 1717 | { |
208a1b4c | 1718 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
9bcf6551 CL |
1719 | unsigned int subs = kcontrol->id.subdevice; |
1720 | ||
1721 | ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; | |
1722 | ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; | |
1723 | return 0; | |
1724 | } | |
1725 | ||
208a1b4c TI |
1726 | static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, |
1727 | struct snd_ctl_elem_value *ucontrol) | |
9bcf6551 | 1728 | { |
208a1b4c | 1729 | struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); |
9bcf6551 | 1730 | unsigned int subs = kcontrol->id.subdevice; |
208a1b4c | 1731 | struct snd_pcm_substream *substream; |
9bcf6551 CL |
1732 | unsigned long flags; |
1733 | ||
1734 | if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || | |
1735 | ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { | |
1736 | chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; | |
1737 | chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; | |
1738 | ||
208a1b4c | 1739 | substream = (struct snd_pcm_substream *)kcontrol->private_value; |
9bcf6551 CL |
1740 | spin_lock_irqsave(&chip->voice_lock, flags); |
1741 | if (substream->runtime && substream->runtime->private_data) { | |
208a1b4c | 1742 | struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; |
9ed1261e TK |
1743 | if (!ypcm->use_441_slot) |
1744 | ypcm->update_pcm_vol = 2; | |
9bcf6551 CL |
1745 | } |
1746 | spin_unlock_irqrestore(&chip->voice_lock, flags); | |
1747 | return 1; | |
1748 | } | |
1749 | return 0; | |
1750 | } | |
1751 | ||
208a1b4c | 1752 | static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = { |
9bcf6551 CL |
1753 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1754 | .name = "PCM Playback Volume", | |
1755 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | | |
1756 | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
1757 | .info = snd_ymfpci_pcm_vol_info, | |
1758 | .get = snd_ymfpci_pcm_vol_get, | |
1759 | .put = snd_ymfpci_pcm_vol_put, | |
1760 | }; | |
1761 | ||
1da177e4 LT |
1762 | |
1763 | /* | |
1764 | * Mixer routines | |
1765 | */ | |
1766 | ||
208a1b4c | 1767 | static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) |
1da177e4 | 1768 | { |
208a1b4c | 1769 | struct snd_ymfpci *chip = bus->private_data; |
1da177e4 LT |
1770 | chip->ac97_bus = NULL; |
1771 | } | |
1772 | ||
208a1b4c | 1773 | static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) |
1da177e4 | 1774 | { |
208a1b4c | 1775 | struct snd_ymfpci *chip = ac97->private_data; |
1da177e4 LT |
1776 | chip->ac97 = NULL; |
1777 | } | |
1778 | ||
d9301263 | 1779 | int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) |
1da177e4 | 1780 | { |
208a1b4c TI |
1781 | struct snd_ac97_template ac97; |
1782 | struct snd_kcontrol *kctl; | |
1783 | struct snd_pcm_substream *substream; | |
1da177e4 LT |
1784 | unsigned int idx; |
1785 | int err; | |
208a1b4c | 1786 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1787 | .write = snd_ymfpci_codec_write, |
1788 | .read = snd_ymfpci_codec_read, | |
1789 | }; | |
1790 | ||
1791 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) | |
1792 | return err; | |
1793 | chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; | |
1794 | chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ | |
1795 | ||
1796 | memset(&ac97, 0, sizeof(ac97)); | |
1797 | ac97.private_data = chip; | |
1798 | ac97.private_free = snd_ymfpci_mixer_free_ac97; | |
1799 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) | |
1800 | return err; | |
1801 | ||
1802 | /* to be sure */ | |
1803 | snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, | |
1804 | AC97_EA_VRA|AC97_EA_VRM, 0); | |
1805 | ||
1806 | for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { | |
1807 | if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) | |
1808 | return err; | |
1809 | } | |
1810 | ||
1811 | /* add S/PDIF control */ | |
1812 | snd_assert(chip->pcm_spdif != NULL, return -EIO); | |
1813 | if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) | |
1814 | return err; | |
1815 | kctl->id.device = chip->pcm_spdif->device; | |
1816 | if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) | |
1817 | return err; | |
1818 | kctl->id.device = chip->pcm_spdif->device; | |
1819 | if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) | |
1820 | return err; | |
1821 | kctl->id.device = chip->pcm_spdif->device; | |
1822 | chip->spdif_pcm_ctl = kctl; | |
1823 | ||
1824 | /* direct recording source */ | |
1825 | if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && | |
1826 | (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) | |
1827 | return err; | |
1828 | ||
1829 | /* | |
1830 | * shared rear/line-in | |
1831 | */ | |
1832 | if (rear_switch) { | |
1833 | if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) | |
1834 | return err; | |
1835 | } | |
1836 | ||
9bcf6551 CL |
1837 | /* per-voice volume */ |
1838 | substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; | |
1839 | for (idx = 0; idx < 32; ++idx) { | |
1840 | kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); | |
1841 | if (!kctl) | |
1842 | return -ENOMEM; | |
1843 | kctl->id.device = chip->pcm->device; | |
1844 | kctl->id.subdevice = idx; | |
1845 | kctl->private_value = (unsigned long)substream; | |
1846 | if ((err = snd_ctl_add(chip->card, kctl)) < 0) | |
1847 | return err; | |
1848 | chip->pcm_mixer[idx].left = 0x8000; | |
1849 | chip->pcm_mixer[idx].right = 0x8000; | |
1850 | chip->pcm_mixer[idx].ctl = kctl; | |
1851 | substream = substream->next; | |
1852 | } | |
1853 | ||
1da177e4 LT |
1854 | return 0; |
1855 | } | |
1856 | ||
1857 | ||
1858 | /* | |
1859 | * timer | |
1860 | */ | |
1861 | ||
208a1b4c | 1862 | static int snd_ymfpci_timer_start(struct snd_timer *timer) |
1da177e4 | 1863 | { |
208a1b4c | 1864 | struct snd_ymfpci *chip; |
1da177e4 LT |
1865 | unsigned long flags; |
1866 | unsigned int count; | |
1867 | ||
1868 | chip = snd_timer_chip(timer); | |
d44c39ac | 1869 | count = (timer->sticks << 1) - 1; |
1da177e4 LT |
1870 | spin_lock_irqsave(&chip->reg_lock, flags); |
1871 | snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); | |
1872 | snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); | |
1873 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1874 | return 0; | |
1875 | } | |
1876 | ||
208a1b4c | 1877 | static int snd_ymfpci_timer_stop(struct snd_timer *timer) |
1da177e4 | 1878 | { |
208a1b4c | 1879 | struct snd_ymfpci *chip; |
1da177e4 LT |
1880 | unsigned long flags; |
1881 | ||
1882 | chip = snd_timer_chip(timer); | |
1883 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1884 | snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); | |
1885 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1886 | return 0; | |
1887 | } | |
1888 | ||
208a1b4c | 1889 | static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, |
1da177e4 LT |
1890 | unsigned long *num, unsigned long *den) |
1891 | { | |
1892 | *num = 1; | |
d44c39ac | 1893 | *den = 48000; |
1da177e4 LT |
1894 | return 0; |
1895 | } | |
1896 | ||
208a1b4c | 1897 | static struct snd_timer_hardware snd_ymfpci_timer_hw = { |
1da177e4 | 1898 | .flags = SNDRV_TIMER_HW_AUTO, |
d44c39ac CL |
1899 | .resolution = 20833, /* 1/fs = 20.8333...us */ |
1900 | .ticks = 0x8000, | |
1da177e4 LT |
1901 | .start = snd_ymfpci_timer_start, |
1902 | .stop = snd_ymfpci_timer_stop, | |
1903 | .precise_resolution = snd_ymfpci_timer_precise_resolution, | |
1904 | }; | |
1905 | ||
208a1b4c | 1906 | int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device) |
1da177e4 | 1907 | { |
208a1b4c TI |
1908 | struct snd_timer *timer = NULL; |
1909 | struct snd_timer_id tid; | |
1da177e4 LT |
1910 | int err; |
1911 | ||
1912 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1913 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
1914 | tid.card = chip->card->number; | |
1915 | tid.device = device; | |
1916 | tid.subdevice = 0; | |
1917 | if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { | |
1918 | strcpy(timer->name, "YMFPCI timer"); | |
1919 | timer->private_data = chip; | |
1920 | timer->hw = snd_ymfpci_timer_hw; | |
1921 | } | |
1922 | chip->timer = timer; | |
1923 | return err; | |
1924 | } | |
1925 | ||
1926 | ||
1927 | /* | |
1928 | * proc interface | |
1929 | */ | |
1930 | ||
208a1b4c TI |
1931 | static void snd_ymfpci_proc_read(struct snd_info_entry *entry, |
1932 | struct snd_info_buffer *buffer) | |
1da177e4 | 1933 | { |
208a1b4c | 1934 | struct snd_ymfpci *chip = entry->private_data; |
1da177e4 LT |
1935 | int i; |
1936 | ||
1937 | snd_iprintf(buffer, "YMFPCI\n\n"); | |
1938 | for (i = 0; i <= YDSXGR_WORKBASE; i += 4) | |
1939 | snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); | |
1940 | } | |
1941 | ||
208a1b4c | 1942 | static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) |
1da177e4 | 1943 | { |
208a1b4c | 1944 | struct snd_info_entry *entry; |
1da177e4 LT |
1945 | |
1946 | if (! snd_card_proc_new(card, "ymfpci", &entry)) | |
bf850204 | 1947 | snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read); |
1da177e4 LT |
1948 | return 0; |
1949 | } | |
1950 | ||
1951 | /* | |
1952 | * initialization routines | |
1953 | */ | |
1954 | ||
1955 | static void snd_ymfpci_aclink_reset(struct pci_dev * pci) | |
1956 | { | |
1957 | u8 cmd; | |
1958 | ||
1959 | pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); | |
1960 | #if 0 // force to reset | |
1961 | if (cmd & 0x03) { | |
1962 | #endif | |
1963 | pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); | |
1964 | pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); | |
1965 | pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); | |
1966 | pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); | |
1967 | pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); | |
1968 | #if 0 | |
1969 | } | |
1970 | #endif | |
1971 | } | |
1972 | ||
208a1b4c | 1973 | static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) |
1da177e4 LT |
1974 | { |
1975 | snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); | |
1976 | } | |
1977 | ||
208a1b4c | 1978 | static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) |
1da177e4 LT |
1979 | { |
1980 | u32 val; | |
1981 | int timeout = 1000; | |
1982 | ||
1983 | val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); | |
1984 | if (val) | |
1985 | snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); | |
1986 | while (timeout-- > 0) { | |
1987 | val = snd_ymfpci_readl(chip, YDSXGR_STATUS); | |
1988 | if ((val & 0x00000002) == 0) | |
1989 | break; | |
1990 | } | |
1991 | } | |
1992 | ||
8ad2da19 | 1993 | #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL |
102fa906 | 1994 | |
1da177e4 LT |
1995 | #include "ymfpci_image.h" |
1996 | ||
102fa906 CL |
1997 | static struct firmware snd_ymfpci_dsp_microcode = { |
1998 | .size = YDSXG_DSPLENGTH, | |
1999 | .data = (u8 *)DspInst, | |
2000 | }; | |
2001 | static struct firmware snd_ymfpci_controller_microcode = { | |
2002 | .size = YDSXG_CTRLLENGTH, | |
2003 | .data = (u8 *)CntrlInst, | |
2004 | }; | |
2005 | static struct firmware snd_ymfpci_controller_1e_microcode = { | |
2006 | .size = YDSXG_CTRLLENGTH, | |
2007 | .data = (u8 *)CntrlInst1E, | |
2008 | }; | |
2009 | #endif | |
2010 | ||
b7dd2b34 TI |
2011 | #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL |
2012 | static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) | |
2013 | { | |
2014 | chip->dsp_microcode = &snd_ymfpci_dsp_microcode; | |
2015 | if (chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || | |
2016 | chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || | |
2017 | chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || | |
2018 | chip->device_id == PCI_DEVICE_ID_YAMAHA_754) | |
2019 | chip->controller_microcode = | |
2020 | &snd_ymfpci_controller_1e_microcode; | |
2021 | else | |
2022 | chip->controller_microcode = | |
2023 | &snd_ymfpci_controller_microcode; | |
2024 | return 0; | |
2025 | } | |
2026 | ||
2027 | #else /* use fw_loader */ | |
2028 | ||
102fa906 CL |
2029 | #ifdef __LITTLE_ENDIAN |
2030 | static inline void snd_ymfpci_convert_from_le(const struct firmware *fw) { } | |
2031 | #else | |
2032 | static void snd_ymfpci_convert_from_le(const struct firmware *fw) | |
2033 | { | |
2034 | int i; | |
2035 | u32 *data = (u32 *)fw->data; | |
2036 | ||
2037 | for (i = 0; i < fw->size / 4; ++i) | |
2038 | le32_to_cpus(&data[i]); | |
2039 | } | |
2040 | #endif | |
2041 | ||
2042 | static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) | |
2043 | { | |
2044 | int err, is_1e; | |
2045 | const char *name; | |
2046 | ||
2047 | err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", | |
2048 | &chip->pci->dev); | |
2049 | if (err >= 0) { | |
2050 | if (chip->dsp_microcode->size == YDSXG_DSPLENGTH) | |
2051 | snd_ymfpci_convert_from_le(chip->dsp_microcode); | |
2052 | else { | |
2053 | snd_printk(KERN_ERR "DSP microcode has wrong size\n"); | |
2054 | err = -EINVAL; | |
2055 | } | |
2056 | } | |
b7dd2b34 | 2057 | if (err < 0) |
102fa906 | 2058 | return err; |
102fa906 CL |
2059 | is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || |
2060 | chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || | |
2061 | chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || | |
2062 | chip->device_id == PCI_DEVICE_ID_YAMAHA_754; | |
2063 | name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; | |
2064 | err = request_firmware(&chip->controller_microcode, name, | |
2065 | &chip->pci->dev); | |
2066 | if (err >= 0) { | |
2067 | if (chip->controller_microcode->size == YDSXG_CTRLLENGTH) | |
2068 | snd_ymfpci_convert_from_le(chip->controller_microcode); | |
2069 | else { | |
2070 | snd_printk(KERN_ERR "controller microcode" | |
2071 | " has wrong size\n"); | |
2072 | err = -EINVAL; | |
2073 | } | |
2074 | } | |
b7dd2b34 | 2075 | if (err < 0) |
102fa906 | 2076 | return err; |
102fa906 CL |
2077 | return 0; |
2078 | } | |
7e0af29d CL |
2079 | |
2080 | MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); | |
2081 | MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); | |
2082 | MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); | |
2083 | ||
b7dd2b34 | 2084 | #endif |
102fa906 | 2085 | |
208a1b4c | 2086 | static void snd_ymfpci_download_image(struct snd_ymfpci *chip) |
1da177e4 LT |
2087 | { |
2088 | int i; | |
2089 | u16 ctrl; | |
102fa906 | 2090 | u32 *inst; |
1da177e4 LT |
2091 | |
2092 | snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); | |
2093 | snd_ymfpci_disable_dsp(chip); | |
2094 | snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); | |
2095 | snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); | |
2096 | snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); | |
2097 | snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); | |
2098 | snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); | |
2099 | snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); | |
2100 | snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); | |
2101 | ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); | |
2102 | snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); | |
2103 | ||
2104 | /* setup DSP instruction code */ | |
102fa906 | 2105 | inst = (u32 *)chip->dsp_microcode->data; |
1da177e4 | 2106 | for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) |
102fa906 | 2107 | snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), inst[i]); |
1da177e4 LT |
2108 | |
2109 | /* setup control instruction code */ | |
102fa906 | 2110 | inst = (u32 *)chip->controller_microcode->data; |
1da177e4 LT |
2111 | for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) |
2112 | snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]); | |
2113 | ||
2114 | snd_ymfpci_enable_dsp(chip); | |
2115 | } | |
2116 | ||
208a1b4c | 2117 | static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip) |
1da177e4 LT |
2118 | { |
2119 | long size, playback_ctrl_size; | |
2120 | int voice, bank, reg; | |
2121 | u8 *ptr; | |
2122 | dma_addr_t ptr_addr; | |
2123 | ||
2124 | playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; | |
2125 | chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; | |
2126 | chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; | |
2127 | chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; | |
2128 | chip->work_size = YDSXG_DEFAULT_WORK_SIZE; | |
2129 | ||
7ab39926 CL |
2130 | size = ALIGN(playback_ctrl_size, 0x100) + |
2131 | ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + | |
2132 | ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + | |
2133 | ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + | |
1da177e4 LT |
2134 | chip->work_size; |
2135 | /* work_ptr must be aligned to 256 bytes, but it's already | |
2136 | covered with the kernel page allocation mechanism */ | |
2137 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
2138 | size, &chip->work_ptr) < 0) | |
2139 | return -ENOMEM; | |
2140 | ptr = chip->work_ptr.area; | |
2141 | ptr_addr = chip->work_ptr.addr; | |
2142 | memset(ptr, 0, size); /* for sure */ | |
2143 | ||
2144 | chip->bank_base_playback = ptr; | |
2145 | chip->bank_base_playback_addr = ptr_addr; | |
2146 | chip->ctrl_playback = (u32 *)ptr; | |
2147 | chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); | |
7ab39926 CL |
2148 | ptr += ALIGN(playback_ctrl_size, 0x100); |
2149 | ptr_addr += ALIGN(playback_ctrl_size, 0x100); | |
1da177e4 LT |
2150 | for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { |
2151 | chip->voices[voice].number = voice; | |
208a1b4c | 2152 | chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; |
1da177e4 LT |
2153 | chip->voices[voice].bank_addr = ptr_addr; |
2154 | for (bank = 0; bank < 2; bank++) { | |
208a1b4c | 2155 | chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; |
1da177e4 LT |
2156 | ptr += chip->bank_size_playback; |
2157 | ptr_addr += chip->bank_size_playback; | |
2158 | } | |
2159 | } | |
7ab39926 CL |
2160 | ptr = (char *)ALIGN((unsigned long)ptr, 0x100); |
2161 | ptr_addr = ALIGN(ptr_addr, 0x100); | |
1da177e4 LT |
2162 | chip->bank_base_capture = ptr; |
2163 | chip->bank_base_capture_addr = ptr_addr; | |
2164 | for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) | |
2165 | for (bank = 0; bank < 2; bank++) { | |
208a1b4c | 2166 | chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; |
1da177e4 LT |
2167 | ptr += chip->bank_size_capture; |
2168 | ptr_addr += chip->bank_size_capture; | |
2169 | } | |
7ab39926 CL |
2170 | ptr = (char *)ALIGN((unsigned long)ptr, 0x100); |
2171 | ptr_addr = ALIGN(ptr_addr, 0x100); | |
1da177e4 LT |
2172 | chip->bank_base_effect = ptr; |
2173 | chip->bank_base_effect_addr = ptr_addr; | |
2174 | for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) | |
2175 | for (bank = 0; bank < 2; bank++) { | |
208a1b4c | 2176 | chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; |
1da177e4 LT |
2177 | ptr += chip->bank_size_effect; |
2178 | ptr_addr += chip->bank_size_effect; | |
2179 | } | |
7ab39926 CL |
2180 | ptr = (char *)ALIGN((unsigned long)ptr, 0x100); |
2181 | ptr_addr = ALIGN(ptr_addr, 0x100); | |
1da177e4 LT |
2182 | chip->work_base = ptr; |
2183 | chip->work_base_addr = ptr_addr; | |
2184 | ||
2185 | snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, ); | |
2186 | ||
2187 | snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); | |
2188 | snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); | |
2189 | snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); | |
2190 | snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); | |
2191 | snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); | |
2192 | ||
2193 | /* S/PDIF output initialization */ | |
2194 | chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; | |
2195 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); | |
2196 | snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); | |
2197 | ||
2198 | /* S/PDIF input initialization */ | |
2199 | snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); | |
2200 | ||
2201 | /* digital mixer setup */ | |
2202 | for (reg = 0x80; reg < 0xc0; reg += 4) | |
2203 | snd_ymfpci_writel(chip, reg, 0); | |
2204 | snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); | |
2205 | snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); | |
2206 | snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); | |
2207 | snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); | |
2208 | snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); | |
2209 | snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); | |
2210 | snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); | |
2211 | ||
2212 | return 0; | |
2213 | } | |
2214 | ||
208a1b4c | 2215 | static int snd_ymfpci_free(struct snd_ymfpci *chip) |
1da177e4 LT |
2216 | { |
2217 | u16 ctrl; | |
2218 | ||
2219 | snd_assert(chip != NULL, return -EINVAL); | |
2220 | ||
2221 | if (chip->res_reg_area) { /* don't touch busy hardware */ | |
2222 | snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); | |
2223 | snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); | |
2224 | snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); | |
2225 | snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); | |
2226 | snd_ymfpci_disable_dsp(chip); | |
2227 | snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); | |
2228 | snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); | |
2229 | snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); | |
2230 | snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); | |
2231 | snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); | |
2232 | ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); | |
2233 | snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); | |
2234 | } | |
2235 | ||
2236 | snd_ymfpci_ac3_done(chip); | |
2237 | ||
2238 | /* Set PCI device to D3 state */ | |
2239 | #if 0 | |
2240 | /* FIXME: temporarily disabled, otherwise we cannot fire up | |
2241 | * the chip again unless reboot. ACPI bug? | |
2242 | */ | |
2243 | pci_set_power_state(chip->pci, 3); | |
2244 | #endif | |
2245 | ||
2246 | #ifdef CONFIG_PM | |
2247 | vfree(chip->saved_regs); | |
2248 | #endif | |
b1d5776d TI |
2249 | release_and_free_resource(chip->mpu_res); |
2250 | release_and_free_resource(chip->fm_res); | |
1da177e4 LT |
2251 | snd_ymfpci_free_gameport(chip); |
2252 | if (chip->reg_area_virt) | |
2253 | iounmap(chip->reg_area_virt); | |
2254 | if (chip->work_ptr.area) | |
2255 | snd_dma_free_pages(&chip->work_ptr); | |
2256 | ||
2257 | if (chip->irq >= 0) | |
437a5a46 | 2258 | free_irq(chip->irq, chip); |
b1d5776d | 2259 | release_and_free_resource(chip->res_reg_area); |
1da177e4 LT |
2260 | |
2261 | pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); | |
2262 | ||
2263 | pci_disable_device(chip->pci); | |
b7dd2b34 TI |
2264 | #ifndef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL |
2265 | release_firmware(chip->dsp_microcode); | |
2266 | release_firmware(chip->controller_microcode); | |
102fa906 | 2267 | #endif |
1da177e4 LT |
2268 | kfree(chip); |
2269 | return 0; | |
2270 | } | |
2271 | ||
208a1b4c | 2272 | static int snd_ymfpci_dev_free(struct snd_device *device) |
1da177e4 | 2273 | { |
208a1b4c | 2274 | struct snd_ymfpci *chip = device->device_data; |
1da177e4 LT |
2275 | return snd_ymfpci_free(chip); |
2276 | } | |
2277 | ||
2278 | #ifdef CONFIG_PM | |
2279 | static int saved_regs_index[] = { | |
2280 | /* spdif */ | |
2281 | YDSXGR_SPDIFOUTCTRL, | |
2282 | YDSXGR_SPDIFOUTSTATUS, | |
2283 | YDSXGR_SPDIFINCTRL, | |
2284 | /* volumes */ | |
2285 | YDSXGR_PRIADCLOOPVOL, | |
2286 | YDSXGR_NATIVEDACINVOL, | |
2287 | YDSXGR_NATIVEDACOUTVOL, | |
9ed1261e | 2288 | YDSXGR_BUF441OUTVOL, |
1da177e4 LT |
2289 | YDSXGR_NATIVEADCINVOL, |
2290 | YDSXGR_SPDIFLOOPVOL, | |
2291 | YDSXGR_SPDIFOUTVOL, | |
2292 | YDSXGR_ZVOUTVOL, | |
2293 | YDSXGR_LEGACYOUTVOL, | |
2294 | /* address bases */ | |
2295 | YDSXGR_PLAYCTRLBASE, | |
2296 | YDSXGR_RECCTRLBASE, | |
2297 | YDSXGR_EFFCTRLBASE, | |
2298 | YDSXGR_WORKBASE, | |
2299 | /* capture set up */ | |
2300 | YDSXGR_MAPOFREC, | |
2301 | YDSXGR_RECFORMAT, | |
2302 | YDSXGR_RECSLOTSR, | |
2303 | YDSXGR_ADCFORMAT, | |
2304 | YDSXGR_ADCSLOTSR, | |
2305 | }; | |
2306 | #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) | |
2307 | ||
ded46235 | 2308 | int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state) |
1da177e4 | 2309 | { |
ded46235 TI |
2310 | struct snd_card *card = pci_get_drvdata(pci); |
2311 | struct snd_ymfpci *chip = card->private_data; | |
1da177e4 LT |
2312 | unsigned int i; |
2313 | ||
ded46235 | 2314 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 LT |
2315 | snd_pcm_suspend_all(chip->pcm); |
2316 | snd_pcm_suspend_all(chip->pcm2); | |
2317 | snd_pcm_suspend_all(chip->pcm_spdif); | |
2318 | snd_pcm_suspend_all(chip->pcm_4ch); | |
2319 | snd_ac97_suspend(chip->ac97); | |
2320 | for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) | |
2321 | chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); | |
2322 | chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); | |
2323 | snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); | |
2324 | snd_ymfpci_disable_dsp(chip); | |
ded46235 TI |
2325 | pci_disable_device(pci); |
2326 | pci_save_state(pci); | |
30b35399 | 2327 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
1da177e4 LT |
2328 | return 0; |
2329 | } | |
2330 | ||
ded46235 | 2331 | int snd_ymfpci_resume(struct pci_dev *pci) |
1da177e4 | 2332 | { |
ded46235 TI |
2333 | struct snd_card *card = pci_get_drvdata(pci); |
2334 | struct snd_ymfpci *chip = card->private_data; | |
1da177e4 LT |
2335 | unsigned int i; |
2336 | ||
30b35399 | 2337 | pci_set_power_state(pci, PCI_D0); |
ded46235 | 2338 | pci_restore_state(pci); |
30b35399 TI |
2339 | if (pci_enable_device(pci) < 0) { |
2340 | printk(KERN_ERR "ymfpci: pci_enable_device failed, " | |
2341 | "disabling device\n"); | |
2342 | snd_card_disconnect(card); | |
2343 | return -EIO; | |
2344 | } | |
ded46235 TI |
2345 | pci_set_master(pci); |
2346 | snd_ymfpci_aclink_reset(pci); | |
1da177e4 LT |
2347 | snd_ymfpci_codec_ready(chip, 0); |
2348 | snd_ymfpci_download_image(chip); | |
2349 | udelay(100); | |
2350 | ||
2351 | for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) | |
2352 | snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); | |
2353 | ||
2354 | snd_ac97_resume(chip->ac97); | |
2355 | ||
2356 | /* start hw again */ | |
2357 | if (chip->start_count > 0) { | |
2358 | spin_lock_irq(&chip->reg_lock); | |
2359 | snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); | |
2360 | chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); | |
2361 | spin_unlock_irq(&chip->reg_lock); | |
2362 | } | |
ded46235 | 2363 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
2364 | return 0; |
2365 | } | |
2366 | #endif /* CONFIG_PM */ | |
2367 | ||
208a1b4c | 2368 | int __devinit snd_ymfpci_create(struct snd_card *card, |
1da177e4 LT |
2369 | struct pci_dev * pci, |
2370 | unsigned short old_legacy_ctrl, | |
208a1b4c | 2371 | struct snd_ymfpci ** rchip) |
1da177e4 | 2372 | { |
208a1b4c | 2373 | struct snd_ymfpci *chip; |
1da177e4 | 2374 | int err; |
208a1b4c | 2375 | static struct snd_device_ops ops = { |
1da177e4 LT |
2376 | .dev_free = snd_ymfpci_dev_free, |
2377 | }; | |
2378 | ||
2379 | *rchip = NULL; | |
2380 | ||
2381 | /* enable PCI device */ | |
2382 | if ((err = pci_enable_device(pci)) < 0) | |
2383 | return err; | |
2384 | ||
e560d8d8 | 2385 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
2386 | if (chip == NULL) { |
2387 | pci_disable_device(pci); | |
2388 | return -ENOMEM; | |
2389 | } | |
2390 | chip->old_legacy_ctrl = old_legacy_ctrl; | |
2391 | spin_lock_init(&chip->reg_lock); | |
2392 | spin_lock_init(&chip->voice_lock); | |
2393 | init_waitqueue_head(&chip->interrupt_sleep); | |
2394 | atomic_set(&chip->interrupt_sleep_count, 0); | |
2395 | chip->card = card; | |
2396 | chip->pci = pci; | |
2397 | chip->irq = -1; | |
2398 | chip->device_id = pci->device; | |
44c10138 | 2399 | chip->rev = pci->revision; |
1da177e4 LT |
2400 | chip->reg_area_phys = pci_resource_start(pci, 0); |
2401 | chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); | |
2402 | pci_set_master(pci); | |
9ed1261e | 2403 | chip->src441_used = -1; |
1da177e4 LT |
2404 | |
2405 | if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { | |
99b359ba | 2406 | snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); |
1da177e4 LT |
2407 | snd_ymfpci_free(chip); |
2408 | return -EBUSY; | |
2409 | } | |
437a5a46 TI |
2410 | if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, |
2411 | "YMFPCI", chip)) { | |
99b359ba | 2412 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
2413 | snd_ymfpci_free(chip); |
2414 | return -EBUSY; | |
2415 | } | |
2416 | chip->irq = pci->irq; | |
2417 | ||
2418 | snd_ymfpci_aclink_reset(pci); | |
2419 | if (snd_ymfpci_codec_ready(chip, 0) < 0) { | |
2420 | snd_ymfpci_free(chip); | |
2421 | return -EIO; | |
2422 | } | |
2423 | ||
102fa906 CL |
2424 | err = snd_ymfpci_request_firmware(chip); |
2425 | if (err < 0) { | |
2426 | snd_printk(KERN_ERR "firmware request failed: %d\n", err); | |
2427 | snd_ymfpci_free(chip); | |
2428 | return err; | |
2429 | } | |
1da177e4 LT |
2430 | snd_ymfpci_download_image(chip); |
2431 | ||
2432 | udelay(100); /* seems we need a delay after downloading image.. */ | |
2433 | ||
2434 | if (snd_ymfpci_memalloc(chip) < 0) { | |
2435 | snd_ymfpci_free(chip); | |
2436 | return -EIO; | |
2437 | } | |
2438 | ||
2439 | if ((err = snd_ymfpci_ac3_init(chip)) < 0) { | |
2440 | snd_ymfpci_free(chip); | |
2441 | return err; | |
2442 | } | |
2443 | ||
2444 | #ifdef CONFIG_PM | |
2445 | chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32)); | |
2446 | if (chip->saved_regs == NULL) { | |
2447 | snd_ymfpci_free(chip); | |
2448 | return -ENOMEM; | |
2449 | } | |
1da177e4 LT |
2450 | #endif |
2451 | ||
2452 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
2453 | snd_ymfpci_free(chip); | |
2454 | return err; | |
2455 | } | |
2456 | ||
2457 | snd_ymfpci_proc_init(card, chip); | |
2458 | ||
2459 | snd_card_set_dev(card, &pci->dev); | |
2460 | ||
2461 | *rchip = chip; | |
2462 | return 0; | |
2463 | } |