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ff9abf5b | 1 | /* |
9f0ac6e1 | 2 | * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC |
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3 | * |
4 | * Author: Frank Mandarino <fmandarino@endrelia.com> | |
5 | * Endrelia Technologies Inc. | |
6 | * Created: Mar 3, 2006 | |
7 | * | |
8 | * Based on pxa2xx-pcm.h by: | |
9 | * | |
10 | * Author: Nicolas Pitre | |
11 | * Created: Nov 30, 2004 | |
12 | * Copyright: MontaVista Software, Inc. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | */ | |
18 | ||
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19 | #ifndef _AT91_PCM_H |
20 | #define _AT91_PCM_H | |
21 | ||
a09e64fb | 22 | #include <mach/hardware.h> |
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23 | |
24 | struct at91_ssc_periph { | |
25 | void __iomem *base; | |
26 | u32 pid; | |
27 | }; | |
28 | ||
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29 | /* |
30 | * Registers and status bits that are required by the PCM driver. | |
31 | */ | |
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32 | struct at91_pdc_regs { |
33 | unsigned int xpr; /* PDC recv/trans pointer */ | |
34 | unsigned int xcr; /* PDC recv/trans counter */ | |
35 | unsigned int xnpr; /* PDC next recv/trans pointer */ | |
36 | unsigned int xncr; /* PDC next recv/trans counter */ | |
37 | unsigned int ptcr; /* PDC transfer control */ | |
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38 | }; |
39 | ||
9f0ac6e1 | 40 | struct at91_ssc_mask { |
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41 | u32 ssc_enable; /* SSC recv/trans enable */ |
42 | u32 ssc_disable; /* SSC recv/trans disable */ | |
43 | u32 ssc_endx; /* SSC ENDTX or ENDRX */ | |
44 | u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */ | |
45 | u32 pdc_enable; /* PDC recv/trans enable */ | |
46 | u32 pdc_disable; /* PDC recv/trans disable */ | |
47 | }; | |
48 | ||
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49 | /* |
50 | * This structure, shared between the PCM driver and the interface, | |
51 | * contains all information required by the PCM driver to perform the | |
52 | * PDC DMA operation. All fields except dma_intr_handler() are initialized | |
53 | * by the interface. The dms_intr_handler() pointer is set by the PCM | |
54 | * driver and called by the interface SSC interrupt handler if it is | |
55 | * non-NULL. | |
56 | */ | |
9f0ac6e1 | 57 | struct at91_pcm_dma_params { |
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58 | char *name; /* stream identifier */ |
59 | int pdc_xfer_size; /* PDC counter increment in bytes */ | |
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60 | void __iomem *ssc_base; /* SSC base address */ |
61 | struct at91_pdc_regs *pdc; /* PDC receive or transmit registers */ | |
62 | struct at91_ssc_mask *mask;/* SSC & PDC status bits */ | |
63 | struct snd_pcm_substream *substream; | |
64 | void (*dma_intr_handler)(u32, struct snd_pcm_substream *); | |
65 | }; | |
ff9abf5b | 66 | |
9f0ac6e1 | 67 | extern struct snd_soc_platform at91_soc_platform; |
ff9abf5b | 68 | |
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69 | #define at91_ssc_read(a) ((unsigned long) __raw_readl(a)) |
70 | #define at91_ssc_write(a,v) __raw_writel((v),(a)) | |
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71 | |
72 | #endif /* _AT91_PCM_H */ |