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912c2ac9 CC |
1 | /* |
2 | * File: sound/soc/blackfin/bf5xx-i2s.c | |
3 | * Author: Cliff Cai <Cliff.Cai@analog.com> | |
4 | * | |
5 | * Created: Tue June 06 2008 | |
6 | * Description: Blackfin I2S CPU DAI driver | |
7 | * | |
8 | * Modified: | |
9 | * Copyright 2008 Analog Devices Inc. | |
10 | * | |
11 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, see the file COPYING, or write | |
25 | * to the Free Software Foundation, Inc., | |
26 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
27 | */ | |
28 | ||
29 | #include <linux/init.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/device.h> | |
32 | #include <linux/delay.h> | |
33 | #include <sound/core.h> | |
34 | #include <sound/pcm.h> | |
35 | #include <sound/pcm_params.h> | |
36 | #include <sound/initval.h> | |
37 | #include <sound/soc.h> | |
38 | ||
39 | #include <asm/irq.h> | |
40 | #include <asm/portmux.h> | |
41 | #include <linux/mutex.h> | |
42 | #include <linux/gpio.h> | |
43 | ||
44 | #include "bf5xx-sport.h" | |
912c2ac9 CC |
45 | |
46 | struct bf5xx_i2s_port { | |
47 | u16 tcr1; | |
48 | u16 rcr1; | |
49 | u16 tcr2; | |
50 | u16 rcr2; | |
895c9c05 | 51 | int configured; |
912c2ac9 CC |
52 | }; |
53 | ||
54 | static struct bf5xx_i2s_port bf5xx_i2s; | |
55 | static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM; | |
56 | ||
57 | static struct sport_param sport_params[2] = { | |
58 | { | |
59 | .dma_rx_chan = CH_SPORT0_RX, | |
60 | .dma_tx_chan = CH_SPORT0_TX, | |
61 | .err_irq = IRQ_SPORT0_ERROR, | |
62 | .regs = (struct sport_register *)SPORT0_TCR1, | |
63 | }, | |
64 | { | |
65 | .dma_rx_chan = CH_SPORT1_RX, | |
66 | .dma_tx_chan = CH_SPORT1_TX, | |
67 | .err_irq = IRQ_SPORT1_ERROR, | |
68 | .regs = (struct sport_register *)SPORT1_TCR1, | |
69 | } | |
70 | }; | |
71 | ||
c3e5203b CC |
72 | /* |
73 | * Setting the TFS pin selector for SPORT 0 based on whether the selected | |
74 | * port id F or G. If the port is F then no conflict should exist for the | |
75 | * TFS. When Port G is selected and EMAC then there is a conflict between | |
76 | * the PHY interrupt line and TFS. Current settings prevent the conflict | |
77 | * by ignoring the TFS pin when Port G is selected. This allows both | |
df0fd5e5 | 78 | * codecs and EMAC using Port G concurrently. |
c3e5203b | 79 | */ |
df0fd5e5 | 80 | #ifdef CONFIG_BF527_SPORT0_PORTG |
c3e5203b | 81 | #define LOCAL_SPORT0_TFS (0) |
df0fd5e5 CC |
82 | #else |
83 | #define LOCAL_SPORT0_TFS (P_SPORT0_TFS) | |
c3e5203b CC |
84 | #endif |
85 | ||
86 | static u16 sport_req[][7] = { {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, | |
87 | P_SPORT0_DRPRI, P_SPORT0_RSCLK, LOCAL_SPORT0_TFS, 0}, | |
88 | {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, P_SPORT1_DRPRI, | |
89 | P_SPORT1_RSCLK, P_SPORT1_TFS, 0} }; | |
33392680 | 90 | |
912c2ac9 CC |
91 | static int bf5xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
92 | unsigned int fmt) | |
93 | { | |
94 | int ret = 0; | |
95 | ||
96 | /* interface format:support I2S,slave mode */ | |
97 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
98 | case SND_SOC_DAIFMT_I2S: | |
33392680 CC |
99 | bf5xx_i2s.tcr1 |= TFSR | TCKFE; |
100 | bf5xx_i2s.rcr1 |= RFSR | RCKFE; | |
101 | bf5xx_i2s.tcr2 |= TSFSE; | |
102 | bf5xx_i2s.rcr2 |= RSFSE; | |
103 | break; | |
104 | case SND_SOC_DAIFMT_DSP_A: | |
105 | bf5xx_i2s.tcr1 |= TFSR; | |
106 | bf5xx_i2s.rcr1 |= RFSR; | |
912c2ac9 CC |
107 | break; |
108 | case SND_SOC_DAIFMT_LEFT_J: | |
109 | ret = -EINVAL; | |
110 | break; | |
111 | default: | |
c3e5203b | 112 | printk(KERN_ERR "%s: Unknown DAI format type\n", __func__); |
912c2ac9 CC |
113 | ret = -EINVAL; |
114 | break; | |
115 | } | |
116 | ||
117 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
912c2ac9 CC |
118 | case SND_SOC_DAIFMT_CBM_CFM: |
119 | break; | |
c3e5203b CC |
120 | case SND_SOC_DAIFMT_CBS_CFS: |
121 | case SND_SOC_DAIFMT_CBM_CFS: | |
912c2ac9 CC |
122 | case SND_SOC_DAIFMT_CBS_CFM: |
123 | ret = -EINVAL; | |
124 | break; | |
125 | default: | |
c3e5203b | 126 | printk(KERN_ERR "%s: Unknown DAI master type\n", __func__); |
912c2ac9 CC |
127 | ret = -EINVAL; |
128 | break; | |
129 | } | |
130 | ||
131 | return ret; | |
132 | } | |
133 | ||
912c2ac9 | 134 | static int bf5xx_i2s_hw_params(struct snd_pcm_substream *substream, |
dee89c4d MB |
135 | struct snd_pcm_hw_params *params, |
136 | struct snd_soc_dai *dai) | |
912c2ac9 CC |
137 | { |
138 | int ret = 0; | |
139 | ||
140 | bf5xx_i2s.tcr2 &= ~0x1f; | |
141 | bf5xx_i2s.rcr2 &= ~0x1f; | |
142 | switch (params_format(params)) { | |
143 | case SNDRV_PCM_FORMAT_S16_LE: | |
144 | bf5xx_i2s.tcr2 |= 15; | |
145 | bf5xx_i2s.rcr2 |= 15; | |
33392680 | 146 | sport_handle->wdsize = 2; |
912c2ac9 CC |
147 | break; |
148 | case SNDRV_PCM_FORMAT_S24_LE: | |
149 | bf5xx_i2s.tcr2 |= 23; | |
150 | bf5xx_i2s.rcr2 |= 23; | |
33392680 | 151 | sport_handle->wdsize = 3; |
912c2ac9 CC |
152 | break; |
153 | case SNDRV_PCM_FORMAT_S32_LE: | |
154 | bf5xx_i2s.tcr2 |= 31; | |
155 | bf5xx_i2s.rcr2 |= 31; | |
33392680 | 156 | sport_handle->wdsize = 4; |
912c2ac9 CC |
157 | break; |
158 | } | |
159 | ||
895c9c05 | 160 | if (!bf5xx_i2s.configured) { |
912c2ac9 CC |
161 | /* |
162 | * TX and RX are not independent,they are enabled at the | |
163 | * same time, even if only one side is running. So, we | |
164 | * need to configure both of them at the time when the first | |
165 | * stream is opened. | |
166 | * | |
33392680 | 167 | * CPU DAI:slave mode. |
912c2ac9 | 168 | */ |
895c9c05 | 169 | bf5xx_i2s.configured = 1; |
33392680 CC |
170 | ret = sport_config_rx(sport_handle, bf5xx_i2s.rcr1, |
171 | bf5xx_i2s.rcr2, 0, 0); | |
912c2ac9 CC |
172 | if (ret) { |
173 | pr_err("SPORT is busy!\n"); | |
174 | return -EBUSY; | |
175 | } | |
176 | ||
33392680 CC |
177 | ret = sport_config_tx(sport_handle, bf5xx_i2s.tcr1, |
178 | bf5xx_i2s.tcr2, 0, 0); | |
912c2ac9 CC |
179 | if (ret) { |
180 | pr_err("SPORT is busy!\n"); | |
181 | return -EBUSY; | |
182 | } | |
183 | } | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
dee89c4d MB |
188 | static void bf5xx_i2s_shutdown(struct snd_pcm_substream *substream, |
189 | struct snd_soc_dai *dai) | |
912c2ac9 CC |
190 | { |
191 | pr_debug("%s enter\n", __func__); | |
895c9c05 | 192 | /* No active stream, SPORT is allowed to be configured again. */ |
766df6d9 | 193 | if (!dai->active) |
895c9c05 | 194 | bf5xx_i2s.configured = 0; |
912c2ac9 CC |
195 | } |
196 | ||
f0fba2ad | 197 | static int bf5xx_i2s_probe(struct snd_soc_dai *dai) |
912c2ac9 | 198 | { |
912c2ac9 CC |
199 | pr_debug("%s enter\n", __func__); |
200 | if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) { | |
201 | pr_err("Requesting Peripherals failed\n"); | |
202 | return -EFAULT; | |
203 | } | |
204 | ||
205 | /* request DMA for SPORT */ | |
206 | sport_handle = sport_init(&sport_params[sport_num], 4, \ | |
207 | 2 * sizeof(u32), NULL); | |
208 | if (!sport_handle) { | |
209 | peripheral_free_list(&sport_req[sport_num][0]); | |
210 | return -ENODEV; | |
211 | } | |
212 | ||
213 | return 0; | |
214 | } | |
215 | ||
f0fba2ad | 216 | static int bf5xx_i2s_remove(struct snd_soc_dai *dai) |
33392680 CC |
217 | { |
218 | pr_debug("%s enter\n", __func__); | |
219 | peripheral_free_list(&sport_req[sport_num][0]); | |
f0fba2ad | 220 | return 0; |
33392680 CC |
221 | } |
222 | ||
912c2ac9 | 223 | #ifdef CONFIG_PM |
dc7d7b83 | 224 | static int bf5xx_i2s_suspend(struct snd_soc_dai *dai) |
912c2ac9 | 225 | { |
912c2ac9 CC |
226 | |
227 | pr_debug("%s : sport %d\n", __func__, dai->id); | |
ad80efc4 | 228 | |
f0fba2ad | 229 | if (dai->capture_active) |
ad80efc4 | 230 | sport_rx_stop(sport_handle); |
f0fba2ad | 231 | if (dai->playback_active) |
ad80efc4 | 232 | sport_tx_stop(sport_handle); |
912c2ac9 CC |
233 | return 0; |
234 | } | |
235 | ||
92a6ad34 | 236 | static int bf5xx_i2s_resume(struct snd_soc_dai *dai) |
912c2ac9 CC |
237 | { |
238 | int ret; | |
912c2ac9 CC |
239 | |
240 | pr_debug("%s : sport %d\n", __func__, dai->id); | |
912c2ac9 | 241 | |
ad80efc4 CC |
242 | ret = sport_config_rx(sport_handle, bf5xx_i2s.rcr1, |
243 | bf5xx_i2s.rcr2, 0, 0); | |
912c2ac9 CC |
244 | if (ret) { |
245 | pr_err("SPORT is busy!\n"); | |
246 | return -EBUSY; | |
247 | } | |
248 | ||
ad80efc4 CC |
249 | ret = sport_config_tx(sport_handle, bf5xx_i2s.tcr1, |
250 | bf5xx_i2s.tcr2, 0, 0); | |
912c2ac9 CC |
251 | if (ret) { |
252 | pr_err("SPORT is busy!\n"); | |
253 | return -EBUSY; | |
254 | } | |
255 | ||
912c2ac9 CC |
256 | return 0; |
257 | } | |
258 | ||
259 | #else | |
260 | #define bf5xx_i2s_suspend NULL | |
261 | #define bf5xx_i2s_resume NULL | |
262 | #endif | |
263 | ||
264 | #define BF5XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ | |
265 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ | |
266 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ | |
267 | SNDRV_PCM_RATE_96000) | |
268 | ||
269 | #define BF5XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |\ | |
270 | SNDRV_PCM_FMTBIT_S32_LE) | |
271 | ||
6335d055 | 272 | static struct snd_soc_dai_ops bf5xx_i2s_dai_ops = { |
6335d055 EM |
273 | .shutdown = bf5xx_i2s_shutdown, |
274 | .hw_params = bf5xx_i2s_hw_params, | |
275 | .set_fmt = bf5xx_i2s_set_dai_fmt, | |
276 | }; | |
277 | ||
f0fba2ad | 278 | static struct snd_soc_dai_driver bf5xx_i2s_dai = { |
912c2ac9 | 279 | .probe = bf5xx_i2s_probe, |
33392680 | 280 | .remove = bf5xx_i2s_remove, |
912c2ac9 CC |
281 | .suspend = bf5xx_i2s_suspend, |
282 | .resume = bf5xx_i2s_resume, | |
283 | .playback = { | |
33392680 | 284 | .channels_min = 1, |
912c2ac9 CC |
285 | .channels_max = 2, |
286 | .rates = BF5XX_I2S_RATES, | |
287 | .formats = BF5XX_I2S_FORMATS,}, | |
288 | .capture = { | |
33392680 | 289 | .channels_min = 1, |
912c2ac9 CC |
290 | .channels_max = 2, |
291 | .rates = BF5XX_I2S_RATES, | |
292 | .formats = BF5XX_I2S_FORMATS,}, | |
6335d055 | 293 | .ops = &bf5xx_i2s_dai_ops, |
912c2ac9 | 294 | }; |
f0fba2ad LG |
295 | |
296 | static int bfin_i2s_drv_probe(struct platform_device *pdev) | |
297 | { | |
298 | return snd_soc_register_dai(&pdev->dev, &bf5xx_i2s_dai); | |
299 | } | |
300 | ||
301 | static int __devexit bfin_i2s_drv_remove(struct platform_device *pdev) | |
302 | { | |
303 | snd_soc_unregister_dai(&pdev->dev); | |
304 | return 0; | |
305 | } | |
306 | ||
307 | static struct platform_driver bfin_i2s_driver = { | |
308 | .probe = bfin_i2s_drv_probe, | |
309 | .remove = __devexit_p(bfin_i2s_drv_remove), | |
310 | ||
311 | .driver = { | |
312 | .name = "bf5xx-i2s", | |
313 | .owner = THIS_MODULE, | |
314 | }, | |
315 | }; | |
912c2ac9 | 316 | |
c9b3a40f | 317 | static int __init bfin_i2s_init(void) |
3f4b783c | 318 | { |
f0fba2ad | 319 | return platform_driver_register(&bfin_i2s_driver); |
3f4b783c | 320 | } |
3f4b783c MB |
321 | |
322 | static void __exit bfin_i2s_exit(void) | |
323 | { | |
f0fba2ad | 324 | platform_driver_unregister(&bfin_i2s_driver); |
3f4b783c | 325 | } |
f0fba2ad LG |
326 | |
327 | module_init(bfin_i2s_init); | |
3f4b783c MB |
328 | module_exit(bfin_i2s_exit); |
329 | ||
912c2ac9 CC |
330 | /* Module information */ |
331 | MODULE_AUTHOR("Cliff Cai"); | |
332 | MODULE_DESCRIPTION("I2S driver for ADI Blackfin"); | |
333 | MODULE_LICENSE("GPL"); | |
334 |