Commit | Line | Data |
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a1533d94 BS |
1 | /* |
2 | * AD193X Audio Codec driver supporting AD1936/7/8/9 | |
3 | * | |
4 | * Copyright 2010 Analog Devices Inc. | |
5 | * | |
6 | * Licensed under the GPL-2 or later. | |
7 | */ | |
8 | ||
9 | #include <linux/init.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/spi/spi.h> | |
1b132ea0 | 15 | #include <linux/slab.h> |
a1533d94 BS |
16 | #include <sound/core.h> |
17 | #include <sound/pcm.h> | |
18 | #include <sound/pcm_params.h> | |
19 | #include <sound/initval.h> | |
20 | #include <sound/soc.h> | |
21 | #include <sound/tlv.h> | |
a1533d94 BS |
22 | #include "ad193x.h" |
23 | ||
24 | /* codec private data */ | |
25 | struct ad193x_priv { | |
30ab1e78 | 26 | struct regmap *regmap; |
f0fba2ad | 27 | int sysclk; |
a1533d94 BS |
28 | }; |
29 | ||
a1533d94 BS |
30 | /* |
31 | * AD193X volume/mute/de-emphasis etc. controls | |
32 | */ | |
33 | static const char *ad193x_deemp[] = {"None", "48kHz", "44.1kHz", "32kHz"}; | |
34 | ||
35 | static const struct soc_enum ad193x_deemp_enum = | |
36 | SOC_ENUM_SINGLE(AD193X_DAC_CTRL2, 1, 4, ad193x_deemp); | |
37 | ||
38 | static const struct snd_kcontrol_new ad193x_snd_controls[] = { | |
39 | /* DAC volume control */ | |
ba0a24e7 | 40 | SOC_DOUBLE_R("DAC1 Volume", AD193X_DAC_L1_VOL, |
a1533d94 | 41 | AD193X_DAC_R1_VOL, 0, 0xFF, 1), |
ba0a24e7 | 42 | SOC_DOUBLE_R("DAC2 Volume", AD193X_DAC_L2_VOL, |
a1533d94 | 43 | AD193X_DAC_R2_VOL, 0, 0xFF, 1), |
ba0a24e7 | 44 | SOC_DOUBLE_R("DAC3 Volume", AD193X_DAC_L3_VOL, |
a1533d94 | 45 | AD193X_DAC_R3_VOL, 0, 0xFF, 1), |
ba0a24e7 | 46 | SOC_DOUBLE_R("DAC4 Volume", AD193X_DAC_L4_VOL, |
a1533d94 BS |
47 | AD193X_DAC_R4_VOL, 0, 0xFF, 1), |
48 | ||
49 | /* ADC switch control */ | |
50 | SOC_DOUBLE("ADC1 Switch", AD193X_ADC_CTRL0, AD193X_ADCL1_MUTE, | |
51 | AD193X_ADCR1_MUTE, 1, 1), | |
52 | SOC_DOUBLE("ADC2 Switch", AD193X_ADC_CTRL0, AD193X_ADCL2_MUTE, | |
53 | AD193X_ADCR2_MUTE, 1, 1), | |
54 | ||
55 | /* DAC switch control */ | |
56 | SOC_DOUBLE("DAC1 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL1_MUTE, | |
57 | AD193X_DACR1_MUTE, 1, 1), | |
58 | SOC_DOUBLE("DAC2 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL2_MUTE, | |
59 | AD193X_DACR2_MUTE, 1, 1), | |
60 | SOC_DOUBLE("DAC3 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL3_MUTE, | |
61 | AD193X_DACR3_MUTE, 1, 1), | |
62 | SOC_DOUBLE("DAC4 Switch", AD193X_DAC_CHNL_MUTE, AD193X_DACL4_MUTE, | |
63 | AD193X_DACR4_MUTE, 1, 1), | |
64 | ||
65 | /* ADC high-pass filter */ | |
66 | SOC_SINGLE("ADC High Pass Filter Switch", AD193X_ADC_CTRL0, | |
67 | AD193X_ADC_HIGHPASS_FILTER, 1, 0), | |
68 | ||
69 | /* DAC de-emphasis */ | |
70 | SOC_ENUM("Playback Deemphasis", ad193x_deemp_enum), | |
71 | }; | |
72 | ||
73 | static const struct snd_soc_dapm_widget ad193x_dapm_widgets[] = { | |
74 | SND_SOC_DAPM_DAC("DAC", "Playback", AD193X_DAC_CTRL0, 0, 1), | |
75 | SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0), | |
76 | SND_SOC_DAPM_SUPPLY("PLL_PWR", AD193X_PLL_CLK_CTRL0, 0, 1, NULL, 0), | |
77 | SND_SOC_DAPM_SUPPLY("ADC_PWR", AD193X_ADC_CTRL0, 0, 1, NULL, 0), | |
78 | SND_SOC_DAPM_OUTPUT("DAC1OUT"), | |
79 | SND_SOC_DAPM_OUTPUT("DAC2OUT"), | |
80 | SND_SOC_DAPM_OUTPUT("DAC3OUT"), | |
81 | SND_SOC_DAPM_OUTPUT("DAC4OUT"), | |
82 | SND_SOC_DAPM_INPUT("ADC1IN"), | |
83 | SND_SOC_DAPM_INPUT("ADC2IN"), | |
84 | }; | |
85 | ||
86 | static const struct snd_soc_dapm_route audio_paths[] = { | |
87 | { "DAC", NULL, "PLL_PWR" }, | |
88 | { "ADC", NULL, "PLL_PWR" }, | |
89 | { "DAC", NULL, "ADC_PWR" }, | |
90 | { "ADC", NULL, "ADC_PWR" }, | |
91 | { "DAC1OUT", "DAC1 Switch", "DAC" }, | |
92 | { "DAC2OUT", "DAC2 Switch", "DAC" }, | |
93 | { "DAC3OUT", "DAC3 Switch", "DAC" }, | |
94 | { "DAC4OUT", "DAC4 Switch", "DAC" }, | |
95 | { "ADC", "ADC1 Switch", "ADC1IN" }, | |
96 | { "ADC", "ADC2 Switch", "ADC2IN" }, | |
97 | }; | |
98 | ||
99 | /* | |
100 | * DAI ops entries | |
101 | */ | |
102 | ||
103 | static int ad193x_mute(struct snd_soc_dai *dai, int mute) | |
104 | { | |
105 | struct snd_soc_codec *codec = dai->codec; | |
106 | int reg; | |
107 | ||
108 | reg = snd_soc_read(codec, AD193X_DAC_CTRL2); | |
109 | reg = (mute > 0) ? reg | AD193X_DAC_MASTER_MUTE : reg & | |
110 | (~AD193X_DAC_MASTER_MUTE); | |
111 | snd_soc_write(codec, AD193X_DAC_CTRL2, reg); | |
112 | ||
113 | return 0; | |
114 | } | |
115 | ||
116 | static int ad193x_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, | |
117 | unsigned int rx_mask, int slots, int width) | |
118 | { | |
119 | struct snd_soc_codec *codec = dai->codec; | |
120 | int dac_reg = snd_soc_read(codec, AD193X_DAC_CTRL1); | |
121 | int adc_reg = snd_soc_read(codec, AD193X_ADC_CTRL2); | |
122 | ||
123 | dac_reg &= ~AD193X_DAC_CHAN_MASK; | |
124 | adc_reg &= ~AD193X_ADC_CHAN_MASK; | |
125 | ||
126 | switch (slots) { | |
127 | case 2: | |
128 | dac_reg |= AD193X_DAC_2_CHANNELS << AD193X_DAC_CHAN_SHFT; | |
129 | adc_reg |= AD193X_ADC_2_CHANNELS << AD193X_ADC_CHAN_SHFT; | |
130 | break; | |
131 | case 4: | |
132 | dac_reg |= AD193X_DAC_4_CHANNELS << AD193X_DAC_CHAN_SHFT; | |
133 | adc_reg |= AD193X_ADC_4_CHANNELS << AD193X_ADC_CHAN_SHFT; | |
134 | break; | |
135 | case 8: | |
136 | dac_reg |= AD193X_DAC_8_CHANNELS << AD193X_DAC_CHAN_SHFT; | |
137 | adc_reg |= AD193X_ADC_8_CHANNELS << AD193X_ADC_CHAN_SHFT; | |
138 | break; | |
139 | case 16: | |
140 | dac_reg |= AD193X_DAC_16_CHANNELS << AD193X_DAC_CHAN_SHFT; | |
141 | adc_reg |= AD193X_ADC_16_CHANNELS << AD193X_ADC_CHAN_SHFT; | |
142 | break; | |
143 | default: | |
144 | return -EINVAL; | |
145 | } | |
146 | ||
147 | snd_soc_write(codec, AD193X_DAC_CTRL1, dac_reg); | |
148 | snd_soc_write(codec, AD193X_ADC_CTRL2, adc_reg); | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
154 | unsigned int fmt) | |
155 | { | |
156 | struct snd_soc_codec *codec = codec_dai->codec; | |
d6bdc0f7 | 157 | int adc_reg1, adc_reg2, dac_reg; |
a1533d94 | 158 | |
d6bdc0f7 BS |
159 | adc_reg1 = snd_soc_read(codec, AD193X_ADC_CTRL1); |
160 | adc_reg2 = snd_soc_read(codec, AD193X_ADC_CTRL2); | |
a1533d94 BS |
161 | dac_reg = snd_soc_read(codec, AD193X_DAC_CTRL1); |
162 | ||
163 | /* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S | |
164 | * with TDM) and ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A) | |
165 | */ | |
166 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
167 | case SND_SOC_DAIFMT_I2S: | |
d6bdc0f7 BS |
168 | adc_reg1 &= ~AD193X_ADC_SERFMT_MASK; |
169 | adc_reg1 |= AD193X_ADC_SERFMT_TDM; | |
a1533d94 BS |
170 | break; |
171 | case SND_SOC_DAIFMT_DSP_A: | |
d6bdc0f7 BS |
172 | adc_reg1 &= ~AD193X_ADC_SERFMT_MASK; |
173 | adc_reg1 |= AD193X_ADC_SERFMT_AUX; | |
a1533d94 BS |
174 | break; |
175 | default: | |
176 | return -EINVAL; | |
177 | } | |
178 | ||
179 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
180 | case SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */ | |
d6bdc0f7 BS |
181 | adc_reg2 &= ~AD193X_ADC_LEFT_HIGH; |
182 | adc_reg2 &= ~AD193X_ADC_BCLK_INV; | |
a1533d94 BS |
183 | dac_reg &= ~AD193X_DAC_LEFT_HIGH; |
184 | dac_reg &= ~AD193X_DAC_BCLK_INV; | |
185 | break; | |
186 | case SND_SOC_DAIFMT_NB_IF: /* normal bclk + invert frm */ | |
d6bdc0f7 BS |
187 | adc_reg2 |= AD193X_ADC_LEFT_HIGH; |
188 | adc_reg2 &= ~AD193X_ADC_BCLK_INV; | |
a1533d94 BS |
189 | dac_reg |= AD193X_DAC_LEFT_HIGH; |
190 | dac_reg &= ~AD193X_DAC_BCLK_INV; | |
191 | break; | |
192 | case SND_SOC_DAIFMT_IB_NF: /* invert bclk + normal frm */ | |
d6bdc0f7 BS |
193 | adc_reg2 &= ~AD193X_ADC_LEFT_HIGH; |
194 | adc_reg2 |= AD193X_ADC_BCLK_INV; | |
a1533d94 BS |
195 | dac_reg &= ~AD193X_DAC_LEFT_HIGH; |
196 | dac_reg |= AD193X_DAC_BCLK_INV; | |
197 | break; | |
198 | ||
199 | case SND_SOC_DAIFMT_IB_IF: /* invert bclk + frm */ | |
d6bdc0f7 BS |
200 | adc_reg2 |= AD193X_ADC_LEFT_HIGH; |
201 | adc_reg2 |= AD193X_ADC_BCLK_INV; | |
a1533d94 BS |
202 | dac_reg |= AD193X_DAC_LEFT_HIGH; |
203 | dac_reg |= AD193X_DAC_BCLK_INV; | |
204 | break; | |
205 | default: | |
206 | return -EINVAL; | |
207 | } | |
208 | ||
209 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
210 | case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */ | |
d6bdc0f7 BS |
211 | adc_reg2 |= AD193X_ADC_LCR_MASTER; |
212 | adc_reg2 |= AD193X_ADC_BCLK_MASTER; | |
a1533d94 BS |
213 | dac_reg |= AD193X_DAC_LCR_MASTER; |
214 | dac_reg |= AD193X_DAC_BCLK_MASTER; | |
215 | break; | |
216 | case SND_SOC_DAIFMT_CBS_CFM: /* codec clk slave & frm master */ | |
d6bdc0f7 BS |
217 | adc_reg2 |= AD193X_ADC_LCR_MASTER; |
218 | adc_reg2 &= ~AD193X_ADC_BCLK_MASTER; | |
a1533d94 BS |
219 | dac_reg |= AD193X_DAC_LCR_MASTER; |
220 | dac_reg &= ~AD193X_DAC_BCLK_MASTER; | |
221 | break; | |
222 | case SND_SOC_DAIFMT_CBM_CFS: /* codec clk master & frame slave */ | |
d6bdc0f7 BS |
223 | adc_reg2 &= ~AD193X_ADC_LCR_MASTER; |
224 | adc_reg2 |= AD193X_ADC_BCLK_MASTER; | |
a1533d94 BS |
225 | dac_reg &= ~AD193X_DAC_LCR_MASTER; |
226 | dac_reg |= AD193X_DAC_BCLK_MASTER; | |
227 | break; | |
228 | case SND_SOC_DAIFMT_CBS_CFS: /* codec clk & frm slave */ | |
d6bdc0f7 BS |
229 | adc_reg2 &= ~AD193X_ADC_LCR_MASTER; |
230 | adc_reg2 &= ~AD193X_ADC_BCLK_MASTER; | |
a1533d94 BS |
231 | dac_reg &= ~AD193X_DAC_LCR_MASTER; |
232 | dac_reg &= ~AD193X_DAC_BCLK_MASTER; | |
233 | break; | |
234 | default: | |
235 | return -EINVAL; | |
236 | } | |
237 | ||
d6bdc0f7 BS |
238 | snd_soc_write(codec, AD193X_ADC_CTRL1, adc_reg1); |
239 | snd_soc_write(codec, AD193X_ADC_CTRL2, adc_reg2); | |
a1533d94 BS |
240 | snd_soc_write(codec, AD193X_DAC_CTRL1, dac_reg); |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
fab90aa4 BS |
245 | static int ad193x_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
246 | int clk_id, unsigned int freq, int dir) | |
247 | { | |
248 | struct snd_soc_codec *codec = codec_dai->codec; | |
249 | struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec); | |
250 | switch (freq) { | |
251 | case 12288000: | |
252 | case 18432000: | |
253 | case 24576000: | |
254 | case 36864000: | |
255 | ad193x->sysclk = freq; | |
256 | return 0; | |
257 | } | |
258 | return -EINVAL; | |
259 | } | |
260 | ||
a1533d94 BS |
261 | static int ad193x_hw_params(struct snd_pcm_substream *substream, |
262 | struct snd_pcm_hw_params *params, | |
263 | struct snd_soc_dai *dai) | |
264 | { | |
fab90aa4 | 265 | int word_len = 0, reg = 0, master_rate = 0; |
a1533d94 BS |
266 | |
267 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 268 | struct snd_soc_codec *codec = rtd->codec; |
fab90aa4 | 269 | struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec); |
a1533d94 BS |
270 | |
271 | /* bit size */ | |
272 | switch (params_format(params)) { | |
273 | case SNDRV_PCM_FORMAT_S16_LE: | |
274 | word_len = 3; | |
275 | break; | |
276 | case SNDRV_PCM_FORMAT_S20_3LE: | |
277 | word_len = 1; | |
278 | break; | |
279 | case SNDRV_PCM_FORMAT_S24_LE: | |
280 | case SNDRV_PCM_FORMAT_S32_LE: | |
281 | word_len = 0; | |
282 | break; | |
283 | } | |
284 | ||
fab90aa4 BS |
285 | switch (ad193x->sysclk) { |
286 | case 12288000: | |
287 | master_rate = AD193X_PLL_INPUT_256; | |
288 | break; | |
289 | case 18432000: | |
290 | master_rate = AD193X_PLL_INPUT_384; | |
291 | break; | |
292 | case 24576000: | |
293 | master_rate = AD193X_PLL_INPUT_512; | |
294 | break; | |
295 | case 36864000: | |
296 | master_rate = AD193X_PLL_INPUT_768; | |
297 | break; | |
298 | } | |
299 | ||
300 | reg = snd_soc_read(codec, AD193X_PLL_CLK_CTRL0); | |
f3aa7219 | 301 | reg = (reg & (~AD193X_PLL_INPUT_MASK)) | master_rate; |
fab90aa4 BS |
302 | snd_soc_write(codec, AD193X_PLL_CLK_CTRL0, reg); |
303 | ||
a1533d94 | 304 | reg = snd_soc_read(codec, AD193X_DAC_CTRL2); |
95c93d85 SJ |
305 | reg = (reg & (~AD193X_DAC_WORD_LEN_MASK)) |
306 | | (word_len << AD193X_DAC_WORD_LEN_SHFT); | |
a1533d94 BS |
307 | snd_soc_write(codec, AD193X_DAC_CTRL2, reg); |
308 | ||
309 | reg = snd_soc_read(codec, AD193X_ADC_CTRL1); | |
310 | reg = (reg & (~AD193X_ADC_WORD_LEN_MASK)) | word_len; | |
311 | snd_soc_write(codec, AD193X_ADC_CTRL1, reg); | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
9dd7b79a BS |
316 | static struct snd_soc_dai_ops ad193x_dai_ops = { |
317 | .hw_params = ad193x_hw_params, | |
318 | .digital_mute = ad193x_mute, | |
319 | .set_tdm_slot = ad193x_set_tdm_slot, | |
fab90aa4 | 320 | .set_sysclk = ad193x_set_dai_sysclk, |
9dd7b79a BS |
321 | .set_fmt = ad193x_set_dai_fmt, |
322 | }; | |
323 | ||
324 | /* codec DAI instance */ | |
f0fba2ad LG |
325 | static struct snd_soc_dai_driver ad193x_dai = { |
326 | .name = "ad193x-hifi", | |
9dd7b79a BS |
327 | .playback = { |
328 | .stream_name = "Playback", | |
329 | .channels_min = 2, | |
330 | .channels_max = 8, | |
331 | .rates = SNDRV_PCM_RATE_48000, | |
332 | .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | | |
333 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, | |
334 | }, | |
335 | .capture = { | |
336 | .stream_name = "Capture", | |
337 | .channels_min = 2, | |
338 | .channels_max = 4, | |
339 | .rates = SNDRV_PCM_RATE_48000, | |
340 | .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | | |
341 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, | |
342 | }, | |
343 | .ops = &ad193x_dai_ops, | |
344 | }; | |
9dd7b79a | 345 | |
f0fba2ad | 346 | static int ad193x_probe(struct snd_soc_codec *codec) |
a1533d94 | 347 | { |
f0fba2ad | 348 | struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec); |
ce6120cc | 349 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
f0fba2ad | 350 | int ret; |
a1533d94 | 351 | |
30ab1e78 LPC |
352 | codec->control_data = ad193x->regmap; |
353 | ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); | |
f0fba2ad | 354 | if (ret < 0) { |
119bfef2 | 355 | dev_err(codec->dev, "failed to set cache I/O: %d\n", ret); |
f0fba2ad | 356 | return ret; |
a1533d94 BS |
357 | } |
358 | ||
f0fba2ad | 359 | /* default setting for ad193x */ |
a1533d94 | 360 | |
f0fba2ad LG |
361 | /* unmute dac channels */ |
362 | snd_soc_write(codec, AD193X_DAC_CHNL_MUTE, 0x0); | |
363 | /* de-emphasis: 48kHz, powedown dac */ | |
364 | snd_soc_write(codec, AD193X_DAC_CTRL2, 0x1A); | |
365 | /* powerdown dac, dac in tdm mode */ | |
366 | snd_soc_write(codec, AD193X_DAC_CTRL0, 0x41); | |
367 | /* high-pass filter enable */ | |
368 | snd_soc_write(codec, AD193X_ADC_CTRL0, 0x3); | |
369 | /* sata delay=1, adc aux mode */ | |
370 | snd_soc_write(codec, AD193X_ADC_CTRL1, 0x43); | |
371 | /* pll input: mclki/xi */ | |
372 | snd_soc_write(codec, AD193X_PLL_CLK_CTRL0, 0x99); /* mclk=24.576Mhz: 0x9D; mclk=12.288Mhz: 0x99 */ | |
373 | snd_soc_write(codec, AD193X_PLL_CLK_CTRL1, 0x04); | |
a1533d94 BS |
374 | |
375 | snd_soc_add_controls(codec, ad193x_snd_controls, | |
376 | ARRAY_SIZE(ad193x_snd_controls)); | |
ce6120cc | 377 | snd_soc_dapm_new_controls(dapm, ad193x_dapm_widgets, |
a1533d94 | 378 | ARRAY_SIZE(ad193x_dapm_widgets)); |
ce6120cc | 379 | snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths)); |
a1533d94 | 380 | |
a1533d94 BS |
381 | return ret; |
382 | } | |
383 | ||
f0fba2ad | 384 | static struct snd_soc_codec_driver soc_codec_dev_ad193x = { |
a1533d94 | 385 | .probe = ad193x_probe, |
a1533d94 | 386 | }; |
a1533d94 BS |
387 | |
388 | #if defined(CONFIG_SPI_MASTER) | |
30ab1e78 LPC |
389 | |
390 | static const struct regmap_config ad193x_spi_regmap_config = { | |
391 | .val_bits = 8, | |
392 | .reg_bits = 16, | |
393 | .read_flag_mask = 0x09, | |
394 | .write_flag_mask = 0x08, | |
395 | }; | |
396 | ||
a1533d94 BS |
397 | static int __devinit ad193x_spi_probe(struct spi_device *spi) |
398 | { | |
f0fba2ad LG |
399 | struct ad193x_priv *ad193x; |
400 | int ret; | |
401 | ||
402 | ad193x = kzalloc(sizeof(struct ad193x_priv), GFP_KERNEL); | |
403 | if (ad193x == NULL) | |
404 | return -ENOMEM; | |
405 | ||
30ab1e78 LPC |
406 | ad193x->regmap = regmap_init_spi(spi, &ad193x_spi_regmap_config); |
407 | if (IS_ERR(ad193x->regmap)) { | |
408 | ret = PTR_ERR(ad193x->regmap); | |
409 | goto err_free; | |
410 | } | |
411 | ||
f0fba2ad | 412 | spi_set_drvdata(spi, ad193x); |
f0fba2ad LG |
413 | |
414 | ret = snd_soc_register_codec(&spi->dev, | |
415 | &soc_codec_dev_ad193x, &ad193x_dai, 1); | |
416 | if (ret < 0) | |
30ab1e78 LPC |
417 | goto err_regmap_exit; |
418 | ||
419 | return 0; | |
420 | ||
421 | err_regmap_exit: | |
422 | regmap_exit(ad193x->regmap); | |
423 | err_free: | |
424 | kfree(ad193x); | |
425 | ||
f0fba2ad | 426 | return ret; |
a1533d94 BS |
427 | } |
428 | ||
429 | static int __devexit ad193x_spi_remove(struct spi_device *spi) | |
430 | { | |
30ab1e78 LPC |
431 | struct ad193x_priv *ad193x = spi_get_drvdata(spi); |
432 | ||
f0fba2ad | 433 | snd_soc_unregister_codec(&spi->dev); |
30ab1e78 LPC |
434 | regmap_exit(ad193x->regmap); |
435 | kfree(ad193x); | |
f0fba2ad | 436 | return 0; |
a1533d94 BS |
437 | } |
438 | ||
439 | static struct spi_driver ad193x_spi_driver = { | |
440 | .driver = { | |
e43a7d41 | 441 | .name = "ad193x", |
a1533d94 BS |
442 | .owner = THIS_MODULE, |
443 | }, | |
444 | .probe = ad193x_spi_probe, | |
445 | .remove = __devexit_p(ad193x_spi_remove), | |
446 | }; | |
447 | #endif | |
448 | ||
449 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
30ab1e78 LPC |
450 | |
451 | static const struct regmap_config ad193x_i2c_regmap_config = { | |
452 | .val_bits = 8, | |
453 | .reg_bits = 8, | |
454 | }; | |
455 | ||
a1533d94 BS |
456 | static const struct i2c_device_id ad193x_id[] = { |
457 | { "ad1936", 0 }, | |
458 | { "ad1937", 0 }, | |
459 | { } | |
460 | }; | |
461 | MODULE_DEVICE_TABLE(i2c, ad193x_id); | |
462 | ||
463 | static int __devinit ad193x_i2c_probe(struct i2c_client *client, | |
464 | const struct i2c_device_id *id) | |
465 | { | |
f0fba2ad LG |
466 | struct ad193x_priv *ad193x; |
467 | int ret; | |
468 | ||
469 | ad193x = kzalloc(sizeof(struct ad193x_priv), GFP_KERNEL); | |
470 | if (ad193x == NULL) | |
471 | return -ENOMEM; | |
472 | ||
30ab1e78 LPC |
473 | ad193x->regmap = regmap_init_i2c(client, &ad193x_i2c_regmap_config); |
474 | if (IS_ERR(ad193x->regmap)) { | |
475 | ret = PTR_ERR(ad193x->regmap); | |
476 | goto err_free; | |
477 | } | |
478 | ||
f0fba2ad | 479 | i2c_set_clientdata(client, ad193x); |
f0fba2ad LG |
480 | |
481 | ret = snd_soc_register_codec(&client->dev, | |
482 | &soc_codec_dev_ad193x, &ad193x_dai, 1); | |
483 | if (ret < 0) | |
30ab1e78 LPC |
484 | goto err_regmap_exit; |
485 | ||
486 | return 0; | |
487 | ||
488 | err_regmap_exit: | |
489 | regmap_exit(ad193x->regmap); | |
490 | err_free: | |
491 | kfree(ad193x); | |
f0fba2ad | 492 | return ret; |
a1533d94 BS |
493 | } |
494 | ||
495 | static int __devexit ad193x_i2c_remove(struct i2c_client *client) | |
496 | { | |
30ab1e78 LPC |
497 | struct ad193x_priv *ad193x = i2c_get_clientdata(client); |
498 | ||
f0fba2ad | 499 | snd_soc_unregister_codec(&client->dev); |
30ab1e78 LPC |
500 | regmap_exit(ad193x->regmap); |
501 | kfree(ad193x); | |
f0fba2ad | 502 | return 0; |
a1533d94 BS |
503 | } |
504 | ||
505 | static struct i2c_driver ad193x_i2c_driver = { | |
506 | .driver = { | |
e43a7d41 | 507 | .name = "ad193x", |
a1533d94 BS |
508 | }, |
509 | .probe = ad193x_i2c_probe, | |
510 | .remove = __devexit_p(ad193x_i2c_remove), | |
511 | .id_table = ad193x_id, | |
512 | }; | |
513 | #endif | |
514 | ||
515 | static int __init ad193x_modinit(void) | |
516 | { | |
517 | int ret; | |
518 | ||
519 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
520 | ret = i2c_add_driver(&ad193x_i2c_driver); | |
521 | if (ret != 0) { | |
522 | printk(KERN_ERR "Failed to register AD193X I2C driver: %d\n", | |
523 | ret); | |
524 | } | |
525 | #endif | |
526 | ||
527 | #if defined(CONFIG_SPI_MASTER) | |
528 | ret = spi_register_driver(&ad193x_spi_driver); | |
529 | if (ret != 0) { | |
530 | printk(KERN_ERR "Failed to register AD193X SPI driver: %d\n", | |
531 | ret); | |
532 | } | |
533 | #endif | |
534 | return ret; | |
535 | } | |
536 | module_init(ad193x_modinit); | |
537 | ||
538 | static void __exit ad193x_modexit(void) | |
539 | { | |
540 | #if defined(CONFIG_SPI_MASTER) | |
541 | spi_unregister_driver(&ad193x_spi_driver); | |
542 | #endif | |
543 | ||
544 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
545 | i2c_del_driver(&ad193x_i2c_driver); | |
546 | #endif | |
547 | } | |
548 | module_exit(ad193x_modexit); | |
549 | ||
550 | MODULE_DESCRIPTION("ASoC ad193x driver"); | |
551 | MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); | |
552 | MODULE_LICENSE("GPL"); |