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a381934e DM |
1 | /* |
2 | * AK4104 ALSA SoC (ASoC) driver | |
3 | * | |
4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <sound/core.h> | |
14 | #include <sound/soc.h> | |
15 | #include <sound/initval.h> | |
16 | #include <linux/spi/spi.h> | |
17 | #include <sound/asoundef.h> | |
18 | ||
19 | #include "ak4104.h" | |
20 | ||
21 | /* AK4104 registers addresses */ | |
22 | #define AK4104_REG_CONTROL1 0x00 | |
23 | #define AK4104_REG_RESERVED 0x01 | |
24 | #define AK4104_REG_CONTROL2 0x02 | |
25 | #define AK4104_REG_TX 0x03 | |
26 | #define AK4104_REG_CHN_STATUS(x) ((x) + 0x04) | |
27 | #define AK4104_NUM_REGS 10 | |
28 | ||
29 | #define AK4104_REG_MASK 0x1f | |
30 | #define AK4104_READ 0xc0 | |
31 | #define AK4104_WRITE 0xe0 | |
32 | #define AK4104_RESERVED_VAL 0x5b | |
33 | ||
34 | /* Bit masks for AK4104 registers */ | |
35 | #define AK4104_CONTROL1_RSTN (1 << 0) | |
36 | #define AK4104_CONTROL1_PW (1 << 1) | |
37 | #define AK4104_CONTROL1_DIF0 (1 << 2) | |
38 | #define AK4104_CONTROL1_DIF1 (1 << 3) | |
39 | ||
40 | #define AK4104_CONTROL2_SEL0 (1 << 0) | |
41 | #define AK4104_CONTROL2_SEL1 (1 << 1) | |
42 | #define AK4104_CONTROL2_MODE (1 << 2) | |
43 | ||
44 | #define AK4104_TX_TXE (1 << 0) | |
45 | #define AK4104_TX_V (1 << 1) | |
46 | ||
47 | #define DRV_NAME "ak4104" | |
48 | ||
49 | struct ak4104_private { | |
50 | struct snd_soc_codec codec; | |
51 | u8 reg_cache[AK4104_NUM_REGS]; | |
52 | }; | |
53 | ||
54 | static int ak4104_fill_cache(struct snd_soc_codec *codec) | |
55 | { | |
56 | int i; | |
57 | u8 *reg_cache = codec->reg_cache; | |
58 | struct spi_device *spi = codec->control_data; | |
59 | ||
60 | for (i = 0; i < codec->reg_cache_size; i++) { | |
61 | int ret = spi_w8r8(spi, i | AK4104_READ); | |
62 | if (ret < 0) { | |
63 | dev_err(&spi->dev, "SPI write failure\n"); | |
64 | return ret; | |
65 | } | |
66 | ||
67 | reg_cache[i] = ret; | |
68 | } | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
73 | static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec, | |
74 | unsigned int reg) | |
75 | { | |
76 | u8 *reg_cache = codec->reg_cache; | |
77 | ||
78 | if (reg >= codec->reg_cache_size) | |
79 | return -EINVAL; | |
80 | ||
81 | return reg_cache[reg]; | |
82 | } | |
83 | ||
84 | static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg, | |
85 | unsigned int value) | |
86 | { | |
87 | u8 *cache = codec->reg_cache; | |
88 | struct spi_device *spi = codec->control_data; | |
89 | ||
90 | if (reg >= codec->reg_cache_size) | |
91 | return -EINVAL; | |
92 | ||
93 | reg &= AK4104_REG_MASK; | |
94 | reg |= AK4104_WRITE; | |
95 | ||
96 | /* only write to the hardware if value has changed */ | |
97 | if (cache[reg] != value) { | |
98 | u8 tmp[2] = { reg, value }; | |
99 | if (spi_write(spi, tmp, sizeof(tmp))) { | |
100 | dev_err(&spi->dev, "SPI write failed\n"); | |
101 | return -EIO; | |
102 | } | |
103 | ||
104 | cache[reg] = value; | |
105 | } | |
106 | ||
107 | return 0; | |
108 | } | |
109 | ||
110 | static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
111 | unsigned int format) | |
112 | { | |
113 | struct snd_soc_codec *codec = codec_dai->codec; | |
114 | int val = 0; | |
115 | ||
116 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); | |
117 | if (val < 0) | |
118 | return val; | |
119 | ||
120 | val &= ~(AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1); | |
121 | ||
122 | /* set DAI format */ | |
123 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { | |
124 | case SND_SOC_DAIFMT_RIGHT_J: | |
125 | break; | |
126 | case SND_SOC_DAIFMT_LEFT_J: | |
127 | val |= AK4104_CONTROL1_DIF0; | |
128 | break; | |
129 | case SND_SOC_DAIFMT_I2S: | |
130 | val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1; | |
131 | break; | |
132 | default: | |
133 | dev_err(codec->dev, "invalid dai format\n"); | |
134 | return -EINVAL; | |
135 | } | |
136 | ||
137 | /* This device can only be slave */ | |
138 | if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) | |
139 | return -EINVAL; | |
140 | ||
141 | return ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); | |
142 | } | |
143 | ||
144 | static int ak4104_hw_params(struct snd_pcm_substream *substream, | |
145 | struct snd_pcm_hw_params *params, | |
146 | struct snd_soc_dai *dai) | |
147 | { | |
148 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
149 | struct snd_soc_device *socdev = rtd->socdev; | |
150 | struct snd_soc_codec *codec = socdev->card->codec; | |
151 | int val = 0; | |
152 | ||
153 | /* set the IEC958 bits: consumer mode, no copyright bit */ | |
154 | val |= IEC958_AES0_CON_NOT_COPYRIGHT; | |
155 | ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(0), val); | |
156 | ||
157 | val = 0; | |
158 | ||
159 | switch (params_rate(params)) { | |
160 | case 44100: | |
161 | val |= IEC958_AES3_CON_FS_44100; | |
162 | break; | |
163 | case 48000: | |
164 | val |= IEC958_AES3_CON_FS_48000; | |
165 | break; | |
166 | case 32000: | |
167 | val |= IEC958_AES3_CON_FS_32000; | |
168 | break; | |
169 | default: | |
170 | dev_err(codec->dev, "unsupported sampling rate\n"); | |
171 | return -EINVAL; | |
172 | } | |
173 | ||
174 | return ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(3), val); | |
175 | } | |
176 | ||
65ec1cd1 MB |
177 | static struct snd_soc_dai_ops ak4101_dai_ops = { |
178 | .hw_params = ak4104_hw_params, | |
179 | .set_fmt = ak4104_set_dai_fmt, | |
180 | }; | |
181 | ||
a381934e DM |
182 | struct snd_soc_dai ak4104_dai = { |
183 | .name = DRV_NAME, | |
184 | .playback = { | |
185 | .stream_name = "Playback", | |
186 | .channels_min = 2, | |
187 | .channels_max = 2, | |
617b14c5 | 188 | .rates = SNDRV_PCM_RATE_8000_192000, |
a381934e DM |
189 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
190 | SNDRV_PCM_FMTBIT_S24_3LE | | |
191 | SNDRV_PCM_FMTBIT_S24_LE | |
192 | }, | |
65ec1cd1 | 193 | .ops = &ak4101_dai_ops, |
a381934e DM |
194 | }; |
195 | ||
196 | static struct snd_soc_codec *ak4104_codec; | |
197 | ||
198 | static int ak4104_spi_probe(struct spi_device *spi) | |
199 | { | |
200 | struct snd_soc_codec *codec; | |
201 | struct ak4104_private *ak4104; | |
202 | int ret, val; | |
203 | ||
204 | spi->bits_per_word = 8; | |
205 | spi->mode = SPI_MODE_0; | |
206 | ret = spi_setup(spi); | |
207 | if (ret < 0) | |
208 | return ret; | |
209 | ||
210 | ak4104 = kzalloc(sizeof(struct ak4104_private), GFP_KERNEL); | |
211 | if (!ak4104) { | |
212 | dev_err(&spi->dev, "could not allocate codec\n"); | |
213 | return -ENOMEM; | |
214 | } | |
215 | ||
216 | codec = &ak4104->codec; | |
217 | mutex_init(&codec->mutex); | |
218 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
219 | INIT_LIST_HEAD(&codec->dapm_paths); | |
220 | ||
221 | codec->dev = &spi->dev; | |
222 | codec->name = DRV_NAME; | |
223 | codec->owner = THIS_MODULE; | |
224 | codec->dai = &ak4104_dai; | |
225 | codec->num_dai = 1; | |
226 | codec->private_data = ak4104; | |
227 | codec->control_data = spi; | |
228 | codec->reg_cache = ak4104->reg_cache; | |
229 | codec->reg_cache_size = AK4104_NUM_REGS; | |
230 | ||
231 | /* read all regs and fill the cache */ | |
232 | ret = ak4104_fill_cache(codec); | |
233 | if (ret < 0) { | |
234 | dev_err(&spi->dev, "failed to fill register cache\n"); | |
235 | return ret; | |
236 | } | |
237 | ||
238 | /* read the 'reserved' register - according to the datasheet, it | |
239 | * should contain 0x5b. Not a good way to verify the presence of | |
240 | * the device, but there is no hardware ID register. */ | |
241 | if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) != | |
242 | AK4104_RESERVED_VAL) { | |
243 | ret = -ENODEV; | |
244 | goto error_free_codec; | |
245 | } | |
246 | ||
247 | /* set power-up and non-reset bits */ | |
248 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); | |
249 | val |= AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN; | |
250 | ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); | |
251 | if (ret < 0) | |
252 | goto error_free_codec; | |
253 | ||
254 | /* enable transmitter */ | |
255 | val = ak4104_read_reg_cache(codec, AK4104_REG_TX); | |
256 | val |= AK4104_TX_TXE; | |
257 | ret = ak4104_spi_write(codec, AK4104_REG_TX, val); | |
258 | if (ret < 0) | |
259 | goto error_free_codec; | |
260 | ||
261 | ak4104_codec = codec; | |
262 | ret = snd_soc_register_dai(&ak4104_dai); | |
263 | if (ret < 0) { | |
264 | dev_err(&spi->dev, "failed to register DAI\n"); | |
265 | goto error_free_codec; | |
266 | } | |
267 | ||
268 | spi_set_drvdata(spi, ak4104); | |
269 | dev_info(&spi->dev, "SPI device initialized\n"); | |
270 | return 0; | |
271 | ||
272 | error_free_codec: | |
273 | kfree(ak4104); | |
274 | ak4104_dai.dev = NULL; | |
275 | return ret; | |
276 | } | |
277 | ||
278 | static int __devexit ak4104_spi_remove(struct spi_device *spi) | |
279 | { | |
280 | int ret, val; | |
281 | struct ak4104_private *ak4104 = spi_get_drvdata(spi); | |
282 | ||
283 | val = ak4104_read_reg_cache(&ak4104->codec, AK4104_REG_CONTROL1); | |
284 | if (val < 0) | |
285 | return val; | |
286 | ||
287 | /* clear power-up and non-reset bits */ | |
288 | val &= ~(AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN); | |
289 | ret = ak4104_spi_write(&ak4104->codec, AK4104_REG_CONTROL1, val); | |
290 | if (ret < 0) | |
291 | return ret; | |
292 | ||
293 | ak4104_codec = NULL; | |
294 | kfree(ak4104); | |
295 | return 0; | |
296 | } | |
297 | ||
298 | static int ak4104_probe(struct platform_device *pdev) | |
299 | { | |
300 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
301 | struct snd_soc_codec *codec = ak4104_codec; | |
302 | int ret; | |
303 | ||
304 | /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */ | |
305 | socdev->card->codec = codec; | |
306 | ||
307 | /* Register PCMs */ | |
308 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
309 | if (ret < 0) { | |
310 | dev_err(codec->dev, "failed to create pcms\n"); | |
311 | return ret; | |
312 | } | |
313 | ||
a381934e DM |
314 | return 0; |
315 | } | |
316 | ||
317 | static int ak4104_remove(struct platform_device *pdev) | |
318 | { | |
319 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
320 | snd_soc_free_pcms(socdev); | |
321 | return 0; | |
322 | }; | |
323 | ||
324 | struct snd_soc_codec_device soc_codec_device_ak4104 = { | |
325 | .probe = ak4104_probe, | |
326 | .remove = ak4104_remove | |
327 | }; | |
328 | EXPORT_SYMBOL_GPL(soc_codec_device_ak4104); | |
329 | ||
330 | static struct spi_driver ak4104_spi_driver = { | |
331 | .driver = { | |
332 | .name = DRV_NAME, | |
333 | .owner = THIS_MODULE, | |
334 | }, | |
335 | .probe = ak4104_spi_probe, | |
336 | .remove = __devexit_p(ak4104_spi_remove), | |
337 | }; | |
338 | ||
339 | static int __init ak4104_init(void) | |
340 | { | |
341 | pr_info("Asahi Kasei AK4104 ALSA SoC Codec Driver\n"); | |
342 | return spi_register_driver(&ak4104_spi_driver); | |
343 | } | |
344 | module_init(ak4104_init); | |
345 | ||
346 | static void __exit ak4104_exit(void) | |
347 | { | |
348 | spi_unregister_driver(&ak4104_spi_driver); | |
349 | } | |
350 | module_exit(ak4104_exit); | |
351 | ||
352 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); | |
353 | MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver"); | |
354 | MODULE_LICENSE("GPL"); | |
355 |