[deliverable/linux.git] / sound / soc / codecs / ak4642.c

/*
 * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
 *
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on wm8731.c by Richard Purdie
 * Based on ak4535.c by Richard Purdie
 * Based on wm8753.c by Liam Girdwood
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* ** CAUTION **
 *
 * This is very simple driver.
 * It can use headphone output / stereo input only
 *
 * AK4642 is not tested.
 * AK4643 is tested.
 */

#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#define AK4642_VERSION "0.0.1"

#define PW_MGMT1	0x00
#define PW_MGMT2	0x01
#define SG_SL1		0x02
#define SG_SL2		0x03
#define MD_CTL1		0x04
#define MD_CTL2		0x05
#define TIMER		0x06
#define ALC_CTL1	0x07
#define ALC_CTL2	0x08
#define L_IVC		0x09
#define L_DVC		0x0a
#define ALC_CTL3	0x0b
#define R_IVC		0x0c
#define R_DVC		0x0d
#define MD_CTL3		0x0e
#define MD_CTL4		0x0f
#define PW_MGMT3	0x10
#define DF_S		0x11
#define FIL3_0		0x12
#define FIL3_1		0x13
#define FIL3_2		0x14
#define FIL3_3		0x15
#define EQ_0		0x16
#define EQ_1		0x17
#define EQ_2		0x18
#define EQ_3		0x19
#define EQ_4		0x1a
#define EQ_5		0x1b
#define FIL1_0		0x1c
#define FIL1_1		0x1d
#define FIL1_2		0x1e
#define FIL1_3		0x1f
#define PW_MGMT4	0x20
#define MD_CTL5		0x21
#define LO_MS		0x22
#define HP_MS		0x23
#define SPK_MS		0x24

#define AK4642_CACHEREGNUM 	0x25

/* PW_MGMT1*/
#define PMVCM		(1 << 6) /* VCOM Power Management */
#define PMMIN		(1 << 5) /* MIN Input Power Management */
#define PMDAC		(1 << 2) /* DAC Power Management */
#define PMADL		(1 << 0) /* MIC Amp Lch and ADC Lch Power Management */

/* PW_MGMT2 */
#define HPMTN		(1 << 6)
#define PMHPL		(1 << 5)
#define PMHPR		(1 << 4)
#define MS		(1 << 3) /* master/slave select */
#define MCKO		(1 << 1)
#define PMPLL		(1 << 0)

#define PMHP_MASK	(PMHPL | PMHPR)
#define PMHP		PMHP_MASK

/* PW_MGMT3 */
#define PMADR		(1 << 0) /* MIC L / ADC R Power Management */

/* SG_SL1 */
#define MINS		(1 << 6) /* Switch from MIN to Speaker */
#define DACL		(1 << 4) /* Switch from DAC to Stereo or Receiver */
#define PMMP		(1 << 2) /* MPWR pin Power Management */
#define MGAIN0		(1 << 0) /* MIC amp gain*/

/* TIMER */
#define ZTM(param)	((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
#define WTM(param)	(((param & 0x4) << 4) | ((param & 0x3) << 2))

/* ALC_CTL1 */
#define ALC		(1 << 5) /* ALC Enable */
#define LMTH0		(1 << 0) /* ALC Limiter / Recovery Level */

/* MD_CTL1 */
#define PLL3		(1 << 7)
#define PLL2		(1 << 6)
#define PLL1		(1 << 5)
#define PLL0		(1 << 4)
#define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)

#define BCKO_MASK	(1 << 3)
#define BCKO_64		BCKO_MASK

#define DIF_MASK	(3 << 0)
#define DSP		(0 << 0)
#define RIGHT_J		(1 << 0)
#define LEFT_J		(2 << 0)
#define I2S		(3 << 0)

/* MD_CTL2 */
#define FS0		(1 << 0)
#define FS1		(1 << 1)
#define FS2		(1 << 2)
#define FS3		(1 << 5)
#define FS_MASK		(FS0 | FS1 | FS2 | FS3)

/* MD_CTL3 */
#define BST1		(1 << 3)

/* MD_CTL4 */
#define DACH		(1 << 0)

/*
 * Playback Volume (table 39)
 *
 * max : 0x00 : +12.0 dB
 *       ( 0.5 dB step )
 * min : 0xFE : -115.0 dB
 * mute: 0xFF
 */
static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);

static const struct snd_kcontrol_new ak4642_snd_controls[] = {

	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
			 0, 0xFF, 1, out_tlv),
};


/* codec private data */
struct ak4642_priv {
	unsigned int sysclk;
	enum snd_soc_control_type control_type;
};

/*
 * ak4642 register cache
 */
static const u8 ak4642_reg[AK4642_CACHEREGNUM] = {
	0x00, 0x00, 0x01, 0x00,
	0x02, 0x00, 0x00, 0x00,
	0xe1, 0xe1, 0x18, 0x00,
	0xe1, 0x18, 0x11, 0x08,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00,
};

static int ak4642_dai_startup(struct snd_pcm_substream *substream,
			      struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/*
		 * start headphone output
		 *
		 * PLL, Master Mode
		 * Audio I/F Format :MSB justified (ADC & DAC)
		 * Bass Boost Level : Middle
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p97.
		 */
		snd_soc_update_bits(codec, MD_CTL4, DACH, DACH);
		snd_soc_update_bits(codec, MD_CTL3, BST1, BST1);
		snd_soc_write(codec, L_IVC, 0x91); /* volume */
		snd_soc_write(codec, R_IVC, 0x91); /* volume */
		snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMMIN | PMDAC,
						     PMVCM | PMMIN | PMDAC);
		snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK,	PMHP);
		snd_soc_update_bits(codec, PW_MGMT2, HPMTN,	HPMTN);
	} else {
		/*
		 * start stereo input
		 *
		 * PLL Master Mode
		 * Audio I/F Format:MSB justified (ADC & DAC)
		 * Pre MIC AMP:+20dB
		 * MIC Power On
		 * ALC setting:Refer to Table 35
		 * ALC bit=“1”
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p94.
		 */
		snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
		snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
		snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
		snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMADL,
						     PMVCM | PMADL);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
	}

	return 0;
}

static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
			       struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/* stop headphone output */
		snd_soc_update_bits(codec, PW_MGMT2, HPMTN,	0);
		snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK,	0);
		snd_soc_update_bits(codec, PW_MGMT1, PMMIN | PMDAC, 0);
		snd_soc_update_bits(codec, MD_CTL3, BST1, 0);
		snd_soc_update_bits(codec, MD_CTL4, DACH, 0);
	} else {
		/* stop stereo input */
		snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
		snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
	}
}

static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u8 pll;

	switch (freq) {
	case 11289600:
		pll = PLL2;
		break;
	case 12288000:
		pll = PLL2 | PLL0;
		break;
	case 12000000:
		pll = PLL2 | PLL1;
		break;
	case 24000000:
		pll = PLL2 | PLL1 | PLL0;
		break;
	case 13500000:
		pll = PLL3 | PLL2;
		break;
	case 27000000:
		pll = PLL3 | PLL2 | PLL0;
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);

	return 0;
}

static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 data;
	u8 bcko;

	data = MCKO | PMPLL; /* use MCKO */
	bcko = 0;

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		data |= MS;
		bcko = BCKO_64;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);

	/* format type */
	data = 0;
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_LEFT_J:
		data = LEFT_J;
		break;
	case SND_SOC_DAIFMT_I2S:
		data = I2S;
		break;
	/* FIXME
	 * Please add RIGHT_J / DSP support here
	 */
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);

	return 0;
}

static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params,
				struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 rate;

	switch (params_rate(params)) {
	case 7350:
		rate = FS2;
		break;
	case 8000:
		rate = 0;
		break;
	case 11025:
		rate = FS2 | FS0;
		break;
	case 12000:
		rate = FS0;
		break;
	case 14700:
		rate = FS2 | FS1;
		break;
	case 16000:
		rate = FS1;
		break;
	case 22050:
		rate = FS2 | FS1 | FS0;
		break;
	case 24000:
		rate = FS1 | FS0;
		break;
	case 29400:
		rate = FS3 | FS2 | FS1;
		break;
	case 32000:
		rate = FS3 | FS1;
		break;
	case 44100:
		rate = FS3 | FS2 | FS1 | FS0;
		break;
	case 48000:
		rate = FS3 | FS1 | FS0;
		break;
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);

	return 0;
}

static struct snd_soc_dai_ops ak4642_dai_ops = {
	.startup	= ak4642_dai_startup,
	.shutdown	= ak4642_dai_shutdown,
	.set_sysclk	= ak4642_dai_set_sysclk,
	.set_fmt	= ak4642_dai_set_fmt,
	.hw_params	= ak4642_dai_hw_params,
};

static struct snd_soc_dai_driver ak4642_dai = {
	.name = "ak4642-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.capture = {
		.stream_name = "Capture",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.ops = &ak4642_dai_ops,
	.symmetric_rates = 1,
};

static int ak4642_resume(struct snd_soc_codec *codec)
{
	snd_soc_cache_sync(codec);
	return 0;
}


static int ak4642_probe(struct snd_soc_codec *codec)
{
	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
	int ret;

	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);

	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	snd_soc_add_controls(codec, ak4642_snd_controls,
			     ARRAY_SIZE(ak4642_snd_controls));

	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
	.probe			= ak4642_probe,
	.resume			= ak4642_resume,
	.reg_cache_size		= ARRAY_SIZE(ak4642_reg),
	.reg_word_size		= sizeof(u8),
	.reg_cache_default	= ak4642_reg,
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct ak4642_priv *ak4642;
	int ret;

	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
	if (!ak4642)
		return -ENOMEM;

	i2c_set_clientdata(i2c, ak4642);
	ak4642->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_ak4642, &ak4642_dai, 1);
	if (ret < 0)
		kfree(ak4642);
	return ret;
}

static __devexit int ak4642_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	kfree(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id ak4642_i2c_id[] = {
	{ "ak4642", 0 },
	{ "ak4643", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);

static struct i2c_driver ak4642_i2c_driver = {
	.driver = {
		.name = "ak4642-codec",
		.owner = THIS_MODULE,
	},
	.probe		= ak4642_i2c_probe,
	.remove		= __devexit_p(ak4642_i2c_remove),
	.id_table	= ak4642_i2c_id,
};
#endif

static int __init ak4642_modinit(void)
{
	int ret = 0;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&ak4642_i2c_driver);
#endif
	return ret;

}
module_init(ak4642_modinit);

static void __exit ak4642_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&ak4642_i2c_driver);
#endif

}
module_exit(ak4642_exit);

MODULE_DESCRIPTION("Soc AK4642 driver");
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
a3a83d9a KM	1	/*
	2	* ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
	3	*
	4	* Copyright (C) 2009 Renesas Solutions Corp.
	5	* Kuninori Morimoto <morimoto.kuninori@renesas.com>
	6	*
	7	* Based on wm8731.c by Richard Purdie
	8	* Based on ak4535.c by Richard Purdie
	9	* Based on wm8753.c by Liam Girdwood
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	/* CAUTION
	17	*
	18	* This is very simple driver.
	19	* It can use headphone output / stereo input only
	20	*
	21	* AK4642 is not tested.
	22	* AK4643 is tested.
	23	*/
	24
a3a83d9a	25	#include <linux/delay.h>
a3a83d9a KM	26	#include <linux/i2c.h>
a3a83d9a KM	27	#include <linux/platform_device.h>
5a0e3ad6	28	#include <linux/slab.h>
ce6120cc	29	#include <sound/soc.h>
a3a83d9a	30	#include <sound/initval.h>
a300de3c	31	#include <sound/tlv.h>
a3a83d9a	32
a3a83d9a KM	33	#define AK4642_VERSION "0.0.1"
	34
	35	#define PW_MGMT1 0x00
	36	#define PW_MGMT2 0x01
	37	#define SG_SL1 0x02
	38	#define SG_SL2 0x03
	39	#define MD_CTL1 0x04
	40	#define MD_CTL2 0x05
	41	#define TIMER 0x06
	42	#define ALC_CTL1 0x07
	43	#define ALC_CTL2 0x08
	44	#define L_IVC 0x09
	45	#define L_DVC 0x0a
	46	#define ALC_CTL3 0x0b
	47	#define R_IVC 0x0c
	48	#define R_DVC 0x0d
	49	#define MD_CTL3 0x0e
	50	#define MD_CTL4 0x0f
	51	#define PW_MGMT3 0x10
	52	#define DF_S 0x11
	53	#define FIL3_0 0x12
	54	#define FIL3_1 0x13
	55	#define FIL3_2 0x14
	56	#define FIL3_3 0x15
	57	#define EQ_0 0x16
	58	#define EQ_1 0x17
	59	#define EQ_2 0x18
	60	#define EQ_3 0x19
	61	#define EQ_4 0x1a
	62	#define EQ_5 0x1b
	63	#define FIL1_0 0x1c
	64	#define FIL1_1 0x1d
	65	#define FIL1_2 0x1e
	66	#define FIL1_3 0x1f
	67	#define PW_MGMT4 0x20
	68	#define MD_CTL5 0x21
	69	#define LO_MS 0x22
	70	#define HP_MS 0x23
	71	#define SPK_MS 0x24
	72
	73	#define AK4642_CACHEREGNUM 0x25
	74
a3471239 KM	75	/* PW_MGMT1*/
	76	#define PMVCM (1 << 6) /* VCOM Power Management */
	77	#define PMMIN (1 << 5) /* MIN Input Power Management */
	78	#define PMDAC (1 << 2) /* DAC Power Management */
	79	#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
	80
0643ce8f KM	81	/* PW_MGMT2 */
	82	#define HPMTN (1 << 6)
	83	#define PMHPL (1 << 5)
	84	#define PMHPR (1 << 4)
	85	#define MS (1 << 3) /* master/slave select */
	86	#define MCKO (1 << 1)
	87	#define PMPLL (1 << 0)
	88
	89	#define PMHP_MASK (PMHPL \| PMHPR)
	90	#define PMHP PMHP_MASK
	91
a3471239 KM	92	/* PW_MGMT3 */
	93	#define PMADR (1 << 0) /* MIC L / ADC R Power Management */
	94
	95	/* SG_SL1 */
	96	#define MINS (1 << 6) /* Switch from MIN to Speaker */
	97	#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
	98	#define PMMP (1 << 2) /* MPWR pin Power Management */
	99	#define MGAIN0 (1 << 0) /* MIC amp gain*/
	100
	101	/* TIMER */
	102	#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
	103	#define WTM(param) (((param & 0x4) << 4) \| ((param & 0x3) << 2))
	104
	105	/* ALC_CTL1 */
	106	#define ALC (1 << 5) /* ALC Enable */
	107	#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
	108
4b6316b4 KM	109	/* MD_CTL1 */
	110	#define PLL3 (1 << 7)
	111	#define PLL2 (1 << 6)
	112	#define PLL1 (1 << 5)
	113	#define PLL0 (1 << 4)
	114	#define PLL_MASK (PLL3 \| PLL2 \| PLL1 \| PLL0)
	115
0643ce8f KM	116	#define BCKO_MASK (1 << 3)
	117	#define BCKO_64 BCKO_MASK
	118
cb9c130a KM	119	#define DIF_MASK (3 << 0)
	120	#define DSP (0 << 0)
	121	#define RIGHT_J (1 << 0)
	122	#define LEFT_J (2 << 0)
	123	#define I2S (3 << 0)
	124
1ad747ca KM	125	/* MD_CTL2 */
	126	#define FS0 (1 << 0)
	127	#define FS1 (1 << 1)
	128	#define FS2 (1 << 2)
	129	#define FS3 (1 << 5)
	130	#define FS_MASK (FS0 \| FS1 \| FS2 \| FS3)
	131
a3471239 KM	132	/* MD_CTL3 */
	133	#define BST1 (1 << 3)
	134
	135	/* MD_CTL4 */
	136	#define DACH (1 << 0)
a3a83d9a	137
a300de3c KM	138	/*
	139	* Playback Volume (table 39)
	140	*
	141	* max : 0x00 : +12.0 dB
	142	* ( 0.5 dB step )
	143	* min : 0xFE : -115.0 dB
	144	* mute: 0xFF
	145	*/
	146	static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
	147
	148	static const struct snd_kcontrol_new ak4642_snd_controls[] = {
	149
	150	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
	151	0, 0xFF, 1, out_tlv),
	152	};
	153
	154
a3a83d9a KM	155	/* codec private data */
a3a83d9a KM	156	struct ak4642_priv {
f0fba2ad LG	157	unsigned int sysclk;
f0fba2ad LG	158	enum snd_soc_control_type control_type;
a3a83d9a KM	159	};
a3a83d9a KM	160
a3a83d9a KM	161	/*
	162	* ak4642 register cache
	163	*/
19b115e5 KM	164	static const u8 ak4642_reg[AK4642_CACHEREGNUM] = {
	165	0x00, 0x00, 0x01, 0x00,
	166	0x02, 0x00, 0x00, 0x00,
	167	0xe1, 0xe1, 0x18, 0x00,
	168	0xe1, 0x18, 0x11, 0x08,
	169	0x00, 0x00, 0x00, 0x00,
	170	0x00, 0x00, 0x00, 0x00,
	171	0x00, 0x00, 0x00, 0x00,
	172	0x00, 0x00, 0x00, 0x00,
	173	0x00, 0x00, 0x00, 0x00,
	174	0x00,
a3a83d9a KM	175	};
a3a83d9a KM	176
a3a83d9a KM	177	static int ak4642_dai_startup(struct snd_pcm_substream *substream,
	178	struct snd_soc_dai *dai)
	179	{
	180	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	181	struct snd_soc_codec *codec = dai->codec;
	182
	183	if (is_play) {
	184	/*
	185	* start headphone output
	186	*
	187	* PLL, Master Mode
	188	* Audio I/F Format :MSB justified (ADC & DAC)
a3a83d9a KM	189	* Bass Boost Level : Middle
	190	*
	191	* This operation came from example code of
	192	* "ASAHI KASEI AK4642" (japanese) manual p97.
a3a83d9a	193	*/
a3471239 KM	194	snd_soc_update_bits(codec, MD_CTL4, DACH, DACH);
a3471239 KM	195	snd_soc_update_bits(codec, MD_CTL3, BST1, BST1);
b91470bb AL	196	snd_soc_write(codec, L_IVC, 0x91); /* volume */
b91470bb AL	197	snd_soc_write(codec, R_IVC, 0x91); /* volume */
a3471239 KM	198	snd_soc_update_bits(codec, PW_MGMT1, PMVCM \| PMMIN \| PMDAC,
a3471239 KM	199	PMVCM \| PMMIN \| PMDAC);
0643ce8f KM	200	snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, PMHP);
0643ce8f KM	201	snd_soc_update_bits(codec, PW_MGMT2, HPMTN, HPMTN);
a3a83d9a KM	202	} else {
	203	/*
	204	* start stereo input
	205	*
	206	* PLL Master Mode
	207	* Audio I/F Format:MSB justified (ADC & DAC)
a3a83d9a KM	208	* Pre MIC AMP:+20dB
	209	* MIC Power On
	210	* ALC setting:Refer to Table 35
	211	* ALC bit=“1”
	212	*
	213	* This operation came from example code of
	214	* "ASAHI KASEI AK4642" (japanese) manual p94.
	215	*/
b91470bb AL	216	snd_soc_write(codec, SG_SL1, PMMP \| MGAIN0);
	217	snd_soc_write(codec, TIMER, ZTM(0x3) \| WTM(0x3));
	218	snd_soc_write(codec, ALC_CTL1, ALC \| LMTH0);
a3471239 KM	219	snd_soc_update_bits(codec, PW_MGMT1, PMVCM \| PMADL,
	220	PMVCM \| PMADL);
	221	snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
a3a83d9a KM	222	}
	223
	224	return 0;
	225	}
	226
	227	static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
	228	struct snd_soc_dai *dai)
	229	{
	230	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	231	struct snd_soc_codec *codec = dai->codec;
	232
	233	if (is_play) {
	234	/* stop headphone output */
0643ce8f KM	235	snd_soc_update_bits(codec, PW_MGMT2, HPMTN, 0);
0643ce8f KM	236	snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, 0);
a3471239 KM	237	snd_soc_update_bits(codec, PW_MGMT1, PMMIN \| PMDAC, 0);
	238	snd_soc_update_bits(codec, MD_CTL3, BST1, 0);
	239	snd_soc_update_bits(codec, MD_CTL4, DACH, 0);
a3a83d9a KM	240	} else {
a3a83d9a KM	241	/* stop stereo input */
a3471239 KM	242	snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
	243	snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
	244	snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
a3a83d9a KM	245	}
	246	}
	247
	248	static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	249	int clk_id, unsigned int freq, int dir)
	250	{
	251	struct snd_soc_codec *codec = codec_dai->codec;
4b6316b4 KM	252	u8 pll;
	253
	254	switch (freq) {
	255	case 11289600:
	256	pll = PLL2;
	257	break;
	258	case 12288000:
	259	pll = PLL2 \| PLL0;
	260	break;
	261	case 12000000:
	262	pll = PLL2 \| PLL1;
	263	break;
	264	case 24000000:
	265	pll = PLL2 \| PLL1 \| PLL0;
	266	break;
	267	case 13500000:
	268	pll = PLL3 \| PLL2;
	269	break;
	270	case 27000000:
	271	pll = PLL3 \| PLL2 \| PLL0;
	272	break;
	273	default:
	274	return -EINVAL;
	275	}
	276	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
a3a83d9a	277
a3a83d9a KM	278	return 0;
	279	}
	280
0643ce8f KM	281	static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
	282	{
	283	struct snd_soc_codec *codec = dai->codec;
	284	u8 data;
	285	u8 bcko;
	286
	287	data = MCKO \| PMPLL; /* use MCKO */
	288	bcko = 0;
	289
	290	/* set master/slave audio interface */
	291	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	292	case SND_SOC_DAIFMT_CBM_CFM:
	293	data \|= MS;
	294	bcko = BCKO_64;
	295	break;
	296	case SND_SOC_DAIFMT_CBS_CFS:
	297	break;
	298	default:
	299	return -EINVAL;
	300	}
bd7fdbca	301	snd_soc_update_bits(codec, PW_MGMT2, MS \| MCKO \| PMPLL, data);
0643ce8f KM	302	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
0643ce8f KM	303
cb9c130a KM	304	/* format type */
	305	data = 0;
	306	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	307	case SND_SOC_DAIFMT_LEFT_J:
	308	data = LEFT_J;
	309	break;
	310	case SND_SOC_DAIFMT_I2S:
	311	data = I2S;
	312	break;
	313	/* FIXME
	314	* Please add RIGHT_J / DSP support here
	315	*/
	316	default:
	317	return -EINVAL;
	318	break;
	319	}
	320	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
	321
0643ce8f KM	322	return 0;
	323	}
	324
1ad747ca KM	325	static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
	326	struct snd_pcm_hw_params *params,
	327	struct snd_soc_dai *dai)
	328	{
	329	struct snd_soc_codec *codec = dai->codec;
	330	u8 rate;
	331
	332	switch (params_rate(params)) {
	333	case 7350:
	334	rate = FS2;
	335	break;
	336	case 8000:
	337	rate = 0;
	338	break;
	339	case 11025:
	340	rate = FS2 \| FS0;
	341	break;
	342	case 12000:
	343	rate = FS0;
	344	break;
	345	case 14700:
	346	rate = FS2 \| FS1;
	347	break;
	348	case 16000:
	349	rate = FS1;
	350	break;
	351	case 22050:
	352	rate = FS2 \| FS1 \| FS0;
	353	break;
	354	case 24000:
	355	rate = FS1 \| FS0;
	356	break;
	357	case 29400:
	358	rate = FS3 \| FS2 \| FS1;
	359	break;
	360	case 32000:
	361	rate = FS3 \| FS1;
	362	break;
	363	case 44100:
	364	rate = FS3 \| FS2 \| FS1 \| FS0;
	365	break;
	366	case 48000:
	367	rate = FS3 \| FS1 \| FS0;
	368	break;
	369	default:
	370	return -EINVAL;
	371	break;
	372	}
	373	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
a3a83d9a	374
a3a83d9a KM	375	return 0;
	376	}
	377
	378	static struct snd_soc_dai_ops ak4642_dai_ops = {
	379	.startup = ak4642_dai_startup,
	380	.shutdown = ak4642_dai_shutdown,
	381	.set_sysclk = ak4642_dai_set_sysclk,
0643ce8f	382	.set_fmt = ak4642_dai_set_fmt,
1ad747ca	383	.hw_params = ak4642_dai_hw_params,
a3a83d9a KM	384	};
a3a83d9a KM	385
f0fba2ad LG	386	static struct snd_soc_dai_driver ak4642_dai = {
f0fba2ad LG	387	.name = "ak4642-hifi",
a3a83d9a KM	388	.playback = {
	389	.stream_name = "Playback",
	390	.channels_min = 1,
	391	.channels_max = 2,
	392	.rates = SNDRV_PCM_RATE_8000_48000,
	393	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	394	.capture = {
	395	.stream_name = "Capture",
	396	.channels_min = 1,
	397	.channels_max = 2,
	398	.rates = SNDRV_PCM_RATE_8000_48000,
	399	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	400	.ops = &ak4642_dai_ops,
1ad747ca	401	.symmetric_rates = 1,
a3a83d9a	402	};
a3a83d9a	403
f0fba2ad	404	static int ak4642_resume(struct snd_soc_codec *codec)
a3a83d9a	405	{
b91470bb	406	snd_soc_cache_sync(codec);
a3a83d9a KM	407	return 0;
	408	}
	409
f0fba2ad LG	410
f0fba2ad LG	411	static int ak4642_probe(struct snd_soc_codec *codec)
a3a83d9a	412	{
f0fba2ad	413	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
b91470bb	414	int ret;
a3a83d9a	415
f0fba2ad	416	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);
a3a83d9a	417
b91470bb AL	418	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	419	if (ret < 0) {
	420	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
	421	return ret;
	422	}
a3a83d9a	423
73bb379f KM	424	snd_soc_add_controls(codec, ak4642_snd_controls,
73bb379f KM	425	ARRAY_SIZE(ak4642_snd_controls));
a3a83d9a	426
f0fba2ad	427	return 0;
a3a83d9a KM	428	}
a3a83d9a KM	429
f0fba2ad	430	static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
0ce75aa4 KM	431	.probe = ak4642_probe,
0ce75aa4 KM	432	.resume = ak4642_resume,
0ce75aa4 KM	433	.reg_cache_size = ARRAY_SIZE(ak4642_reg),
0ce75aa4 KM	434	.reg_word_size = sizeof(u8),
f0fba2ad LG	435	.reg_cache_default = ak4642_reg,
	436	};
	437
a3a83d9a	438	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
f0fba2ad LG	439	static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
f0fba2ad LG	440	const struct i2c_device_id *id)
a3a83d9a KM	441	{
a3a83d9a KM	442	struct ak4642_priv *ak4642;
a3a83d9a KM	443	int ret;
	444
	445	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
0ce75aa4	446	if (!ak4642)
a3a83d9a KM	447	return -ENOMEM;
a3a83d9a KM	448
a3a83d9a	449	i2c_set_clientdata(i2c, ak4642);
f0fba2ad	450	ak4642->control_type = SND_SOC_I2C;
a3a83d9a	451
f0fba2ad LG	452	ret = snd_soc_register_codec(&i2c->dev,
	453	&soc_codec_dev_ak4642, &ak4642_dai, 1);
	454	if (ret < 0)
7bcaad91	455	kfree(ak4642);
a3a83d9a KM	456	return ret;
	457	}
	458
f0fba2ad	459	static __devexit int ak4642_i2c_remove(struct i2c_client *client)
a3a83d9a	460	{
f0fba2ad LG	461	snd_soc_unregister_codec(&client->dev);
f0fba2ad LG	462	kfree(i2c_get_clientdata(client));
a3a83d9a KM	463	return 0;
	464	}
	465
	466	static const struct i2c_device_id ak4642_i2c_id[] = {
	467	{ "ak4642", 0 },
	468	{ "ak4643", 0 },
	469	{ }
	470	};
	471	MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
	472
	473	static struct i2c_driver ak4642_i2c_driver = {
	474	.driver = {
f0fba2ad	475	.name = "ak4642-codec",
a3a83d9a KM	476	.owner = THIS_MODULE,
a3a83d9a KM	477	},
0ce75aa4 KM	478	.probe = ak4642_i2c_probe,
	479	.remove = __devexit_p(ak4642_i2c_remove),
	480	.id_table = ak4642_i2c_id,
a3a83d9a	481	};
a3a83d9a KM	482	#endif
a3a83d9a KM	483
a3a83d9a KM	484	static int __init ak4642_modinit(void)
a3a83d9a KM	485	{
1cf86f6f	486	int ret = 0;
a3a83d9a KM	487	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	488	ret = i2c_add_driver(&ak4642_i2c_driver);
	489	#endif
	490	return ret;
	491
	492	}
	493	module_init(ak4642_modinit);
	494
	495	static void __exit ak4642_exit(void)
	496	{
	497	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	498	i2c_del_driver(&ak4642_i2c_driver);
	499	#endif
	500
	501	}
	502	module_exit(ak4642_exit);
	503
	504	MODULE_DESCRIPTION("Soc AK4642 driver");
	505	MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
	506	MODULE_LICENSE("GPL");