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ASoC: rt5640: Change the setting method of idle_bias_off
[deliverable/linux.git] / sound / soc / codecs / alc5632.c
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94d5f7c0
LR		 1/*
2* alc5632.c -- ALC5632 ALSA SoC Audio Codec
3*
4* Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
5*
6* Authors: Leon Romanovsky <leon@leon.nu>
7* Andrey Danin <danindrey@mail.ru>
8* Ilya Petrov <ilya.muromec@gmail.com>
9* Marc Dietrich <marvin24@gmx.de>
10*
11* Based on alc5623.c by Arnaud Patard
12*
13* This program is free software; you can redistribute it and/or modify
14* it under the terms of the GNU General Public License version 2 as
15* published by the Free Software Foundation.
16*/
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/pm.h>
23#include <linux/i2c.h>
24#include <linux/slab.h>
bb39753c 25#include <linux/regmap.h>
94d5f7c0
LR		 26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/tlv.h>
30#include <sound/soc.h>
31#include <sound/initval.h>
32
33#include "alc5632.h"
34
35/*
36 * ALC5632 register cache
37 */
bb39753c 38static struct reg_default alc5632_reg_defaults[] = {
43fa8e53
LR		 39 { 2, 0x8080 }, /* R2 - Speaker Output Volume */
40 { 4, 0x8080 }, /* R4 - Headphone Output Volume */
41 { 6, 0x8080 }, /* R6 - AUXOUT Volume */
42 { 8, 0xC800 }, /* R8 - Phone Input */
43 { 10, 0xE808 }, /* R10 - LINE_IN Volume */
44 { 12, 0x1010 }, /* R12 - STEREO DAC Input Volume */
45 { 14, 0x0808 }, /* R14 - MIC Input Volume */
46 { 16, 0xEE0F }, /* R16 - Stereo DAC and MIC Routing Control */
47 { 18, 0xCBCB }, /* R18 - ADC Record Gain */
48 { 20, 0x7F7F }, /* R20 - ADC Record Mixer Control */
49 { 24, 0xE010 }, /* R24 - Voice DAC Volume */
50 { 28, 0x8008 }, /* R28 - Output Mixer Control */
51 { 34, 0x0000 }, /* R34 - Microphone Control */
52 { 36, 0x00C0 }, /* R36 - Codec Digital MIC/Digital Boost
53 Control */
43fa8e53
LR		 54 { 46, 0x0000 }, /* R46 - Stereo DAC/Voice DAC/Stereo ADC
55 Function Select */
56 { 52, 0x8000 }, /* R52 - Main Serial Data Port Control
57 (Stereo I2S) */
58 { 54, 0x0000 }, /* R54 - Extend Serial Data Port Control
59 (VoDAC_I2S/PCM) */
60 { 58, 0x0000 }, /* R58 - Power Management Addition 1 */
61 { 60, 0x0000 }, /* R60 - Power Management Addition 2 */
62 { 62, 0x8000 }, /* R62 - Power Management Addition 3 */
63 { 64, 0x0C0A }, /* R64 - General Purpose Control Register 1 */
64 { 66, 0x0000 }, /* R66 - General Purpose Control Register 2 */
65 { 68, 0x0000 }, /* R68 - PLL1 Control */
66 { 70, 0x0000 }, /* R70 - PLL2 Control */
67 { 76, 0xBE3E }, /* R76 - GPIO Pin Configuration */
68 { 78, 0xBE3E }, /* R78 - GPIO Pin Polarity */
69 { 80, 0x0000 }, /* R80 - GPIO Pin Sticky */
70 { 82, 0x0000 }, /* R82 - GPIO Pin Wake Up */
43fa8e53 71 { 86, 0x0000 }, /* R86 - Pin Sharing */
43fa8e53
LR		 72 { 90, 0x0009 }, /* R90 - Soft Volume Control Setting */
73 { 92, 0x0000 }, /* R92 - GPIO_Output Pin Control */
74 { 94, 0x3000 }, /* R94 - MISC Control */
75 { 96, 0x3075 }, /* R96 - Stereo DAC Clock Control_1 */
76 { 98, 0x1010 }, /* R98 - Stereo DAC Clock Control_2 */
77 { 100, 0x3110 }, /* R100 - VoDAC_PCM Clock Control_1 */
78 { 104, 0x0553 }, /* R104 - Pseudo Stereo and Spatial Effect
79 Block Control */
80 { 106, 0x0000 }, /* R106 - Private Register Address */
94d5f7c0
LR		 81};
82
83/* codec private data */
84struct alc5632_priv {
bb39753c 85 struct regmap *regmap;
94d5f7c0
LR		 86 u8 id;
87 unsigned int sysclk;
88};
89
bb39753c 90static bool alc5632_volatile_register(struct device *dev,
94d5f7c0
LR		 91 unsigned int reg)
92{
93 switch (reg) {
94 case ALC5632_RESET:
95 case ALC5632_PWR_DOWN_CTRL_STATUS:
96 case ALC5632_GPIO_PIN_STATUS:
97 case ALC5632_OVER_CURR_STATUS:
98 case ALC5632_HID_CTRL_DATA:
99 case ALC5632_EQ_CTRL:
9b4156cb
LR		 100 case ALC5632_VENDOR_ID1:
101 case ALC5632_VENDOR_ID2:
bb39753c 102 return true;
94d5f7c0
LR		 103
104 default:
105 break;
106 }
107
bb39753c 108 return false;
94d5f7c0
LR		 109}
110
bb39753c 111static inline int alc5632_reset(struct regmap *map)
94d5f7c0 112{
bb39753c 113 return regmap_write(map, ALC5632_RESET, 0x59B4);
94d5f7c0
LR		 114}
115
116static int amp_mixer_event(struct snd_soc_dapm_widget *w,
117 struct snd_kcontrol *kcontrol, int event)
118{
119 /* to power-on/off class-d amp generators/speaker */
120 /* need to write to 'index-46h' register : */
121 /* so write index num (here 0x46) to reg 0x6a */
122 /* and then 0xffff/0 to reg 0x6c */
123 snd_soc_write(w->codec, ALC5632_HID_CTRL_INDEX, 0x46);
124
125 switch (event) {
126 case SND_SOC_DAPM_PRE_PMU:
127 snd_soc_write(w->codec, ALC5632_HID_CTRL_DATA, 0xFFFF);
128 break;
129 case SND_SOC_DAPM_POST_PMD:
130 snd_soc_write(w->codec, ALC5632_HID_CTRL_DATA, 0);
131 break;
132 }
133
134 return 0;
135}
136
137/*
138 * ALC5632 Controls
139 */
140
141/* -34.5db min scale, 1.5db steps, no mute */
142static const DECLARE_TLV_DB_SCALE(vol_tlv, -3450, 150, 0);
143/* -46.5db min scale, 1.5db steps, no mute */
144static const DECLARE_TLV_DB_SCALE(hp_tlv, -4650, 150, 0);
145/* -16.5db min scale, 1.5db steps, no mute */
146static const DECLARE_TLV_DB_SCALE(adc_rec_tlv, -1650, 150, 0);
147static const unsigned int boost_tlv[] = {
abb015be
PF		 148 TLV_DB_RANGE_HEAD(2),
149 0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0),
150 1, 3, TLV_DB_SCALE_ITEM(2000, 1000, 0),
94d5f7c0
LR		 151};
152/* 0db min scale, 6 db steps, no mute */
153static const DECLARE_TLV_DB_SCALE(dig_tlv, 0, 600, 0);
154/* 0db min scalem 0.75db steps, no mute */
39be1aff 155static const DECLARE_TLV_DB_SCALE(vdac_tlv, -3525, 75, 0);
94d5f7c0
LR		 156
157static const struct snd_kcontrol_new alc5632_vol_snd_controls[] = {
158 /* left starts at bit 8, right at bit 0 */
159 /* 31 steps (5 bit), -46.5db scale */
1a083257 160 SOC_DOUBLE_TLV("Speaker Playback Volume",
94d5f7c0
LR		 161 ALC5632_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv),
162 /* bit 15 mutes left, bit 7 right */
1a083257 163 SOC_DOUBLE("Speaker Playback Switch",
94d5f7c0
LR		 164 ALC5632_SPK_OUT_VOL, 15, 7, 1, 1),
165 SOC_DOUBLE_TLV("Headphone Playback Volume",
166 ALC5632_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv),
167 SOC_DOUBLE("Headphone Playback Switch",
168 ALC5632_HP_OUT_VOL, 15, 7, 1, 1),
169};
170
171static const struct snd_kcontrol_new alc5632_snd_controls[] = {
172 SOC_DOUBLE_TLV("Auxout Playback Volume",
173 ALC5632_AUX_OUT_VOL, 8, 0, 31, 1, hp_tlv),
174 SOC_DOUBLE("Auxout Playback Switch",
175 ALC5632_AUX_OUT_VOL, 15, 7, 1, 1),
176 SOC_SINGLE_TLV("Voice DAC Playback Volume",
177 ALC5632_VOICE_DAC_VOL, 0, 63, 0, vdac_tlv),
0a2c056e
AD		 178 SOC_SINGLE("Voice DAC Playback Switch",
179 ALC5632_VOICE_DAC_VOL, 12, 1, 1),
5148aed2 180 SOC_SINGLE_TLV("Phone Playback Volume",
94d5f7c0 181 ALC5632_PHONE_IN_VOL, 8, 31, 1, vol_tlv),
5148aed2 182 SOC_DOUBLE_TLV("LineIn Playback Volume",
94d5f7c0 183 ALC5632_LINE_IN_VOL, 8, 0, 31, 1, vol_tlv),
1a083257 184 SOC_DOUBLE_TLV("Master Playback Volume",
94d5f7c0 185 ALC5632_STEREO_DAC_IN_VOL, 8, 0, 63, 1, vdac_tlv),
1a083257 186 SOC_DOUBLE("Master Playback Switch",
94d5f7c0 187 ALC5632_STEREO_DAC_IN_VOL, 15, 7, 1, 1),
5148aed2 188 SOC_SINGLE_TLV("Mic1 Playback Volume",
94d5f7c0 189 ALC5632_MIC_VOL, 8, 31, 1, vol_tlv),
5148aed2 190 SOC_SINGLE_TLV("Mic2 Playback Volume",
94d5f7c0
LR		 191 ALC5632_MIC_VOL, 0, 31, 1, vol_tlv),
192 SOC_DOUBLE_TLV("Rec Capture Volume",
193 ALC5632_ADC_REC_GAIN, 8, 0, 31, 0, adc_rec_tlv),
194 SOC_SINGLE_TLV("Mic 1 Boost Volume",
abb015be 195 ALC5632_MIC_CTRL, 10, 3, 0, boost_tlv),
94d5f7c0 196 SOC_SINGLE_TLV("Mic 2 Boost Volume",
abb015be 197 ALC5632_MIC_CTRL, 8, 3, 0, boost_tlv),
5148aed2 198 SOC_SINGLE_TLV("DMIC Boost Capture Volume",
94d5f7c0 199 ALC5632_DIGI_BOOST_CTRL, 0, 7, 0, dig_tlv),
5e4e94a9
AD		 200 SOC_SINGLE("DMIC En Capture Switch",
201 ALC5632_DIGI_BOOST_CTRL, 15, 1, 0),
202 SOC_SINGLE("DMIC PreFilter Capture Switch",
203 ALC5632_DIGI_BOOST_CTRL, 12, 1, 0),
94d5f7c0
LR		 204};
205
206/*
207 * DAPM Controls
208 */
209static const struct snd_kcontrol_new alc5632_hp_mixer_controls[] = {
210SOC_DAPM_SINGLE("LI2HP Playback Switch", ALC5632_LINE_IN_VOL, 15, 1, 1),
211SOC_DAPM_SINGLE("PHONE2HP Playback Switch", ALC5632_PHONE_IN_VOL, 15, 1, 1),
212SOC_DAPM_SINGLE("MIC12HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 15, 1, 1),
213SOC_DAPM_SINGLE("MIC22HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 11, 1, 1),
214SOC_DAPM_SINGLE("VOICE2HP Playback Switch", ALC5632_VOICE_DAC_VOL, 15, 1, 1),
215};
216
217static const struct snd_kcontrol_new alc5632_hpl_mixer_controls[] = {
218SOC_DAPM_SINGLE("ADC2HP_L Playback Switch", ALC5632_ADC_REC_GAIN, 15, 1, 1),
219SOC_DAPM_SINGLE("DACL2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 3, 1, 1),
220};
221
222static const struct snd_kcontrol_new alc5632_hpr_mixer_controls[] = {
223SOC_DAPM_SINGLE("ADC2HP_R Playback Switch", ALC5632_ADC_REC_GAIN, 7, 1, 1),
224SOC_DAPM_SINGLE("DACR2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 2, 1, 1),
225};
226
227static const struct snd_kcontrol_new alc5632_mono_mixer_controls[] = {
228SOC_DAPM_SINGLE("ADC2MONO_L Playback Switch", ALC5632_ADC_REC_GAIN, 14, 1, 1),
229SOC_DAPM_SINGLE("ADC2MONO_R Playback Switch", ALC5632_ADC_REC_GAIN, 6, 1, 1),
230SOC_DAPM_SINGLE("LI2MONO Playback Switch", ALC5632_LINE_IN_VOL, 13, 1, 1),
231SOC_DAPM_SINGLE("MIC12MONO Playback Switch",
232 ALC5632_MIC_ROUTING_CTRL, 13, 1, 1),
233SOC_DAPM_SINGLE("MIC22MONO Playback Switch",
234 ALC5632_MIC_ROUTING_CTRL, 9, 1, 1),
235SOC_DAPM_SINGLE("DAC2MONO Playback Switch", ALC5632_MIC_ROUTING_CTRL, 0, 1, 1),
236SOC_DAPM_SINGLE("VOICE2MONO Playback Switch", ALC5632_VOICE_DAC_VOL, 13, 1, 1),
237};
238
239static const struct snd_kcontrol_new alc5632_speaker_mixer_controls[] = {
240SOC_DAPM_SINGLE("LI2SPK Playback Switch", ALC5632_LINE_IN_VOL, 14, 1, 1),
241SOC_DAPM_SINGLE("PHONE2SPK Playback Switch", ALC5632_PHONE_IN_VOL, 14, 1, 1),
242SOC_DAPM_SINGLE("MIC12SPK Playback Switch",
243 ALC5632_MIC_ROUTING_CTRL, 14, 1, 1),
244SOC_DAPM_SINGLE("MIC22SPK Playback Switch",
245 ALC5632_MIC_ROUTING_CTRL, 10, 1, 1),
246SOC_DAPM_SINGLE("DAC2SPK Playback Switch", ALC5632_MIC_ROUTING_CTRL, 1, 1, 1),
247SOC_DAPM_SINGLE("VOICE2SPK Playback Switch", ALC5632_VOICE_DAC_VOL, 14, 1, 1),
248};
249
250/* Left Record Mixer */
251static const struct snd_kcontrol_new alc5632_captureL_mixer_controls[] = {
a15a9af2
AD		 252SOC_DAPM_SINGLE("MIC12REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 14, 1, 1),
253SOC_DAPM_SINGLE("MIC22REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 13, 1, 1),
254SOC_DAPM_SINGLE("LIL2REC Capture Switch", ALC5632_ADC_REC_MIXER, 12, 1, 1),
255SOC_DAPM_SINGLE("PH2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 11, 1, 1),
256SOC_DAPM_SINGLE("HPL2REC Capture Switch", ALC5632_ADC_REC_MIXER, 10, 1, 1),
257SOC_DAPM_SINGLE("SPK2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 9, 1, 1),
258SOC_DAPM_SINGLE("MONO2REC_L Capture Switch", ALC5632_ADC_REC_MIXER, 8, 1, 1),
94d5f7c0
LR		 259};
260
261/* Right Record Mixer */
262static const struct snd_kcontrol_new alc5632_captureR_mixer_controls[] = {
a15a9af2
AD		 263SOC_DAPM_SINGLE("MIC12REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 6, 1, 1),
264SOC_DAPM_SINGLE("MIC22REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 5, 1, 1),
265SOC_DAPM_SINGLE("LIR2REC Capture Switch", ALC5632_ADC_REC_MIXER, 4, 1, 1),
266SOC_DAPM_SINGLE("PH2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 3, 1, 1),
267SOC_DAPM_SINGLE("HPR2REC Capture Switch", ALC5632_ADC_REC_MIXER, 2, 1, 1),
268SOC_DAPM_SINGLE("SPK2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 1, 1, 1),
269SOC_DAPM_SINGLE("MONO2REC_R Capture Switch", ALC5632_ADC_REC_MIXER, 0, 1, 1),
94d5f7c0
LR		 270};
271
5e4e94a9
AD		 272/* Dmic Mixer */
273static const struct snd_kcontrol_new alc5632_dmicl_mixer_controls[] = {
274SOC_DAPM_SINGLE("DMICL2ADC Capture Switch", ALC5632_DIGI_BOOST_CTRL, 7, 1, 1),
275};
276static const struct snd_kcontrol_new alc5632_dmicr_mixer_controls[] = {
277SOC_DAPM_SINGLE("DMICR2ADC Capture Switch", ALC5632_DIGI_BOOST_CTRL, 6, 1, 1),
278};
279
75b3566f 280static const char * const alc5632_spk_n_sour_sel[] = {
94d5f7c0 281 "RN/-R", "RP/+R", "LN/-R", "Mute"};
75b3566f 282static const char * const alc5632_hpl_out_input_sel[] = {
94d5f7c0 283 "Vmid", "HP Left Mix"};
75b3566f 284static const char * const alc5632_hpr_out_input_sel[] = {
94d5f7c0 285 "Vmid", "HP Right Mix"};
75b3566f 286static const char * const alc5632_spkout_input_sel[] = {
94d5f7c0 287 "Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
75b3566f 288static const char * const alc5632_aux_out_input_sel[] = {
94d5f7c0 289 "Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"};
75b3566f
AD		 290static const char * const alc5632_adcr_func_sel[] = {
291 "Stereo ADC", "Voice ADC"};
292static const char * const alc5632_i2s_out_sel[] = {
293 "ADC LR", "Voice Stereo Digital"};
94d5f7c0
LR		 294
295/* auxout output mux */
e84f2463
TI		 296static SOC_ENUM_SINGLE_DECL(alc5632_aux_out_input_enum,
297 ALC5632_OUTPUT_MIXER_CTRL, 6,
298 alc5632_aux_out_input_sel);
94d5f7c0
LR		 299static const struct snd_kcontrol_new alc5632_auxout_mux_controls =
300SOC_DAPM_ENUM("AuxOut Mux", alc5632_aux_out_input_enum);
301
302/* speaker output mux */
e84f2463
TI		 303static SOC_ENUM_SINGLE_DECL(alc5632_spkout_input_enum,
304 ALC5632_OUTPUT_MIXER_CTRL, 10,
305 alc5632_spkout_input_sel);
94d5f7c0
LR		 306static const struct snd_kcontrol_new alc5632_spkout_mux_controls =
307SOC_DAPM_ENUM("SpeakerOut Mux", alc5632_spkout_input_enum);
308
309/* headphone left output mux */
e84f2463
TI		 310static SOC_ENUM_SINGLE_DECL(alc5632_hpl_out_input_enum,
311 ALC5632_OUTPUT_MIXER_CTRL, 9,
312 alc5632_hpl_out_input_sel);
94d5f7c0
LR		 313static const struct snd_kcontrol_new alc5632_hpl_out_mux_controls =
314SOC_DAPM_ENUM("Left Headphone Mux", alc5632_hpl_out_input_enum);
315
316/* headphone right output mux */
e84f2463
TI		 317static SOC_ENUM_SINGLE_DECL(alc5632_hpr_out_input_enum,
318 ALC5632_OUTPUT_MIXER_CTRL, 8,
319 alc5632_hpr_out_input_sel);
94d5f7c0
LR		 320static const struct snd_kcontrol_new alc5632_hpr_out_mux_controls =
321SOC_DAPM_ENUM("Right Headphone Mux", alc5632_hpr_out_input_enum);
322
323/* speaker output N select */
e84f2463
TI		 324static SOC_ENUM_SINGLE_DECL(alc5632_spk_n_sour_enum,
325 ALC5632_OUTPUT_MIXER_CTRL, 14,
326 alc5632_spk_n_sour_sel);
94d5f7c0
LR		 327static const struct snd_kcontrol_new alc5632_spkoutn_mux_controls =
328SOC_DAPM_ENUM("SpeakerOut N Mux", alc5632_spk_n_sour_enum);
329
330/* speaker amplifier */
331static const char *alc5632_amp_names[] = {"AB Amp", "D Amp"};
e84f2463
TI		 332static SOC_ENUM_SINGLE_DECL(alc5632_amp_enum,
333 ALC5632_OUTPUT_MIXER_CTRL, 13,
334 alc5632_amp_names);
94d5f7c0
LR		 335static const struct snd_kcontrol_new alc5632_amp_mux_controls =
336 SOC_DAPM_ENUM("AB-D Amp Mux", alc5632_amp_enum);
337
75b3566f 338/* ADC output select */
e84f2463
TI		 339static SOC_ENUM_SINGLE_DECL(alc5632_adcr_func_enum,
340 ALC5632_DAC_FUNC_SELECT, 5,
341 alc5632_adcr_func_sel);
75b3566f
AD		 342static const struct snd_kcontrol_new alc5632_adcr_func_controls =
343 SOC_DAPM_ENUM("ADCR Mux", alc5632_adcr_func_enum);
344
345/* I2S out select */
e84f2463
TI		 346static SOC_ENUM_SINGLE_DECL(alc5632_i2s_out_enum,
347 ALC5632_I2S_OUT_CTL, 5,
348 alc5632_i2s_out_sel);
75b3566f
AD		 349static const struct snd_kcontrol_new alc5632_i2s_out_controls =
350 SOC_DAPM_ENUM("I2SOut Mux", alc5632_i2s_out_enum);
94d5f7c0
LR		 351
352static const struct snd_soc_dapm_widget alc5632_dapm_widgets[] = {
353/* Muxes */
354SND_SOC_DAPM_MUX("AuxOut Mux", SND_SOC_NOPM, 0, 0,
355 &alc5632_auxout_mux_controls),
356SND_SOC_DAPM_MUX("SpeakerOut Mux", SND_SOC_NOPM, 0, 0,
357 &alc5632_spkout_mux_controls),
358SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0,
359 &alc5632_hpl_out_mux_controls),
360SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0,
361 &alc5632_hpr_out_mux_controls),
362SND_SOC_DAPM_MUX("SpeakerOut N Mux", SND_SOC_NOPM, 0, 0,
363 &alc5632_spkoutn_mux_controls),
75b3566f
AD		 364SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
365 &alc5632_adcr_func_controls),
9e751779 366SND_SOC_DAPM_MUX("I2SOut Mux", ALC5632_PWR_MANAG_ADD1, 11, 0,
75b3566f 367 &alc5632_i2s_out_controls),
94d5f7c0
LR		 368
369/* output mixers */
370SND_SOC_DAPM_MIXER("HP Mix", SND_SOC_NOPM, 0, 0,
371 &alc5632_hp_mixer_controls[0],
372 ARRAY_SIZE(alc5632_hp_mixer_controls)),
373SND_SOC_DAPM_MIXER("HPR Mix", ALC5632_PWR_MANAG_ADD2, 4, 0,
374 &alc5632_hpr_mixer_controls[0],
375 ARRAY_SIZE(alc5632_hpr_mixer_controls)),
376SND_SOC_DAPM_MIXER("HPL Mix", ALC5632_PWR_MANAG_ADD2, 5, 0,
377 &alc5632_hpl_mixer_controls[0],
378 ARRAY_SIZE(alc5632_hpl_mixer_controls)),
379SND_SOC_DAPM_MIXER("HPOut Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
380SND_SOC_DAPM_MIXER("Mono Mix", ALC5632_PWR_MANAG_ADD2, 2, 0,
381 &alc5632_mono_mixer_controls[0],
382 ARRAY_SIZE(alc5632_mono_mixer_controls)),
383SND_SOC_DAPM_MIXER("Speaker Mix", ALC5632_PWR_MANAG_ADD2, 3, 0,
384 &alc5632_speaker_mixer_controls[0],
385 ARRAY_SIZE(alc5632_speaker_mixer_controls)),
5e4e94a9
AD		 386SND_SOC_DAPM_MIXER("DMICL Mix", SND_SOC_NOPM, 0, 0,
387 &alc5632_dmicl_mixer_controls[0],
388 ARRAY_SIZE(alc5632_dmicl_mixer_controls)),
389SND_SOC_DAPM_MIXER("DMICR Mix", SND_SOC_NOPM, 0, 0,
390 &alc5632_dmicr_mixer_controls[0],
391 ARRAY_SIZE(alc5632_dmicr_mixer_controls)),
94d5f7c0
LR		 392
393/* input mixers */
394SND_SOC_DAPM_MIXER("Left Capture Mix", ALC5632_PWR_MANAG_ADD2, 1, 0,
395 &alc5632_captureL_mixer_controls[0],
396 ARRAY_SIZE(alc5632_captureL_mixer_controls)),
397SND_SOC_DAPM_MIXER("Right Capture Mix", ALC5632_PWR_MANAG_ADD2, 0, 0,
398 &alc5632_captureR_mixer_controls[0],
399 ARRAY_SIZE(alc5632_captureR_mixer_controls)),
400
75b3566f
AD		 401SND_SOC_DAPM_AIF_IN("AIFRXL", "Left HiFi Playback", 0, SND_SOC_NOPM, 0, 0),
402SND_SOC_DAPM_AIF_IN("AIFRXR", "Right HiFi Playback", 0, SND_SOC_NOPM, 0, 0),
403SND_SOC_DAPM_AIF_OUT("AIFTXL", "Left HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
404SND_SOC_DAPM_AIF_OUT("AIFTXR", "Right HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
405SND_SOC_DAPM_AIF_IN("VAIFRX", "Voice Playback", 0, SND_SOC_NOPM, 0, 0),
406SND_SOC_DAPM_AIF_OUT("VAIFTX", "Voice Capture", 0, SND_SOC_NOPM, 0, 0),
407
408SND_SOC_DAPM_DAC("Voice DAC", NULL, ALC5632_PWR_MANAG_ADD2, 10, 0),
409SND_SOC_DAPM_DAC("Left DAC", NULL, ALC5632_PWR_MANAG_ADD2, 9, 0),
410SND_SOC_DAPM_DAC("Right DAC", NULL, ALC5632_PWR_MANAG_ADD2, 8, 0),
411SND_SOC_DAPM_ADC("Left ADC", NULL, ALC5632_PWR_MANAG_ADD2, 7, 0),
412SND_SOC_DAPM_ADC("Right ADC", NULL, ALC5632_PWR_MANAG_ADD2, 6, 0),
413
94d5f7c0
LR		 414SND_SOC_DAPM_MIXER("DAC Left Channel", ALC5632_PWR_MANAG_ADD1, 15, 0, NULL, 0),
415SND_SOC_DAPM_MIXER("DAC Right Channel",
416 ALC5632_PWR_MANAG_ADD1, 14, 0, NULL, 0),
417SND_SOC_DAPM_MIXER("I2S Mix", ALC5632_PWR_MANAG_ADD1, 11, 0, NULL, 0),
418SND_SOC_DAPM_MIXER("Phone Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
419SND_SOC_DAPM_MIXER("Line Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
75b3566f
AD		 420SND_SOC_DAPM_MIXER("Voice Mix", SND_SOC_NOPM, 0, 0, NULL, 0),
421SND_SOC_DAPM_MIXER("ADCLR", SND_SOC_NOPM, 0, 0, NULL, 0),
422
94d5f7c0
LR		 423SND_SOC_DAPM_PGA("Left Headphone", ALC5632_PWR_MANAG_ADD3, 11, 0, NULL, 0),
424SND_SOC_DAPM_PGA("Right Headphone", ALC5632_PWR_MANAG_ADD3, 10, 0, NULL, 0),
425SND_SOC_DAPM_PGA("Left Speaker", ALC5632_PWR_MANAG_ADD3, 13, 0, NULL, 0),
426SND_SOC_DAPM_PGA("Right Speaker", ALC5632_PWR_MANAG_ADD3, 12, 0, NULL, 0),
427SND_SOC_DAPM_PGA("Aux Out", ALC5632_PWR_MANAG_ADD3, 14, 0, NULL, 0),
428SND_SOC_DAPM_PGA("Left LineIn", ALC5632_PWR_MANAG_ADD3, 7, 0, NULL, 0),
429SND_SOC_DAPM_PGA("Right LineIn", ALC5632_PWR_MANAG_ADD3, 6, 0, NULL, 0),
430SND_SOC_DAPM_PGA("Phone", ALC5632_PWR_MANAG_ADD3, 5, 0, NULL, 0),
431SND_SOC_DAPM_PGA("Phone ADMix", ALC5632_PWR_MANAG_ADD3, 4, 0, NULL, 0),
432SND_SOC_DAPM_PGA("MIC1 PGA", ALC5632_PWR_MANAG_ADD3, 3, 0, NULL, 0),
433SND_SOC_DAPM_PGA("MIC2 PGA", ALC5632_PWR_MANAG_ADD3, 2, 0, NULL, 0),
434SND_SOC_DAPM_PGA("MIC1 Pre Amp", ALC5632_PWR_MANAG_ADD3, 1, 0, NULL, 0),
435SND_SOC_DAPM_PGA("MIC2 Pre Amp", ALC5632_PWR_MANAG_ADD3, 0, 0, NULL, 0),
9215aa4d
LR		 436SND_SOC_DAPM_SUPPLY("MICBIAS1", ALC5632_PWR_MANAG_ADD1, 3, 0, NULL, 0),
437SND_SOC_DAPM_SUPPLY("MICBIAS2", ALC5632_PWR_MANAG_ADD1, 2, 0, NULL, 0),
94d5f7c0
LR		 438
439SND_SOC_DAPM_PGA_E("D Amp", ALC5632_PWR_MANAG_ADD2, 14, 0, NULL, 0,
440 amp_mixer_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
441SND_SOC_DAPM_PGA("AB Amp", ALC5632_PWR_MANAG_ADD2, 15, 0, NULL, 0),
442SND_SOC_DAPM_MUX("AB-D Amp Mux", ALC5632_PWR_MANAG_ADD1, 10, 0,
443 &alc5632_amp_mux_controls),
444
445SND_SOC_DAPM_OUTPUT("AUXOUT"),
446SND_SOC_DAPM_OUTPUT("HPL"),
447SND_SOC_DAPM_OUTPUT("HPR"),
448SND_SOC_DAPM_OUTPUT("SPKOUT"),
449SND_SOC_DAPM_OUTPUT("SPKOUTN"),
75b3566f 450
94d5f7c0
LR		 451SND_SOC_DAPM_INPUT("LINEINL"),
452SND_SOC_DAPM_INPUT("LINEINR"),
453SND_SOC_DAPM_INPUT("PHONEP"),
454SND_SOC_DAPM_INPUT("PHONEN"),
75b3566f 455SND_SOC_DAPM_INPUT("DMICDAT"),
94d5f7c0
LR		 456SND_SOC_DAPM_INPUT("MIC1"),
457SND_SOC_DAPM_INPUT("MIC2"),
458SND_SOC_DAPM_VMID("Vmid"),
459};
460
461
462static const struct snd_soc_dapm_route alc5632_dapm_routes[] = {
75b3566f
AD		 463 /* Playback streams */
464 {"Left DAC", NULL, "AIFRXL"},
465 {"Right DAC", NULL, "AIFRXR"},
466
94d5f7c0
LR		 467 /* virtual mixer - mixes left & right channels */
468 {"I2S Mix", NULL, "Left DAC"},
469 {"I2S Mix", NULL, "Right DAC"},
470 {"Line Mix", NULL, "Right LineIn"},
471 {"Line Mix", NULL, "Left LineIn"},
472 {"Phone Mix", NULL, "Phone"},
473 {"Phone Mix", NULL, "Phone ADMix"},
474 {"AUXOUT", NULL, "Aux Out"},
475
476 /* DAC */
477 {"DAC Right Channel", NULL, "I2S Mix"},
478 {"DAC Left Channel", NULL, "I2S Mix"},
479
480 /* HP mixer */
481 {"HPL Mix", "ADC2HP_L Playback Switch", "Left Capture Mix"},
482 {"HPL Mix", NULL, "HP Mix"},
483 {"HPR Mix", "ADC2HP_R Playback Switch", "Right Capture Mix"},
484 {"HPR Mix", NULL, "HP Mix"},
485 {"HP Mix", "LI2HP Playback Switch", "Line Mix"},
486 {"HP Mix", "PHONE2HP Playback Switch", "Phone Mix"},
487 {"HP Mix", "MIC12HP Playback Switch", "MIC1 PGA"},
488 {"HP Mix", "MIC22HP Playback Switch", "MIC2 PGA"},
75b3566f 489 {"HP Mix", "VOICE2HP Playback Switch", "Voice Mix"},
94d5f7c0
LR		 490 {"HPR Mix", "DACR2HP Playback Switch", "DAC Right Channel"},
491 {"HPL Mix", "DACL2HP Playback Switch", "DAC Left Channel"},
2435d46f
MD		 492 {"HPOut Mix", NULL, "HP Mix"},
493 {"HPOut Mix", NULL, "HPR Mix"},
494 {"HPOut Mix", NULL, "HPL Mix"},
94d5f7c0
LR		 495
496 /* speaker mixer */
497 {"Speaker Mix", "LI2SPK Playback Switch", "Line Mix"},
498 {"Speaker Mix", "PHONE2SPK Playback Switch", "Phone Mix"},
499 {"Speaker Mix", "MIC12SPK Playback Switch", "MIC1 PGA"},
500 {"Speaker Mix", "MIC22SPK Playback Switch", "MIC2 PGA"},
501 {"Speaker Mix", "DAC2SPK Playback Switch", "DAC Left Channel"},
75b3566f 502 {"Speaker Mix", "VOICE2SPK Playback Switch", "Voice Mix"},
94d5f7c0 503
94d5f7c0
LR		 504 /* mono mixer */
505 {"Mono Mix", "ADC2MONO_L Playback Switch", "Left Capture Mix"},
506 {"Mono Mix", "ADC2MONO_R Playback Switch", "Right Capture Mix"},
507 {"Mono Mix", "LI2MONO Playback Switch", "Line Mix"},
94d5f7c0
LR		 508 {"Mono Mix", "MIC12MONO Playback Switch", "MIC1 PGA"},
509 {"Mono Mix", "MIC22MONO Playback Switch", "MIC2 PGA"},
510 {"Mono Mix", "DAC2MONO Playback Switch", "DAC Left Channel"},
75b3566f 511 {"Mono Mix", "VOICE2MONO Playback Switch", "Voice Mix"},
94d5f7c0
LR		 512
513 /* Left record mixer */
a15a9af2
AD		 514 {"Left Capture Mix", "LIL2REC Capture Switch", "LINEINL"},
515 {"Left Capture Mix", "PH2REC_L Capture Switch", "PHONEN"},
516 {"Left Capture Mix", "MIC12REC_L Capture Switch", "MIC1 Pre Amp"},
517 {"Left Capture Mix", "MIC22REC_L Capture Switch", "MIC2 Pre Amp"},
518 {"Left Capture Mix", "HPL2REC Capture Switch", "HPL Mix"},
519 {"Left Capture Mix", "SPK2REC_L Capture Switch", "Speaker Mix"},
520 {"Left Capture Mix", "MONO2REC_L Capture Switch", "Mono Mix"},
94d5f7c0
LR		 521
522 /*Right record mixer */
a15a9af2
AD		 523 {"Right Capture Mix", "LIR2REC Capture Switch", "LINEINR"},
524 {"Right Capture Mix", "PH2REC_R Capture Switch", "PHONEP"},
525 {"Right Capture Mix", "MIC12REC_R Capture Switch", "MIC1 Pre Amp"},
526 {"Right Capture Mix", "MIC22REC_R Capture Switch", "MIC2 Pre Amp"},
527 {"Right Capture Mix", "HPR2REC Capture Switch", "HPR Mix"},
528 {"Right Capture Mix", "SPK2REC_R Capture Switch", "Speaker Mix"},
529 {"Right Capture Mix", "MONO2REC_R Capture Switch", "Mono Mix"},
94d5f7c0
LR		 530
531 /* headphone left mux */
532 {"Left Headphone Mux", "HP Left Mix", "HPL Mix"},
533 {"Left Headphone Mux", "Vmid", "Vmid"},
534
535 /* headphone right mux */
536 {"Right Headphone Mux", "HP Right Mix", "HPR Mix"},
537 {"Right Headphone Mux", "Vmid", "Vmid"},
538
539 /* speaker out mux */
540 {"SpeakerOut Mux", "Vmid", "Vmid"},
541 {"SpeakerOut Mux", "HPOut Mix", "HPOut Mix"},
542 {"SpeakerOut Mux", "Speaker Mix", "Speaker Mix"},
543 {"SpeakerOut Mux", "Mono Mix", "Mono Mix"},
544
545 /* Mono/Aux Out mux */
546 {"AuxOut Mux", "Vmid", "Vmid"},
547 {"AuxOut Mux", "HPOut Mix", "HPOut Mix"},
548 {"AuxOut Mux", "Speaker Mix", "Speaker Mix"},
549 {"AuxOut Mux", "Mono Mix", "Mono Mix"},
550
551 /* output pga */
552 {"HPL", NULL, "Left Headphone"},
553 {"Left Headphone", NULL, "Left Headphone Mux"},
554 {"HPR", NULL, "Right Headphone"},
555 {"Right Headphone", NULL, "Right Headphone Mux"},
556 {"Aux Out", NULL, "AuxOut Mux"},
557
558 /* input pga */
559 {"Left LineIn", NULL, "LINEINL"},
560 {"Right LineIn", NULL, "LINEINR"},
561 {"Phone", NULL, "PHONEP"},
562 {"MIC1 Pre Amp", NULL, "MIC1"},
563 {"MIC2 Pre Amp", NULL, "MIC2"},
564 {"MIC1 PGA", NULL, "MIC1 Pre Amp"},
565 {"MIC2 PGA", NULL, "MIC2 Pre Amp"},
566
567 /* left ADC */
568 {"Left ADC", NULL, "Left Capture Mix"},
5e4e94a9
AD		 569 {"DMICL Mix", "DMICL2ADC Capture Switch", "DMICDAT"},
570 {"Left ADC", NULL, "DMICL Mix"},
75b3566f 571 {"ADCLR", NULL, "Left ADC"},
94d5f7c0
LR		 572
573 /* right ADC */
75b3566f 574 {"Right ADC", NULL, "Right Capture Mix"},
5e4e94a9
AD		 575 {"DMICR Mix", "DMICR2ADC Capture Switch", "DMICDAT"},
576 {"Right ADC", NULL, "DMICR Mix"},
75b3566f
AD		 577 {"ADCR Mux", "Stereo ADC", "Right ADC"},
578 {"ADCR Mux", "Voice ADC", "Right ADC"},
579 {"ADCLR", NULL, "ADCR Mux"},
580 {"VAIFTX", NULL, "ADCR Mux"},
581
582 /* Digital I2S out */
583 {"I2SOut Mux", "ADC LR", "ADCLR"},
584 {"I2SOut Mux", "Voice Stereo Digital", "VAIFRX"},
585 {"AIFTXL", NULL, "I2SOut Mux"},
586 {"AIFTXR", NULL, "I2SOut Mux"},
587
588 /* Voice Mix */
589 {"Voice DAC", NULL, "VAIFRX"},
590 {"Voice Mix", NULL, "Voice DAC"},
591
592 /* Speaker Output */
94d5f7c0
LR		 593 {"SpeakerOut N Mux", "RN/-R", "Left Speaker"},
594 {"SpeakerOut N Mux", "RP/+R", "Left Speaker"},
595 {"SpeakerOut N Mux", "LN/-R", "Left Speaker"},
596 {"SpeakerOut N Mux", "Mute", "Vmid"},
597
598 {"SpeakerOut N Mux", "RN/-R", "Right Speaker"},
599 {"SpeakerOut N Mux", "RP/+R", "Right Speaker"},
600 {"SpeakerOut N Mux", "LN/-R", "Right Speaker"},
601 {"SpeakerOut N Mux", "Mute", "Vmid"},
602
603 {"AB Amp", NULL, "SpeakerOut Mux"},
604 {"D Amp", NULL, "SpeakerOut Mux"},
605 {"AB-D Amp Mux", "AB Amp", "AB Amp"},
606 {"AB-D Amp Mux", "D Amp", "D Amp"},
607 {"Left Speaker", NULL, "AB-D Amp Mux"},
608 {"Right Speaker", NULL, "AB-D Amp Mux"},
609
610 {"SPKOUT", NULL, "Left Speaker"},
611 {"SPKOUT", NULL, "Right Speaker"},
612
613 {"SPKOUTN", NULL, "SpeakerOut N Mux"},
614
615};
616
617/* PLL divisors */
618struct _pll_div {
619 u32 pll_in;
620 u32 pll_out;
621 u16 regvalue;
622};
623
624/* Note : pll code from original alc5632 driver. Not sure of how good it is */
73678804 625/* useful only for master mode */
94d5f7c0
LR		 626static const struct _pll_div codec_master_pll_div[] = {
627
628 { 2048000, 8192000, 0x0ea0},
629 { 3686400, 8192000, 0x4e27},
630 { 12000000, 8192000, 0x456b},
631 { 13000000, 8192000, 0x495f},
632 { 13100000, 8192000, 0x0320},
633 { 2048000, 11289600, 0xf637},
634 { 3686400, 11289600, 0x2f22},
635 { 12000000, 11289600, 0x3e2f},
636 { 13000000, 11289600, 0x4d5b},
637 { 13100000, 11289600, 0x363b},
638 { 2048000, 16384000, 0x1ea0},
639 { 3686400, 16384000, 0x9e27},
640 { 12000000, 16384000, 0x452b},
641 { 13000000, 16384000, 0x542f},
642 { 13100000, 16384000, 0x03a0},
643 { 2048000, 16934400, 0xe625},
644 { 3686400, 16934400, 0x9126},
645 { 12000000, 16934400, 0x4d2c},
646 { 13000000, 16934400, 0x742f},
647 { 13100000, 16934400, 0x3c27},
648 { 2048000, 22579200, 0x2aa0},
649 { 3686400, 22579200, 0x2f20},
650 { 12000000, 22579200, 0x7e2f},
651 { 13000000, 22579200, 0x742f},
652 { 13100000, 22579200, 0x3c27},
653 { 2048000, 24576000, 0x2ea0},
654 { 3686400, 24576000, 0xee27},
655 { 12000000, 24576000, 0x2915},
656 { 13000000, 24576000, 0x772e},
657 { 13100000, 24576000, 0x0d20},
658};
659
660/* FOUT = MCLK*(N+2)/((M+2)*(K+2))
661 N: bit 15:8 (div 2 .. div 257)
662 K: bit 6:4 typical 2
663 M: bit 3:0 (div 2 .. div 17)
664
665 same as for 5623 - thanks!
666*/
667
668static const struct _pll_div codec_slave_pll_div[] = {
669
670 { 1024000, 16384000, 0x3ea0},
671 { 1411200, 22579200, 0x3ea0},
672 { 1536000, 24576000, 0x3ea0},
673 { 2048000, 16384000, 0x1ea0},
674 { 2822400, 22579200, 0x1ea0},
675 { 3072000, 24576000, 0x1ea0},
676
677};
678
679static int alc5632_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
680 int source, unsigned int freq_in, unsigned int freq_out)
681{
682 int i;
683 struct snd_soc_codec *codec = codec_dai->codec;
684 int gbl_clk = 0, pll_div = 0;
685 u16 reg;
686
687 if (pll_id < ALC5632_PLL_FR_MCLK || pll_id > ALC5632_PLL_FR_VBCLK)
688 return -EINVAL;
689
690 /* Disable PLL power */
691 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
692 ALC5632_PWR_ADD2_PLL1,
693 0);
694 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
695 ALC5632_PWR_ADD2_PLL2,
696 0);
697
698 /* pll is not used in slave mode */
699 reg = snd_soc_read(codec, ALC5632_DAI_CONTROL);
700 if (reg & ALC5632_DAI_SDP_SLAVE_MODE)
701 return 0;
702
703 if (!freq_in || !freq_out)
704 return 0;
705
706 switch (pll_id) {
707 case ALC5632_PLL_FR_MCLK:
708 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) {
709 if (codec_master_pll_div[i].pll_in == freq_in
710 && codec_master_pll_div[i].pll_out == freq_out) {
711 /* PLL source from MCLK */
712 pll_div = codec_master_pll_div[i].regvalue;
713 break;
714 }
715 }
716 break;
717 case ALC5632_PLL_FR_BCLK:
718 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
719 if (codec_slave_pll_div[i].pll_in == freq_in
720 && codec_slave_pll_div[i].pll_out == freq_out) {
721 /* PLL source from Bitclk */
722 gbl_clk = ALC5632_PLL_FR_BCLK;
723 pll_div = codec_slave_pll_div[i].regvalue;
724 break;
725 }
726 }
727 break;
728 case ALC5632_PLL_FR_VBCLK:
729 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
730 if (codec_slave_pll_div[i].pll_in == freq_in
731 && codec_slave_pll_div[i].pll_out == freq_out) {
732 /* PLL source from voice clock */
733 gbl_clk = ALC5632_PLL_FR_VBCLK;
734 pll_div = codec_slave_pll_div[i].regvalue;
735 break;
736 }
737 }
738 break;
739 default:
740 return -EINVAL;
741 }
742
743 if (!pll_div)
744 return -EINVAL;
745
746 /* choose MCLK/BCLK/VBCLK */
747 snd_soc_write(codec, ALC5632_GPCR2, gbl_clk);
748 /* choose PLL1 clock rate */
749 snd_soc_write(codec, ALC5632_PLL1_CTRL, pll_div);
750 /* enable PLL1 */
751 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
752 ALC5632_PWR_ADD2_PLL1,
753 ALC5632_PWR_ADD2_PLL1);
754 /* enable PLL2 */
755 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
756 ALC5632_PWR_ADD2_PLL2,
757 ALC5632_PWR_ADD2_PLL2);
758 /* use PLL1 as main SYSCLK */
759 snd_soc_update_bits(codec, ALC5632_GPCR1,
760 ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1,
761 ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1);
762
763 return 0;
764}
765
766struct _coeff_div {
767 u16 fs;
768 u16 regvalue;
769};
770
771/* codec hifi mclk (after PLL) clock divider coefficients */
772/* values inspired from column BCLK=32Fs of Appendix A table */
773static const struct _coeff_div coeff_div[] = {
774 {512*1, 0x3075},
775};
776
777static int get_coeff(struct snd_soc_codec *codec, int rate)
778{
779 struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
780 int i;
781
782 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
783 if (coeff_div[i].fs * rate == alc5632->sysclk)
784 return i;
785 }
786 return -EINVAL;
787}
788
789/*
790 * Clock after PLL and dividers
791 */
792static int alc5632_set_dai_sysclk(struct snd_soc_dai *codec_dai,
793 int clk_id, unsigned int freq, int dir)
794{
795 struct snd_soc_codec *codec = codec_dai->codec;
796 struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
797
798 switch (freq) {
0f613c21 799 case 4096000:
94d5f7c0
LR		 800 case 8192000:
801 case 11289600:
802 case 12288000:
803 case 16384000:
804 case 16934400:
805 case 18432000:
806 case 22579200:
807 case 24576000:
808 alc5632->sysclk = freq;
809 return 0;
810 }
811 return -EINVAL;
812}
813
814static int alc5632_set_dai_fmt(struct snd_soc_dai *codec_dai,
815 unsigned int fmt)
816{
817 struct snd_soc_codec *codec = codec_dai->codec;
818 u16 iface = 0;
819
820 /* set master/slave audio interface */
821 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
822 case SND_SOC_DAIFMT_CBM_CFM:
823 iface = ALC5632_DAI_SDP_MASTER_MODE;
824 break;
825 case SND_SOC_DAIFMT_CBS_CFS:
826 iface = ALC5632_DAI_SDP_SLAVE_MODE;
827 break;
828 default:
829 return -EINVAL;
830 }
831
832 /* interface format */
833 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
834 case SND_SOC_DAIFMT_I2S:
835 iface |= ALC5632_DAI_I2S_DF_I2S;
836 break;
837 case SND_SOC_DAIFMT_LEFT_J:
838 iface |= ALC5632_DAI_I2S_DF_LEFT;
839 break;
840 case SND_SOC_DAIFMT_DSP_A:
841 iface |= ALC5632_DAI_I2S_DF_PCM_A;
842 break;
843 case SND_SOC_DAIFMT_DSP_B:
844 iface |= ALC5632_DAI_I2S_DF_PCM_B;
845 break;
846 default:
847 return -EINVAL;
848 }
849
850 /* clock inversion */
851 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
852 case SND_SOC_DAIFMT_NB_NF:
853 break;
854 case SND_SOC_DAIFMT_IB_IF:
855 iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL;
856 break;
857 case SND_SOC_DAIFMT_IB_NF:
858 iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL;
859 break;
860 case SND_SOC_DAIFMT_NB_IF:
861 break;
862 default:
863 return -EINVAL;
864 }
865
866 return snd_soc_write(codec, ALC5632_DAI_CONTROL, iface);
867}
868
869static int alc5632_pcm_hw_params(struct snd_pcm_substream *substream,
870 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
871{
e6968a17 872 struct snd_soc_codec *codec = dai->codec;
94d5f7c0
LR		 873 int coeff, rate;
874 u16 iface;
875
876 iface = snd_soc_read(codec, ALC5632_DAI_CONTROL);
877 iface &= ~ALC5632_DAI_I2S_DL_MASK;
878
879 /* bit size */
2dad2283
MB		 880 switch (params_width(params)) {
881 case 16:
94d5f7c0
LR		 882 iface |= ALC5632_DAI_I2S_DL_16;
883 break;
2dad2283 884 case 20:
94d5f7c0
LR		 885 iface |= ALC5632_DAI_I2S_DL_20;
886 break;
2dad2283 887 case 24:
94d5f7c0
LR		 888 iface |= ALC5632_DAI_I2S_DL_24;
889 break;
890 default:
891 return -EINVAL;
892 }
893
894 /* set iface & srate */
895 snd_soc_write(codec, ALC5632_DAI_CONTROL, iface);
896 rate = params_rate(params);
897 coeff = get_coeff(codec, rate);
898 if (coeff < 0)
899 return -EINVAL;
900
901 coeff = coeff_div[coeff].regvalue;
902 snd_soc_write(codec, ALC5632_DAC_CLK_CTRL1, coeff);
903
904 return 0;
905}
906
907static int alc5632_mute(struct snd_soc_dai *dai, int mute)
908{
909 struct snd_soc_codec *codec = dai->codec;
88c494b9 910 u16 hp_mute = ALC5632_MISC_HP_DEPOP_MUTE_L
94d5f7c0
LR		 911 |ALC5632_MISC_HP_DEPOP_MUTE_R;
912 u16 mute_reg = snd_soc_read(codec, ALC5632_MISC_CTRL) & ~hp_mute;
913
914 if (mute)
915 mute_reg |= hp_mute;
916
917 return snd_soc_write(codec, ALC5632_MISC_CTRL, mute_reg);
918}
919
920#define ALC5632_ADD2_POWER_EN (ALC5632_PWR_ADD2_VREF)
921
922#define ALC5632_ADD3_POWER_EN (ALC5632_PWR_ADD3_MIC1_BOOST_AD)
923
924#define ALC5632_ADD1_POWER_EN \
925 (ALC5632_PWR_ADD1_DAC_REF \
926 | ALC5632_PWR_ADD1_SOFTGEN_EN \
927 | ALC5632_PWR_ADD1_HP_OUT_AMP \
928 | ALC5632_PWR_ADD1_HP_OUT_ENH_AMP \
929 | ALC5632_PWR_ADD1_MAIN_BIAS)
930
931static void enable_power_depop(struct snd_soc_codec *codec)
932{
933 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1,
934 ALC5632_PWR_ADD1_SOFTGEN_EN,
935 ALC5632_PWR_ADD1_SOFTGEN_EN);
936
937 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD3,
938 ALC5632_ADD3_POWER_EN,
939 ALC5632_ADD3_POWER_EN);
940
941 snd_soc_update_bits(codec, ALC5632_MISC_CTRL,
942 ALC5632_MISC_HP_DEPOP_MODE2_EN,
943 ALC5632_MISC_HP_DEPOP_MODE2_EN);
944
945 /* "normal" mode: 0 @ 26 */
946 /* set all PR0-7 mixers to 0 */
947 snd_soc_update_bits(codec, ALC5632_PWR_DOWN_CTRL_STATUS,
948 ALC5632_PWR_DOWN_CTRL_STATUS_MASK,
949 0);
950
951 msleep(500);
952
953 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
954 ALC5632_ADD2_POWER_EN,
955 ALC5632_ADD2_POWER_EN);
956
957 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1,
958 ALC5632_ADD1_POWER_EN,
959 ALC5632_ADD1_POWER_EN);
960
961 /* disable HP Depop2 */
962 snd_soc_update_bits(codec, ALC5632_MISC_CTRL,
963 ALC5632_MISC_HP_DEPOP_MODE2_EN,
964 0);
965
966}
967
968static int alc5632_set_bias_level(struct snd_soc_codec *codec,
969 enum snd_soc_bias_level level)
970{
971 switch (level) {
972 case SND_SOC_BIAS_ON:
973 enable_power_depop(codec);
974 break;
975 case SND_SOC_BIAS_PREPARE:
976 break;
977 case SND_SOC_BIAS_STANDBY:
978 /* everything off except vref/vmid, */
979 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1,
980 ALC5632_PWR_MANAG_ADD1_MASK,
981 ALC5632_PWR_ADD1_MAIN_BIAS);
982 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
983 ALC5632_PWR_MANAG_ADD2_MASK,
984 ALC5632_PWR_ADD2_VREF);
985 /* "normal" mode: 0 @ 26 */
986 snd_soc_update_bits(codec, ALC5632_PWR_DOWN_CTRL_STATUS,
987 ALC5632_PWR_DOWN_CTRL_STATUS_MASK,
988 0xffff ^ (ALC5632_PWR_VREF_PR3
989 | ALC5632_PWR_VREF_PR2));
990 break;
991 case SND_SOC_BIAS_OFF:
992 /* everything off, dac mute, inactive */
993 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2,
994 ALC5632_PWR_MANAG_ADD2_MASK, 0);
995 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD3,
996 ALC5632_PWR_MANAG_ADD3_MASK, 0);
997 snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1,
998 ALC5632_PWR_MANAG_ADD1_MASK, 0);
999 break;
1000 }
1001 codec->dapm.bias_level = level;
1002 return 0;
1003}
1004
1005#define ALC5632_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \
1006 | SNDRV_PCM_FMTBIT_S24_LE \
1007 | SNDRV_PCM_FMTBIT_S32_LE)
1008
85e7652d 1009static const struct snd_soc_dai_ops alc5632_dai_ops = {
94d5f7c0
LR		 1010 .hw_params = alc5632_pcm_hw_params,
1011 .digital_mute = alc5632_mute,
1012 .set_fmt = alc5632_set_dai_fmt,
1013 .set_sysclk = alc5632_set_dai_sysclk,
1014 .set_pll = alc5632_set_dai_pll,
1015};
1016
1017static struct snd_soc_dai_driver alc5632_dai = {
1018 .name = "alc5632-hifi",
1019 .playback = {
1020 .stream_name = "HiFi Playback",
1021 .channels_min = 1,
1022 .channels_max = 2,
1023 .rate_min = 8000,
1024 .rate_max = 48000,
1025 .rates = SNDRV_PCM_RATE_8000_48000,
1026 .formats = ALC5632_FORMATS,},
1027 .capture = {
1028 .stream_name = "HiFi Capture",
1029 .channels_min = 1,
1030 .channels_max = 2,
1031 .rate_min = 8000,
1032 .rate_max = 48000,
1033 .rates = SNDRV_PCM_RATE_8000_48000,
1034 .formats = ALC5632_FORMATS,},
1035
1036 .ops = &alc5632_dai_ops,
1037 .symmetric_rates = 1,
1038};
1039
c9be8427 1040#ifdef CONFIG_PM
84b315ee 1041static int alc5632_suspend(struct snd_soc_codec *codec)
94d5f7c0
LR		 1042{
1043 alc5632_set_bias_level(codec, SND_SOC_BIAS_OFF);
1044 return 0;
1045}
1046
1047static int alc5632_resume(struct snd_soc_codec *codec)
1048{
bb39753c 1049 struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
94d5f7c0 1050
bb39753c 1051 regcache_sync(alc5632->regmap);
94d5f7c0
LR		 1052
1053 alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1054 return 0;
1055}
c9be8427
LR		 1056#else
1057#define alc5632_suspend NULL
1058#define alc5632_resume NULL
1059#endif
94d5f7c0 1060
94d5f7c0
LR		 1061static int alc5632_probe(struct snd_soc_codec *codec)
1062{
1063 struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
94d5f7c0 1064
94d5f7c0
LR		 1065 /* power on device */
1066 alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1067
1068 switch (alc5632->id) {
1069 case 0x5c:
022658be 1070 snd_soc_add_codec_controls(codec, alc5632_vol_snd_controls,
94d5f7c0
LR		 1071 ARRAY_SIZE(alc5632_vol_snd_controls));
1072 break;
1073 default:
1074 return -EINVAL;
1075 }
1076
e3efe3be 1077 return 0;
94d5f7c0
LR		 1078}
1079
1080/* power down chip */
1081static int alc5632_remove(struct snd_soc_codec *codec)
1082{
1083 alc5632_set_bias_level(codec, SND_SOC_BIAS_OFF);
1084 return 0;
1085}
1086
1087static struct snd_soc_codec_driver soc_codec_device_alc5632 = {
1088 .probe = alc5632_probe,
1089 .remove = alc5632_remove,
1090 .suspend = alc5632_suspend,
1091 .resume = alc5632_resume,
1092 .set_bias_level = alc5632_set_bias_level,
94d5f7c0
LR		 1093 .controls = alc5632_snd_controls,
1094 .num_controls = ARRAY_SIZE(alc5632_snd_controls),
1095 .dapm_widgets = alc5632_dapm_widgets,
1096 .num_dapm_widgets = ARRAY_SIZE(alc5632_dapm_widgets),
1097 .dapm_routes = alc5632_dapm_routes,
1098 .num_dapm_routes = ARRAY_SIZE(alc5632_dapm_routes),
1099};
1100
bb39753c
LR		 1101static struct regmap_config alc5632_regmap = {
1102 .reg_bits = 8,
1103 .val_bits = 16,
1104
1105 .max_register = ALC5632_MAX_REGISTER,
1106 .reg_defaults = alc5632_reg_defaults,
1107 .num_reg_defaults = ARRAY_SIZE(alc5632_reg_defaults),
1108 .volatile_reg = alc5632_volatile_register,
1109 .cache_type = REGCACHE_RBTREE,
1110};
1111
94d5f7c0
LR		 1112/*
1113 * alc5632 2 wire address is determined by A1 pin
1114 * state during powerup.
1115 * low = 0x1a
1116 * high = 0x1b
1117 */
7a79e94e
BP		 1118static int alc5632_i2c_probe(struct i2c_client *client,
1119 const struct i2c_device_id *id)
94d5f7c0
LR		 1120{
1121 struct alc5632_priv *alc5632;
277c01bb
LR		 1122 int ret, ret1, ret2;
1123 unsigned int vid1, vid2;
94d5f7c0
LR		 1124
1125 alc5632 = devm_kzalloc(&client->dev,
1126 sizeof(struct alc5632_priv), GFP_KERNEL);
1127 if (alc5632 == NULL)
1128 return -ENOMEM;
1129
94d5f7c0 1130 i2c_set_clientdata(client, alc5632);
bb39753c 1131
41a41eac 1132 alc5632->regmap = devm_regmap_init_i2c(client, &alc5632_regmap);
bb39753c
LR		 1133 if (IS_ERR(alc5632->regmap)) {
1134 ret = PTR_ERR(alc5632->regmap);
1135 dev_err(&client->dev, "regmap_init() failed: %d\n", ret);
1136 return ret;
1137 }
1138
277c01bb
LR		 1139 ret1 = regmap_read(alc5632->regmap, ALC5632_VENDOR_ID1, &vid1);
1140 ret2 = regmap_read(alc5632->regmap, ALC5632_VENDOR_ID2, &vid2);
1141 if (ret1 != 0 || ret2 != 0) {
1142 dev_err(&client->dev,
1143 "Failed to read chip ID: ret1=%d, ret2=%d\n", ret1, ret2);
277c01bb
LR		 1144 return -EIO;
1145 }
1146
1147 vid2 >>= 8;
1148
1149 if ((vid1 != 0x10EC) || (vid2 != id->driver_data)) {
1150 dev_err(&client->dev,
1151 "Device is not a ALC5632: VID1=0x%x, VID2=0x%x\n", vid1, vid2);
277c01bb
LR		 1152 return -EINVAL;
1153 }
1154
bb39753c
LR		 1155 ret = alc5632_reset(alc5632->regmap);
1156 if (ret < 0) {
1157 dev_err(&client->dev, "Failed to issue reset\n");
bb39753c
LR		 1158 return ret;
1159 }
94d5f7c0 1160
277c01bb
LR		 1161 alc5632->id = vid2;
1162 switch (alc5632->id) {
1163 case 0x5c:
1164 alc5632_dai.name = "alc5632-hifi";
1165 break;
1166 default:
1167 return -EINVAL;
1168 }
1169
1170 ret = snd_soc_register_codec(&client->dev,
94d5f7c0 1171 &soc_codec_device_alc5632, &alc5632_dai, 1);
bb39753c
LR		 1172
1173 if (ret < 0) {
94d5f7c0 1174 dev_err(&client->dev, "Failed to register codec: %d\n", ret);
bb39753c
LR		 1175 return ret;
1176 }
94d5f7c0
LR		 1177
1178 return ret;
1179}
1180
7a79e94e 1181static int alc5632_i2c_remove(struct i2c_client *client)
94d5f7c0
LR		 1182{
1183 snd_soc_unregister_codec(&client->dev);
94d5f7c0
LR		 1184 return 0;
1185}
1186
1187static const struct i2c_device_id alc5632_i2c_table[] = {
1188 {"alc5632", 0x5c},
1189 {}
1190};
1191MODULE_DEVICE_TABLE(i2c, alc5632_i2c_table);
1192
c31b0cb1
SW		 1193static const struct of_device_id alc5632_of_match[] = {
1194 { .compatible = "realtek,alc5632", },
1195 { }
1196};
1197MODULE_DEVICE_TABLE(of, alc5632_of_match);
1198
94d5f7c0
LR		 1199/* i2c codec control layer */
1200static struct i2c_driver alc5632_i2c_driver = {
1201 .driver = {
1202 .name = "alc5632",
1203 .owner = THIS_MODULE,
c31b0cb1 1204 .of_match_table = of_match_ptr(alc5632_of_match),
94d5f7c0
LR		 1205 },
1206 .probe = alc5632_i2c_probe,
7a79e94e 1207 .remove = alc5632_i2c_remove,
94d5f7c0
LR		 1208 .id_table = alc5632_i2c_table,
1209};
1210
8d8c0b36 1211module_i2c_driver(alc5632_i2c_driver);
94d5f7c0
LR		 1212
1213MODULE_DESCRIPTION("ASoC ALC5632 driver");
1214MODULE_AUTHOR("Leon Romanovsky <leon@leon.nu>");
1215MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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