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eef5bb24 BA |
1 | /* |
2 | * cs35l32.c -- CS35L32 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2014 CirrusLogic, Inc. | |
5 | * | |
6 | * Author: Brian Austin <brian.austin@cirrus.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
eef5bb24 BA |
16 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/regulator/consumer.h> | |
25 | #include <linux/gpio/consumer.h> | |
26 | #include <linux/of_device.h> | |
eef5bb24 BA |
27 | #include <sound/core.h> |
28 | #include <sound/pcm.h> | |
29 | #include <sound/pcm_params.h> | |
30 | #include <sound/soc.h> | |
31 | #include <sound/soc-dapm.h> | |
32 | #include <sound/initval.h> | |
33 | #include <sound/tlv.h> | |
34 | #include <dt-bindings/sound/cs35l32.h> | |
35 | ||
36 | #include "cs35l32.h" | |
37 | ||
38 | #define CS35L32_NUM_SUPPLIES 2 | |
39 | static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = { | |
40 | "VA", | |
41 | "VP", | |
42 | }; | |
43 | ||
44 | struct cs35l32_private { | |
45 | struct regmap *regmap; | |
46 | struct snd_soc_codec *codec; | |
47 | struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES]; | |
48 | struct cs35l32_platform_data pdata; | |
49 | struct gpio_desc *reset_gpio; | |
50 | }; | |
51 | ||
52 | static const struct reg_default cs35l32_reg_defaults[] = { | |
53 | ||
54 | { 0x06, 0x04 }, /* Power Ctl 1 */ | |
55 | { 0x07, 0xE8 }, /* Power Ctl 2 */ | |
56 | { 0x08, 0x40 }, /* Clock Ctl */ | |
57 | { 0x09, 0x20 }, /* Low Battery Threshold */ | |
58 | { 0x0A, 0x00 }, /* Voltage Monitor [RO] */ | |
59 | { 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */ | |
60 | { 0x0C, 0x07 }, /* IMON Scaling */ | |
61 | { 0x0D, 0x03 }, /* Audio/LED Pwr Manager */ | |
62 | { 0x0F, 0x20 }, /* Serial Port Control */ | |
63 | { 0x10, 0x14 }, /* Class D Amp CTL */ | |
64 | { 0x11, 0x00 }, /* Protection Release CTL */ | |
65 | { 0x12, 0xFF }, /* Interrupt Mask 1 */ | |
66 | { 0x13, 0xFF }, /* Interrupt Mask 2 */ | |
67 | { 0x14, 0xFF }, /* Interrupt Mask 3 */ | |
68 | { 0x19, 0x00 }, /* LED Flash Mode Current */ | |
69 | { 0x1A, 0x00 }, /* LED Movie Mode Current */ | |
70 | { 0x1B, 0x20 }, /* LED Flash Timer */ | |
71 | { 0x1C, 0x00 }, /* LED Flash Inhibit Current */ | |
72 | }; | |
73 | ||
74 | static bool cs35l32_readable_register(struct device *dev, unsigned int reg) | |
75 | { | |
76 | switch (reg) { | |
c1763308 AL |
77 | case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR: |
78 | case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT: | |
eef5bb24 BA |
79 | return true; |
80 | default: | |
81 | return false; | |
82 | } | |
83 | } | |
84 | ||
85 | static bool cs35l32_volatile_register(struct device *dev, unsigned int reg) | |
86 | { | |
87 | switch (reg) { | |
c1763308 AL |
88 | case CS35L32_DEVID_AB ... CS35L32_REV_ID: |
89 | case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS: | |
7eef0855 | 90 | return true; |
eef5bb24 | 91 | default: |
7eef0855 | 92 | return false; |
eef5bb24 BA |
93 | } |
94 | } | |
95 | ||
96 | static bool cs35l32_precious_register(struct device *dev, unsigned int reg) | |
97 | { | |
98 | switch (reg) { | |
c1763308 | 99 | case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS: |
7eef0855 | 100 | return true; |
eef5bb24 | 101 | default: |
7eef0855 | 102 | return false; |
eef5bb24 BA |
103 | } |
104 | } | |
105 | ||
106 | static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0); | |
107 | ||
108 | static const struct snd_kcontrol_new imon_ctl = | |
109 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1); | |
110 | ||
111 | static const struct snd_kcontrol_new vmon_ctl = | |
112 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1); | |
113 | ||
114 | static const struct snd_kcontrol_new vpmon_ctl = | |
115 | SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1); | |
116 | ||
117 | static const struct snd_kcontrol_new cs35l32_snd_controls[] = { | |
118 | SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL, | |
119 | 3, 0x04, 1, classd_ctl_tlv), | |
120 | SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0), | |
121 | SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0), | |
122 | }; | |
123 | ||
124 | static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = { | |
125 | ||
126 | SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0), | |
127 | SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0), | |
128 | ||
129 | SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1), | |
130 | ||
131 | SND_SOC_DAPM_INPUT("VP"), | |
132 | SND_SOC_DAPM_INPUT("ISENSE"), | |
133 | SND_SOC_DAPM_INPUT("VSENSE"), | |
134 | ||
135 | SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl), | |
136 | SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl), | |
137 | SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl), | |
138 | }; | |
139 | ||
140 | static const struct snd_soc_dapm_route cs35l32_audio_map[] = { | |
141 | ||
142 | {"Speaker", NULL, "BOOST"}, | |
143 | ||
144 | {"VMON ADC", NULL, "VSENSE"}, | |
145 | {"IMON ADC", NULL, "ISENSE"}, | |
146 | {"VPMON ADC", NULL, "VP"}, | |
147 | ||
148 | {"SDOUT", "Switch", "VMON ADC"}, | |
149 | {"SDOUT", "Switch", "IMON ADC"}, | |
150 | {"SDOUT", "Switch", "VPMON ADC"}, | |
151 | ||
152 | {"Capture", NULL, "SDOUT"}, | |
153 | }; | |
154 | ||
155 | static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) | |
156 | { | |
157 | struct snd_soc_codec *codec = codec_dai->codec; | |
158 | ||
159 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
160 | case SND_SOC_DAIFMT_CBM_CFM: | |
161 | snd_soc_update_bits(codec, CS35L32_ADSP_CTL, | |
162 | CS35L32_ADSP_MASTER_MASK, | |
163 | CS35L32_ADSP_MASTER_MASK); | |
164 | break; | |
165 | case SND_SOC_DAIFMT_CBS_CFS: | |
166 | snd_soc_update_bits(codec, CS35L32_ADSP_CTL, | |
167 | CS35L32_ADSP_MASTER_MASK, 0); | |
168 | break; | |
169 | default: | |
170 | return -EINVAL; | |
171 | } | |
172 | ||
173 | return 0; | |
174 | } | |
175 | ||
176 | static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate) | |
177 | { | |
178 | struct snd_soc_codec *codec = dai->codec; | |
179 | ||
180 | return snd_soc_update_bits(codec, CS35L32_PWRCTL2, | |
181 | CS35L32_SDOUT_3ST, tristate << 3); | |
182 | } | |
183 | ||
184 | static const struct snd_soc_dai_ops cs35l32_ops = { | |
185 | .set_fmt = cs35l32_set_dai_fmt, | |
186 | .set_tristate = cs35l32_set_tristate, | |
187 | }; | |
188 | ||
189 | static struct snd_soc_dai_driver cs35l32_dai[] = { | |
190 | { | |
191 | .name = "cs35l32-monitor", | |
192 | .id = 0, | |
193 | .capture = { | |
194 | .stream_name = "Capture", | |
195 | .channels_min = 2, | |
196 | .channels_max = 2, | |
197 | .rates = CS35L32_RATES, | |
198 | .formats = CS35L32_FORMATS, | |
199 | }, | |
200 | .ops = &cs35l32_ops, | |
201 | .symmetric_rates = 1, | |
202 | } | |
203 | }; | |
204 | ||
205 | static int cs35l32_codec_set_sysclk(struct snd_soc_codec *codec, | |
206 | int clk_id, int source, unsigned int freq, int dir) | |
207 | { | |
5f609f28 | 208 | unsigned int val; |
eef5bb24 BA |
209 | |
210 | switch (freq) { | |
211 | case 6000000: | |
5f609f28 | 212 | val = CS35L32_MCLK_RATIO; |
eef5bb24 BA |
213 | break; |
214 | case 12000000: | |
5f609f28 | 215 | val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO; |
eef5bb24 BA |
216 | break; |
217 | case 6144000: | |
5f609f28 | 218 | val = 0; |
eef5bb24 BA |
219 | break; |
220 | case 12288000: | |
5f609f28 | 221 | val = CS35L32_MCLK_DIV2_MASK; |
eef5bb24 BA |
222 | break; |
223 | default: | |
224 | return -EINVAL; | |
225 | } | |
226 | ||
5f609f28 AL |
227 | return snd_soc_update_bits(codec, CS35L32_CLK_CTL, |
228 | CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val); | |
eef5bb24 BA |
229 | } |
230 | ||
d883641f | 231 | static const struct snd_soc_codec_driver soc_codec_dev_cs35l32 = { |
eef5bb24 BA |
232 | .set_sysclk = cs35l32_codec_set_sysclk, |
233 | ||
234 | .dapm_widgets = cs35l32_dapm_widgets, | |
235 | .num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets), | |
236 | .dapm_routes = cs35l32_audio_map, | |
237 | .num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map), | |
238 | ||
239 | .controls = cs35l32_snd_controls, | |
240 | .num_controls = ARRAY_SIZE(cs35l32_snd_controls), | |
241 | }; | |
242 | ||
243 | /* Current and threshold powerup sequence Pg37 in datasheet */ | |
8019ff6c | 244 | static const struct reg_sequence cs35l32_monitor_patch[] = { |
eef5bb24 BA |
245 | |
246 | { 0x00, 0x99 }, | |
247 | { 0x48, 0x17 }, | |
248 | { 0x49, 0x56 }, | |
249 | { 0x43, 0x01 }, | |
250 | { 0x3B, 0x62 }, | |
251 | { 0x3C, 0x80 }, | |
252 | { 0x00, 0x00 }, | |
253 | }; | |
254 | ||
d883641f | 255 | static const struct regmap_config cs35l32_regmap = { |
eef5bb24 BA |
256 | .reg_bits = 8, |
257 | .val_bits = 8, | |
258 | ||
259 | .max_register = CS35L32_MAX_REGISTER, | |
260 | .reg_defaults = cs35l32_reg_defaults, | |
261 | .num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults), | |
262 | .volatile_reg = cs35l32_volatile_register, | |
263 | .readable_reg = cs35l32_readable_register, | |
264 | .precious_reg = cs35l32_precious_register, | |
265 | .cache_type = REGCACHE_RBTREE, | |
266 | }; | |
267 | ||
268 | static int cs35l32_handle_of_data(struct i2c_client *i2c_client, | |
269 | struct cs35l32_platform_data *pdata) | |
270 | { | |
271 | struct device_node *np = i2c_client->dev.of_node; | |
272 | unsigned int val; | |
273 | ||
274 | if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0) | |
275 | pdata->sdout_share = val; | |
276 | ||
dd5dc001 AB |
277 | if (of_property_read_u32(np, "cirrus,boost-manager", &val)) |
278 | val = -1u; | |
279 | ||
eef5bb24 BA |
280 | switch (val) { |
281 | case CS35L32_BOOST_MGR_AUTO: | |
282 | case CS35L32_BOOST_MGR_AUTO_AUDIO: | |
283 | case CS35L32_BOOST_MGR_BYPASS: | |
284 | case CS35L32_BOOST_MGR_FIXED: | |
285 | pdata->boost_mng = val; | |
286 | break; | |
dd5dc001 | 287 | case -1u: |
eef5bb24 BA |
288 | default: |
289 | dev_err(&i2c_client->dev, | |
290 | "Wrong cirrus,boost-manager DT value %d\n", val); | |
291 | pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS; | |
292 | } | |
293 | ||
dd5dc001 AB |
294 | if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val)) |
295 | val = -1u; | |
eef5bb24 BA |
296 | switch (val) { |
297 | case CS35L32_DATA_CFG_LR_VP: | |
298 | case CS35L32_DATA_CFG_LR_STAT: | |
299 | case CS35L32_DATA_CFG_LR: | |
300 | case CS35L32_DATA_CFG_LR_VPSTAT: | |
301 | pdata->sdout_datacfg = val; | |
302 | break; | |
dd5dc001 | 303 | case -1u: |
eef5bb24 BA |
304 | default: |
305 | dev_err(&i2c_client->dev, | |
306 | "Wrong cirrus,sdout-datacfg DT value %d\n", val); | |
307 | pdata->sdout_datacfg = CS35L32_DATA_CFG_LR; | |
308 | } | |
309 | ||
dd5dc001 AB |
310 | if (of_property_read_u32(np, "cirrus,battery-threshold", &val)) |
311 | val = -1u; | |
eef5bb24 BA |
312 | switch (val) { |
313 | case CS35L32_BATT_THRESH_3_1V: | |
314 | case CS35L32_BATT_THRESH_3_2V: | |
315 | case CS35L32_BATT_THRESH_3_3V: | |
316 | case CS35L32_BATT_THRESH_3_4V: | |
317 | pdata->batt_thresh = val; | |
318 | break; | |
dd5dc001 | 319 | case -1u: |
eef5bb24 BA |
320 | default: |
321 | dev_err(&i2c_client->dev, | |
322 | "Wrong cirrus,battery-threshold DT value %d\n", val); | |
323 | pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V; | |
324 | } | |
325 | ||
dd5dc001 AB |
326 | if (of_property_read_u32(np, "cirrus,battery-recovery", &val)) |
327 | val = -1u; | |
eef5bb24 BA |
328 | switch (val) { |
329 | case CS35L32_BATT_RECOV_3_1V: | |
330 | case CS35L32_BATT_RECOV_3_2V: | |
331 | case CS35L32_BATT_RECOV_3_3V: | |
332 | case CS35L32_BATT_RECOV_3_4V: | |
333 | case CS35L32_BATT_RECOV_3_5V: | |
334 | case CS35L32_BATT_RECOV_3_6V: | |
335 | pdata->batt_recov = val; | |
336 | break; | |
dd5dc001 | 337 | case -1u: |
eef5bb24 BA |
338 | default: |
339 | dev_err(&i2c_client->dev, | |
340 | "Wrong cirrus,battery-recovery DT value %d\n", val); | |
341 | pdata->batt_recov = CS35L32_BATT_RECOV_3_4V; | |
342 | } | |
343 | ||
344 | return 0; | |
345 | } | |
346 | ||
347 | static int cs35l32_i2c_probe(struct i2c_client *i2c_client, | |
348 | const struct i2c_device_id *id) | |
349 | { | |
350 | struct cs35l32_private *cs35l32; | |
351 | struct cs35l32_platform_data *pdata = | |
352 | dev_get_platdata(&i2c_client->dev); | |
353 | int ret, i; | |
354 | unsigned int devid = 0; | |
355 | unsigned int reg; | |
356 | ||
357 | ||
358 | cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs35l32_private), | |
359 | GFP_KERNEL); | |
360 | if (!cs35l32) { | |
361 | dev_err(&i2c_client->dev, "could not allocate codec\n"); | |
362 | return -ENOMEM; | |
363 | } | |
364 | ||
365 | i2c_set_clientdata(i2c_client, cs35l32); | |
366 | ||
367 | cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap); | |
368 | if (IS_ERR(cs35l32->regmap)) { | |
369 | ret = PTR_ERR(cs35l32->regmap); | |
370 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); | |
371 | return ret; | |
372 | } | |
373 | ||
374 | if (pdata) { | |
375 | cs35l32->pdata = *pdata; | |
376 | } else { | |
377 | pdata = devm_kzalloc(&i2c_client->dev, | |
378 | sizeof(struct cs35l32_platform_data), | |
379 | GFP_KERNEL); | |
380 | if (!pdata) { | |
381 | dev_err(&i2c_client->dev, "could not allocate pdata\n"); | |
382 | return -ENOMEM; | |
383 | } | |
384 | if (i2c_client->dev.of_node) { | |
385 | ret = cs35l32_handle_of_data(i2c_client, | |
386 | &cs35l32->pdata); | |
387 | if (ret != 0) | |
388 | return ret; | |
389 | } | |
390 | } | |
391 | ||
392 | for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++) | |
393 | cs35l32->supplies[i].supply = cs35l32_supply_names[i]; | |
394 | ||
395 | ret = devm_regulator_bulk_get(&i2c_client->dev, | |
396 | ARRAY_SIZE(cs35l32->supplies), | |
397 | cs35l32->supplies); | |
398 | if (ret != 0) { | |
399 | dev_err(&i2c_client->dev, | |
400 | "Failed to request supplies: %d\n", ret); | |
401 | return ret; | |
402 | } | |
403 | ||
404 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), | |
405 | cs35l32->supplies); | |
406 | if (ret != 0) { | |
407 | dev_err(&i2c_client->dev, | |
408 | "Failed to enable supplies: %d\n", ret); | |
409 | return ret; | |
410 | } | |
411 | ||
412 | /* Reset the Device */ | |
34d7c390 UKK |
413 | cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, |
414 | "reset", GPIOD_OUT_LOW); | |
415 | if (IS_ERR(cs35l32->reset_gpio)) | |
416 | return PTR_ERR(cs35l32->reset_gpio); | |
417 | ||
d5a78c8e | 418 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); |
eef5bb24 BA |
419 | |
420 | /* initialize codec */ | |
421 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, ®); | |
422 | devid = (reg & 0xFF) << 12; | |
423 | ||
424 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, ®); | |
425 | devid |= (reg & 0xFF) << 4; | |
426 | ||
427 | ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, ®); | |
428 | devid |= (reg & 0xF0) >> 4; | |
429 | ||
430 | if (devid != CS35L32_CHIP_ID) { | |
431 | ret = -ENODEV; | |
432 | dev_err(&i2c_client->dev, | |
433 | "CS35L32 Device ID (%X). Expected %X\n", | |
434 | devid, CS35L32_CHIP_ID); | |
435 | return ret; | |
436 | } | |
437 | ||
438 | ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, ®); | |
439 | if (ret < 0) { | |
440 | dev_err(&i2c_client->dev, "Get Revision ID failed\n"); | |
441 | return ret; | |
442 | } | |
443 | ||
444 | ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch, | |
445 | ARRAY_SIZE(cs35l32_monitor_patch)); | |
446 | if (ret < 0) { | |
447 | dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); | |
448 | return ret; | |
449 | } | |
450 | ||
451 | dev_info(&i2c_client->dev, | |
452 | "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF); | |
453 | ||
454 | /* Setup VBOOST Management */ | |
455 | if (cs35l32->pdata.boost_mng) | |
456 | regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR, | |
457 | CS35L32_BOOST_MASK, | |
458 | cs35l32->pdata.boost_mng); | |
459 | ||
460 | /* Setup ADSP Format Config */ | |
461 | if (cs35l32->pdata.sdout_share) | |
462 | regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, | |
463 | CS35L32_ADSP_SHARE_MASK, | |
464 | cs35l32->pdata.sdout_share << 3); | |
465 | ||
466 | /* Setup ADSP Data Configuration */ | |
467 | if (cs35l32->pdata.sdout_datacfg) | |
468 | regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, | |
469 | CS35L32_ADSP_DATACFG_MASK, | |
470 | cs35l32->pdata.sdout_datacfg << 4); | |
471 | ||
472 | /* Setup Low Battery Recovery */ | |
473 | if (cs35l32->pdata.batt_recov) | |
474 | regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, | |
475 | CS35L32_BATT_REC_MASK, | |
476 | cs35l32->pdata.batt_recov << 1); | |
477 | ||
478 | /* Setup Low Battery Threshold */ | |
479 | if (cs35l32->pdata.batt_thresh) | |
480 | regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, | |
481 | CS35L32_BATT_THRESH_MASK, | |
482 | cs35l32->pdata.batt_thresh << 4); | |
483 | ||
484 | /* Power down the AMP */ | |
485 | regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP, | |
486 | CS35L32_PDN_AMP); | |
487 | ||
488 | /* Clear MCLK Error Bit since we don't have the clock yet */ | |
489 | ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, ®); | |
490 | ||
491 | ret = snd_soc_register_codec(&i2c_client->dev, | |
492 | &soc_codec_dev_cs35l32, cs35l32_dai, | |
493 | ARRAY_SIZE(cs35l32_dai)); | |
494 | if (ret < 0) | |
495 | goto err_disable; | |
496 | ||
497 | return 0; | |
498 | ||
499 | err_disable: | |
500 | regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), | |
501 | cs35l32->supplies); | |
38f57532 | 502 | return ret; |
eef5bb24 BA |
503 | } |
504 | ||
505 | static int cs35l32_i2c_remove(struct i2c_client *i2c_client) | |
506 | { | |
507 | struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client); | |
508 | ||
509 | snd_soc_unregister_codec(&i2c_client->dev); | |
510 | ||
511 | /* Hold down reset */ | |
d5a78c8e | 512 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); |
eef5bb24 | 513 | |
eef5bb24 BA |
514 | return 0; |
515 | } | |
516 | ||
641d334b | 517 | #ifdef CONFIG_PM |
eef5bb24 BA |
518 | static int cs35l32_runtime_suspend(struct device *dev) |
519 | { | |
520 | struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); | |
521 | ||
522 | regcache_cache_only(cs35l32->regmap, true); | |
523 | regcache_mark_dirty(cs35l32->regmap); | |
524 | ||
525 | /* Hold down reset */ | |
d5a78c8e | 526 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); |
eef5bb24 BA |
527 | |
528 | /* remove power */ | |
529 | regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), | |
530 | cs35l32->supplies); | |
531 | ||
532 | return 0; | |
533 | } | |
534 | ||
535 | static int cs35l32_runtime_resume(struct device *dev) | |
536 | { | |
537 | struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); | |
538 | int ret; | |
539 | ||
540 | /* Enable power */ | |
541 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), | |
542 | cs35l32->supplies); | |
543 | if (ret != 0) { | |
544 | dev_err(dev, "Failed to enable supplies: %d\n", | |
545 | ret); | |
546 | return ret; | |
547 | } | |
548 | ||
d5a78c8e | 549 | gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); |
eef5bb24 BA |
550 | |
551 | regcache_cache_only(cs35l32->regmap, false); | |
552 | regcache_sync(cs35l32->regmap); | |
553 | ||
554 | return 0; | |
555 | } | |
556 | #endif | |
557 | ||
558 | static const struct dev_pm_ops cs35l32_runtime_pm = { | |
559 | SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume, | |
560 | NULL) | |
561 | }; | |
562 | ||
563 | static const struct of_device_id cs35l32_of_match[] = { | |
564 | { .compatible = "cirrus,cs35l32", }, | |
565 | {}, | |
566 | }; | |
567 | MODULE_DEVICE_TABLE(of, cs35l32_of_match); | |
568 | ||
569 | ||
570 | static const struct i2c_device_id cs35l32_id[] = { | |
571 | {"cs35l32", 0}, | |
572 | {} | |
573 | }; | |
574 | ||
575 | MODULE_DEVICE_TABLE(i2c, cs35l32_id); | |
576 | ||
577 | static struct i2c_driver cs35l32_i2c_driver = { | |
578 | .driver = { | |
579 | .name = "cs35l32", | |
eef5bb24 BA |
580 | .pm = &cs35l32_runtime_pm, |
581 | .of_match_table = cs35l32_of_match, | |
582 | }, | |
583 | .id_table = cs35l32_id, | |
584 | .probe = cs35l32_i2c_probe, | |
585 | .remove = cs35l32_i2c_remove, | |
586 | }; | |
587 | ||
588 | module_i2c_driver(cs35l32_i2c_driver); | |
589 | ||
590 | MODULE_DESCRIPTION("ASoC CS35L32 driver"); | |
591 | MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>"); | |
592 | MODULE_LICENSE("GPL"); |