Merge branch 'stable/for-linus-3.6' into linux-next
[deliverable/linux.git] / sound / soc / codecs / cs4270.c
CommitLineData
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1/*
2 * CS4270 ALSA SoC (ASoC) codec driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
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6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
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10 *
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
12 *
13 * Current features/limitations:
14 *
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15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
5e7c0344 21 * - Power management is supported
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22 */
23
24#include <linux/module.h>
5a0e3ad6 25#include <linux/slab.h>
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26#include <sound/core.h>
27#include <sound/soc.h>
28#include <sound/initval.h>
29#include <linux/i2c.h>
5e7c0344 30#include <linux/delay.h>
ffbfd336 31#include <linux/regulator/consumer.h>
b0c813ce 32
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33/*
34 * The codec isn't really big-endian or little-endian, since the I2S
35 * interface requires data to be sent serially with the MSbit first.
36 * However, to support BE and LE I2S devices, we specify both here. That
37 * way, ALSA will always match the bit patterns.
38 */
39#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
40 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
41 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
42 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
43 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
44 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
45
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46/* CS4270 registers addresses */
47#define CS4270_CHIPID 0x01 /* Chip ID */
48#define CS4270_PWRCTL 0x02 /* Power Control */
49#define CS4270_MODE 0x03 /* Mode Control */
50#define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
51#define CS4270_TRANS 0x05 /* Transition Control */
52#define CS4270_MUTE 0x06 /* Mute Control */
53#define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
54#define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
55
56#define CS4270_FIRSTREG 0x01
57#define CS4270_LASTREG 0x08
58#define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
80ab8817 59#define CS4270_I2C_INCR 0x80
9dbd627b 60
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61/* Bit masks for the CS4270 registers */
62#define CS4270_CHIPID_ID 0xF0
63#define CS4270_CHIPID_REV 0x0F
64#define CS4270_PWRCTL_FREEZE 0x80
65#define CS4270_PWRCTL_PDN_ADC 0x20
66#define CS4270_PWRCTL_PDN_DAC 0x02
67#define CS4270_PWRCTL_PDN 0x01
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68#define CS4270_PWRCTL_PDN_ALL \
69 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
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70#define CS4270_MODE_SPEED_MASK 0x30
71#define CS4270_MODE_1X 0x00
72#define CS4270_MODE_2X 0x10
73#define CS4270_MODE_4X 0x20
74#define CS4270_MODE_SLAVE 0x30
75#define CS4270_MODE_DIV_MASK 0x0E
76#define CS4270_MODE_DIV1 0x00
77#define CS4270_MODE_DIV15 0x02
78#define CS4270_MODE_DIV2 0x04
79#define CS4270_MODE_DIV3 0x06
80#define CS4270_MODE_DIV4 0x08
81#define CS4270_MODE_POPGUARD 0x01
82#define CS4270_FORMAT_FREEZE_A 0x80
83#define CS4270_FORMAT_FREEZE_B 0x40
84#define CS4270_FORMAT_LOOPBACK 0x20
85#define CS4270_FORMAT_DAC_MASK 0x18
86#define CS4270_FORMAT_DAC_LJ 0x00
87#define CS4270_FORMAT_DAC_I2S 0x08
88#define CS4270_FORMAT_DAC_RJ16 0x18
89#define CS4270_FORMAT_DAC_RJ24 0x10
90#define CS4270_FORMAT_ADC_MASK 0x01
91#define CS4270_FORMAT_ADC_LJ 0x00
92#define CS4270_FORMAT_ADC_I2S 0x01
93#define CS4270_TRANS_ONE_VOL 0x80
94#define CS4270_TRANS_SOFT 0x40
95#define CS4270_TRANS_ZERO 0x20
96#define CS4270_TRANS_INV_ADC_A 0x08
97#define CS4270_TRANS_INV_ADC_B 0x10
98#define CS4270_TRANS_INV_DAC_A 0x02
99#define CS4270_TRANS_INV_DAC_B 0x04
100#define CS4270_TRANS_DEEMPH 0x01
101#define CS4270_MUTE_AUTO 0x20
102#define CS4270_MUTE_ADC_A 0x08
103#define CS4270_MUTE_ADC_B 0x10
104#define CS4270_MUTE_POLARITY 0x04
105#define CS4270_MUTE_DAC_A 0x01
106#define CS4270_MUTE_DAC_B 0x02
107
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108/* Power-on default values for the registers
109 *
110 * This array contains the power-on default values of the registers, with the
111 * exception of the "CHIPID" register (01h). The lower four bits of that
112 * register contain the hardware revision, so it is treated as volatile.
113 *
114 * Also note that on the CS4270, the first readable register is 1, but ASoC
115 * assumes the first register is 0. Therfore, the array must have an entry for
116 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
117 * be read.
118 */
119static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
120 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
121};
122
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123static const char *supply_names[] = {
124 "va", "vd", "vlc"
125};
126
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127/* Private data for the CS4270 */
128struct cs4270_private {
f0fba2ad 129 enum snd_soc_control_type control_type;
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130 unsigned int mclk; /* Input frequency of the MCLK pin */
131 unsigned int mode; /* The mode (I2S or left-justified) */
4eae080d 132 unsigned int slave_mode;
1a4ba05e 133 unsigned int manual_mute;
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134
135 /* power domain regulators */
136 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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137};
138
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139/**
140 * struct cs4270_mode_ratios - clock ratio tables
141 * @ratio: the ratio of MCLK to the sample rate
142 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
143 * this ratio
144 * @mclk: the Ratio Select bits to set in the Mode Control register for this
145 * ratio
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146 *
147 * The data for this chart is taken from Table 5 of the CS4270 reference
148 * manual.
149 *
150 * This table is used to determine how to program the Mode Control register.
151 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
152 * rates the CS4270 currently supports.
153 *
ff7bf02f 154 * @speed_mode is the corresponding bit pattern to be written to the
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155 * MODE bits of the Mode Control Register
156 *
ff7bf02f 157 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
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158 * the Mode Control Register.
159 *
160 * In situations where a single ratio is represented by multiple speed
161 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
162 * double-speed instead of quad-speed. However, the CS4270 errata states
ff7bf02f 163 * that divide-By-1.5 can cause failures, so we avoid that mode where
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164 * possible.
165 *
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166 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
167 * work if Vd is 3.3V. If this effects you, select the
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168 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
169 * never select any sample rates that require divide-by-1.5.
170 */
ff7bf02f 171struct cs4270_mode_ratios {
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172 unsigned int ratio;
173 u8 speed_mode;
174 u8 mclk;
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175};
176
d9fb7fbd 177static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
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178 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
179#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
180 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
181#endif
182 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
183 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
184 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
185 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
186 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
187 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
188 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
189};
190
191/* The number of MCLK/LRCK ratios supported by the CS4270 */
192#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
9dbd627b 193
d4754ec9 194static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
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195{
196 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
197}
198
d4754ec9 199static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
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200{
201 /* Unreadable registers are considered volatile */
202 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
203 return 1;
204
205 return reg == CS4270_CHIPID;
206}
207
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208/**
209 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
210 * @codec_dai: the codec DAI
211 * @clk_id: the clock ID (ignored)
212 * @freq: the MCLK input frequency
213 * @dir: the clock direction (ignored)
9dbd627b 214 *
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215 * This function is used to tell the codec driver what the input MCLK
216 * frequency is.
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217 *
218 * The value of MCLK is used to determine which sample rates are supported
219 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
ff7bf02f 220 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
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221 *
222 * This function calculates the nine ratios and determines which ones match
223 * a standard sample rate. If there's a match, then it is added to the list
ff7bf02f 224 * of supported sample rates.
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225 *
226 * This function must be called by the machine driver's 'startup' function,
227 * otherwise the list of supported sample rates will not be available in
228 * time for ALSA.
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229 *
230 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
231 * theoretically possible sample rates to be enabled. Call it again with a
232 * proper value set one the external clock is set (most probably you would do
233 * that from a machine's driver 'hw_param' hook.
9dbd627b 234 */
e550e17f 235static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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236 int clk_id, unsigned int freq, int dir)
237{
238 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 239 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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240
241 cs4270->mclk = freq;
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242 return 0;
243}
244
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245/**
246 * cs4270_set_dai_fmt - configure the codec for the selected audio format
247 * @codec_dai: the codec DAI
248 * @format: a SND_SOC_DAIFMT_x value indicating the data format
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249 *
250 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
251 * codec accordingly.
252 *
253 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
254 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
255 * data for playback only, but ASoC currently does not support different
256 * formats for playback vs. record.
257 */
e550e17f 258static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
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259 unsigned int format)
260{
261 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 262 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
9dbd627b 263
4eae080d 264 /* set DAI format */
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265 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
266 case SND_SOC_DAIFMT_I2S:
267 case SND_SOC_DAIFMT_LEFT_J:
268 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
269 break;
270 default:
a6c255e0 271 dev_err(codec->dev, "invalid dai format\n");
ac60155f 272 return -EINVAL;
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273 }
274
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275 /* set master/slave audio interface */
276 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
277 case SND_SOC_DAIFMT_CBS_CFS:
278 cs4270->slave_mode = 1;
279 break;
280 case SND_SOC_DAIFMT_CBM_CFM:
281 cs4270->slave_mode = 0;
282 break;
4eae080d 283 default:
ff09d49a 284 /* all other modes are unsupported by the hardware */
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285 dev_err(codec->dev, "Unknown master/slave configuration\n");
286 return -EINVAL;
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287 }
288
ac60155f 289 return 0;
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290}
291
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292/**
293 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
294 * @substream: the audio stream
295 * @params: the hardware parameters to set
296 * @dai: the SOC DAI (ignored)
b0c813ce 297 *
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298 * This function programs the hardware with the values provided.
299 * Specifically, the sample rate and the data format.
300 *
301 * The .ops functions are used to provide board-specific data, like input
302 * frequencies, to this driver. This function takes that information,
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303 * combines it with the hardware parameters provided, and programs the
304 * hardware accordingly.
305 */
306static int cs4270_hw_params(struct snd_pcm_substream *substream,
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307 struct snd_pcm_hw_params *params,
308 struct snd_soc_dai *dai)
b0c813ce 309{
e6968a17 310 struct snd_soc_codec *codec = dai->codec;
b2c812e2 311 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
e34ba212 312 int ret;
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313 unsigned int i;
314 unsigned int rate;
315 unsigned int ratio;
316 int reg;
317
318 /* Figure out which MCLK/LRCK ratio to use */
319
320 rate = params_rate(params); /* Sampling rate, in Hz */
321 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
322
9dbd627b 323 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
8432395f 324 if (cs4270_mode_ratios[i].ratio == ratio)
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325 break;
326 }
327
9dbd627b 328 if (i == NUM_MCLK_RATIOS) {
b0c813ce 329 /* We did not find a matching ratio */
a6c255e0 330 dev_err(codec->dev, "could not find matching ratio\n");
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331 return -EINVAL;
332 }
333
d5e9ba1d 334 /* Set the sample rate */
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335
336 reg = snd_soc_read(codec, CS4270_MODE);
337 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
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338 reg |= cs4270_mode_ratios[i].mclk;
339
340 if (cs4270->slave_mode)
341 reg |= CS4270_MODE_SLAVE;
342 else
343 reg |= cs4270_mode_ratios[i].speed_mode;
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344
345 ret = snd_soc_write(codec, CS4270_MODE, reg);
346 if (ret < 0) {
a6c255e0 347 dev_err(codec->dev, "i2c write failed\n");
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348 return ret;
349 }
350
d5e9ba1d 351 /* Set the DAI format */
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352
353 reg = snd_soc_read(codec, CS4270_FORMAT);
354 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
355
356 switch (cs4270->mode) {
357 case SND_SOC_DAIFMT_I2S:
358 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
359 break;
360 case SND_SOC_DAIFMT_LEFT_J:
361 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
362 break;
363 default:
a6c255e0 364 dev_err(codec->dev, "unknown dai format\n");
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365 return -EINVAL;
366 }
367
368 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
369 if (ret < 0) {
a6c255e0 370 dev_err(codec->dev, "i2c write failed\n");
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371 return ret;
372 }
373
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374 return ret;
375}
376
ff7bf02f 377/**
1a4ba05e 378 * cs4270_dai_mute - enable/disable the CS4270 external mute
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379 * @dai: the SOC DAI
380 * @mute: 0 = disable mute, 1 = enable mute
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381 *
382 * This function toggles the mute bits in the MUTE register. The CS4270's
383 * mute capability is intended for external muting circuitry, so if the
384 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
385 * then this function will do nothing.
386 */
1a4ba05e 387static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
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388{
389 struct snd_soc_codec *codec = dai->codec;
b2c812e2 390 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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391 int reg6;
392
393 reg6 = snd_soc_read(codec, CS4270_MUTE);
394
395 if (mute)
d5e9ba1d 396 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
1a4ba05e 397 else {
d5e9ba1d 398 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
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399 reg6 |= cs4270->manual_mute;
400 }
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401
402 return snd_soc_write(codec, CS4270_MUTE, reg6);
403}
b0c813ce 404
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405/**
406 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
407 * alsa control.
408 * @kcontrol: mixer control
409 * @ucontrol: control element information
410 *
411 * This function basically passes the arguments on to the generic
412 * snd_soc_put_volsw() function and saves the mute information in
413 * our private data structure. This is because we want to prevent
414 * cs4270_dai_mute() neglecting the user's decision to manually
415 * mute the codec's output.
416 *
417 * Returns 0 for success.
418 */
419static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_value *ucontrol)
421{
422 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 423 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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DM
424 int left = !ucontrol->value.integer.value[0];
425 int right = !ucontrol->value.integer.value[1];
426
427 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
428 (right ? CS4270_MUTE_DAC_B : 0);
429
430 return snd_soc_put_volsw(kcontrol, ucontrol);
431}
432
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433/* A list of non-DAPM controls that the CS4270 supports */
434static const struct snd_kcontrol_new cs4270_snd_controls[] = {
435 SOC_DOUBLE_R("Master Playback Volume",
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436 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
437 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
438 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
439 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
7e1aa1dc 440 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
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441 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
442 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
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443 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
444 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
445 snd_soc_get_volsw, cs4270_soc_put_mute),
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446};
447
85e7652d 448static const struct snd_soc_dai_ops cs4270_dai_ops = {
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EM
449 .hw_params = cs4270_hw_params,
450 .set_sysclk = cs4270_set_dai_sysclk,
451 .set_fmt = cs4270_set_dai_fmt,
1a4ba05e 452 .digital_mute = cs4270_dai_mute,
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EM
453};
454
5c75848a 455static struct snd_soc_dai_driver cs4270_dai = {
f0fba2ad 456 .name = "cs4270-hifi",
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457 .playback = {
458 .stream_name = "Playback",
459 .channels_min = 1,
460 .channels_max = 2,
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LG
461 .rates = SNDRV_PCM_RATE_CONTINUOUS,
462 .rate_min = 4000,
463 .rate_max = 216000,
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464 .formats = CS4270_FORMATS,
465 },
466 .capture = {
467 .stream_name = "Capture",
468 .channels_min = 1,
469 .channels_max = 2,
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470 .rates = SNDRV_PCM_RATE_CONTINUOUS,
471 .rate_min = 4000,
472 .rate_max = 216000,
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473 .formats = CS4270_FORMATS,
474 },
6335d055 475 .ops = &cs4270_dai_ops,
0db4d070 476};
0db4d070 477
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478/**
479 * cs4270_probe - ASoC probe function
480 * @pdev: platform device
481 *
482 * This function is called when ASoC has all the pieces it needs to
483 * instantiate a sound driver.
04eb093c 484 */
f0fba2ad 485static int cs4270_probe(struct snd_soc_codec *codec)
04eb093c 486{
b2c812e2 487 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
11b8fca5 488 int i, ret;
04eb093c 489
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490 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
491 * then do the I2C transactions itself.
492 */
493 ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
b0c813ce 494 if (ret < 0) {
11b8fca5 495 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
f0fba2ad 496 return ret;
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497 }
498
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499 /* Disable auto-mute. This feature appears to be buggy. In some
500 * situations, auto-mute will not deactivate when it should, so we want
501 * this feature disabled by default. An application (e.g. alsactl) can
502 * re-enabled it by using the controls.
503 */
11b8fca5 504 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
d5e9ba1d 505 if (ret < 0) {
f0fba2ad 506 dev_err(codec->dev, "i2c write failed\n");
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TT
507 return ret;
508 }
509
510 /* Disable automatic volume control. The hardware enables, and it
511 * causes volume change commands to be delayed, sometimes until after
512 * playback has started. An application (e.g. alsactl) can
513 * re-enabled it by using the controls.
514 */
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TT
515 ret = snd_soc_update_bits(codec, CS4270_TRANS,
516 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
d5e9ba1d 517 if (ret < 0) {
f0fba2ad 518 dev_err(codec->dev, "i2c write failed\n");
d5e9ba1d
TT
519 return ret;
520 }
521
f0fba2ad 522 /* Add the non-DAPM controls */
022658be 523 ret = snd_soc_add_codec_controls(codec, cs4270_snd_controls,
f0fba2ad 524 ARRAY_SIZE(cs4270_snd_controls));
0db4d070 525 if (ret < 0) {
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526 dev_err(codec->dev, "failed to add controls\n");
527 return ret;
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528 }
529
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530 /* get the power supply regulators */
531 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
532 cs4270->supplies[i].supply = supply_names[i];
533
534 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
535 cs4270->supplies);
536 if (ret < 0)
537 return ret;
538
539 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
540 cs4270->supplies);
541 if (ret < 0)
542 goto error_free_regulators;
ec2cd95f 543
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544 return 0;
545
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546error_free_regulators:
547 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
548 cs4270->supplies);
b0c813ce 549
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TT
550 return ret;
551}
552
ff7bf02f 553/**
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554 * cs4270_remove - ASoC remove function
555 * @pdev: platform device
ff7bf02f 556 *
f0fba2ad 557 * This function is the counterpart to cs4270_probe().
ff7bf02f 558 */
f0fba2ad 559static int cs4270_remove(struct snd_soc_codec *codec)
0db4d070 560{
f0fba2ad 561 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
0db4d070 562
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563 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
564 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
0db4d070
TT
565
566 return 0;
ff637d38 567};
ff637d38 568
5e7c0344
DM
569#ifdef CONFIG_PM
570
571/* This suspend/resume implementation can handle both - a simple standby
572 * where the codec remains powered, and a full suspend, where the voltage
573 * domain the codec is connected to is teared down and/or any other hardware
574 * reset condition is asserted.
575 *
576 * The codec's own power saving features are enabled in the suspend callback,
577 * and all registers are written back to the hardware when resuming.
578 */
579
84b315ee 580static int cs4270_soc_suspend(struct snd_soc_codec *codec)
15b5bdae 581{
b2c812e2 582 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
ffbfd336 583 int reg, ret;
15b5bdae 584
ffbfd336
DM
585 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
586 if (reg < 0)
587 return reg;
588
589 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
590 if (ret < 0)
591 return ret;
592
593 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
594 cs4270->supplies);
595
596 return 0;
15b5bdae
DM
597}
598
f0fba2ad 599static int cs4270_soc_resume(struct snd_soc_codec *codec)
15b5bdae 600{
b2c812e2 601 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
ab92d09d 602 int reg, ret;
5e7c0344 603
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604 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
605 cs4270->supplies);
606 if (ret != 0)
607 return ret;
ffbfd336 608
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DM
609 /* In case the device was put to hard reset during sleep, we need to
610 * wait 500ns here before any I2C communication. */
611 ndelay(500);
612
613 /* first restore the entire register cache ... */
d66b8537 614 snd_soc_cache_sync(codec);
5e7c0344
DM
615
616 /* ... then disable the power-down bits */
617 reg = snd_soc_read(codec, CS4270_PWRCTL);
618 reg &= ~CS4270_PWRCTL_PDN_ALL;
619
620 return snd_soc_write(codec, CS4270_PWRCTL, reg);
621}
622#else
15b5bdae
DM
623#define cs4270_soc_suspend NULL
624#define cs4270_soc_resume NULL
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625#endif /* CONFIG_PM */
626
f0fba2ad 627/*
b6f7d7c8 628 * ASoC codec driver structure
f0fba2ad 629 */
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TT
630static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
631 .probe = cs4270_probe,
632 .remove = cs4270_remove,
633 .suspend = cs4270_soc_suspend,
634 .resume = cs4270_soc_resume,
635 .volatile_register = cs4270_reg_is_volatile,
636 .readable_register = cs4270_reg_is_readable,
637 .reg_cache_size = CS4270_LASTREG + 1,
638 .reg_word_size = sizeof(u8),
639 .reg_cache_default = cs4270_default_reg_cache,
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640};
641
642/**
643 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
644 * @i2c_client: the I2C client object
645 * @id: the I2C device ID (ignored)
646 *
647 * This function is called whenever the I2C subsystem finds a device that
648 * matches the device ID given via a prior call to i2c_add_driver().
649 */
650static int cs4270_i2c_probe(struct i2c_client *i2c_client,
651 const struct i2c_device_id *id)
652{
653 struct cs4270_private *cs4270;
654 int ret;
655
656 /* Verify that we have a CS4270 */
657
658 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
659 if (ret < 0) {
660 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
661 i2c_client->addr);
662 return ret;
663 }
664 /* The top four bits of the chip ID should be 1100. */
665 if ((ret & 0xF0) != 0xC0) {
666 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
667 i2c_client->addr);
668 return -ENODEV;
669 }
670
671 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
672 i2c_client->addr);
673 dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
674
7fd8a674
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675 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
676 GFP_KERNEL);
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677 if (!cs4270) {
678 dev_err(&i2c_client->dev, "could not allocate codec\n");
679 return -ENOMEM;
680 }
681
682 i2c_set_clientdata(i2c_client, cs4270);
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683 cs4270->control_type = SND_SOC_I2C;
684
685 ret = snd_soc_register_codec(&i2c_client->dev,
686 &soc_codec_device_cs4270, &cs4270_dai, 1);
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687 return ret;
688}
689
690/**
691 * cs4270_i2c_remove - remove an I2C device
692 * @i2c_client: the I2C client object
693 *
694 * This function is the counterpart to cs4270_i2c_probe().
695 */
696static int cs4270_i2c_remove(struct i2c_client *i2c_client)
697{
698 snd_soc_unregister_codec(&i2c_client->dev);
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699 return 0;
700}
701
702/*
703 * cs4270_id - I2C device IDs supported by this driver
704 */
79a54ea1 705static const struct i2c_device_id cs4270_id[] = {
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LG
706 {"cs4270", 0},
707 {}
708};
709MODULE_DEVICE_TABLE(i2c, cs4270_id);
710
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711/*
712 * cs4270_i2c_driver - I2C device identification
713 *
714 * This structure tells the I2C subsystem how to identify and support a
715 * given I2C device type.
716 */
ff637d38
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717static struct i2c_driver cs4270_i2c_driver = {
718 .driver = {
64902b29 719 .name = "cs4270",
ff637d38
TT
720 .owner = THIS_MODULE,
721 },
722 .id_table = cs4270_id,
723 .probe = cs4270_i2c_probe,
0db4d070 724 .remove = cs4270_i2c_remove,
ff637d38 725};
b0c813ce 726
c9b3a40f 727static int __init cs4270_init(void)
64089b84 728{
04eb093c 729 return i2c_add_driver(&cs4270_i2c_driver);
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730}
731module_init(cs4270_init);
732
733static void __exit cs4270_exit(void)
734{
04eb093c 735 i2c_del_driver(&cs4270_i2c_driver);
64089b84
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736}
737module_exit(cs4270_exit);
738
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739MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
740MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
741MODULE_LICENSE("GPL");
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