Commit | Line | Data |
---|---|---|
b0c813ce TT |
1 | /* |
2 | * CS4270 ALSA SoC (ASoC) codec driver | |
3 | * | |
4 | * Author: Timur Tabi <timur@freescale.com> | |
5 | * | |
ff7bf02f TT |
6 | * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed |
7 | * under the terms of the GNU General Public License version 2. This | |
8 | * program is licensed "as is" without any warranty of any kind, whether | |
9 | * express or implied. | |
b0c813ce TT |
10 | * |
11 | * This is an ASoC device driver for the Cirrus Logic CS4270 codec. | |
12 | * | |
13 | * Current features/limitations: | |
14 | * | |
b191f63c DM |
15 | * - Software mode is supported. Stand-alone mode is not supported. |
16 | * - Only I2C is supported, not SPI | |
17 | * - Support for master and slave mode | |
18 | * - The machine driver's 'startup' function must call | |
19 | * cs4270_set_dai_sysclk() with the value of MCLK. | |
20 | * - Only I2S and left-justified modes are supported | |
5e7c0344 | 21 | * - Power management is supported |
b0c813ce TT |
22 | */ |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/platform_device.h> | |
b0c813ce TT |
26 | #include <sound/core.h> |
27 | #include <sound/soc.h> | |
28 | #include <sound/initval.h> | |
29 | #include <linux/i2c.h> | |
5e7c0344 | 30 | #include <linux/delay.h> |
ffbfd336 | 31 | #include <linux/regulator/consumer.h> |
b0c813ce | 32 | |
01e097d6 MB |
33 | #include "cs4270.h" |
34 | ||
8432395f TT |
35 | /* |
36 | * The codec isn't really big-endian or little-endian, since the I2S | |
37 | * interface requires data to be sent serially with the MSbit first. | |
38 | * However, to support BE and LE I2S devices, we specify both here. That | |
39 | * way, ALSA will always match the bit patterns. | |
40 | */ | |
41 | #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ | |
42 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ | |
43 | SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \ | |
44 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \ | |
45 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \ | |
46 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) | |
47 | ||
8432395f TT |
48 | /* CS4270 registers addresses */ |
49 | #define CS4270_CHIPID 0x01 /* Chip ID */ | |
50 | #define CS4270_PWRCTL 0x02 /* Power Control */ | |
51 | #define CS4270_MODE 0x03 /* Mode Control */ | |
52 | #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ | |
53 | #define CS4270_TRANS 0x05 /* Transition Control */ | |
54 | #define CS4270_MUTE 0x06 /* Mute Control */ | |
55 | #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ | |
56 | #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ | |
57 | ||
58 | #define CS4270_FIRSTREG 0x01 | |
59 | #define CS4270_LASTREG 0x08 | |
60 | #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) | |
80ab8817 | 61 | #define CS4270_I2C_INCR 0x80 |
9dbd627b | 62 | |
8432395f TT |
63 | /* Bit masks for the CS4270 registers */ |
64 | #define CS4270_CHIPID_ID 0xF0 | |
65 | #define CS4270_CHIPID_REV 0x0F | |
66 | #define CS4270_PWRCTL_FREEZE 0x80 | |
67 | #define CS4270_PWRCTL_PDN_ADC 0x20 | |
68 | #define CS4270_PWRCTL_PDN_DAC 0x02 | |
69 | #define CS4270_PWRCTL_PDN 0x01 | |
5e7c0344 DM |
70 | #define CS4270_PWRCTL_PDN_ALL \ |
71 | (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN) | |
8432395f TT |
72 | #define CS4270_MODE_SPEED_MASK 0x30 |
73 | #define CS4270_MODE_1X 0x00 | |
74 | #define CS4270_MODE_2X 0x10 | |
75 | #define CS4270_MODE_4X 0x20 | |
76 | #define CS4270_MODE_SLAVE 0x30 | |
77 | #define CS4270_MODE_DIV_MASK 0x0E | |
78 | #define CS4270_MODE_DIV1 0x00 | |
79 | #define CS4270_MODE_DIV15 0x02 | |
80 | #define CS4270_MODE_DIV2 0x04 | |
81 | #define CS4270_MODE_DIV3 0x06 | |
82 | #define CS4270_MODE_DIV4 0x08 | |
83 | #define CS4270_MODE_POPGUARD 0x01 | |
84 | #define CS4270_FORMAT_FREEZE_A 0x80 | |
85 | #define CS4270_FORMAT_FREEZE_B 0x40 | |
86 | #define CS4270_FORMAT_LOOPBACK 0x20 | |
87 | #define CS4270_FORMAT_DAC_MASK 0x18 | |
88 | #define CS4270_FORMAT_DAC_LJ 0x00 | |
89 | #define CS4270_FORMAT_DAC_I2S 0x08 | |
90 | #define CS4270_FORMAT_DAC_RJ16 0x18 | |
91 | #define CS4270_FORMAT_DAC_RJ24 0x10 | |
92 | #define CS4270_FORMAT_ADC_MASK 0x01 | |
93 | #define CS4270_FORMAT_ADC_LJ 0x00 | |
94 | #define CS4270_FORMAT_ADC_I2S 0x01 | |
95 | #define CS4270_TRANS_ONE_VOL 0x80 | |
96 | #define CS4270_TRANS_SOFT 0x40 | |
97 | #define CS4270_TRANS_ZERO 0x20 | |
98 | #define CS4270_TRANS_INV_ADC_A 0x08 | |
99 | #define CS4270_TRANS_INV_ADC_B 0x10 | |
100 | #define CS4270_TRANS_INV_DAC_A 0x02 | |
101 | #define CS4270_TRANS_INV_DAC_B 0x04 | |
102 | #define CS4270_TRANS_DEEMPH 0x01 | |
103 | #define CS4270_MUTE_AUTO 0x20 | |
104 | #define CS4270_MUTE_ADC_A 0x08 | |
105 | #define CS4270_MUTE_ADC_B 0x10 | |
106 | #define CS4270_MUTE_POLARITY 0x04 | |
107 | #define CS4270_MUTE_DAC_A 0x01 | |
108 | #define CS4270_MUTE_DAC_B 0x02 | |
109 | ||
ffbfd336 DM |
110 | static const char *supply_names[] = { |
111 | "va", "vd", "vlc" | |
112 | }; | |
113 | ||
0db4d070 TT |
114 | /* Private data for the CS4270 */ |
115 | struct cs4270_private { | |
116 | struct snd_soc_codec codec; | |
117 | u8 reg_cache[CS4270_NUMREGS]; | |
118 | unsigned int mclk; /* Input frequency of the MCLK pin */ | |
119 | unsigned int mode; /* The mode (I2S or left-justified) */ | |
4eae080d | 120 | unsigned int slave_mode; |
1a4ba05e | 121 | unsigned int manual_mute; |
ffbfd336 DM |
122 | |
123 | /* power domain regulators */ | |
124 | struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; | |
0db4d070 TT |
125 | }; |
126 | ||
ff7bf02f TT |
127 | /** |
128 | * struct cs4270_mode_ratios - clock ratio tables | |
129 | * @ratio: the ratio of MCLK to the sample rate | |
130 | * @speed_mode: the Speed Mode bits to set in the Mode Control register for | |
131 | * this ratio | |
132 | * @mclk: the Ratio Select bits to set in the Mode Control register for this | |
133 | * ratio | |
8432395f TT |
134 | * |
135 | * The data for this chart is taken from Table 5 of the CS4270 reference | |
136 | * manual. | |
137 | * | |
138 | * This table is used to determine how to program the Mode Control register. | |
139 | * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling | |
140 | * rates the CS4270 currently supports. | |
141 | * | |
ff7bf02f | 142 | * @speed_mode is the corresponding bit pattern to be written to the |
8432395f TT |
143 | * MODE bits of the Mode Control Register |
144 | * | |
ff7bf02f | 145 | * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of |
8432395f TT |
146 | * the Mode Control Register. |
147 | * | |
148 | * In situations where a single ratio is represented by multiple speed | |
149 | * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick | |
150 | * double-speed instead of quad-speed. However, the CS4270 errata states | |
ff7bf02f | 151 | * that divide-By-1.5 can cause failures, so we avoid that mode where |
8432395f TT |
152 | * possible. |
153 | * | |
ff7bf02f TT |
154 | * Errata: There is an errata for the CS4270 where divide-by-1.5 does not |
155 | * work if Vd is 3.3V. If this effects you, select the | |
8432395f TT |
156 | * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will |
157 | * never select any sample rates that require divide-by-1.5. | |
158 | */ | |
ff7bf02f | 159 | struct cs4270_mode_ratios { |
8432395f TT |
160 | unsigned int ratio; |
161 | u8 speed_mode; | |
162 | u8 mclk; | |
ff7bf02f TT |
163 | }; |
164 | ||
d9fb7fbd | 165 | static struct cs4270_mode_ratios cs4270_mode_ratios[] = { |
8432395f TT |
166 | {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, |
167 | #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA | |
168 | {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, | |
169 | #endif | |
170 | {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, | |
171 | {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, | |
172 | {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, | |
173 | {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, | |
174 | {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, | |
175 | {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, | |
176 | {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} | |
177 | }; | |
178 | ||
179 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ | |
180 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) | |
9dbd627b | 181 | |
ff7bf02f TT |
182 | /** |
183 | * cs4270_set_dai_sysclk - determine the CS4270 samples rates. | |
184 | * @codec_dai: the codec DAI | |
185 | * @clk_id: the clock ID (ignored) | |
186 | * @freq: the MCLK input frequency | |
187 | * @dir: the clock direction (ignored) | |
9dbd627b | 188 | * |
ff7bf02f TT |
189 | * This function is used to tell the codec driver what the input MCLK |
190 | * frequency is. | |
9dbd627b TT |
191 | * |
192 | * The value of MCLK is used to determine which sample rates are supported | |
193 | * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine | |
ff7bf02f | 194 | * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024. |
9dbd627b TT |
195 | * |
196 | * This function calculates the nine ratios and determines which ones match | |
197 | * a standard sample rate. If there's a match, then it is added to the list | |
ff7bf02f | 198 | * of supported sample rates. |
9dbd627b TT |
199 | * |
200 | * This function must be called by the machine driver's 'startup' function, | |
201 | * otherwise the list of supported sample rates will not be available in | |
202 | * time for ALSA. | |
6aababdf DM |
203 | * |
204 | * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause | |
205 | * theoretically possible sample rates to be enabled. Call it again with a | |
206 | * proper value set one the external clock is set (most probably you would do | |
207 | * that from a machine's driver 'hw_param' hook. | |
9dbd627b | 208 | */ |
e550e17f | 209 | static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
210 | int clk_id, unsigned int freq, int dir) |
211 | { | |
212 | struct snd_soc_codec *codec = codec_dai->codec; | |
213 | struct cs4270_private *cs4270 = codec->private_data; | |
214 | unsigned int rates = 0; | |
215 | unsigned int rate_min = -1; | |
216 | unsigned int rate_max = 0; | |
217 | unsigned int i; | |
218 | ||
219 | cs4270->mclk = freq; | |
220 | ||
6aababdf DM |
221 | if (cs4270->mclk) { |
222 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { | |
223 | unsigned int rate = freq / cs4270_mode_ratios[i].ratio; | |
224 | rates |= snd_pcm_rate_to_rate_bit(rate); | |
225 | if (rate < rate_min) | |
226 | rate_min = rate; | |
227 | if (rate > rate_max) | |
228 | rate_max = rate; | |
229 | } | |
230 | /* FIXME: soc should support a rate list */ | |
231 | rates &= ~SNDRV_PCM_RATE_KNOT; | |
9dbd627b | 232 | |
6aababdf DM |
233 | if (!rates) { |
234 | dev_err(codec->dev, "could not find a valid sample rate\n"); | |
235 | return -EINVAL; | |
236 | } | |
237 | } else { | |
238 | /* enable all possible rates */ | |
239 | rates = SNDRV_PCM_RATE_8000_192000; | |
240 | rate_min = 8000; | |
241 | rate_max = 192000; | |
9dbd627b TT |
242 | } |
243 | ||
244 | codec_dai->playback.rates = rates; | |
245 | codec_dai->playback.rate_min = rate_min; | |
246 | codec_dai->playback.rate_max = rate_max; | |
247 | ||
248 | codec_dai->capture.rates = rates; | |
249 | codec_dai->capture.rate_min = rate_min; | |
250 | codec_dai->capture.rate_max = rate_max; | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
ff7bf02f TT |
255 | /** |
256 | * cs4270_set_dai_fmt - configure the codec for the selected audio format | |
257 | * @codec_dai: the codec DAI | |
258 | * @format: a SND_SOC_DAIFMT_x value indicating the data format | |
9dbd627b TT |
259 | * |
260 | * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the | |
261 | * codec accordingly. | |
262 | * | |
263 | * Currently, this function only supports SND_SOC_DAIFMT_I2S and | |
264 | * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified | |
265 | * data for playback only, but ASoC currently does not support different | |
266 | * formats for playback vs. record. | |
267 | */ | |
e550e17f | 268 | static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
269 | unsigned int format) |
270 | { | |
271 | struct snd_soc_codec *codec = codec_dai->codec; | |
272 | struct cs4270_private *cs4270 = codec->private_data; | |
273 | int ret = 0; | |
274 | ||
4eae080d | 275 | /* set DAI format */ |
9dbd627b TT |
276 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
277 | case SND_SOC_DAIFMT_I2S: | |
278 | case SND_SOC_DAIFMT_LEFT_J: | |
279 | cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; | |
280 | break; | |
281 | default: | |
a6c255e0 | 282 | dev_err(codec->dev, "invalid dai format\n"); |
9dbd627b TT |
283 | ret = -EINVAL; |
284 | } | |
285 | ||
4eae080d DM |
286 | /* set master/slave audio interface */ |
287 | switch (format & SND_SOC_DAIFMT_MASTER_MASK) { | |
288 | case SND_SOC_DAIFMT_CBS_CFS: | |
289 | cs4270->slave_mode = 1; | |
290 | break; | |
291 | case SND_SOC_DAIFMT_CBM_CFM: | |
292 | cs4270->slave_mode = 0; | |
293 | break; | |
4eae080d | 294 | default: |
ff09d49a | 295 | /* all other modes are unsupported by the hardware */ |
4eae080d DM |
296 | ret = -EINVAL; |
297 | } | |
298 | ||
9dbd627b TT |
299 | return ret; |
300 | } | |
301 | ||
ff7bf02f TT |
302 | /** |
303 | * cs4270_fill_cache - pre-fill the CS4270 register cache. | |
304 | * @codec: the codec for this CS4270 | |
305 | * | |
306 | * This function fills in the CS4270 register cache by reading the register | |
307 | * values from the hardware. | |
308 | * | |
309 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | |
310 | * After the initial read to pre-fill the cache, the CS4270 never updates | |
311 | * the register values, so we won't have a cache coherency problem. | |
b0c813ce TT |
312 | * |
313 | * We use the auto-increment feature of the CS4270 to read all registers in | |
314 | * one shot. | |
315 | */ | |
316 | static int cs4270_fill_cache(struct snd_soc_codec *codec) | |
317 | { | |
318 | u8 *cache = codec->reg_cache; | |
319 | struct i2c_client *i2c_client = codec->control_data; | |
320 | s32 length; | |
321 | ||
322 | length = i2c_smbus_read_i2c_block_data(i2c_client, | |
80ab8817 | 323 | CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache); |
b0c813ce TT |
324 | |
325 | if (length != CS4270_NUMREGS) { | |
a6c255e0 | 326 | dev_err(codec->dev, "i2c read failure, addr=0x%x\n", |
b0c813ce TT |
327 | i2c_client->addr); |
328 | return -EIO; | |
329 | } | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
ff7bf02f TT |
334 | /** |
335 | * cs4270_read_reg_cache - read from the CS4270 register cache. | |
336 | * @codec: the codec for this CS4270 | |
337 | * @reg: the register to read | |
338 | * | |
339 | * This function returns the value for a given register. It reads only from | |
340 | * the register cache, not the hardware itself. | |
b0c813ce TT |
341 | * |
342 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | |
343 | * After the initial read to pre-fill the cache, the CS4270 never updates | |
ff7bf02f | 344 | * the register values, so we won't have a cache coherency problem. |
b0c813ce TT |
345 | */ |
346 | static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec, | |
347 | unsigned int reg) | |
348 | { | |
349 | u8 *cache = codec->reg_cache; | |
350 | ||
351 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | |
352 | return -EIO; | |
353 | ||
354 | return cache[reg - CS4270_FIRSTREG]; | |
355 | } | |
356 | ||
ff7bf02f TT |
357 | /** |
358 | * cs4270_i2c_write - write to a CS4270 register via the I2C bus. | |
359 | * @codec: the codec for this CS4270 | |
360 | * @reg: the register to write | |
361 | * @value: the value to write to the register | |
b0c813ce TT |
362 | * |
363 | * This function writes the given value to the given CS4270 register, and | |
364 | * also updates the register cache. | |
365 | * | |
366 | * Note that we don't use the hw_write function pointer of snd_soc_codec. | |
367 | * That's because it's too clunky: the hw_write_t prototype does not match | |
368 | * i2c_smbus_write_byte_data(), and it's just another layer of overhead. | |
369 | */ | |
370 | static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg, | |
371 | unsigned int value) | |
372 | { | |
bfc4e861 TT |
373 | u8 *cache = codec->reg_cache; |
374 | ||
b0c813ce TT |
375 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) |
376 | return -EIO; | |
377 | ||
bfc4e861 TT |
378 | /* Only perform an I2C operation if the new value is different */ |
379 | if (cache[reg - CS4270_FIRSTREG] != value) { | |
380 | struct i2c_client *client = codec->control_data; | |
381 | if (i2c_smbus_write_byte_data(client, reg, value)) { | |
a6c255e0 | 382 | dev_err(codec->dev, "i2c write failed\n"); |
bfc4e861 TT |
383 | return -EIO; |
384 | } | |
385 | ||
b0c813ce | 386 | /* We've written to the hardware, so update the cache */ |
b0c813ce | 387 | cache[reg - CS4270_FIRSTREG] = value; |
b0c813ce | 388 | } |
bfc4e861 TT |
389 | |
390 | return 0; | |
b0c813ce TT |
391 | } |
392 | ||
ff7bf02f TT |
393 | /** |
394 | * cs4270_hw_params - program the CS4270 with the given hardware parameters. | |
395 | * @substream: the audio stream | |
396 | * @params: the hardware parameters to set | |
397 | * @dai: the SOC DAI (ignored) | |
b0c813ce | 398 | * |
ff7bf02f TT |
399 | * This function programs the hardware with the values provided. |
400 | * Specifically, the sample rate and the data format. | |
401 | * | |
402 | * The .ops functions are used to provide board-specific data, like input | |
403 | * frequencies, to this driver. This function takes that information, | |
b0c813ce TT |
404 | * combines it with the hardware parameters provided, and programs the |
405 | * hardware accordingly. | |
406 | */ | |
407 | static int cs4270_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
408 | struct snd_pcm_hw_params *params, |
409 | struct snd_soc_dai *dai) | |
b0c813ce TT |
410 | { |
411 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
412 | struct snd_soc_device *socdev = rtd->socdev; | |
6627a653 | 413 | struct snd_soc_codec *codec = socdev->card->codec; |
b0c813ce | 414 | struct cs4270_private *cs4270 = codec->private_data; |
e34ba212 | 415 | int ret; |
b0c813ce TT |
416 | unsigned int i; |
417 | unsigned int rate; | |
418 | unsigned int ratio; | |
419 | int reg; | |
420 | ||
421 | /* Figure out which MCLK/LRCK ratio to use */ | |
422 | ||
423 | rate = params_rate(params); /* Sampling rate, in Hz */ | |
424 | ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ | |
425 | ||
9dbd627b | 426 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { |
8432395f | 427 | if (cs4270_mode_ratios[i].ratio == ratio) |
b0c813ce TT |
428 | break; |
429 | } | |
430 | ||
9dbd627b | 431 | if (i == NUM_MCLK_RATIOS) { |
b0c813ce | 432 | /* We did not find a matching ratio */ |
a6c255e0 | 433 | dev_err(codec->dev, "could not find matching ratio\n"); |
b0c813ce TT |
434 | return -EINVAL; |
435 | } | |
436 | ||
d5e9ba1d | 437 | /* Set the sample rate */ |
b0c813ce TT |
438 | |
439 | reg = snd_soc_read(codec, CS4270_MODE); | |
440 | reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); | |
4eae080d DM |
441 | reg |= cs4270_mode_ratios[i].mclk; |
442 | ||
443 | if (cs4270->slave_mode) | |
444 | reg |= CS4270_MODE_SLAVE; | |
445 | else | |
446 | reg |= cs4270_mode_ratios[i].speed_mode; | |
b0c813ce TT |
447 | |
448 | ret = snd_soc_write(codec, CS4270_MODE, reg); | |
449 | if (ret < 0) { | |
a6c255e0 | 450 | dev_err(codec->dev, "i2c write failed\n"); |
b0c813ce TT |
451 | return ret; |
452 | } | |
453 | ||
d5e9ba1d | 454 | /* Set the DAI format */ |
b0c813ce TT |
455 | |
456 | reg = snd_soc_read(codec, CS4270_FORMAT); | |
457 | reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); | |
458 | ||
459 | switch (cs4270->mode) { | |
460 | case SND_SOC_DAIFMT_I2S: | |
461 | reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; | |
462 | break; | |
463 | case SND_SOC_DAIFMT_LEFT_J: | |
464 | reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; | |
465 | break; | |
466 | default: | |
a6c255e0 | 467 | dev_err(codec->dev, "unknown dai format\n"); |
b0c813ce TT |
468 | return -EINVAL; |
469 | } | |
470 | ||
471 | ret = snd_soc_write(codec, CS4270_FORMAT, reg); | |
472 | if (ret < 0) { | |
a6c255e0 | 473 | dev_err(codec->dev, "i2c write failed\n"); |
b0c813ce TT |
474 | return ret; |
475 | } | |
476 | ||
b0c813ce TT |
477 | return ret; |
478 | } | |
479 | ||
ff7bf02f | 480 | /** |
1a4ba05e | 481 | * cs4270_dai_mute - enable/disable the CS4270 external mute |
ff7bf02f TT |
482 | * @dai: the SOC DAI |
483 | * @mute: 0 = disable mute, 1 = enable mute | |
b0c813ce TT |
484 | * |
485 | * This function toggles the mute bits in the MUTE register. The CS4270's | |
486 | * mute capability is intended for external muting circuitry, so if the | |
487 | * board does not have the MUTEA or MUTEB pins connected to such circuitry, | |
488 | * then this function will do nothing. | |
489 | */ | |
1a4ba05e | 490 | static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute) |
b0c813ce TT |
491 | { |
492 | struct snd_soc_codec *codec = dai->codec; | |
1a4ba05e | 493 | struct cs4270_private *cs4270 = codec->private_data; |
b0c813ce TT |
494 | int reg6; |
495 | ||
496 | reg6 = snd_soc_read(codec, CS4270_MUTE); | |
497 | ||
498 | if (mute) | |
d5e9ba1d | 499 | reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; |
1a4ba05e | 500 | else { |
d5e9ba1d | 501 | reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); |
1a4ba05e DM |
502 | reg6 |= cs4270->manual_mute; |
503 | } | |
b0c813ce TT |
504 | |
505 | return snd_soc_write(codec, CS4270_MUTE, reg6); | |
506 | } | |
b0c813ce | 507 | |
1a4ba05e DM |
508 | /** |
509 | * cs4270_soc_put_mute - put callback for the 'Master Playback switch' | |
510 | * alsa control. | |
511 | * @kcontrol: mixer control | |
512 | * @ucontrol: control element information | |
513 | * | |
514 | * This function basically passes the arguments on to the generic | |
515 | * snd_soc_put_volsw() function and saves the mute information in | |
516 | * our private data structure. This is because we want to prevent | |
517 | * cs4270_dai_mute() neglecting the user's decision to manually | |
518 | * mute the codec's output. | |
519 | * | |
520 | * Returns 0 for success. | |
521 | */ | |
522 | static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, | |
523 | struct snd_ctl_elem_value *ucontrol) | |
524 | { | |
525 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
526 | struct cs4270_private *cs4270 = codec->private_data; | |
527 | int left = !ucontrol->value.integer.value[0]; | |
528 | int right = !ucontrol->value.integer.value[1]; | |
529 | ||
530 | cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) | | |
531 | (right ? CS4270_MUTE_DAC_B : 0); | |
532 | ||
533 | return snd_soc_put_volsw(kcontrol, ucontrol); | |
534 | } | |
535 | ||
b0c813ce TT |
536 | /* A list of non-DAPM controls that the CS4270 supports */ |
537 | static const struct snd_kcontrol_new cs4270_snd_controls[] = { | |
538 | SOC_DOUBLE_R("Master Playback Volume", | |
d5e9ba1d TT |
539 | CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1), |
540 | SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0), | |
541 | SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0), | |
542 | SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0), | |
7e1aa1dc | 543 | SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0), |
d5e9ba1d TT |
544 | SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1), |
545 | SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0), | |
1a4ba05e DM |
546 | SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1), |
547 | SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1, | |
548 | snd_soc_get_volsw, cs4270_soc_put_mute), | |
b0c813ce TT |
549 | }; |
550 | ||
b0c813ce | 551 | /* |
ff7bf02f | 552 | * cs4270_codec - global variable to store codec for the ASoC probe function |
b0c813ce TT |
553 | * |
554 | * If struct i2c_driver had a private_data field, we wouldn't need to use | |
04eb093c TT |
555 | * cs4270_codec. This is the only way to pass the codec structure from |
556 | * cs4270_i2c_probe() to cs4270_probe(). Unfortunately, there is no good | |
557 | * way to synchronize these two functions. cs4270_i2c_probe() can be called | |
558 | * multiple times before cs4270_probe() is called even once. So for now, we | |
559 | * also only allow cs4270_i2c_probe() to be run once. That means that we do | |
560 | * not support more than one cs4270 device in the system, at least for now. | |
b0c813ce | 561 | */ |
04eb093c | 562 | static struct snd_soc_codec *cs4270_codec; |
b0c813ce | 563 | |
6335d055 EM |
564 | static struct snd_soc_dai_ops cs4270_dai_ops = { |
565 | .hw_params = cs4270_hw_params, | |
566 | .set_sysclk = cs4270_set_dai_sysclk, | |
567 | .set_fmt = cs4270_set_dai_fmt, | |
1a4ba05e | 568 | .digital_mute = cs4270_dai_mute, |
6335d055 EM |
569 | }; |
570 | ||
0db4d070 TT |
571 | struct snd_soc_dai cs4270_dai = { |
572 | .name = "cs4270", | |
573 | .playback = { | |
574 | .stream_name = "Playback", | |
575 | .channels_min = 1, | |
576 | .channels_max = 2, | |
577 | .rates = 0, | |
578 | .formats = CS4270_FORMATS, | |
579 | }, | |
580 | .capture = { | |
581 | .stream_name = "Capture", | |
582 | .channels_min = 1, | |
583 | .channels_max = 2, | |
584 | .rates = 0, | |
585 | .formats = CS4270_FORMATS, | |
586 | }, | |
6335d055 | 587 | .ops = &cs4270_dai_ops, |
0db4d070 TT |
588 | }; |
589 | EXPORT_SYMBOL_GPL(cs4270_dai); | |
590 | ||
ff7bf02f TT |
591 | /** |
592 | * cs4270_probe - ASoC probe function | |
593 | * @pdev: platform device | |
594 | * | |
595 | * This function is called when ASoC has all the pieces it needs to | |
596 | * instantiate a sound driver. | |
04eb093c TT |
597 | */ |
598 | static int cs4270_probe(struct platform_device *pdev) | |
599 | { | |
600 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
601 | struct snd_soc_codec *codec = cs4270_codec; | |
ffbfd336 DM |
602 | struct cs4270_private *cs4270 = codec->private_data; |
603 | int i, ret; | |
04eb093c TT |
604 | |
605 | /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */ | |
606 | socdev->card->codec = codec; | |
607 | ||
608 | /* Register PCMs */ | |
609 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
610 | if (ret < 0) { | |
a6c255e0 | 611 | dev_err(codec->dev, "failed to create pcms\n"); |
04eb093c TT |
612 | return ret; |
613 | } | |
614 | ||
615 | /* Add the non-DAPM controls */ | |
eb5f6d75 PZ |
616 | ret = snd_soc_add_controls(codec, cs4270_snd_controls, |
617 | ARRAY_SIZE(cs4270_snd_controls)); | |
618 | if (ret < 0) { | |
619 | dev_err(codec->dev, "failed to add controls\n"); | |
620 | goto error_free_pcms; | |
04eb093c TT |
621 | } |
622 | ||
ffbfd336 DM |
623 | /* get the power supply regulators */ |
624 | for (i = 0; i < ARRAY_SIZE(supply_names); i++) | |
625 | cs4270->supplies[i].supply = supply_names[i]; | |
626 | ||
627 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies), | |
628 | cs4270->supplies); | |
629 | if (ret < 0) | |
630 | goto error_free_pcms; | |
631 | ||
c0ff4bcd DM |
632 | ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), |
633 | cs4270->supplies); | |
634 | if (ret < 0) | |
635 | goto error_free_regulators; | |
636 | ||
04eb093c TT |
637 | return 0; |
638 | ||
c0ff4bcd DM |
639 | error_free_regulators: |
640 | regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), | |
641 | cs4270->supplies); | |
642 | ||
04eb093c TT |
643 | error_free_pcms: |
644 | snd_soc_free_pcms(socdev); | |
645 | ||
646 | return ret; | |
647 | } | |
648 | ||
ff7bf02f TT |
649 | /** |
650 | * cs4270_remove - ASoC remove function | |
651 | * @pdev: platform device | |
652 | * | |
653 | * This function is the counterpart to cs4270_probe(). | |
654 | */ | |
04eb093c TT |
655 | static int cs4270_remove(struct platform_device *pdev) |
656 | { | |
657 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
ffbfd336 DM |
658 | struct snd_soc_codec *codec = cs4270_codec; |
659 | struct cs4270_private *cs4270 = codec->private_data; | |
04eb093c TT |
660 | |
661 | snd_soc_free_pcms(socdev); | |
c0ff4bcd | 662 | regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies); |
ffbfd336 | 663 | regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies); |
04eb093c TT |
664 | |
665 | return 0; | |
666 | }; | |
667 | ||
ff7bf02f TT |
668 | /** |
669 | * cs4270_i2c_probe - initialize the I2C interface of the CS4270 | |
670 | * @i2c_client: the I2C client object | |
671 | * @id: the I2C device ID (ignored) | |
b0c813ce | 672 | * |
ff7bf02f TT |
673 | * This function is called whenever the I2C subsystem finds a device that |
674 | * matches the device ID given via a prior call to i2c_add_driver(). | |
b0c813ce | 675 | */ |
ec2cd95f TT |
676 | static int cs4270_i2c_probe(struct i2c_client *i2c_client, |
677 | const struct i2c_device_id *id) | |
b0c813ce | 678 | { |
0db4d070 TT |
679 | struct snd_soc_codec *codec; |
680 | struct cs4270_private *cs4270; | |
d5e9ba1d | 681 | unsigned int reg; |
04eb093c TT |
682 | int ret; |
683 | ||
684 | /* For now, we only support one cs4270 device in the system. See the | |
685 | * comment for cs4270_codec. | |
686 | */ | |
687 | if (cs4270_codec) { | |
a6c255e0 | 688 | dev_err(&i2c_client->dev, "ignoring CS4270 at addr %X\n", |
04eb093c | 689 | i2c_client->addr); |
a6c255e0 | 690 | dev_err(&i2c_client->dev, "only one per board allowed\n"); |
04eb093c TT |
691 | /* Should we return something other than ENODEV here? */ |
692 | return -ENODEV; | |
693 | } | |
b0c813ce | 694 | |
b0c813ce TT |
695 | /* Verify that we have a CS4270 */ |
696 | ||
697 | ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID); | |
698 | if (ret < 0) { | |
a6c255e0 | 699 | dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n", |
04eb093c | 700 | i2c_client->addr); |
0db4d070 | 701 | return ret; |
b0c813ce TT |
702 | } |
703 | /* The top four bits of the chip ID should be 1100. */ | |
704 | if ((ret & 0xF0) != 0xC0) { | |
a6c255e0 | 705 | dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n", |
0db4d070 TT |
706 | i2c_client->addr); |
707 | return -ENODEV; | |
b0c813ce TT |
708 | } |
709 | ||
a6c255e0 | 710 | dev_info(&i2c_client->dev, "found device at i2c address %X\n", |
ec2cd95f | 711 | i2c_client->addr); |
a6c255e0 | 712 | dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF); |
b0c813ce | 713 | |
0db4d070 TT |
714 | /* Allocate enough space for the snd_soc_codec structure |
715 | and our private data together. */ | |
716 | cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL); | |
717 | if (!cs4270) { | |
a6c255e0 | 718 | dev_err(&i2c_client->dev, "could not allocate codec\n"); |
0db4d070 TT |
719 | return -ENOMEM; |
720 | } | |
721 | codec = &cs4270->codec; | |
0db4d070 TT |
722 | |
723 | mutex_init(&codec->mutex); | |
724 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
725 | INIT_LIST_HEAD(&codec->dapm_paths); | |
726 | ||
a6c255e0 | 727 | codec->dev = &i2c_client->dev; |
0db4d070 TT |
728 | codec->name = "CS4270"; |
729 | codec->owner = THIS_MODULE; | |
730 | codec->dai = &cs4270_dai; | |
731 | codec->num_dai = 1; | |
732 | codec->private_data = cs4270; | |
b0c813ce TT |
733 | codec->control_data = i2c_client; |
734 | codec->read = cs4270_read_reg_cache; | |
735 | codec->write = cs4270_i2c_write; | |
0db4d070 | 736 | codec->reg_cache = cs4270->reg_cache; |
b0c813ce TT |
737 | codec->reg_cache_size = CS4270_NUMREGS; |
738 | ||
739 | /* The I2C interface is set up, so pre-fill our register cache */ | |
740 | ||
741 | ret = cs4270_fill_cache(codec); | |
742 | if (ret < 0) { | |
a6c255e0 | 743 | dev_err(&i2c_client->dev, "failed to fill register cache\n"); |
0db4d070 TT |
744 | goto error_free_codec; |
745 | } | |
746 | ||
d5e9ba1d TT |
747 | /* Disable auto-mute. This feature appears to be buggy. In some |
748 | * situations, auto-mute will not deactivate when it should, so we want | |
749 | * this feature disabled by default. An application (e.g. alsactl) can | |
750 | * re-enabled it by using the controls. | |
751 | */ | |
752 | ||
753 | reg = cs4270_read_reg_cache(codec, CS4270_MUTE); | |
754 | reg &= ~CS4270_MUTE_AUTO; | |
755 | ret = cs4270_i2c_write(codec, CS4270_MUTE, reg); | |
756 | if (ret < 0) { | |
757 | dev_err(&i2c_client->dev, "i2c write failed\n"); | |
758 | return ret; | |
759 | } | |
760 | ||
761 | /* Disable automatic volume control. The hardware enables, and it | |
762 | * causes volume change commands to be delayed, sometimes until after | |
763 | * playback has started. An application (e.g. alsactl) can | |
764 | * re-enabled it by using the controls. | |
765 | */ | |
766 | ||
767 | reg = cs4270_read_reg_cache(codec, CS4270_TRANS); | |
768 | reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO); | |
769 | ret = cs4270_i2c_write(codec, CS4270_TRANS, reg); | |
770 | if (ret < 0) { | |
771 | dev_err(&i2c_client->dev, "i2c write failed\n"); | |
772 | return ret; | |
773 | } | |
774 | ||
a6c255e0 TT |
775 | /* Initialize the DAI. Normally, we'd prefer to have a kmalloc'd DAI |
776 | * structure for each CS4270 device, but the machine driver needs to | |
777 | * have a pointer to the DAI structure, so for now it must be a global | |
778 | * variable. | |
779 | */ | |
780 | cs4270_dai.dev = &i2c_client->dev; | |
781 | ||
04eb093c TT |
782 | /* Register the DAI. If all the other ASoC driver have already |
783 | * registered, then this will call our probe function, so | |
784 | * cs4270_codec needs to be ready. | |
785 | */ | |
a6c255e0 | 786 | cs4270_codec = codec; |
04eb093c | 787 | ret = snd_soc_register_dai(&cs4270_dai); |
0db4d070 | 788 | if (ret < 0) { |
a6c255e0 | 789 | dev_err(&i2c_client->dev, "failed to register DAIe\n"); |
0db4d070 | 790 | goto error_free_codec; |
b0c813ce TT |
791 | } |
792 | ||
04eb093c | 793 | i2c_set_clientdata(i2c_client, cs4270); |
ec2cd95f | 794 | |
b0c813ce TT |
795 | return 0; |
796 | ||
0db4d070 TT |
797 | error_free_codec: |
798 | kfree(cs4270); | |
a6c255e0 TT |
799 | cs4270_codec = NULL; |
800 | cs4270_dai.dev = NULL; | |
b0c813ce | 801 | |
b0c813ce TT |
802 | return ret; |
803 | } | |
804 | ||
ff7bf02f TT |
805 | /** |
806 | * cs4270_i2c_remove - remove an I2C device | |
807 | * @i2c_client: the I2C client object | |
808 | * | |
809 | * This function is the counterpart to cs4270_i2c_probe(). | |
810 | */ | |
0db4d070 TT |
811 | static int cs4270_i2c_remove(struct i2c_client *i2c_client) |
812 | { | |
04eb093c | 813 | struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client); |
0db4d070 | 814 | |
0db4d070 | 815 | kfree(cs4270); |
a6c255e0 TT |
816 | cs4270_codec = NULL; |
817 | cs4270_dai.dev = NULL; | |
0db4d070 TT |
818 | |
819 | return 0; | |
820 | } | |
821 | ||
ff7bf02f TT |
822 | /* |
823 | * cs4270_id - I2C device IDs supported by this driver | |
824 | */ | |
0db4d070 | 825 | static struct i2c_device_id cs4270_id[] = { |
ff637d38 TT |
826 | {"cs4270", 0}, |
827 | {} | |
828 | }; | |
829 | MODULE_DEVICE_TABLE(i2c, cs4270_id); | |
830 | ||
5e7c0344 DM |
831 | #ifdef CONFIG_PM |
832 | ||
833 | /* This suspend/resume implementation can handle both - a simple standby | |
834 | * where the codec remains powered, and a full suspend, where the voltage | |
835 | * domain the codec is connected to is teared down and/or any other hardware | |
836 | * reset condition is asserted. | |
837 | * | |
838 | * The codec's own power saving features are enabled in the suspend callback, | |
839 | * and all registers are written back to the hardware when resuming. | |
840 | */ | |
841 | ||
15b5bdae DM |
842 | static int cs4270_soc_suspend(struct platform_device *pdev, pm_message_t mesg) |
843 | { | |
844 | struct snd_soc_codec *codec = cs4270_codec; | |
ffbfd336 DM |
845 | struct cs4270_private *cs4270 = codec->private_data; |
846 | int reg, ret; | |
15b5bdae | 847 | |
ffbfd336 DM |
848 | reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL; |
849 | if (reg < 0) | |
850 | return reg; | |
851 | ||
852 | ret = snd_soc_write(codec, CS4270_PWRCTL, reg); | |
853 | if (ret < 0) | |
854 | return ret; | |
855 | ||
856 | regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), | |
857 | cs4270->supplies); | |
858 | ||
859 | return 0; | |
15b5bdae DM |
860 | } |
861 | ||
862 | static int cs4270_soc_resume(struct platform_device *pdev) | |
863 | { | |
864 | struct snd_soc_codec *codec = cs4270_codec; | |
ffbfd336 | 865 | struct cs4270_private *cs4270 = codec->private_data; |
15b5bdae | 866 | struct i2c_client *i2c_client = codec->control_data; |
5e7c0344 DM |
867 | int reg; |
868 | ||
ffbfd336 DM |
869 | regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), |
870 | cs4270->supplies); | |
871 | ||
5e7c0344 DM |
872 | /* In case the device was put to hard reset during sleep, we need to |
873 | * wait 500ns here before any I2C communication. */ | |
874 | ndelay(500); | |
875 | ||
876 | /* first restore the entire register cache ... */ | |
877 | for (reg = CS4270_FIRSTREG; reg <= CS4270_LASTREG; reg++) { | |
878 | u8 val = snd_soc_read(codec, reg); | |
879 | ||
15b5bdae | 880 | if (i2c_smbus_write_byte_data(i2c_client, reg, val)) { |
5e7c0344 DM |
881 | dev_err(codec->dev, "i2c write failed\n"); |
882 | return -EIO; | |
883 | } | |
884 | } | |
885 | ||
886 | /* ... then disable the power-down bits */ | |
887 | reg = snd_soc_read(codec, CS4270_PWRCTL); | |
888 | reg &= ~CS4270_PWRCTL_PDN_ALL; | |
889 | ||
890 | return snd_soc_write(codec, CS4270_PWRCTL, reg); | |
891 | } | |
892 | #else | |
15b5bdae DM |
893 | #define cs4270_soc_suspend NULL |
894 | #define cs4270_soc_resume NULL | |
5e7c0344 DM |
895 | #endif /* CONFIG_PM */ |
896 | ||
ff7bf02f TT |
897 | /* |
898 | * cs4270_i2c_driver - I2C device identification | |
899 | * | |
900 | * This structure tells the I2C subsystem how to identify and support a | |
901 | * given I2C device type. | |
902 | */ | |
ff637d38 TT |
903 | static struct i2c_driver cs4270_i2c_driver = { |
904 | .driver = { | |
905 | .name = "cs4270", | |
906 | .owner = THIS_MODULE, | |
907 | }, | |
908 | .id_table = cs4270_id, | |
909 | .probe = cs4270_i2c_probe, | |
0db4d070 | 910 | .remove = cs4270_i2c_remove, |
ff637d38 | 911 | }; |
b0c813ce | 912 | |
b0c813ce TT |
913 | /* |
914 | * ASoC codec device structure | |
915 | * | |
916 | * Assign this variable to the codec_dev field of the machine driver's | |
917 | * snd_soc_device structure. | |
918 | */ | |
919 | struct snd_soc_codec_device soc_codec_device_cs4270 = { | |
920 | .probe = cs4270_probe, | |
15b5bdae DM |
921 | .remove = cs4270_remove, |
922 | .suspend = cs4270_soc_suspend, | |
923 | .resume = cs4270_soc_resume, | |
b0c813ce TT |
924 | }; |
925 | EXPORT_SYMBOL_GPL(soc_codec_device_cs4270); | |
926 | ||
c9b3a40f | 927 | static int __init cs4270_init(void) |
64089b84 | 928 | { |
a6c255e0 | 929 | pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n"); |
0db4d070 | 930 | |
04eb093c | 931 | return i2c_add_driver(&cs4270_i2c_driver); |
64089b84 MB |
932 | } |
933 | module_init(cs4270_init); | |
934 | ||
935 | static void __exit cs4270_exit(void) | |
936 | { | |
04eb093c | 937 | i2c_del_driver(&cs4270_i2c_driver); |
64089b84 MB |
938 | } |
939 | module_exit(cs4270_exit); | |
940 | ||
b0c813ce TT |
941 | MODULE_AUTHOR("Timur Tabi <timur@freescale.com>"); |
942 | MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver"); | |
943 | MODULE_LICENSE("GPL"); |