ASoC: core: Add support for DAI and machine kcontrols.
[deliverable/linux.git] / sound / soc / codecs / cs4270.c
CommitLineData
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1/*
2 * CS4270 ALSA SoC (ASoC) codec driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
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6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
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10 *
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
12 *
13 * Current features/limitations:
14 *
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15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
5e7c0344 21 * - Power management is supported
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22 */
23
24#include <linux/module.h>
5a0e3ad6 25#include <linux/slab.h>
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26#include <sound/core.h>
27#include <sound/soc.h>
28#include <sound/initval.h>
29#include <linux/i2c.h>
5e7c0344 30#include <linux/delay.h>
ffbfd336 31#include <linux/regulator/consumer.h>
b0c813ce 32
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33/*
34 * The codec isn't really big-endian or little-endian, since the I2S
35 * interface requires data to be sent serially with the MSbit first.
36 * However, to support BE and LE I2S devices, we specify both here. That
37 * way, ALSA will always match the bit patterns.
38 */
39#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
40 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
41 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
42 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
43 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
44 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
45
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46/* CS4270 registers addresses */
47#define CS4270_CHIPID 0x01 /* Chip ID */
48#define CS4270_PWRCTL 0x02 /* Power Control */
49#define CS4270_MODE 0x03 /* Mode Control */
50#define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
51#define CS4270_TRANS 0x05 /* Transition Control */
52#define CS4270_MUTE 0x06 /* Mute Control */
53#define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
54#define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
55
56#define CS4270_FIRSTREG 0x01
57#define CS4270_LASTREG 0x08
58#define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
80ab8817 59#define CS4270_I2C_INCR 0x80
9dbd627b 60
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61/* Bit masks for the CS4270 registers */
62#define CS4270_CHIPID_ID 0xF0
63#define CS4270_CHIPID_REV 0x0F
64#define CS4270_PWRCTL_FREEZE 0x80
65#define CS4270_PWRCTL_PDN_ADC 0x20
66#define CS4270_PWRCTL_PDN_DAC 0x02
67#define CS4270_PWRCTL_PDN 0x01
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68#define CS4270_PWRCTL_PDN_ALL \
69 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
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70#define CS4270_MODE_SPEED_MASK 0x30
71#define CS4270_MODE_1X 0x00
72#define CS4270_MODE_2X 0x10
73#define CS4270_MODE_4X 0x20
74#define CS4270_MODE_SLAVE 0x30
75#define CS4270_MODE_DIV_MASK 0x0E
76#define CS4270_MODE_DIV1 0x00
77#define CS4270_MODE_DIV15 0x02
78#define CS4270_MODE_DIV2 0x04
79#define CS4270_MODE_DIV3 0x06
80#define CS4270_MODE_DIV4 0x08
81#define CS4270_MODE_POPGUARD 0x01
82#define CS4270_FORMAT_FREEZE_A 0x80
83#define CS4270_FORMAT_FREEZE_B 0x40
84#define CS4270_FORMAT_LOOPBACK 0x20
85#define CS4270_FORMAT_DAC_MASK 0x18
86#define CS4270_FORMAT_DAC_LJ 0x00
87#define CS4270_FORMAT_DAC_I2S 0x08
88#define CS4270_FORMAT_DAC_RJ16 0x18
89#define CS4270_FORMAT_DAC_RJ24 0x10
90#define CS4270_FORMAT_ADC_MASK 0x01
91#define CS4270_FORMAT_ADC_LJ 0x00
92#define CS4270_FORMAT_ADC_I2S 0x01
93#define CS4270_TRANS_ONE_VOL 0x80
94#define CS4270_TRANS_SOFT 0x40
95#define CS4270_TRANS_ZERO 0x20
96#define CS4270_TRANS_INV_ADC_A 0x08
97#define CS4270_TRANS_INV_ADC_B 0x10
98#define CS4270_TRANS_INV_DAC_A 0x02
99#define CS4270_TRANS_INV_DAC_B 0x04
100#define CS4270_TRANS_DEEMPH 0x01
101#define CS4270_MUTE_AUTO 0x20
102#define CS4270_MUTE_ADC_A 0x08
103#define CS4270_MUTE_ADC_B 0x10
104#define CS4270_MUTE_POLARITY 0x04
105#define CS4270_MUTE_DAC_A 0x01
106#define CS4270_MUTE_DAC_B 0x02
107
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108/* Power-on default values for the registers
109 *
110 * This array contains the power-on default values of the registers, with the
111 * exception of the "CHIPID" register (01h). The lower four bits of that
112 * register contain the hardware revision, so it is treated as volatile.
113 *
114 * Also note that on the CS4270, the first readable register is 1, but ASoC
115 * assumes the first register is 0. Therfore, the array must have an entry for
116 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
117 * be read.
118 */
119static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
120 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
121};
122
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123static const char *supply_names[] = {
124 "va", "vd", "vlc"
125};
126
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127/* Private data for the CS4270 */
128struct cs4270_private {
f0fba2ad 129 enum snd_soc_control_type control_type;
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130 unsigned int mclk; /* Input frequency of the MCLK pin */
131 unsigned int mode; /* The mode (I2S or left-justified) */
4eae080d 132 unsigned int slave_mode;
1a4ba05e 133 unsigned int manual_mute;
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134
135 /* power domain regulators */
136 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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137};
138
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139/**
140 * struct cs4270_mode_ratios - clock ratio tables
141 * @ratio: the ratio of MCLK to the sample rate
142 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
143 * this ratio
144 * @mclk: the Ratio Select bits to set in the Mode Control register for this
145 * ratio
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146 *
147 * The data for this chart is taken from Table 5 of the CS4270 reference
148 * manual.
149 *
150 * This table is used to determine how to program the Mode Control register.
151 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
152 * rates the CS4270 currently supports.
153 *
ff7bf02f 154 * @speed_mode is the corresponding bit pattern to be written to the
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155 * MODE bits of the Mode Control Register
156 *
ff7bf02f 157 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
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158 * the Mode Control Register.
159 *
160 * In situations where a single ratio is represented by multiple speed
161 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
162 * double-speed instead of quad-speed. However, the CS4270 errata states
ff7bf02f 163 * that divide-By-1.5 can cause failures, so we avoid that mode where
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164 * possible.
165 *
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166 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
167 * work if Vd is 3.3V. If this effects you, select the
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168 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
169 * never select any sample rates that require divide-by-1.5.
170 */
ff7bf02f 171struct cs4270_mode_ratios {
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172 unsigned int ratio;
173 u8 speed_mode;
174 u8 mclk;
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175};
176
d9fb7fbd 177static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
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178 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
179#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
180 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
181#endif
182 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
183 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
184 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
185 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
186 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
187 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
188 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
189};
190
191/* The number of MCLK/LRCK ratios supported by the CS4270 */
192#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
9dbd627b 193
d4754ec9 194static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
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195{
196 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
197}
198
d4754ec9 199static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
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200{
201 /* Unreadable registers are considered volatile */
202 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
203 return 1;
204
205 return reg == CS4270_CHIPID;
206}
207
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208/**
209 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
210 * @codec_dai: the codec DAI
211 * @clk_id: the clock ID (ignored)
212 * @freq: the MCLK input frequency
213 * @dir: the clock direction (ignored)
9dbd627b 214 *
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215 * This function is used to tell the codec driver what the input MCLK
216 * frequency is.
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217 *
218 * The value of MCLK is used to determine which sample rates are supported
219 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
ff7bf02f 220 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
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221 *
222 * This function calculates the nine ratios and determines which ones match
223 * a standard sample rate. If there's a match, then it is added to the list
ff7bf02f 224 * of supported sample rates.
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225 *
226 * This function must be called by the machine driver's 'startup' function,
227 * otherwise the list of supported sample rates will not be available in
228 * time for ALSA.
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229 *
230 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
231 * theoretically possible sample rates to be enabled. Call it again with a
232 * proper value set one the external clock is set (most probably you would do
233 * that from a machine's driver 'hw_param' hook.
9dbd627b 234 */
e550e17f 235static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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236 int clk_id, unsigned int freq, int dir)
237{
238 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 239 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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240
241 cs4270->mclk = freq;
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242 return 0;
243}
244
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245/**
246 * cs4270_set_dai_fmt - configure the codec for the selected audio format
247 * @codec_dai: the codec DAI
248 * @format: a SND_SOC_DAIFMT_x value indicating the data format
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249 *
250 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
251 * codec accordingly.
252 *
253 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
254 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
255 * data for playback only, but ASoC currently does not support different
256 * formats for playback vs. record.
257 */
e550e17f 258static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
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259 unsigned int format)
260{
261 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 262 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
9dbd627b 263
4eae080d 264 /* set DAI format */
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265 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
266 case SND_SOC_DAIFMT_I2S:
267 case SND_SOC_DAIFMT_LEFT_J:
268 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
269 break;
270 default:
a6c255e0 271 dev_err(codec->dev, "invalid dai format\n");
ac60155f 272 return -EINVAL;
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273 }
274
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275 /* set master/slave audio interface */
276 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
277 case SND_SOC_DAIFMT_CBS_CFS:
278 cs4270->slave_mode = 1;
279 break;
280 case SND_SOC_DAIFMT_CBM_CFM:
281 cs4270->slave_mode = 0;
282 break;
4eae080d 283 default:
ff09d49a 284 /* all other modes are unsupported by the hardware */
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285 dev_err(codec->dev, "Unknown master/slave configuration\n");
286 return -EINVAL;
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287 }
288
ac60155f 289 return 0;
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290}
291
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292/**
293 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
294 * @substream: the audio stream
295 * @params: the hardware parameters to set
296 * @dai: the SOC DAI (ignored)
b0c813ce 297 *
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298 * This function programs the hardware with the values provided.
299 * Specifically, the sample rate and the data format.
300 *
301 * The .ops functions are used to provide board-specific data, like input
302 * frequencies, to this driver. This function takes that information,
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303 * combines it with the hardware parameters provided, and programs the
304 * hardware accordingly.
305 */
306static int cs4270_hw_params(struct snd_pcm_substream *substream,
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307 struct snd_pcm_hw_params *params,
308 struct snd_soc_dai *dai)
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309{
310 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 311 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 312 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
e34ba212 313 int ret;
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314 unsigned int i;
315 unsigned int rate;
316 unsigned int ratio;
317 int reg;
318
319 /* Figure out which MCLK/LRCK ratio to use */
320
321 rate = params_rate(params); /* Sampling rate, in Hz */
322 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
323
9dbd627b 324 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
8432395f 325 if (cs4270_mode_ratios[i].ratio == ratio)
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326 break;
327 }
328
9dbd627b 329 if (i == NUM_MCLK_RATIOS) {
b0c813ce 330 /* We did not find a matching ratio */
a6c255e0 331 dev_err(codec->dev, "could not find matching ratio\n");
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332 return -EINVAL;
333 }
334
d5e9ba1d 335 /* Set the sample rate */
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336
337 reg = snd_soc_read(codec, CS4270_MODE);
338 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
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339 reg |= cs4270_mode_ratios[i].mclk;
340
341 if (cs4270->slave_mode)
342 reg |= CS4270_MODE_SLAVE;
343 else
344 reg |= cs4270_mode_ratios[i].speed_mode;
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345
346 ret = snd_soc_write(codec, CS4270_MODE, reg);
347 if (ret < 0) {
a6c255e0 348 dev_err(codec->dev, "i2c write failed\n");
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349 return ret;
350 }
351
d5e9ba1d 352 /* Set the DAI format */
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353
354 reg = snd_soc_read(codec, CS4270_FORMAT);
355 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
356
357 switch (cs4270->mode) {
358 case SND_SOC_DAIFMT_I2S:
359 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
360 break;
361 case SND_SOC_DAIFMT_LEFT_J:
362 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
363 break;
364 default:
a6c255e0 365 dev_err(codec->dev, "unknown dai format\n");
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366 return -EINVAL;
367 }
368
369 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
370 if (ret < 0) {
a6c255e0 371 dev_err(codec->dev, "i2c write failed\n");
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372 return ret;
373 }
374
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375 return ret;
376}
377
ff7bf02f 378/**
1a4ba05e 379 * cs4270_dai_mute - enable/disable the CS4270 external mute
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380 * @dai: the SOC DAI
381 * @mute: 0 = disable mute, 1 = enable mute
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382 *
383 * This function toggles the mute bits in the MUTE register. The CS4270's
384 * mute capability is intended for external muting circuitry, so if the
385 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
386 * then this function will do nothing.
387 */
1a4ba05e 388static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
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389{
390 struct snd_soc_codec *codec = dai->codec;
b2c812e2 391 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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392 int reg6;
393
394 reg6 = snd_soc_read(codec, CS4270_MUTE);
395
396 if (mute)
d5e9ba1d 397 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
1a4ba05e 398 else {
d5e9ba1d 399 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
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400 reg6 |= cs4270->manual_mute;
401 }
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402
403 return snd_soc_write(codec, CS4270_MUTE, reg6);
404}
b0c813ce 405
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406/**
407 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
408 * alsa control.
409 * @kcontrol: mixer control
410 * @ucontrol: control element information
411 *
412 * This function basically passes the arguments on to the generic
413 * snd_soc_put_volsw() function and saves the mute information in
414 * our private data structure. This is because we want to prevent
415 * cs4270_dai_mute() neglecting the user's decision to manually
416 * mute the codec's output.
417 *
418 * Returns 0 for success.
419 */
420static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
421 struct snd_ctl_elem_value *ucontrol)
422{
423 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 424 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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425 int left = !ucontrol->value.integer.value[0];
426 int right = !ucontrol->value.integer.value[1];
427
428 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
429 (right ? CS4270_MUTE_DAC_B : 0);
430
431 return snd_soc_put_volsw(kcontrol, ucontrol);
432}
433
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434/* A list of non-DAPM controls that the CS4270 supports */
435static const struct snd_kcontrol_new cs4270_snd_controls[] = {
436 SOC_DOUBLE_R("Master Playback Volume",
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437 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
438 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
439 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
440 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
7e1aa1dc 441 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
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442 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
443 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
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444 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
445 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
446 snd_soc_get_volsw, cs4270_soc_put_mute),
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447};
448
85e7652d 449static const struct snd_soc_dai_ops cs4270_dai_ops = {
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450 .hw_params = cs4270_hw_params,
451 .set_sysclk = cs4270_set_dai_sysclk,
452 .set_fmt = cs4270_set_dai_fmt,
1a4ba05e 453 .digital_mute = cs4270_dai_mute,
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454};
455
5c75848a 456static struct snd_soc_dai_driver cs4270_dai = {
f0fba2ad 457 .name = "cs4270-hifi",
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458 .playback = {
459 .stream_name = "Playback",
460 .channels_min = 1,
461 .channels_max = 2,
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462 .rates = SNDRV_PCM_RATE_CONTINUOUS,
463 .rate_min = 4000,
464 .rate_max = 216000,
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465 .formats = CS4270_FORMATS,
466 },
467 .capture = {
468 .stream_name = "Capture",
469 .channels_min = 1,
470 .channels_max = 2,
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471 .rates = SNDRV_PCM_RATE_CONTINUOUS,
472 .rate_min = 4000,
473 .rate_max = 216000,
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474 .formats = CS4270_FORMATS,
475 },
6335d055 476 .ops = &cs4270_dai_ops,
0db4d070 477};
0db4d070 478
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479/**
480 * cs4270_probe - ASoC probe function
481 * @pdev: platform device
482 *
483 * This function is called when ASoC has all the pieces it needs to
484 * instantiate a sound driver.
04eb093c 485 */
f0fba2ad 486static int cs4270_probe(struct snd_soc_codec *codec)
04eb093c 487{
b2c812e2 488 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
11b8fca5 489 int i, ret;
04eb093c 490
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491 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
492 * then do the I2C transactions itself.
493 */
494 ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
b0c813ce 495 if (ret < 0) {
11b8fca5 496 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
f0fba2ad 497 return ret;
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498 }
499
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500 /* Disable auto-mute. This feature appears to be buggy. In some
501 * situations, auto-mute will not deactivate when it should, so we want
502 * this feature disabled by default. An application (e.g. alsactl) can
503 * re-enabled it by using the controls.
504 */
11b8fca5 505 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
d5e9ba1d 506 if (ret < 0) {
f0fba2ad 507 dev_err(codec->dev, "i2c write failed\n");
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508 return ret;
509 }
510
511 /* Disable automatic volume control. The hardware enables, and it
512 * causes volume change commands to be delayed, sometimes until after
513 * playback has started. An application (e.g. alsactl) can
514 * re-enabled it by using the controls.
515 */
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516 ret = snd_soc_update_bits(codec, CS4270_TRANS,
517 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
d5e9ba1d 518 if (ret < 0) {
f0fba2ad 519 dev_err(codec->dev, "i2c write failed\n");
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TT
520 return ret;
521 }
522
f0fba2ad 523 /* Add the non-DAPM controls */
022658be 524 ret = snd_soc_add_codec_controls(codec, cs4270_snd_controls,
f0fba2ad 525 ARRAY_SIZE(cs4270_snd_controls));
0db4d070 526 if (ret < 0) {
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527 dev_err(codec->dev, "failed to add controls\n");
528 return ret;
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529 }
530
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531 /* get the power supply regulators */
532 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
533 cs4270->supplies[i].supply = supply_names[i];
534
535 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
536 cs4270->supplies);
537 if (ret < 0)
538 return ret;
539
540 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
541 cs4270->supplies);
542 if (ret < 0)
543 goto error_free_regulators;
ec2cd95f 544
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545 return 0;
546
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547error_free_regulators:
548 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
549 cs4270->supplies);
b0c813ce 550
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TT
551 return ret;
552}
553
ff7bf02f 554/**
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555 * cs4270_remove - ASoC remove function
556 * @pdev: platform device
ff7bf02f 557 *
f0fba2ad 558 * This function is the counterpart to cs4270_probe().
ff7bf02f 559 */
f0fba2ad 560static int cs4270_remove(struct snd_soc_codec *codec)
0db4d070 561{
f0fba2ad 562 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
0db4d070 563
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564 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
565 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
0db4d070
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566
567 return 0;
ff637d38 568};
ff637d38 569
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570#ifdef CONFIG_PM
571
572/* This suspend/resume implementation can handle both - a simple standby
573 * where the codec remains powered, and a full suspend, where the voltage
574 * domain the codec is connected to is teared down and/or any other hardware
575 * reset condition is asserted.
576 *
577 * The codec's own power saving features are enabled in the suspend callback,
578 * and all registers are written back to the hardware when resuming.
579 */
580
84b315ee 581static int cs4270_soc_suspend(struct snd_soc_codec *codec)
15b5bdae 582{
b2c812e2 583 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
ffbfd336 584 int reg, ret;
15b5bdae 585
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DM
586 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
587 if (reg < 0)
588 return reg;
589
590 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
591 if (ret < 0)
592 return ret;
593
594 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
595 cs4270->supplies);
596
597 return 0;
15b5bdae
DM
598}
599
f0fba2ad 600static int cs4270_soc_resume(struct snd_soc_codec *codec)
15b5bdae 601{
b2c812e2 602 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
5e7c0344
DM
603 int reg;
604
ffbfd336
DM
605 regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
606 cs4270->supplies);
607
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608 /* In case the device was put to hard reset during sleep, we need to
609 * wait 500ns here before any I2C communication. */
610 ndelay(500);
611
612 /* first restore the entire register cache ... */
d66b8537 613 snd_soc_cache_sync(codec);
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DM
614
615 /* ... then disable the power-down bits */
616 reg = snd_soc_read(codec, CS4270_PWRCTL);
617 reg &= ~CS4270_PWRCTL_PDN_ALL;
618
619 return snd_soc_write(codec, CS4270_PWRCTL, reg);
620}
621#else
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622#define cs4270_soc_suspend NULL
623#define cs4270_soc_resume NULL
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624#endif /* CONFIG_PM */
625
f0fba2ad 626/*
b6f7d7c8 627 * ASoC codec driver structure
f0fba2ad 628 */
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TT
629static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
630 .probe = cs4270_probe,
631 .remove = cs4270_remove,
632 .suspend = cs4270_soc_suspend,
633 .resume = cs4270_soc_resume,
634 .volatile_register = cs4270_reg_is_volatile,
635 .readable_register = cs4270_reg_is_readable,
636 .reg_cache_size = CS4270_LASTREG + 1,
637 .reg_word_size = sizeof(u8),
638 .reg_cache_default = cs4270_default_reg_cache,
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LG
639};
640
641/**
642 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
643 * @i2c_client: the I2C client object
644 * @id: the I2C device ID (ignored)
645 *
646 * This function is called whenever the I2C subsystem finds a device that
647 * matches the device ID given via a prior call to i2c_add_driver().
648 */
649static int cs4270_i2c_probe(struct i2c_client *i2c_client,
650 const struct i2c_device_id *id)
651{
652 struct cs4270_private *cs4270;
653 int ret;
654
655 /* Verify that we have a CS4270 */
656
657 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
658 if (ret < 0) {
659 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
660 i2c_client->addr);
661 return ret;
662 }
663 /* The top four bits of the chip ID should be 1100. */
664 if ((ret & 0xF0) != 0xC0) {
665 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
666 i2c_client->addr);
667 return -ENODEV;
668 }
669
670 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
671 i2c_client->addr);
672 dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
673
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674 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
675 GFP_KERNEL);
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676 if (!cs4270) {
677 dev_err(&i2c_client->dev, "could not allocate codec\n");
678 return -ENOMEM;
679 }
680
681 i2c_set_clientdata(i2c_client, cs4270);
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682 cs4270->control_type = SND_SOC_I2C;
683
684 ret = snd_soc_register_codec(&i2c_client->dev,
685 &soc_codec_device_cs4270, &cs4270_dai, 1);
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686 return ret;
687}
688
689/**
690 * cs4270_i2c_remove - remove an I2C device
691 * @i2c_client: the I2C client object
692 *
693 * This function is the counterpart to cs4270_i2c_probe().
694 */
695static int cs4270_i2c_remove(struct i2c_client *i2c_client)
696{
697 snd_soc_unregister_codec(&i2c_client->dev);
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698 return 0;
699}
700
701/*
702 * cs4270_id - I2C device IDs supported by this driver
703 */
79a54ea1 704static const struct i2c_device_id cs4270_id[] = {
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705 {"cs4270", 0},
706 {}
707};
708MODULE_DEVICE_TABLE(i2c, cs4270_id);
709
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710/*
711 * cs4270_i2c_driver - I2C device identification
712 *
713 * This structure tells the I2C subsystem how to identify and support a
714 * given I2C device type.
715 */
ff637d38
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716static struct i2c_driver cs4270_i2c_driver = {
717 .driver = {
f0fba2ad 718 .name = "cs4270-codec",
ff637d38
TT
719 .owner = THIS_MODULE,
720 },
721 .id_table = cs4270_id,
722 .probe = cs4270_i2c_probe,
0db4d070 723 .remove = cs4270_i2c_remove,
ff637d38 724};
b0c813ce 725
c9b3a40f 726static int __init cs4270_init(void)
64089b84 727{
04eb093c 728 return i2c_add_driver(&cs4270_i2c_driver);
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MB
729}
730module_init(cs4270_init);
731
732static void __exit cs4270_exit(void)
733{
04eb093c 734 i2c_del_driver(&cs4270_i2c_driver);
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735}
736module_exit(cs4270_exit);
737
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738MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
739MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
740MODULE_LICENSE("GPL");
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