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b0c813ce TT |
1 | /* |
2 | * CS4270 ALSA SoC (ASoC) codec driver | |
3 | * | |
4 | * Author: Timur Tabi <timur@freescale.com> | |
5 | * | |
6 | * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under | |
7 | * the terms of the GNU General Public License version 2. This program | |
8 | * is licensed "as is" without any warranty of any kind, whether express | |
9 | * or implied. | |
10 | * | |
11 | * This is an ASoC device driver for the Cirrus Logic CS4270 codec. | |
12 | * | |
13 | * Current features/limitations: | |
14 | * | |
ff637d38 | 15 | * 1) Software mode is supported. Stand-alone mode is not supported. |
b0c813ce TT |
16 | * 2) Only I2C is supported, not SPI |
17 | * 3) Only Master mode is supported, not Slave. | |
18 | * 4) The machine driver's 'startup' function must call | |
19 | * cs4270_set_dai_sysclk() with the value of MCLK. | |
20 | * 5) Only I2S and left-justified modes are supported | |
21 | * 6) Power management is not supported | |
22 | * 7) The only supported control is volume and hardware mute (if enabled) | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/platform_device.h> | |
b0c813ce TT |
27 | #include <sound/core.h> |
28 | #include <sound/soc.h> | |
29 | #include <sound/initval.h> | |
30 | #include <linux/i2c.h> | |
31 | ||
01e097d6 MB |
32 | #include "cs4270.h" |
33 | ||
8432395f TT |
34 | /* |
35 | * The codec isn't really big-endian or little-endian, since the I2S | |
36 | * interface requires data to be sent serially with the MSbit first. | |
37 | * However, to support BE and LE I2S devices, we specify both here. That | |
38 | * way, ALSA will always match the bit patterns. | |
39 | */ | |
40 | #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ | |
41 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ | |
42 | SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \ | |
43 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \ | |
44 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \ | |
45 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) | |
46 | ||
8432395f TT |
47 | /* CS4270 registers addresses */ |
48 | #define CS4270_CHIPID 0x01 /* Chip ID */ | |
49 | #define CS4270_PWRCTL 0x02 /* Power Control */ | |
50 | #define CS4270_MODE 0x03 /* Mode Control */ | |
51 | #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ | |
52 | #define CS4270_TRANS 0x05 /* Transition Control */ | |
53 | #define CS4270_MUTE 0x06 /* Mute Control */ | |
54 | #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ | |
55 | #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ | |
56 | ||
57 | #define CS4270_FIRSTREG 0x01 | |
58 | #define CS4270_LASTREG 0x08 | |
59 | #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) | |
9dbd627b | 60 | |
8432395f TT |
61 | /* Bit masks for the CS4270 registers */ |
62 | #define CS4270_CHIPID_ID 0xF0 | |
63 | #define CS4270_CHIPID_REV 0x0F | |
64 | #define CS4270_PWRCTL_FREEZE 0x80 | |
65 | #define CS4270_PWRCTL_PDN_ADC 0x20 | |
66 | #define CS4270_PWRCTL_PDN_DAC 0x02 | |
67 | #define CS4270_PWRCTL_PDN 0x01 | |
68 | #define CS4270_MODE_SPEED_MASK 0x30 | |
69 | #define CS4270_MODE_1X 0x00 | |
70 | #define CS4270_MODE_2X 0x10 | |
71 | #define CS4270_MODE_4X 0x20 | |
72 | #define CS4270_MODE_SLAVE 0x30 | |
73 | #define CS4270_MODE_DIV_MASK 0x0E | |
74 | #define CS4270_MODE_DIV1 0x00 | |
75 | #define CS4270_MODE_DIV15 0x02 | |
76 | #define CS4270_MODE_DIV2 0x04 | |
77 | #define CS4270_MODE_DIV3 0x06 | |
78 | #define CS4270_MODE_DIV4 0x08 | |
79 | #define CS4270_MODE_POPGUARD 0x01 | |
80 | #define CS4270_FORMAT_FREEZE_A 0x80 | |
81 | #define CS4270_FORMAT_FREEZE_B 0x40 | |
82 | #define CS4270_FORMAT_LOOPBACK 0x20 | |
83 | #define CS4270_FORMAT_DAC_MASK 0x18 | |
84 | #define CS4270_FORMAT_DAC_LJ 0x00 | |
85 | #define CS4270_FORMAT_DAC_I2S 0x08 | |
86 | #define CS4270_FORMAT_DAC_RJ16 0x18 | |
87 | #define CS4270_FORMAT_DAC_RJ24 0x10 | |
88 | #define CS4270_FORMAT_ADC_MASK 0x01 | |
89 | #define CS4270_FORMAT_ADC_LJ 0x00 | |
90 | #define CS4270_FORMAT_ADC_I2S 0x01 | |
91 | #define CS4270_TRANS_ONE_VOL 0x80 | |
92 | #define CS4270_TRANS_SOFT 0x40 | |
93 | #define CS4270_TRANS_ZERO 0x20 | |
94 | #define CS4270_TRANS_INV_ADC_A 0x08 | |
95 | #define CS4270_TRANS_INV_ADC_B 0x10 | |
96 | #define CS4270_TRANS_INV_DAC_A 0x02 | |
97 | #define CS4270_TRANS_INV_DAC_B 0x04 | |
98 | #define CS4270_TRANS_DEEMPH 0x01 | |
99 | #define CS4270_MUTE_AUTO 0x20 | |
100 | #define CS4270_MUTE_ADC_A 0x08 | |
101 | #define CS4270_MUTE_ADC_B 0x10 | |
102 | #define CS4270_MUTE_POLARITY 0x04 | |
103 | #define CS4270_MUTE_DAC_A 0x01 | |
104 | #define CS4270_MUTE_DAC_B 0x02 | |
105 | ||
0db4d070 TT |
106 | /* Private data for the CS4270 */ |
107 | struct cs4270_private { | |
108 | struct snd_soc_codec codec; | |
109 | u8 reg_cache[CS4270_NUMREGS]; | |
110 | unsigned int mclk; /* Input frequency of the MCLK pin */ | |
111 | unsigned int mode; /* The mode (I2S or left-justified) */ | |
112 | }; | |
113 | ||
8432395f TT |
114 | /* |
115 | * Clock Ratio Selection for Master Mode with I2C enabled | |
116 | * | |
117 | * The data for this chart is taken from Table 5 of the CS4270 reference | |
118 | * manual. | |
119 | * | |
120 | * This table is used to determine how to program the Mode Control register. | |
121 | * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling | |
122 | * rates the CS4270 currently supports. | |
123 | * | |
124 | * Each element in this array corresponds to the ratios in mclk_ratios[]. | |
125 | * These two arrays need to be in sync. | |
126 | * | |
127 | * 'speed_mode' is the corresponding bit pattern to be written to the | |
128 | * MODE bits of the Mode Control Register | |
129 | * | |
130 | * 'mclk' is the corresponding bit pattern to be wirten to the MCLK bits of | |
131 | * the Mode Control Register. | |
132 | * | |
133 | * In situations where a single ratio is represented by multiple speed | |
134 | * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick | |
135 | * double-speed instead of quad-speed. However, the CS4270 errata states | |
136 | * that Divide-By-1.5 can cause failures, so we avoid that mode where | |
137 | * possible. | |
138 | * | |
139 | * ERRATA: There is an errata for the CS4270 where divide-by-1.5 does not | |
140 | * work if VD = 3.3V. If this effects you, select the | |
141 | * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will | |
142 | * never select any sample rates that require divide-by-1.5. | |
143 | */ | |
144 | static struct { | |
145 | unsigned int ratio; | |
146 | u8 speed_mode; | |
147 | u8 mclk; | |
148 | } cs4270_mode_ratios[] = { | |
149 | {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, | |
150 | #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA | |
151 | {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, | |
152 | #endif | |
153 | {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, | |
154 | {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, | |
155 | {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, | |
156 | {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, | |
157 | {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, | |
158 | {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, | |
159 | {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} | |
160 | }; | |
161 | ||
162 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ | |
163 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) | |
9dbd627b | 164 | |
9dbd627b TT |
165 | /* |
166 | * Determine the CS4270 samples rates. | |
167 | * | |
168 | * 'freq' is the input frequency to MCLK. The other parameters are ignored. | |
169 | * | |
170 | * The value of MCLK is used to determine which sample rates are supported | |
171 | * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine | |
172 | * support values: 64, 96, 128, 192, 256, 384, 512, 768, and 1024. | |
173 | * | |
174 | * This function calculates the nine ratios and determines which ones match | |
175 | * a standard sample rate. If there's a match, then it is added to the list | |
176 | * of support sample rates. | |
177 | * | |
178 | * This function must be called by the machine driver's 'startup' function, | |
179 | * otherwise the list of supported sample rates will not be available in | |
180 | * time for ALSA. | |
181 | * | |
182 | * Note that in stand-alone mode, the sample rate is determined by input | |
183 | * pins M0, M1, MDIV1, and MDIV2. Also in stand-alone mode, divide-by-3 | |
184 | * is not a programmable option. However, divide-by-3 is not an available | |
185 | * option in stand-alone mode. This cases two problems: a ratio of 768 is | |
186 | * not available (it requires divide-by-3) and B) ratios 192 and 384 can | |
187 | * only be selected with divide-by-1.5, but there is an errate that make | |
188 | * this selection difficult. | |
189 | * | |
190 | * In addition, there is no mechanism for communicating with the machine | |
191 | * driver what the input settings can be. This would need to be implemented | |
192 | * for stand-alone mode to work. | |
193 | */ | |
e550e17f | 194 | static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
195 | int clk_id, unsigned int freq, int dir) |
196 | { | |
197 | struct snd_soc_codec *codec = codec_dai->codec; | |
198 | struct cs4270_private *cs4270 = codec->private_data; | |
199 | unsigned int rates = 0; | |
200 | unsigned int rate_min = -1; | |
201 | unsigned int rate_max = 0; | |
202 | unsigned int i; | |
203 | ||
204 | cs4270->mclk = freq; | |
205 | ||
206 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { | |
8432395f | 207 | unsigned int rate = freq / cs4270_mode_ratios[i].ratio; |
918f3a0e CL |
208 | rates |= snd_pcm_rate_to_rate_bit(rate); |
209 | if (rate < rate_min) | |
210 | rate_min = rate; | |
211 | if (rate > rate_max) | |
212 | rate_max = rate; | |
9dbd627b | 213 | } |
918f3a0e CL |
214 | /* FIXME: soc should support a rate list */ |
215 | rates &= ~SNDRV_PCM_RATE_KNOT; | |
9dbd627b TT |
216 | |
217 | if (!rates) { | |
218 | printk(KERN_ERR "cs4270: could not find a valid sample rate\n"); | |
219 | return -EINVAL; | |
220 | } | |
221 | ||
222 | codec_dai->playback.rates = rates; | |
223 | codec_dai->playback.rate_min = rate_min; | |
224 | codec_dai->playback.rate_max = rate_max; | |
225 | ||
226 | codec_dai->capture.rates = rates; | |
227 | codec_dai->capture.rate_min = rate_min; | |
228 | codec_dai->capture.rate_max = rate_max; | |
229 | ||
230 | return 0; | |
231 | } | |
232 | ||
233 | /* | |
234 | * Configure the codec for the selected audio format | |
235 | * | |
236 | * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the | |
237 | * codec accordingly. | |
238 | * | |
239 | * Currently, this function only supports SND_SOC_DAIFMT_I2S and | |
240 | * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified | |
241 | * data for playback only, but ASoC currently does not support different | |
242 | * formats for playback vs. record. | |
243 | */ | |
e550e17f | 244 | static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
245 | unsigned int format) |
246 | { | |
247 | struct snd_soc_codec *codec = codec_dai->codec; | |
248 | struct cs4270_private *cs4270 = codec->private_data; | |
249 | int ret = 0; | |
250 | ||
251 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { | |
252 | case SND_SOC_DAIFMT_I2S: | |
253 | case SND_SOC_DAIFMT_LEFT_J: | |
254 | cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; | |
255 | break; | |
256 | default: | |
257 | printk(KERN_ERR "cs4270: invalid DAI format\n"); | |
258 | ret = -EINVAL; | |
259 | } | |
260 | ||
261 | return ret; | |
262 | } | |
263 | ||
b0c813ce TT |
264 | /* |
265 | * Pre-fill the CS4270 register cache. | |
266 | * | |
267 | * We use the auto-increment feature of the CS4270 to read all registers in | |
268 | * one shot. | |
269 | */ | |
270 | static int cs4270_fill_cache(struct snd_soc_codec *codec) | |
271 | { | |
272 | u8 *cache = codec->reg_cache; | |
273 | struct i2c_client *i2c_client = codec->control_data; | |
274 | s32 length; | |
275 | ||
276 | length = i2c_smbus_read_i2c_block_data(i2c_client, | |
277 | CS4270_FIRSTREG | 0x80, CS4270_NUMREGS, cache); | |
278 | ||
279 | if (length != CS4270_NUMREGS) { | |
9dbd627b | 280 | printk(KERN_ERR "cs4270: I2C read failure, addr=0x%x\n", |
b0c813ce TT |
281 | i2c_client->addr); |
282 | return -EIO; | |
283 | } | |
284 | ||
285 | return 0; | |
286 | } | |
287 | ||
288 | /* | |
289 | * Read from the CS4270 register cache. | |
290 | * | |
291 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | |
292 | * After the initial read to pre-fill the cache, the CS4270 never updates | |
293 | * the register values, so we won't have a cache coherncy problem. | |
294 | */ | |
295 | static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec, | |
296 | unsigned int reg) | |
297 | { | |
298 | u8 *cache = codec->reg_cache; | |
299 | ||
300 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | |
301 | return -EIO; | |
302 | ||
303 | return cache[reg - CS4270_FIRSTREG]; | |
304 | } | |
305 | ||
306 | /* | |
307 | * Write to a CS4270 register via the I2C bus. | |
308 | * | |
309 | * This function writes the given value to the given CS4270 register, and | |
310 | * also updates the register cache. | |
311 | * | |
312 | * Note that we don't use the hw_write function pointer of snd_soc_codec. | |
313 | * That's because it's too clunky: the hw_write_t prototype does not match | |
314 | * i2c_smbus_write_byte_data(), and it's just another layer of overhead. | |
315 | */ | |
316 | static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg, | |
317 | unsigned int value) | |
318 | { | |
bfc4e861 TT |
319 | u8 *cache = codec->reg_cache; |
320 | ||
b0c813ce TT |
321 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) |
322 | return -EIO; | |
323 | ||
bfc4e861 TT |
324 | /* Only perform an I2C operation if the new value is different */ |
325 | if (cache[reg - CS4270_FIRSTREG] != value) { | |
326 | struct i2c_client *client = codec->control_data; | |
327 | if (i2c_smbus_write_byte_data(client, reg, value)) { | |
328 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
329 | return -EIO; | |
330 | } | |
331 | ||
b0c813ce | 332 | /* We've written to the hardware, so update the cache */ |
b0c813ce | 333 | cache[reg - CS4270_FIRSTREG] = value; |
b0c813ce | 334 | } |
bfc4e861 TT |
335 | |
336 | return 0; | |
b0c813ce TT |
337 | } |
338 | ||
b0c813ce TT |
339 | /* |
340 | * Program the CS4270 with the given hardware parameters. | |
341 | * | |
dee89c4d | 342 | * The .ops functions are used to provide board-specific data, like |
b0c813ce TT |
343 | * input frequencies, to this driver. This function takes that information, |
344 | * combines it with the hardware parameters provided, and programs the | |
345 | * hardware accordingly. | |
346 | */ | |
347 | static int cs4270_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
348 | struct snd_pcm_hw_params *params, |
349 | struct snd_soc_dai *dai) | |
b0c813ce TT |
350 | { |
351 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
352 | struct snd_soc_device *socdev = rtd->socdev; | |
6627a653 | 353 | struct snd_soc_codec *codec = socdev->card->codec; |
b0c813ce | 354 | struct cs4270_private *cs4270 = codec->private_data; |
e34ba212 | 355 | int ret; |
b0c813ce TT |
356 | unsigned int i; |
357 | unsigned int rate; | |
358 | unsigned int ratio; | |
359 | int reg; | |
360 | ||
361 | /* Figure out which MCLK/LRCK ratio to use */ | |
362 | ||
363 | rate = params_rate(params); /* Sampling rate, in Hz */ | |
364 | ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ | |
365 | ||
9dbd627b | 366 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { |
8432395f | 367 | if (cs4270_mode_ratios[i].ratio == ratio) |
b0c813ce TT |
368 | break; |
369 | } | |
370 | ||
9dbd627b | 371 | if (i == NUM_MCLK_RATIOS) { |
b0c813ce TT |
372 | /* We did not find a matching ratio */ |
373 | printk(KERN_ERR "cs4270: could not find matching ratio\n"); | |
374 | return -EINVAL; | |
375 | } | |
376 | ||
377 | /* Freeze and power-down the codec */ | |
378 | ||
379 | ret = snd_soc_write(codec, CS4270_PWRCTL, CS4270_PWRCTL_FREEZE | | |
380 | CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | | |
381 | CS4270_PWRCTL_PDN); | |
382 | if (ret < 0) { | |
383 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
384 | return ret; | |
385 | } | |
386 | ||
387 | /* Program the mode control register */ | |
388 | ||
389 | reg = snd_soc_read(codec, CS4270_MODE); | |
390 | reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); | |
391 | reg |= cs4270_mode_ratios[i].speed_mode | cs4270_mode_ratios[i].mclk; | |
392 | ||
393 | ret = snd_soc_write(codec, CS4270_MODE, reg); | |
394 | if (ret < 0) { | |
395 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
396 | return ret; | |
397 | } | |
398 | ||
399 | /* Program the format register */ | |
400 | ||
401 | reg = snd_soc_read(codec, CS4270_FORMAT); | |
402 | reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); | |
403 | ||
404 | switch (cs4270->mode) { | |
405 | case SND_SOC_DAIFMT_I2S: | |
406 | reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; | |
407 | break; | |
408 | case SND_SOC_DAIFMT_LEFT_J: | |
409 | reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; | |
410 | break; | |
411 | default: | |
412 | printk(KERN_ERR "cs4270: unknown format\n"); | |
413 | return -EINVAL; | |
414 | } | |
415 | ||
416 | ret = snd_soc_write(codec, CS4270_FORMAT, reg); | |
417 | if (ret < 0) { | |
418 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
419 | return ret; | |
420 | } | |
421 | ||
422 | /* Disable auto-mute. This feature appears to be buggy, because in | |
423 | some situations, auto-mute will not deactivate when it should. */ | |
424 | ||
425 | reg = snd_soc_read(codec, CS4270_MUTE); | |
426 | reg &= ~CS4270_MUTE_AUTO; | |
427 | ret = snd_soc_write(codec, CS4270_MUTE, reg); | |
428 | if (ret < 0) { | |
429 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
430 | return ret; | |
431 | } | |
432 | ||
0c235d1e TT |
433 | /* Disable automatic volume control. It's enabled by default, and |
434 | * it causes volume change commands to be delayed, sometimes until | |
435 | * after playback has started. | |
436 | */ | |
437 | ||
438 | reg = cs4270_read_reg_cache(codec, CS4270_TRANS); | |
439 | reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO); | |
440 | ret = cs4270_i2c_write(codec, CS4270_TRANS, reg); | |
441 | if (ret < 0) { | |
442 | printk(KERN_ERR "I2C write failed\n"); | |
443 | return ret; | |
444 | } | |
445 | ||
b0c813ce TT |
446 | /* Thaw and power-up the codec */ |
447 | ||
448 | ret = snd_soc_write(codec, CS4270_PWRCTL, 0); | |
449 | if (ret < 0) { | |
450 | printk(KERN_ERR "cs4270: I2C write failed\n"); | |
451 | return ret; | |
452 | } | |
453 | ||
454 | return ret; | |
455 | } | |
456 | ||
457 | #ifdef CONFIG_SND_SOC_CS4270_HWMUTE | |
b0c813ce TT |
458 | /* |
459 | * Set the CS4270 external mute | |
460 | * | |
461 | * This function toggles the mute bits in the MUTE register. The CS4270's | |
462 | * mute capability is intended for external muting circuitry, so if the | |
463 | * board does not have the MUTEA or MUTEB pins connected to such circuitry, | |
464 | * then this function will do nothing. | |
465 | */ | |
e550e17f | 466 | static int cs4270_mute(struct snd_soc_dai *dai, int mute) |
b0c813ce TT |
467 | { |
468 | struct snd_soc_codec *codec = dai->codec; | |
469 | int reg6; | |
470 | ||
471 | reg6 = snd_soc_read(codec, CS4270_MUTE); | |
472 | ||
473 | if (mute) | |
474 | reg6 |= CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B | | |
475 | CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; | |
476 | else | |
477 | reg6 &= ~(CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B | | |
478 | CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); | |
479 | ||
480 | return snd_soc_write(codec, CS4270_MUTE, reg6); | |
481 | } | |
ff637d38 TT |
482 | #else |
483 | #define cs4270_mute NULL | |
b0c813ce TT |
484 | #endif |
485 | ||
b0c813ce TT |
486 | /* A list of non-DAPM controls that the CS4270 supports */ |
487 | static const struct snd_kcontrol_new cs4270_snd_controls[] = { | |
488 | SOC_DOUBLE_R("Master Playback Volume", | |
bfc4e861 | 489 | CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1) |
b0c813ce TT |
490 | }; |
491 | ||
b0c813ce TT |
492 | /* |
493 | * Global variable to store socdev for i2c probe function. | |
494 | * | |
495 | * If struct i2c_driver had a private_data field, we wouldn't need to use | |
496 | * cs4270_socdec. This is the only way to pass the socdev structure to | |
497 | * cs4270_i2c_probe(). | |
498 | * | |
499 | * The real solution to cs4270_socdev is to create a mechanism | |
500 | * that maps I2C addresses to snd_soc_device structures. Perhaps the | |
501 | * creation of the snd_soc_device object should be moved out of | |
502 | * cs4270_probe() and into cs4270_i2c_probe(), but that would make this | |
503 | * driver dependent on I2C. The CS4270 supports "stand-alone" mode, whereby | |
504 | * the chip is *not* connected to the I2C bus, but is instead configured via | |
505 | * input pins. | |
506 | */ | |
507 | static struct snd_soc_device *cs4270_socdev; | |
508 | ||
0db4d070 TT |
509 | struct snd_soc_dai cs4270_dai = { |
510 | .name = "cs4270", | |
511 | .playback = { | |
512 | .stream_name = "Playback", | |
513 | .channels_min = 1, | |
514 | .channels_max = 2, | |
515 | .rates = 0, | |
516 | .formats = CS4270_FORMATS, | |
517 | }, | |
518 | .capture = { | |
519 | .stream_name = "Capture", | |
520 | .channels_min = 1, | |
521 | .channels_max = 2, | |
522 | .rates = 0, | |
523 | .formats = CS4270_FORMATS, | |
524 | }, | |
525 | .ops = { | |
526 | .hw_params = cs4270_hw_params, | |
527 | .set_sysclk = cs4270_set_dai_sysclk, | |
528 | .set_fmt = cs4270_set_dai_fmt, | |
529 | .digital_mute = cs4270_mute, | |
530 | }, | |
531 | }; | |
532 | EXPORT_SYMBOL_GPL(cs4270_dai); | |
533 | ||
b0c813ce TT |
534 | /* |
535 | * Initialize the I2C interface of the CS4270 | |
536 | * | |
537 | * This function is called for whenever the I2C subsystem finds a device | |
538 | * at a particular address. | |
539 | * | |
540 | * Note: snd_soc_new_pcms() must be called before this function can be called, | |
541 | * because of snd_ctl_add(). | |
542 | */ | |
ec2cd95f TT |
543 | static int cs4270_i2c_probe(struct i2c_client *i2c_client, |
544 | const struct i2c_device_id *id) | |
b0c813ce TT |
545 | { |
546 | struct snd_soc_device *socdev = cs4270_socdev; | |
0db4d070 TT |
547 | struct snd_soc_codec *codec; |
548 | struct cs4270_private *cs4270; | |
b0c813ce TT |
549 | int i; |
550 | int ret = 0; | |
551 | ||
b0c813ce TT |
552 | /* Verify that we have a CS4270 */ |
553 | ||
554 | ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID); | |
555 | if (ret < 0) { | |
556 | printk(KERN_ERR "cs4270: failed to read I2C\n"); | |
0db4d070 | 557 | return ret; |
b0c813ce TT |
558 | } |
559 | /* The top four bits of the chip ID should be 1100. */ | |
560 | if ((ret & 0xF0) != 0xC0) { | |
0db4d070 TT |
561 | printk(KERN_ERR "cs4270: device at addr %X is not a CS4270\n", |
562 | i2c_client->addr); | |
563 | return -ENODEV; | |
b0c813ce TT |
564 | } |
565 | ||
ec2cd95f TT |
566 | printk(KERN_INFO "cs4270: found device at I2C address %X\n", |
567 | i2c_client->addr); | |
b0c813ce TT |
568 | printk(KERN_INFO "cs4270: hardware revision %X\n", ret & 0xF); |
569 | ||
0db4d070 TT |
570 | /* Allocate enough space for the snd_soc_codec structure |
571 | and our private data together. */ | |
572 | cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL); | |
573 | if (!cs4270) { | |
574 | printk(KERN_ERR "cs4270: Could not allocate codec structure\n"); | |
575 | return -ENOMEM; | |
576 | } | |
577 | codec = &cs4270->codec; | |
6627a653 | 578 | socdev->card->codec = codec; |
0db4d070 TT |
579 | |
580 | mutex_init(&codec->mutex); | |
581 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
582 | INIT_LIST_HEAD(&codec->dapm_paths); | |
583 | ||
584 | codec->name = "CS4270"; | |
585 | codec->owner = THIS_MODULE; | |
586 | codec->dai = &cs4270_dai; | |
587 | codec->num_dai = 1; | |
588 | codec->private_data = cs4270; | |
b0c813ce TT |
589 | codec->control_data = i2c_client; |
590 | codec->read = cs4270_read_reg_cache; | |
591 | codec->write = cs4270_i2c_write; | |
0db4d070 | 592 | codec->reg_cache = cs4270->reg_cache; |
b0c813ce TT |
593 | codec->reg_cache_size = CS4270_NUMREGS; |
594 | ||
595 | /* The I2C interface is set up, so pre-fill our register cache */ | |
596 | ||
597 | ret = cs4270_fill_cache(codec); | |
598 | if (ret < 0) { | |
599 | printk(KERN_ERR "cs4270: failed to fill register cache\n"); | |
0db4d070 TT |
600 | goto error_free_codec; |
601 | } | |
602 | ||
603 | /* Register PCMs */ | |
604 | ||
605 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
606 | if (ret < 0) { | |
607 | printk(KERN_ERR "cs4270: failed to create PCMs\n"); | |
608 | goto error_free_codec; | |
b0c813ce TT |
609 | } |
610 | ||
611 | /* Add the non-DAPM controls */ | |
612 | ||
613 | for (i = 0; i < ARRAY_SIZE(cs4270_snd_controls); i++) { | |
0db4d070 TT |
614 | struct snd_kcontrol *kctrl; |
615 | ||
616 | kctrl = snd_soc_cnew(&cs4270_snd_controls[i], codec, NULL); | |
617 | if (!kctrl) { | |
618 | printk(KERN_ERR "cs4270: error creating control '%s'\n", | |
619 | cs4270_snd_controls[i].name); | |
620 | ret = -ENOMEM; | |
621 | goto error_free_pcms; | |
622 | } | |
b0c813ce TT |
623 | |
624 | ret = snd_ctl_add(codec->card, kctrl); | |
0db4d070 TT |
625 | if (ret < 0) { |
626 | printk(KERN_ERR "cs4270: error adding control '%s'\n", | |
627 | cs4270_snd_controls[i].name); | |
628 | goto error_free_pcms; | |
629 | } | |
b0c813ce TT |
630 | } |
631 | ||
0db4d070 TT |
632 | /* Initialize the SOC device */ |
633 | ||
634 | ret = snd_soc_init_card(socdev); | |
635 | if (ret < 0) { | |
636 | printk(KERN_ERR "cs4270: failed to register card\n"); | |
637 | goto error_free_pcms;; | |
638 | } | |
639 | ||
640 | i2c_set_clientdata(i2c_client, socdev); | |
ec2cd95f | 641 | |
b0c813ce TT |
642 | return 0; |
643 | ||
0db4d070 TT |
644 | error_free_pcms: |
645 | snd_soc_free_pcms(socdev); | |
b0c813ce | 646 | |
0db4d070 TT |
647 | error_free_codec: |
648 | kfree(cs4270); | |
b0c813ce | 649 | |
b0c813ce TT |
650 | return ret; |
651 | } | |
652 | ||
0db4d070 TT |
653 | static int cs4270_i2c_remove(struct i2c_client *i2c_client) |
654 | { | |
655 | struct snd_soc_device *socdev = i2c_get_clientdata(i2c_client); | |
6627a653 | 656 | struct snd_soc_codec *codec = socdev->card->codec; |
0db4d070 TT |
657 | struct cs4270_private *cs4270 = codec->private_data; |
658 | ||
659 | snd_soc_free_pcms(socdev); | |
660 | kfree(cs4270); | |
661 | ||
662 | return 0; | |
663 | } | |
664 | ||
665 | static struct i2c_device_id cs4270_id[] = { | |
ff637d38 TT |
666 | {"cs4270", 0}, |
667 | {} | |
668 | }; | |
669 | MODULE_DEVICE_TABLE(i2c, cs4270_id); | |
670 | ||
671 | static struct i2c_driver cs4270_i2c_driver = { | |
672 | .driver = { | |
673 | .name = "cs4270", | |
674 | .owner = THIS_MODULE, | |
675 | }, | |
676 | .id_table = cs4270_id, | |
677 | .probe = cs4270_i2c_probe, | |
0db4d070 | 678 | .remove = cs4270_i2c_remove, |
ff637d38 | 679 | }; |
b0c813ce | 680 | |
b0c813ce TT |
681 | /* |
682 | * ASoC probe function | |
683 | * | |
684 | * This function is called when the machine driver calls | |
685 | * platform_device_add(). | |
686 | */ | |
687 | static int cs4270_probe(struct platform_device *pdev) | |
688 | { | |
0db4d070 | 689 | cs4270_socdev = platform_get_drvdata(pdev);; |
ff637d38 | 690 | |
0db4d070 | 691 | return i2c_add_driver(&cs4270_i2c_driver); |
b0c813ce TT |
692 | } |
693 | ||
694 | static int cs4270_remove(struct platform_device *pdev) | |
695 | { | |
e3145dfb | 696 | i2c_del_driver(&cs4270_i2c_driver); |
b0c813ce | 697 | |
b0c813ce TT |
698 | return 0; |
699 | } | |
700 | ||
701 | /* | |
702 | * ASoC codec device structure | |
703 | * | |
704 | * Assign this variable to the codec_dev field of the machine driver's | |
705 | * snd_soc_device structure. | |
706 | */ | |
707 | struct snd_soc_codec_device soc_codec_device_cs4270 = { | |
708 | .probe = cs4270_probe, | |
709 | .remove = cs4270_remove | |
710 | }; | |
711 | EXPORT_SYMBOL_GPL(soc_codec_device_cs4270); | |
712 | ||
c9b3a40f | 713 | static int __init cs4270_init(void) |
64089b84 | 714 | { |
0db4d070 TT |
715 | printk(KERN_INFO "Cirrus Logic CS4270 ALSA SoC Codec Driver\n"); |
716 | ||
64089b84 MB |
717 | return snd_soc_register_dai(&cs4270_dai); |
718 | } | |
719 | module_init(cs4270_init); | |
720 | ||
721 | static void __exit cs4270_exit(void) | |
722 | { | |
723 | snd_soc_unregister_dai(&cs4270_dai); | |
724 | } | |
725 | module_exit(cs4270_exit); | |
726 | ||
b0c813ce TT |
727 | MODULE_AUTHOR("Timur Tabi <timur@freescale.com>"); |
728 | MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver"); | |
729 | MODULE_LICENSE("GPL"); |