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b0c813ce TT |
1 | /* |
2 | * CS4270 ALSA SoC (ASoC) codec driver | |
3 | * | |
4 | * Author: Timur Tabi <timur@freescale.com> | |
5 | * | |
ff7bf02f TT |
6 | * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed |
7 | * under the terms of the GNU General Public License version 2. This | |
8 | * program is licensed "as is" without any warranty of any kind, whether | |
9 | * express or implied. | |
b0c813ce TT |
10 | * |
11 | * This is an ASoC device driver for the Cirrus Logic CS4270 codec. | |
12 | * | |
13 | * Current features/limitations: | |
14 | * | |
b191f63c DM |
15 | * - Software mode is supported. Stand-alone mode is not supported. |
16 | * - Only I2C is supported, not SPI | |
17 | * - Support for master and slave mode | |
18 | * - The machine driver's 'startup' function must call | |
19 | * cs4270_set_dai_sysclk() with the value of MCLK. | |
20 | * - Only I2S and left-justified modes are supported | |
5e7c0344 | 21 | * - Power management is supported |
b0c813ce TT |
22 | */ |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/platform_device.h> | |
b0c813ce TT |
26 | #include <sound/core.h> |
27 | #include <sound/soc.h> | |
28 | #include <sound/initval.h> | |
29 | #include <linux/i2c.h> | |
5e7c0344 | 30 | #include <linux/delay.h> |
b0c813ce | 31 | |
01e097d6 MB |
32 | #include "cs4270.h" |
33 | ||
8432395f TT |
34 | /* |
35 | * The codec isn't really big-endian or little-endian, since the I2S | |
36 | * interface requires data to be sent serially with the MSbit first. | |
37 | * However, to support BE and LE I2S devices, we specify both here. That | |
38 | * way, ALSA will always match the bit patterns. | |
39 | */ | |
40 | #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ | |
41 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ | |
42 | SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \ | |
43 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \ | |
44 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \ | |
45 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) | |
46 | ||
8432395f TT |
47 | /* CS4270 registers addresses */ |
48 | #define CS4270_CHIPID 0x01 /* Chip ID */ | |
49 | #define CS4270_PWRCTL 0x02 /* Power Control */ | |
50 | #define CS4270_MODE 0x03 /* Mode Control */ | |
51 | #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ | |
52 | #define CS4270_TRANS 0x05 /* Transition Control */ | |
53 | #define CS4270_MUTE 0x06 /* Mute Control */ | |
54 | #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ | |
55 | #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ | |
56 | ||
57 | #define CS4270_FIRSTREG 0x01 | |
58 | #define CS4270_LASTREG 0x08 | |
59 | #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) | |
80ab8817 | 60 | #define CS4270_I2C_INCR 0x80 |
9dbd627b | 61 | |
8432395f TT |
62 | /* Bit masks for the CS4270 registers */ |
63 | #define CS4270_CHIPID_ID 0xF0 | |
64 | #define CS4270_CHIPID_REV 0x0F | |
65 | #define CS4270_PWRCTL_FREEZE 0x80 | |
66 | #define CS4270_PWRCTL_PDN_ADC 0x20 | |
67 | #define CS4270_PWRCTL_PDN_DAC 0x02 | |
68 | #define CS4270_PWRCTL_PDN 0x01 | |
5e7c0344 DM |
69 | #define CS4270_PWRCTL_PDN_ALL \ |
70 | (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN) | |
8432395f TT |
71 | #define CS4270_MODE_SPEED_MASK 0x30 |
72 | #define CS4270_MODE_1X 0x00 | |
73 | #define CS4270_MODE_2X 0x10 | |
74 | #define CS4270_MODE_4X 0x20 | |
75 | #define CS4270_MODE_SLAVE 0x30 | |
76 | #define CS4270_MODE_DIV_MASK 0x0E | |
77 | #define CS4270_MODE_DIV1 0x00 | |
78 | #define CS4270_MODE_DIV15 0x02 | |
79 | #define CS4270_MODE_DIV2 0x04 | |
80 | #define CS4270_MODE_DIV3 0x06 | |
81 | #define CS4270_MODE_DIV4 0x08 | |
82 | #define CS4270_MODE_POPGUARD 0x01 | |
83 | #define CS4270_FORMAT_FREEZE_A 0x80 | |
84 | #define CS4270_FORMAT_FREEZE_B 0x40 | |
85 | #define CS4270_FORMAT_LOOPBACK 0x20 | |
86 | #define CS4270_FORMAT_DAC_MASK 0x18 | |
87 | #define CS4270_FORMAT_DAC_LJ 0x00 | |
88 | #define CS4270_FORMAT_DAC_I2S 0x08 | |
89 | #define CS4270_FORMAT_DAC_RJ16 0x18 | |
90 | #define CS4270_FORMAT_DAC_RJ24 0x10 | |
91 | #define CS4270_FORMAT_ADC_MASK 0x01 | |
92 | #define CS4270_FORMAT_ADC_LJ 0x00 | |
93 | #define CS4270_FORMAT_ADC_I2S 0x01 | |
94 | #define CS4270_TRANS_ONE_VOL 0x80 | |
95 | #define CS4270_TRANS_SOFT 0x40 | |
96 | #define CS4270_TRANS_ZERO 0x20 | |
97 | #define CS4270_TRANS_INV_ADC_A 0x08 | |
98 | #define CS4270_TRANS_INV_ADC_B 0x10 | |
99 | #define CS4270_TRANS_INV_DAC_A 0x02 | |
100 | #define CS4270_TRANS_INV_DAC_B 0x04 | |
101 | #define CS4270_TRANS_DEEMPH 0x01 | |
102 | #define CS4270_MUTE_AUTO 0x20 | |
103 | #define CS4270_MUTE_ADC_A 0x08 | |
104 | #define CS4270_MUTE_ADC_B 0x10 | |
105 | #define CS4270_MUTE_POLARITY 0x04 | |
106 | #define CS4270_MUTE_DAC_A 0x01 | |
107 | #define CS4270_MUTE_DAC_B 0x02 | |
108 | ||
0db4d070 TT |
109 | /* Private data for the CS4270 */ |
110 | struct cs4270_private { | |
111 | struct snd_soc_codec codec; | |
112 | u8 reg_cache[CS4270_NUMREGS]; | |
113 | unsigned int mclk; /* Input frequency of the MCLK pin */ | |
114 | unsigned int mode; /* The mode (I2S or left-justified) */ | |
4eae080d | 115 | unsigned int slave_mode; |
1a4ba05e | 116 | unsigned int manual_mute; |
0db4d070 TT |
117 | }; |
118 | ||
ff7bf02f TT |
119 | /** |
120 | * struct cs4270_mode_ratios - clock ratio tables | |
121 | * @ratio: the ratio of MCLK to the sample rate | |
122 | * @speed_mode: the Speed Mode bits to set in the Mode Control register for | |
123 | * this ratio | |
124 | * @mclk: the Ratio Select bits to set in the Mode Control register for this | |
125 | * ratio | |
8432395f TT |
126 | * |
127 | * The data for this chart is taken from Table 5 of the CS4270 reference | |
128 | * manual. | |
129 | * | |
130 | * This table is used to determine how to program the Mode Control register. | |
131 | * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling | |
132 | * rates the CS4270 currently supports. | |
133 | * | |
ff7bf02f | 134 | * @speed_mode is the corresponding bit pattern to be written to the |
8432395f TT |
135 | * MODE bits of the Mode Control Register |
136 | * | |
ff7bf02f | 137 | * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of |
8432395f TT |
138 | * the Mode Control Register. |
139 | * | |
140 | * In situations where a single ratio is represented by multiple speed | |
141 | * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick | |
142 | * double-speed instead of quad-speed. However, the CS4270 errata states | |
ff7bf02f | 143 | * that divide-By-1.5 can cause failures, so we avoid that mode where |
8432395f TT |
144 | * possible. |
145 | * | |
ff7bf02f TT |
146 | * Errata: There is an errata for the CS4270 where divide-by-1.5 does not |
147 | * work if Vd is 3.3V. If this effects you, select the | |
8432395f TT |
148 | * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will |
149 | * never select any sample rates that require divide-by-1.5. | |
150 | */ | |
ff7bf02f | 151 | struct cs4270_mode_ratios { |
8432395f TT |
152 | unsigned int ratio; |
153 | u8 speed_mode; | |
154 | u8 mclk; | |
ff7bf02f TT |
155 | }; |
156 | ||
d9fb7fbd | 157 | static struct cs4270_mode_ratios cs4270_mode_ratios[] = { |
8432395f TT |
158 | {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, |
159 | #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA | |
160 | {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, | |
161 | #endif | |
162 | {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, | |
163 | {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, | |
164 | {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, | |
165 | {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, | |
166 | {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, | |
167 | {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, | |
168 | {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} | |
169 | }; | |
170 | ||
171 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ | |
172 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) | |
9dbd627b | 173 | |
ff7bf02f TT |
174 | /** |
175 | * cs4270_set_dai_sysclk - determine the CS4270 samples rates. | |
176 | * @codec_dai: the codec DAI | |
177 | * @clk_id: the clock ID (ignored) | |
178 | * @freq: the MCLK input frequency | |
179 | * @dir: the clock direction (ignored) | |
9dbd627b | 180 | * |
ff7bf02f TT |
181 | * This function is used to tell the codec driver what the input MCLK |
182 | * frequency is. | |
9dbd627b TT |
183 | * |
184 | * The value of MCLK is used to determine which sample rates are supported | |
185 | * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine | |
ff7bf02f | 186 | * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024. |
9dbd627b TT |
187 | * |
188 | * This function calculates the nine ratios and determines which ones match | |
189 | * a standard sample rate. If there's a match, then it is added to the list | |
ff7bf02f | 190 | * of supported sample rates. |
9dbd627b TT |
191 | * |
192 | * This function must be called by the machine driver's 'startup' function, | |
193 | * otherwise the list of supported sample rates will not be available in | |
194 | * time for ALSA. | |
9dbd627b | 195 | */ |
e550e17f | 196 | static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
197 | int clk_id, unsigned int freq, int dir) |
198 | { | |
199 | struct snd_soc_codec *codec = codec_dai->codec; | |
200 | struct cs4270_private *cs4270 = codec->private_data; | |
201 | unsigned int rates = 0; | |
202 | unsigned int rate_min = -1; | |
203 | unsigned int rate_max = 0; | |
204 | unsigned int i; | |
205 | ||
206 | cs4270->mclk = freq; | |
207 | ||
208 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { | |
8432395f | 209 | unsigned int rate = freq / cs4270_mode_ratios[i].ratio; |
918f3a0e CL |
210 | rates |= snd_pcm_rate_to_rate_bit(rate); |
211 | if (rate < rate_min) | |
212 | rate_min = rate; | |
213 | if (rate > rate_max) | |
214 | rate_max = rate; | |
9dbd627b | 215 | } |
918f3a0e CL |
216 | /* FIXME: soc should support a rate list */ |
217 | rates &= ~SNDRV_PCM_RATE_KNOT; | |
9dbd627b TT |
218 | |
219 | if (!rates) { | |
a6c255e0 | 220 | dev_err(codec->dev, "could not find a valid sample rate\n"); |
9dbd627b TT |
221 | return -EINVAL; |
222 | } | |
223 | ||
224 | codec_dai->playback.rates = rates; | |
225 | codec_dai->playback.rate_min = rate_min; | |
226 | codec_dai->playback.rate_max = rate_max; | |
227 | ||
228 | codec_dai->capture.rates = rates; | |
229 | codec_dai->capture.rate_min = rate_min; | |
230 | codec_dai->capture.rate_max = rate_max; | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
ff7bf02f TT |
235 | /** |
236 | * cs4270_set_dai_fmt - configure the codec for the selected audio format | |
237 | * @codec_dai: the codec DAI | |
238 | * @format: a SND_SOC_DAIFMT_x value indicating the data format | |
9dbd627b TT |
239 | * |
240 | * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the | |
241 | * codec accordingly. | |
242 | * | |
243 | * Currently, this function only supports SND_SOC_DAIFMT_I2S and | |
244 | * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified | |
245 | * data for playback only, but ASoC currently does not support different | |
246 | * formats for playback vs. record. | |
247 | */ | |
e550e17f | 248 | static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, |
9dbd627b TT |
249 | unsigned int format) |
250 | { | |
251 | struct snd_soc_codec *codec = codec_dai->codec; | |
252 | struct cs4270_private *cs4270 = codec->private_data; | |
253 | int ret = 0; | |
254 | ||
4eae080d | 255 | /* set DAI format */ |
9dbd627b TT |
256 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
257 | case SND_SOC_DAIFMT_I2S: | |
258 | case SND_SOC_DAIFMT_LEFT_J: | |
259 | cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; | |
260 | break; | |
261 | default: | |
a6c255e0 | 262 | dev_err(codec->dev, "invalid dai format\n"); |
9dbd627b TT |
263 | ret = -EINVAL; |
264 | } | |
265 | ||
4eae080d DM |
266 | /* set master/slave audio interface */ |
267 | switch (format & SND_SOC_DAIFMT_MASTER_MASK) { | |
268 | case SND_SOC_DAIFMT_CBS_CFS: | |
269 | cs4270->slave_mode = 1; | |
270 | break; | |
271 | case SND_SOC_DAIFMT_CBM_CFM: | |
272 | cs4270->slave_mode = 0; | |
273 | break; | |
4eae080d | 274 | default: |
ff09d49a | 275 | /* all other modes are unsupported by the hardware */ |
4eae080d DM |
276 | ret = -EINVAL; |
277 | } | |
278 | ||
9dbd627b TT |
279 | return ret; |
280 | } | |
281 | ||
ff7bf02f TT |
282 | /** |
283 | * cs4270_fill_cache - pre-fill the CS4270 register cache. | |
284 | * @codec: the codec for this CS4270 | |
285 | * | |
286 | * This function fills in the CS4270 register cache by reading the register | |
287 | * values from the hardware. | |
288 | * | |
289 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | |
290 | * After the initial read to pre-fill the cache, the CS4270 never updates | |
291 | * the register values, so we won't have a cache coherency problem. | |
b0c813ce TT |
292 | * |
293 | * We use the auto-increment feature of the CS4270 to read all registers in | |
294 | * one shot. | |
295 | */ | |
296 | static int cs4270_fill_cache(struct snd_soc_codec *codec) | |
297 | { | |
298 | u8 *cache = codec->reg_cache; | |
299 | struct i2c_client *i2c_client = codec->control_data; | |
300 | s32 length; | |
301 | ||
302 | length = i2c_smbus_read_i2c_block_data(i2c_client, | |
80ab8817 | 303 | CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache); |
b0c813ce TT |
304 | |
305 | if (length != CS4270_NUMREGS) { | |
a6c255e0 | 306 | dev_err(codec->dev, "i2c read failure, addr=0x%x\n", |
b0c813ce TT |
307 | i2c_client->addr); |
308 | return -EIO; | |
309 | } | |
310 | ||
311 | return 0; | |
312 | } | |
313 | ||
ff7bf02f TT |
314 | /** |
315 | * cs4270_read_reg_cache - read from the CS4270 register cache. | |
316 | * @codec: the codec for this CS4270 | |
317 | * @reg: the register to read | |
318 | * | |
319 | * This function returns the value for a given register. It reads only from | |
320 | * the register cache, not the hardware itself. | |
b0c813ce TT |
321 | * |
322 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | |
323 | * After the initial read to pre-fill the cache, the CS4270 never updates | |
ff7bf02f | 324 | * the register values, so we won't have a cache coherency problem. |
b0c813ce TT |
325 | */ |
326 | static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec, | |
327 | unsigned int reg) | |
328 | { | |
329 | u8 *cache = codec->reg_cache; | |
330 | ||
331 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | |
332 | return -EIO; | |
333 | ||
334 | return cache[reg - CS4270_FIRSTREG]; | |
335 | } | |
336 | ||
ff7bf02f TT |
337 | /** |
338 | * cs4270_i2c_write - write to a CS4270 register via the I2C bus. | |
339 | * @codec: the codec for this CS4270 | |
340 | * @reg: the register to write | |
341 | * @value: the value to write to the register | |
b0c813ce TT |
342 | * |
343 | * This function writes the given value to the given CS4270 register, and | |
344 | * also updates the register cache. | |
345 | * | |
346 | * Note that we don't use the hw_write function pointer of snd_soc_codec. | |
347 | * That's because it's too clunky: the hw_write_t prototype does not match | |
348 | * i2c_smbus_write_byte_data(), and it's just another layer of overhead. | |
349 | */ | |
350 | static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg, | |
351 | unsigned int value) | |
352 | { | |
bfc4e861 TT |
353 | u8 *cache = codec->reg_cache; |
354 | ||
b0c813ce TT |
355 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) |
356 | return -EIO; | |
357 | ||
bfc4e861 TT |
358 | /* Only perform an I2C operation if the new value is different */ |
359 | if (cache[reg - CS4270_FIRSTREG] != value) { | |
360 | struct i2c_client *client = codec->control_data; | |
361 | if (i2c_smbus_write_byte_data(client, reg, value)) { | |
a6c255e0 | 362 | dev_err(codec->dev, "i2c write failed\n"); |
bfc4e861 TT |
363 | return -EIO; |
364 | } | |
365 | ||
b0c813ce | 366 | /* We've written to the hardware, so update the cache */ |
b0c813ce | 367 | cache[reg - CS4270_FIRSTREG] = value; |
b0c813ce | 368 | } |
bfc4e861 TT |
369 | |
370 | return 0; | |
b0c813ce TT |
371 | } |
372 | ||
ff7bf02f TT |
373 | /** |
374 | * cs4270_hw_params - program the CS4270 with the given hardware parameters. | |
375 | * @substream: the audio stream | |
376 | * @params: the hardware parameters to set | |
377 | * @dai: the SOC DAI (ignored) | |
b0c813ce | 378 | * |
ff7bf02f TT |
379 | * This function programs the hardware with the values provided. |
380 | * Specifically, the sample rate and the data format. | |
381 | * | |
382 | * The .ops functions are used to provide board-specific data, like input | |
383 | * frequencies, to this driver. This function takes that information, | |
b0c813ce TT |
384 | * combines it with the hardware parameters provided, and programs the |
385 | * hardware accordingly. | |
386 | */ | |
387 | static int cs4270_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
388 | struct snd_pcm_hw_params *params, |
389 | struct snd_soc_dai *dai) | |
b0c813ce TT |
390 | { |
391 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
392 | struct snd_soc_device *socdev = rtd->socdev; | |
6627a653 | 393 | struct snd_soc_codec *codec = socdev->card->codec; |
b0c813ce | 394 | struct cs4270_private *cs4270 = codec->private_data; |
e34ba212 | 395 | int ret; |
b0c813ce TT |
396 | unsigned int i; |
397 | unsigned int rate; | |
398 | unsigned int ratio; | |
399 | int reg; | |
400 | ||
401 | /* Figure out which MCLK/LRCK ratio to use */ | |
402 | ||
403 | rate = params_rate(params); /* Sampling rate, in Hz */ | |
404 | ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ | |
405 | ||
9dbd627b | 406 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { |
8432395f | 407 | if (cs4270_mode_ratios[i].ratio == ratio) |
b0c813ce TT |
408 | break; |
409 | } | |
410 | ||
9dbd627b | 411 | if (i == NUM_MCLK_RATIOS) { |
b0c813ce | 412 | /* We did not find a matching ratio */ |
a6c255e0 | 413 | dev_err(codec->dev, "could not find matching ratio\n"); |
b0c813ce TT |
414 | return -EINVAL; |
415 | } | |
416 | ||
d5e9ba1d | 417 | /* Set the sample rate */ |
b0c813ce TT |
418 | |
419 | reg = snd_soc_read(codec, CS4270_MODE); | |
420 | reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); | |
4eae080d DM |
421 | reg |= cs4270_mode_ratios[i].mclk; |
422 | ||
423 | if (cs4270->slave_mode) | |
424 | reg |= CS4270_MODE_SLAVE; | |
425 | else | |
426 | reg |= cs4270_mode_ratios[i].speed_mode; | |
b0c813ce TT |
427 | |
428 | ret = snd_soc_write(codec, CS4270_MODE, reg); | |
429 | if (ret < 0) { | |
a6c255e0 | 430 | dev_err(codec->dev, "i2c write failed\n"); |
b0c813ce TT |
431 | return ret; |
432 | } | |
433 | ||
d5e9ba1d | 434 | /* Set the DAI format */ |
b0c813ce TT |
435 | |
436 | reg = snd_soc_read(codec, CS4270_FORMAT); | |
437 | reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); | |
438 | ||
439 | switch (cs4270->mode) { | |
440 | case SND_SOC_DAIFMT_I2S: | |
441 | reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; | |
442 | break; | |
443 | case SND_SOC_DAIFMT_LEFT_J: | |
444 | reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; | |
445 | break; | |
446 | default: | |
a6c255e0 | 447 | dev_err(codec->dev, "unknown dai format\n"); |
b0c813ce TT |
448 | return -EINVAL; |
449 | } | |
450 | ||
451 | ret = snd_soc_write(codec, CS4270_FORMAT, reg); | |
452 | if (ret < 0) { | |
a6c255e0 | 453 | dev_err(codec->dev, "i2c write failed\n"); |
b0c813ce TT |
454 | return ret; |
455 | } | |
456 | ||
b0c813ce TT |
457 | return ret; |
458 | } | |
459 | ||
ff7bf02f | 460 | /** |
1a4ba05e | 461 | * cs4270_dai_mute - enable/disable the CS4270 external mute |
ff7bf02f TT |
462 | * @dai: the SOC DAI |
463 | * @mute: 0 = disable mute, 1 = enable mute | |
b0c813ce TT |
464 | * |
465 | * This function toggles the mute bits in the MUTE register. The CS4270's | |
466 | * mute capability is intended for external muting circuitry, so if the | |
467 | * board does not have the MUTEA or MUTEB pins connected to such circuitry, | |
468 | * then this function will do nothing. | |
469 | */ | |
1a4ba05e | 470 | static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute) |
b0c813ce TT |
471 | { |
472 | struct snd_soc_codec *codec = dai->codec; | |
1a4ba05e | 473 | struct cs4270_private *cs4270 = codec->private_data; |
b0c813ce TT |
474 | int reg6; |
475 | ||
476 | reg6 = snd_soc_read(codec, CS4270_MUTE); | |
477 | ||
478 | if (mute) | |
d5e9ba1d | 479 | reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; |
1a4ba05e | 480 | else { |
d5e9ba1d | 481 | reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); |
1a4ba05e DM |
482 | reg6 |= cs4270->manual_mute; |
483 | } | |
b0c813ce TT |
484 | |
485 | return snd_soc_write(codec, CS4270_MUTE, reg6); | |
486 | } | |
b0c813ce | 487 | |
1a4ba05e DM |
488 | /** |
489 | * cs4270_soc_put_mute - put callback for the 'Master Playback switch' | |
490 | * alsa control. | |
491 | * @kcontrol: mixer control | |
492 | * @ucontrol: control element information | |
493 | * | |
494 | * This function basically passes the arguments on to the generic | |
495 | * snd_soc_put_volsw() function and saves the mute information in | |
496 | * our private data structure. This is because we want to prevent | |
497 | * cs4270_dai_mute() neglecting the user's decision to manually | |
498 | * mute the codec's output. | |
499 | * | |
500 | * Returns 0 for success. | |
501 | */ | |
502 | static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, | |
503 | struct snd_ctl_elem_value *ucontrol) | |
504 | { | |
505 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
506 | struct cs4270_private *cs4270 = codec->private_data; | |
507 | int left = !ucontrol->value.integer.value[0]; | |
508 | int right = !ucontrol->value.integer.value[1]; | |
509 | ||
510 | cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) | | |
511 | (right ? CS4270_MUTE_DAC_B : 0); | |
512 | ||
513 | return snd_soc_put_volsw(kcontrol, ucontrol); | |
514 | } | |
515 | ||
b0c813ce TT |
516 | /* A list of non-DAPM controls that the CS4270 supports */ |
517 | static const struct snd_kcontrol_new cs4270_snd_controls[] = { | |
518 | SOC_DOUBLE_R("Master Playback Volume", | |
d5e9ba1d TT |
519 | CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1), |
520 | SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0), | |
521 | SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0), | |
522 | SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0), | |
7e1aa1dc | 523 | SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0), |
d5e9ba1d TT |
524 | SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1), |
525 | SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0), | |
1a4ba05e DM |
526 | SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1), |
527 | SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1, | |
528 | snd_soc_get_volsw, cs4270_soc_put_mute), | |
b0c813ce TT |
529 | }; |
530 | ||
b0c813ce | 531 | /* |
ff7bf02f | 532 | * cs4270_codec - global variable to store codec for the ASoC probe function |
b0c813ce TT |
533 | * |
534 | * If struct i2c_driver had a private_data field, we wouldn't need to use | |
04eb093c TT |
535 | * cs4270_codec. This is the only way to pass the codec structure from |
536 | * cs4270_i2c_probe() to cs4270_probe(). Unfortunately, there is no good | |
537 | * way to synchronize these two functions. cs4270_i2c_probe() can be called | |
538 | * multiple times before cs4270_probe() is called even once. So for now, we | |
539 | * also only allow cs4270_i2c_probe() to be run once. That means that we do | |
540 | * not support more than one cs4270 device in the system, at least for now. | |
b0c813ce | 541 | */ |
04eb093c | 542 | static struct snd_soc_codec *cs4270_codec; |
b0c813ce | 543 | |
6335d055 EM |
544 | static struct snd_soc_dai_ops cs4270_dai_ops = { |
545 | .hw_params = cs4270_hw_params, | |
546 | .set_sysclk = cs4270_set_dai_sysclk, | |
547 | .set_fmt = cs4270_set_dai_fmt, | |
1a4ba05e | 548 | .digital_mute = cs4270_dai_mute, |
6335d055 EM |
549 | }; |
550 | ||
0db4d070 TT |
551 | struct snd_soc_dai cs4270_dai = { |
552 | .name = "cs4270", | |
553 | .playback = { | |
554 | .stream_name = "Playback", | |
555 | .channels_min = 1, | |
556 | .channels_max = 2, | |
557 | .rates = 0, | |
558 | .formats = CS4270_FORMATS, | |
559 | }, | |
560 | .capture = { | |
561 | .stream_name = "Capture", | |
562 | .channels_min = 1, | |
563 | .channels_max = 2, | |
564 | .rates = 0, | |
565 | .formats = CS4270_FORMATS, | |
566 | }, | |
6335d055 | 567 | .ops = &cs4270_dai_ops, |
0db4d070 TT |
568 | }; |
569 | EXPORT_SYMBOL_GPL(cs4270_dai); | |
570 | ||
ff7bf02f TT |
571 | /** |
572 | * cs4270_probe - ASoC probe function | |
573 | * @pdev: platform device | |
574 | * | |
575 | * This function is called when ASoC has all the pieces it needs to | |
576 | * instantiate a sound driver. | |
04eb093c TT |
577 | */ |
578 | static int cs4270_probe(struct platform_device *pdev) | |
579 | { | |
580 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
581 | struct snd_soc_codec *codec = cs4270_codec; | |
04eb093c TT |
582 | int ret; |
583 | ||
584 | /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */ | |
585 | socdev->card->codec = codec; | |
586 | ||
587 | /* Register PCMs */ | |
588 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
589 | if (ret < 0) { | |
a6c255e0 | 590 | dev_err(codec->dev, "failed to create pcms\n"); |
04eb093c TT |
591 | return ret; |
592 | } | |
593 | ||
594 | /* Add the non-DAPM controls */ | |
eb5f6d75 PZ |
595 | ret = snd_soc_add_controls(codec, cs4270_snd_controls, |
596 | ARRAY_SIZE(cs4270_snd_controls)); | |
597 | if (ret < 0) { | |
598 | dev_err(codec->dev, "failed to add controls\n"); | |
599 | goto error_free_pcms; | |
04eb093c TT |
600 | } |
601 | ||
04eb093c TT |
602 | return 0; |
603 | ||
604 | error_free_pcms: | |
605 | snd_soc_free_pcms(socdev); | |
606 | ||
607 | return ret; | |
608 | } | |
609 | ||
ff7bf02f TT |
610 | /** |
611 | * cs4270_remove - ASoC remove function | |
612 | * @pdev: platform device | |
613 | * | |
614 | * This function is the counterpart to cs4270_probe(). | |
615 | */ | |
04eb093c TT |
616 | static int cs4270_remove(struct platform_device *pdev) |
617 | { | |
618 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
619 | ||
620 | snd_soc_free_pcms(socdev); | |
621 | ||
622 | return 0; | |
623 | }; | |
624 | ||
ff7bf02f TT |
625 | /** |
626 | * cs4270_i2c_probe - initialize the I2C interface of the CS4270 | |
627 | * @i2c_client: the I2C client object | |
628 | * @id: the I2C device ID (ignored) | |
b0c813ce | 629 | * |
ff7bf02f TT |
630 | * This function is called whenever the I2C subsystem finds a device that |
631 | * matches the device ID given via a prior call to i2c_add_driver(). | |
b0c813ce | 632 | */ |
ec2cd95f TT |
633 | static int cs4270_i2c_probe(struct i2c_client *i2c_client, |
634 | const struct i2c_device_id *id) | |
b0c813ce | 635 | { |
0db4d070 TT |
636 | struct snd_soc_codec *codec; |
637 | struct cs4270_private *cs4270; | |
d5e9ba1d | 638 | unsigned int reg; |
04eb093c TT |
639 | int ret; |
640 | ||
641 | /* For now, we only support one cs4270 device in the system. See the | |
642 | * comment for cs4270_codec. | |
643 | */ | |
644 | if (cs4270_codec) { | |
a6c255e0 | 645 | dev_err(&i2c_client->dev, "ignoring CS4270 at addr %X\n", |
04eb093c | 646 | i2c_client->addr); |
a6c255e0 | 647 | dev_err(&i2c_client->dev, "only one per board allowed\n"); |
04eb093c TT |
648 | /* Should we return something other than ENODEV here? */ |
649 | return -ENODEV; | |
650 | } | |
b0c813ce | 651 | |
b0c813ce TT |
652 | /* Verify that we have a CS4270 */ |
653 | ||
654 | ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID); | |
655 | if (ret < 0) { | |
a6c255e0 | 656 | dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n", |
04eb093c | 657 | i2c_client->addr); |
0db4d070 | 658 | return ret; |
b0c813ce TT |
659 | } |
660 | /* The top four bits of the chip ID should be 1100. */ | |
661 | if ((ret & 0xF0) != 0xC0) { | |
a6c255e0 | 662 | dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n", |
0db4d070 TT |
663 | i2c_client->addr); |
664 | return -ENODEV; | |
b0c813ce TT |
665 | } |
666 | ||
a6c255e0 | 667 | dev_info(&i2c_client->dev, "found device at i2c address %X\n", |
ec2cd95f | 668 | i2c_client->addr); |
a6c255e0 | 669 | dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF); |
b0c813ce | 670 | |
0db4d070 TT |
671 | /* Allocate enough space for the snd_soc_codec structure |
672 | and our private data together. */ | |
673 | cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL); | |
674 | if (!cs4270) { | |
a6c255e0 | 675 | dev_err(&i2c_client->dev, "could not allocate codec\n"); |
0db4d070 TT |
676 | return -ENOMEM; |
677 | } | |
678 | codec = &cs4270->codec; | |
0db4d070 TT |
679 | |
680 | mutex_init(&codec->mutex); | |
681 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
682 | INIT_LIST_HEAD(&codec->dapm_paths); | |
683 | ||
a6c255e0 | 684 | codec->dev = &i2c_client->dev; |
0db4d070 TT |
685 | codec->name = "CS4270"; |
686 | codec->owner = THIS_MODULE; | |
687 | codec->dai = &cs4270_dai; | |
688 | codec->num_dai = 1; | |
689 | codec->private_data = cs4270; | |
b0c813ce TT |
690 | codec->control_data = i2c_client; |
691 | codec->read = cs4270_read_reg_cache; | |
692 | codec->write = cs4270_i2c_write; | |
0db4d070 | 693 | codec->reg_cache = cs4270->reg_cache; |
b0c813ce TT |
694 | codec->reg_cache_size = CS4270_NUMREGS; |
695 | ||
696 | /* The I2C interface is set up, so pre-fill our register cache */ | |
697 | ||
698 | ret = cs4270_fill_cache(codec); | |
699 | if (ret < 0) { | |
a6c255e0 | 700 | dev_err(&i2c_client->dev, "failed to fill register cache\n"); |
0db4d070 TT |
701 | goto error_free_codec; |
702 | } | |
703 | ||
d5e9ba1d TT |
704 | /* Disable auto-mute. This feature appears to be buggy. In some |
705 | * situations, auto-mute will not deactivate when it should, so we want | |
706 | * this feature disabled by default. An application (e.g. alsactl) can | |
707 | * re-enabled it by using the controls. | |
708 | */ | |
709 | ||
710 | reg = cs4270_read_reg_cache(codec, CS4270_MUTE); | |
711 | reg &= ~CS4270_MUTE_AUTO; | |
712 | ret = cs4270_i2c_write(codec, CS4270_MUTE, reg); | |
713 | if (ret < 0) { | |
714 | dev_err(&i2c_client->dev, "i2c write failed\n"); | |
715 | return ret; | |
716 | } | |
717 | ||
718 | /* Disable automatic volume control. The hardware enables, and it | |
719 | * causes volume change commands to be delayed, sometimes until after | |
720 | * playback has started. An application (e.g. alsactl) can | |
721 | * re-enabled it by using the controls. | |
722 | */ | |
723 | ||
724 | reg = cs4270_read_reg_cache(codec, CS4270_TRANS); | |
725 | reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO); | |
726 | ret = cs4270_i2c_write(codec, CS4270_TRANS, reg); | |
727 | if (ret < 0) { | |
728 | dev_err(&i2c_client->dev, "i2c write failed\n"); | |
729 | return ret; | |
730 | } | |
731 | ||
a6c255e0 TT |
732 | /* Initialize the DAI. Normally, we'd prefer to have a kmalloc'd DAI |
733 | * structure for each CS4270 device, but the machine driver needs to | |
734 | * have a pointer to the DAI structure, so for now it must be a global | |
735 | * variable. | |
736 | */ | |
737 | cs4270_dai.dev = &i2c_client->dev; | |
738 | ||
04eb093c TT |
739 | /* Register the DAI. If all the other ASoC driver have already |
740 | * registered, then this will call our probe function, so | |
741 | * cs4270_codec needs to be ready. | |
742 | */ | |
a6c255e0 | 743 | cs4270_codec = codec; |
04eb093c | 744 | ret = snd_soc_register_dai(&cs4270_dai); |
0db4d070 | 745 | if (ret < 0) { |
a6c255e0 | 746 | dev_err(&i2c_client->dev, "failed to register DAIe\n"); |
0db4d070 | 747 | goto error_free_codec; |
b0c813ce TT |
748 | } |
749 | ||
04eb093c | 750 | i2c_set_clientdata(i2c_client, cs4270); |
ec2cd95f | 751 | |
b0c813ce TT |
752 | return 0; |
753 | ||
0db4d070 TT |
754 | error_free_codec: |
755 | kfree(cs4270); | |
a6c255e0 TT |
756 | cs4270_codec = NULL; |
757 | cs4270_dai.dev = NULL; | |
b0c813ce | 758 | |
b0c813ce TT |
759 | return ret; |
760 | } | |
761 | ||
ff7bf02f TT |
762 | /** |
763 | * cs4270_i2c_remove - remove an I2C device | |
764 | * @i2c_client: the I2C client object | |
765 | * | |
766 | * This function is the counterpart to cs4270_i2c_probe(). | |
767 | */ | |
0db4d070 TT |
768 | static int cs4270_i2c_remove(struct i2c_client *i2c_client) |
769 | { | |
04eb093c | 770 | struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client); |
0db4d070 | 771 | |
0db4d070 | 772 | kfree(cs4270); |
a6c255e0 TT |
773 | cs4270_codec = NULL; |
774 | cs4270_dai.dev = NULL; | |
0db4d070 TT |
775 | |
776 | return 0; | |
777 | } | |
778 | ||
ff7bf02f TT |
779 | /* |
780 | * cs4270_id - I2C device IDs supported by this driver | |
781 | */ | |
0db4d070 | 782 | static struct i2c_device_id cs4270_id[] = { |
ff637d38 TT |
783 | {"cs4270", 0}, |
784 | {} | |
785 | }; | |
786 | MODULE_DEVICE_TABLE(i2c, cs4270_id); | |
787 | ||
5e7c0344 DM |
788 | #ifdef CONFIG_PM |
789 | ||
790 | /* This suspend/resume implementation can handle both - a simple standby | |
791 | * where the codec remains powered, and a full suspend, where the voltage | |
792 | * domain the codec is connected to is teared down and/or any other hardware | |
793 | * reset condition is asserted. | |
794 | * | |
795 | * The codec's own power saving features are enabled in the suspend callback, | |
796 | * and all registers are written back to the hardware when resuming. | |
797 | */ | |
798 | ||
15b5bdae DM |
799 | static int cs4270_soc_suspend(struct platform_device *pdev, pm_message_t mesg) |
800 | { | |
801 | struct snd_soc_codec *codec = cs4270_codec; | |
802 | int reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL; | |
803 | ||
804 | return snd_soc_write(codec, CS4270_PWRCTL, reg); | |
805 | } | |
806 | ||
807 | static int cs4270_soc_resume(struct platform_device *pdev) | |
808 | { | |
809 | struct snd_soc_codec *codec = cs4270_codec; | |
810 | struct i2c_client *i2c_client = codec->control_data; | |
5e7c0344 DM |
811 | int reg; |
812 | ||
813 | /* In case the device was put to hard reset during sleep, we need to | |
814 | * wait 500ns here before any I2C communication. */ | |
815 | ndelay(500); | |
816 | ||
817 | /* first restore the entire register cache ... */ | |
818 | for (reg = CS4270_FIRSTREG; reg <= CS4270_LASTREG; reg++) { | |
819 | u8 val = snd_soc_read(codec, reg); | |
820 | ||
15b5bdae | 821 | if (i2c_smbus_write_byte_data(i2c_client, reg, val)) { |
5e7c0344 DM |
822 | dev_err(codec->dev, "i2c write failed\n"); |
823 | return -EIO; | |
824 | } | |
825 | } | |
826 | ||
827 | /* ... then disable the power-down bits */ | |
828 | reg = snd_soc_read(codec, CS4270_PWRCTL); | |
829 | reg &= ~CS4270_PWRCTL_PDN_ALL; | |
830 | ||
831 | return snd_soc_write(codec, CS4270_PWRCTL, reg); | |
832 | } | |
833 | #else | |
15b5bdae DM |
834 | #define cs4270_soc_suspend NULL |
835 | #define cs4270_soc_resume NULL | |
5e7c0344 DM |
836 | #endif /* CONFIG_PM */ |
837 | ||
ff7bf02f TT |
838 | /* |
839 | * cs4270_i2c_driver - I2C device identification | |
840 | * | |
841 | * This structure tells the I2C subsystem how to identify and support a | |
842 | * given I2C device type. | |
843 | */ | |
ff637d38 TT |
844 | static struct i2c_driver cs4270_i2c_driver = { |
845 | .driver = { | |
846 | .name = "cs4270", | |
847 | .owner = THIS_MODULE, | |
848 | }, | |
849 | .id_table = cs4270_id, | |
850 | .probe = cs4270_i2c_probe, | |
0db4d070 | 851 | .remove = cs4270_i2c_remove, |
ff637d38 | 852 | }; |
b0c813ce | 853 | |
b0c813ce TT |
854 | /* |
855 | * ASoC codec device structure | |
856 | * | |
857 | * Assign this variable to the codec_dev field of the machine driver's | |
858 | * snd_soc_device structure. | |
859 | */ | |
860 | struct snd_soc_codec_device soc_codec_device_cs4270 = { | |
861 | .probe = cs4270_probe, | |
15b5bdae DM |
862 | .remove = cs4270_remove, |
863 | .suspend = cs4270_soc_suspend, | |
864 | .resume = cs4270_soc_resume, | |
b0c813ce TT |
865 | }; |
866 | EXPORT_SYMBOL_GPL(soc_codec_device_cs4270); | |
867 | ||
c9b3a40f | 868 | static int __init cs4270_init(void) |
64089b84 | 869 | { |
a6c255e0 | 870 | pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n"); |
0db4d070 | 871 | |
04eb093c | 872 | return i2c_add_driver(&cs4270_i2c_driver); |
64089b84 MB |
873 | } |
874 | module_init(cs4270_init); | |
875 | ||
876 | static void __exit cs4270_exit(void) | |
877 | { | |
04eb093c | 878 | i2c_del_driver(&cs4270_i2c_driver); |
64089b84 MB |
879 | } |
880 | module_exit(cs4270_exit); | |
881 | ||
b0c813ce TT |
882 | MODULE_AUTHOR("Timur Tabi <timur@freescale.com>"); |
883 | MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver"); | |
884 | MODULE_LICENSE("GPL"); |