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ASoC: da7213: Refactor sysclk(), pll() functions to improve handling
[deliverable/linux.git] / sound / soc / codecs / da7213.c
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ef5c2eba
AT		 1/*
2 * DA7213 ALSA SoC Codec Driver
3 *
4 * Copyright (c) 2013 Dialog Semiconductor
5 *
6 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7 * Based on DA9055 ALSA SoC codec driver.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
6e7c4443 15#include <linux/clk.h>
ef5c2eba
AT		 16#include <linux/delay.h>
17#include <linux/i2c.h>
18#include <linux/regmap.h>
19#include <linux/slab.h>
20#include <linux/module.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24#include <sound/initval.h>
25#include <sound/tlv.h>
26
27#include <sound/da7213.h>
28#include "da7213.h"
29
30
31/* Gain and Volume */
32e933be 32static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
ef5c2eba
AT		 33 /* -54dB */
34 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
35 /* -52.5dB to 15dB */
36 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
32e933be 37);
ef5c2eba 38
32e933be 39static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
ef5c2eba
AT		 40 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
41 /* -78dB to 12dB */
42 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
32e933be 43);
ef5c2eba 44
32e933be 45static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
ef5c2eba
AT		 46 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
47 /* 0dB to 36dB */
48 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
32e933be 49);
ef5c2eba
AT		 50
51static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
52static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
53static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
54static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
55static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
56static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
57static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
58
59/* ADC and DAC voice mode (8kHz) high pass cutoff value */
60static const char * const da7213_voice_hpf_corner_txt[] = {
61 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
62};
63
c99f8b21
TI		 64static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
65 DA7213_DAC_FILTERS1,
66 DA7213_VOICE_HPF_CORNER_SHIFT,
67 da7213_voice_hpf_corner_txt);
ef5c2eba 68
c99f8b21
TI		 69static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
70 DA7213_ADC_FILTERS1,
71 DA7213_VOICE_HPF_CORNER_SHIFT,
72 da7213_voice_hpf_corner_txt);
ef5c2eba
AT		 73
74/* ADC and DAC high pass filter cutoff value */
75static const char * const da7213_audio_hpf_corner_txt[] = {
76 "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
77};
78
c99f8b21
TI		 79static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
80 DA7213_DAC_FILTERS1
81 , DA7213_AUDIO_HPF_CORNER_SHIFT,
82 da7213_audio_hpf_corner_txt);
ef5c2eba 83
c99f8b21
TI		 84static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
85 DA7213_ADC_FILTERS1,
86 DA7213_AUDIO_HPF_CORNER_SHIFT,
87 da7213_audio_hpf_corner_txt);
ef5c2eba
AT		 88
89/* Gain ramping rate value */
90static const char * const da7213_gain_ramp_rate_txt[] = {
91 "nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
92 "nominal rate / 32"
93};
94
c99f8b21
TI		 95static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
96 DA7213_GAIN_RAMP_CTRL,
97 DA7213_GAIN_RAMP_RATE_SHIFT,
98 da7213_gain_ramp_rate_txt);
ef5c2eba
AT		 99
100/* DAC noise gate setup time value */
101static const char * const da7213_dac_ng_setup_time_txt[] = {
102 "256 samples", "512 samples", "1024 samples", "2048 samples"
103};
104
c99f8b21
TI		 105static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
106 DA7213_DAC_NG_SETUP_TIME,
107 DA7213_DAC_NG_SETUP_TIME_SHIFT,
108 da7213_dac_ng_setup_time_txt);
ef5c2eba
AT		 109
110/* DAC noise gate rampup rate value */
111static const char * const da7213_dac_ng_rampup_txt[] = {
112 "0.02 ms/dB", "0.16 ms/dB"
113};
114
c99f8b21
TI		 115static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
116 DA7213_DAC_NG_SETUP_TIME,
117 DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
118 da7213_dac_ng_rampup_txt);
ef5c2eba
AT		 119
120/* DAC noise gate rampdown rate value */
121static const char * const da7213_dac_ng_rampdown_txt[] = {
122 "0.64 ms/dB", "20.48 ms/dB"
123};
124
c99f8b21
TI		 125static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
126 DA7213_DAC_NG_SETUP_TIME,
127 DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
128 da7213_dac_ng_rampdown_txt);
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AT		 129
130/* DAC soft mute rate value */
131static const char * const da7213_dac_soft_mute_rate_txt[] = {
132 "1", "2", "4", "8", "16", "32", "64"
133};
134
c99f8b21
TI		 135static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
136 DA7213_DAC_FILTERS5,
137 DA7213_DAC_SOFTMUTE_RATE_SHIFT,
138 da7213_dac_soft_mute_rate_txt);
ef5c2eba
AT		 139
140/* ALC Attack Rate select */
141static const char * const da7213_alc_attack_rate_txt[] = {
142 "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
143 "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
144};
145
c99f8b21
TI		 146static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
147 DA7213_ALC_CTRL2,
148 DA7213_ALC_ATTACK_SHIFT,
149 da7213_alc_attack_rate_txt);
ef5c2eba
AT		 150
151/* ALC Release Rate select */
152static const char * const da7213_alc_release_rate_txt[] = {
153 "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
154 "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
155};
156
c99f8b21
TI		 157static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
158 DA7213_ALC_CTRL2,
159 DA7213_ALC_RELEASE_SHIFT,
160 da7213_alc_release_rate_txt);
ef5c2eba
AT		 161
162/* ALC Hold Time select */
163static const char * const da7213_alc_hold_time_txt[] = {
164 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
165 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
166 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
167};
168
c99f8b21
TI		 169static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
170 DA7213_ALC_CTRL3,
171 DA7213_ALC_HOLD_SHIFT,
172 da7213_alc_hold_time_txt);
ef5c2eba
AT		 173
174/* ALC Input Signal Tracking rate select */
175static const char * const da7213_alc_integ_rate_txt[] = {
176 "1/4", "1/16", "1/256", "1/65536"
177};
178
c99f8b21
TI		 179static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
180 DA7213_ALC_CTRL3,
181 DA7213_ALC_INTEG_ATTACK_SHIFT,
182 da7213_alc_integ_rate_txt);
ef5c2eba 183
c99f8b21
TI		 184static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
185 DA7213_ALC_CTRL3,
186 DA7213_ALC_INTEG_RELEASE_SHIFT,
187 da7213_alc_integ_rate_txt);
ef5c2eba
AT		 188
189
190/*
191 * Control Functions
192 */
193
194static int da7213_get_alc_data(struct snd_soc_codec *codec, u8 reg_val)
195{
196 int mid_data, top_data;
197 int sum = 0;
198 u8 iteration;
199
200 for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
201 iteration++) {
202 /* Select the left or right channel and capture data */
203 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
204
205 /* Select middle 8 bits for read back from data register */
206 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
207 reg_val | DA7213_ALC_DATA_MIDDLE);
208 mid_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
209
210 /* Select top 8 bits for read back from data register */
211 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
212 reg_val | DA7213_ALC_DATA_TOP);
213 top_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
214
215 sum += ((mid_data << 8) | (top_data << 16));
216 }
217
218 return sum / DA7213_ALC_AVG_ITERATIONS;
219}
220
221static void da7213_alc_calib_man(struct snd_soc_codec *codec)
222{
223 u8 reg_val;
224 int avg_left_data, avg_right_data, offset_l, offset_r;
225
226 /* Calculate average for Left and Right data */
227 /* Left Data */
228 avg_left_data = da7213_get_alc_data(codec,
229 DA7213_ALC_CIC_OP_CHANNEL_LEFT);
230 /* Right Data */
231 avg_right_data = da7213_get_alc_data(codec,
232 DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
233
234 /* Calculate DC offset */
235 offset_l = -avg_left_data;
236 offset_r = -avg_right_data;
237
238 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
239 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
240 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
241 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
242
243 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
244 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
245 reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
246 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
247
248 /* Enable analog/digital gain mode & offset cancellation */
249 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
250 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
251 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
252}
253
254static void da7213_alc_calib_auto(struct snd_soc_codec *codec)
255{
256 u8 alc_ctrl1;
257
258 /* Begin auto calibration and wait for completion */
259 snd_soc_update_bits(codec, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
260 DA7213_ALC_AUTO_CALIB_EN);
261 do {
262 alc_ctrl1 = snd_soc_read(codec, DA7213_ALC_CTRL1);
263 } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
264
265 /* If auto calibration fails, fall back to digital gain only mode */
266 if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
267 dev_warn(codec->dev,
268 "ALC auto calibration failed with overflow\n");
269 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
270 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
271 0);
272 } else {
273 /* Enable analog/digital gain mode & offset cancellation */
274 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
275 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
276 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
277 }
278
279}
280
281static void da7213_alc_calib(struct snd_soc_codec *codec)
282{
283 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
284 u8 adc_l_ctrl, adc_r_ctrl;
285 u8 mixin_l_sel, mixin_r_sel;
286 u8 mic_1_ctrl, mic_2_ctrl;
287
288 /* Save current values from ADC control registers */
289 adc_l_ctrl = snd_soc_read(codec, DA7213_ADC_L_CTRL);
290 adc_r_ctrl = snd_soc_read(codec, DA7213_ADC_R_CTRL);
291
292 /* Save current values from MIXIN_L/R_SELECT registers */
293 mixin_l_sel = snd_soc_read(codec, DA7213_MIXIN_L_SELECT);
294 mixin_r_sel = snd_soc_read(codec, DA7213_MIXIN_R_SELECT);
295
296 /* Save current values from MIC control registers */
297 mic_1_ctrl = snd_soc_read(codec, DA7213_MIC_1_CTRL);
298 mic_2_ctrl = snd_soc_read(codec, DA7213_MIC_2_CTRL);
299
300 /* Enable ADC Left and Right */
301 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
302 DA7213_ADC_EN);
303 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
304 DA7213_ADC_EN);
305
306 /* Enable MIC paths */
307 snd_soc_update_bits(codec, DA7213_MIXIN_L_SELECT,
308 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
309 DA7213_MIXIN_L_MIX_SELECT_MIC_2,
310 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
311 DA7213_MIXIN_L_MIX_SELECT_MIC_2);
312 snd_soc_update_bits(codec, DA7213_MIXIN_R_SELECT,
313 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
314 DA7213_MIXIN_R_MIX_SELECT_MIC_1,
315 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
316 DA7213_MIXIN_R_MIX_SELECT_MIC_1);
317
318 /* Mute MIC PGAs */
319 snd_soc_update_bits(codec, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
320 DA7213_MUTE_EN);
321 snd_soc_update_bits(codec, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
322 DA7213_MUTE_EN);
323
324 /* Perform calibration */
325 if (da7213->alc_calib_auto)
326 da7213_alc_calib_auto(codec);
327 else
328 da7213_alc_calib_man(codec);
329
330 /* Restore MIXIN_L/R_SELECT registers to their original states */
331 snd_soc_write(codec, DA7213_MIXIN_L_SELECT, mixin_l_sel);
332 snd_soc_write(codec, DA7213_MIXIN_R_SELECT, mixin_r_sel);
333
334 /* Restore ADC control registers to their original states */
335 snd_soc_write(codec, DA7213_ADC_L_CTRL, adc_l_ctrl);
336 snd_soc_write(codec, DA7213_ADC_R_CTRL, adc_r_ctrl);
337
338 /* Restore original values of MIC control registers */
339 snd_soc_write(codec, DA7213_MIC_1_CTRL, mic_1_ctrl);
340 snd_soc_write(codec, DA7213_MIC_2_CTRL, mic_2_ctrl);
341}
342
343static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
344 struct snd_ctl_elem_value *ucontrol)
345{
ea53bf77 346 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 347 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
348 int ret;
349
350 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
351
352 /* If ALC in operation, make sure calibrated offsets are updated */
353 if ((!ret) && (da7213->alc_en))
354 da7213_alc_calib(codec);
355
356 return ret;
357}
358
359static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
ea53bf77 362 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 363 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
364
365 /* Force ALC offset calibration if enabling ALC */
366 if (ucontrol->value.integer.value[0] ||
367 ucontrol->value.integer.value[1]) {
368 if (!da7213->alc_en) {
369 da7213_alc_calib(codec);
370 da7213->alc_en = true;
371 }
372 } else {
373 da7213->alc_en = false;
374 }
375
376 return snd_soc_put_volsw(kcontrol, ucontrol);
377}
378
379
380/*
381 * KControls
382 */
383
384static const struct snd_kcontrol_new da7213_snd_controls[] = {
385
386 /* Volume controls */
387 SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
388 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
389 DA7213_NO_INVERT, mic_vol_tlv),
390 SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
391 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
392 DA7213_NO_INVERT, mic_vol_tlv),
393 SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
394 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
395 DA7213_NO_INVERT, aux_vol_tlv),
396 SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
397 DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
398 DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
399 snd_soc_get_volsw_2r, da7213_put_mixin_gain,
400 mixin_gain_tlv),
401 SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
402 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
403 DA7213_NO_INVERT, digital_gain_tlv),
404 SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
405 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
406 DA7213_NO_INVERT, digital_gain_tlv),
407 SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
408 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
409 DA7213_NO_INVERT, hp_vol_tlv),
410 SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
411 DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
412 DA7213_NO_INVERT, lineout_vol_tlv),
413
414 /* DAC Equalizer controls */
415 SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
416 DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
417 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
418 DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
419 DA7213_NO_INVERT, eq_gain_tlv),
420 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
421 DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
422 DA7213_NO_INVERT, eq_gain_tlv),
423 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
424 DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
425 DA7213_NO_INVERT, eq_gain_tlv),
426 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
427 DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
428 DA7213_NO_INVERT, eq_gain_tlv),
429 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
430 DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
431 DA7213_NO_INVERT, eq_gain_tlv),
432
433 /* High Pass Filter and Voice Mode controls */
434 SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
435 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
436 SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
437 SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
438 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
439 DA7213_NO_INVERT),
440 SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
441
442 SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
443 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
444 SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
445 SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
446 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
447 DA7213_NO_INVERT),
448 SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
449
450 /* Mute controls */
451 SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
452 DA7213_MUTE_EN_MAX, DA7213_INVERT),
453 SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
454 DA7213_MUTE_EN_MAX, DA7213_INVERT),
455 SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
456 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
457 SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
458 DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
459 DA7213_MUTE_EN_MAX, DA7213_INVERT),
460 SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
461 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
462 SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
463 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
464 SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
465 DA7213_MUTE_EN_MAX, DA7213_INVERT),
466 SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
467 DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
468 DA7213_NO_INVERT),
469 SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
470
471 /* Zero Cross controls */
472 SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
473 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
474 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
475 DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
476 DA7213_NO_INVERT),
477 SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
478 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
479
480 /* Gain Ramping controls */
481 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
482 DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
483 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
484 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
485 DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
486 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
487 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
488 DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
489 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
490 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
491 DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
492 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
493 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
494 DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
495 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
496 SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
497 DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
498 DA7213_NO_INVERT),
499 SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
500
501 /* DAC Noise Gate controls */
502 SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
503 DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
504 SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
505 SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
506 SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
507 SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
508 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
509 DA7213_NO_INVERT),
510 SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
511 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
512 DA7213_NO_INVERT),
513
514 /* DAC Routing & Inversion */
515 SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
516 DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
517 DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
518 SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
519 DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
520 DA7213_NO_INVERT),
521
522 /* DMIC controls */
523 SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
524 DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
525 DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
526
527 /* ALC Controls */
528 SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
529 DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
530 DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
531 SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
532 SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
533 SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
534 /*
535 * Rate at which input signal envelope is tracked as the signal gets
536 * larger
537 */
538 SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
539 /*
540 * Rate at which input signal envelope is tracked as the signal gets
541 * smaller
542 */
543 SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
544 SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
545 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
546 DA7213_INVERT, alc_threshold_tlv),
547 SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
548 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
549 DA7213_INVERT, alc_threshold_tlv),
550 SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
551 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
552 DA7213_INVERT, alc_threshold_tlv),
553 SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
554 DA7213_ALC_ATTEN_MAX_SHIFT,
555 DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
556 alc_gain_tlv),
557 SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
558 DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
559 DA7213_NO_INVERT, alc_gain_tlv),
560 SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
561 DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
562 DA7213_NO_INVERT, alc_analog_gain_tlv),
563 SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
564 DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
565 DA7213_NO_INVERT, alc_analog_gain_tlv),
566 SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
567 DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
568 DA7213_NO_INVERT),
569 SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
570 DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
571 DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
572};
573
574
575/*
576 * DAPM
577 */
578
579/*
580 * Enums
581 */
582
583/* MIC PGA source select */
584static const char * const da7213_mic_amp_in_sel_txt[] = {
585 "Differential", "MIC_P", "MIC_N"
586};
587
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TI		 588static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
589 DA7213_MIC_1_CTRL,
590 DA7213_MIC_AMP_IN_SEL_SHIFT,
591 da7213_mic_amp_in_sel_txt);
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AT		 592static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
593 SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
594
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TI		 595static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
596 DA7213_MIC_2_CTRL,
597 DA7213_MIC_AMP_IN_SEL_SHIFT,
598 da7213_mic_amp_in_sel_txt);
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AT		 599static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
600 SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
601
602/* DAI routing select */
603static const char * const da7213_dai_src_txt[] = {
604 "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
605};
606
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TI		 607static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
608 DA7213_DIG_ROUTING_DAI,
609 DA7213_DAI_L_SRC_SHIFT,
610 da7213_dai_src_txt);
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AT		 611static const struct snd_kcontrol_new da7213_dai_l_src_mux =
612 SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
613
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TI		 614static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
615 DA7213_DIG_ROUTING_DAI,
616 DA7213_DAI_R_SRC_SHIFT,
617 da7213_dai_src_txt);
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AT		 618static const struct snd_kcontrol_new da7213_dai_r_src_mux =
619 SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
620
621/* DAC routing select */
622static const char * const da7213_dac_src_txt[] = {
623 "ADC Output Left", "ADC Output Right", "DAI Input Left",
624 "DAI Input Right"
625};
626
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TI		 627static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
628 DA7213_DIG_ROUTING_DAC,
629 DA7213_DAC_L_SRC_SHIFT,
630 da7213_dac_src_txt);
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AT		 631static const struct snd_kcontrol_new da7213_dac_l_src_mux =
632 SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
633
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TI		 634static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
635 DA7213_DIG_ROUTING_DAC,
636 DA7213_DAC_R_SRC_SHIFT,
637 da7213_dac_src_txt);
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AT		 638static const struct snd_kcontrol_new da7213_dac_r_src_mux =
639 SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
640
641/*
642 * Mixer Controls
643 */
644
645/* Mixin Left */
646static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
647 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
648 DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
649 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
650 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
651 DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
652 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
653 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
654 DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
655 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
656 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
657 DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
658 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
659};
660
661/* Mixin Right */
662static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
663 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
664 DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
665 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
666 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
667 DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
668 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
669 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
670 DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
671 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
672 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
673 DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
674 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
675};
676
677/* Mixout Left */
678static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
679 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
680 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
681 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
682 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
683 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
684 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
685 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
686 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
687 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
688 SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
689 DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
690 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
691 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
692 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
693 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
694 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
695 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
696 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
697 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
698 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
699 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
700};
701
702/* Mixout Right */
703static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
704 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
705 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
706 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
707 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
708 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
709 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
710 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
711 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
712 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
713 SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
714 DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
715 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
716 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
717 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
718 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
719 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
720 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
721 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
722 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
723 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
724 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
725};
726
727
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AT		 728/*
729 * DAPM Events
730 */
731
732static int da7213_dai_event(struct snd_soc_dapm_widget *w,
733 struct snd_kcontrol *kcontrol, int event)
734{
735 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
736 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
d575b0b0
AT		 737 u8 pll_ctrl, pll_status;
738 int i = 0;
739 bool srm_lock = false;
a0d5caea
AT		 740
741 switch (event) {
742 case SND_SOC_DAPM_PRE_PMU:
743 /* Enable DAI clks for master mode */
744 if (da7213->master)
745 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
746 DA7213_DAI_CLK_EN_MASK,
747 DA7213_DAI_CLK_EN_MASK);
d575b0b0 748
7e28fd46
AT		 749 /* PC synchronised to DAI */
750 snd_soc_update_bits(codec, DA7213_PC_COUNT,
751 DA7213_PC_FREERUN_MASK, 0);
752
d575b0b0
AT		 753 /* Slave mode, if SRM not enabled no need for status checks */
754 pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
755 if (!(pll_ctrl & DA7213_PLL_SRM_EN))
756 return 0;
757
758 /* Check SRM has locked */
759 do {
760 pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
761 if (pll_status & DA7219_PLL_SRM_LOCK) {
762 srm_lock = true;
763 } else {
764 ++i;
765 msleep(50);
766 }
767 } while ((i < DA7213_SRM_CHECK_RETRIES) & (!srm_lock));
768
769 if (!srm_lock)
770 dev_warn(codec->dev, "SRM failed to lock\n");
771
a0d5caea
AT		 772 return 0;
773 case SND_SOC_DAPM_POST_PMD:
7e28fd46
AT		 774 /* PC free-running */
775 snd_soc_update_bits(codec, DA7213_PC_COUNT,
776 DA7213_PC_FREERUN_MASK,
777 DA7213_PC_FREERUN_MASK);
778
a0d5caea
AT		 779 /* Disable DAI clks if in master mode */
780 if (da7213->master)
781 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
782 DA7213_DAI_CLK_EN_MASK, 0);
783 return 0;
784 default:
785 return -EINVAL;
786 }
787}
788
789
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AT		 790/*
791 * DAPM widgets
792 */
793
794static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
795 /*
796 * Input & Output
797 */
798
799 /* Use a supply here as this controls both input & output DAIs */
800 SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
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AT		 801 DA7213_NO_INVERT, da7213_dai_event,
802 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
ef5c2eba
AT		 803
804 /*
805 * Input
806 */
807
808 /* Input Lines */
809 SND_SOC_DAPM_INPUT("MIC1"),
810 SND_SOC_DAPM_INPUT("MIC2"),
811 SND_SOC_DAPM_INPUT("AUXL"),
812 SND_SOC_DAPM_INPUT("AUXR"),
813
814 /* MUXs for Mic PGA source selection */
815 SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
816 &da7213_mic_1_amp_in_sel_mux),
817 SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
818 &da7213_mic_2_amp_in_sel_mux),
819
820 /* Input PGAs */
821 SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
822 DA7213_NO_INVERT, NULL, 0),
823 SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
824 DA7213_NO_INVERT, NULL, 0),
825 SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
826 DA7213_NO_INVERT, NULL, 0),
827 SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
828 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
829 SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
830 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
831 SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
832 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
833
834 /* Mic Biases */
835 SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
836 DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
837 NULL, 0),
838 SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
839 DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
840 NULL, 0),
841
842 /* Input Mixers */
843 SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
844 &da7213_dapm_mixinl_controls[0],
845 ARRAY_SIZE(da7213_dapm_mixinl_controls)),
846 SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
847 &da7213_dapm_mixinr_controls[0],
848 ARRAY_SIZE(da7213_dapm_mixinr_controls)),
849
850 /* ADCs */
851 SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
852 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
853 SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
854 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
855
856 /* DAI */
857 SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
858 &da7213_dai_l_src_mux),
859 SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
860 &da7213_dai_r_src_mux),
861 SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
862 SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
863
864 /*
865 * Output
866 */
867
868 /* DAI */
869 SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
870 SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
871 SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
872 &da7213_dac_l_src_mux),
873 SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
874 &da7213_dac_r_src_mux),
875
876 /* DACs */
877 SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
878 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
879 SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
880 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
881
882 /* Output Mixers */
883 SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
884 &da7213_dapm_mixoutl_controls[0],
885 ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
886 SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
887 &da7213_dapm_mixoutr_controls[0],
888 ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
889
890 /* Output PGAs */
891 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
892 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
893 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
894 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
895 SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
896 DA7213_NO_INVERT, NULL, 0),
897 SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
898 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
899 SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
900 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
901
902 /* Charge Pump */
903 SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
904 DA7213_NO_INVERT, NULL, 0),
905
906 /* Output Lines */
907 SND_SOC_DAPM_OUTPUT("HPL"),
908 SND_SOC_DAPM_OUTPUT("HPR"),
909 SND_SOC_DAPM_OUTPUT("LINE"),
910};
911
912
913/*
914 * DAPM audio route definition
915 */
916
917static const struct snd_soc_dapm_route da7213_audio_map[] = {
918 /* Dest Connecting Widget source */
919
920 /* Input path */
921 {"MIC1", NULL, "Mic Bias 1"},
922 {"MIC2", NULL, "Mic Bias 2"},
923
924 {"Mic 1 Amp Source MUX", "Differential", "MIC1"},
925 {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
926 {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
927
928 {"Mic 2 Amp Source MUX", "Differential", "MIC2"},
929 {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
930 {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
931
932 {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
933 {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
934
935 {"Aux Left PGA", NULL, "AUXL"},
936 {"Aux Right PGA", NULL, "AUXR"},
937
938 {"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
939 {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
940 {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
941 {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
942
943 {"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
944 {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
945 {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
946 {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
947
948 {"Mixin Left PGA", NULL, "Mixin Left"},
949 {"ADC Left", NULL, "Mixin Left PGA"},
950
951 {"Mixin Right PGA", NULL, "Mixin Right"},
952 {"ADC Right", NULL, "Mixin Right PGA"},
953
954 {"DAI Left Source MUX", "ADC Left", "ADC Left"},
955 {"DAI Left Source MUX", "ADC Right", "ADC Right"},
956 {"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
957 {"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
958
959 {"DAI Right Source MUX", "ADC Left", "ADC Left"},
960 {"DAI Right Source MUX", "ADC Right", "ADC Right"},
961 {"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
962 {"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
963
964 {"DAIOUTL", NULL, "DAI Left Source MUX"},
965 {"DAIOUTR", NULL, "DAI Right Source MUX"},
966
967 {"DAIOUTL", NULL, "DAI"},
968 {"DAIOUTR", NULL, "DAI"},
969
970 /* Output path */
971 {"DAIINL", NULL, "DAI"},
972 {"DAIINR", NULL, "DAI"},
973
974 {"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
975 {"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
976 {"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
977 {"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
978
979 {"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
980 {"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
981 {"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
982 {"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
983
984 {"DAC Left", NULL, "DAC Left Source MUX"},
985 {"DAC Right", NULL, "DAC Right Source MUX"},
986
987 {"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
988 {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
989 {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
990 {"Mixout Left", "DAC Left Switch", "DAC Left"},
991 {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
992 {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
993 {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
994
995 {"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
996 {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
997 {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
998 {"Mixout Right", "DAC Right Switch", "DAC Right"},
999 {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
1000 {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
1001 {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
1002
1003 {"Mixout Left PGA", NULL, "Mixout Left"},
1004 {"Mixout Right PGA", NULL, "Mixout Right"},
1005
1006 {"Headphone Left PGA", NULL, "Mixout Left PGA"},
1007 {"Headphone Left PGA", NULL, "Charge Pump"},
1008 {"HPL", NULL, "Headphone Left PGA"},
1009
1010 {"Headphone Right PGA", NULL, "Mixout Right PGA"},
1011 {"Headphone Right PGA", NULL, "Charge Pump"},
1012 {"HPR", NULL, "Headphone Right PGA"},
1013
1014 {"Lineout PGA", NULL, "Mixout Right PGA"},
1015 {"LINE", NULL, "Lineout PGA"},
1016};
1017
c418a84a 1018static const struct reg_default da7213_reg_defaults[] = {
ef5c2eba
AT		 1019 { DA7213_DIG_ROUTING_DAI, 0x10 },
1020 { DA7213_SR, 0x0A },
1021 { DA7213_REFERENCES, 0x80 },
1022 { DA7213_PLL_FRAC_TOP, 0x00 },
1023 { DA7213_PLL_FRAC_BOT, 0x00 },
1024 { DA7213_PLL_INTEGER, 0x20 },
1025 { DA7213_PLL_CTRL, 0x0C },
1026 { DA7213_DAI_CLK_MODE, 0x01 },
1027 { DA7213_DAI_CTRL, 0x08 },
1028 { DA7213_DIG_ROUTING_DAC, 0x32 },
1029 { DA7213_AUX_L_GAIN, 0x35 },
1030 { DA7213_AUX_R_GAIN, 0x35 },
1031 { DA7213_MIXIN_L_SELECT, 0x00 },
1032 { DA7213_MIXIN_R_SELECT, 0x00 },
1033 { DA7213_MIXIN_L_GAIN, 0x03 },
1034 { DA7213_MIXIN_R_GAIN, 0x03 },
1035 { DA7213_ADC_L_GAIN, 0x6F },
1036 { DA7213_ADC_R_GAIN, 0x6F },
1037 { DA7213_ADC_FILTERS1, 0x80 },
1038 { DA7213_MIC_1_GAIN, 0x01 },
1039 { DA7213_MIC_2_GAIN, 0x01 },
1040 { DA7213_DAC_FILTERS5, 0x00 },
1041 { DA7213_DAC_FILTERS2, 0x88 },
1042 { DA7213_DAC_FILTERS3, 0x88 },
1043 { DA7213_DAC_FILTERS4, 0x08 },
1044 { DA7213_DAC_FILTERS1, 0x80 },
1045 { DA7213_DAC_L_GAIN, 0x6F },
1046 { DA7213_DAC_R_GAIN, 0x6F },
1047 { DA7213_CP_CTRL, 0x61 },
1048 { DA7213_HP_L_GAIN, 0x39 },
1049 { DA7213_HP_R_GAIN, 0x39 },
1050 { DA7213_LINE_GAIN, 0x30 },
1051 { DA7213_MIXOUT_L_SELECT, 0x00 },
1052 { DA7213_MIXOUT_R_SELECT, 0x00 },
1053 { DA7213_SYSTEM_MODES_INPUT, 0x00 },
1054 { DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
1055 { DA7213_AUX_L_CTRL, 0x44 },
1056 { DA7213_AUX_R_CTRL, 0x44 },
1057 { DA7213_MICBIAS_CTRL, 0x11 },
1058 { DA7213_MIC_1_CTRL, 0x40 },
1059 { DA7213_MIC_2_CTRL, 0x40 },
1060 { DA7213_MIXIN_L_CTRL, 0x40 },
1061 { DA7213_MIXIN_R_CTRL, 0x40 },
1062 { DA7213_ADC_L_CTRL, 0x40 },
1063 { DA7213_ADC_R_CTRL, 0x40 },
1064 { DA7213_DAC_L_CTRL, 0x48 },
1065 { DA7213_DAC_R_CTRL, 0x40 },
1066 { DA7213_HP_L_CTRL, 0x41 },
1067 { DA7213_HP_R_CTRL, 0x40 },
1068 { DA7213_LINE_CTRL, 0x40 },
1069 { DA7213_MIXOUT_L_CTRL, 0x10 },
1070 { DA7213_MIXOUT_R_CTRL, 0x10 },
1071 { DA7213_LDO_CTRL, 0x00 },
1072 { DA7213_IO_CTRL, 0x00 },
1073 { DA7213_GAIN_RAMP_CTRL, 0x00},
1074 { DA7213_MIC_CONFIG, 0x00 },
1075 { DA7213_PC_COUNT, 0x00 },
1076 { DA7213_CP_VOL_THRESHOLD1, 0x32 },
1077 { DA7213_CP_DELAY, 0x95 },
1078 { DA7213_CP_DETECTOR, 0x00 },
1079 { DA7213_DAI_OFFSET, 0x00 },
1080 { DA7213_DIG_CTRL, 0x00 },
1081 { DA7213_ALC_CTRL2, 0x00 },
1082 { DA7213_ALC_CTRL3, 0x00 },
1083 { DA7213_ALC_NOISE, 0x3F },
1084 { DA7213_ALC_TARGET_MIN, 0x3F },
1085 { DA7213_ALC_TARGET_MAX, 0x00 },
1086 { DA7213_ALC_GAIN_LIMITS, 0xFF },
1087 { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
1088 { DA7213_ALC_ANTICLIP_CTRL, 0x00 },
1089 { DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
1090 { DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
1091 { DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
1092 { DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
1093 { DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
1094 { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
1095 { DA7213_DAC_NG_SETUP_TIME, 0x00 },
1096 { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
1097 { DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
1098 { DA7213_DAC_NG_CTRL, 0x00 },
1099};
1100
1101static bool da7213_volatile_register(struct device *dev, unsigned int reg)
1102{
1103 switch (reg) {
1104 case DA7213_STATUS1:
1105 case DA7213_PLL_STATUS:
1106 case DA7213_AUX_L_GAIN_STATUS:
1107 case DA7213_AUX_R_GAIN_STATUS:
1108 case DA7213_MIC_1_GAIN_STATUS:
1109 case DA7213_MIC_2_GAIN_STATUS:
1110 case DA7213_MIXIN_L_GAIN_STATUS:
1111 case DA7213_MIXIN_R_GAIN_STATUS:
1112 case DA7213_ADC_L_GAIN_STATUS:
1113 case DA7213_ADC_R_GAIN_STATUS:
1114 case DA7213_DAC_L_GAIN_STATUS:
1115 case DA7213_DAC_R_GAIN_STATUS:
1116 case DA7213_HP_L_GAIN_STATUS:
1117 case DA7213_HP_R_GAIN_STATUS:
1118 case DA7213_LINE_GAIN_STATUS:
1119 case DA7213_ALC_CTRL1:
1120 case DA7213_ALC_OFFSET_AUTO_M_L:
1121 case DA7213_ALC_OFFSET_AUTO_U_L:
1122 case DA7213_ALC_OFFSET_AUTO_M_R:
1123 case DA7213_ALC_OFFSET_AUTO_U_R:
1124 case DA7213_ALC_CIC_OP_LVL_DATA:
1125 return 1;
1126 default:
1127 return 0;
1128 }
1129}
1130
1131static int da7213_hw_params(struct snd_pcm_substream *substream,
1132 struct snd_pcm_hw_params *params,
1133 struct snd_soc_dai *dai)
1134{
1135 struct snd_soc_codec *codec = dai->codec;
1136 u8 dai_ctrl = 0;
1137 u8 fs;
1138
1139 /* Set DAI format */
e7610743
MB		 1140 switch (params_width(params)) {
1141 case 16:
ef5c2eba
AT		 1142 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
1143 break;
e7610743 1144 case 20:
ef5c2eba
AT		 1145 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
1146 break;
e7610743 1147 case 24:
ef5c2eba
AT		 1148 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
1149 break;
e7610743 1150 case 32:
ef5c2eba
AT		 1151 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
1152 break;
1153 default:
1154 return -EINVAL;
1155 }
1156
1157 /* Set sampling rate */
1158 switch (params_rate(params)) {
1159 case 8000:
1160 fs = DA7213_SR_8000;
1161 break;
1162 case 11025:
1163 fs = DA7213_SR_11025;
1164 break;
1165 case 12000:
1166 fs = DA7213_SR_12000;
1167 break;
1168 case 16000:
1169 fs = DA7213_SR_16000;
1170 break;
1171 case 22050:
1172 fs = DA7213_SR_22050;
1173 break;
1174 case 32000:
1175 fs = DA7213_SR_32000;
1176 break;
1177 case 44100:
1178 fs = DA7213_SR_44100;
1179 break;
1180 case 48000:
1181 fs = DA7213_SR_48000;
1182 break;
1183 case 88200:
1184 fs = DA7213_SR_88200;
1185 break;
1186 case 96000:
1187 fs = DA7213_SR_96000;
1188 break;
1189 default:
1190 return -EINVAL;
1191 }
1192
1193 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
1194 dai_ctrl);
1195 snd_soc_write(codec, DA7213_SR, fs);
1196
1197 return 0;
1198}
1199
1200static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1201{
1202 struct snd_soc_codec *codec = codec_dai->codec;
1203 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1204 u8 dai_clk_mode = 0, dai_ctrl = 0;
1205
1206 /* Set master/slave mode */
1207 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1208 case SND_SOC_DAIFMT_CBM_CFM:
ef5c2eba
AT		 1209 da7213->master = true;
1210 break;
1211 case SND_SOC_DAIFMT_CBS_CFS:
ef5c2eba
AT		 1212 da7213->master = false;
1213 break;
1214 default:
1215 return -EINVAL;
1216 }
1217
1218 /* Set clock normal/inverted */
1219 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1220 case SND_SOC_DAIFMT_NB_NF:
1221 break;
1222 case SND_SOC_DAIFMT_NB_IF:
1223 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1224 break;
1225 case SND_SOC_DAIFMT_IB_NF:
1226 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1227 break;
1228 case SND_SOC_DAIFMT_IB_IF:
1229 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | DA7213_DAI_CLK_POL_INV;
1230 break;
1231 default:
1232 return -EINVAL;
1233 }
1234
1235 /* Only I2S is supported */
1236 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1237 case SND_SOC_DAIFMT_I2S:
1238 dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
1239 break;
1240 case SND_SOC_DAIFMT_LEFT_J:
1241 dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
1242 break;
1243 case SND_SOC_DAIFMT_RIGHT_J:
1244 dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
1245 break;
1246 default:
1247 return -EINVAL;
1248 }
1249
1250 /* By default only 32 BCLK per WCLK is supported */
1251 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_32;
1252
1253 snd_soc_write(codec, DA7213_DAI_CLK_MODE, dai_clk_mode);
1254 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
1255 dai_ctrl);
1256
1257 return 0;
1258}
1259
1260static int da7213_mute(struct snd_soc_dai *dai, int mute)
1261{
1262 struct snd_soc_codec *codec = dai->codec;
1263
1264 if (mute) {
1265 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1266 DA7213_MUTE_EN, DA7213_MUTE_EN);
1267 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1268 DA7213_MUTE_EN, DA7213_MUTE_EN);
1269 } else {
1270 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1271 DA7213_MUTE_EN, 0);
1272 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1273 DA7213_MUTE_EN, 0);
1274 }
1275
1276 return 0;
1277}
1278
1279#define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1280 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1281
1282static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1283 int clk_id, unsigned int freq, int dir)
1284{
1285 struct snd_soc_codec *codec = codec_dai->codec;
1286 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
6e7c4443
AT		 1287 int ret = 0;
1288
1289 if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
1290 return 0;
1291
1292 if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
1293 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1294 freq);
1295 return -EINVAL;
1296 }
ef5c2eba
AT		 1297
1298 switch (clk_id) {
1299 case DA7213_CLKSRC_MCLK:
4c75225a
AT		 1300 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1301 DA7213_PLL_MCLK_SQR_EN, 0);
6e7c4443
AT		 1302 break;
1303 case DA7213_CLKSRC_MCLK_SQR:
4c75225a
AT		 1304 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1305 DA7213_PLL_MCLK_SQR_EN,
1306 DA7213_PLL_MCLK_SQR_EN);
ef5c2eba
AT		 1307 break;
1308 default:
1309 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1310 return -EINVAL;
1311 }
6e7c4443
AT		 1312
1313 da7213->clk_src = clk_id;
1314
1315 if (da7213->mclk) {
1316 freq = clk_round_rate(da7213->mclk, freq);
1317 ret = clk_set_rate(da7213->mclk, freq);
1318 if (ret) {
1319 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1320 freq);
1321 return ret;
1322 }
1323 }
1324
1325 da7213->mclk_rate = freq;
1326
1327 return 0;
ef5c2eba
AT		 1328}
1329
4c75225a 1330/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
ef5c2eba
AT		 1331static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1332 int source, unsigned int fref, unsigned int fout)
1333{
1334 struct snd_soc_codec *codec = codec_dai->codec;
1335 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1336
1337 u8 pll_ctrl, indiv_bits, indiv;
1338 u8 pll_frac_top, pll_frac_bot, pll_integer;
1339 u32 freq_ref;
1340 u64 frac_div;
1341
ef5c2eba 1342 /* Workout input divider based on MCLK rate */
abc189ea 1343 if (da7213->mclk_rate == 32768) {
4c75225a
AT		 1344 if (!da7213->master) {
1345 dev_err(codec->dev,
1346 "32KHz only valid if codec is clock master\n");
1347 return -EINVAL;
1348 }
1349
ef5c2eba 1350 /* 32KHz PLL Mode */
1e62c52d
AT		 1351 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1352 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
4c75225a 1353 source = DA7213_SYSCLK_PLL_32KHZ;
ef5c2eba 1354 freq_ref = 3750000;
4c75225a 1355
ef5c2eba 1356 } else {
ef5c2eba 1357 if (da7213->mclk_rate < 5000000) {
4c75225a
AT		 1358 dev_err(codec->dev,
1359 "PLL input clock %d below valid range\n",
1360 da7213->mclk_rate);
1361 return -EINVAL;
1e62c52d
AT		 1362 } else if (da7213->mclk_rate <= 9000000) {
1363 indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1364 indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1365 } else if (da7213->mclk_rate <= 18000000) {
1366 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1367 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1368 } else if (da7213->mclk_rate <= 36000000) {
1369 indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1370 indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
ef5c2eba 1371 } else if (da7213->mclk_rate <= 54000000) {
1e62c52d
AT		 1372 indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1373 indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
ef5c2eba 1374 } else {
4c75225a
AT		 1375 dev_err(codec->dev,
1376 "PLL input clock %d above valid range\n",
1377 da7213->mclk_rate);
1378 return -EINVAL;
ef5c2eba
AT		 1379 }
1380 freq_ref = (da7213->mclk_rate / indiv);
1381 }
1382
4c75225a 1383 pll_ctrl = indiv_bits;
ef5c2eba 1384
4c75225a
AT		 1385 /* Configure PLL */
1386 switch (source) {
1387 case DA7213_SYSCLK_MCLK:
1388 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1389 DA7213_PLL_INDIV_MASK |
1390 DA7213_PLL_MODE_MASK, pll_ctrl);
ef5c2eba 1391 return 0;
4c75225a
AT		 1392 case DA7213_SYSCLK_PLL:
1393 break;
1394 case DA7213_SYSCLK_PLL_SRM:
1395 pll_ctrl |= DA7213_PLL_SRM_EN;
1396 fout = DA7213_PLL_FREQ_OUT_94310400;
1397 break;
1398 case DA7213_SYSCLK_PLL_32KHZ:
1399 if (da7213->mclk_rate != 32768) {
1400 dev_err(codec->dev,
1401 "32KHz mode only valid with 32KHz MCLK\n");
1402 return -EINVAL;
1403 }
ef5c2eba 1404
4c75225a 1405 pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
ef5c2eba 1406 fout = DA7213_PLL_FREQ_OUT_94310400;
4c75225a
AT		 1407 break;
1408 default:
1409 dev_err(codec->dev, "Invalid PLL config\n");
1410 return -EINVAL;
ef5c2eba
AT		 1411 }
1412
ef5c2eba
AT		 1413 /* Calculate dividers for PLL */
1414 pll_integer = fout / freq_ref;
1415 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1416 do_div(frac_div, freq_ref);
1417 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
1418 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
1419
1420 /* Write PLL dividers */
1421 snd_soc_write(codec, DA7213_PLL_FRAC_TOP, pll_frac_top);
1422 snd_soc_write(codec, DA7213_PLL_FRAC_BOT, pll_frac_bot);
1423 snd_soc_write(codec, DA7213_PLL_INTEGER, pll_integer);
1424
1425 /* Enable PLL */
1426 pll_ctrl |= DA7213_PLL_EN;
4c75225a
AT		 1427 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1428 DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
1429 pll_ctrl);
ef5c2eba
AT		 1430
1431 return 0;
ef5c2eba
AT		 1432}
1433
1434/* DAI operations */
1435static const struct snd_soc_dai_ops da7213_dai_ops = {
1436 .hw_params = da7213_hw_params,
1437 .set_fmt = da7213_set_dai_fmt,
1438 .set_sysclk = da7213_set_dai_sysclk,
1439 .set_pll = da7213_set_dai_pll,
1440 .digital_mute = da7213_mute,
1441};
1442
1443static struct snd_soc_dai_driver da7213_dai = {
1444 .name = "da7213-hifi",
1445 /* Playback Capabilities */
1446 .playback = {
1447 .stream_name = "Playback",
1448 .channels_min = 1,
1449 .channels_max = 2,
1450 .rates = SNDRV_PCM_RATE_8000_96000,
1451 .formats = DA7213_FORMATS,
1452 },
1453 /* Capture Capabilities */
1454 .capture = {
1455 .stream_name = "Capture",
1456 .channels_min = 1,
1457 .channels_max = 2,
1458 .rates = SNDRV_PCM_RATE_8000_96000,
1459 .formats = DA7213_FORMATS,
1460 },
1461 .ops = &da7213_dai_ops,
1462 .symmetric_rates = 1,
1463};
1464
1465static int da7213_set_bias_level(struct snd_soc_codec *codec,
1466 enum snd_soc_bias_level level)
1467{
6e7c4443
AT		 1468 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1469 int ret;
1470
ef5c2eba
AT		 1471 switch (level) {
1472 case SND_SOC_BIAS_ON:
ef5c2eba 1473 break;
f612680f
AT		 1474 case SND_SOC_BIAS_PREPARE:
1475 /* Enable MCLK for transition to ON state */
1476 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
6e7c4443
AT		 1477 if (da7213->mclk) {
1478 ret = clk_prepare_enable(da7213->mclk);
1479 if (ret) {
1480 dev_err(codec->dev,
1481 "Failed to enable mclk\n");
1482 return ret;
1483 }
1484 }
f612680f
AT		 1485 }
1486 break;
1487 case SND_SOC_BIAS_STANDBY:
1488 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
ef5c2eba
AT		 1489 /* Enable VMID reference & master bias */
1490 snd_soc_update_bits(codec, DA7213_REFERENCES,
1491 DA7213_VMID_EN | DA7213_BIAS_EN,
1492 DA7213_VMID_EN | DA7213_BIAS_EN);
f612680f
AT		 1493 } else {
1494 /* Remove MCLK */
1495 if (da7213->mclk)
1496 clk_disable_unprepare(da7213->mclk);
ef5c2eba
AT		 1497 }
1498 break;
1499 case SND_SOC_BIAS_OFF:
1500 /* Disable VMID reference & master bias */
1501 snd_soc_update_bits(codec, DA7213_REFERENCES,
1502 DA7213_VMID_EN | DA7213_BIAS_EN, 0);
1503 break;
1504 }
ef5c2eba
AT		 1505 return 0;
1506}
1507
e90996a3
AT		 1508/* DT */
1509static const struct of_device_id da7213_of_match[] = {
1510 { .compatible = "dlg,da7213", },
1511 { }
1512};
1513MODULE_DEVICE_TABLE(of, da7213_of_match);
1514
1515static enum da7213_micbias_voltage
1516 da7213_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
1517{
1518 switch (val) {
1519 case 1600:
1520 return DA7213_MICBIAS_1_6V;
1521 case 2200:
1522 return DA7213_MICBIAS_2_2V;
1523 case 2500:
1524 return DA7213_MICBIAS_2_5V;
1525 case 3000:
1526 return DA7213_MICBIAS_3_0V;
1527 default:
1528 dev_warn(codec->dev, "Invalid micbias level\n");
1529 return DA7213_MICBIAS_2_2V;
1530 }
1531}
1532
1533static enum da7213_dmic_data_sel
1534 da7213_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
1535{
1536 if (!strcmp(str, "lrise_rfall")) {
1537 return DA7213_DMIC_DATA_LRISE_RFALL;
1538 } else if (!strcmp(str, "lfall_rrise")) {
1539 return DA7213_DMIC_DATA_LFALL_RRISE;
1540 } else {
1541 dev_warn(codec->dev, "Invalid DMIC data select type\n");
1542 return DA7213_DMIC_DATA_LRISE_RFALL;
1543 }
1544}
1545
1546static enum da7213_dmic_samplephase
1547 da7213_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
1548{
1549 if (!strcmp(str, "on_clkedge")) {
1550 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1551 } else if (!strcmp(str, "between_clkedge")) {
1552 return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
1553 } else {
1554 dev_warn(codec->dev, "Invalid DMIC sample phase\n");
1555 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1556 }
1557}
1558
1559static enum da7213_dmic_clk_rate
1560 da7213_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
1561{
1562 switch (val) {
1563 case 1500000:
1564 return DA7213_DMIC_CLK_1_5MHZ;
1565 case 3000000:
1566 return DA7213_DMIC_CLK_3_0MHZ;
1567 default:
1568 dev_warn(codec->dev, "Invalid DMIC clock rate\n");
1569 return DA7213_DMIC_CLK_1_5MHZ;
1570 }
1571}
1572
1573static struct da7213_platform_data
1574 *da7213_of_to_pdata(struct snd_soc_codec *codec)
1575{
1576 struct device_node *np = codec->dev->of_node;
1577 struct da7213_platform_data *pdata;
1578 const char *of_str;
1579 u32 of_val32;
1580
1581 pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
1582 if (!pdata) {
1583 dev_warn(codec->dev, "Failed to allocate memory for pdata\n");
1584 return NULL;
1585 }
1586
1587 if (of_property_read_u32(np, "dlg,micbias1-lvl", &of_val32) >= 0)
1588 pdata->micbias1_lvl = da7213_of_micbias_lvl(codec, of_val32);
1589 else
1590 pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
1591
1592 if (of_property_read_u32(np, "dlg,micbias2-lvl", &of_val32) >= 0)
1593 pdata->micbias2_lvl = da7213_of_micbias_lvl(codec, of_val32);
1594 else
1595 pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
1596
1597 if (!of_property_read_string(np, "dlg,dmic-data-sel", &of_str))
1598 pdata->dmic_data_sel = da7213_of_dmic_data_sel(codec, of_str);
1599 else
1600 pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
1601
1602 if (!of_property_read_string(np, "dlg,dmic-samplephase", &of_str))
1603 pdata->dmic_samplephase =
1604 da7213_of_dmic_samplephase(codec, of_str);
1605 else
1606 pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1607
1608 if (of_property_read_u32(np, "dlg,dmic-clkrate", &of_val32) >= 0)
1609 pdata->dmic_clk_rate = da7213_of_dmic_clkrate(codec, of_val32);
1610 else
1611 pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
1612
1613 return pdata;
1614}
1615
1616
ef5c2eba
AT		 1617static int da7213_probe(struct snd_soc_codec *codec)
1618{
ef5c2eba 1619 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
ef5c2eba 1620
ef5c2eba
AT		 1621 /* Default to using ALC auto offset calibration mode. */
1622 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
1623 DA7213_ALC_CALIB_MODE_MAN, 0);
1624 da7213->alc_calib_auto = true;
1625
7e28fd46
AT		 1626 /* Default PC counter to free-running */
1627 snd_soc_update_bits(codec, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
1628 DA7213_PC_FREERUN_MASK);
1629
ef5c2eba
AT		 1630 /* Enable all Gain Ramps */
1631 snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,
1632 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1633 snd_soc_update_bits(codec, DA7213_AUX_R_CTRL,
1634 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1635 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1636 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1637 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1638 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1639 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL,
1640 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1641 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL,
1642 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1643 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1644 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1645 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1646 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1647 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1648 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1649 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1650 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1651 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1652 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1653
1654 /*
1655 * There are two separate control bits for input and output mixers as
1656 * well as headphone and line outs.
1657 * One to enable corresponding amplifier and other to enable its
1658 * output. As amplifier bits are related to power control, they are
1659 * being managed by DAPM while other (non power related) bits are
1660 * enabled here
1661 */
1662 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1663 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1664 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1665 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1666
1667 snd_soc_update_bits(codec, DA7213_MIXOUT_L_CTRL,
1668 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1669 snd_soc_update_bits(codec, DA7213_MIXOUT_R_CTRL,
1670 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1671
1672 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1673 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1674 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1675 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1676
1677 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1678 DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
1679
e90996a3
AT		 1680 /* Handle DT/Platform data */
1681 if (codec->dev->of_node)
1682 da7213->pdata = da7213_of_to_pdata(codec);
1683 else
1684 da7213->pdata = dev_get_platdata(codec->dev);
1685
ef5c2eba
AT		 1686 /* Set platform data values */
1687 if (da7213->pdata) {
e90996a3 1688 struct da7213_platform_data *pdata = da7213->pdata;
ef5c2eba
AT		 1689 u8 micbias_lvl = 0, dmic_cfg = 0;
1690
1691 /* Set Mic Bias voltages */
1692 switch (pdata->micbias1_lvl) {
1693 case DA7213_MICBIAS_1_6V:
1694 case DA7213_MICBIAS_2_2V:
1695 case DA7213_MICBIAS_2_5V:
1696 case DA7213_MICBIAS_3_0V:
1697 micbias_lvl |= (pdata->micbias1_lvl <<
1698 DA7213_MICBIAS1_LEVEL_SHIFT);
1699 break;
1700 }
1701 switch (pdata->micbias2_lvl) {
1702 case DA7213_MICBIAS_1_6V:
1703 case DA7213_MICBIAS_2_2V:
1704 case DA7213_MICBIAS_2_5V:
1705 case DA7213_MICBIAS_3_0V:
1706 micbias_lvl |= (pdata->micbias2_lvl <<
1707 DA7213_MICBIAS2_LEVEL_SHIFT);
1708 break;
1709 }
1710 snd_soc_update_bits(codec, DA7213_MICBIAS_CTRL,
1711 DA7213_MICBIAS1_LEVEL_MASK |
1712 DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
1713
1714 /* Set DMIC configuration */
1715 switch (pdata->dmic_data_sel) {
1716 case DA7213_DMIC_DATA_LFALL_RRISE:
1717 case DA7213_DMIC_DATA_LRISE_RFALL:
1718 dmic_cfg |= (pdata->dmic_data_sel <<
1719 DA7213_DMIC_DATA_SEL_SHIFT);
1720 break;
1721 }
61559af1 1722 switch (pdata->dmic_samplephase) {
ef5c2eba
AT		 1723 case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
1724 case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
61559af1 1725 dmic_cfg |= (pdata->dmic_samplephase <<
ef5c2eba
AT		 1726 DA7213_DMIC_SAMPLEPHASE_SHIFT);
1727 break;
1728 }
61559af1 1729 switch (pdata->dmic_clk_rate) {
ef5c2eba
AT		 1730 case DA7213_DMIC_CLK_3_0MHZ:
1731 case DA7213_DMIC_CLK_1_5MHZ:
61559af1 1732 dmic_cfg |= (pdata->dmic_clk_rate <<
ef5c2eba
AT		 1733 DA7213_DMIC_CLK_RATE_SHIFT);
1734 break;
1735 }
1736 snd_soc_update_bits(codec, DA7213_MIC_CONFIG,
1737 DA7213_DMIC_DATA_SEL_MASK |
1738 DA7213_DMIC_SAMPLEPHASE_MASK |
1739 DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
6e7c4443 1740 }
ef5c2eba 1741
6e7c4443
AT		 1742 /* Check if MCLK provided */
1743 da7213->mclk = devm_clk_get(codec->dev, "mclk");
1744 if (IS_ERR(da7213->mclk)) {
1745 if (PTR_ERR(da7213->mclk) != -ENOENT)
1746 return PTR_ERR(da7213->mclk);
1747 else
1748 da7213->mclk = NULL;
ef5c2eba 1749 }
e90996a3 1750
ef5c2eba
AT		 1751 return 0;
1752}
1753
1754static struct snd_soc_codec_driver soc_codec_dev_da7213 = {
1755 .probe = da7213_probe,
1756 .set_bias_level = da7213_set_bias_level,
1757
1758 .controls = da7213_snd_controls,
1759 .num_controls = ARRAY_SIZE(da7213_snd_controls),
1760
1761 .dapm_widgets = da7213_dapm_widgets,
1762 .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets),
1763 .dapm_routes = da7213_audio_map,
1764 .num_dapm_routes = ARRAY_SIZE(da7213_audio_map),
1765};
1766
1767static const struct regmap_config da7213_regmap_config = {
1768 .reg_bits = 8,
1769 .val_bits = 8,
1770
1771 .reg_defaults = da7213_reg_defaults,
1772 .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
1773 .volatile_reg = da7213_volatile_register,
1774 .cache_type = REGCACHE_RBTREE,
1775};
1776
1777static int da7213_i2c_probe(struct i2c_client *i2c,
1778 const struct i2c_device_id *id)
1779{
1780 struct da7213_priv *da7213;
ef5c2eba
AT		 1781 int ret;
1782
1783 da7213 = devm_kzalloc(&i2c->dev, sizeof(struct da7213_priv),
1784 GFP_KERNEL);
1785 if (!da7213)
1786 return -ENOMEM;
1787
ef5c2eba
AT		 1788 i2c_set_clientdata(i2c, da7213);
1789
1790 da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
1791 if (IS_ERR(da7213->regmap)) {
1792 ret = PTR_ERR(da7213->regmap);
1793 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1794 return ret;
1795 }
1796
1797 ret = snd_soc_register_codec(&i2c->dev,
1798 &soc_codec_dev_da7213, &da7213_dai, 1);
1799 if (ret < 0) {
1800 dev_err(&i2c->dev, "Failed to register da7213 codec: %d\n",
1801 ret);
1802 }
1803 return ret;
1804}
1805
1806static int da7213_remove(struct i2c_client *client)
1807{
1808 snd_soc_unregister_codec(&client->dev);
1809 return 0;
1810}
1811
1812static const struct i2c_device_id da7213_i2c_id[] = {
1813 { "da7213", 0 },
1814 { }
1815};
1816MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
1817
1818/* I2C codec control layer */
1819static struct i2c_driver da7213_i2c_driver = {
1820 .driver = {
1821 .name = "da7213",
e90996a3 1822 .of_match_table = of_match_ptr(da7213_of_match),
ef5c2eba
AT		 1823 },
1824 .probe = da7213_i2c_probe,
1825 .remove = da7213_remove,
1826 .id_table = da7213_i2c_id,
1827};
1828
1829module_i2c_driver(da7213_i2c_driver);
1830
1831MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
1832MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
1833MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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