ASoC: hdac_hdmi: create dais based on number of cvts
[deliverable/linux.git] / sound / soc / codecs / hdac_hdmi.c
CommitLineData
18382ead
SP
1/*
2 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Samreen Nilofer <samreen.nilofer@intel.com>
6 * Subhransu S. Prusty <subhransu.s.prusty@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 */
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/module.h>
23#include <linux/pm_runtime.h>
a657f1d0 24#include <linux/hdmi.h>
2428bca3 25#include <drm/drm_edid.h>
18382ead
SP
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/hdaudio_ext.h>
07f083ab 29#include <sound/hda_i915.h>
2428bca3 30#include <sound/pcm_drm_eld.h>
18382ead
SP
31#include "../../hda/local.h"
32
17a42c45
SP
33#define NAME_SIZE 32
34
b0362adb
SP
35#define AMP_OUT_MUTE 0xb080
36#define AMP_OUT_UNMUTE 0xb000
18382ead 37#define PIN_OUT (AC_PINCTL_OUT_EN)
b0362adb 38
18382ead
SP
39#define HDA_MAX_CONNECTIONS 32
40
b8a54545
SP
41#define ELD_MAX_SIZE 256
42#define ELD_FIXED_BYTES 20
43
18382ead
SP
44struct hdac_hdmi_cvt_params {
45 unsigned int channels_min;
46 unsigned int channels_max;
47 u32 rates;
48 u64 formats;
49 unsigned int maxbps;
50};
51
52struct hdac_hdmi_cvt {
15b91447 53 struct list_head head;
18382ead
SP
54 hda_nid_t nid;
55 struct hdac_hdmi_cvt_params params;
56};
57
b8a54545
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58struct hdac_hdmi_eld {
59 bool monitor_present;
60 bool eld_valid;
61 int eld_size;
62 char eld_buffer[ELD_MAX_SIZE];
63};
64
18382ead 65struct hdac_hdmi_pin {
15b91447 66 struct list_head head;
18382ead
SP
67 hda_nid_t nid;
68 int num_mux_nids;
69 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
b8a54545
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70 struct hdac_hdmi_eld eld;
71 struct hdac_ext_device *edev;
72 int repoll_count;
73 struct delayed_work work;
18382ead
SP
74};
75
76struct hdac_hdmi_dai_pin_map {
77 int dai_id;
15b91447
SP
78 struct hdac_hdmi_pin *pin;
79 struct hdac_hdmi_cvt *cvt;
18382ead
SP
80};
81
82struct hdac_hdmi_priv {
18382ead 83 struct hdac_hdmi_dai_pin_map dai_map[3];
15b91447
SP
84 struct list_head pin_list;
85 struct list_head cvt_list;
86 int num_pin;
87 int num_cvt;
18382ead
SP
88};
89
e342ac08
SP
90static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev)
91{
51b2c425 92 struct hdac_device *hdac = dev_to_hdac_dev(dev);
e342ac08 93
51b2c425 94 return to_ehdac_device(hdac);
e342ac08
SP
95}
96
2428bca3
SP
97static unsigned int sad_format(const u8 *sad)
98{
99 return ((sad[0] >> 0x3) & 0x1f);
100}
101
102static unsigned int sad_sample_bits_lpcm(const u8 *sad)
103{
104 return (sad[2] & 7);
105}
106
107static int hdac_hdmi_eld_limit_formats(struct snd_pcm_runtime *runtime,
108 void *eld)
109{
110 u64 formats = SNDRV_PCM_FMTBIT_S16;
111 int i;
112 const u8 *sad, *eld_buf = eld;
113
114 sad = drm_eld_sad(eld_buf);
115 if (!sad)
116 goto format_constraint;
117
118 for (i = drm_eld_sad_count(eld_buf); i > 0; i--, sad += 3) {
119 if (sad_format(sad) == 1) { /* AUDIO_CODING_TYPE_LPCM */
120
121 /*
122 * the controller support 20 and 24 bits in 32 bit
123 * container so we set S32
124 */
125 if (sad_sample_bits_lpcm(sad) & 0x6)
126 formats |= SNDRV_PCM_FMTBIT_S32;
127 }
128 }
129
130format_constraint:
131 return snd_pcm_hw_constraint_mask64(runtime, SNDRV_PCM_HW_PARAM_FORMAT,
132 formats);
133
134}
135
b8a54545
SP
136 /* HDMI ELD routines */
137static unsigned int hdac_hdmi_get_eld_data(struct hdac_device *codec,
138 hda_nid_t nid, int byte_index)
139{
140 unsigned int val;
141
142 val = snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_ELDD,
143 byte_index);
144
145 dev_dbg(&codec->dev, "HDMI: ELD data byte %d: 0x%x\n",
146 byte_index, val);
147
148 return val;
149}
150
151static int hdac_hdmi_get_eld_size(struct hdac_device *codec, hda_nid_t nid)
152{
153 return snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE,
154 AC_DIPSIZE_ELD_BUF);
155}
156
157/*
158 * This function queries the ELD size and ELD data and fills in the buffer
159 * passed by user
160 */
161static int hdac_hdmi_get_eld(struct hdac_device *codec, hda_nid_t nid,
162 unsigned char *buf, int *eld_size)
163{
164 int i, size, ret = 0;
165
166 /*
167 * ELD size is initialized to zero in caller function. If no errors and
168 * ELD is valid, actual eld_size is assigned.
169 */
170
171 size = hdac_hdmi_get_eld_size(codec, nid);
172 if (size < ELD_FIXED_BYTES || size > ELD_MAX_SIZE) {
173 dev_err(&codec->dev, "HDMI: invalid ELD buf size %d\n", size);
174 return -ERANGE;
175 }
176
177 /* set ELD buffer */
178 for (i = 0; i < size; i++) {
179 unsigned int val = hdac_hdmi_get_eld_data(codec, nid, i);
180 /*
181 * Graphics driver might be writing to ELD buffer right now.
182 * Just abort. The caller will repoll after a while.
183 */
184 if (!(val & AC_ELDD_ELD_VALID)) {
185 dev_err(&codec->dev,
186 "HDMI: invalid ELD data byte %d\n", i);
187 ret = -EINVAL;
188 goto error;
189 }
190 val &= AC_ELDD_ELD_DATA;
191 /*
192 * The first byte cannot be zero. This can happen on some DVI
193 * connections. Some Intel chips may also need some 250ms delay
194 * to return non-zero ELD data, even when the graphics driver
195 * correctly writes ELD content before setting ELD_valid bit.
196 */
197 if (!val && !i) {
198 dev_err(&codec->dev, "HDMI: 0 ELD data\n");
199 ret = -EINVAL;
200 goto error;
201 }
202 buf[i] = val;
203 }
204
205 *eld_size = size;
206error:
207 return ret;
208}
209
b0362adb
SP
210static int hdac_hdmi_setup_stream(struct hdac_ext_device *hdac,
211 hda_nid_t cvt_nid, hda_nid_t pin_nid,
212 u32 stream_tag, int format)
213{
214 unsigned int val;
215
216 dev_dbg(&hdac->hdac.dev, "cvt nid %d pnid %d stream %d format 0x%x\n",
217 cvt_nid, pin_nid, stream_tag, format);
218
219 val = (stream_tag << 4);
220
221 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
222 AC_VERB_SET_CHANNEL_STREAMID, val);
223 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
224 AC_VERB_SET_STREAM_FORMAT, format);
225
226 return 0;
227}
228
a657f1d0
SP
229static void
230hdac_hdmi_set_dip_index(struct hdac_ext_device *hdac, hda_nid_t pin_nid,
231 int packet_index, int byte_index)
232{
233 int val;
234
235 val = (packet_index << 5) | (byte_index & 0x1f);
236
237 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
238 AC_VERB_SET_HDMI_DIP_INDEX, val);
239}
240
241static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac,
242 hda_nid_t cvt_nid, hda_nid_t pin_nid)
243{
244 uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
245 struct hdmi_audio_infoframe frame;
246 u8 *dip = (u8 *)&frame;
247 int ret;
248 int i;
249
250 hdmi_audio_infoframe_init(&frame);
251
252 /* Default stereo for now */
253 frame.channels = 2;
254
255 /* setup channel count */
256 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
257 AC_VERB_SET_CVT_CHAN_COUNT, frame.channels - 1);
258
259 ret = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
260 if (ret < 0)
261 return ret;
262
263 /* stop infoframe transmission */
264 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
265 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
266 AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_DISABLE);
267
268
269 /* Fill infoframe. Index auto-incremented */
270 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
271 for (i = 0; i < sizeof(frame); i++)
272 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
273 AC_VERB_SET_HDMI_DIP_DATA, dip[i]);
274
275 /* Start infoframe */
276 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
277 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
278 AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_BEST);
279
280 return 0;
281}
282
b0362adb
SP
283static void hdac_hdmi_set_power_state(struct hdac_ext_device *edev,
284 struct hdac_hdmi_dai_pin_map *dai_map, unsigned int pwr_state)
285{
286 /* Power up pin widget */
15b91447
SP
287 if (!snd_hdac_check_power_state(&edev->hdac, dai_map->pin->nid,
288 pwr_state))
289 snd_hdac_codec_write(&edev->hdac, dai_map->pin->nid, 0,
b0362adb
SP
290 AC_VERB_SET_POWER_STATE, pwr_state);
291
292 /* Power up converter */
15b91447
SP
293 if (!snd_hdac_check_power_state(&edev->hdac, dai_map->cvt->nid,
294 pwr_state))
295 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
b0362adb
SP
296 AC_VERB_SET_POWER_STATE, pwr_state);
297}
298
299static int hdac_hdmi_playback_prepare(struct snd_pcm_substream *substream,
300 struct snd_soc_dai *dai)
301{
302 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
303 struct hdac_hdmi_priv *hdmi = hdac->private_data;
304 struct hdac_hdmi_dai_pin_map *dai_map;
305 struct hdac_ext_dma_params *dd;
a657f1d0 306 int ret;
b0362adb
SP
307
308 if (dai->id > 0) {
309 dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n");
310 return -ENODEV;
311 }
312
313 dai_map = &hdmi->dai_map[dai->id];
314
315 dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream);
316 dev_dbg(&hdac->hdac.dev, "stream tag from cpu dai %d format in cvt 0x%x\n",
317 dd->stream_tag, dd->format);
318
15b91447
SP
319 ret = hdac_hdmi_setup_audio_infoframe(hdac, dai_map->cvt->nid,
320 dai_map->pin->nid);
a657f1d0
SP
321 if (ret < 0)
322 return ret;
323
15b91447
SP
324 return hdac_hdmi_setup_stream(hdac, dai_map->cvt->nid,
325 dai_map->pin->nid, dd->stream_tag, dd->format);
b0362adb
SP
326}
327
328static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream,
329 struct snd_pcm_hw_params *hparams, struct snd_soc_dai *dai)
330{
331 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
332 struct hdac_ext_dma_params *dd;
333
334 if (dai->id > 0) {
335 dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n");
336 return -ENODEV;
337 }
338
339 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
8d33ab24
SM
340 if (!dd)
341 return -ENOMEM;
b0362adb
SP
342 dd->format = snd_hdac_calc_stream_format(params_rate(hparams),
343 params_channels(hparams), params_format(hparams),
344 24, 0);
345
346 snd_soc_dai_set_dma_data(dai, substream, (void *)dd);
347
348 return 0;
349}
350
351static int hdac_hdmi_playback_cleanup(struct snd_pcm_substream *substream,
352 struct snd_soc_dai *dai)
353{
354 struct hdac_ext_device *edev = snd_soc_dai_get_drvdata(dai);
355 struct hdac_ext_dma_params *dd;
356 struct hdac_hdmi_priv *hdmi = edev->private_data;
357 struct hdac_hdmi_dai_pin_map *dai_map;
358
359 dai_map = &hdmi->dai_map[dai->id];
360
15b91447 361 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
b0362adb 362 AC_VERB_SET_CHANNEL_STREAMID, 0);
15b91447 363 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
b0362adb
SP
364 AC_VERB_SET_STREAM_FORMAT, 0);
365
366 dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream);
367 snd_soc_dai_set_dma_data(dai, substream, NULL);
368
369 kfree(dd);
370
371 return 0;
372}
373
374static int hdac_hdmi_pcm_open(struct snd_pcm_substream *substream,
375 struct snd_soc_dai *dai)
376{
377 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
378 struct hdac_hdmi_priv *hdmi = hdac->private_data;
379 struct hdac_hdmi_dai_pin_map *dai_map;
2428bca3 380 int ret;
b0362adb
SP
381
382 if (dai->id > 0) {
383 dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n");
384 return -ENODEV;
385 }
386
387 dai_map = &hdmi->dai_map[dai->id];
388
b8a54545
SP
389 if ((!dai_map->pin->eld.monitor_present) ||
390 (!dai_map->pin->eld.eld_valid)) {
391
392 dev_err(&hdac->hdac.dev,
393 "Failed: montior present? %d ELD valid?: %d\n",
394 dai_map->pin->eld.monitor_present,
395 dai_map->pin->eld.eld_valid);
b0362adb 396
b0362adb
SP
397 return -ENODEV;
398 }
399
400 hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D0);
401
15b91447 402 snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0,
b0362adb
SP
403 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
404
2428bca3
SP
405 ret = hdac_hdmi_eld_limit_formats(substream->runtime,
406 dai_map->pin->eld.eld_buffer);
407 if (ret < 0)
408 return ret;
b0362adb 409
2428bca3
SP
410 return snd_pcm_hw_constraint_eld(substream->runtime,
411 dai_map->pin->eld.eld_buffer);
b0362adb
SP
412}
413
414static void hdac_hdmi_pcm_close(struct snd_pcm_substream *substream,
415 struct snd_soc_dai *dai)
416{
417 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
418 struct hdac_hdmi_priv *hdmi = hdac->private_data;
419 struct hdac_hdmi_dai_pin_map *dai_map;
420
421 dai_map = &hdmi->dai_map[dai->id];
422
423 hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D3);
424
15b91447 425 snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0,
b0362adb
SP
426 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
427}
428
18382ead
SP
429static int
430hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt)
431{
432 int err;
433
434 /* Only stereo supported as of now */
435 cvt->params.channels_min = cvt->params.channels_max = 2;
436
437 err = snd_hdac_query_supported_pcm(hdac, cvt->nid,
438 &cvt->params.rates,
439 &cvt->params.formats,
440 &cvt->params.maxbps);
441 if (err < 0)
442 dev_err(&hdac->dev,
443 "Failed to query pcm params for nid %d: %d\n",
444 cvt->nid, err);
445
446 return err;
447}
448
18382ead
SP
449static void hdac_hdmi_fill_widget_info(struct snd_soc_dapm_widget *w,
450 enum snd_soc_dapm_type id,
451 const char *wname, const char *stream)
452{
453 w->id = id;
454 w->name = wname;
455 w->sname = stream;
456 w->reg = SND_SOC_NOPM;
457 w->shift = 0;
458 w->kcontrol_news = NULL;
459 w->num_kcontrols = 0;
460 w->priv = NULL;
461}
462
463static void hdac_hdmi_fill_route(struct snd_soc_dapm_route *route,
464 const char *sink, const char *control, const char *src)
465{
466 route->sink = sink;
467 route->source = src;
468 route->control = control;
469 route->connected = NULL;
470}
471
472static void create_fill_widget_route_map(struct snd_soc_dapm_context *dapm,
473 struct hdac_hdmi_dai_pin_map *dai_map)
474{
475 struct snd_soc_dapm_route route[1];
476 struct snd_soc_dapm_widget widgets[2] = { {0} };
477
478 memset(&route, 0, sizeof(route));
479
480 hdac_hdmi_fill_widget_info(&widgets[0], snd_soc_dapm_output,
481 "hif1 Output", NULL);
482 hdac_hdmi_fill_widget_info(&widgets[1], snd_soc_dapm_aif_in,
483 "Coverter 1", "hif1");
484
485 hdac_hdmi_fill_route(&route[0], "hif1 Output", NULL, "Coverter 1");
486
487 snd_soc_dapm_new_controls(dapm, widgets, ARRAY_SIZE(widgets));
488 snd_soc_dapm_add_routes(dapm, route, ARRAY_SIZE(route));
489}
490
15b91447 491static int hdac_hdmi_init_dai_map(struct hdac_ext_device *edev)
18382ead 492{
15b91447
SP
493 struct hdac_hdmi_priv *hdmi = edev->private_data;
494 struct hdac_hdmi_dai_pin_map *dai_map = &hdmi->dai_map[0];
495 struct hdac_hdmi_cvt *cvt;
496 struct hdac_hdmi_pin *pin;
18382ead 497
15b91447
SP
498 if (list_empty(&hdmi->cvt_list) || list_empty(&hdmi->pin_list))
499 return -EINVAL;
18382ead 500
15b91447
SP
501 /*
502 * Currently on board only 1 pin and 1 converter is enabled for
503 * simplification, more will be added eventually
504 * So using fixed map for dai_id:pin:cvt
505 */
506 cvt = list_first_entry(&hdmi->cvt_list, struct hdac_hdmi_cvt, head);
507 pin = list_first_entry(&hdmi->pin_list, struct hdac_hdmi_pin, head);
508
509 dai_map->dai_id = 0;
510 dai_map->pin = pin;
18382ead 511
15b91447 512 dai_map->cvt = cvt;
18382ead
SP
513
514 /* Enable out path for this pin widget */
15b91447 515 snd_hdac_codec_write(&edev->hdac, pin->nid, 0,
18382ead
SP
516 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
517
518 /* Enable transmission */
15b91447 519 snd_hdac_codec_write(&edev->hdac, cvt->nid, 0,
18382ead
SP
520 AC_VERB_SET_DIGI_CONVERT_1, 1);
521
522 /* Category Code (CC) to zero */
15b91447 523 snd_hdac_codec_write(&edev->hdac, cvt->nid, 0,
18382ead
SP
524 AC_VERB_SET_DIGI_CONVERT_2, 0);
525
15b91447 526 snd_hdac_codec_write(&edev->hdac, pin->nid, 0,
18382ead
SP
527 AC_VERB_SET_CONNECT_SEL, 0);
528
15b91447
SP
529 return 0;
530}
531
532static int hdac_hdmi_add_cvt(struct hdac_ext_device *edev, hda_nid_t nid)
533{
534 struct hdac_hdmi_priv *hdmi = edev->private_data;
535 struct hdac_hdmi_cvt *cvt;
536
537 cvt = kzalloc(sizeof(*cvt), GFP_KERNEL);
538 if (!cvt)
539 return -ENOMEM;
540
541 cvt->nid = nid;
542
543 list_add_tail(&cvt->head, &hdmi->cvt_list);
544 hdmi->num_cvt++;
545
546 return hdac_hdmi_query_cvt_params(&edev->hdac, cvt);
547}
548
b8a54545
SP
549static void hdac_hdmi_present_sense(struct hdac_hdmi_pin *pin, int repoll)
550{
551 struct hdac_ext_device *edev = pin->edev;
552 int val;
553
554 if (!edev)
555 return;
556
557 pin->repoll_count = repoll;
558
559 pm_runtime_get_sync(&edev->hdac.dev);
560 val = snd_hdac_codec_read(&edev->hdac, pin->nid, 0,
561 AC_VERB_GET_PIN_SENSE, 0);
562
563 dev_dbg(&edev->hdac.dev, "Pin sense val %x for pin: %d\n",
564 val, pin->nid);
565
566 pin->eld.monitor_present = !!(val & AC_PINSENSE_PRESENCE);
567 pin->eld.eld_valid = !!(val & AC_PINSENSE_ELDV);
568
569 if (!pin->eld.monitor_present || !pin->eld.eld_valid) {
570
571 dev_dbg(&edev->hdac.dev, "%s: disconnect for pin %d\n",
572 __func__, pin->nid);
573 goto put_hdac_device;
574 }
575
576 if (pin->eld.monitor_present && pin->eld.eld_valid) {
577 /* TODO: use i915 component for reading ELD later */
578 if (hdac_hdmi_get_eld(&edev->hdac, pin->nid,
579 pin->eld.eld_buffer,
580 &pin->eld.eld_size) == 0) {
581
582 print_hex_dump_bytes("ELD: ", DUMP_PREFIX_OFFSET,
583 pin->eld.eld_buffer, pin->eld.eld_size);
584 } else {
585 pin->eld.monitor_present = false;
586 pin->eld.eld_valid = false;
587 }
588 }
589
590 /*
591 * Sometimes the pin_sense may present invalid monitor
592 * present and eld_valid. If ELD data is not valid, loop few
593 * more times to get correct pin sense and valid ELD.
594 */
595 if ((!pin->eld.monitor_present || !pin->eld.eld_valid) && repoll)
596 schedule_delayed_work(&pin->work, msecs_to_jiffies(300));
597
598put_hdac_device:
599 pm_runtime_put_sync(&edev->hdac.dev);
600}
601
602static void hdac_hdmi_repoll_eld(struct work_struct *work)
603{
604 struct hdac_hdmi_pin *pin =
605 container_of(to_delayed_work(work), struct hdac_hdmi_pin, work);
606
607 /* picked from legacy HDA driver */
608 if (pin->repoll_count++ > 6)
609 pin->repoll_count = 0;
610
611 hdac_hdmi_present_sense(pin, pin->repoll_count);
612}
613
15b91447
SP
614static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid)
615{
616 struct hdac_hdmi_priv *hdmi = edev->private_data;
617 struct hdac_hdmi_pin *pin;
618
619 pin = kzalloc(sizeof(*pin), GFP_KERNEL);
620 if (!pin)
621 return -ENOMEM;
622
623 pin->nid = nid;
624
625 list_add_tail(&pin->head, &hdmi->pin_list);
626 hdmi->num_pin++;
627
b8a54545
SP
628 pin->edev = edev;
629 INIT_DELAYED_WORK(&pin->work, hdac_hdmi_repoll_eld);
630
15b91447 631 return 0;
18382ead
SP
632}
633
211caab7
SP
634#define INTEL_VENDOR_NID 0x08
635#define INTEL_GET_VENDOR_VERB 0xf81
636#define INTEL_SET_VENDOR_VERB 0x781
637#define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
638#define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
639
640static void hdac_hdmi_skl_enable_all_pins(struct hdac_device *hdac)
641{
642 unsigned int vendor_param;
643
644 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
645 INTEL_GET_VENDOR_VERB, 0);
646 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
647 return;
648
649 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
650 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
651 INTEL_SET_VENDOR_VERB, vendor_param);
652 if (vendor_param == -1)
653 return;
654}
655
656static void hdac_hdmi_skl_enable_dp12(struct hdac_device *hdac)
657{
658 unsigned int vendor_param;
659
660 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
661 INTEL_GET_VENDOR_VERB, 0);
662 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
663 return;
664
665 /* enable DP1.2 mode */
666 vendor_param |= INTEL_EN_DP12;
667 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
668 INTEL_SET_VENDOR_VERB, vendor_param);
669 if (vendor_param == -1)
670 return;
671
672}
673
17a42c45
SP
674static struct snd_soc_dai_ops hdmi_dai_ops = {
675 .startup = hdac_hdmi_pcm_open,
676 .shutdown = hdac_hdmi_pcm_close,
677 .hw_params = hdac_hdmi_set_hw_params,
678 .prepare = hdac_hdmi_playback_prepare,
679 .hw_free = hdac_hdmi_playback_cleanup,
680};
681
682/*
683 * Each converter can support a stream independently. So a dai is created
684 * based on the number of converter queried.
685 */
686static int hdac_hdmi_create_dais(struct hdac_device *hdac,
687 struct snd_soc_dai_driver **dais,
688 struct hdac_hdmi_priv *hdmi, int num_dais)
689{
690 struct snd_soc_dai_driver *hdmi_dais;
691 struct hdac_hdmi_cvt *cvt;
692 char name[NAME_SIZE], dai_name[NAME_SIZE];
693 int i = 0;
694 u32 rates, bps;
695 unsigned int rate_max = 384000, rate_min = 8000;
696 u64 formats;
697 int ret;
698
699 hdmi_dais = devm_kzalloc(&hdac->dev,
700 (sizeof(*hdmi_dais) * num_dais),
701 GFP_KERNEL);
702 if (!hdmi_dais)
703 return -ENOMEM;
704
705 list_for_each_entry(cvt, &hdmi->cvt_list, head) {
706 ret = snd_hdac_query_supported_pcm(hdac, cvt->nid,
707 &rates, &formats, &bps);
708 if (ret)
709 return ret;
710
711 sprintf(dai_name, "intel-hdmi-hifi%d", i+1);
712 hdmi_dais[i].name = devm_kstrdup(&hdac->dev,
713 dai_name, GFP_KERNEL);
714
715 if (!hdmi_dais[i].name)
716 return -ENOMEM;
717
718 snprintf(name, sizeof(name), "hifi%d", i+1);
719 hdmi_dais[i].playback.stream_name =
720 devm_kstrdup(&hdac->dev, name, GFP_KERNEL);
721 if (!hdmi_dais[i].playback.stream_name)
722 return -ENOMEM;
723
724 /*
725 * Set caps based on capability queried from the converter.
726 * It will be constrained runtime based on ELD queried.
727 */
728 hdmi_dais[i].playback.formats = formats;
729 hdmi_dais[i].playback.rates = rates;
730 hdmi_dais[i].playback.rate_max = rate_max;
731 hdmi_dais[i].playback.rate_min = rate_min;
732 hdmi_dais[i].playback.channels_min = 2;
733 hdmi_dais[i].playback.channels_max = 2;
734 hdmi_dais[i].ops = &hdmi_dai_ops;
735
736 i++;
737 }
738
739 *dais = hdmi_dais;
740
741 return 0;
742}
743
18382ead
SP
744/*
745 * Parse all nodes and store the cvt/pin nids in array
746 * Add one time initialization for pin and cvt widgets
747 */
17a42c45
SP
748static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev,
749 struct snd_soc_dai_driver **dais, int *num_dais)
18382ead
SP
750{
751 hda_nid_t nid;
3c83ac23 752 int i, num_nodes;
18382ead
SP
753 struct hdac_device *hdac = &edev->hdac;
754 struct hdac_hdmi_priv *hdmi = edev->private_data;
15b91447 755 int ret;
18382ead 756
211caab7
SP
757 hdac_hdmi_skl_enable_all_pins(hdac);
758 hdac_hdmi_skl_enable_dp12(hdac);
759
3c83ac23 760 num_nodes = snd_hdac_get_sub_nodes(hdac, hdac->afg, &nid);
541140d4 761 if (!nid || num_nodes <= 0) {
18382ead
SP
762 dev_warn(&hdac->dev, "HDMI: failed to get afg sub nodes\n");
763 return -EINVAL;
764 }
765
3c83ac23 766 hdac->num_nodes = num_nodes;
18382ead
SP
767 hdac->start_nid = nid;
768
769 for (i = 0; i < hdac->num_nodes; i++, nid++) {
770 unsigned int caps;
771 unsigned int type;
772
773 caps = get_wcaps(hdac, nid);
774 type = get_wcaps_type(caps);
775
776 if (!(caps & AC_WCAP_DIGITAL))
777 continue;
778
779 switch (type) {
780
781 case AC_WID_AUD_OUT:
15b91447
SP
782 ret = hdac_hdmi_add_cvt(edev, nid);
783 if (ret < 0)
784 return ret;
18382ead
SP
785 break;
786
787 case AC_WID_PIN:
15b91447
SP
788 ret = hdac_hdmi_add_pin(edev, nid);
789 if (ret < 0)
790 return ret;
18382ead
SP
791 break;
792 }
793 }
794
795 hdac->end_nid = nid;
796
15b91447 797 if (!hdmi->num_pin || !hdmi->num_cvt)
18382ead
SP
798 return -EIO;
799
17a42c45
SP
800 ret = hdac_hdmi_create_dais(hdac, dais, hdmi, hdmi->num_cvt);
801 if (ret) {
802 dev_err(&hdac->dev, "Failed to create dais with err: %d\n",
803 ret);
804 return ret;
805 }
806
807 *num_dais = hdmi->num_cvt;
808
15b91447 809 return hdac_hdmi_init_dai_map(edev);
18382ead
SP
810}
811
b8a54545
SP
812static void hdac_hdmi_eld_notify_cb(void *aptr, int port)
813{
814 struct hdac_ext_device *edev = aptr;
815 struct hdac_hdmi_priv *hdmi = edev->private_data;
816 struct hdac_hdmi_pin *pin;
817 struct snd_soc_codec *codec = edev->scodec;
818
819 /* Don't know how this mapping is derived */
820 hda_nid_t pin_nid = port + 0x04;
821
822 dev_dbg(&edev->hdac.dev, "%s: for pin: %d\n", __func__, pin_nid);
823
824 /*
825 * skip notification during system suspend (but not in runtime PM);
826 * the state will be updated at resume. Also since the ELD and
827 * connection states are updated in anyway at the end of the resume,
828 * we can skip it when received during PM process.
829 */
830 if (snd_power_get_state(codec->component.card->snd_card) !=
831 SNDRV_CTL_POWER_D0)
832 return;
833
834 if (atomic_read(&edev->hdac.in_pm))
835 return;
836
837 list_for_each_entry(pin, &hdmi->pin_list, head) {
838 if (pin->nid == pin_nid)
839 hdac_hdmi_present_sense(pin, 1);
840 }
841}
842
843static struct i915_audio_component_audio_ops aops = {
844 .pin_eld_notify = hdac_hdmi_eld_notify_cb,
845};
846
18382ead
SP
847static int hdmi_codec_probe(struct snd_soc_codec *codec)
848{
849 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
850 struct hdac_hdmi_priv *hdmi = edev->private_data;
851 struct snd_soc_dapm_context *dapm =
852 snd_soc_component_get_dapm(&codec->component);
b8a54545
SP
853 struct hdac_hdmi_pin *pin;
854 int ret;
18382ead
SP
855
856 edev->scodec = codec;
857
858 create_fill_widget_route_map(dapm, &hdmi->dai_map[0]);
859
b8a54545
SP
860 aops.audio_ptr = edev;
861 ret = snd_hdac_i915_register_notifier(&aops);
862 if (ret < 0) {
863 dev_err(&edev->hdac.dev, "notifier register failed: err: %d\n",
864 ret);
865 return ret;
866 }
867
868 list_for_each_entry(pin, &hdmi->pin_list, head)
869 hdac_hdmi_present_sense(pin, 1);
870
18382ead
SP
871 /* Imp: Store the card pointer in hda_codec */
872 edev->card = dapm->card->snd_card;
873
e342ac08
SP
874 /*
875 * hdac_device core already sets the state to active and calls
876 * get_noresume. So enable runtime and set the device to suspend.
877 */
878 pm_runtime_enable(&edev->hdac.dev);
879 pm_runtime_put(&edev->hdac.dev);
880 pm_runtime_suspend(&edev->hdac.dev);
881
882 return 0;
883}
884
885static int hdmi_codec_remove(struct snd_soc_codec *codec)
886{
887 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
888
889 pm_runtime_disable(&edev->hdac.dev);
18382ead
SP
890 return 0;
891}
892
893static struct snd_soc_codec_driver hdmi_hda_codec = {
894 .probe = hdmi_codec_probe,
e342ac08 895 .remove = hdmi_codec_remove,
18382ead
SP
896 .idle_bias_off = true,
897};
898
18382ead
SP
899static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev)
900{
901 struct hdac_device *codec = &edev->hdac;
902 struct hdac_hdmi_priv *hdmi_priv;
17a42c45
SP
903 struct snd_soc_dai_driver *hdmi_dais = NULL;
904 int num_dais = 0;
18382ead
SP
905 int ret = 0;
906
907 hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL);
908 if (hdmi_priv == NULL)
909 return -ENOMEM;
910
911 edev->private_data = hdmi_priv;
912
913 dev_set_drvdata(&codec->dev, edev);
914
15b91447
SP
915 INIT_LIST_HEAD(&hdmi_priv->pin_list);
916 INIT_LIST_HEAD(&hdmi_priv->cvt_list);
917
17a42c45
SP
918 ret = hdac_hdmi_parse_and_map_nid(edev, &hdmi_dais, &num_dais);
919 if (ret < 0) {
920 dev_err(&codec->dev,
921 "Failed in parse and map nid with err: %d\n", ret);
18382ead 922 return ret;
17a42c45 923 }
18382ead
SP
924
925 /* ASoC specific initialization */
926 return snd_soc_register_codec(&codec->dev, &hdmi_hda_codec,
17a42c45 927 hdmi_dais, num_dais);
18382ead
SP
928}
929
930static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev)
931{
15b91447
SP
932 struct hdac_hdmi_priv *hdmi = edev->private_data;
933 struct hdac_hdmi_pin *pin, *pin_next;
934 struct hdac_hdmi_cvt *cvt, *cvt_next;
935
18382ead
SP
936 snd_soc_unregister_codec(&edev->hdac.dev);
937
15b91447
SP
938 list_for_each_entry_safe(cvt, cvt_next, &hdmi->cvt_list, head) {
939 list_del(&cvt->head);
940 kfree(cvt);
941 }
942
943 list_for_each_entry_safe(pin, pin_next, &hdmi->pin_list, head) {
944 list_del(&pin->head);
945 kfree(pin);
946 }
947
18382ead
SP
948 return 0;
949}
950
e342ac08
SP
951#ifdef CONFIG_PM
952static int hdac_hdmi_runtime_suspend(struct device *dev)
953{
954 struct hdac_ext_device *edev = to_hda_ext_device(dev);
955 struct hdac_device *hdac = &edev->hdac;
07f083ab
SP
956 struct hdac_bus *bus = hdac->bus;
957 int err;
e342ac08
SP
958
959 dev_dbg(dev, "Enter: %s\n", __func__);
960
07f083ab
SP
961 /* controller may not have been initialized for the first time */
962 if (!bus)
963 return 0;
964
e342ac08
SP
965 /* Power down afg */
966 if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3))
967 snd_hdac_codec_write(hdac, hdac->afg, 0,
968 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
969
07f083ab
SP
970 err = snd_hdac_display_power(bus, false);
971 if (err < 0) {
972 dev_err(bus->dev, "Cannot turn on display power on i915\n");
973 return err;
974 }
975
e342ac08
SP
976 return 0;
977}
978
979static int hdac_hdmi_runtime_resume(struct device *dev)
980{
981 struct hdac_ext_device *edev = to_hda_ext_device(dev);
982 struct hdac_device *hdac = &edev->hdac;
07f083ab
SP
983 struct hdac_bus *bus = hdac->bus;
984 int err;
e342ac08
SP
985
986 dev_dbg(dev, "Enter: %s\n", __func__);
987
07f083ab
SP
988 /* controller may not have been initialized for the first time */
989 if (!bus)
990 return 0;
991
992 err = snd_hdac_display_power(bus, true);
993 if (err < 0) {
994 dev_err(bus->dev, "Cannot turn on display power on i915\n");
995 return err;
996 }
997
e342ac08
SP
998 /* Power up afg */
999 if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0))
1000 snd_hdac_codec_write(hdac, hdac->afg, 0,
1001 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1002
1003 return 0;
1004}
1005#else
1006#define hdac_hdmi_runtime_suspend NULL
1007#define hdac_hdmi_runtime_resume NULL
1008#endif
1009
1010static const struct dev_pm_ops hdac_hdmi_pm = {
1011 SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)
1012};
1013
18382ead
SP
1014static const struct hda_device_id hdmi_list[] = {
1015 HDA_CODEC_EXT_ENTRY(0x80862809, 0x100000, "Skylake HDMI", 0),
1016 {}
1017};
1018
1019MODULE_DEVICE_TABLE(hdaudio, hdmi_list);
1020
1021static struct hdac_ext_driver hdmi_driver = {
1022 . hdac = {
1023 .driver = {
1024 .name = "HDMI HDA Codec",
e342ac08 1025 .pm = &hdac_hdmi_pm,
18382ead
SP
1026 },
1027 .id_table = hdmi_list,
1028 },
1029 .probe = hdac_hdmi_dev_probe,
1030 .remove = hdac_hdmi_dev_remove,
1031};
1032
1033static int __init hdmi_init(void)
1034{
1035 return snd_hda_ext_driver_register(&hdmi_driver);
1036}
1037
1038static void __exit hdmi_exit(void)
1039{
1040 snd_hda_ext_driver_unregister(&hdmi_driver);
1041}
1042
1043module_init(hdmi_init);
1044module_exit(hdmi_exit);
1045
1046MODULE_LICENSE("GPL v2");
1047MODULE_DESCRIPTION("HDMI HD codec");
1048MODULE_AUTHOR("Samreen Nilofer<samreen.nilofer@intel.com>");
1049MODULE_AUTHOR("Subhransu S. Prusty<subhransu.s.prusty@intel.com>");
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