[deliverable/linux.git] / sound / soc / codecs / jz4740.c

/*
 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/io.h>

#include <linux/delay.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>

#define JZ4740_REG_CODEC_1 0x0
#define JZ4740_REG_CODEC_2 0x1

#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
#define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
#define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
#define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
#define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
#define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
#define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
#define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
#define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
#define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
#define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
#define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
#define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
#define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
#define JZ4740_CODEC_1_SUSPEND BIT(1)
#define JZ4740_CODEC_1_RESET BIT(0)

#define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
#define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
#define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
#define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
#define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
#define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
#define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8

#define JZ4740_CODEC_2_INPUT_VOLUME_MASK		0x1f0000
#define JZ4740_CODEC_2_SAMPLE_RATE_MASK			0x000f00
#define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK		0x000030
#define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK	0x000003

#define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET		16
#define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET		 8
#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET	 4
#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET	 0

static const uint32_t jz4740_codec_regs[] = {
	0x021b2302, 0x00170803,
};

struct jz4740_codec {
	void __iomem *base;
	struct resource *mem;
};

static unsigned int jz4740_codec_read(struct snd_soc_codec *codec,
	unsigned int reg)
{
	struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
	return readl(jz4740_codec->base + (reg << 2));
}

static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
	unsigned int val)
{
	struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
	u32 *cache = codec->reg_cache;

	cache[reg] = val;
	writel(val, jz4740_codec->base + (reg << 2));

	return 0;
}

static const struct snd_kcontrol_new jz4740_codec_controls[] = {
	SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2,
			JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0),
	SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2,
			JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0),
	SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
	SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2,
			JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0),
};

static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
	SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
	SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
};

static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
	SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
	SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
};

static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
	SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
	SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),

	SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
			jz4740_codec_output_controls,
			ARRAY_SIZE(jz4740_codec_output_controls)),

	SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
			jz4740_codec_input_controls,
			ARRAY_SIZE(jz4740_codec_input_controls)),
	SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),

	SND_SOC_DAPM_OUTPUT("LOUT"),
	SND_SOC_DAPM_OUTPUT("ROUT"),

	SND_SOC_DAPM_INPUT("MIC"),
	SND_SOC_DAPM_INPUT("LIN"),
	SND_SOC_DAPM_INPUT("RIN"),
};

static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
	{"Line Input", NULL, "LIN"},
	{"Line Input", NULL, "RIN"},

	{"Input Mixer", "Line Capture Switch", "Line Input"},
	{"Input Mixer", "Mic Capture Switch", "MIC"},

	{"ADC", NULL, "Input Mixer"},

	{"Output Mixer", "Bypass Switch", "Input Mixer"},
	{"Output Mixer", "DAC Switch", "DAC"},

	{"LOUT", NULL, "Output Mixer"},
	{"ROUT", NULL, "Output Mixer"},
};

static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
	uint32_t val;
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec =rtd->codec;

	switch (params_rate(params)) {
	case 8000:
		val = 0;
		break;
	case 11025:
		val = 1;
		break;
	case 12000:
		val = 2;
		break;
	case 16000:
		val = 3;
		break;
	case 22050:
		val = 4;
		break;
	case 24000:
		val = 5;
		break;
	case 32000:
		val = 6;
		break;
	case 44100:
		val = 7;
		break;
	case 48000:
		val = 8;
		break;
	default:
		return -EINVAL;
	}

	val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;

	snd_soc_update_bits(codec, JZ4740_REG_CODEC_2,
				JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);

	return 0;
}

static const struct snd_soc_dai_ops jz4740_codec_dai_ops = {
	.hw_params = jz4740_codec_hw_params,
};

static struct snd_soc_dai_driver jz4740_codec_dai = {
	.name = "jz4740-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
	},
	.capture = {
		.stream_name = "Capture",
		.channels_min = 2,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
	},
	.ops = &jz4740_codec_dai_ops,
	.symmetric_rates = 1,
};

static void jz4740_codec_wakeup(struct snd_soc_codec *codec)
{
	int i;
	uint32_t *cache = codec->reg_cache;

	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
		JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
	udelay(2);

	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
		JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);

	for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i)
		jz4740_codec_write(codec, i, cache[i]);
}

static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
	enum snd_soc_bias_level level)
{
	unsigned int mask;
	unsigned int value;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;
	case SND_SOC_BIAS_PREPARE:
		mask = JZ4740_CODEC_1_VREF_DISABLE |
				JZ4740_CODEC_1_VREF_AMP_DISABLE |
				JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
		value = 0;

		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
		break;
	case SND_SOC_BIAS_STANDBY:
		/* The only way to clear the suspend flag is to reset the codec */
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
			jz4740_codec_wakeup(codec);

		mask = JZ4740_CODEC_1_VREF_DISABLE |
			JZ4740_CODEC_1_VREF_AMP_DISABLE |
			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
		value = JZ4740_CODEC_1_VREF_DISABLE |
			JZ4740_CODEC_1_VREF_AMP_DISABLE |
			JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;

		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
		break;
	case SND_SOC_BIAS_OFF:
		mask = JZ4740_CODEC_1_SUSPEND;
		value = JZ4740_CODEC_1_SUSPEND;

		snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
		break;
	default:
		break;
	}

	codec->dapm.bias_level = level;

	return 0;
}

static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
{
	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
			JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);

	jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	return 0;
}

static int jz4740_codec_dev_remove(struct snd_soc_codec *codec)
{
	jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);

	return 0;
}

#ifdef CONFIG_PM_SLEEP

static int jz4740_codec_suspend(struct snd_soc_codec *codec)
{
	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
}

static int jz4740_codec_resume(struct snd_soc_codec *codec)
{
	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
}

#else
#define jz4740_codec_suspend NULL
#define jz4740_codec_resume NULL
#endif

static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
	.probe = jz4740_codec_dev_probe,
	.remove = jz4740_codec_dev_remove,
	.suspend = jz4740_codec_suspend,
	.resume = jz4740_codec_resume,
	.read = jz4740_codec_read,
	.write = jz4740_codec_write,
	.set_bias_level = jz4740_codec_set_bias_level,
	.reg_cache_default	= jz4740_codec_regs,
	.reg_word_size = sizeof(u32),
	.reg_cache_size	= 2,

	.controls = jz4740_codec_controls,
	.num_controls = ARRAY_SIZE(jz4740_codec_controls),
	.dapm_widgets = jz4740_codec_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(jz4740_codec_dapm_widgets),
	.dapm_routes = jz4740_codec_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
};

static int __devinit jz4740_codec_probe(struct platform_device *pdev)
{
	int ret;
	struct jz4740_codec *jz4740_codec;
	struct resource *mem;

	jz4740_codec = kzalloc(sizeof(*jz4740_codec), GFP_KERNEL);
	if (!jz4740_codec)
		return -ENOMEM;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!mem) {
		dev_err(&pdev->dev, "Failed to get mmio memory resource\n");
		ret = -ENOENT;
		goto err_free_codec;
	}

	mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
	if (!mem) {
		dev_err(&pdev->dev, "Failed to request mmio memory region\n");
		ret = -EBUSY;
		goto err_free_codec;
	}

	jz4740_codec->base = ioremap(mem->start, resource_size(mem));
	if (!jz4740_codec->base) {
		dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
		ret = -EBUSY;
		goto err_release_mem_region;
	}
	jz4740_codec->mem = mem;

	platform_set_drvdata(pdev, jz4740_codec);

	ret = snd_soc_register_codec(&pdev->dev,
			&soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
	if (ret) {
		dev_err(&pdev->dev, "Failed to register codec\n");
		goto err_iounmap;
	}

	return 0;

err_iounmap:
	iounmap(jz4740_codec->base);
err_release_mem_region:
	release_mem_region(mem->start, resource_size(mem));
err_free_codec:
	kfree(jz4740_codec);

	return ret;
}

static int __devexit jz4740_codec_remove(struct platform_device *pdev)
{
	struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev);
	struct resource *mem = jz4740_codec->mem;

	snd_soc_unregister_codec(&pdev->dev);

	iounmap(jz4740_codec->base);
	release_mem_region(mem->start, resource_size(mem));

	platform_set_drvdata(pdev, NULL);
	kfree(jz4740_codec);

	return 0;
}

static struct platform_driver jz4740_codec_driver = {
	.probe = jz4740_codec_probe,
	.remove = __devexit_p(jz4740_codec_remove),
	.driver = {
		.name = "jz4740-codec",
		.owner = THIS_MODULE,
	},
};

module_platform_driver(jz4740_codec_driver);

MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:jz4740-codec");
Commit	Line	Data
3b097d64 LPC	1	/*
	2	* Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* You should have received a copy of the GNU General Public License along
	9	* with this program; if not, write to the Free Software Foundation, Inc.,
	10	* 675 Mass Ave, Cambridge, MA 02139, USA.
	11	*
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/slab.h>
68bfcafa	18	#include <linux/io.h>
3b097d64 LPC	19
	20	#include <linux/delay.h>
	21
	22	#include <sound/core.h>
	23	#include <sound/pcm.h>
	24	#include <sound/pcm_params.h>
	25	#include <sound/initval.h>
3b097d64 LPC	26	#include <sound/soc.h>
	27
	28	#define JZ4740_REG_CODEC_1 0x0
	29	#define JZ4740_REG_CODEC_2 0x1
	30
	31	#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
	32	#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
	33	#define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
	34	#define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
	35	#define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
	36	#define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
	37	#define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
	38	#define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
	39	#define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
	40	#define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
	41	#define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
	42	#define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
	43	#define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
	44	#define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
	45	#define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) \| BIT(10))
	46	#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
	47	#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
	48	#define JZ4740_CODEC_1_SUSPEND BIT(1)
	49	#define JZ4740_CODEC_1_RESET BIT(0)
	50
	51	#define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
	52	#define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
	53	#define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
	54	#define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
	55	#define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
	56	#define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
	57	#define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
	58	#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
	59
	60	#define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000
	61	#define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00
	62	#define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030
	63	#define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003
	64
	65	#define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16
	66	#define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8
	67	#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
	68	#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
	69
	70	static const uint32_t jz4740_codec_regs[] = {
	71	0x021b2302, 0x00170803,
	72	};
	73
	74	struct jz4740_codec {
	75	void __iomem *base;
	76	struct resource *mem;
3b097d64 LPC	77	};
3b097d64 LPC	78
3b097d64 LPC	79	static unsigned int jz4740_codec_read(struct snd_soc_codec *codec,
	80	unsigned int reg)
	81	{
f0fba2ad	82	struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
3b097d64 LPC	83	return readl(jz4740_codec->base + (reg << 2));
	84	}
	85
	86	static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
	87	unsigned int val)
	88	{
f0fba2ad LG	89	struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
f0fba2ad LG	90	u32 *cache = codec->reg_cache;
3b097d64	91
f0fba2ad	92	cache[reg] = val;
3b097d64 LPC	93	writel(val, jz4740_codec->base + (reg << 2));
	94
	95	return 0;
	96	}
	97
	98	static const struct snd_kcontrol_new jz4740_codec_controls[] = {
	99	SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2,
	100	JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0),
	101	SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2,
	102	JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0),
	103	SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
	104	JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
	105	SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2,
	106	JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0),
	107	};
	108
	109	static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
	110	SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
	111	JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
	112	SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
	113	JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
	114	};
	115
	116	static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
	117	SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
	118	JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
	119	SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
	120	JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
	121	};
	122
	123	static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
	124	SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
	125	JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
	126	SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
	127	JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
	128
	129	SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
	130	JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
	131	jz4740_codec_output_controls,
	132	ARRAY_SIZE(jz4740_codec_output_controls)),
	133
	134	SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
	135	jz4740_codec_input_controls,
	136	ARRAY_SIZE(jz4740_codec_input_controls)),
	137	SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
	138
	139	SND_SOC_DAPM_OUTPUT("LOUT"),
	140	SND_SOC_DAPM_OUTPUT("ROUT"),
	141
	142	SND_SOC_DAPM_INPUT("MIC"),
	143	SND_SOC_DAPM_INPUT("LIN"),
	144	SND_SOC_DAPM_INPUT("RIN"),
	145	};
	146
	147	static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
	148	{"Line Input", NULL, "LIN"},
	149	{"Line Input", NULL, "RIN"},
	150
	151	{"Input Mixer", "Line Capture Switch", "Line Input"},
	152	{"Input Mixer", "Mic Capture Switch", "MIC"},
	153
	154	{"ADC", NULL, "Input Mixer"},
	155
	156	{"Output Mixer", "Bypass Switch", "Input Mixer"},
157	{"Output Mixer", "DAC Switch", "DAC"},
158
159	{"LOUT", NULL, "Output Mixer"},
160	{"ROUT", NULL, "Output Mixer"},
161	};
162
163	static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
164	struct snd_pcm_hw_params params, struct snd_soc_dai dai)
165	{
166	uint32_t val;
167	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	168	struct snd_soc_codec *codec =rtd->codec;
3b097d64 LPC	169
	170	switch (params_rate(params)) {
	171	case 8000:
	172	val = 0;
	173	break;
	174	case 11025:
	175	val = 1;
	176	break;
	177	case 12000:
	178	val = 2;
	179	break;
	180	case 16000:
	181	val = 3;
	182	break;
	183	case 22050:
	184	val = 4;
	185	break;
	186	case 24000:
	187	val = 5;
	188	break;
	189	case 32000:
	190	val = 6;
	191	break;
	192	case 44100:
	193	val = 7;
	194	break;
	195	case 48000:
	196	val = 8;
	197	break;
	198	default:
	199	return -EINVAL;
	200	}
	201
	202	val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
	203
	204	snd_soc_update_bits(codec, JZ4740_REG_CODEC_2,
	205	JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
	206
	207	return 0;
	208	}
	209
85e7652d	210	static const struct snd_soc_dai_ops jz4740_codec_dai_ops = {
3b097d64 LPC	211	.hw_params = jz4740_codec_hw_params,
	212	};
	213
f0fba2ad LG	214	static struct snd_soc_dai_driver jz4740_codec_dai = {
f0fba2ad LG	215	.name = "jz4740-hifi",
3b097d64 LPC	216	.playback = {
	217	.stream_name = "Playback",
	218	.channels_min = 2,
	219	.channels_max = 2,
	220	.rates = SNDRV_PCM_RATE_8000_48000,
	221	.formats = SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S8,
	222	},
	223	.capture = {
	224	.stream_name = "Capture",
	225	.channels_min = 2,
	226	.channels_max = 2,
	227	.rates = SNDRV_PCM_RATE_8000_48000,
	228	.formats = SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S8,
	229	},
	230	.ops = &jz4740_codec_dai_ops,
	231	.symmetric_rates = 1,
	232	};
3b097d64 LPC	233
	234	static void jz4740_codec_wakeup(struct snd_soc_codec *codec)
	235	{
	236	int i;
	237	uint32_t *cache = codec->reg_cache;
	238
	239	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
	240	JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
	241	udelay(2);
	242
	243	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
	244	JZ4740_CODEC_1_SUSPEND \| JZ4740_CODEC_1_RESET, 0);
	245
	246	for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i)
	247	jz4740_codec_write(codec, i, cache[i]);
	248	}
	249
	250	static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
	251	enum snd_soc_bias_level level)
	252	{
	253	unsigned int mask;
	254	unsigned int value;
	255
	256	switch (level) {
	257	case SND_SOC_BIAS_ON:
	258	break;
	259	case SND_SOC_BIAS_PREPARE:
	260	mask = JZ4740_CODEC_1_VREF_DISABLE \|
	261	JZ4740_CODEC_1_VREF_AMP_DISABLE \|
	262	JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
	263	value = 0;
	264
	265	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
	266	break;
	267	case SND_SOC_BIAS_STANDBY:
	268	/* The only way to clear the suspend flag is to reset the codec */
ce6120cc	269	if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
3b097d64 LPC	270	jz4740_codec_wakeup(codec);
	271
	272	mask = JZ4740_CODEC_1_VREF_DISABLE \|
	273	JZ4740_CODEC_1_VREF_AMP_DISABLE \|
	274	JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
	275	value = JZ4740_CODEC_1_VREF_DISABLE \|
	276	JZ4740_CODEC_1_VREF_AMP_DISABLE \|
	277	JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
	278
	279	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
	280	break;
	281	case SND_SOC_BIAS_OFF:
	282	mask = JZ4740_CODEC_1_SUSPEND;
	283	value = JZ4740_CODEC_1_SUSPEND;
	284
	285	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
	286	break;
	287	default:
	288	break;
	289	}
	290
ce6120cc	291	codec->dapm.bias_level = level;
3b097d64 LPC	292
	293	return 0;
	294	}
	295
f0fba2ad	296	static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
3b097d64	297	{
f0fba2ad LG	298	snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
f0fba2ad LG	299	JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
3b097d64	300
f0fba2ad LG	301	jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f0fba2ad LG	302
3b097d64 LPC	303	return 0;
	304	}
	305
f0fba2ad	306	static int jz4740_codec_dev_remove(struct snd_soc_codec *codec)
3b097d64	307	{
f0fba2ad	308	jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
3b097d64 LPC	309
	310	return 0;
	311	}
	312
	313	#ifdef CONFIG_PM_SLEEP
	314
84b315ee	315	static int jz4740_codec_suspend(struct snd_soc_codec *codec)
3b097d64	316	{
3b097d64 LPC	317	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
	318	}
	319
f0fba2ad	320	static int jz4740_codec_resume(struct snd_soc_codec *codec)
3b097d64	321	{
3b097d64 LPC	322	return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	323	}
	324
	325	#else
	326	#define jz4740_codec_suspend NULL
	327	#define jz4740_codec_resume NULL
	328	#endif
	329
f0fba2ad	330	static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
3b097d64 LPC	331	.probe = jz4740_codec_dev_probe,
	332	.remove = jz4740_codec_dev_remove,
	333	.suspend = jz4740_codec_suspend,
	334	.resume = jz4740_codec_resume,
f0fba2ad LG	335	.read = jz4740_codec_read,
	336	.write = jz4740_codec_write,
	337	.set_bias_level = jz4740_codec_set_bias_level,
	338	.reg_cache_default = jz4740_codec_regs,
	339	.reg_word_size = sizeof(u32),
	340	.reg_cache_size = 2,
67447912 LPC	341
	342	.controls = jz4740_codec_controls,
	343	.num_controls = ARRAY_SIZE(jz4740_codec_controls),
	344	.dapm_widgets = jz4740_codec_dapm_widgets,
	345	.num_dapm_widgets = ARRAY_SIZE(jz4740_codec_dapm_widgets),
	346	.dapm_routes = jz4740_codec_dapm_routes,
	347	.num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
3b097d64	348	};
3b097d64 LPC	349
	350	static int __devinit jz4740_codec_probe(struct platform_device *pdev)
	351	{
	352	int ret;
	353	struct jz4740_codec *jz4740_codec;
3b097d64 LPC	354	struct resource *mem;
	355
	356	jz4740_codec = kzalloc(sizeof(*jz4740_codec), GFP_KERNEL);
	357	if (!jz4740_codec)
	358	return -ENOMEM;
	359
	360	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	361	if (!mem) {
	362	dev_err(&pdev->dev, "Failed to get mmio memory resource\n");
	363	ret = -ENOENT;
	364	goto err_free_codec;
	365	}
	366
	367	mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
	368	if (!mem) {
	369	dev_err(&pdev->dev, "Failed to request mmio memory region\n");
	370	ret = -EBUSY;
	371	goto err_free_codec;
	372	}
	373
	374	jz4740_codec->base = ioremap(mem->start, resource_size(mem));
	375	if (!jz4740_codec->base) {
	376	dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
	377	ret = -EBUSY;
	378	goto err_release_mem_region;
	379	}
	380	jz4740_codec->mem = mem;
	381
3b097d64 LPC	382	platform_set_drvdata(pdev, jz4740_codec);
3b097d64 LPC	383
f0fba2ad LG	384	ret = snd_soc_register_codec(&pdev->dev,
f0fba2ad LG	385	&soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
3b097d64 LPC	386	if (ret) {
	387	dev_err(&pdev->dev, "Failed to register codec\n");
	388	goto err_iounmap;
	389	}
	390
3b097d64 LPC	391	return 0;
3b097d64 LPC	392
3b097d64 LPC	393	err_iounmap:
	394	iounmap(jz4740_codec->base);
	395	err_release_mem_region:
	396	release_mem_region(mem->start, resource_size(mem));
	397	err_free_codec:
	398	kfree(jz4740_codec);
	399
	400	return ret;
	401	}
	402
	403	static int __devexit jz4740_codec_remove(struct platform_device *pdev)
	404	{
	405	struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev);
	406	struct resource *mem = jz4740_codec->mem;
	407
f0fba2ad	408	snd_soc_unregister_codec(&pdev->dev);
3b097d64 LPC	409
	410	iounmap(jz4740_codec->base);
	411	release_mem_region(mem->start, resource_size(mem));
	412
	413	platform_set_drvdata(pdev, NULL);
	414	kfree(jz4740_codec);
	415
	416	return 0;
	417	}
	418
	419	static struct platform_driver jz4740_codec_driver = {
	420	.probe = jz4740_codec_probe,
	421	.remove = __devexit_p(jz4740_codec_remove),
	422	.driver = {
	423	.name = "jz4740-codec",
	424	.owner = THIS_MODULE,
	425	},
	426	};
	427
5bbcc3c0	428	module_platform_driver(jz4740_codec_driver);
3b097d64 LPC	429
	430	MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
	431	MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
	432	MODULE_LICENSE("GPL v2");
	433	MODULE_ALIAS("platform:jz4740-codec");