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ASoC: rt5640: Change the setting method of idle_bias_off
[deliverable/linux.git] / sound / soc / codecs / mc13783.c
CommitLineData
8b908b86
PR		 1/*
2 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
3 * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
4 * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/mfd/mc13xxx.h>
26#include <linux/slab.h>
27#include <sound/core.h>
28#include <sound/control.h>
29#include <sound/pcm.h>
30#include <sound/soc.h>
31#include <sound/initval.h>
32#include <sound/soc-dapm.h>
2d9215c1 33#include <linux/regmap.h>
8b908b86
PR		 34
35#include "mc13783.h"
36
8b908b86
PR		 37#define AUDIO_RX0_ALSPEN (1 << 5)
38#define AUDIO_RX0_ALSPSEL (1 << 7)
39#define AUDIO_RX0_ADDCDC (1 << 21)
40#define AUDIO_RX0_ADDSTDC (1 << 22)
41#define AUDIO_RX0_ADDRXIN (1 << 23)
42
43#define AUDIO_RX1_PGARXEN (1 << 0);
44#define AUDIO_RX1_PGASTEN (1 << 5)
45#define AUDIO_RX1_ARXINEN (1 << 10)
46
47#define AUDIO_TX_AMC1REN (1 << 5)
48#define AUDIO_TX_AMC1LEN (1 << 7)
49#define AUDIO_TX_AMC2EN (1 << 9)
50#define AUDIO_TX_ATXINEN (1 << 11)
51#define AUDIO_TX_RXINREC (1 << 13)
52
53#define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
54#define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
55#define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
56#define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
57#define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
58#define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
59#define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
60#define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
61#define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
62#define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
63#define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
64#define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
65#define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
66#define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
67#define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
68#define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
69#define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
70#define SSI_NETWORK_STDCSUMGAIN (1 << 20)
71
72/*
73 * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
74 * register layout
75 */
76#define AUDIO_SSI_SEL (1 << 0)
77#define AUDIO_CLK_SEL (1 << 1)
78#define AUDIO_CSM (1 << 2)
79#define AUDIO_BCL_INV (1 << 3)
80#define AUDIO_CFS_INV (1 << 4)
81#define AUDIO_CFS(x) (((x) & 0x3) << 5)
82#define AUDIO_CLK(x) (((x) & 0x7) << 7)
83#define AUDIO_C_EN (1 << 11)
84#define AUDIO_C_CLK_EN (1 << 12)
85#define AUDIO_C_RESET (1 << 15)
86
87#define AUDIO_CODEC_CDCFS8K16K (1 << 10)
88#define AUDIO_DAC_CFS_DLY_B (1 << 10)
89
90struct mc13783_priv {
8b908b86 91 struct mc13xxx *mc13xxx;
2d9215c1 92 struct regmap *regmap;
8b908b86
PR		 93
94 enum mc13783_ssi_port adc_ssi_port;
95 enum mc13783_ssi_port dac_ssi_port;
96};
97
8b908b86
PR		 98/* Mapping between sample rates and register value */
99static unsigned int mc13783_rates[] = {
100 8000, 11025, 12000, 16000,
101 22050, 24000, 32000, 44100,
102 48000, 64000, 96000
103};
104
105static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
106 struct snd_pcm_hw_params *params,
107 struct snd_soc_dai *dai)
108{
ab64246c 109 struct snd_soc_codec *codec = dai->codec;
8b908b86
PR		 110 unsigned int rate = params_rate(params);
111 int i;
112
113 for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
114 if (rate == mc13783_rates[i]) {
115 snd_soc_update_bits(codec, MC13783_AUDIO_DAC,
116 0xf << 17, i << 17);
117 return 0;
118 }
119 }
120
121 return -EINVAL;
122}
123
124static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
125 struct snd_pcm_hw_params *params,
126 struct snd_soc_dai *dai)
127{
ab64246c 128 struct snd_soc_codec *codec = dai->codec;
8b908b86
PR		 129 unsigned int rate = params_rate(params);
130 unsigned int val;
131
132 switch (rate) {
133 case 8000:
134 val = 0;
135 break;
136 case 16000:
137 val = AUDIO_CODEC_CDCFS8K16K;
138 break;
139 default:
140 return -EINVAL;
141 }
142
143 snd_soc_update_bits(codec, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
144 val);
145
146 return 0;
147}
148
149static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
150 struct snd_pcm_hw_params *params,
151 struct snd_soc_dai *dai)
152{
153 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
154 return mc13783_pcm_hw_params_dac(substream, params, dai);
155 else
156 return mc13783_pcm_hw_params_codec(substream, params, dai);
157}
158
159static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
160 unsigned int reg)
161{
162 struct snd_soc_codec *codec = dai->codec;
163 unsigned int val = 0;
164 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
165 AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
166
167
168 /* DAI mode */
169 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
170 case SND_SOC_DAIFMT_I2S:
171 val |= AUDIO_CFS(2);
172 break;
173 case SND_SOC_DAIFMT_DSP_A:
174 val |= AUDIO_CFS(1);
175 break;
176 default:
177 return -EINVAL;
178 }
179
180 /* DAI clock inversion */
181 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
182 case SND_SOC_DAIFMT_NB_NF:
183 val |= AUDIO_BCL_INV;
184 break;
185 case SND_SOC_DAIFMT_NB_IF:
186 val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
187 break;
188 case SND_SOC_DAIFMT_IB_NF:
189 break;
190 case SND_SOC_DAIFMT_IB_IF:
191 val |= AUDIO_CFS_INV;
192 break;
193 }
194
195 /* DAI clock master masks */
196 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
197 case SND_SOC_DAIFMT_CBM_CFM:
198 val |= AUDIO_C_CLK_EN;
199 break;
200 case SND_SOC_DAIFMT_CBS_CFS:
201 val |= AUDIO_CSM;
202 break;
203 case SND_SOC_DAIFMT_CBM_CFS:
204 case SND_SOC_DAIFMT_CBS_CFM:
205 return -EINVAL;
206 }
207
208 val |= AUDIO_C_RESET;
209
210 snd_soc_update_bits(codec, reg, mask, val);
211
212 return 0;
213}
214
215static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
216{
217 if (dai->id == MC13783_ID_STEREO_DAC)
218 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
219 else
220 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
221}
222
223static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
224{
225 int ret;
226
227 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
228 if (ret)
229 return ret;
230
231 /*
232 * In synchronous mode force the voice codec into slave mode
233 * so that the clock / framesync from the stereo DAC is used
234 */
235 fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
236 fmt |= SND_SOC_DAIFMT_CBS_CFS;
237 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
238
239 return ret;
240}
241
242static int mc13783_sysclk[] = {
243 13000000,
244 15360000,
245 16800000,
246 -1,
247 26000000,
248 -1, /* 12000000, invalid for voice codec */
249 -1, /* 3686400, invalid for voice codec */
250 33600000,
251};
252
253static int mc13783_set_sysclk(struct snd_soc_dai *dai,
254 int clk_id, unsigned int freq, int dir,
255 unsigned int reg)
256{
257 struct snd_soc_codec *codec = dai->codec;
258 int clk;
259 unsigned int val = 0;
260 unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
261
262 for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
263 if (mc13783_sysclk[clk] < 0)
264 continue;
265 if (mc13783_sysclk[clk] == freq)
266 break;
267 }
268
269 if (clk == ARRAY_SIZE(mc13783_sysclk))
270 return -EINVAL;
271
272 if (clk_id == MC13783_CLK_CLIB)
273 val |= AUDIO_CLK_SEL;
274
275 val |= AUDIO_CLK(clk);
276
277 snd_soc_update_bits(codec, reg, mask, val);
278
279 return 0;
280}
281
282static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
283 int clk_id, unsigned int freq, int dir)
284{
285 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
286}
287
288static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
289 int clk_id, unsigned int freq, int dir)
290{
291 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
292}
293
294static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
295 int clk_id, unsigned int freq, int dir)
296{
297 int ret;
298
299 ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
300 if (ret)
301 return ret;
302
303 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
304}
305
306static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
307 unsigned int tx_mask, unsigned int rx_mask, int slots,
308 int slot_width)
309{
310 struct snd_soc_codec *codec = dai->codec;
311 unsigned int val = 0;
312 unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
313 SSI_NETWORK_DAC_RXSLOT_MASK;
314
315 switch (slots) {
316 case 2:
317 val |= SSI_NETWORK_DAC_SLOTS_2;
318 break;
319 case 4:
320 val |= SSI_NETWORK_DAC_SLOTS_4;
321 break;
322 case 8:
323 val |= SSI_NETWORK_DAC_SLOTS_8;
324 break;
325 default:
326 return -EINVAL;
327 }
328
329 switch (rx_mask) {
330 case 0xfffffffc:
331 val |= SSI_NETWORK_DAC_RXSLOT_0_1;
332 break;
333 case 0xfffffff3:
334 val |= SSI_NETWORK_DAC_RXSLOT_2_3;
335 break;
336 case 0xffffffcf:
337 val |= SSI_NETWORK_DAC_RXSLOT_4_5;
338 break;
339 case 0xffffff3f:
340 val |= SSI_NETWORK_DAC_RXSLOT_6_7;
341 break;
342 default:
343 return -EINVAL;
1d198f26 344 }
8b908b86
PR		 345
346 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
347
348 return 0;
349}
350
351static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
352 unsigned int tx_mask, unsigned int rx_mask, int slots,
353 int slot_width)
354{
355 struct snd_soc_codec *codec = dai->codec;
356 unsigned int val = 0;
357 unsigned int mask = 0x3f;
358
359 if (slots != 4)
360 return -EINVAL;
361
362 if (tx_mask != 0xfffffffc)
363 return -EINVAL;
364
365 val |= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
366 val |= (0x01 << 4); /* secondary timeslot TX is 1 */
367
368 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
369
370 return 0;
371}
372
373static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
374 unsigned int tx_mask, unsigned int rx_mask, int slots,
375 int slot_width)
376{
377 int ret;
378
379 ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
380 slot_width);
381 if (ret)
382 return ret;
383
384 ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
385 slot_width);
386
387 return ret;
388}
389
390static const struct snd_kcontrol_new mc1l_amp_ctl =
6d97c09c 391 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 7, 1, 0);
8b908b86
PR		 392
393static const struct snd_kcontrol_new mc1r_amp_ctl =
6d97c09c 394 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 5, 1, 0);
8b908b86
PR		 395
396static const struct snd_kcontrol_new mc2_amp_ctl =
6d97c09c 397 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 9, 1, 0);
8b908b86
PR		 398
399static const struct snd_kcontrol_new atx_amp_ctl =
6d97c09c 400 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0);
8b908b86
PR		 401
402
403/* Virtual mux. The chip does the input selection automatically
404 * as soon as we enable one input. */
405static const char * const adcl_enum_text[] = {
406 "MC1L", "RXINL",
407};
408
15ab40a9 409static SOC_ENUM_SINGLE_VIRT_DECL(adcl_enum, adcl_enum_text);
8b908b86
PR		 410
411static const struct snd_kcontrol_new left_input_mux =
412 SOC_DAPM_ENUM_VIRT("Route", adcl_enum);
413
414static const char * const adcr_enum_text[] = {
415 "MC1R", "MC2", "RXINR", "TXIN",
416};
417
15ab40a9 418static SOC_ENUM_SINGLE_VIRT_DECL(adcr_enum, adcr_enum_text);
8b908b86
PR		 419
420static const struct snd_kcontrol_new right_input_mux =
421 SOC_DAPM_ENUM_VIRT("Route", adcr_enum);
422
423static const struct snd_kcontrol_new samp_ctl =
6d97c09c 424 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
8b908b86 425
bb7838d4
ST		 426static const char * const speaker_amp_source_text[] = {
427 "CODEC", "Right"
428};
a7509874
TI		 429static SOC_ENUM_SINGLE_DECL(speaker_amp_source, MC13783_AUDIO_RX0, 4,
430 speaker_amp_source_text);
bb7838d4
ST		 431static const struct snd_kcontrol_new speaker_amp_source_mux =
432 SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source);
433
434static const char * const headset_amp_source_text[] = {
435 "CODEC", "Mixer"
436};
437
a7509874
TI		 438static SOC_ENUM_SINGLE_DECL(headset_amp_source, MC13783_AUDIO_RX0, 11,
439 headset_amp_source_text);
bb7838d4
ST		 440static const struct snd_kcontrol_new headset_amp_source_mux =
441 SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source);
442
443static const struct snd_kcontrol_new cdcout_ctl =
444 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 18, 1, 0);
445
446static const struct snd_kcontrol_new adc_bypass_ctl =
447 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_CODEC, 16, 1, 0);
448
8b908b86 449static const struct snd_kcontrol_new lamp_ctl =
6d97c09c 450 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0);
8b908b86
PR		 451
452static const struct snd_kcontrol_new hlamp_ctl =
6d97c09c 453 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 10, 1, 0);
8b908b86
PR		 454
455static const struct snd_kcontrol_new hramp_ctl =
6d97c09c 456 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 9, 1, 0);
8b908b86
PR		 457
458static const struct snd_kcontrol_new llamp_ctl =
6d97c09c 459 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 16, 1, 0);
8b908b86
PR		 460
461static const struct snd_kcontrol_new lramp_ctl =
6d97c09c 462 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 15, 1, 0);
8b908b86
PR		 463
464static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
465/* Input */
466 SND_SOC_DAPM_INPUT("MC1LIN"),
467 SND_SOC_DAPM_INPUT("MC1RIN"),
468 SND_SOC_DAPM_INPUT("MC2IN"),
469 SND_SOC_DAPM_INPUT("RXINR"),
470 SND_SOC_DAPM_INPUT("RXINL"),
471 SND_SOC_DAPM_INPUT("TXIN"),
472
6d97c09c
GC		 473 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
474 SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0),
8b908b86 475
6d97c09c
GC		 476 SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl),
477 SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl),
478 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
479 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
8b908b86
PR		 480
481 SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
482 &left_input_mux),
483 SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
484 &right_input_mux),
485
bb7838d4
ST		 486 SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0,
487 &speaker_amp_source_mux),
488
489 SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM, 0, 0,
490 &headset_amp_source_mux),
491
8b908b86
PR		 492 SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
493 SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
494
6d97c09c
GC		 495 SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0),
496 SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0),
8b908b86 497
bb7838d4
ST		 498 SND_SOC_DAPM_PGA("Voice CODEC PGA", MC13783_AUDIO_RX1, 0, 0, NULL, 0),
499 SND_SOC_DAPM_SWITCH("Voice CODEC Bypass", MC13783_AUDIO_CODEC, 16, 0,
500 &adc_bypass_ctl),
501
8b908b86 502/* Output */
6d97c09c
GC		 503 SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0),
504 SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0),
8b908b86
PR		 505 SND_SOC_DAPM_OUTPUT("RXOUTL"),
506 SND_SOC_DAPM_OUTPUT("RXOUTR"),
507 SND_SOC_DAPM_OUTPUT("HSL"),
508 SND_SOC_DAPM_OUTPUT("HSR"),
bb7838d4 509 SND_SOC_DAPM_OUTPUT("LSPL"),
8b908b86
PR		 510 SND_SOC_DAPM_OUTPUT("LSP"),
511 SND_SOC_DAPM_OUTPUT("SP"),
bb7838d4 512 SND_SOC_DAPM_OUTPUT("CDCOUT"),
8b908b86 513
bb7838d4
ST		 514 SND_SOC_DAPM_SWITCH("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 0,
515 &cdcout_ctl),
516 SND_SOC_DAPM_SWITCH("Speaker Amp Switch", MC13783_AUDIO_RX0, 3, 0,
517 &samp_ctl),
8b908b86 518 SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
6d97c09c
GC		 519 SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0,
520 &hlamp_ctl),
521 SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0, 9, 0,
522 &hramp_ctl),
523 SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0, 16, 0,
524 &llamp_ctl),
525 SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0, 15, 0,
526 &lramp_ctl),
527 SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0, 22, 0),
528 SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1, 5, 0, NULL, 0),
8b908b86
PR		 529};
530
531static struct snd_soc_dapm_route mc13783_routes[] = {
532/* Input */
533 { "MC1L Amp", NULL, "MC1LIN"},
534 { "MC1R Amp", NULL, "MC1RIN" },
535 { "MC2 Amp", NULL, "MC2IN" },
536 { "TXIN Amp", NULL, "TXIN"},
537
538 { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
539 { "PGA Left Input Mux", "RXINL", "RXINL"},
540 { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
541 { "PGA Right Input Mux", "MC2", "MC2 Amp"},
542 { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
543 { "PGA Right Input Mux", "RXINR", "RXINR"},
544
545 { "PGA Left Input", NULL, "PGA Left Input Mux"},
546 { "PGA Right Input", NULL, "PGA Right Input Mux"},
547
548 { "ADC", NULL, "PGA Left Input"},
549 { "ADC", NULL, "PGA Right Input"},
550 { "ADC", NULL, "ADC_Reset"},
551
bb7838d4
ST		 552 { "Voice CODEC PGA", "Voice CODEC Bypass", "ADC" },
553
554 { "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"},
555 { "Speaker Amp Source MUX", "Right", "DAC PGA"},
556
557 { "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"},
558 { "Headset Amp Source MUX", "Mixer", "DAC PGA"},
559
8b908b86
PR		 560/* Output */
561 { "HSL", NULL, "Headset Amp Left" },
562 { "HSR", NULL, "Headset Amp Right"},
563 { "RXOUTL", NULL, "Line out Amp Left"},
564 { "RXOUTR", NULL, "Line out Amp Right"},
bb7838d4
ST		 565 { "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"},
566 { "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"},
567 { "HSL", "Headset Amp Left", "Headset Amp Source MUX"},
568 { "HSR", "Headset Amp Right", "Headset Amp Source MUX"},
8b908b86
PR		 569 { "Line out Amp Left", NULL, "DAC PGA"},
570 { "Line out Amp Right", NULL, "DAC PGA"},
571 { "DAC PGA", NULL, "DAC"},
572 { "DAC", NULL, "DAC_E"},
bb7838d4 573 { "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"},
8b908b86
PR		 574};
575
576static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
577 "Mono", "Mono Mix"};
578
d1755bb7
TI		 579static SOC_ENUM_SINGLE_DECL(mc13783_enum_3d_mixer,
580 MC13783_AUDIO_RX1, 16,
581 mc13783_3d_mixer);
8b908b86
PR		 582
583static struct snd_kcontrol_new mc13783_control_list[] = {
584 SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
585 SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
c6452e39 586 SOC_SINGLE("PCM Playback Switch", MC13783_AUDIO_RX1, 5, 1, 0),
8b908b86
PR		 587 SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
588 SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
c6452e39
ST		 589
590 SOC_SINGLE("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 1, 0),
591 SOC_SINGLE("Earpiece Amp Switch", MC13783_AUDIO_RX0, 3, 1, 0),
592 SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0, 10, 9, 1, 0),
593 SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0, 16, 15, 1, 0),
594
595 SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0, 22, 1, 0),
596 SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0, 23, 1, 0),
597
598 SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1, 1, 15, 0),
599 SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0),
600
601 SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1, 12, 15, 0),
602 SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1, 10, 1, 0),
603
604 SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0),
605 SOC_SINGLE("MC2 Capture Bias Switch", MC13783_AUDIO_TX, 1, 1, 0),
8b908b86
PR		 606};
607
608static int mc13783_probe(struct snd_soc_codec *codec)
609{
610 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
2d9215c1 611 int ret;
8b908b86 612
092eba93
XL		 613 ret = snd_soc_codec_set_cache_io(codec,
614 dev_get_regmap(codec->dev->parent, NULL));
2d9215c1
MB		 615 if (ret != 0) {
616 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
617 return ret;
618 }
8b908b86
PR		 619
620 /* these are the reset values */
621 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
622 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
623 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
624 mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
625 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
626 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
627
8b908b86
PR		 628 if (priv->adc_ssi_port == MC13783_SSI1_PORT)
629 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
630 AUDIO_SSI_SEL, 0);
631 else
632 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
633 0, AUDIO_SSI_SEL);
634
635 if (priv->dac_ssi_port == MC13783_SSI1_PORT)
636 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
637 AUDIO_SSI_SEL, 0);
638 else
639 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
640 0, AUDIO_SSI_SEL);
641
8b908b86
PR		 642 return 0;
643}
644
645static int mc13783_remove(struct snd_soc_codec *codec)
646{
647 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
648
8b908b86
PR		 649 /* Make sure VAUDIOON is off */
650 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
651
8b908b86
PR		 652 return 0;
653}
654
655#define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
656
657#define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
658 SNDRV_PCM_FMTBIT_S24_LE)
659
660static struct snd_soc_dai_ops mc13783_ops_dac = {
661 .hw_params = mc13783_pcm_hw_params_dac,
662 .set_fmt = mc13783_set_fmt_async,
663 .set_sysclk = mc13783_set_sysclk_dac,
664 .set_tdm_slot = mc13783_set_tdm_slot_dac,
665};
666
667static struct snd_soc_dai_ops mc13783_ops_codec = {
668 .hw_params = mc13783_pcm_hw_params_codec,
669 .set_fmt = mc13783_set_fmt_async,
670 .set_sysclk = mc13783_set_sysclk_codec,
671 .set_tdm_slot = mc13783_set_tdm_slot_codec,
672};
673
674/*
675 * The mc13783 has two SSI ports, both of them can be routed either
676 * to the voice codec or the stereo DAC. When two different SSI ports
677 * are used for the voice codec and the stereo DAC we can do different
678 * formats and sysclock settings for playback and capture
679 * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
680 * forces us to use symmetric rates (mc13783-hifi).
681 */
682static struct snd_soc_dai_driver mc13783_dai_async[] = {
683 {
684 .name = "mc13783-hifi-playback",
685 .id = MC13783_ID_STEREO_DAC,
686 .playback = {
687 .stream_name = "Playback",
37f45cc5 688 .channels_min = 2,
8b908b86
PR		 689 .channels_max = 2,
690 .rates = SNDRV_PCM_RATE_8000_96000,
691 .formats = MC13783_FORMATS,
692 },
693 .ops = &mc13783_ops_dac,
694 }, {
695 .name = "mc13783-hifi-capture",
696 .id = MC13783_ID_STEREO_CODEC,
697 .capture = {
698 .stream_name = "Capture",
37f45cc5 699 .channels_min = 2,
8b908b86
PR		 700 .channels_max = 2,
701 .rates = MC13783_RATES_RECORD,
702 .formats = MC13783_FORMATS,
703 },
704 .ops = &mc13783_ops_codec,
705 },
706};
707
708static struct snd_soc_dai_ops mc13783_ops_sync = {
709 .hw_params = mc13783_pcm_hw_params_sync,
710 .set_fmt = mc13783_set_fmt_sync,
711 .set_sysclk = mc13783_set_sysclk_sync,
712 .set_tdm_slot = mc13783_set_tdm_slot_sync,
713};
714
715static struct snd_soc_dai_driver mc13783_dai_sync[] = {
716 {
717 .name = "mc13783-hifi",
718 .id = MC13783_ID_SYNC,
719 .playback = {
720 .stream_name = "Playback",
37f45cc5 721 .channels_min = 2,
8b908b86
PR		 722 .channels_max = 2,
723 .rates = SNDRV_PCM_RATE_8000_96000,
724 .formats = MC13783_FORMATS,
725 },
726 .capture = {
727 .stream_name = "Capture",
37f45cc5 728 .channels_min = 2,
8b908b86
PR		 729 .channels_max = 2,
730 .rates = MC13783_RATES_RECORD,
731 .formats = MC13783_FORMATS,
732 },
733 .ops = &mc13783_ops_sync,
734 .symmetric_rates = 1,
735 }
736};
737
738static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
739 .probe = mc13783_probe,
740 .remove = mc13783_remove,
b77458da
PR		 741 .controls = mc13783_control_list,
742 .num_controls = ARRAY_SIZE(mc13783_control_list),
743 .dapm_widgets = mc13783_dapm_widgets,
744 .num_dapm_widgets = ARRAY_SIZE(mc13783_dapm_widgets),
745 .dapm_routes = mc13783_routes,
746 .num_dapm_routes = ARRAY_SIZE(mc13783_routes),
8b908b86
PR		 747};
748
a5d3f6ab 749static int __init mc13783_codec_probe(struct platform_device *pdev)
8b908b86 750{
8b908b86
PR		 751 struct mc13783_priv *priv;
752 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
753 int ret;
754
8b908b86 755 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
2b32098f 756 if (!priv)
8b908b86
PR		 757 return -ENOMEM;
758
8b908b86
PR		 759 if (pdata) {
760 priv->adc_ssi_port = pdata->adc_ssi_port;
761 priv->dac_ssi_port = pdata->dac_ssi_port;
762 } else {
295b8423 763 return -ENOSYS;
8b908b86
PR		 764 }
765
2b32098f
AS		 766 dev_set_drvdata(&pdev->dev, priv);
767 priv->mc13xxx = dev_get_drvdata(pdev->dev.parent);
768
8b908b86
PR		 769 if (priv->adc_ssi_port == priv->dac_ssi_port)
770 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
771 mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
772 else
773 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
774 mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
775
8b908b86
PR		 776 return ret;
777}
778
779static int mc13783_codec_remove(struct platform_device *pdev)
780{
781 snd_soc_unregister_codec(&pdev->dev);
782
783 return 0;
784}
785
786static struct platform_driver mc13783_codec_driver = {
787 .driver = {
2b32098f
AS		 788 .name = "mc13783-codec",
789 .owner = THIS_MODULE,
790 },
7a79e94e 791 .remove = mc13783_codec_remove,
8b908b86 792};
a5d3f6ab 793module_platform_driver_probe(mc13783_codec_driver, mc13783_codec_probe);
8b908b86
PR		 794
795MODULE_DESCRIPTION("ASoC MC13783 driver");
796MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
797MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
798MODULE_LICENSE("GPL");
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