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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney...
[deliverable/linux.git] / sound / soc / codecs / mc13783.c
CommitLineData
8b908b86
PR		 1/*
2 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
3 * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
4 * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/mfd/mc13xxx.h>
26#include <linux/slab.h>
27#include <sound/core.h>
28#include <sound/control.h>
29#include <sound/pcm.h>
30#include <sound/soc.h>
31#include <sound/initval.h>
32#include <sound/soc-dapm.h>
2d9215c1 33#include <linux/regmap.h>
8b908b86
PR		 34
35#include "mc13783.h"
36
8b908b86
PR		 37#define AUDIO_RX0_ALSPEN (1 << 5)
38#define AUDIO_RX0_ALSPSEL (1 << 7)
39#define AUDIO_RX0_ADDCDC (1 << 21)
40#define AUDIO_RX0_ADDSTDC (1 << 22)
41#define AUDIO_RX0_ADDRXIN (1 << 23)
42
43#define AUDIO_RX1_PGARXEN (1 << 0);
44#define AUDIO_RX1_PGASTEN (1 << 5)
45#define AUDIO_RX1_ARXINEN (1 << 10)
46
47#define AUDIO_TX_AMC1REN (1 << 5)
48#define AUDIO_TX_AMC1LEN (1 << 7)
49#define AUDIO_TX_AMC2EN (1 << 9)
50#define AUDIO_TX_ATXINEN (1 << 11)
51#define AUDIO_TX_RXINREC (1 << 13)
52
53#define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
54#define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
55#define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
56#define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
57#define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
58#define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
59#define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
60#define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
61#define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
62#define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
63#define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
64#define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
65#define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
66#define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
67#define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
68#define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
69#define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
70#define SSI_NETWORK_STDCSUMGAIN (1 << 20)
71
72/*
73 * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
74 * register layout
75 */
76#define AUDIO_SSI_SEL (1 << 0)
77#define AUDIO_CLK_SEL (1 << 1)
78#define AUDIO_CSM (1 << 2)
79#define AUDIO_BCL_INV (1 << 3)
80#define AUDIO_CFS_INV (1 << 4)
81#define AUDIO_CFS(x) (((x) & 0x3) << 5)
82#define AUDIO_CLK(x) (((x) & 0x7) << 7)
83#define AUDIO_C_EN (1 << 11)
84#define AUDIO_C_CLK_EN (1 << 12)
85#define AUDIO_C_RESET (1 << 15)
86
87#define AUDIO_CODEC_CDCFS8K16K (1 << 10)
88#define AUDIO_DAC_CFS_DLY_B (1 << 10)
89
90struct mc13783_priv {
8b908b86 91 struct mc13xxx *mc13xxx;
2d9215c1 92 struct regmap *regmap;
8b908b86
PR		 93
94 enum mc13783_ssi_port adc_ssi_port;
95 enum mc13783_ssi_port dac_ssi_port;
96};
97
8b908b86
PR		 98/* Mapping between sample rates and register value */
99static unsigned int mc13783_rates[] = {
100 8000, 11025, 12000, 16000,
101 22050, 24000, 32000, 44100,
102 48000, 64000, 96000
103};
104
105static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
106 struct snd_pcm_hw_params *params,
107 struct snd_soc_dai *dai)
108{
109 struct snd_soc_pcm_runtime *rtd = substream->private_data;
110 struct snd_soc_codec *codec = rtd->codec;
111 unsigned int rate = params_rate(params);
112 int i;
113
114 for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
115 if (rate == mc13783_rates[i]) {
116 snd_soc_update_bits(codec, MC13783_AUDIO_DAC,
117 0xf << 17, i << 17);
118 return 0;
119 }
120 }
121
122 return -EINVAL;
123}
124
125static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
126 struct snd_pcm_hw_params *params,
127 struct snd_soc_dai *dai)
128{
129 struct snd_soc_pcm_runtime *rtd = substream->private_data;
130 struct snd_soc_codec *codec = rtd->codec;
131 unsigned int rate = params_rate(params);
132 unsigned int val;
133
134 switch (rate) {
135 case 8000:
136 val = 0;
137 break;
138 case 16000:
139 val = AUDIO_CODEC_CDCFS8K16K;
140 break;
141 default:
142 return -EINVAL;
143 }
144
145 snd_soc_update_bits(codec, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
146 val);
147
148 return 0;
149}
150
151static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
152 struct snd_pcm_hw_params *params,
153 struct snd_soc_dai *dai)
154{
155 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
156 return mc13783_pcm_hw_params_dac(substream, params, dai);
157 else
158 return mc13783_pcm_hw_params_codec(substream, params, dai);
159}
160
161static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
162 unsigned int reg)
163{
164 struct snd_soc_codec *codec = dai->codec;
165 unsigned int val = 0;
166 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
167 AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
168
169
170 /* DAI mode */
171 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
172 case SND_SOC_DAIFMT_I2S:
173 val |= AUDIO_CFS(2);
174 break;
175 case SND_SOC_DAIFMT_DSP_A:
176 val |= AUDIO_CFS(1);
177 break;
178 default:
179 return -EINVAL;
180 }
181
182 /* DAI clock inversion */
183 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
184 case SND_SOC_DAIFMT_NB_NF:
185 val |= AUDIO_BCL_INV;
186 break;
187 case SND_SOC_DAIFMT_NB_IF:
188 val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
189 break;
190 case SND_SOC_DAIFMT_IB_NF:
191 break;
192 case SND_SOC_DAIFMT_IB_IF:
193 val |= AUDIO_CFS_INV;
194 break;
195 }
196
197 /* DAI clock master masks */
198 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
199 case SND_SOC_DAIFMT_CBM_CFM:
200 val |= AUDIO_C_CLK_EN;
201 break;
202 case SND_SOC_DAIFMT_CBS_CFS:
203 val |= AUDIO_CSM;
204 break;
205 case SND_SOC_DAIFMT_CBM_CFS:
206 case SND_SOC_DAIFMT_CBS_CFM:
207 return -EINVAL;
208 }
209
210 val |= AUDIO_C_RESET;
211
212 snd_soc_update_bits(codec, reg, mask, val);
213
214 return 0;
215}
216
217static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
218{
219 if (dai->id == MC13783_ID_STEREO_DAC)
220 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
221 else
222 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
223}
224
225static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
226{
227 int ret;
228
229 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
230 if (ret)
231 return ret;
232
233 /*
234 * In synchronous mode force the voice codec into slave mode
235 * so that the clock / framesync from the stereo DAC is used
236 */
237 fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
238 fmt |= SND_SOC_DAIFMT_CBS_CFS;
239 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
240
241 return ret;
242}
243
244static int mc13783_sysclk[] = {
245 13000000,
246 15360000,
247 16800000,
248 -1,
249 26000000,
250 -1, /* 12000000, invalid for voice codec */
251 -1, /* 3686400, invalid for voice codec */
252 33600000,
253};
254
255static int mc13783_set_sysclk(struct snd_soc_dai *dai,
256 int clk_id, unsigned int freq, int dir,
257 unsigned int reg)
258{
259 struct snd_soc_codec *codec = dai->codec;
260 int clk;
261 unsigned int val = 0;
262 unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
263
264 for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
265 if (mc13783_sysclk[clk] < 0)
266 continue;
267 if (mc13783_sysclk[clk] == freq)
268 break;
269 }
270
271 if (clk == ARRAY_SIZE(mc13783_sysclk))
272 return -EINVAL;
273
274 if (clk_id == MC13783_CLK_CLIB)
275 val |= AUDIO_CLK_SEL;
276
277 val |= AUDIO_CLK(clk);
278
279 snd_soc_update_bits(codec, reg, mask, val);
280
281 return 0;
282}
283
284static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
285 int clk_id, unsigned int freq, int dir)
286{
287 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
288}
289
290static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
291 int clk_id, unsigned int freq, int dir)
292{
293 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
294}
295
296static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
297 int clk_id, unsigned int freq, int dir)
298{
299 int ret;
300
301 ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
302 if (ret)
303 return ret;
304
305 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
306}
307
308static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
309 unsigned int tx_mask, unsigned int rx_mask, int slots,
310 int slot_width)
311{
312 struct snd_soc_codec *codec = dai->codec;
313 unsigned int val = 0;
314 unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
315 SSI_NETWORK_DAC_RXSLOT_MASK;
316
317 switch (slots) {
318 case 2:
319 val |= SSI_NETWORK_DAC_SLOTS_2;
320 break;
321 case 4:
322 val |= SSI_NETWORK_DAC_SLOTS_4;
323 break;
324 case 8:
325 val |= SSI_NETWORK_DAC_SLOTS_8;
326 break;
327 default:
328 return -EINVAL;
329 }
330
331 switch (rx_mask) {
332 case 0xfffffffc:
333 val |= SSI_NETWORK_DAC_RXSLOT_0_1;
334 break;
335 case 0xfffffff3:
336 val |= SSI_NETWORK_DAC_RXSLOT_2_3;
337 break;
338 case 0xffffffcf:
339 val |= SSI_NETWORK_DAC_RXSLOT_4_5;
340 break;
341 case 0xffffff3f:
342 val |= SSI_NETWORK_DAC_RXSLOT_6_7;
343 break;
344 default:
345 return -EINVAL;
1d198f26 346 }
8b908b86
PR		 347
348 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
349
350 return 0;
351}
352
353static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
354 unsigned int tx_mask, unsigned int rx_mask, int slots,
355 int slot_width)
356{
357 struct snd_soc_codec *codec = dai->codec;
358 unsigned int val = 0;
359 unsigned int mask = 0x3f;
360
361 if (slots != 4)
362 return -EINVAL;
363
364 if (tx_mask != 0xfffffffc)
365 return -EINVAL;
366
367 val |= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
368 val |= (0x01 << 4); /* secondary timeslot TX is 1 */
369
370 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
371
372 return 0;
373}
374
375static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
376 unsigned int tx_mask, unsigned int rx_mask, int slots,
377 int slot_width)
378{
379 int ret;
380
381 ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
382 slot_width);
383 if (ret)
384 return ret;
385
386 ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
387 slot_width);
388
389 return ret;
390}
391
392static const struct snd_kcontrol_new mc1l_amp_ctl =
6d97c09c 393 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 7, 1, 0);
8b908b86
PR		 394
395static const struct snd_kcontrol_new mc1r_amp_ctl =
6d97c09c 396 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 5, 1, 0);
8b908b86
PR		 397
398static const struct snd_kcontrol_new mc2_amp_ctl =
6d97c09c 399 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 9, 1, 0);
8b908b86
PR		 400
401static const struct snd_kcontrol_new atx_amp_ctl =
6d97c09c 402 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0);
8b908b86
PR		 403
404
405/* Virtual mux. The chip does the input selection automatically
406 * as soon as we enable one input. */
407static const char * const adcl_enum_text[] = {
408 "MC1L", "RXINL",
409};
410
411static const struct soc_enum adcl_enum =
412 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcl_enum_text), adcl_enum_text);
413
414static const struct snd_kcontrol_new left_input_mux =
415 SOC_DAPM_ENUM_VIRT("Route", adcl_enum);
416
417static const char * const adcr_enum_text[] = {
418 "MC1R", "MC2", "RXINR", "TXIN",
419};
420
421static const struct soc_enum adcr_enum =
422 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcr_enum_text), adcr_enum_text);
423
424static const struct snd_kcontrol_new right_input_mux =
425 SOC_DAPM_ENUM_VIRT("Route", adcr_enum);
426
427static const struct snd_kcontrol_new samp_ctl =
6d97c09c 428 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
8b908b86 429
bb7838d4
ST		 430static const char * const speaker_amp_source_text[] = {
431 "CODEC", "Right"
432};
433static const SOC_ENUM_SINGLE_DECL(speaker_amp_source, MC13783_AUDIO_RX0, 4,
434 speaker_amp_source_text);
435static const struct snd_kcontrol_new speaker_amp_source_mux =
436 SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source);
437
438static const char * const headset_amp_source_text[] = {
439 "CODEC", "Mixer"
440};
441
442static const SOC_ENUM_SINGLE_DECL(headset_amp_source, MC13783_AUDIO_RX0, 11,
443 headset_amp_source_text);
444static const struct snd_kcontrol_new headset_amp_source_mux =
445 SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source);
446
447static const struct snd_kcontrol_new cdcout_ctl =
448 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 18, 1, 0);
449
450static const struct snd_kcontrol_new adc_bypass_ctl =
451 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_CODEC, 16, 1, 0);
452
8b908b86 453static const struct snd_kcontrol_new lamp_ctl =
6d97c09c 454 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0);
8b908b86
PR		 455
456static const struct snd_kcontrol_new hlamp_ctl =
6d97c09c 457 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 10, 1, 0);
8b908b86
PR		 458
459static const struct snd_kcontrol_new hramp_ctl =
6d97c09c 460 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 9, 1, 0);
8b908b86
PR		 461
462static const struct snd_kcontrol_new llamp_ctl =
6d97c09c 463 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 16, 1, 0);
8b908b86
PR		 464
465static const struct snd_kcontrol_new lramp_ctl =
6d97c09c 466 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 15, 1, 0);
8b908b86
PR		 467
468static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
469/* Input */
470 SND_SOC_DAPM_INPUT("MC1LIN"),
471 SND_SOC_DAPM_INPUT("MC1RIN"),
472 SND_SOC_DAPM_INPUT("MC2IN"),
473 SND_SOC_DAPM_INPUT("RXINR"),
474 SND_SOC_DAPM_INPUT("RXINL"),
475 SND_SOC_DAPM_INPUT("TXIN"),
476
6d97c09c
GC		 477 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
478 SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0),
8b908b86 479
6d97c09c
GC		 480 SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl),
481 SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl),
482 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
483 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
8b908b86
PR		 484
485 SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
486 &left_input_mux),
487 SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
488 &right_input_mux),
489
bb7838d4
ST		 490 SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0,
491 &speaker_amp_source_mux),
492
493 SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM, 0, 0,
494 &headset_amp_source_mux),
495
8b908b86
PR		 496 SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
497 SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
498
6d97c09c
GC		 499 SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0),
500 SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0),
8b908b86 501
bb7838d4
ST		 502 SND_SOC_DAPM_PGA("Voice CODEC PGA", MC13783_AUDIO_RX1, 0, 0, NULL, 0),
503 SND_SOC_DAPM_SWITCH("Voice CODEC Bypass", MC13783_AUDIO_CODEC, 16, 0,
504 &adc_bypass_ctl),
505
8b908b86 506/* Output */
6d97c09c
GC		 507 SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0),
508 SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0),
8b908b86
PR		 509 SND_SOC_DAPM_OUTPUT("RXOUTL"),
510 SND_SOC_DAPM_OUTPUT("RXOUTR"),
511 SND_SOC_DAPM_OUTPUT("HSL"),
512 SND_SOC_DAPM_OUTPUT("HSR"),
bb7838d4 513 SND_SOC_DAPM_OUTPUT("LSPL"),
8b908b86
PR		 514 SND_SOC_DAPM_OUTPUT("LSP"),
515 SND_SOC_DAPM_OUTPUT("SP"),
bb7838d4 516 SND_SOC_DAPM_OUTPUT("CDCOUT"),
8b908b86 517
bb7838d4
ST		 518 SND_SOC_DAPM_SWITCH("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 0,
519 &cdcout_ctl),
520 SND_SOC_DAPM_SWITCH("Speaker Amp Switch", MC13783_AUDIO_RX0, 3, 0,
521 &samp_ctl),
8b908b86 522 SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
6d97c09c
GC		 523 SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0,
524 &hlamp_ctl),
525 SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0, 9, 0,
526 &hramp_ctl),
527 SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0, 16, 0,
528 &llamp_ctl),
529 SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0, 15, 0,
530 &lramp_ctl),
531 SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0, 22, 0),
532 SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1, 5, 0, NULL, 0),
8b908b86
PR		 533};
534
535static struct snd_soc_dapm_route mc13783_routes[] = {
536/* Input */
537 { "MC1L Amp", NULL, "MC1LIN"},
538 { "MC1R Amp", NULL, "MC1RIN" },
539 { "MC2 Amp", NULL, "MC2IN" },
540 { "TXIN Amp", NULL, "TXIN"},
541
542 { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
543 { "PGA Left Input Mux", "RXINL", "RXINL"},
544 { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
545 { "PGA Right Input Mux", "MC2", "MC2 Amp"},
546 { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
547 { "PGA Right Input Mux", "RXINR", "RXINR"},
548
549 { "PGA Left Input", NULL, "PGA Left Input Mux"},
550 { "PGA Right Input", NULL, "PGA Right Input Mux"},
551
552 { "ADC", NULL, "PGA Left Input"},
553 { "ADC", NULL, "PGA Right Input"},
554 { "ADC", NULL, "ADC_Reset"},
555
bb7838d4
ST		 556 { "Voice CODEC PGA", "Voice CODEC Bypass", "ADC" },
557
558 { "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"},
559 { "Speaker Amp Source MUX", "Right", "DAC PGA"},
560
561 { "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"},
562 { "Headset Amp Source MUX", "Mixer", "DAC PGA"},
563
8b908b86
PR		 564/* Output */
565 { "HSL", NULL, "Headset Amp Left" },
566 { "HSR", NULL, "Headset Amp Right"},
567 { "RXOUTL", NULL, "Line out Amp Left"},
568 { "RXOUTR", NULL, "Line out Amp Right"},
bb7838d4
ST		 569 { "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"},
570 { "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"},
571 { "HSL", "Headset Amp Left", "Headset Amp Source MUX"},
572 { "HSR", "Headset Amp Right", "Headset Amp Source MUX"},
8b908b86
PR		 573 { "Line out Amp Left", NULL, "DAC PGA"},
574 { "Line out Amp Right", NULL, "DAC PGA"},
575 { "DAC PGA", NULL, "DAC"},
576 { "DAC", NULL, "DAC_E"},
bb7838d4 577 { "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"},
8b908b86
PR		 578};
579
580static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
581 "Mono", "Mono Mix"};
582
583static const struct soc_enum mc13783_enum_3d_mixer =
584 SOC_ENUM_SINGLE(MC13783_AUDIO_RX1, 16, ARRAY_SIZE(mc13783_3d_mixer),
585 mc13783_3d_mixer);
586
587static struct snd_kcontrol_new mc13783_control_list[] = {
588 SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
589 SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
c6452e39 590 SOC_SINGLE("PCM Playback Switch", MC13783_AUDIO_RX1, 5, 1, 0),
8b908b86
PR		 591 SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
592 SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
c6452e39
ST		 593
594 SOC_SINGLE("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 1, 0),
595 SOC_SINGLE("Earpiece Amp Switch", MC13783_AUDIO_RX0, 3, 1, 0),
596 SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0, 10, 9, 1, 0),
597 SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0, 16, 15, 1, 0),
598
599 SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0, 22, 1, 0),
600 SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0, 23, 1, 0),
601
602 SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1, 1, 15, 0),
603 SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0),
604
605 SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1, 12, 15, 0),
606 SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1, 10, 1, 0),
607
608 SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0),
609 SOC_SINGLE("MC2 Capture Bias Switch", MC13783_AUDIO_TX, 1, 1, 0),
8b908b86
PR		 610};
611
612static int mc13783_probe(struct snd_soc_codec *codec)
613{
614 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
2d9215c1 615 int ret;
8b908b86 616
2d9215c1
MB		 617 codec->control_data = dev_get_regmap(codec->dev->parent, NULL);
618 ret = snd_soc_codec_set_cache_io(codec, 8, 24, SND_SOC_REGMAP);
619 if (ret != 0) {
620 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
621 return ret;
622 }
8b908b86
PR		 623
624 /* these are the reset values */
625 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
626 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
627 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
628 mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
629 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
630 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
631
8b908b86
PR		 632 if (priv->adc_ssi_port == MC13783_SSI1_PORT)
633 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
634 AUDIO_SSI_SEL, 0);
635 else
636 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
637 0, AUDIO_SSI_SEL);
638
639 if (priv->dac_ssi_port == MC13783_SSI1_PORT)
640 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
641 AUDIO_SSI_SEL, 0);
642 else
643 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
644 0, AUDIO_SSI_SEL);
645
8b908b86
PR		 646 return 0;
647}
648
649static int mc13783_remove(struct snd_soc_codec *codec)
650{
651 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
652
8b908b86
PR		 653 /* Make sure VAUDIOON is off */
654 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
655
8b908b86
PR		 656 return 0;
657}
658
659#define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
660
661#define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
662 SNDRV_PCM_FMTBIT_S24_LE)
663
664static struct snd_soc_dai_ops mc13783_ops_dac = {
665 .hw_params = mc13783_pcm_hw_params_dac,
666 .set_fmt = mc13783_set_fmt_async,
667 .set_sysclk = mc13783_set_sysclk_dac,
668 .set_tdm_slot = mc13783_set_tdm_slot_dac,
669};
670
671static struct snd_soc_dai_ops mc13783_ops_codec = {
672 .hw_params = mc13783_pcm_hw_params_codec,
673 .set_fmt = mc13783_set_fmt_async,
674 .set_sysclk = mc13783_set_sysclk_codec,
675 .set_tdm_slot = mc13783_set_tdm_slot_codec,
676};
677
678/*
679 * The mc13783 has two SSI ports, both of them can be routed either
680 * to the voice codec or the stereo DAC. When two different SSI ports
681 * are used for the voice codec and the stereo DAC we can do different
682 * formats and sysclock settings for playback and capture
683 * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
684 * forces us to use symmetric rates (mc13783-hifi).
685 */
686static struct snd_soc_dai_driver mc13783_dai_async[] = {
687 {
688 .name = "mc13783-hifi-playback",
689 .id = MC13783_ID_STEREO_DAC,
690 .playback = {
691 .stream_name = "Playback",
37f45cc5 692 .channels_min = 2,
8b908b86
PR		 693 .channels_max = 2,
694 .rates = SNDRV_PCM_RATE_8000_96000,
695 .formats = MC13783_FORMATS,
696 },
697 .ops = &mc13783_ops_dac,
698 }, {
699 .name = "mc13783-hifi-capture",
700 .id = MC13783_ID_STEREO_CODEC,
701 .capture = {
702 .stream_name = "Capture",
37f45cc5 703 .channels_min = 2,
8b908b86
PR		 704 .channels_max = 2,
705 .rates = MC13783_RATES_RECORD,
706 .formats = MC13783_FORMATS,
707 },
708 .ops = &mc13783_ops_codec,
709 },
710};
711
712static struct snd_soc_dai_ops mc13783_ops_sync = {
713 .hw_params = mc13783_pcm_hw_params_sync,
714 .set_fmt = mc13783_set_fmt_sync,
715 .set_sysclk = mc13783_set_sysclk_sync,
716 .set_tdm_slot = mc13783_set_tdm_slot_sync,
717};
718
719static struct snd_soc_dai_driver mc13783_dai_sync[] = {
720 {
721 .name = "mc13783-hifi",
722 .id = MC13783_ID_SYNC,
723 .playback = {
724 .stream_name = "Playback",
37f45cc5 725 .channels_min = 2,
8b908b86
PR		 726 .channels_max = 2,
727 .rates = SNDRV_PCM_RATE_8000_96000,
728 .formats = MC13783_FORMATS,
729 },
730 .capture = {
731 .stream_name = "Capture",
37f45cc5 732 .channels_min = 2,
8b908b86
PR		 733 .channels_max = 2,
734 .rates = MC13783_RATES_RECORD,
735 .formats = MC13783_FORMATS,
736 },
737 .ops = &mc13783_ops_sync,
738 .symmetric_rates = 1,
739 }
740};
741
742static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
743 .probe = mc13783_probe,
744 .remove = mc13783_remove,
b77458da
PR		 745 .controls = mc13783_control_list,
746 .num_controls = ARRAY_SIZE(mc13783_control_list),
747 .dapm_widgets = mc13783_dapm_widgets,
748 .num_dapm_widgets = ARRAY_SIZE(mc13783_dapm_widgets),
749 .dapm_routes = mc13783_routes,
750 .num_dapm_routes = ARRAY_SIZE(mc13783_routes),
8b908b86
PR		 751};
752
a5d3f6ab 753static int __init mc13783_codec_probe(struct platform_device *pdev)
8b908b86 754{
8b908b86
PR		 755 struct mc13783_priv *priv;
756 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
757 int ret;
758
8b908b86 759 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
2b32098f 760 if (!priv)
8b908b86
PR		 761 return -ENOMEM;
762
8b908b86
PR		 763 if (pdata) {
764 priv->adc_ssi_port = pdata->adc_ssi_port;
765 priv->dac_ssi_port = pdata->dac_ssi_port;
766 } else {
295b8423 767 return -ENOSYS;
8b908b86
PR		 768 }
769
2b32098f
AS		 770 dev_set_drvdata(&pdev->dev, priv);
771 priv->mc13xxx = dev_get_drvdata(pdev->dev.parent);
772
8b908b86
PR		 773 if (priv->adc_ssi_port == priv->dac_ssi_port)
774 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
775 mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
776 else
777 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
778 mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
779
8b908b86
PR		 780 return ret;
781}
782
783static int mc13783_codec_remove(struct platform_device *pdev)
784{
785 snd_soc_unregister_codec(&pdev->dev);
786
787 return 0;
788}
789
790static struct platform_driver mc13783_codec_driver = {
791 .driver = {
2b32098f
AS		 792 .name = "mc13783-codec",
793 .owner = THIS_MODULE,
794 },
7a79e94e 795 .remove = mc13783_codec_remove,
8b908b86 796};
a5d3f6ab 797module_platform_driver_probe(mc13783_codec_driver, mc13783_codec_probe);
8b908b86
PR		 798
799MODULE_DESCRIPTION("ASoC MC13783 driver");
800MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
801MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
802MODULE_LICENSE("GPL");
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