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Merge branch 'slab/next' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg...
[deliverable/linux.git] / sound / soc / codecs / mc13783.c
CommitLineData
8b908b86
PR		 1/*
2 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
3 * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
4 * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/mfd/mc13xxx.h>
26#include <linux/slab.h>
27#include <sound/core.h>
28#include <sound/control.h>
29#include <sound/pcm.h>
30#include <sound/soc.h>
31#include <sound/initval.h>
32#include <sound/soc-dapm.h>
33
34#include "mc13783.h"
35
36#define MC13783_AUDIO_RX0 36
37#define MC13783_AUDIO_RX1 37
38#define MC13783_AUDIO_TX 38
39#define MC13783_SSI_NETWORK 39
40#define MC13783_AUDIO_CODEC 40
41#define MC13783_AUDIO_DAC 41
42
43#define AUDIO_RX0_ALSPEN (1 << 5)
44#define AUDIO_RX0_ALSPSEL (1 << 7)
45#define AUDIO_RX0_ADDCDC (1 << 21)
46#define AUDIO_RX0_ADDSTDC (1 << 22)
47#define AUDIO_RX0_ADDRXIN (1 << 23)
48
49#define AUDIO_RX1_PGARXEN (1 << 0);
50#define AUDIO_RX1_PGASTEN (1 << 5)
51#define AUDIO_RX1_ARXINEN (1 << 10)
52
53#define AUDIO_TX_AMC1REN (1 << 5)
54#define AUDIO_TX_AMC1LEN (1 << 7)
55#define AUDIO_TX_AMC2EN (1 << 9)
56#define AUDIO_TX_ATXINEN (1 << 11)
57#define AUDIO_TX_RXINREC (1 << 13)
58
59#define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
60#define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
61#define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
62#define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
63#define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
64#define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
65#define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
66#define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
67#define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
68#define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
69#define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
70#define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
71#define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
72#define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
73#define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
74#define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
75#define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
76#define SSI_NETWORK_STDCSUMGAIN (1 << 20)
77
78/*
79 * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
80 * register layout
81 */
82#define AUDIO_SSI_SEL (1 << 0)
83#define AUDIO_CLK_SEL (1 << 1)
84#define AUDIO_CSM (1 << 2)
85#define AUDIO_BCL_INV (1 << 3)
86#define AUDIO_CFS_INV (1 << 4)
87#define AUDIO_CFS(x) (((x) & 0x3) << 5)
88#define AUDIO_CLK(x) (((x) & 0x7) << 7)
89#define AUDIO_C_EN (1 << 11)
90#define AUDIO_C_CLK_EN (1 << 12)
91#define AUDIO_C_RESET (1 << 15)
92
93#define AUDIO_CODEC_CDCFS8K16K (1 << 10)
94#define AUDIO_DAC_CFS_DLY_B (1 << 10)
95
96struct mc13783_priv {
8b908b86
PR		 97 struct mc13xxx *mc13xxx;
98
99 enum mc13783_ssi_port adc_ssi_port;
100 enum mc13783_ssi_port dac_ssi_port;
101};
102
103static unsigned int mc13783_read(struct snd_soc_codec *codec,
104 unsigned int reg)
105{
106 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
107 unsigned int value = 0;
108
109 mc13xxx_lock(priv->mc13xxx);
110
111 mc13xxx_reg_read(priv->mc13xxx, reg, &value);
112
113 mc13xxx_unlock(priv->mc13xxx);
114
115 return value;
116}
117
118static int mc13783_write(struct snd_soc_codec *codec,
119 unsigned int reg, unsigned int value)
120{
121 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
122 int ret;
123
124 mc13xxx_lock(priv->mc13xxx);
125
126 ret = mc13xxx_reg_write(priv->mc13xxx, reg, value);
127
9f6f0afb
ST		 128 /* include errata fix for spi audio problems */
129 if (reg == MC13783_AUDIO_CODEC || reg == MC13783_AUDIO_DAC)
130 ret = mc13xxx_reg_write(priv->mc13xxx, reg, value);
131
8b908b86
PR		 132 mc13xxx_unlock(priv->mc13xxx);
133
134 return ret;
135}
136
137/* Mapping between sample rates and register value */
138static unsigned int mc13783_rates[] = {
139 8000, 11025, 12000, 16000,
140 22050, 24000, 32000, 44100,
141 48000, 64000, 96000
142};
143
144static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
145 struct snd_pcm_hw_params *params,
146 struct snd_soc_dai *dai)
147{
148 struct snd_soc_pcm_runtime *rtd = substream->private_data;
149 struct snd_soc_codec *codec = rtd->codec;
150 unsigned int rate = params_rate(params);
151 int i;
152
153 for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
154 if (rate == mc13783_rates[i]) {
155 snd_soc_update_bits(codec, MC13783_AUDIO_DAC,
156 0xf << 17, i << 17);
157 return 0;
158 }
159 }
160
161 return -EINVAL;
162}
163
164static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
165 struct snd_pcm_hw_params *params,
166 struct snd_soc_dai *dai)
167{
168 struct snd_soc_pcm_runtime *rtd = substream->private_data;
169 struct snd_soc_codec *codec = rtd->codec;
170 unsigned int rate = params_rate(params);
171 unsigned int val;
172
173 switch (rate) {
174 case 8000:
175 val = 0;
176 break;
177 case 16000:
178 val = AUDIO_CODEC_CDCFS8K16K;
179 break;
180 default:
181 return -EINVAL;
182 }
183
184 snd_soc_update_bits(codec, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
185 val);
186
187 return 0;
188}
189
190static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
191 struct snd_pcm_hw_params *params,
192 struct snd_soc_dai *dai)
193{
194 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
195 return mc13783_pcm_hw_params_dac(substream, params, dai);
196 else
197 return mc13783_pcm_hw_params_codec(substream, params, dai);
198}
199
200static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
201 unsigned int reg)
202{
203 struct snd_soc_codec *codec = dai->codec;
204 unsigned int val = 0;
205 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
206 AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
207
208
209 /* DAI mode */
210 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
211 case SND_SOC_DAIFMT_I2S:
212 val |= AUDIO_CFS(2);
213 break;
214 case SND_SOC_DAIFMT_DSP_A:
215 val |= AUDIO_CFS(1);
216 break;
217 default:
218 return -EINVAL;
219 }
220
221 /* DAI clock inversion */
222 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
223 case SND_SOC_DAIFMT_NB_NF:
224 val |= AUDIO_BCL_INV;
225 break;
226 case SND_SOC_DAIFMT_NB_IF:
227 val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
228 break;
229 case SND_SOC_DAIFMT_IB_NF:
230 break;
231 case SND_SOC_DAIFMT_IB_IF:
232 val |= AUDIO_CFS_INV;
233 break;
234 }
235
236 /* DAI clock master masks */
237 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
238 case SND_SOC_DAIFMT_CBM_CFM:
239 val |= AUDIO_C_CLK_EN;
240 break;
241 case SND_SOC_DAIFMT_CBS_CFS:
242 val |= AUDIO_CSM;
243 break;
244 case SND_SOC_DAIFMT_CBM_CFS:
245 case SND_SOC_DAIFMT_CBS_CFM:
246 return -EINVAL;
247 }
248
249 val |= AUDIO_C_RESET;
250
251 snd_soc_update_bits(codec, reg, mask, val);
252
253 return 0;
254}
255
256static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
257{
258 if (dai->id == MC13783_ID_STEREO_DAC)
259 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
260 else
261 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
262}
263
264static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
265{
266 int ret;
267
268 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
269 if (ret)
270 return ret;
271
272 /*
273 * In synchronous mode force the voice codec into slave mode
274 * so that the clock / framesync from the stereo DAC is used
275 */
276 fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
277 fmt |= SND_SOC_DAIFMT_CBS_CFS;
278 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
279
280 return ret;
281}
282
283static int mc13783_sysclk[] = {
284 13000000,
285 15360000,
286 16800000,
287 -1,
288 26000000,
289 -1, /* 12000000, invalid for voice codec */
290 -1, /* 3686400, invalid for voice codec */
291 33600000,
292};
293
294static int mc13783_set_sysclk(struct snd_soc_dai *dai,
295 int clk_id, unsigned int freq, int dir,
296 unsigned int reg)
297{
298 struct snd_soc_codec *codec = dai->codec;
299 int clk;
300 unsigned int val = 0;
301 unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
302
303 for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
304 if (mc13783_sysclk[clk] < 0)
305 continue;
306 if (mc13783_sysclk[clk] == freq)
307 break;
308 }
309
310 if (clk == ARRAY_SIZE(mc13783_sysclk))
311 return -EINVAL;
312
313 if (clk_id == MC13783_CLK_CLIB)
314 val |= AUDIO_CLK_SEL;
315
316 val |= AUDIO_CLK(clk);
317
318 snd_soc_update_bits(codec, reg, mask, val);
319
320 return 0;
321}
322
323static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
324 int clk_id, unsigned int freq, int dir)
325{
326 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
327}
328
329static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
330 int clk_id, unsigned int freq, int dir)
331{
332 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
333}
334
335static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
336 int clk_id, unsigned int freq, int dir)
337{
338 int ret;
339
340 ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
341 if (ret)
342 return ret;
343
344 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
345}
346
347static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
348 unsigned int tx_mask, unsigned int rx_mask, int slots,
349 int slot_width)
350{
351 struct snd_soc_codec *codec = dai->codec;
352 unsigned int val = 0;
353 unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
354 SSI_NETWORK_DAC_RXSLOT_MASK;
355
356 switch (slots) {
357 case 2:
358 val |= SSI_NETWORK_DAC_SLOTS_2;
359 break;
360 case 4:
361 val |= SSI_NETWORK_DAC_SLOTS_4;
362 break;
363 case 8:
364 val |= SSI_NETWORK_DAC_SLOTS_8;
365 break;
366 default:
367 return -EINVAL;
368 }
369
370 switch (rx_mask) {
371 case 0xfffffffc:
372 val |= SSI_NETWORK_DAC_RXSLOT_0_1;
373 break;
374 case 0xfffffff3:
375 val |= SSI_NETWORK_DAC_RXSLOT_2_3;
376 break;
377 case 0xffffffcf:
378 val |= SSI_NETWORK_DAC_RXSLOT_4_5;
379 break;
380 case 0xffffff3f:
381 val |= SSI_NETWORK_DAC_RXSLOT_6_7;
382 break;
383 default:
384 return -EINVAL;
385 };
386
387 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
388
389 return 0;
390}
391
392static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
393 unsigned int tx_mask, unsigned int rx_mask, int slots,
394 int slot_width)
395{
396 struct snd_soc_codec *codec = dai->codec;
397 unsigned int val = 0;
398 unsigned int mask = 0x3f;
399
400 if (slots != 4)
401 return -EINVAL;
402
403 if (tx_mask != 0xfffffffc)
404 return -EINVAL;
405
406 val |= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
407 val |= (0x01 << 4); /* secondary timeslot TX is 1 */
408
409 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
410
411 return 0;
412}
413
414static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
415 unsigned int tx_mask, unsigned int rx_mask, int slots,
416 int slot_width)
417{
418 int ret;
419
420 ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
421 slot_width);
422 if (ret)
423 return ret;
424
425 ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
426 slot_width);
427
428 return ret;
429}
430
431static const struct snd_kcontrol_new mc1l_amp_ctl =
6d97c09c 432 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 7, 1, 0);
8b908b86
PR		 433
434static const struct snd_kcontrol_new mc1r_amp_ctl =
6d97c09c 435 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 5, 1, 0);
8b908b86
PR		 436
437static const struct snd_kcontrol_new mc2_amp_ctl =
6d97c09c 438 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 9, 1, 0);
8b908b86
PR		 439
440static const struct snd_kcontrol_new atx_amp_ctl =
6d97c09c 441 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0);
8b908b86
PR		 442
443
444/* Virtual mux. The chip does the input selection automatically
445 * as soon as we enable one input. */
446static const char * const adcl_enum_text[] = {
447 "MC1L", "RXINL",
448};
449
450static const struct soc_enum adcl_enum =
451 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcl_enum_text), adcl_enum_text);
452
453static const struct snd_kcontrol_new left_input_mux =
454 SOC_DAPM_ENUM_VIRT("Route", adcl_enum);
455
456static const char * const adcr_enum_text[] = {
457 "MC1R", "MC2", "RXINR", "TXIN",
458};
459
460static const struct soc_enum adcr_enum =
461 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcr_enum_text), adcr_enum_text);
462
463static const struct snd_kcontrol_new right_input_mux =
464 SOC_DAPM_ENUM_VIRT("Route", adcr_enum);
465
466static const struct snd_kcontrol_new samp_ctl =
6d97c09c 467 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
8b908b86
PR		 468
469static const struct snd_kcontrol_new lamp_ctl =
6d97c09c 470 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0);
8b908b86
PR		 471
472static const struct snd_kcontrol_new hlamp_ctl =
6d97c09c 473 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 10, 1, 0);
8b908b86
PR		 474
475static const struct snd_kcontrol_new hramp_ctl =
6d97c09c 476 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 9, 1, 0);
8b908b86
PR		 477
478static const struct snd_kcontrol_new llamp_ctl =
6d97c09c 479 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 16, 1, 0);
8b908b86
PR		 480
481static const struct snd_kcontrol_new lramp_ctl =
6d97c09c 482 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 15, 1, 0);
8b908b86
PR		 483
484static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
485/* Input */
486 SND_SOC_DAPM_INPUT("MC1LIN"),
487 SND_SOC_DAPM_INPUT("MC1RIN"),
488 SND_SOC_DAPM_INPUT("MC2IN"),
489 SND_SOC_DAPM_INPUT("RXINR"),
490 SND_SOC_DAPM_INPUT("RXINL"),
491 SND_SOC_DAPM_INPUT("TXIN"),
492
6d97c09c
GC		 493 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
494 SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0),
8b908b86 495
6d97c09c
GC		 496 SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl),
497 SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl),
498 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
499 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
8b908b86
PR		 500
501 SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
502 &left_input_mux),
503 SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
504 &right_input_mux),
505
506 SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
507 SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
508
6d97c09c
GC		 509 SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0),
510 SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0),
8b908b86
PR		 511
512/* Output */
6d97c09c
GC		 513 SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0),
514 SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0),
8b908b86
PR		 515 SND_SOC_DAPM_OUTPUT("RXOUTL"),
516 SND_SOC_DAPM_OUTPUT("RXOUTR"),
517 SND_SOC_DAPM_OUTPUT("HSL"),
518 SND_SOC_DAPM_OUTPUT("HSR"),
519 SND_SOC_DAPM_OUTPUT("LSP"),
520 SND_SOC_DAPM_OUTPUT("SP"),
521
6d97c09c 522 SND_SOC_DAPM_SWITCH("Speaker Amp", MC13783_AUDIO_RX0, 3, 0, &samp_ctl),
8b908b86 523 SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
6d97c09c
GC		 524 SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0,
525 &hlamp_ctl),
526 SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0, 9, 0,
527 &hramp_ctl),
528 SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0, 16, 0,
529 &llamp_ctl),
530 SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0, 15, 0,
531 &lramp_ctl),
532 SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0, 22, 0),
533 SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1, 5, 0, NULL, 0),
8b908b86
PR		 534};
535
536static struct snd_soc_dapm_route mc13783_routes[] = {
537/* Input */
538 { "MC1L Amp", NULL, "MC1LIN"},
539 { "MC1R Amp", NULL, "MC1RIN" },
540 { "MC2 Amp", NULL, "MC2IN" },
541 { "TXIN Amp", NULL, "TXIN"},
542
543 { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
544 { "PGA Left Input Mux", "RXINL", "RXINL"},
545 { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
546 { "PGA Right Input Mux", "MC2", "MC2 Amp"},
547 { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
548 { "PGA Right Input Mux", "RXINR", "RXINR"},
549
550 { "PGA Left Input", NULL, "PGA Left Input Mux"},
551 { "PGA Right Input", NULL, "PGA Right Input Mux"},
552
553 { "ADC", NULL, "PGA Left Input"},
554 { "ADC", NULL, "PGA Right Input"},
555 { "ADC", NULL, "ADC_Reset"},
556
557/* Output */
558 { "HSL", NULL, "Headset Amp Left" },
559 { "HSR", NULL, "Headset Amp Right"},
560 { "RXOUTL", NULL, "Line out Amp Left"},
561 { "RXOUTR", NULL, "Line out Amp Right"},
562 { "SP", NULL, "Speaker Amp"},
563 { "Speaker Amp", NULL, "DAC PGA"},
564 { "LSP", NULL, "DAC PGA"},
565 { "Headset Amp Left", NULL, "DAC PGA"},
566 { "Headset Amp Right", NULL, "DAC PGA"},
567 { "Line out Amp Left", NULL, "DAC PGA"},
568 { "Line out Amp Right", NULL, "DAC PGA"},
569 { "DAC PGA", NULL, "DAC"},
570 { "DAC", NULL, "DAC_E"},
571};
572
573static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
574 "Mono", "Mono Mix"};
575
576static const struct soc_enum mc13783_enum_3d_mixer =
577 SOC_ENUM_SINGLE(MC13783_AUDIO_RX1, 16, ARRAY_SIZE(mc13783_3d_mixer),
578 mc13783_3d_mixer);
579
580static struct snd_kcontrol_new mc13783_control_list[] = {
581 SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
582 SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
583 SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
584 SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
585};
586
587static int mc13783_probe(struct snd_soc_codec *codec)
588{
589 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
8b908b86
PR		 590
591 mc13xxx_lock(priv->mc13xxx);
592
593 /* these are the reset values */
594 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
595 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
596 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
597 mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
598 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
599 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
600
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PR		 601 if (priv->adc_ssi_port == MC13783_SSI1_PORT)
602 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
603 AUDIO_SSI_SEL, 0);
604 else
605 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
606 0, AUDIO_SSI_SEL);
607
608 if (priv->dac_ssi_port == MC13783_SSI1_PORT)
609 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
610 AUDIO_SSI_SEL, 0);
611 else
612 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
613 0, AUDIO_SSI_SEL);
614
615 mc13xxx_unlock(priv->mc13xxx);
616
617 return 0;
618}
619
620static int mc13783_remove(struct snd_soc_codec *codec)
621{
622 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
623
624 mc13xxx_lock(priv->mc13xxx);
625
626 /* Make sure VAUDIOON is off */
627 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
628
629 mc13xxx_unlock(priv->mc13xxx);
630
631 return 0;
632}
633
634#define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
635
636#define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
637 SNDRV_PCM_FMTBIT_S24_LE)
638
639static struct snd_soc_dai_ops mc13783_ops_dac = {
640 .hw_params = mc13783_pcm_hw_params_dac,
641 .set_fmt = mc13783_set_fmt_async,
642 .set_sysclk = mc13783_set_sysclk_dac,
643 .set_tdm_slot = mc13783_set_tdm_slot_dac,
644};
645
646static struct snd_soc_dai_ops mc13783_ops_codec = {
647 .hw_params = mc13783_pcm_hw_params_codec,
648 .set_fmt = mc13783_set_fmt_async,
649 .set_sysclk = mc13783_set_sysclk_codec,
650 .set_tdm_slot = mc13783_set_tdm_slot_codec,
651};
652
653/*
654 * The mc13783 has two SSI ports, both of them can be routed either
655 * to the voice codec or the stereo DAC. When two different SSI ports
656 * are used for the voice codec and the stereo DAC we can do different
657 * formats and sysclock settings for playback and capture
658 * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
659 * forces us to use symmetric rates (mc13783-hifi).
660 */
661static struct snd_soc_dai_driver mc13783_dai_async[] = {
662 {
663 .name = "mc13783-hifi-playback",
664 .id = MC13783_ID_STEREO_DAC,
665 .playback = {
666 .stream_name = "Playback",
37f45cc5 667 .channels_min = 2,
8b908b86
PR		 668 .channels_max = 2,
669 .rates = SNDRV_PCM_RATE_8000_96000,
670 .formats = MC13783_FORMATS,
671 },
672 .ops = &mc13783_ops_dac,
673 }, {
674 .name = "mc13783-hifi-capture",
675 .id = MC13783_ID_STEREO_CODEC,
676 .capture = {
677 .stream_name = "Capture",
37f45cc5 678 .channels_min = 2,
8b908b86
PR		 679 .channels_max = 2,
680 .rates = MC13783_RATES_RECORD,
681 .formats = MC13783_FORMATS,
682 },
683 .ops = &mc13783_ops_codec,
684 },
685};
686
687static struct snd_soc_dai_ops mc13783_ops_sync = {
688 .hw_params = mc13783_pcm_hw_params_sync,
689 .set_fmt = mc13783_set_fmt_sync,
690 .set_sysclk = mc13783_set_sysclk_sync,
691 .set_tdm_slot = mc13783_set_tdm_slot_sync,
692};
693
694static struct snd_soc_dai_driver mc13783_dai_sync[] = {
695 {
696 .name = "mc13783-hifi",
697 .id = MC13783_ID_SYNC,
698 .playback = {
699 .stream_name = "Playback",
37f45cc5 700 .channels_min = 2,
8b908b86
PR		 701 .channels_max = 2,
702 .rates = SNDRV_PCM_RATE_8000_96000,
703 .formats = MC13783_FORMATS,
704 },
705 .capture = {
706 .stream_name = "Capture",
37f45cc5 707 .channels_min = 2,
8b908b86
PR		 708 .channels_max = 2,
709 .rates = MC13783_RATES_RECORD,
710 .formats = MC13783_FORMATS,
711 },
712 .ops = &mc13783_ops_sync,
713 .symmetric_rates = 1,
714 }
715};
716
717static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
718 .probe = mc13783_probe,
719 .remove = mc13783_remove,
720 .read = mc13783_read,
721 .write = mc13783_write,
b77458da
PR		 722 .controls = mc13783_control_list,
723 .num_controls = ARRAY_SIZE(mc13783_control_list),
724 .dapm_widgets = mc13783_dapm_widgets,
725 .num_dapm_widgets = ARRAY_SIZE(mc13783_dapm_widgets),
726 .dapm_routes = mc13783_routes,
727 .num_dapm_routes = ARRAY_SIZE(mc13783_routes),
8b908b86
PR		 728};
729
730static int mc13783_codec_probe(struct platform_device *pdev)
731{
732 struct mc13xxx *mc13xxx;
733 struct mc13783_priv *priv;
734 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
735 int ret;
736
737 mc13xxx = dev_get_drvdata(pdev->dev.parent);
738
739
740 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
741 if (priv == NULL)
742 return -ENOMEM;
743
744 dev_set_drvdata(&pdev->dev, priv);
745 priv->mc13xxx = mc13xxx;
746 if (pdata) {
747 priv->adc_ssi_port = pdata->adc_ssi_port;
748 priv->dac_ssi_port = pdata->dac_ssi_port;
749 } else {
750 priv->adc_ssi_port = MC13783_SSI1_PORT;
751 priv->dac_ssi_port = MC13783_SSI2_PORT;
752 }
753
754 if (priv->adc_ssi_port == priv->dac_ssi_port)
755 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
756 mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
757 else
758 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
759 mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
760
761 if (ret)
762 goto err_register_codec;
763
764 return 0;
765
766err_register_codec:
767 dev_err(&pdev->dev, "register codec failed with %d\n", ret);
768
769 return ret;
770}
771
772static int mc13783_codec_remove(struct platform_device *pdev)
773{
774 snd_soc_unregister_codec(&pdev->dev);
775
776 return 0;
777}
778
779static struct platform_driver mc13783_codec_driver = {
780 .driver = {
781 .name = "mc13783-codec",
782 .owner = THIS_MODULE,
783 },
784 .probe = mc13783_codec_probe,
7a79e94e 785 .remove = mc13783_codec_remove,
8b908b86
PR		 786};
787
b77458da 788module_platform_driver(mc13783_codec_driver);
8b908b86
PR		 789
790MODULE_DESCRIPTION("ASoC MC13783 driver");
791MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
792MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
793MODULE_LICENSE("GPL");
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