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d808fe9f TM |
1 | /* |
2 | * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; version 2 of the License. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program; if not, write to the Free Software | |
15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/moduleparam.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/pm.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/regmap.h> | |
27 | #include <sound/core.h> | |
28 | #include <sound/pcm.h> | |
29 | #include <sound/pcm_params.h> | |
30 | #include <sound/soc.h> | |
31 | #include <sound/tlv.h> | |
32 | #include "ml26124.h" | |
33 | ||
34 | #define DVOL_CTL_DVMUTE_ON BIT(4) /* Digital volume MUTE On */ | |
35 | #define DVOL_CTL_DVMUTE_OFF 0 /* Digital volume MUTE Off */ | |
36 | #define ML26124_SAI_NO_DELAY BIT(1) | |
37 | #define ML26124_SAI_FRAME_SYNC (BIT(5) | BIT(0)) /* For mono (Telecodec) */ | |
38 | #define ML26134_CACHESIZE 212 | |
39 | #define ML26124_VMID BIT(1) | |
40 | #define ML26124_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 |\ | |
41 | SNDRV_PCM_RATE_48000) | |
42 | #define ML26124_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |\ | |
43 | SNDRV_PCM_FMTBIT_S32_LE) | |
44 | #define ML26124_NUM_REGISTER ML26134_CACHESIZE | |
45 | ||
46 | struct ml26124_priv { | |
47 | u32 mclk; | |
48 | u32 rate; | |
49 | struct regmap *regmap; | |
50 | int clk_in; | |
51 | struct snd_pcm_substream *substream; | |
52 | }; | |
53 | ||
54 | struct clk_coeff { | |
55 | u32 mclk; | |
56 | u32 rate; | |
57 | u8 pllnl; | |
58 | u8 pllnh; | |
59 | u8 pllml; | |
60 | u8 pllmh; | |
61 | u8 plldiv; | |
62 | }; | |
63 | ||
64 | /* ML26124 configuration */ | |
65 | static const DECLARE_TLV_DB_SCALE(digital_tlv, -7150, 50, 0); | |
66 | ||
67 | static const DECLARE_TLV_DB_SCALE(alclvl, -2250, 150, 0); | |
68 | static const DECLARE_TLV_DB_SCALE(mingain, -1200, 600, 0); | |
69 | static const DECLARE_TLV_DB_SCALE(maxgain, -675, 600, 0); | |
70 | static const DECLARE_TLV_DB_SCALE(boost_vol, -1200, 75, 0); | |
71 | static const DECLARE_TLV_DB_SCALE(ngth, -7650, 150, 0); | |
72 | ||
73 | static const char * const ml26124_companding[] = {"16bit PCM", "u-law", | |
74 | "A-law"}; | |
75 | ||
c3518d1b TI |
76 | static SOC_ENUM_SINGLE_DECL(ml26124_adc_companding_enum, |
77 | ML26124_SAI_TRANS_CTL, 6, ml26124_companding); | |
d808fe9f | 78 | |
c3518d1b TI |
79 | static SOC_ENUM_SINGLE_DECL(ml26124_dac_companding_enum, |
80 | ML26124_SAI_RCV_CTL, 6, ml26124_companding); | |
d808fe9f TM |
81 | |
82 | static const struct snd_kcontrol_new ml26124_snd_controls[] = { | |
83 | SOC_SINGLE_TLV("Capture Digital Volume", ML26124_RECORD_DIG_VOL, 0, | |
84 | 0xff, 1, digital_tlv), | |
85 | SOC_SINGLE_TLV("Playback Digital Volume", ML26124_PLBAK_DIG_VOL, 0, | |
86 | 0xff, 1, digital_tlv), | |
87 | SOC_SINGLE_TLV("Digital Boost Volume", ML26124_DIGI_BOOST_VOL, 0, | |
88 | 0x3f, 0, boost_vol), | |
89 | SOC_SINGLE_TLV("EQ Band0 Volume", ML26124_EQ_GAIN_BRAND0, 0, | |
90 | 0xff, 1, digital_tlv), | |
91 | SOC_SINGLE_TLV("EQ Band1 Volume", ML26124_EQ_GAIN_BRAND1, 0, | |
92 | 0xff, 1, digital_tlv), | |
93 | SOC_SINGLE_TLV("EQ Band2 Volume", ML26124_EQ_GAIN_BRAND2, 0, | |
94 | 0xff, 1, digital_tlv), | |
95 | SOC_SINGLE_TLV("EQ Band3 Volume", ML26124_EQ_GAIN_BRAND3, 0, | |
96 | 0xff, 1, digital_tlv), | |
97 | SOC_SINGLE_TLV("EQ Band4 Volume", ML26124_EQ_GAIN_BRAND4, 0, | |
98 | 0xff, 1, digital_tlv), | |
99 | SOC_SINGLE_TLV("ALC Target Level", ML26124_ALC_TARGET_LEV, 0, | |
100 | 0xf, 1, alclvl), | |
101 | SOC_SINGLE_TLV("ALC Min Input Volume", ML26124_ALC_MAXMIN_GAIN, 0, | |
102 | 7, 0, mingain), | |
103 | SOC_SINGLE_TLV("ALC Max Input Volume", ML26124_ALC_MAXMIN_GAIN, 4, | |
104 | 7, 1, maxgain), | |
105 | SOC_SINGLE_TLV("Playback Limiter Min Input Volume", | |
106 | ML26124_PL_MAXMIN_GAIN, 0, 7, 0, mingain), | |
107 | SOC_SINGLE_TLV("Playback Limiter Max Input Volume", | |
108 | ML26124_PL_MAXMIN_GAIN, 4, 7, 1, maxgain), | |
109 | SOC_SINGLE_TLV("Playback Boost Volume", ML26124_PLYBAK_BOST_VOL, 0, | |
110 | 0x3f, 0, boost_vol), | |
111 | SOC_SINGLE("DC High Pass Filter Switch", ML26124_FILTER_EN, 0, 1, 0), | |
112 | SOC_SINGLE("Noise High Pass Filter Switch", ML26124_FILTER_EN, 1, 1, 0), | |
113 | SOC_SINGLE("ZC Switch", ML26124_PW_ZCCMP_PW_MNG, 1, | |
114 | 1, 0), | |
115 | SOC_SINGLE("EQ Band0 Switch", ML26124_FILTER_EN, 2, 1, 0), | |
116 | SOC_SINGLE("EQ Band1 Switch", ML26124_FILTER_EN, 3, 1, 0), | |
117 | SOC_SINGLE("EQ Band2 Switch", ML26124_FILTER_EN, 4, 1, 0), | |
118 | SOC_SINGLE("EQ Band3 Switch", ML26124_FILTER_EN, 5, 1, 0), | |
119 | SOC_SINGLE("EQ Band4 Switch", ML26124_FILTER_EN, 6, 1, 0), | |
120 | SOC_SINGLE("Play Limiter", ML26124_DVOL_CTL, 0, 1, 0), | |
121 | SOC_SINGLE("Capture Limiter", ML26124_DVOL_CTL, 1, 1, 0), | |
122 | SOC_SINGLE("Digital Volume Fade Switch", ML26124_DVOL_CTL, 3, 1, 0), | |
123 | SOC_SINGLE("Digital Switch", ML26124_DVOL_CTL, 4, 1, 0), | |
124 | SOC_ENUM("DAC Companding", ml26124_dac_companding_enum), | |
125 | SOC_ENUM("ADC Companding", ml26124_adc_companding_enum), | |
126 | }; | |
127 | ||
128 | static const struct snd_kcontrol_new ml26124_output_mixer_controls[] = { | |
129 | SOC_DAPM_SINGLE("DAC Switch", ML26124_SPK_AMP_OUT, 1, 1, 0), | |
130 | SOC_DAPM_SINGLE("Line in loopback Switch", ML26124_SPK_AMP_OUT, 3, 1, | |
131 | 0), | |
132 | SOC_DAPM_SINGLE("PGA Switch", ML26124_SPK_AMP_OUT, 5, 1, 0), | |
133 | }; | |
134 | ||
135 | /* Input mux */ | |
136 | static const char * const ml26124_input_select[] = {"Analog MIC SingleEnded in", | |
137 | "Digital MIC in", "Analog MIC Differential in"}; | |
138 | ||
c3518d1b TI |
139 | static SOC_ENUM_SINGLE_DECL(ml26124_insel_enum, |
140 | ML26124_MIC_IF_CTL, 0, ml26124_input_select); | |
d808fe9f TM |
141 | |
142 | static const struct snd_kcontrol_new ml26124_input_mux_controls = | |
143 | SOC_DAPM_ENUM("Input Select", ml26124_insel_enum); | |
144 | ||
145 | static const struct snd_kcontrol_new ml26124_line_control = | |
146 | SOC_DAPM_SINGLE("Switch", ML26124_PW_LOUT_PW_MNG, 1, 1, 0); | |
147 | ||
148 | static const struct snd_soc_dapm_widget ml26124_dapm_widgets[] = { | |
149 | SND_SOC_DAPM_SUPPLY("MCLKEN", ML26124_CLK_EN, 0, 0, NULL, 0), | |
150 | SND_SOC_DAPM_SUPPLY("PLLEN", ML26124_CLK_EN, 1, 0, NULL, 0), | |
151 | SND_SOC_DAPM_SUPPLY("PLLOE", ML26124_CLK_EN, 2, 0, NULL, 0), | |
152 | SND_SOC_DAPM_SUPPLY("MICBIAS", ML26124_PW_REF_PW_MNG, 2, 0, NULL, 0), | |
153 | SND_SOC_DAPM_MIXER("Output Mixer", SND_SOC_NOPM, 0, 0, | |
154 | &ml26124_output_mixer_controls[0], | |
155 | ARRAY_SIZE(ml26124_output_mixer_controls)), | |
156 | SND_SOC_DAPM_DAC("DAC", "Playback", ML26124_PW_DAC_PW_MNG, 1, 0), | |
157 | SND_SOC_DAPM_ADC("ADC", "Capture", ML26124_PW_IN_PW_MNG, 1, 0), | |
158 | SND_SOC_DAPM_PGA("PGA", ML26124_PW_IN_PW_MNG, 3, 0, NULL, 0), | |
159 | SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, | |
160 | &ml26124_input_mux_controls), | |
161 | SND_SOC_DAPM_SWITCH("Line Out Enable", SND_SOC_NOPM, 0, 0, | |
162 | &ml26124_line_control), | |
163 | SND_SOC_DAPM_INPUT("MDIN"), | |
164 | SND_SOC_DAPM_INPUT("MIN"), | |
165 | SND_SOC_DAPM_INPUT("LIN"), | |
166 | SND_SOC_DAPM_OUTPUT("SPOUT"), | |
167 | SND_SOC_DAPM_OUTPUT("LOUT"), | |
168 | }; | |
169 | ||
170 | static const struct snd_soc_dapm_route ml26124_intercon[] = { | |
171 | /* Supply */ | |
172 | {"DAC", NULL, "MCLKEN"}, | |
173 | {"ADC", NULL, "MCLKEN"}, | |
174 | {"DAC", NULL, "PLLEN"}, | |
175 | {"ADC", NULL, "PLLEN"}, | |
176 | {"DAC", NULL, "PLLOE"}, | |
177 | {"ADC", NULL, "PLLOE"}, | |
178 | ||
179 | /* output mixer */ | |
180 | {"Output Mixer", "DAC Switch", "DAC"}, | |
181 | {"Output Mixer", "Line in loopback Switch", "LIN"}, | |
182 | ||
183 | /* outputs */ | |
184 | {"LOUT", NULL, "Output Mixer"}, | |
185 | {"SPOUT", NULL, "Output Mixer"}, | |
186 | {"Line Out Enable", NULL, "LOUT"}, | |
187 | ||
188 | /* input */ | |
189 | {"ADC", NULL, "Input Mux"}, | |
190 | {"Input Mux", "Analog MIC SingleEnded in", "PGA"}, | |
191 | {"Input Mux", "Analog MIC Differential in", "PGA"}, | |
192 | {"PGA", NULL, "MIN"}, | |
193 | }; | |
194 | ||
195 | /* PLLOutputFreq(Hz) = InputMclkFreq(Hz) * PLLM / (PLLN * PLLDIV) */ | |
196 | static const struct clk_coeff coeff_div[] = { | |
197 | {12288000, 16000, 0xc, 0x0, 0x20, 0x0, 0x4}, | |
198 | {12288000, 32000, 0xc, 0x0, 0x20, 0x0, 0x4}, | |
199 | {12288000, 48000, 0xc, 0x0, 0x30, 0x0, 0x4}, | |
200 | }; | |
201 | ||
202 | static struct reg_default ml26124_reg[] = { | |
203 | /* CLOCK control Register */ | |
204 | {0x00, 0x00 }, /* Sampling Rate */ | |
205 | {0x02, 0x00}, /* PLL NL */ | |
206 | {0x04, 0x00}, /* PLLNH */ | |
207 | {0x06, 0x00}, /* PLLML */ | |
208 | {0x08, 0x00}, /* MLLMH */ | |
209 | {0x0a, 0x00}, /* PLLDIV */ | |
210 | {0x0c, 0x00}, /* Clock Enable */ | |
211 | {0x0e, 0x00}, /* CLK Input/Output Control */ | |
212 | ||
213 | /* System Control Register */ | |
214 | {0x10, 0x00}, /* Software RESET */ | |
215 | {0x12, 0x00}, /* Record/Playback Run */ | |
216 | {0x14, 0x00}, /* Mic Input/Output control */ | |
217 | ||
218 | /* Power Management Register */ | |
219 | {0x20, 0x00}, /* Reference Power Management */ | |
220 | {0x22, 0x00}, /* Input Power Management */ | |
221 | {0x24, 0x00}, /* DAC Power Management */ | |
222 | {0x26, 0x00}, /* SP-AMP Power Management */ | |
223 | {0x28, 0x00}, /* LINEOUT Power Management */ | |
224 | {0x2a, 0x00}, /* VIDEO Power Management */ | |
225 | {0x2e, 0x00}, /* AC-CMP Power Management */ | |
226 | ||
227 | /* Analog reference Control Register */ | |
228 | {0x30, 0x04}, /* MICBIAS Voltage Control */ | |
229 | ||
230 | /* Input/Output Amplifier Control Register */ | |
231 | {0x32, 0x10}, /* MIC Input Volume */ | |
232 | {0x38, 0x00}, /* Mic Boost Volume */ | |
233 | {0x3a, 0x33}, /* Speaker AMP Volume */ | |
234 | {0x48, 0x00}, /* AMP Volume Control Function Enable */ | |
235 | {0x4a, 0x00}, /* Amplifier Volume Fader Control */ | |
236 | ||
237 | /* Analog Path Control Register */ | |
238 | {0x54, 0x00}, /* Speaker AMP Output Control */ | |
239 | {0x5a, 0x00}, /* Mic IF Control */ | |
240 | {0xe8, 0x01}, /* Mic Select Control */ | |
241 | ||
242 | /* Audio Interface Control Register */ | |
243 | {0x60, 0x00}, /* SAI-Trans Control */ | |
244 | {0x62, 0x00}, /* SAI-Receive Control */ | |
245 | {0x64, 0x00}, /* SAI Mode select */ | |
246 | ||
247 | /* DSP Control Register */ | |
248 | {0x66, 0x01}, /* Filter Func Enable */ | |
249 | {0x68, 0x00}, /* Volume Control Func Enable */ | |
250 | {0x6A, 0x00}, /* Mixer & Volume Control*/ | |
251 | {0x6C, 0xff}, /* Record Digital Volume */ | |
252 | {0x70, 0xff}, /* Playback Digital Volume */ | |
253 | {0x72, 0x10}, /* Digital Boost Volume */ | |
254 | {0x74, 0xe7}, /* EQ gain Band0 */ | |
255 | {0x76, 0xe7}, /* EQ gain Band1 */ | |
256 | {0x78, 0xe7}, /* EQ gain Band2 */ | |
257 | {0x7A, 0xe7}, /* EQ gain Band3 */ | |
258 | {0x7C, 0xe7}, /* EQ gain Band4 */ | |
259 | {0x7E, 0x00}, /* HPF2 CutOff*/ | |
260 | {0x80, 0x00}, /* EQ Band0 Coef0L */ | |
261 | {0x82, 0x00}, /* EQ Band0 Coef0H */ | |
262 | {0x84, 0x00}, /* EQ Band0 Coef0L */ | |
263 | {0x86, 0x00}, /* EQ Band0 Coef0H */ | |
264 | {0x88, 0x00}, /* EQ Band1 Coef0L */ | |
265 | {0x8A, 0x00}, /* EQ Band1 Coef0H */ | |
266 | {0x8C, 0x00}, /* EQ Band1 Coef0L */ | |
267 | {0x8E, 0x00}, /* EQ Band1 Coef0H */ | |
268 | {0x90, 0x00}, /* EQ Band2 Coef0L */ | |
269 | {0x92, 0x00}, /* EQ Band2 Coef0H */ | |
270 | {0x94, 0x00}, /* EQ Band2 Coef0L */ | |
271 | {0x96, 0x00}, /* EQ Band2 Coef0H */ | |
272 | {0x98, 0x00}, /* EQ Band3 Coef0L */ | |
273 | {0x9A, 0x00}, /* EQ Band3 Coef0H */ | |
274 | {0x9C, 0x00}, /* EQ Band3 Coef0L */ | |
275 | {0x9E, 0x00}, /* EQ Band3 Coef0H */ | |
276 | {0xA0, 0x00}, /* EQ Band4 Coef0L */ | |
277 | {0xA2, 0x00}, /* EQ Band4 Coef0H */ | |
278 | {0xA4, 0x00}, /* EQ Band4 Coef0L */ | |
279 | {0xA6, 0x00}, /* EQ Band4 Coef0H */ | |
280 | ||
281 | /* ALC Control Register */ | |
282 | {0xb0, 0x00}, /* ALC Mode */ | |
283 | {0xb2, 0x02}, /* ALC Attack Time */ | |
284 | {0xb4, 0x03}, /* ALC Decay Time */ | |
285 | {0xb6, 0x00}, /* ALC Hold Time */ | |
286 | {0xb8, 0x0b}, /* ALC Target Level */ | |
287 | {0xba, 0x70}, /* ALC Max/Min Gain */ | |
288 | {0xbc, 0x00}, /* Noise Gate Threshold */ | |
289 | {0xbe, 0x00}, /* ALC ZeroCross TimeOut */ | |
290 | ||
291 | /* Playback Limiter Control Register */ | |
292 | {0xc0, 0x04}, /* PL Attack Time */ | |
293 | {0xc2, 0x05}, /* PL Decay Time */ | |
294 | {0xc4, 0x0d}, /* PL Target Level */ | |
295 | {0xc6, 0x70}, /* PL Max/Min Gain */ | |
296 | {0xc8, 0x10}, /* Playback Boost Volume */ | |
297 | {0xca, 0x00}, /* PL ZeroCross TimeOut */ | |
298 | ||
299 | /* Video Amplifier Control Register */ | |
300 | {0xd0, 0x01}, /* VIDEO AMP Gain Control */ | |
301 | {0xd2, 0x01}, /* VIDEO AMP Setup 1 */ | |
302 | {0xd4, 0x01}, /* VIDEO AMP Control2 */ | |
303 | }; | |
304 | ||
305 | /* Get sampling rate value of sampling rate setting register (0x0) */ | |
306 | static inline int get_srate(int rate) | |
307 | { | |
308 | int srate; | |
309 | ||
310 | switch (rate) { | |
311 | case 16000: | |
312 | srate = 3; | |
313 | break; | |
314 | case 32000: | |
315 | srate = 6; | |
316 | break; | |
317 | case 48000: | |
318 | srate = 8; | |
319 | break; | |
320 | default: | |
321 | return -EINVAL; | |
322 | } | |
323 | return srate; | |
324 | } | |
325 | ||
326 | static inline int get_coeff(int mclk, int rate) | |
327 | { | |
328 | int i; | |
329 | ||
330 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
331 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
332 | return i; | |
333 | } | |
334 | return -EINVAL; | |
335 | } | |
336 | ||
337 | static int ml26124_hw_params(struct snd_pcm_substream *substream, | |
338 | struct snd_pcm_hw_params *hw_params, | |
339 | struct snd_soc_dai *dai) | |
340 | { | |
341 | struct snd_soc_codec *codec = dai->codec; | |
342 | struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec); | |
343 | int i = get_coeff(priv->mclk, params_rate(hw_params)); | |
344 | ||
8b4b3036 TI |
345 | if (i < 0) |
346 | return i; | |
d808fe9f TM |
347 | priv->substream = substream; |
348 | priv->rate = params_rate(hw_params); | |
349 | ||
350 | if (priv->clk_in) { | |
351 | switch (priv->mclk / params_rate(hw_params)) { | |
352 | case 256: | |
353 | snd_soc_update_bits(codec, ML26124_CLK_CTL, | |
354 | BIT(0) | BIT(1), 1); | |
355 | break; | |
356 | case 512: | |
357 | snd_soc_update_bits(codec, ML26124_CLK_CTL, | |
358 | BIT(0) | BIT(1), 2); | |
359 | break; | |
360 | case 1024: | |
361 | snd_soc_update_bits(codec, ML26124_CLK_CTL, | |
362 | BIT(0) | BIT(1), 3); | |
363 | break; | |
364 | default: | |
365 | dev_err(codec->dev, "Unsupported MCLKI\n"); | |
366 | break; | |
367 | } | |
368 | } else { | |
369 | snd_soc_update_bits(codec, ML26124_CLK_CTL, | |
370 | BIT(0) | BIT(1), 0); | |
371 | } | |
372 | ||
373 | switch (params_rate(hw_params)) { | |
374 | case 16000: | |
375 | snd_soc_update_bits(codec, ML26124_SMPLING_RATE, 0xf, | |
376 | get_srate(params_rate(hw_params))); | |
377 | snd_soc_update_bits(codec, ML26124_PLLNL, 0xff, | |
378 | coeff_div[i].pllnl); | |
379 | snd_soc_update_bits(codec, ML26124_PLLNH, 0x1, | |
380 | coeff_div[i].pllnh); | |
381 | snd_soc_update_bits(codec, ML26124_PLLML, 0xff, | |
382 | coeff_div[i].pllml); | |
383 | snd_soc_update_bits(codec, ML26124_PLLMH, 0x3f, | |
384 | coeff_div[i].pllmh); | |
385 | snd_soc_update_bits(codec, ML26124_PLLDIV, 0x1f, | |
386 | coeff_div[i].plldiv); | |
387 | break; | |
388 | case 32000: | |
389 | snd_soc_update_bits(codec, ML26124_SMPLING_RATE, 0xf, | |
390 | get_srate(params_rate(hw_params))); | |
391 | snd_soc_update_bits(codec, ML26124_PLLNL, 0xff, | |
392 | coeff_div[i].pllnl); | |
393 | snd_soc_update_bits(codec, ML26124_PLLNH, 0x1, | |
394 | coeff_div[i].pllnh); | |
395 | snd_soc_update_bits(codec, ML26124_PLLML, 0xff, | |
396 | coeff_div[i].pllml); | |
397 | snd_soc_update_bits(codec, ML26124_PLLMH, 0x3f, | |
398 | coeff_div[i].pllmh); | |
399 | snd_soc_update_bits(codec, ML26124_PLLDIV, 0x1f, | |
400 | coeff_div[i].plldiv); | |
401 | break; | |
402 | case 48000: | |
403 | snd_soc_update_bits(codec, ML26124_SMPLING_RATE, 0xf, | |
404 | get_srate(params_rate(hw_params))); | |
405 | snd_soc_update_bits(codec, ML26124_PLLNL, 0xff, | |
406 | coeff_div[i].pllnl); | |
407 | snd_soc_update_bits(codec, ML26124_PLLNH, 0x1, | |
408 | coeff_div[i].pllnh); | |
409 | snd_soc_update_bits(codec, ML26124_PLLML, 0xff, | |
410 | coeff_div[i].pllml); | |
411 | snd_soc_update_bits(codec, ML26124_PLLMH, 0x3f, | |
412 | coeff_div[i].pllmh); | |
413 | snd_soc_update_bits(codec, ML26124_PLLDIV, 0x1f, | |
414 | coeff_div[i].plldiv); | |
415 | break; | |
416 | default: | |
417 | pr_err("%s:this rate is no support for ml26124\n", __func__); | |
418 | return -EINVAL; | |
419 | } | |
420 | ||
421 | return 0; | |
422 | } | |
423 | ||
424 | static int ml26124_mute(struct snd_soc_dai *dai, int mute) | |
425 | { | |
426 | struct snd_soc_codec *codec = dai->codec; | |
427 | struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec); | |
428 | ||
429 | switch (priv->substream->stream) { | |
430 | case SNDRV_PCM_STREAM_CAPTURE: | |
431 | snd_soc_update_bits(codec, ML26124_REC_PLYBAK_RUN, BIT(0), 1); | |
432 | break; | |
433 | case SNDRV_PCM_STREAM_PLAYBACK: | |
434 | snd_soc_update_bits(codec, ML26124_REC_PLYBAK_RUN, BIT(1), 2); | |
435 | break; | |
436 | } | |
437 | ||
438 | if (mute) | |
439 | snd_soc_update_bits(codec, ML26124_DVOL_CTL, BIT(4), | |
440 | DVOL_CTL_DVMUTE_ON); | |
441 | else | |
442 | snd_soc_update_bits(codec, ML26124_DVOL_CTL, BIT(4), | |
443 | DVOL_CTL_DVMUTE_OFF); | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
448 | static int ml26124_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
449 | unsigned int fmt) | |
450 | { | |
451 | unsigned char mode; | |
452 | struct snd_soc_codec *codec = codec_dai->codec; | |
453 | ||
454 | /* set master/slave audio interface */ | |
455 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
456 | case SND_SOC_DAIFMT_CBM_CFM: | |
457 | mode = 1; | |
458 | break; | |
459 | case SND_SOC_DAIFMT_CBS_CFS: | |
460 | mode = 0; | |
461 | break; | |
462 | default: | |
463 | return -EINVAL; | |
464 | } | |
465 | snd_soc_update_bits(codec, ML26124_SAI_MODE_SEL, BIT(0), mode); | |
466 | ||
467 | /* interface format */ | |
468 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
469 | case SND_SOC_DAIFMT_I2S: | |
470 | break; | |
471 | default: | |
472 | return -EINVAL; | |
473 | } | |
474 | ||
475 | /* clock inversion */ | |
476 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
477 | case SND_SOC_DAIFMT_NB_NF: | |
478 | break; | |
479 | default: | |
480 | return -EINVAL; | |
481 | } | |
482 | ||
483 | return 0; | |
484 | } | |
485 | ||
486 | static int ml26124_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
487 | int clk_id, unsigned int freq, int dir) | |
488 | { | |
489 | struct snd_soc_codec *codec = codec_dai->codec; | |
490 | struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec); | |
491 | ||
492 | switch (clk_id) { | |
493 | case ML26124_USE_PLLOUT: | |
494 | priv->clk_in = ML26124_USE_PLLOUT; | |
495 | break; | |
496 | case ML26124_USE_MCLKI: | |
497 | priv->clk_in = ML26124_USE_MCLKI; | |
498 | break; | |
499 | default: | |
500 | return -EINVAL; | |
501 | } | |
502 | ||
503 | priv->mclk = freq; | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
508 | static int ml26124_set_bias_level(struct snd_soc_codec *codec, | |
509 | enum snd_soc_bias_level level) | |
510 | { | |
511 | struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec); | |
512 | ||
513 | switch (level) { | |
514 | case SND_SOC_BIAS_ON: | |
515 | snd_soc_update_bits(codec, ML26124_PW_SPAMP_PW_MNG, | |
516 | ML26124_R26_MASK, ML26124_BLT_PREAMP_ON); | |
517 | msleep(100); | |
518 | snd_soc_update_bits(codec, ML26124_PW_SPAMP_PW_MNG, | |
519 | ML26124_R26_MASK, | |
520 | ML26124_MICBEN_ON | ML26124_BLT_ALL_ON); | |
521 | break; | |
522 | case SND_SOC_BIAS_PREPARE: | |
523 | break; | |
524 | case SND_SOC_BIAS_STANDBY: | |
525 | /* VMID ON */ | |
526 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | |
527 | snd_soc_update_bits(codec, ML26124_PW_REF_PW_MNG, | |
528 | ML26124_VMID, ML26124_VMID); | |
529 | msleep(500); | |
530 | regcache_sync(priv->regmap); | |
531 | } | |
532 | break; | |
533 | case SND_SOC_BIAS_OFF: | |
534 | /* VMID OFF */ | |
535 | snd_soc_update_bits(codec, ML26124_PW_REF_PW_MNG, | |
536 | ML26124_VMID, 0); | |
537 | break; | |
538 | } | |
539 | codec->dapm.bias_level = level; | |
540 | return 0; | |
541 | } | |
542 | ||
543 | static const struct snd_soc_dai_ops ml26124_dai_ops = { | |
544 | .hw_params = ml26124_hw_params, | |
545 | .digital_mute = ml26124_mute, | |
546 | .set_fmt = ml26124_set_dai_fmt, | |
547 | .set_sysclk = ml26124_set_dai_sysclk, | |
548 | }; | |
549 | ||
550 | static struct snd_soc_dai_driver ml26124_dai = { | |
551 | .name = "ml26124-hifi", | |
552 | .playback = { | |
553 | .stream_name = "Playback", | |
554 | .channels_min = 1, | |
555 | .channels_max = 2, | |
556 | .rates = ML26124_RATES, | |
557 | .formats = ML26124_FORMATS,}, | |
558 | .capture = { | |
559 | .stream_name = "Capture", | |
560 | .channels_min = 1, | |
561 | .channels_max = 2, | |
562 | .rates = ML26124_RATES, | |
563 | .formats = ML26124_FORMATS,}, | |
564 | .ops = &ml26124_dai_ops, | |
565 | .symmetric_rates = 1, | |
566 | }; | |
567 | ||
568 | #ifdef CONFIG_PM | |
569 | static int ml26124_suspend(struct snd_soc_codec *codec) | |
570 | { | |
571 | ml26124_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
572 | ||
573 | return 0; | |
574 | } | |
575 | ||
576 | static int ml26124_resume(struct snd_soc_codec *codec) | |
577 | { | |
578 | ml26124_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
579 | ||
580 | return 0; | |
581 | } | |
582 | #else | |
583 | #define ml26124_suspend NULL | |
584 | #define ml26124_resume NULL | |
585 | #endif | |
586 | ||
587 | static int ml26124_probe(struct snd_soc_codec *codec) | |
588 | { | |
d808fe9f TM |
589 | /* Software Reset */ |
590 | snd_soc_update_bits(codec, ML26124_SW_RST, 0x01, 1); | |
591 | snd_soc_update_bits(codec, ML26124_SW_RST, 0x01, 0); | |
592 | ||
593 | ml26124_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
594 | ||
595 | return 0; | |
596 | } | |
597 | ||
598 | static struct snd_soc_codec_driver soc_codec_dev_ml26124 = { | |
599 | .probe = ml26124_probe, | |
600 | .suspend = ml26124_suspend, | |
601 | .resume = ml26124_resume, | |
602 | .set_bias_level = ml26124_set_bias_level, | |
603 | .dapm_widgets = ml26124_dapm_widgets, | |
604 | .num_dapm_widgets = ARRAY_SIZE(ml26124_dapm_widgets), | |
605 | .dapm_routes = ml26124_intercon, | |
606 | .num_dapm_routes = ARRAY_SIZE(ml26124_intercon), | |
607 | .controls = ml26124_snd_controls, | |
608 | .num_controls = ARRAY_SIZE(ml26124_snd_controls), | |
609 | }; | |
610 | ||
611 | static const struct regmap_config ml26124_i2c_regmap = { | |
612 | .val_bits = 8, | |
613 | .reg_bits = 8, | |
614 | .max_register = ML26124_NUM_REGISTER, | |
615 | .reg_defaults = ml26124_reg, | |
616 | .num_reg_defaults = ARRAY_SIZE(ml26124_reg), | |
617 | .cache_type = REGCACHE_RBTREE, | |
618 | .write_flag_mask = 0x01, | |
619 | }; | |
620 | ||
7a79e94e BP |
621 | static int ml26124_i2c_probe(struct i2c_client *i2c, |
622 | const struct i2c_device_id *id) | |
d808fe9f TM |
623 | { |
624 | struct ml26124_priv *priv; | |
625 | int ret; | |
626 | ||
627 | priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); | |
628 | if (!priv) | |
629 | return -ENOMEM; | |
630 | ||
631 | i2c_set_clientdata(i2c, priv); | |
632 | ||
8994a5e1 | 633 | priv->regmap = devm_regmap_init_i2c(i2c, &ml26124_i2c_regmap); |
d808fe9f TM |
634 | if (IS_ERR(priv->regmap)) { |
635 | ret = PTR_ERR(priv->regmap); | |
636 | dev_err(&i2c->dev, "regmap_init_i2c() failed: %d\n", ret); | |
637 | return ret; | |
638 | } | |
639 | ||
640 | return snd_soc_register_codec(&i2c->dev, | |
641 | &soc_codec_dev_ml26124, &ml26124_dai, 1); | |
642 | } | |
643 | ||
7a79e94e | 644 | static int ml26124_i2c_remove(struct i2c_client *client) |
d808fe9f | 645 | { |
d808fe9f | 646 | snd_soc_unregister_codec(&client->dev); |
d808fe9f TM |
647 | return 0; |
648 | } | |
649 | ||
650 | static const struct i2c_device_id ml26124_i2c_id[] = { | |
651 | { "ml26124", 0 }, | |
652 | { } | |
653 | }; | |
654 | MODULE_DEVICE_TABLE(i2c, ml26124_i2c_id); | |
655 | ||
656 | static struct i2c_driver ml26124_i2c_driver = { | |
657 | .driver = { | |
658 | .name = "ml26124", | |
659 | .owner = THIS_MODULE, | |
660 | }, | |
661 | .probe = ml26124_i2c_probe, | |
7a79e94e | 662 | .remove = ml26124_i2c_remove, |
d808fe9f TM |
663 | .id_table = ml26124_i2c_id, |
664 | }; | |
665 | ||
666 | module_i2c_driver(ml26124_i2c_driver); | |
667 | ||
668 | MODULE_AUTHOR("Tomoya MORINAGA <tomoya.rohm@gmail.com>"); | |
669 | MODULE_DESCRIPTION("LAPIS Semiconductor ML26124 ALSA SoC codec driver"); | |
670 | MODULE_LICENSE("GPL"); |