d8085222 |
1 | /* |
2 | * rt5631.c -- RT5631 ALSA Soc Audio driver |
3 | * |
4 | * Copyright 2011 Realtek Microelectronics |
5 | * |
6 | * Author: flove <flove@realtek.com> |
7 | * |
8 | * Based on WM8753.c |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. |
13 | * |
14 | */ |
15 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> |
17 | #include <linux/init.h> |
18 | #include <linux/delay.h> |
19 | #include <linux/pm.h> |
20 | #include <linux/i2c.h> |
21 | #include <linux/platform_device.h> |
22 | #include <linux/spi/spi.h> |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> |
25 | #include <sound/pcm_params.h> |
26 | #include <sound/soc.h> |
27 | #include <sound/soc-dapm.h> |
28 | #include <sound/initval.h> |
29 | #include <sound/tlv.h> |
30 | |
31 | #include "rt5631.h" |
32 | |
33 | struct rt5631_priv { |
d8085222 |
34 | int codec_version; |
35 | int master; |
36 | int sysclk; |
37 | int rx_rate; |
38 | int bclk_rate; |
39 | int dmic_used_flag; |
40 | }; |
41 | |
42 | static const u16 rt5631_reg[RT5631_VENDOR_ID2 + 1] = { |
43 | [RT5631_SPK_OUT_VOL] = 0x8888, |
44 | [RT5631_HP_OUT_VOL] = 0x8080, |
45 | [RT5631_MONO_AXO_1_2_VOL] = 0xa080, |
46 | [RT5631_AUX_IN_VOL] = 0x0808, |
47 | [RT5631_ADC_REC_MIXER] = 0xf0f0, |
48 | [RT5631_VDAC_DIG_VOL] = 0x0010, |
49 | [RT5631_OUTMIXER_L_CTRL] = 0xffc0, |
50 | [RT5631_OUTMIXER_R_CTRL] = 0xffc0, |
51 | [RT5631_AXO1MIXER_CTRL] = 0x88c0, |
52 | [RT5631_AXO2MIXER_CTRL] = 0x88c0, |
53 | [RT5631_DIG_MIC_CTRL] = 0x3000, |
54 | [RT5631_MONO_INPUT_VOL] = 0x8808, |
55 | [RT5631_SPK_MIXER_CTRL] = 0xf8f8, |
56 | [RT5631_SPK_MONO_OUT_CTRL] = 0xfc00, |
57 | [RT5631_SPK_MONO_HP_OUT_CTRL] = 0x4440, |
58 | [RT5631_SDP_CTRL] = 0x8000, |
59 | [RT5631_MONO_SDP_CTRL] = 0x8000, |
60 | [RT5631_STEREO_AD_DA_CLK_CTRL] = 0x2010, |
61 | [RT5631_GEN_PUR_CTRL_REG] = 0x0e00, |
62 | [RT5631_INT_ST_IRQ_CTRL_2] = 0x071a, |
63 | [RT5631_MISC_CTRL] = 0x2040, |
64 | [RT5631_DEPOP_FUN_CTRL_2] = 0x8000, |
65 | [RT5631_SOFT_VOL_CTRL] = 0x07e0, |
66 | [RT5631_ALC_CTRL_1] = 0x0206, |
67 | [RT5631_ALC_CTRL_3] = 0x2000, |
68 | [RT5631_PSEUDO_SPATL_CTRL] = 0x0553, |
69 | }; |
70 | |
71 | /** |
72 | * rt5631_write_index - write index register of 2nd layer |
73 | */ |
74 | static void rt5631_write_index(struct snd_soc_codec *codec, |
75 | unsigned int reg, unsigned int value) |
76 | { |
77 | snd_soc_write(codec, RT5631_INDEX_ADD, reg); |
78 | snd_soc_write(codec, RT5631_INDEX_DATA, value); |
79 | } |
80 | |
81 | /** |
82 | * rt5631_read_index - read index register of 2nd layer |
83 | */ |
84 | static unsigned int rt5631_read_index(struct snd_soc_codec *codec, |
85 | unsigned int reg) |
86 | { |
87 | unsigned int value; |
88 | |
89 | snd_soc_write(codec, RT5631_INDEX_ADD, reg); |
90 | value = snd_soc_read(codec, RT5631_INDEX_DATA); |
91 | |
92 | return value; |
93 | } |
94 | |
95 | static int rt5631_reset(struct snd_soc_codec *codec) |
96 | { |
97 | return snd_soc_write(codec, RT5631_RESET, 0); |
98 | } |
99 | |
100 | static int rt5631_volatile_register(struct snd_soc_codec *codec, |
101 | unsigned int reg) |
102 | { |
103 | switch (reg) { |
104 | case RT5631_RESET: |
105 | case RT5631_INT_ST_IRQ_CTRL_2: |
106 | case RT5631_INDEX_ADD: |
107 | case RT5631_INDEX_DATA: |
108 | case RT5631_EQ_CTRL: |
109 | return 1; |
110 | default: |
111 | return 0; |
112 | } |
113 | } |
114 | |
115 | static int rt5631_readable_register(struct snd_soc_codec *codec, |
116 | unsigned int reg) |
117 | { |
118 | switch (reg) { |
119 | case RT5631_RESET: |
120 | case RT5631_SPK_OUT_VOL: |
121 | case RT5631_HP_OUT_VOL: |
122 | case RT5631_MONO_AXO_1_2_VOL: |
123 | case RT5631_AUX_IN_VOL: |
124 | case RT5631_STEREO_DAC_VOL_1: |
125 | case RT5631_MIC_CTRL_1: |
126 | case RT5631_STEREO_DAC_VOL_2: |
127 | case RT5631_ADC_CTRL_1: |
128 | case RT5631_ADC_REC_MIXER: |
129 | case RT5631_ADC_CTRL_2: |
130 | case RT5631_VDAC_DIG_VOL: |
131 | case RT5631_OUTMIXER_L_CTRL: |
132 | case RT5631_OUTMIXER_R_CTRL: |
133 | case RT5631_AXO1MIXER_CTRL: |
134 | case RT5631_AXO2MIXER_CTRL: |
135 | case RT5631_MIC_CTRL_2: |
136 | case RT5631_DIG_MIC_CTRL: |
137 | case RT5631_MONO_INPUT_VOL: |
138 | case RT5631_SPK_MIXER_CTRL: |
139 | case RT5631_SPK_MONO_OUT_CTRL: |
140 | case RT5631_SPK_MONO_HP_OUT_CTRL: |
141 | case RT5631_SDP_CTRL: |
142 | case RT5631_MONO_SDP_CTRL: |
143 | case RT5631_STEREO_AD_DA_CLK_CTRL: |
144 | case RT5631_PWR_MANAG_ADD1: |
145 | case RT5631_PWR_MANAG_ADD2: |
146 | case RT5631_PWR_MANAG_ADD3: |
147 | case RT5631_PWR_MANAG_ADD4: |
148 | case RT5631_GEN_PUR_CTRL_REG: |
149 | case RT5631_GLOBAL_CLK_CTRL: |
150 | case RT5631_PLL_CTRL: |
151 | case RT5631_INT_ST_IRQ_CTRL_1: |
152 | case RT5631_INT_ST_IRQ_CTRL_2: |
153 | case RT5631_GPIO_CTRL: |
154 | case RT5631_MISC_CTRL: |
155 | case RT5631_DEPOP_FUN_CTRL_1: |
156 | case RT5631_DEPOP_FUN_CTRL_2: |
157 | case RT5631_JACK_DET_CTRL: |
158 | case RT5631_SOFT_VOL_CTRL: |
159 | case RT5631_ALC_CTRL_1: |
160 | case RT5631_ALC_CTRL_2: |
161 | case RT5631_ALC_CTRL_3: |
162 | case RT5631_PSEUDO_SPATL_CTRL: |
163 | case RT5631_INDEX_ADD: |
164 | case RT5631_INDEX_DATA: |
165 | case RT5631_EQ_CTRL: |
166 | case RT5631_VENDOR_ID: |
167 | case RT5631_VENDOR_ID1: |
168 | case RT5631_VENDOR_ID2: |
169 | return 1; |
170 | default: |
171 | return 0; |
172 | } |
173 | } |
174 | |
175 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); |
176 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0); |
177 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
178 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */ |
179 | static unsigned int mic_bst_tlv[] = { |
a19ea0b8 |
180 | TLV_DB_RANGE_HEAD(7), |
d8085222 |
181 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
182 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), |
183 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
184 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), |
185 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), |
186 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), |
187 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), |
188 | }; |
189 | |
190 | static int rt5631_dmic_get(struct snd_kcontrol *kcontrol, |
191 | struct snd_ctl_elem_value *ucontrol) |
192 | { |
193 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
194 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
195 | |
196 | ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; |
197 | |
198 | return 0; |
199 | } |
200 | |
201 | static int rt5631_dmic_put(struct snd_kcontrol *kcontrol, |
202 | struct snd_ctl_elem_value *ucontrol) |
203 | { |
204 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
205 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
206 | |
207 | rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; |
208 | return 0; |
209 | } |
210 | |
211 | /* MIC Input Type */ |
212 | static const char *rt5631_input_mode[] = { |
213 | "Single ended", "Differential"}; |
214 | |
215 | static const SOC_ENUM_SINGLE_DECL( |
216 | rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1, |
217 | RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode); |
218 | |
219 | static const SOC_ENUM_SINGLE_DECL( |
220 | rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1, |
221 | RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode); |
222 | |
223 | /* MONO Input Type */ |
224 | static const SOC_ENUM_SINGLE_DECL( |
225 | rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL, |
226 | RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode); |
227 | |
228 | /* SPK Ratio Gain Control */ |
229 | static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x", |
230 | "1.56x", "1.68x", "1.99x", "2.34x"}; |
231 | |
232 | static const SOC_ENUM_SINGLE_DECL( |
233 | rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG, |
234 | RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio); |
235 | |
236 | static const struct snd_kcontrol_new rt5631_snd_controls[] = { |
237 | /* MIC */ |
238 | SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum), |
239 | SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2, |
240 | RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
241 | SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum), |
242 | SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2, |
243 | RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
244 | /* MONO IN */ |
245 | SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum), |
246 | SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL, |
247 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
248 | RT5631_VOL_MASK, 1, in_vol_tlv), |
249 | /* AXI */ |
250 | SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL, |
251 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
252 | RT5631_VOL_MASK, 1, in_vol_tlv), |
253 | /* DAC */ |
254 | SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2, |
255 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
256 | RT5631_DAC_VOL_MASK, 1, dac_vol_tlv), |
257 | SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1, |
258 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
259 | /* AXO */ |
260 | SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
261 | RT5631_L_MUTE_SHIFT, 1, 1), |
262 | SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
263 | RT5631_R_VOL_SHIFT, 1, 1), |
264 | /* OUTVOL */ |
265 | SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL, |
266 | RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0), |
267 | |
268 | /* SPK */ |
269 | SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL, |
270 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
271 | SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL, |
272 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv), |
273 | /* MONO OUT */ |
274 | SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
275 | RT5631_MUTE_MONO_SHIFT, 1, 1), |
276 | /* HP */ |
277 | SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL, |
278 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
279 | SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL, |
280 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
281 | RT5631_VOL_MASK, 1, out_vol_tlv), |
282 | /* DMIC */ |
283 | SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0, |
284 | rt5631_dmic_get, rt5631_dmic_put), |
285 | SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL, |
286 | RT5631_DMIC_L_CH_MUTE_SHIFT, |
287 | RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1), |
288 | |
289 | /* SPK Ratio Gain Control */ |
290 | SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum), |
291 | }; |
292 | |
293 | static int check_sysclk1_source(struct snd_soc_dapm_widget *source, |
294 | struct snd_soc_dapm_widget *sink) |
295 | { |
296 | unsigned int reg; |
297 | |
298 | reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL); |
299 | return reg & RT5631_SYSCLK_SOUR_SEL_PLL; |
300 | } |
301 | |
302 | static int check_dmic_used(struct snd_soc_dapm_widget *source, |
303 | struct snd_soc_dapm_widget *sink) |
304 | { |
305 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(source->codec); |
306 | return rt5631->dmic_used_flag; |
307 | } |
308 | |
309 | static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source, |
310 | struct snd_soc_dapm_widget *sink) |
311 | { |
312 | unsigned int reg; |
313 | |
314 | reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL); |
315 | return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L); |
316 | } |
317 | |
318 | static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source, |
319 | struct snd_soc_dapm_widget *sink) |
320 | { |
321 | unsigned int reg; |
322 | |
323 | reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL); |
324 | return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R); |
325 | } |
326 | |
327 | static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source, |
328 | struct snd_soc_dapm_widget *sink) |
329 | { |
330 | unsigned int reg; |
331 | |
332 | reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL); |
333 | return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L); |
334 | } |
335 | |
336 | static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source, |
337 | struct snd_soc_dapm_widget *sink) |
338 | { |
339 | unsigned int reg; |
340 | |
341 | reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL); |
342 | return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R); |
343 | } |
344 | |
d8085222 |
345 | static int check_adcl_select(struct snd_soc_dapm_widget *source, |
346 | struct snd_soc_dapm_widget *sink) |
347 | { |
348 | unsigned int reg; |
349 | |
350 | reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER); |
351 | return !(reg & RT5631_M_MIC1_TO_RECMIXER_L); |
352 | } |
353 | |
354 | static int check_adcr_select(struct snd_soc_dapm_widget *source, |
355 | struct snd_soc_dapm_widget *sink) |
356 | { |
357 | unsigned int reg; |
358 | |
359 | reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER); |
360 | return !(reg & RT5631_M_MIC2_TO_RECMIXER_R); |
361 | } |
362 | |
363 | /** |
364 | * onebit_depop_power_stage - auto depop in power stage. |
365 | * @enable: power on/off |
366 | * |
367 | * When power on/off headphone, the depop sequence is done by hardware. |
368 | */ |
369 | static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable) |
370 | { |
371 | unsigned int soft_vol, hp_zc; |
372 | |
373 | /* enable one-bit depop function */ |
374 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
375 | RT5631_EN_ONE_BIT_DEPOP, 0); |
376 | |
377 | /* keep soft volume and zero crossing setting */ |
378 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
379 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
380 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
381 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
382 | if (enable) { |
383 | /* config one-bit depop parameter */ |
384 | rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0); |
385 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f); |
386 | rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530); |
387 | /* power on capless block */ |
388 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, |
389 | RT5631_EN_CAP_FREE_DEPOP); |
390 | } else { |
391 | /* power off capless block */ |
392 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0); |
393 | msleep(100); |
394 | } |
395 | |
396 | /* recover soft volume and zero crossing setting */ |
397 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
398 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
399 | } |
400 | |
401 | /** |
402 | * onebit_depop_mute_stage - auto depop in mute stage. |
403 | * @enable: mute/unmute |
404 | * |
405 | * When mute/unmute headphone, the depop sequence is done by hardware. |
406 | */ |
407 | static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable) |
408 | { |
409 | unsigned int soft_vol, hp_zc; |
410 | |
411 | /* enable one-bit depop function */ |
412 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
413 | RT5631_EN_ONE_BIT_DEPOP, 0); |
414 | |
415 | /* keep soft volume and zero crossing setting */ |
416 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
417 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
418 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
419 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
420 | if (enable) { |
421 | schedule_timeout_uninterruptible(msecs_to_jiffies(10)); |
422 | /* config one-bit depop parameter */ |
423 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f); |
424 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
425 | RT5631_L_MUTE | RT5631_R_MUTE, 0); |
426 | msleep(300); |
427 | } else { |
428 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
429 | RT5631_L_MUTE | RT5631_R_MUTE, |
430 | RT5631_L_MUTE | RT5631_R_MUTE); |
431 | msleep(100); |
432 | } |
433 | |
434 | /* recover soft volume and zero crossing setting */ |
435 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
436 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
437 | } |
438 | |
439 | /** |
440 | * onebit_depop_power_stage - step by step depop sequence in power stage. |
441 | * @enable: power on/off |
442 | * |
443 | * When power on/off headphone, the depop sequence is done in step by step. |
444 | */ |
445 | static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable) |
446 | { |
447 | unsigned int soft_vol, hp_zc; |
448 | |
449 | /* depop control by register */ |
450 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
451 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
452 | |
453 | /* keep soft volume and zero crossing setting */ |
454 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
455 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
456 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
457 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
458 | if (enable) { |
459 | /* config depop sequence parameter */ |
460 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e); |
461 | |
462 | /* power on headphone and charge pump */ |
463 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
464 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
465 | RT5631_PWR_HP_R_AMP, |
466 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
467 | RT5631_PWR_HP_R_AMP); |
468 | |
469 | /* power on soft generator and depop mode2 */ |
470 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
471 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP); |
472 | msleep(100); |
473 | |
474 | /* stop depop mode */ |
475 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
476 | RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS); |
477 | } else { |
478 | /* config depop sequence parameter */ |
479 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F); |
480 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
481 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
482 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
483 | msleep(75); |
484 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
485 | RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP | |
486 | RT5631_PD_HPAMP_R_ST_UP); |
487 | |
488 | /* start depop mode */ |
489 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
490 | RT5631_PWR_HP_DEPOP_DIS, 0); |
491 | |
492 | /* config depop sequence parameter */ |
493 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
494 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP | |
495 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
496 | msleep(80); |
497 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
498 | RT5631_POW_ON_SOFT_GEN); |
499 | |
500 | /* power down headphone and charge pump */ |
501 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
502 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
503 | RT5631_PWR_HP_R_AMP, 0); |
504 | } |
505 | |
506 | /* recover soft volume and zero crossing setting */ |
507 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
508 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
509 | } |
510 | |
511 | /** |
512 | * depop_seq_mute_stage - step by step depop sequence in mute stage. |
513 | * @enable: mute/unmute |
514 | * |
515 | * When mute/unmute headphone, the depop sequence is done in step by step. |
516 | */ |
517 | static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable) |
518 | { |
519 | unsigned int soft_vol, hp_zc; |
520 | |
521 | /* depop control by register */ |
522 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
523 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
524 | |
525 | /* keep soft volume and zero crossing setting */ |
526 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
527 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
528 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
529 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
530 | if (enable) { |
531 | schedule_timeout_uninterruptible(msecs_to_jiffies(10)); |
532 | |
533 | /* config depop sequence parameter */ |
534 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f); |
535 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
536 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
537 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
538 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
539 | |
540 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
541 | RT5631_L_MUTE | RT5631_R_MUTE, 0); |
542 | msleep(160); |
543 | } else { |
544 | /* config depop sequence parameter */ |
545 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f); |
546 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
547 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
548 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
549 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
550 | |
551 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
552 | RT5631_L_MUTE | RT5631_R_MUTE, |
553 | RT5631_L_MUTE | RT5631_R_MUTE); |
554 | msleep(150); |
555 | } |
556 | |
557 | /* recover soft volume and zero crossing setting */ |
558 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
559 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
560 | } |
561 | |
562 | static int hp_event(struct snd_soc_dapm_widget *w, |
563 | struct snd_kcontrol *kcontrol, int event) |
564 | { |
565 | struct snd_soc_codec *codec = w->codec; |
566 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
567 | |
568 | switch (event) { |
569 | case SND_SOC_DAPM_PRE_PMD: |
570 | if (rt5631->codec_version) { |
571 | onebit_depop_mute_stage(codec, 0); |
572 | onebit_depop_power_stage(codec, 0); |
573 | } else { |
574 | depop_seq_mute_stage(codec, 0); |
575 | depop_seq_power_stage(codec, 0); |
576 | } |
577 | break; |
578 | |
579 | case SND_SOC_DAPM_POST_PMU: |
580 | if (rt5631->codec_version) { |
581 | onebit_depop_power_stage(codec, 1); |
582 | onebit_depop_mute_stage(codec, 1); |
583 | } else { |
584 | depop_seq_power_stage(codec, 1); |
585 | depop_seq_mute_stage(codec, 1); |
586 | } |
587 | break; |
588 | |
589 | default: |
590 | break; |
591 | } |
592 | |
593 | return 0; |
594 | } |
595 | |
596 | static int set_dmic_params(struct snd_soc_dapm_widget *w, |
597 | struct snd_kcontrol *kcontrol, int event) |
598 | { |
599 | struct snd_soc_codec *codec = w->codec; |
600 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
601 | |
602 | switch (rt5631->rx_rate) { |
603 | case 44100: |
604 | case 48000: |
605 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
606 | RT5631_DMIC_CLK_CTRL_MASK, |
607 | RT5631_DMIC_CLK_CTRL_TO_32FS); |
608 | break; |
609 | |
610 | case 32000: |
611 | case 22050: |
612 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
613 | RT5631_DMIC_CLK_CTRL_MASK, |
614 | RT5631_DMIC_CLK_CTRL_TO_64FS); |
615 | break; |
616 | |
617 | case 16000: |
618 | case 11025: |
619 | case 8000: |
620 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
621 | RT5631_DMIC_CLK_CTRL_MASK, |
622 | RT5631_DMIC_CLK_CTRL_TO_128FS); |
623 | break; |
624 | |
625 | default: |
626 | return -EINVAL; |
627 | } |
628 | |
629 | return 0; |
630 | } |
631 | |
632 | static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = { |
633 | SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER, |
634 | RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1), |
635 | SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER, |
636 | RT5631_M_MIC1_RECMIXL_BIT, 1, 1), |
637 | SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER, |
638 | RT5631_M_AXIL_RECMIXL_BIT, 1, 1), |
639 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, |
640 | RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1), |
641 | }; |
642 | |
643 | static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = { |
644 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, |
645 | RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1), |
646 | SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER, |
647 | RT5631_M_AXIR_RECMIXR_BIT, 1, 1), |
648 | SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER, |
649 | RT5631_M_MIC2_RECMIXR_BIT, 1, 1), |
650 | SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER, |
651 | RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1), |
652 | }; |
653 | |
654 | static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = { |
655 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, |
656 | RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1), |
657 | SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL, |
658 | RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1), |
659 | SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL, |
660 | RT5631_M_DACL_SPKMIXL_BIT, 1, 1), |
661 | SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, |
662 | RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1), |
663 | }; |
664 | |
665 | static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = { |
666 | SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, |
667 | RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1), |
668 | SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL, |
669 | RT5631_M_DACR_SPKMIXR_BIT, 1, 1), |
670 | SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL, |
671 | RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1), |
672 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, |
673 | RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1), |
674 | }; |
675 | |
676 | static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = { |
677 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
678 | RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1), |
679 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL, |
680 | RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1), |
681 | SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
682 | RT5631_M_DACL_OUTMIXL_BIT, 1, 1), |
683 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL, |
684 | RT5631_M_MIC1_OUTMIXL_BIT, 1, 1), |
685 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL, |
686 | RT5631_M_MIC2_OUTMIXL_BIT, 1, 1), |
687 | SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL, |
688 | RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1), |
689 | SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
690 | RT5631_M_AXIL_OUTMIXL_BIT, 1, 1), |
691 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
692 | RT5631_M_AXIR_OUTMIXL_BIT, 1, 1), |
693 | SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL, |
694 | RT5631_M_VDAC_OUTMIXL_BIT, 1, 1), |
695 | }; |
696 | |
697 | static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = { |
698 | SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL, |
699 | RT5631_M_VDAC_OUTMIXR_BIT, 1, 1), |
700 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
701 | RT5631_M_AXIR_OUTMIXR_BIT, 1, 1), |
702 | SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
703 | RT5631_M_AXIL_OUTMIXR_BIT, 1, 1), |
704 | SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL, |
705 | RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1), |
706 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL, |
707 | RT5631_M_MIC2_OUTMIXR_BIT, 1, 1), |
708 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL, |
709 | RT5631_M_MIC1_OUTMIXR_BIT, 1, 1), |
710 | SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL, |
711 | RT5631_M_DACR_OUTMIXR_BIT, 1, 1), |
712 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL, |
713 | RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1), |
714 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
715 | RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1), |
716 | }; |
717 | |
718 | static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = { |
719 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL, |
720 | RT5631_M_MIC1_AXO1MIX_BIT , 1, 1), |
721 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL, |
722 | RT5631_M_MIC2_AXO1MIX_BIT, 1, 1), |
723 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL, |
724 | RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1), |
725 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL, |
726 | RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1), |
727 | }; |
728 | |
729 | static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = { |
730 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL, |
731 | RT5631_M_MIC1_AXO2MIX_BIT, 1, 1), |
732 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL, |
733 | RT5631_M_MIC2_AXO2MIX_BIT, 1, 1), |
734 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL, |
735 | RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1), |
736 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL, |
737 | RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1), |
738 | }; |
739 | |
740 | static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = { |
741 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
742 | RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1), |
743 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
744 | RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1), |
745 | }; |
746 | |
747 | static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = { |
748 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
749 | RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1), |
750 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
751 | RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1), |
752 | }; |
753 | |
754 | static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = { |
755 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
756 | RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1), |
757 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
758 | RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1), |
759 | }; |
760 | |
761 | /* Left SPK Volume Input */ |
762 | static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"}; |
763 | |
764 | static const SOC_ENUM_SINGLE_DECL( |
765 | rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL, |
766 | RT5631_L_EN_SHIFT, rt5631_spkvoll_sel); |
767 | |
768 | static const struct snd_kcontrol_new rt5631_spkvoll_mux_control = |
769 | SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum); |
770 | |
771 | /* Left HP Volume Input */ |
772 | static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"}; |
773 | |
774 | static const SOC_ENUM_SINGLE_DECL( |
775 | rt5631_hpvoll_enum, RT5631_HP_OUT_VOL, |
776 | RT5631_L_EN_SHIFT, rt5631_hpvoll_sel); |
777 | |
778 | static const struct snd_kcontrol_new rt5631_hpvoll_mux_control = |
779 | SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum); |
780 | |
781 | /* Left Out Volume Input */ |
782 | static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"}; |
783 | |
784 | static const SOC_ENUM_SINGLE_DECL( |
785 | rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL, |
786 | RT5631_L_EN_SHIFT, rt5631_outvoll_sel); |
787 | |
788 | static const struct snd_kcontrol_new rt5631_outvoll_mux_control = |
789 | SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum); |
790 | |
791 | /* Right Out Volume Input */ |
792 | static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"}; |
793 | |
794 | static const SOC_ENUM_SINGLE_DECL( |
795 | rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL, |
796 | RT5631_R_EN_SHIFT, rt5631_outvolr_sel); |
797 | |
798 | static const struct snd_kcontrol_new rt5631_outvolr_mux_control = |
799 | SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum); |
800 | |
801 | /* Right HP Volume Input */ |
802 | static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"}; |
803 | |
804 | static const SOC_ENUM_SINGLE_DECL( |
805 | rt5631_hpvolr_enum, RT5631_HP_OUT_VOL, |
806 | RT5631_R_EN_SHIFT, rt5631_hpvolr_sel); |
807 | |
808 | static const struct snd_kcontrol_new rt5631_hpvolr_mux_control = |
809 | SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum); |
810 | |
811 | /* Right SPK Volume Input */ |
812 | static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"}; |
813 | |
814 | static const SOC_ENUM_SINGLE_DECL( |
815 | rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL, |
816 | RT5631_R_EN_SHIFT, rt5631_spkvolr_sel); |
817 | |
818 | static const struct snd_kcontrol_new rt5631_spkvolr_mux_control = |
819 | SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum); |
820 | |
821 | /* SPO Left Channel Input */ |
822 | static const char *rt5631_spol_src_sel[] = { |
823 | "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"}; |
824 | |
825 | static const SOC_ENUM_SINGLE_DECL( |
826 | rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
827 | RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel); |
828 | |
829 | static const struct snd_kcontrol_new rt5631_spol_mux_control = |
830 | SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum); |
831 | |
832 | /* SPO Right Channel Input */ |
833 | static const char *rt5631_spor_src_sel[] = { |
834 | "SPORMIX", "MONOIN_RX", "VDAC", "DACR"}; |
835 | |
836 | static const SOC_ENUM_SINGLE_DECL( |
837 | rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
838 | RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel); |
839 | |
840 | static const struct snd_kcontrol_new rt5631_spor_mux_control = |
841 | SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum); |
842 | |
843 | /* MONO Input */ |
844 | static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"}; |
845 | |
846 | static const SOC_ENUM_SINGLE_DECL( |
847 | rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
848 | RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel); |
849 | |
850 | static const struct snd_kcontrol_new rt5631_mono_mux_control = |
851 | SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum); |
852 | |
853 | /* Left HPO Input */ |
854 | static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"}; |
855 | |
856 | static const SOC_ENUM_SINGLE_DECL( |
857 | rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
858 | RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel); |
859 | |
860 | static const struct snd_kcontrol_new rt5631_hpl_mux_control = |
861 | SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum); |
862 | |
863 | /* Right HPO Input */ |
864 | static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"}; |
865 | |
866 | static const SOC_ENUM_SINGLE_DECL( |
867 | rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
868 | RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel); |
869 | |
870 | static const struct snd_kcontrol_new rt5631_hpr_mux_control = |
871 | SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum); |
872 | |
873 | static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = { |
874 | /* Vmid */ |
875 | SND_SOC_DAPM_VMID("Vmid"), |
876 | /* PLL1 */ |
877 | SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2, |
878 | RT5631_PWR_PLL1_BIT, 0, NULL, 0), |
879 | |
880 | /* Input Side */ |
881 | /* Input Lines */ |
882 | SND_SOC_DAPM_INPUT("MIC1"), |
883 | SND_SOC_DAPM_INPUT("MIC2"), |
884 | SND_SOC_DAPM_INPUT("AXIL"), |
885 | SND_SOC_DAPM_INPUT("AXIR"), |
886 | SND_SOC_DAPM_INPUT("MONOIN_RXN"), |
887 | SND_SOC_DAPM_INPUT("MONOIN_RXP"), |
888 | SND_SOC_DAPM_INPUT("DMIC"), |
889 | |
890 | /* MICBIAS */ |
891 | SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2, |
892 | RT5631_PWR_MICBIAS1_VOL_BIT, 0), |
893 | SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2, |
894 | RT5631_PWR_MICBIAS2_VOL_BIT, 0), |
895 | |
896 | /* Boost */ |
897 | SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2, |
898 | RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0), |
899 | SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2, |
900 | RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0), |
901 | SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4, |
902 | RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0), |
903 | SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4, |
904 | RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0), |
905 | SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4, |
906 | RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0), |
907 | SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4, |
908 | RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0), |
909 | |
910 | /* MONO In */ |
911 | SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0), |
912 | |
913 | /* REC Mixer */ |
914 | SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
915 | RT5631_PWR_RECMIXER_L_BIT, 0, |
916 | &rt5631_recmixl_mixer_controls[0], |
917 | ARRAY_SIZE(rt5631_recmixl_mixer_controls)), |
918 | SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
919 | RT5631_PWR_RECMIXER_R_BIT, 0, |
920 | &rt5631_recmixr_mixer_controls[0], |
921 | ARRAY_SIZE(rt5631_recmixr_mixer_controls)), |
922 | /* Because of record duplication for L/R channel, |
923 | * L/R ADCs need power up at the same time */ |
924 | SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
925 | |
926 | /* DMIC */ |
927 | SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL, |
928 | RT5631_DMIC_ENA_SHIFT, 0, |
929 | set_dmic_params, SND_SOC_DAPM_PRE_PMU), |
930 | /* ADC Data Srouce */ |
931 | SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2, |
932 | RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0), |
933 | SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2, |
934 | RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0), |
935 | |
936 | /* ADCs */ |
937 | SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture", |
938 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0), |
939 | SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture", |
940 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0), |
941 | |
942 | /* DAC and ADC supply power */ |
943 | SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1, |
944 | RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0), |
945 | SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1, |
946 | RT5631_PWR_DAC_REF_BIT, 0, NULL, 0), |
947 | |
948 | /* Output Side */ |
949 | /* DACs */ |
950 | SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback", |
951 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0), |
952 | SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback", |
953 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0), |
954 | SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback", |
955 | SND_SOC_NOPM, 0, 0), |
956 | SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0), |
957 | /* DAC supply power */ |
958 | SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1, |
959 | RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0), |
960 | SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1, |
961 | RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0), |
962 | |
963 | /* Left SPK Mixer */ |
964 | SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
965 | RT5631_PWR_SPKMIXER_L_BIT, 0, |
966 | &rt5631_spkmixl_mixer_controls[0], |
967 | ARRAY_SIZE(rt5631_spkmixl_mixer_controls)), |
968 | /* Left Out Mixer */ |
969 | SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
970 | RT5631_PWR_OUTMIXER_L_BIT, 0, |
971 | &rt5631_outmixl_mixer_controls[0], |
972 | ARRAY_SIZE(rt5631_outmixl_mixer_controls)), |
973 | /* Right Out Mixer */ |
974 | SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
975 | RT5631_PWR_OUTMIXER_R_BIT, 0, |
976 | &rt5631_outmixr_mixer_controls[0], |
977 | ARRAY_SIZE(rt5631_outmixr_mixer_controls)), |
978 | /* Right SPK Mixer */ |
979 | SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
980 | RT5631_PWR_SPKMIXER_R_BIT, 0, |
981 | &rt5631_spkmixr_mixer_controls[0], |
982 | ARRAY_SIZE(rt5631_spkmixr_mixer_controls)), |
983 | |
984 | /* Volume Mux */ |
985 | SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4, |
986 | RT5631_PWR_SPK_L_VOL_BIT, 0, |
987 | &rt5631_spkvoll_mux_control), |
988 | SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4, |
989 | RT5631_PWR_HP_L_OUT_VOL_BIT, 0, |
990 | &rt5631_hpvoll_mux_control), |
991 | SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4, |
992 | RT5631_PWR_LOUT_VOL_BIT, 0, |
993 | &rt5631_outvoll_mux_control), |
994 | SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4, |
995 | RT5631_PWR_ROUT_VOL_BIT, 0, |
996 | &rt5631_outvolr_mux_control), |
997 | SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4, |
998 | RT5631_PWR_HP_R_OUT_VOL_BIT, 0, |
999 | &rt5631_hpvolr_mux_control), |
1000 | SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4, |
1001 | RT5631_PWR_SPK_R_VOL_BIT, 0, |
1002 | &rt5631_spkvolr_mux_control), |
1003 | |
1004 | /* DAC To HP */ |
1005 | SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
1006 | SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
1007 | |
1008 | /* HP Depop */ |
1009 | SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0, |
1010 | hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
1011 | |
1012 | /* AXO1 Mixer */ |
1013 | SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3, |
1014 | RT5631_PWR_AXO1MIXER_BIT, 0, |
1015 | &rt5631_AXO1MIX_mixer_controls[0], |
1016 | ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)), |
1017 | /* SPOL Mixer */ |
1018 | SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0, |
1019 | &rt5631_spolmix_mixer_controls[0], |
1020 | ARRAY_SIZE(rt5631_spolmix_mixer_controls)), |
1021 | /* MONO Mixer */ |
1022 | SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3, |
1023 | RT5631_PWR_MONOMIXER_BIT, 0, |
1024 | &rt5631_monomix_mixer_controls[0], |
1025 | ARRAY_SIZE(rt5631_monomix_mixer_controls)), |
1026 | /* SPOR Mixer */ |
1027 | SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0, |
1028 | &rt5631_spormix_mixer_controls[0], |
1029 | ARRAY_SIZE(rt5631_spormix_mixer_controls)), |
1030 | /* AXO2 Mixer */ |
1031 | SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3, |
1032 | RT5631_PWR_AXO2MIXER_BIT, 0, |
1033 | &rt5631_AXO2MIX_mixer_controls[0], |
1034 | ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)), |
1035 | |
1036 | /* Mux */ |
1037 | SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0, |
1038 | &rt5631_spol_mux_control), |
1039 | SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0, |
1040 | &rt5631_spor_mux_control), |
1041 | SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0, |
1042 | &rt5631_mono_mux_control), |
1043 | SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, |
1044 | &rt5631_hpl_mux_control), |
1045 | SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, |
1046 | &rt5631_hpr_mux_control), |
1047 | |
1048 | /* AMP supply */ |
1049 | SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3, |
1050 | RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0), |
1051 | SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1, |
1052 | RT5631_PWR_CLASS_D_BIT, 0, NULL, 0), |
1053 | |
1054 | /* Output Lines */ |
1055 | SND_SOC_DAPM_OUTPUT("AUXO1"), |
1056 | SND_SOC_DAPM_OUTPUT("AUXO2"), |
1057 | SND_SOC_DAPM_OUTPUT("SPOL"), |
1058 | SND_SOC_DAPM_OUTPUT("SPOR"), |
1059 | SND_SOC_DAPM_OUTPUT("HPOL"), |
1060 | SND_SOC_DAPM_OUTPUT("HPOR"), |
1061 | SND_SOC_DAPM_OUTPUT("MONO"), |
1062 | }; |
1063 | |
1064 | static const struct snd_soc_dapm_route rt5631_dapm_routes[] = { |
1065 | {"MIC1 Boost", NULL, "MIC1"}, |
1066 | {"MIC2 Boost", NULL, "MIC2"}, |
1067 | {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"}, |
1068 | {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"}, |
1069 | {"AXIL Boost", NULL, "AXIL"}, |
1070 | {"AXIR Boost", NULL, "AXIR"}, |
1071 | |
1072 | {"MONO_IN", NULL, "MONOIN_RXP Boost"}, |
1073 | {"MONO_IN", NULL, "MONOIN_RXN Boost"}, |
1074 | |
1075 | {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"}, |
1076 | {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"}, |
1077 | {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"}, |
1078 | {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"}, |
1079 | |
1080 | {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"}, |
1081 | {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"}, |
1082 | {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"}, |
1083 | {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"}, |
1084 | |
1085 | {"ADC Mixer", NULL, "RECMIXL Mixer"}, |
1086 | {"ADC Mixer", NULL, "RECMIXR Mixer"}, |
1087 | |
1088 | {"Left ADC", NULL, "ADC Mixer"}, |
1089 | {"Left ADC", NULL, "Left ADC Select", check_adcl_select}, |
1090 | {"Left ADC", NULL, "PLL1", check_sysclk1_source}, |
1091 | {"Left ADC", NULL, "I2S"}, |
1092 | {"Left ADC", NULL, "DAC REF"}, |
1093 | |
1094 | {"Right ADC", NULL, "ADC Mixer"}, |
1095 | {"Right ADC", NULL, "Right ADC Select", check_adcr_select}, |
1096 | {"Right ADC", NULL, "PLL1", check_sysclk1_source}, |
1097 | {"Right ADC", NULL, "I2S"}, |
1098 | {"Right ADC", NULL, "DAC REF"}, |
1099 | |
1100 | {"DMIC", NULL, "DMIC Supply", check_dmic_used}, |
1101 | {"Left ADC", NULL, "DMIC"}, |
1102 | {"Right ADC", NULL, "DMIC"}, |
1103 | |
1104 | {"Left DAC", NULL, "PLL1", check_sysclk1_source}, |
1105 | {"Left DAC", NULL, "I2S"}, |
1106 | {"Left DAC", NULL, "DAC REF"}, |
1107 | {"Right DAC", NULL, "PLL1", check_sysclk1_source}, |
1108 | {"Right DAC", NULL, "I2S"}, |
1109 | {"Right DAC", NULL, "DAC REF"}, |
1110 | |
1111 | {"Voice DAC Boost", NULL, "Voice DAC"}, |
1112 | |
1113 | {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl}, |
1114 | {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1115 | {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"}, |
1116 | {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"}, |
1117 | {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"}, |
1118 | |
1119 | {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr}, |
1120 | {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"}, |
1121 | {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"}, |
1122 | {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"}, |
1123 | {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1124 | |
1125 | {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl}, |
1126 | {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1127 | {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1128 | {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"}, |
1129 | {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1130 | {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1131 | {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"}, |
1132 | {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"}, |
1133 | {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"}, |
1134 | {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"}, |
1135 | |
1136 | {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr}, |
1137 | {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1138 | {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1139 | {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"}, |
1140 | {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1141 | {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1142 | {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"}, |
1143 | {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"}, |
1144 | {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"}, |
1145 | {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"}, |
1146 | |
1147 | {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"}, |
1148 | {"Left SPKVOL Mux", "Vmid", "Vmid"}, |
1149 | {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"}, |
1150 | {"Left HPVOL Mux", "Vmid", "Vmid"}, |
1151 | {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"}, |
1152 | {"Left OUTVOL Mux", "Vmid", "Vmid"}, |
1153 | {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"}, |
1154 | {"Right OUTVOL Mux", "Vmid", "Vmid"}, |
1155 | {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"}, |
1156 | {"Right HPVOL Mux", "Vmid", "Vmid"}, |
1157 | {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"}, |
1158 | {"Right SPKVOL Mux", "Vmid", "Vmid"}, |
1159 | |
1160 | {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1161 | {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1162 | {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1163 | {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1164 | |
1165 | {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1166 | {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1167 | {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1168 | {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1169 | |
1170 | {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"}, |
1171 | {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"}, |
1172 | |
1173 | {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"}, |
1174 | {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"}, |
1175 | |
1176 | {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1177 | {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1178 | |
1179 | {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"}, |
1180 | {"SPOL Mux", "MONOIN_RX", "MONO_IN"}, |
1181 | {"SPOL Mux", "VDAC", "Voice DAC Boost"}, |
1182 | {"SPOL Mux", "DACL", "Left DAC"}, |
1183 | |
1184 | {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"}, |
1185 | {"SPOR Mux", "MONOIN_RX", "MONO_IN"}, |
1186 | {"SPOR Mux", "VDAC", "Voice DAC Boost"}, |
1187 | {"SPOR Mux", "DACR", "Right DAC"}, |
1188 | |
1189 | {"MONO Mux", "MONOMIX", "MONOMIX Mixer"}, |
1190 | {"MONO Mux", "MONOIN_RX", "MONO_IN"}, |
1191 | {"MONO Mux", "VDAC", "Voice DAC Boost"}, |
1192 | |
1193 | {"Right DAC_HP", NULL, "Right DAC"}, |
1194 | {"Left DAC_HP", NULL, "Left DAC"}, |
1195 | |
1196 | {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"}, |
1197 | {"HPL Mux", "Left DAC", "Left DAC_HP"}, |
1198 | {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"}, |
1199 | {"HPR Mux", "Right DAC", "Right DAC_HP"}, |
1200 | |
1201 | {"HP Depop", NULL, "HPL Mux"}, |
1202 | {"HP Depop", NULL, "HPR Mux"}, |
1203 | |
1204 | {"AUXO1", NULL, "AXO1MIX Mixer"}, |
1205 | {"AUXO2", NULL, "AXO2MIX Mixer"}, |
1206 | |
1207 | {"SPOL", NULL, "Class D"}, |
1208 | {"SPOL", NULL, "SPOL Mux"}, |
1209 | {"SPOR", NULL, "Class D"}, |
1210 | {"SPOR", NULL, "SPOR Mux"}, |
1211 | |
1212 | {"HPOL", NULL, "HP Depop"}, |
1213 | {"HPOR", NULL, "HP Depop"}, |
1214 | |
1215 | {"MONO", NULL, "MONO Depop"}, |
1216 | {"MONO", NULL, "MONO Mux"}, |
1217 | }; |
1218 | |
1219 | struct coeff_clk_div { |
1220 | u32 mclk; |
1221 | u32 bclk; |
1222 | u32 rate; |
1223 | u16 reg_val; |
1224 | }; |
1225 | |
1226 | /* PLL divisors */ |
1227 | struct pll_div { |
1228 | u32 pll_in; |
1229 | u32 pll_out; |
1230 | u16 reg_val; |
1231 | }; |
1232 | |
1233 | static const struct pll_div codec_master_pll_div[] = { |
1234 | {2048000, 8192000, 0x0ea0}, |
1235 | {3686400, 8192000, 0x4e27}, |
1236 | {12000000, 8192000, 0x456b}, |
1237 | {13000000, 8192000, 0x495f}, |
1238 | {13100000, 8192000, 0x0320}, |
1239 | {2048000, 11289600, 0xf637}, |
1240 | {3686400, 11289600, 0x2f22}, |
1241 | {12000000, 11289600, 0x3e2f}, |
1242 | {13000000, 11289600, 0x4d5b}, |
1243 | {13100000, 11289600, 0x363b}, |
1244 | {2048000, 16384000, 0x1ea0}, |
1245 | {3686400, 16384000, 0x9e27}, |
1246 | {12000000, 16384000, 0x452b}, |
1247 | {13000000, 16384000, 0x542f}, |
1248 | {13100000, 16384000, 0x03a0}, |
1249 | {2048000, 16934400, 0xe625}, |
1250 | {3686400, 16934400, 0x9126}, |
1251 | {12000000, 16934400, 0x4d2c}, |
1252 | {13000000, 16934400, 0x742f}, |
1253 | {13100000, 16934400, 0x3c27}, |
1254 | {2048000, 22579200, 0x2aa0}, |
1255 | {3686400, 22579200, 0x2f20}, |
1256 | {12000000, 22579200, 0x7e2f}, |
1257 | {13000000, 22579200, 0x742f}, |
1258 | {13100000, 22579200, 0x3c27}, |
1259 | {2048000, 24576000, 0x2ea0}, |
1260 | {3686400, 24576000, 0xee27}, |
1261 | {12000000, 24576000, 0x2915}, |
1262 | {13000000, 24576000, 0x772e}, |
1263 | {13100000, 24576000, 0x0d20}, |
1264 | {26000000, 24576000, 0x2027}, |
1265 | {26000000, 22579200, 0x392f}, |
1266 | {24576000, 22579200, 0x0921}, |
1267 | {24576000, 24576000, 0x02a0}, |
1268 | }; |
1269 | |
1270 | static const struct pll_div codec_slave_pll_div[] = { |
1271 | {256000, 2048000, 0x46f0}, |
1272 | {256000, 4096000, 0x3ea0}, |
1273 | {352800, 5644800, 0x3ea0}, |
1274 | {512000, 8192000, 0x3ea0}, |
1275 | {1024000, 8192000, 0x46f0}, |
1276 | {705600, 11289600, 0x3ea0}, |
1277 | {1024000, 16384000, 0x3ea0}, |
1278 | {1411200, 22579200, 0x3ea0}, |
1279 | {1536000, 24576000, 0x3ea0}, |
1280 | {2048000, 16384000, 0x1ea0}, |
1281 | {2822400, 22579200, 0x1ea0}, |
1282 | {2822400, 45158400, 0x5ec0}, |
1283 | {5644800, 45158400, 0x46f0}, |
1284 | {3072000, 24576000, 0x1ea0}, |
1285 | {3072000, 49152000, 0x5ec0}, |
1286 | {6144000, 49152000, 0x46f0}, |
1287 | {705600, 11289600, 0x3ea0}, |
1288 | {705600, 8467200, 0x3ab0}, |
1289 | {24576000, 24576000, 0x02a0}, |
1290 | {1411200, 11289600, 0x1690}, |
1291 | {2822400, 11289600, 0x0a90}, |
1292 | {1536000, 12288000, 0x1690}, |
1293 | {3072000, 12288000, 0x0a90}, |
1294 | }; |
1295 | |
f79e5e8c |
1296 | static struct coeff_clk_div coeff_div[] = { |
d8085222 |
1297 | /* sysclk is 256fs */ |
1298 | {2048000, 8000 * 32, 8000, 0x1000}, |
1299 | {2048000, 8000 * 64, 8000, 0x0000}, |
1300 | {2822400, 11025 * 32, 11025, 0x1000}, |
1301 | {2822400, 11025 * 64, 11025, 0x0000}, |
1302 | {4096000, 16000 * 32, 16000, 0x1000}, |
1303 | {4096000, 16000 * 64, 16000, 0x0000}, |
1304 | {5644800, 22050 * 32, 22050, 0x1000}, |
1305 | {5644800, 22050 * 64, 22050, 0x0000}, |
1306 | {8192000, 32000 * 32, 32000, 0x1000}, |
1307 | {8192000, 32000 * 64, 32000, 0x0000}, |
1308 | {11289600, 44100 * 32, 44100, 0x1000}, |
1309 | {11289600, 44100 * 64, 44100, 0x0000}, |
1310 | {12288000, 48000 * 32, 48000, 0x1000}, |
1311 | {12288000, 48000 * 64, 48000, 0x0000}, |
1312 | {22579200, 88200 * 32, 88200, 0x1000}, |
1313 | {22579200, 88200 * 64, 88200, 0x0000}, |
1314 | {24576000, 96000 * 32, 96000, 0x1000}, |
1315 | {24576000, 96000 * 64, 96000, 0x0000}, |
1316 | /* sysclk is 512fs */ |
1317 | {4096000, 8000 * 32, 8000, 0x3000}, |
1318 | {4096000, 8000 * 64, 8000, 0x2000}, |
1319 | {5644800, 11025 * 32, 11025, 0x3000}, |
1320 | {5644800, 11025 * 64, 11025, 0x2000}, |
1321 | {8192000, 16000 * 32, 16000, 0x3000}, |
1322 | {8192000, 16000 * 64, 16000, 0x2000}, |
1323 | {11289600, 22050 * 32, 22050, 0x3000}, |
1324 | {11289600, 22050 * 64, 22050, 0x2000}, |
1325 | {16384000, 32000 * 32, 32000, 0x3000}, |
1326 | {16384000, 32000 * 64, 32000, 0x2000}, |
1327 | {22579200, 44100 * 32, 44100, 0x3000}, |
1328 | {22579200, 44100 * 64, 44100, 0x2000}, |
1329 | {24576000, 48000 * 32, 48000, 0x3000}, |
1330 | {24576000, 48000 * 64, 48000, 0x2000}, |
1331 | {45158400, 88200 * 32, 88200, 0x3000}, |
1332 | {45158400, 88200 * 64, 88200, 0x2000}, |
1333 | {49152000, 96000 * 32, 96000, 0x3000}, |
1334 | {49152000, 96000 * 64, 96000, 0x2000}, |
1335 | /* sysclk is 24.576Mhz or 22.5792Mhz */ |
1336 | {24576000, 8000 * 32, 8000, 0x7080}, |
1337 | {24576000, 8000 * 64, 8000, 0x6080}, |
1338 | {24576000, 16000 * 32, 16000, 0x5080}, |
1339 | {24576000, 16000 * 64, 16000, 0x4080}, |
1340 | {24576000, 24000 * 32, 24000, 0x5000}, |
1341 | {24576000, 24000 * 64, 24000, 0x4000}, |
1342 | {24576000, 32000 * 32, 32000, 0x3080}, |
1343 | {24576000, 32000 * 64, 32000, 0x2080}, |
1344 | {22579200, 11025 * 32, 11025, 0x7000}, |
1345 | {22579200, 11025 * 64, 11025, 0x6000}, |
1346 | {22579200, 22050 * 32, 22050, 0x5000}, |
1347 | {22579200, 22050 * 64, 22050, 0x4000}, |
1348 | }; |
1349 | |
1350 | static int get_coeff(int mclk, int rate, int timesofbclk) |
1351 | { |
1352 | int i; |
1353 | |
1354 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { |
1355 | if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate && |
1356 | (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk) |
1357 | return i; |
1358 | } |
1359 | return -EINVAL; |
1360 | } |
1361 | |
1362 | static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream, |
1363 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
1364 | { |
1365 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
1366 | struct snd_soc_codec *codec = rtd->codec; |
1367 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1368 | int timesofbclk = 32, coeff; |
1369 | unsigned int iface = 0; |
1370 | |
1371 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1372 | |
1373 | rt5631->bclk_rate = snd_soc_params_to_bclk(params); |
1374 | if (rt5631->bclk_rate < 0) { |
1375 | dev_err(codec->dev, "Fail to get BCLK rate\n"); |
1376 | return rt5631->bclk_rate; |
1377 | } |
1378 | rt5631->rx_rate = params_rate(params); |
1379 | |
1380 | if (rt5631->master) |
1381 | coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate, |
1382 | rt5631->bclk_rate / rt5631->rx_rate); |
1383 | else |
1384 | coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate, |
1385 | timesofbclk); |
1386 | if (coeff < 0) { |
1387 | dev_err(codec->dev, "Fail to get coeff\n"); |
1388 | return -EINVAL; |
1389 | } |
1390 | |
1391 | switch (params_format(params)) { |
1392 | case SNDRV_PCM_FORMAT_S16_LE: |
1393 | break; |
1394 | case SNDRV_PCM_FORMAT_S20_3LE: |
1395 | iface |= RT5631_SDP_I2S_DL_20; |
1396 | break; |
1397 | case SNDRV_PCM_FORMAT_S24_LE: |
1398 | iface |= RT5631_SDP_I2S_DL_24; |
1399 | break; |
1400 | case SNDRV_PCM_FORMAT_S8: |
1401 | iface |= RT5631_SDP_I2S_DL_8; |
1402 | break; |
1403 | default: |
1404 | return -EINVAL; |
1405 | } |
1406 | |
1407 | snd_soc_update_bits(codec, RT5631_SDP_CTRL, |
1408 | RT5631_SDP_I2S_DL_MASK, iface); |
1409 | snd_soc_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL, |
1410 | coeff_div[coeff].reg_val); |
1411 | |
1412 | return 0; |
1413 | } |
1414 | |
1415 | static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, |
1416 | unsigned int fmt) |
1417 | { |
1418 | struct snd_soc_codec *codec = codec_dai->codec; |
1419 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1420 | unsigned int iface = 0; |
1421 | |
1422 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1423 | |
1424 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
1425 | case SND_SOC_DAIFMT_CBM_CFM: |
1426 | rt5631->master = 1; |
1427 | break; |
1428 | case SND_SOC_DAIFMT_CBS_CFS: |
1429 | iface |= RT5631_SDP_MODE_SEL_SLAVE; |
1430 | rt5631->master = 0; |
1431 | break; |
1432 | default: |
1433 | return -EINVAL; |
1434 | } |
1435 | |
1436 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
1437 | case SND_SOC_DAIFMT_I2S: |
1438 | break; |
1439 | case SND_SOC_DAIFMT_LEFT_J: |
1440 | iface |= RT5631_SDP_I2S_DF_LEFT; |
1441 | break; |
1442 | case SND_SOC_DAIFMT_DSP_A: |
1443 | iface |= RT5631_SDP_I2S_DF_PCM_A; |
1444 | break; |
1445 | case SND_SOC_DAIFMT_DSP_B: |
1446 | iface |= RT5631_SDP_I2S_DF_PCM_B; |
1447 | break; |
1448 | default: |
1449 | return -EINVAL; |
1450 | } |
1451 | |
1452 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
1453 | case SND_SOC_DAIFMT_NB_NF: |
1454 | break; |
1455 | case SND_SOC_DAIFMT_IB_NF: |
1456 | iface |= RT5631_SDP_I2S_BCLK_POL_CTRL; |
1457 | break; |
1458 | default: |
1459 | return -EINVAL; |
1460 | } |
1461 | |
1462 | snd_soc_write(codec, RT5631_SDP_CTRL, iface); |
1463 | |
1464 | return 0; |
1465 | } |
1466 | |
1467 | static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
1468 | int clk_id, unsigned int freq, int dir) |
1469 | { |
1470 | struct snd_soc_codec *codec = codec_dai->codec; |
1471 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1472 | |
1473 | dev_dbg(codec->dev, "enter %s, syclk=%d\n", __func__, freq); |
1474 | |
1475 | if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) { |
1476 | rt5631->sysclk = freq; |
1477 | return 0; |
1478 | } |
1479 | |
1480 | return -EINVAL; |
1481 | } |
1482 | |
1483 | static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
1484 | int source, unsigned int freq_in, unsigned int freq_out) |
1485 | { |
1486 | struct snd_soc_codec *codec = codec_dai->codec; |
1487 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1488 | int i, ret = -EINVAL; |
1489 | |
1490 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1491 | |
1492 | if (!freq_in || !freq_out) { |
1493 | dev_dbg(codec->dev, "PLL disabled\n"); |
1494 | |
1495 | snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL, |
1496 | RT5631_SYSCLK_SOUR_SEL_MASK, |
1497 | RT5631_SYSCLK_SOUR_SEL_MCLK); |
1498 | |
1499 | return 0; |
1500 | } |
1501 | |
1502 | if (rt5631->master) { |
1503 | for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) |
1504 | if (freq_in == codec_master_pll_div[i].pll_in && |
1505 | freq_out == codec_master_pll_div[i].pll_out) { |
1506 | dev_info(codec->dev, |
1507 | "change PLL in master mode\n"); |
1508 | snd_soc_write(codec, RT5631_PLL_CTRL, |
1509 | codec_master_pll_div[i].reg_val); |
1510 | schedule_timeout_uninterruptible( |
1511 | msecs_to_jiffies(20)); |
1512 | snd_soc_update_bits(codec, |
1513 | RT5631_GLOBAL_CLK_CTRL, |
1514 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1515 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1516 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1517 | RT5631_PLLCLK_SOUR_SEL_MCLK); |
1518 | ret = 0; |
1519 | break; |
1520 | } |
1521 | } else { |
1522 | for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) |
1523 | if (freq_in == codec_slave_pll_div[i].pll_in && |
1524 | freq_out == codec_slave_pll_div[i].pll_out) { |
1525 | dev_info(codec->dev, |
1526 | "change PLL in slave mode\n"); |
1527 | snd_soc_write(codec, RT5631_PLL_CTRL, |
1528 | codec_slave_pll_div[i].reg_val); |
1529 | schedule_timeout_uninterruptible( |
1530 | msecs_to_jiffies(20)); |
1531 | snd_soc_update_bits(codec, |
1532 | RT5631_GLOBAL_CLK_CTRL, |
1533 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1534 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1535 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1536 | RT5631_PLLCLK_SOUR_SEL_BCLK); |
1537 | ret = 0; |
1538 | break; |
1539 | } |
1540 | } |
1541 | |
1542 | return ret; |
1543 | } |
1544 | |
1545 | static int rt5631_set_bias_level(struct snd_soc_codec *codec, |
1546 | enum snd_soc_bias_level level) |
1547 | { |
1548 | switch (level) { |
1549 | case SND_SOC_BIAS_ON: |
1550 | case SND_SOC_BIAS_PREPARE: |
1551 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2, |
1552 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL, |
1553 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL); |
1554 | break; |
1555 | |
1556 | case SND_SOC_BIAS_STANDBY: |
1557 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1558 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1559 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1560 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1561 | msleep(80); |
1562 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1563 | RT5631_PWR_FAST_VREF_CTRL, |
1564 | RT5631_PWR_FAST_VREF_CTRL); |
1565 | codec->cache_only = false; |
1566 | snd_soc_cache_sync(codec); |
1567 | } |
1568 | break; |
1569 | |
1570 | case SND_SOC_BIAS_OFF: |
1571 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000); |
1572 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000); |
1573 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000); |
1574 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000); |
1575 | break; |
1576 | |
1577 | default: |
1578 | break; |
1579 | } |
1580 | codec->dapm.bias_level = level; |
1581 | |
1582 | return 0; |
1583 | } |
1584 | |
1585 | static int rt5631_probe(struct snd_soc_codec *codec) |
1586 | { |
1587 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1588 | unsigned int val; |
1589 | int ret; |
1590 | |
1591 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); |
1592 | if (ret != 0) { |
1593 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
1594 | return ret; |
1595 | } |
1596 | |
1597 | val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3); |
1598 | if (val & 0x0002) |
1599 | rt5631->codec_version = 1; |
1600 | else |
1601 | rt5631->codec_version = 0; |
1602 | |
1603 | rt5631_reset(codec); |
1604 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1605 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1606 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1607 | msleep(80); |
1608 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1609 | RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL); |
1610 | /* enable HP zero cross */ |
1611 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18); |
1612 | /* power off ClassD auto Recovery */ |
1613 | if (rt5631->codec_version) |
1614 | snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2, |
1615 | 0x2000, 0x2000); |
1616 | else |
1617 | snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2, |
1618 | 0x2000, 0); |
1619 | /* DMIC */ |
1620 | if (rt5631->dmic_used_flag) { |
1621 | snd_soc_update_bits(codec, RT5631_GPIO_CTRL, |
1622 | RT5631_GPIO_PIN_FUN_SEL_MASK | |
1623 | RT5631_GPIO_DMIC_FUN_SEL_MASK, |
1624 | RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC | |
1625 | RT5631_GPIO_DMIC_FUN_SEL_DIMC); |
1626 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
1627 | RT5631_DMIC_L_CH_LATCH_MASK | |
1628 | RT5631_DMIC_R_CH_LATCH_MASK, |
1629 | RT5631_DMIC_L_CH_LATCH_FALLING | |
1630 | RT5631_DMIC_R_CH_LATCH_RISING); |
1631 | } |
1632 | |
1633 | codec->dapm.bias_level = SND_SOC_BIAS_STANDBY; |
d8085222 |
1634 | |
1635 | return 0; |
1636 | } |
1637 | |
1638 | static int rt5631_remove(struct snd_soc_codec *codec) |
1639 | { |
1640 | rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1641 | return 0; |
1642 | } |
1643 | |
1644 | #ifdef CONFIG_PM |
1645 | static int rt5631_suspend(struct snd_soc_codec *codec, pm_message_t state) |
1646 | { |
1647 | rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1648 | return 0; |
1649 | } |
1650 | |
1651 | static int rt5631_resume(struct snd_soc_codec *codec) |
1652 | { |
1653 | rt5631_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1654 | return 0; |
1655 | } |
1656 | #else |
1657 | #define rt5631_suspend NULL |
1658 | #define rt5631_resume NULL |
1659 | #endif |
1660 | |
1661 | #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000 |
1662 | #define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \ |
1663 | SNDRV_PCM_FMTBIT_S20_3LE | \ |
1664 | SNDRV_PCM_FMTBIT_S24_LE | \ |
1665 | SNDRV_PCM_FMTBIT_S8) |
1666 | |
f79e5e8c |
1667 | static struct snd_soc_dai_ops rt5631_ops = { |
d8085222 |
1668 | .hw_params = rt5631_hifi_pcm_params, |
1669 | .set_fmt = rt5631_hifi_codec_set_dai_fmt, |
1670 | .set_sysclk = rt5631_hifi_codec_set_dai_sysclk, |
1671 | .set_pll = rt5631_codec_set_dai_pll, |
1672 | }; |
1673 | |
51e19fb3 |
1674 | static struct snd_soc_dai_driver rt5631_dai[] = { |
d8085222 |
1675 | { |
1676 | .name = "rt5631-hifi", |
1677 | .id = 1, |
1678 | .playback = { |
1679 | .stream_name = "HIFI Playback", |
1680 | .channels_min = 1, |
1681 | .channels_max = 2, |
1682 | .rates = RT5631_STEREO_RATES, |
1683 | .formats = RT5631_FORMAT, |
1684 | }, |
1685 | .capture = { |
1686 | .stream_name = "HIFI Capture", |
1687 | .channels_min = 1, |
1688 | .channels_max = 2, |
1689 | .rates = RT5631_STEREO_RATES, |
1690 | .formats = RT5631_FORMAT, |
1691 | }, |
1692 | .ops = &rt5631_ops, |
1693 | }, |
1694 | }; |
1695 | |
1696 | static struct snd_soc_codec_driver soc_codec_dev_rt5631 = { |
1697 | .probe = rt5631_probe, |
1698 | .remove = rt5631_remove, |
1699 | .suspend = rt5631_suspend, |
1700 | .resume = rt5631_resume, |
1701 | .set_bias_level = rt5631_set_bias_level, |
1702 | .reg_cache_size = RT5631_VENDOR_ID2 + 1, |
1703 | .reg_word_size = sizeof(u16), |
1704 | .reg_cache_default = rt5631_reg, |
1705 | .volatile_register = rt5631_volatile_register, |
1706 | .readable_register = rt5631_readable_register, |
1707 | .reg_cache_step = 1, |
1708 | .controls = rt5631_snd_controls, |
1709 | .num_controls = ARRAY_SIZE(rt5631_snd_controls), |
1710 | .dapm_widgets = rt5631_dapm_widgets, |
1711 | .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets), |
1712 | .dapm_routes = rt5631_dapm_routes, |
1713 | .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes), |
1714 | }; |
1715 | |
1716 | static const struct i2c_device_id rt5631_i2c_id[] = { |
1717 | { "rt5631", 0 }, |
1718 | { } |
1719 | }; |
1720 | MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id); |
1721 | |
1722 | static int rt5631_i2c_probe(struct i2c_client *i2c, |
1723 | const struct i2c_device_id *id) |
1724 | { |
1725 | struct rt5631_priv *rt5631; |
1726 | int ret; |
1727 | |
1728 | rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL); |
1729 | if (NULL == rt5631) |
1730 | return -ENOMEM; |
1731 | |
1732 | i2c_set_clientdata(i2c, rt5631); |
1733 | |
1734 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631, |
1735 | rt5631_dai, ARRAY_SIZE(rt5631_dai)); |
1736 | if (ret < 0) |
1737 | kfree(rt5631); |
1738 | |
1739 | return ret; |
1740 | } |
1741 | |
1742 | static __devexit int rt5631_i2c_remove(struct i2c_client *client) |
1743 | { |
1744 | snd_soc_unregister_codec(&client->dev); |
1745 | kfree(i2c_get_clientdata(client)); |
1746 | return 0; |
1747 | } |
1748 | |
f79e5e8c |
1749 | static struct i2c_driver rt5631_i2c_driver = { |
d8085222 |
1750 | .driver = { |
1751 | .name = "rt5631", |
1752 | .owner = THIS_MODULE, |
1753 | }, |
1754 | .probe = rt5631_i2c_probe, |
1755 | .remove = __devexit_p(rt5631_i2c_remove), |
1756 | .id_table = rt5631_i2c_id, |
1757 | }; |
1758 | |
1759 | static int __init rt5631_modinit(void) |
1760 | { |
1761 | return i2c_add_driver(&rt5631_i2c_driver); |
1762 | } |
1763 | module_init(rt5631_modinit); |
1764 | |
1765 | static void __exit rt5631_modexit(void) |
1766 | { |
1767 | i2c_del_driver(&rt5631_i2c_driver); |
1768 | } |
1769 | module_exit(rt5631_modexit); |
1770 | |
1771 | MODULE_DESCRIPTION("ASoC RT5631 driver"); |
1772 | MODULE_AUTHOR("flove <flove@realtek.com>"); |
1773 | MODULE_LICENSE("GPL"); |