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Merge tag 'v4.3-rc1' into MTD -next development
[deliverable/linux.git] / sound / soc / codecs / rt5640.c
CommitLineData
997b0520 1/*
b0c27846 2 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
997b0520
BL		 3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
affb74ad 21#include <linux/of.h>
dcad9f03 22#include <linux/of_gpio.h>
997b0520
BL		 23#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
02b80773 25#include <linux/acpi.h>
997b0520
BL		 26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
49ef7925 34#include "rl6231.h"
997b0520
BL		 35#include "rt5640.h"
36
37#define RT5640_DEVICE_ID 0x6231
38
39#define RT5640_PR_RANGE_BASE (0xff + 1)
40#define RT5640_PR_SPACING 0x100
41
42#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
43
44static const struct regmap_range_cfg rt5640_ranges[] = {
45 { .name = "PR", .range_min = RT5640_PR_BASE,
46 .range_max = RT5640_PR_BASE + 0xb4,
47 .selector_reg = RT5640_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5640_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
8019ff6c 54static const struct reg_sequence init_list[] = {
997b0520 55 {RT5640_PR_BASE + 0x3d, 0x3600},
997b0520
BL		 56 {RT5640_PR_BASE + 0x12, 0x0aa8},
57 {RT5640_PR_BASE + 0x14, 0x0aaa},
58 {RT5640_PR_BASE + 0x20, 0x6110},
59 {RT5640_PR_BASE + 0x21, 0xe0e0},
60 {RT5640_PR_BASE + 0x23, 0x1804},
61};
997b0520 62
2f2a714c 63static const struct reg_default rt5640_reg[] = {
997b0520
BL		 64 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167};
168
169static int rt5640_reset(struct snd_soc_codec *codec)
170{
171 return snd_soc_write(codec, RT5640_RESET, 0);
172}
173
174static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207}
208
209static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210{
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
8295822d 350static const DECLARE_TLV_DB_RANGE(bst_tlv,
997b0520
BL		 351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
8295822d
LPC		 357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
358);
997b0520
BL		 359
360/* Interface data select */
361static const char * const rt5640_data_select[] = {
362 "Normal", "left copy to right", "right copy to left", "Swap"};
363
4c03cb6f
TI		 364static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
997b0520 366
4c03cb6f
TI		 367static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
997b0520 369
4c03cb6f
TI		 370static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
997b0520 372
4c03cb6f
TI		 373static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
997b0520
BL		 375
376/* Class D speaker gain ratio */
377static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
4c03cb6f
TI		 380static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
381 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
997b0520
BL		 382
383static const struct snd_kcontrol_new rt5640_snd_controls[] = {
384 /* Speaker Output Volume */
997b0520
BL		 385 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
386 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
387 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
388 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
389 /* Headphone Output Volume */
997b0520
BL		 390 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
391 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
392 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
393 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
394 /* OUTPUT Control */
395 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
396 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
397 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
398 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
022d21f0 401
997b0520
BL		 402 /* DAC Digital Volume */
403 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
404 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
405 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
407 175, 0, dac_vol_tlv),
997b0520
BL		 408 /* IN1/IN2 Control */
409 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
410 RT5640_BST_SFT1, 8, 0, bst_tlv),
411 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
412 RT5640_BST_SFT2, 8, 0, bst_tlv),
413 /* INL/INR Volume Control */
414 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
415 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
416 31, 1, in_vol_tlv),
417 /* ADC Digital Volume Control */
418 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
419 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
420 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
421 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
422 127, 0, adc_vol_tlv),
423 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
424 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
425 127, 0, adc_vol_tlv),
426 /* ADC Boost Volume Control */
427 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
428 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
429 3, 0, adc_bst_tlv),
430 /* Class D speaker gain ratio */
431 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
432
433 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
434 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
435 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
436 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
437};
438
022d21f0
OC		 439static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
440 /* MONO Output Control */
441 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
442 1, 1),
443
444 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
445 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
446};
447
997b0520
BL		 448/**
449 * set_dmic_clk - Set parameter of dmic.
450 *
451 * @w: DAPM widget.
452 * @kcontrol: The kcontrol of this widget.
453 * @event: Event id.
454 *
997b0520
BL		 455 */
456static int set_dmic_clk(struct snd_soc_dapm_widget *w,
457 struct snd_kcontrol *kcontrol, int event)
458{
bb1cd608 459 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
997b0520 460 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
00a6d6e5 461 int idx, rate;
49ef7925 462
00a6d6e5
OC		 463 rate = rt5640->sysclk / rl6231_get_pre_div(rt5640->regmap,
464 RT5640_ADDA_CLK1, RT5640_I2S_PD1_SFT);
465 idx = rl6231_calc_dmic_clk(rate);
997b0520
BL		 466 if (idx < 0)
467 dev_err(codec->dev, "Failed to set DMIC clock\n");
468 else
469 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
470 idx << RT5640_DMIC_CLK_SFT);
471 return idx;
472}
473
218a3f96 474static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
997b0520
BL		 475 struct snd_soc_dapm_widget *sink)
476{
bb1cd608 477 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
997b0520
BL		 478 unsigned int val;
479
bb1cd608 480 val = snd_soc_read(codec, RT5640_GLB_CLK);
997b0520 481 val &= RT5640_SCLK_SRC_MASK;
acf04e63 482 if (val == RT5640_SCLK_SRC_PLL1)
997b0520
BL		 483 return 1;
484 else
485 return 0;
486}
487
488/* Digital Mixer */
489static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
490 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
491 RT5640_M_ADC_L1_SFT, 1, 1),
492 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
493 RT5640_M_ADC_L2_SFT, 1, 1),
494};
495
496static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
497 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
498 RT5640_M_ADC_R1_SFT, 1, 1),
499 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
500 RT5640_M_ADC_R2_SFT, 1, 1),
501};
502
503static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
504 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
505 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
506 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
507 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
508};
509
510static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
511 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
512 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
513 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
514 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
515};
516
517static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
518 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
519 RT5640_M_ADCMIX_L_SFT, 1, 1),
520 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
521 RT5640_M_IF1_DAC_L_SFT, 1, 1),
522};
523
524static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
525 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
526 RT5640_M_ADCMIX_R_SFT, 1, 1),
527 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
528 RT5640_M_IF1_DAC_R_SFT, 1, 1),
529};
530
531static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
532 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
533 RT5640_M_DAC_L1_SFT, 1, 1),
534 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
535 RT5640_M_DAC_L2_SFT, 1, 1),
536 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
537 RT5640_M_ANC_DAC_L_SFT, 1, 1),
538};
539
540static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
541 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
542 RT5640_M_DAC_R1_SFT, 1, 1),
543 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
544 RT5640_M_DAC_R2_SFT, 1, 1),
545 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
546 RT5640_M_ANC_DAC_R_SFT, 1, 1),
547};
548
022d21f0
OC		 549static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
550 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_DAC_L1_SFT, 1, 1),
552 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
553 RT5640_M_DAC_L2_SFT, 1, 1),
554};
555
556static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
557 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
558 RT5640_M_DAC_R1_SFT, 1, 1),
559 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
560 RT5640_M_DAC_R2_SFT, 1, 1),
561};
562
997b0520
BL		 563static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
564 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
565 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
566 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
567 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
568 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
570};
571
572static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
573 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
574 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
575 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
576 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
577 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
578 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
579};
580
581static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
582 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
583 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
584 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
585 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
586};
587
588static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
589 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
590 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
591 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
592 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
593};
594
595/* Analog Input Mixer */
596static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
597 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
598 RT5640_M_HP_L_RM_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
600 RT5640_M_IN_L_RM_L_SFT, 1, 1),
601 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
602 RT5640_M_BST4_RM_L_SFT, 1, 1),
603 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
604 RT5640_M_BST1_RM_L_SFT, 1, 1),
605 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
606 RT5640_M_OM_L_RM_L_SFT, 1, 1),
607};
608
609static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
610 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
611 RT5640_M_HP_R_RM_R_SFT, 1, 1),
612 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
613 RT5640_M_IN_R_RM_R_SFT, 1, 1),
614 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
615 RT5640_M_BST4_RM_R_SFT, 1, 1),
616 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
617 RT5640_M_BST1_RM_R_SFT, 1, 1),
618 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
619 RT5640_M_OM_R_RM_R_SFT, 1, 1),
620};
621
622/* Analog Output Mixer */
623static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
624 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
625 RT5640_M_RM_L_SM_L_SFT, 1, 1),
626 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
627 RT5640_M_IN_L_SM_L_SFT, 1, 1),
628 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
629 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
630 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
631 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
632 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
633 RT5640_M_OM_L_SM_L_SFT, 1, 1),
634};
635
636static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
637 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
638 RT5640_M_RM_R_SM_R_SFT, 1, 1),
639 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
640 RT5640_M_IN_R_SM_R_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
642 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
643 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
644 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
646 RT5640_M_OM_R_SM_R_SFT, 1, 1),
647};
648
649static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
650 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
651 RT5640_M_SM_L_OM_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
653 RT5640_M_BST1_OM_L_SFT, 1, 1),
654 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
655 RT5640_M_IN_L_OM_L_SFT, 1, 1),
656 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
657 RT5640_M_RM_L_OM_L_SFT, 1, 1),
658 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
659 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
661 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
663 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
664};
665
666static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
667 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
668 RT5640_M_SM_L_OM_R_SFT, 1, 1),
669 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
670 RT5640_M_BST4_OM_R_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
672 RT5640_M_BST1_OM_R_SFT, 1, 1),
673 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
674 RT5640_M_IN_R_OM_R_SFT, 1, 1),
675 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
676 RT5640_M_RM_R_OM_R_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
678 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
679 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
680 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
682 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
683};
684
022d21f0
OC		 685static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
686 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
687 RT5640_M_BST1_OM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
689 RT5640_M_IN_L_OM_L_SFT, 1, 1),
690 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
691 RT5640_M_RM_L_OM_L_SFT, 1, 1),
692 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
693 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
694};
695
696static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
697 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
698 RT5640_M_BST4_OM_R_SFT, 1, 1),
699 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
700 RT5640_M_BST1_OM_R_SFT, 1, 1),
701 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
702 RT5640_M_IN_R_OM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
704 RT5640_M_RM_R_OM_R_SFT, 1, 1),
705 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
706 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
707};
708
997b0520
BL		 709static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
710 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
711 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
712 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
713 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
714 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
715 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
716 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
717 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
718 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
719 RT5640_M_BST1_SPM_L_SFT, 1, 1),
720};
721
722static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
723 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
724 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
725 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
726 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
727 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
728 RT5640_M_BST1_SPM_R_SFT, 1, 1),
729};
730
731static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
732 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
733 RT5640_M_DAC2_HM_SFT, 1, 1),
734 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
735 RT5640_M_DAC1_HM_SFT, 1, 1),
736 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
737 RT5640_M_HPVOL_HM_SFT, 1, 1),
738};
739
022d21f0
OC		 740static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
741 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
742 RT5640_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
744 RT5640_M_HPVOL_HM_SFT, 1, 1),
745};
746
997b0520
BL		 747static const struct snd_kcontrol_new rt5640_lout_mix[] = {
748 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
749 RT5640_M_DAC_L1_LM_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
751 RT5640_M_DAC_R1_LM_SFT, 1, 1),
752 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
753 RT5640_M_OV_L_LM_SFT, 1, 1),
754 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
755 RT5640_M_OV_R_LM_SFT, 1, 1),
756};
757
758static const struct snd_kcontrol_new rt5640_mono_mix[] = {
759 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
760 RT5640_M_DAC_R2_MM_SFT, 1, 1),
761 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
762 RT5640_M_DAC_L2_MM_SFT, 1, 1),
763 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
764 RT5640_M_OV_R_MM_SFT, 1, 1),
765 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
766 RT5640_M_OV_L_MM_SFT, 1, 1),
767 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
768 RT5640_M_BST1_MM_SFT, 1, 1),
769};
770
246693ba
BL		 771static const struct snd_kcontrol_new spk_l_enable_control =
772 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
773 RT5640_L_MUTE_SFT, 1, 1);
774
775static const struct snd_kcontrol_new spk_r_enable_control =
776 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
777 RT5640_R_MUTE_SFT, 1, 1);
778
779static const struct snd_kcontrol_new hp_l_enable_control =
780 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
781 RT5640_L_MUTE_SFT, 1, 1);
782
783static const struct snd_kcontrol_new hp_r_enable_control =
784 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
785 RT5640_R_MUTE_SFT, 1, 1);
786
997b0520
BL		 787/* Stereo ADC source */
788static const char * const rt5640_stereo_adc1_src[] = {
789 "DIG MIX", "ADC"
790};
791
4c03cb6f
TI		 792static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
793 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
997b0520
BL		 794
795static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
796 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
797
798static const char * const rt5640_stereo_adc2_src[] = {
799 "DMIC1", "DMIC2", "DIG MIX"
800};
801
4c03cb6f
TI		 802static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
803 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
997b0520
BL		 804
805static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
806 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
807
808/* Mono ADC source */
809static const char * const rt5640_mono_adc_l1_src[] = {
810 "Mono DAC MIXL", "ADCL"
811};
812
4c03cb6f
TI		 813static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
814 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
997b0520
BL		 815
816static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
817 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
818
819static const char * const rt5640_mono_adc_l2_src[] = {
820 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
821};
822
4c03cb6f
TI		 823static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
824 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
997b0520
BL		 825
826static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
827 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
828
829static const char * const rt5640_mono_adc_r1_src[] = {
830 "Mono DAC MIXR", "ADCR"
831};
832
4c03cb6f
TI		 833static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
834 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
997b0520
BL		 835
836static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
837 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
838
839static const char * const rt5640_mono_adc_r2_src[] = {
840 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
841};
842
4c03cb6f
TI		 843static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
844 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
997b0520
BL		 845
846static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
847 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
848
849/* DAC2 channel source */
850static const char * const rt5640_dac_l2_src[] = {
851 "IF2", "Base L/R"
852};
853
854static int rt5640_dac_l2_values[] = {
855 0,
856 3,
857};
858
4c03cb6f
TI		 859static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
860 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
861 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
997b0520
BL		 862
863static const struct snd_kcontrol_new rt5640_dac_l2_mux =
712fb1c2 864 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
997b0520
BL		 865
866static const char * const rt5640_dac_r2_src[] = {
867 "IF2",
868};
869
870static int rt5640_dac_r2_values[] = {
871 0,
872};
873
4c03cb6f
TI		 874static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
875 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
876 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
997b0520
BL		 877
878static const struct snd_kcontrol_new rt5640_dac_r2_mux =
879 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
880
881/* digital interface and iis interface map */
882static const char * const rt5640_dai_iis_map[] = {
883 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
884};
885
886static int rt5640_dai_iis_map_values[] = {
887 0,
888 5,
889 6,
890 7,
891};
892
4c03cb6f
TI		 893static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
894 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
895 0x7, rt5640_dai_iis_map,
896 rt5640_dai_iis_map_values);
997b0520
BL		 897
898static const struct snd_kcontrol_new rt5640_dai_mux =
712fb1c2 899 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
997b0520
BL		 900
901/* SDI select */
902static const char * const rt5640_sdi_sel[] = {
903 "IF1", "IF2"
904};
905
4c03cb6f
TI		 906static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
907 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
997b0520
BL		 908
909static const struct snd_kcontrol_new rt5640_sdi_mux =
910 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
911
89d05130 912static void hp_amp_power_on(struct snd_soc_codec *codec)
246693ba
BL		 913{
914 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
915
916 /* depop parameters */
917 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
918 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
919 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
920 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
921 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
922 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
923 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
924 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
925 0x9f00);
926 /* headphone amp power on */
927 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
928 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
929 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
930 RT5640_PWR_HA,
931 RT5640_PWR_HA);
932 usleep_range(10000, 15000);
933 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
934 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
935 RT5640_PWR_FV1 | RT5640_PWR_FV2);
936}
937
938static void rt5640_pmu_depop(struct snd_soc_codec *codec)
939{
940 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
941
942 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
943 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
944 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
945 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
946 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
947
948 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
949 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
950 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
951 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
952 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
953
954 regmap_write(rt5640->regmap, RT5640_PR_BASE +
955 RT5640_MAMP_INT_REG2, 0x1c00);
956 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
957 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
958 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
959 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
960 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
961}
962
963static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
964 struct snd_kcontrol *kcontrol, int event)
965{
bb1cd608 966 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 967 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
968
969 switch (event) {
970 case SND_SOC_DAPM_POST_PMU:
971 rt5640_pmu_depop(codec);
972 rt5640->hp_mute = 0;
973 break;
974
975 case SND_SOC_DAPM_PRE_PMD:
976 rt5640->hp_mute = 1;
977 usleep_range(70000, 75000);
978 break;
979
980 default:
981 return 0;
982 }
983
984 return 0;
985}
986
9b850ca4
JL		 987static int rt5640_lout_event(struct snd_soc_dapm_widget *w,
988 struct snd_kcontrol *kcontrol, int event)
989{
990 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
991
992 switch (event) {
993 case SND_SOC_DAPM_POST_PMU:
994 hp_amp_power_on(codec);
995 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
996 RT5640_PWR_LM, RT5640_PWR_LM);
997 snd_soc_update_bits(codec, RT5640_OUTPUT,
998 RT5640_L_MUTE | RT5640_R_MUTE, 0);
999 break;
1000
1001 case SND_SOC_DAPM_PRE_PMD:
1002 snd_soc_update_bits(codec, RT5640_OUTPUT,
1003 RT5640_L_MUTE | RT5640_R_MUTE,
1004 RT5640_L_MUTE | RT5640_R_MUTE);
1005 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1006 RT5640_PWR_LM, 0);
1007 break;
1008
1009 default:
1010 return 0;
1011 }
1012
1013 return 0;
1014}
1015
246693ba
BL		 1016static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1017 struct snd_kcontrol *kcontrol, int event)
1018{
bb1cd608 1019 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 1020
1021 switch (event) {
1022 case SND_SOC_DAPM_POST_PMU:
1023 hp_amp_power_on(codec);
1024 break;
1025 default:
1026 return 0;
1027 }
1028
1029 return 0;
1030}
1031
1032static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1033 struct snd_kcontrol *kcontrol, int event)
1034{
bb1cd608 1035 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
246693ba
BL		 1036 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1037
1038 switch (event) {
1039 case SND_SOC_DAPM_POST_PMU:
1040 if (!rt5640->hp_mute)
1041 usleep_range(80000, 85000);
1042
1043 break;
1044
1045 default:
1046 return 0;
1047 }
1048
1049 return 0;
1050}
1051
997b0520
BL		 1052static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1053 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1054 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1055 /* Input Side */
1056 /* micbias */
1057 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1058 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1059 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
9be94aea 1060 RT5640_PWR_MB1_BIT, 0, NULL, 0),
997b0520
BL		 1061 /* Input Lines */
1062 SND_SOC_DAPM_INPUT("DMIC1"),
1063 SND_SOC_DAPM_INPUT("DMIC2"),
1064 SND_SOC_DAPM_INPUT("IN1P"),
1065 SND_SOC_DAPM_INPUT("IN1N"),
1066 SND_SOC_DAPM_INPUT("IN2P"),
1067 SND_SOC_DAPM_INPUT("IN2N"),
1068 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1069 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1070 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1071 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1072
1073 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1074 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
71d97a79
OC		 1075 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1076 NULL, 0),
1077 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1078 NULL, 0),
997b0520
BL		 1079 /* Boost */
1080 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1081 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1082 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1083 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1084 /* Input Volume */
1085 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1086 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1087 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1088 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
997b0520
BL		 1089 /* REC Mixer */
1090 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1091 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1092 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1093 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1094 /* ADCs */
1095 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1096 RT5640_PWR_ADC_L_BIT, 0),
1097 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1098 RT5640_PWR_ADC_R_BIT, 0),
1099 /* ADC Mux */
1100 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1101 &rt5640_sto_adc_2_mux),
1102 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1103 &rt5640_sto_adc_2_mux),
1104 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1105 &rt5640_sto_adc_1_mux),
1106 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1107 &rt5640_sto_adc_1_mux),
1108 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1109 &rt5640_mono_adc_l2_mux),
1110 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1111 &rt5640_mono_adc_l1_mux),
1112 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1113 &rt5640_mono_adc_r1_mux),
1114 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1115 &rt5640_mono_adc_r2_mux),
1116 /* ADC Mixer */
1117 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1118 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1119 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1120 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1121 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1122 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1123 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1124 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1125 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1126 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1127 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1128 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1129 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1130 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1131
1132 /* Digital Interface */
1133 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1134 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1135 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1136 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1137 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1138 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1139 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1140 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1141 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1142 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1143 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1144 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1145 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1146 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1147 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1148 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1149 /* Digital Interface Select */
1150 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1151 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1152 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1153 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1154 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1155 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1156 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1157 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1158 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1159 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1160 /* Audio Interface */
1161 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1162 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1163 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1164 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
022d21f0 1165
997b0520
BL		 1166 /* Output Side */
1167 /* DAC mixer before sound effect */
1168 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1169 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1170 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1171 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
022d21f0 1172
997b0520 1173 /* DAC Mixer */
997b0520
BL		 1174 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1175 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1176 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1177 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1178 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1179 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1180 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1181 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1182 /* DACs */
1183 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1184 RT5640_PWR_DAC_L1_BIT, 0),
997b0520
BL		 1185 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1186 RT5640_PWR_DAC_R1_BIT, 0),
022d21f0 1187
997b0520
BL		 1188 /* SPK/OUT Mixer */
1189 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1190 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1191 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1192 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
997b0520
BL		 1193 /* Ouput Volume */
1194 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1195 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1196 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1197 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1198 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1199 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1200 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1201 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1202 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1203 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1204 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1205 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1206 /* SPO/HPO/LOUT/Mono Mixer */
1207 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1208 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1209 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1210 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
9b850ca4 1211 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
997b0520 1212 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
246693ba
BL		 1213 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1214 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1215 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1216 rt5640_hp_event,
1217 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
9b850ca4
JL		 1218 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
1219 rt5640_lout_event,
1220 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
246693ba 1221 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
997b0520 1222 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
246693ba 1223 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
997b0520
BL		 1224 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1225 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
246693ba
BL		 1226 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1227
1228 /* Output Switch */
1229 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1230 &spk_l_enable_control),
1231 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1232 &spk_r_enable_control),
1233 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1234 &hp_l_enable_control),
1235 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1236 &hp_r_enable_control),
1237 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
997b0520
BL		 1238 /* Output Lines */
1239 SND_SOC_DAPM_OUTPUT("SPOLP"),
1240 SND_SOC_DAPM_OUTPUT("SPOLN"),
1241 SND_SOC_DAPM_OUTPUT("SPORP"),
1242 SND_SOC_DAPM_OUTPUT("SPORN"),
1243 SND_SOC_DAPM_OUTPUT("HPOL"),
1244 SND_SOC_DAPM_OUTPUT("HPOR"),
1245 SND_SOC_DAPM_OUTPUT("LOUTL"),
1246 SND_SOC_DAPM_OUTPUT("LOUTR"),
022d21f0
OC		 1247};
1248
1249static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1250 /* Audio DSP */
1251 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1252 /* ANC */
1253 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1254
1255 /* DAC2 channel Mux */
1256 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1257 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1258
1259 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1260 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1261 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1262 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1263
1264 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT,
1265 0),
1266 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT,
1267 0),
1268
1269 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1270 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1271 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1272 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1273
1274 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1275 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1276 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1277 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1278
1279 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1280 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1281 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1282 RT5640_PWR_MA_BIT, 0, NULL, 0),
1283
997b0520
BL		 1284 SND_SOC_DAPM_OUTPUT("MONOP"),
1285 SND_SOC_DAPM_OUTPUT("MONON"),
1286};
1287
022d21f0
OC		 1288static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1289 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1290 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1291 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1292 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1293
1294 SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1,
1295 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1296 SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1,
1297 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1298
1299 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1300 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1301 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1302 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1303
1304 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1305 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1306 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1307 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1308};
1309
997b0520
BL		 1310static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1311 {"IN1P", NULL, "LDO2"},
1312 {"IN2P", NULL, "LDO2"},
1313
1314 {"DMIC L1", NULL, "DMIC1"},
1315 {"DMIC R1", NULL, "DMIC1"},
1316 {"DMIC L2", NULL, "DMIC2"},
1317 {"DMIC R2", NULL, "DMIC2"},
1318
1319 {"BST1", NULL, "IN1P"},
1320 {"BST1", NULL, "IN1N"},
1321 {"BST2", NULL, "IN2P"},
1322 {"BST2", NULL, "IN2N"},
1323
1324 {"INL VOL", NULL, "IN2P"},
1325 {"INR VOL", NULL, "IN2N"},
1326
1327 {"RECMIXL", "HPOL Switch", "HPOL"},
1328 {"RECMIXL", "INL Switch", "INL VOL"},
1329 {"RECMIXL", "BST2 Switch", "BST2"},
1330 {"RECMIXL", "BST1 Switch", "BST1"},
1331 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1332
1333 {"RECMIXR", "HPOR Switch", "HPOR"},
1334 {"RECMIXR", "INR Switch", "INR VOL"},
1335 {"RECMIXR", "BST2 Switch", "BST2"},
1336 {"RECMIXR", "BST1 Switch", "BST1"},
1337 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1338
1339 {"ADC L", NULL, "RECMIXL"},
1340 {"ADC R", NULL, "RECMIXR"},
1341
1342 {"DMIC L1", NULL, "DMIC CLK"},
1343 {"DMIC L1", NULL, "DMIC1 Power"},
1344 {"DMIC R1", NULL, "DMIC CLK"},
1345 {"DMIC R1", NULL, "DMIC1 Power"},
1346 {"DMIC L2", NULL, "DMIC CLK"},
1347 {"DMIC L2", NULL, "DMIC2 Power"},
1348 {"DMIC R2", NULL, "DMIC CLK"},
1349 {"DMIC R2", NULL, "DMIC2 Power"},
1350
1351 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1352 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1353 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1354 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1355 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1356
1357 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1358 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1359 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1360 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1361 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1362
1363 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1364 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1365 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1366 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1367 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1368
1369 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1370 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1371 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1372 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1373 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1374
1375 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1376 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1377 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
218a3f96 1378 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1379
1380 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1381 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1382 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
218a3f96 1383 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1384
1385 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1386 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1387 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
218a3f96 1388 {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1389
1390 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1391 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1392 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
218a3f96 1393 {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1394
1395 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1396 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1397 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1398 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1399
1400 {"IF1 ADC", NULL, "I2S1"},
1401 {"IF1 ADC", NULL, "IF1 ADC L"},
1402 {"IF1 ADC", NULL, "IF1 ADC R"},
1403 {"IF2 ADC", NULL, "I2S2"},
1404 {"IF2 ADC", NULL, "IF2 ADC L"},
1405 {"IF2 ADC", NULL, "IF2 ADC R"},
1406
1407 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1408 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1409 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1410 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1411 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1412 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1413
1414 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1415 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1416 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1417 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1418 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1419 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1420
1421 {"AIF1TX", NULL, "DAI1 TX Mux"},
1422 {"AIF1TX", NULL, "SDI1 TX Mux"},
1423 {"AIF2TX", NULL, "DAI2 TX Mux"},
1424 {"AIF2TX", NULL, "SDI2 TX Mux"},
1425
1426 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1427 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1428 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1429 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1430
1431 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1432 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1433 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1434 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1435
1436 {"IF1 DAC", NULL, "I2S1"},
1437 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1438 {"IF2 DAC", NULL, "I2S2"},
1439 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1440
1441 {"IF1 DAC L", NULL, "IF1 DAC"},
1442 {"IF1 DAC R", NULL, "IF1 DAC"},
1443 {"IF2 DAC L", NULL, "IF2 DAC"},
1444 {"IF2 DAC R", NULL, "IF2 DAC"},
1445
1446 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1447 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1448 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1449 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1450
997b0520 1451 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1452 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1453
1454 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1455 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1456
1457 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
997b0520 1458 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
997b0520
BL		 1459
1460 {"DAC L1", NULL, "Stereo DAC MIXL"},
218a3f96 1461 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
997b0520 1462 {"DAC R1", NULL, "Stereo DAC MIXR"},
218a3f96 1463 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
997b0520
BL		 1464
1465 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1466 {"SPK MIXL", "INL Switch", "INL VOL"},
1467 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
997b0520
BL		 1468 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1469 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1470 {"SPK MIXR", "INR Switch", "INR VOL"},
1471 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
997b0520
BL		 1472 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1473
997b0520
BL		 1474 {"OUT MIXL", "BST1 Switch", "BST1"},
1475 {"OUT MIXL", "INL Switch", "INL VOL"},
1476 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
997b0520
BL		 1477 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1478
997b0520
BL		 1479 {"OUT MIXR", "BST2 Switch", "BST2"},
1480 {"OUT MIXR", "BST1 Switch", "BST1"},
1481 {"OUT MIXR", "INR Switch", "INR VOL"},
1482 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
997b0520
BL		 1483 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1484
1485 {"SPKVOL L", NULL, "SPK MIXL"},
1486 {"SPKVOL R", NULL, "SPK MIXR"},
1487 {"HPOVOL L", NULL, "OUT MIXL"},
1488 {"HPOVOL R", NULL, "OUT MIXR"},
1489 {"OUTVOL L", NULL, "OUT MIXL"},
1490 {"OUTVOL R", NULL, "OUT MIXR"},
1491
1492 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1493 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1494 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1495 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1496 {"SPOL MIX", "BST1 Switch", "BST1"},
1497 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1498 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1499 {"SPOR MIX", "BST1 Switch", "BST1"},
1500
997b0520
BL		 1501 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1502 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
246693ba 1503 {"HPO MIX L", NULL, "HP L Amp"},
997b0520
BL		 1504 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1505 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
246693ba 1506 {"HPO MIX R", NULL, "HP R Amp"},
997b0520
BL		 1507
1508 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1509 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1510 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1511 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1512
246693ba
BL		 1513 {"HP Amp", NULL, "HPO MIX L"},
1514 {"HP Amp", NULL, "HPO MIX R"},
997b0520 1515
246693ba
BL		 1516 {"Speaker L Playback", "Switch", "SPOL MIX"},
1517 {"Speaker R Playback", "Switch", "SPOR MIX"},
1518 {"SPOLP", NULL, "Speaker L Playback"},
1519 {"SPOLN", NULL, "Speaker L Playback"},
1520 {"SPORP", NULL, "Speaker R Playback"},
1521 {"SPORN", NULL, "Speaker R Playback"},
997b0520
BL		 1522
1523 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1524 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1525 {"SPORP", NULL, "Improve SPK Amp Drv"},
1526 {"SPORN", NULL, "Improve SPK Amp Drv"},
1527
1528 {"HPOL", NULL, "Improve HP Amp Drv"},
1529 {"HPOR", NULL, "Improve HP Amp Drv"},
1530
246693ba
BL		 1531 {"HP L Playback", "Switch", "HP Amp"},
1532 {"HP R Playback", "Switch", "HP Amp"},
1533 {"HPOL", NULL, "HP L Playback"},
1534 {"HPOR", NULL, "HP R Playback"},
9b850ca4
JL		 1535
1536 {"LOUT amp", NULL, "LOUT MIX"},
1537 {"LOUTL", NULL, "LOUT amp"},
1538 {"LOUTR", NULL, "LOUT amp"},
022d21f0
OC		 1539};
1540
1541static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1542 {"ANC", NULL, "Stereo ADC MIXL"},
1543 {"ANC", NULL, "Stereo ADC MIXR"},
1544
1545 {"Audio DSP", NULL, "DAC MIXL"},
1546 {"Audio DSP", NULL, "DAC MIXR"},
1547
1548 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1549 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1550
1551 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1552
1553 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1554 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1555 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1556 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1557
1558 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1559 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1560
1561 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1562 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1563
1564 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1565 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1566
1567 {"DAC L2", NULL, "Mono DAC MIXL"},
1568 {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
1569 {"DAC R2", NULL, "Mono DAC MIXR"},
1570 {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
1571
1572 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1573 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1574
1575 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1576 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1577
1578 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1579 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1580
1581 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1582 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1583
1584 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1585 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1586
1587 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1588 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1589 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1590 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1591 {"Mono MIX", "BST1 Switch", "BST1"},
1592
997b0520
BL		 1593 {"MONOP", NULL, "Mono MIX"},
1594 {"MONON", NULL, "Mono MIX"},
1595 {"MONOP", NULL, "Improve MONO Amp Drv"},
1596};
1597
022d21f0
OC		 1598static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1599 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1600 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1601
1602 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1603 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1604
1605 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1606 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1607
1608 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1609 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1610
1611 {"IF2 DAC L", NULL, "DAC L2 Filter"},
1612 {"IF2 DAC R", NULL, "DAC R2 Filter"},
1613};
1614
997b0520
BL		 1615static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1616{
1617 int ret = 0, val;
1618
1619 if (codec == NULL)
1620 return -EINVAL;
1621
1622 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1623 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1624 switch (dai_id) {
1625 case RT5640_AIF1:
1626 switch (val) {
1627 case RT5640_IF_123:
1628 case RT5640_IF_132:
1629 ret |= RT5640_U_IF1;
1630 break;
1631 case RT5640_IF_113:
1632 ret |= RT5640_U_IF1;
1633 case RT5640_IF_312:
1634 case RT5640_IF_213:
1635 ret |= RT5640_U_IF2;
1636 break;
1637 }
1638 break;
1639
1640 case RT5640_AIF2:
1641 switch (val) {
1642 case RT5640_IF_231:
1643 case RT5640_IF_213:
1644 ret |= RT5640_U_IF1;
1645 break;
1646 case RT5640_IF_223:
1647 ret |= RT5640_U_IF1;
1648 case RT5640_IF_123:
1649 case RT5640_IF_321:
1650 ret |= RT5640_U_IF2;
1651 break;
1652 }
1653 break;
1654
1655 default:
1656 ret = -EINVAL;
1657 break;
1658 }
1659
1660 return ret;
1661}
1662
997b0520
BL		 1663static int rt5640_hw_params(struct snd_pcm_substream *substream,
1664 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1665{
ab64246c 1666 struct snd_soc_codec *codec = dai->codec;
997b0520 1667 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1668 unsigned int val_len = 0, val_clk, mask_clk;
1669 int dai_sel, pre_div, bclk_ms, frame_size;
997b0520
BL		 1670
1671 rt5640->lrck[dai->id] = params_rate(params);
d92950e7 1672 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
997b0520 1673 if (pre_div < 0) {
9e9cb9b9
LG		 1674 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1675 rt5640->lrck[dai->id], dai->id);
997b0520
BL		 1676 return -EINVAL;
1677 }
1678 frame_size = snd_soc_params_to_frame_size(params);
1679 if (frame_size < 0) {
1680 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1681 return frame_size;
1682 }
1683 if (frame_size > 32)
1684 bclk_ms = 1;
1685 else
1686 bclk_ms = 0;
1687 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1688
1689 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1690 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1691 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1692 bclk_ms, pre_div, dai->id);
1693
9bccae73
OC		 1694 switch (params_width(params)) {
1695 case 16:
997b0520 1696 break;
9bccae73 1697 case 20:
997b0520
BL		 1698 val_len |= RT5640_I2S_DL_20;
1699 break;
9bccae73 1700 case 24:
997b0520
BL		 1701 val_len |= RT5640_I2S_DL_24;
1702 break;
9bccae73 1703 case 8:
997b0520
BL		 1704 val_len |= RT5640_I2S_DL_8;
1705 break;
1706 default:
1707 return -EINVAL;
1708 }
1709
1710 dai_sel = get_sdp_info(codec, dai->id);
1711 if (dai_sel < 0) {
1712 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1713 return -EINVAL;
1714 }
1715 if (dai_sel & RT5640_U_IF1) {
1716 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1717 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1718 pre_div << RT5640_I2S_PD1_SFT;
1719 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1720 RT5640_I2S_DL_MASK, val_len);
1721 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1722 }
1723 if (dai_sel & RT5640_U_IF2) {
1724 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1725 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1726 pre_div << RT5640_I2S_PD2_SFT;
1727 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1728 RT5640_I2S_DL_MASK, val_len);
1729 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1730 }
1731
1732 return 0;
1733}
1734
1735static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1736{
1737 struct snd_soc_codec *codec = dai->codec;
1738 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1739 unsigned int reg_val = 0;
1740 int dai_sel;
997b0520
BL		 1741
1742 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1743 case SND_SOC_DAIFMT_CBM_CFM:
1744 rt5640->master[dai->id] = 1;
1745 break;
1746 case SND_SOC_DAIFMT_CBS_CFS:
1747 reg_val |= RT5640_I2S_MS_S;
1748 rt5640->master[dai->id] = 0;
1749 break;
1750 default:
1751 return -EINVAL;
1752 }
1753
1754 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1755 case SND_SOC_DAIFMT_NB_NF:
1756 break;
1757 case SND_SOC_DAIFMT_IB_NF:
1758 reg_val |= RT5640_I2S_BP_INV;
1759 break;
1760 default:
1761 return -EINVAL;
1762 }
1763
1764 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1765 case SND_SOC_DAIFMT_I2S:
1766 break;
1767 case SND_SOC_DAIFMT_LEFT_J:
1768 reg_val |= RT5640_I2S_DF_LEFT;
1769 break;
1770 case SND_SOC_DAIFMT_DSP_A:
1771 reg_val |= RT5640_I2S_DF_PCM_A;
1772 break;
1773 case SND_SOC_DAIFMT_DSP_B:
1774 reg_val |= RT5640_I2S_DF_PCM_B;
1775 break;
1776 default:
1777 return -EINVAL;
1778 }
1779
1780 dai_sel = get_sdp_info(codec, dai->id);
1781 if (dai_sel < 0) {
1782 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1783 return -EINVAL;
1784 }
1785 if (dai_sel & RT5640_U_IF1) {
1786 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1787 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1788 RT5640_I2S_DF_MASK, reg_val);
1789 }
1790 if (dai_sel & RT5640_U_IF2) {
1791 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1792 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1793 RT5640_I2S_DF_MASK, reg_val);
1794 }
1795
1796 return 0;
1797}
1798
1799static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1800 int clk_id, unsigned int freq, int dir)
1801{
1802 struct snd_soc_codec *codec = dai->codec;
1803 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1804 unsigned int reg_val = 0;
1805
1806 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1807 return 0;
1808
1809 switch (clk_id) {
1810 case RT5640_SCLK_S_MCLK:
1811 reg_val |= RT5640_SCLK_SRC_MCLK;
1812 break;
1813 case RT5640_SCLK_S_PLL1:
1814 reg_val |= RT5640_SCLK_SRC_PLL1;
1815 break;
997b0520
BL		 1816 default:
1817 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1818 return -EINVAL;
1819 }
1820 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1821 RT5640_SCLK_SRC_MASK, reg_val);
1822 rt5640->sysclk = freq;
1823 rt5640->sysclk_src = clk_id;
1824
1825 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1826 return 0;
1827}
1828
997b0520
BL		 1829static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1830 unsigned int freq_in, unsigned int freq_out)
1831{
1832 struct snd_soc_codec *codec = dai->codec;
1833 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
71c7a2d6 1834 struct rl6231_pll_code pll_code;
997b0520
BL		 1835 int ret, dai_sel;
1836
1837 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1838 freq_out == rt5640->pll_out)
1839 return 0;
1840
1841 if (!freq_in || !freq_out) {
1842 dev_dbg(codec->dev, "PLL disabled\n");
1843
1844 rt5640->pll_in = 0;
1845 rt5640->pll_out = 0;
1846 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1847 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1848 return 0;
1849 }
1850
1851 switch (source) {
1852 case RT5640_PLL1_S_MCLK:
1853 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1854 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1855 break;
1856 case RT5640_PLL1_S_BCLK1:
1857 case RT5640_PLL1_S_BCLK2:
1858 dai_sel = get_sdp_info(codec, dai->id);
1859 if (dai_sel < 0) {
1860 dev_err(codec->dev,
1861 "Failed to get sdp info: %d\n", dai_sel);
1862 return -EINVAL;
1863 }
1864 if (dai_sel & RT5640_U_IF1) {
1865 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1866 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1867 }
1868 if (dai_sel & RT5640_U_IF2) {
1869 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1870 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1871 }
1872 break;
1873 default:
1874 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1875 return -EINVAL;
1876 }
1877
71c7a2d6 1878 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
997b0520
BL		 1879 if (ret < 0) {
1880 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1881 return ret;
1882 }
1883
71c7a2d6
OC		 1884 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1885 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1886 pll_code.n_code, pll_code.k_code);
997b0520
BL		 1887
1888 snd_soc_write(codec, RT5640_PLL_CTRL1,
71c7a2d6 1889 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
997b0520 1890 snd_soc_write(codec, RT5640_PLL_CTRL2,
71c7a2d6
OC		 1891 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1892 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
997b0520
BL		 1893
1894 rt5640->pll_in = freq_in;
1895 rt5640->pll_out = freq_out;
1896 rt5640->pll_src = source;
1897
1898 return 0;
1899}
1900
1901static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1902 enum snd_soc_bias_level level)
1903{
997b0520
BL		 1904 switch (level) {
1905 case SND_SOC_BIAS_STANDBY:
76aad74b 1906 if (SND_SOC_BIAS_OFF == snd_soc_codec_get_bias_level(codec)) {
997b0520
BL		 1907 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1908 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1909 RT5640_PWR_BG | RT5640_PWR_VREF2,
1910 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1911 RT5640_PWR_BG | RT5640_PWR_VREF2);
246693ba 1912 usleep_range(10000, 15000);
997b0520
BL		 1913 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1914 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1915 RT5640_PWR_FV1 | RT5640_PWR_FV2);
997b0520
BL		 1916 snd_soc_update_bits(codec, RT5640_DUMMY1,
1917 0x0301, 0x0301);
997b0520
BL		 1918 snd_soc_update_bits(codec, RT5640_MICBIAS,
1919 0x0030, 0x0030);
1920 }
1921 break;
1922
1923 case SND_SOC_BIAS_OFF:
1924 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1925 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1926 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1927 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1928 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1929 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1930 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1931 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1932 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1933 break;
1934
1935 default:
1936 break;
1937 }
997b0520
BL		 1938
1939 return 0;
1940}
1941
cd69dc88
JN		 1942int rt5640_dmic_enable(struct snd_soc_codec *codec,
1943 bool dmic1_data_pin, bool dmic2_data_pin)
1944{
1945 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1946
1947 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1948 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
1949
1950 if (dmic1_data_pin) {
1951 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
1952 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
1953 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1954 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
1955 }
1956
1957 if (dmic2_data_pin) {
1958 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
1959 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
1960 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
1961 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
1962 }
1963
1964 return 0;
1965}
1966EXPORT_SYMBOL_GPL(rt5640_dmic_enable);
1967
997b0520
BL		 1968static int rt5640_probe(struct snd_soc_codec *codec)
1969{
76aad74b 1970 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
997b0520 1971 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
997b0520
BL		 1972
1973 rt5640->codec = codec;
997b0520 1974
bd1204cb 1975 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
997b0520
BL		 1976
1977 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
997b0520
BL		 1978 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1979 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1980
8bfc6d2d
BL		 1981 switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
1982 case RT5640_ID_5640:
1983 case RT5640_ID_5642:
022d21f0
OC		 1984 snd_soc_add_codec_controls(codec,
1985 rt5640_specific_snd_controls,
1986 ARRAY_SIZE(rt5640_specific_snd_controls));
76aad74b 1987 snd_soc_dapm_new_controls(dapm,
022d21f0
OC		 1988 rt5640_specific_dapm_widgets,
1989 ARRAY_SIZE(rt5640_specific_dapm_widgets));
76aad74b 1990 snd_soc_dapm_add_routes(dapm,
022d21f0
OC		 1991 rt5640_specific_dapm_routes,
1992 ARRAY_SIZE(rt5640_specific_dapm_routes));
1993 break;
8bfc6d2d 1994 case RT5640_ID_5639:
76aad74b 1995 snd_soc_dapm_new_controls(dapm,
022d21f0
OC		 1996 rt5639_specific_dapm_widgets,
1997 ARRAY_SIZE(rt5639_specific_dapm_widgets));
76aad74b 1998 snd_soc_dapm_add_routes(dapm,
022d21f0
OC		 1999 rt5639_specific_dapm_routes,
2000 ARRAY_SIZE(rt5639_specific_dapm_routes));
2001 break;
57f174f4
BL		 2002 default:
2003 dev_err(codec->dev,
2004 "The driver is for RT5639 RT5640 or RT5642 only\n");
2005 return -ENODEV;
022d21f0
OC		 2006 }
2007
cd69dc88
JN		 2008 if (rt5640->pdata.dmic_en)
2009 rt5640_dmic_enable(codec, rt5640->pdata.dmic1_data_pin,
2010 rt5640->pdata.dmic2_data_pin);
2011
997b0520
BL		 2012 return 0;
2013}
2014
2015static int rt5640_remove(struct snd_soc_codec *codec)
2016{
2017 rt5640_reset(codec);
2018
2019 return 0;
2020}
2021
2022#ifdef CONFIG_PM
2023static int rt5640_suspend(struct snd_soc_codec *codec)
2024{
2025 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2026
bd1204cb 2027 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
997b0520
BL		 2028 rt5640_reset(codec);
2029 regcache_cache_only(rt5640->regmap, true);
2030 regcache_mark_dirty(rt5640->regmap);
e58f301e
MB		 2031 if (gpio_is_valid(rt5640->pdata.ldo1_en))
2032 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
997b0520
BL		 2033
2034 return 0;
2035}
2036
2037static int rt5640_resume(struct snd_soc_codec *codec)
2038{
e58f301e
MB		 2039 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2040
2041 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2042 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
2043 msleep(400);
2044 }
997b0520 2045
4c9185be
OC		 2046 regcache_cache_only(rt5640->regmap, false);
2047 regcache_sync(rt5640->regmap);
2048
997b0520
BL		 2049 return 0;
2050}
2051#else
2052#define rt5640_suspend NULL
2053#define rt5640_resume NULL
2054#endif
2055
2056#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2057#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2058 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2059
9be94aea 2060static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
997b0520
BL		 2061 .hw_params = rt5640_hw_params,
2062 .set_fmt = rt5640_set_dai_fmt,
2063 .set_sysclk = rt5640_set_dai_sysclk,
2064 .set_pll = rt5640_set_dai_pll,
2065};
2066
9be94aea 2067static struct snd_soc_dai_driver rt5640_dai[] = {
997b0520
BL		 2068 {
2069 .name = "rt5640-aif1",
2070 .id = RT5640_AIF1,
2071 .playback = {
2072 .stream_name = "AIF1 Playback",
2073 .channels_min = 1,
2074 .channels_max = 2,
2075 .rates = RT5640_STEREO_RATES,
2076 .formats = RT5640_FORMATS,
2077 },
2078 .capture = {
2079 .stream_name = "AIF1 Capture",
2080 .channels_min = 1,
2081 .channels_max = 2,
2082 .rates = RT5640_STEREO_RATES,
2083 .formats = RT5640_FORMATS,
2084 },
2085 .ops = &rt5640_aif_dai_ops,
2086 },
2087 {
2088 .name = "rt5640-aif2",
2089 .id = RT5640_AIF2,
2090 .playback = {
2091 .stream_name = "AIF2 Playback",
2092 .channels_min = 1,
2093 .channels_max = 2,
2094 .rates = RT5640_STEREO_RATES,
2095 .formats = RT5640_FORMATS,
2096 },
2097 .capture = {
2098 .stream_name = "AIF2 Capture",
2099 .channels_min = 1,
2100 .channels_max = 2,
2101 .rates = RT5640_STEREO_RATES,
2102 .formats = RT5640_FORMATS,
2103 },
2104 .ops = &rt5640_aif_dai_ops,
2105 },
2106};
2107
2108static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2109 .probe = rt5640_probe,
2110 .remove = rt5640_remove,
2111 .suspend = rt5640_suspend,
2112 .resume = rt5640_resume,
2113 .set_bias_level = rt5640_set_bias_level,
09caf300 2114 .idle_bias_off = true,
997b0520
BL		 2115 .controls = rt5640_snd_controls,
2116 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2117 .dapm_widgets = rt5640_dapm_widgets,
2118 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2119 .dapm_routes = rt5640_dapm_routes,
2120 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2121};
2122
2123static const struct regmap_config rt5640_regmap = {
2124 .reg_bits = 8,
2125 .val_bits = 16,
f4821e8e 2126 .use_single_rw = true,
997b0520
BL		 2127
2128 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2129 RT5640_PR_SPACING),
2130 .volatile_reg = rt5640_volatile_register,
2131 .readable_reg = rt5640_readable_register,
2132
2133 .cache_type = REGCACHE_RBTREE,
2134 .reg_defaults = rt5640_reg,
2135 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2136 .ranges = rt5640_ranges,
2137 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2138};
2139
2140static const struct i2c_device_id rt5640_i2c_id[] = {
2141 { "rt5640", 0 },
b0c27846 2142 { "rt5639", 0 },
8bfc6d2d 2143 { "rt5642", 0 },
997b0520
BL		 2144 { }
2145};
2146MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2147
03a620d8
SW		 2148#if defined(CONFIG_OF)
2149static const struct of_device_id rt5640_of_match[] = {
33fcec29 2150 { .compatible = "realtek,rt5639", },
03a620d8
SW		 2151 { .compatible = "realtek,rt5640", },
2152 {},
2153};
2154MODULE_DEVICE_TABLE(of, rt5640_of_match);
2155#endif
2156
32fcb97b 2157#ifdef CONFIG_ACPI
b895dc2c 2158static const struct acpi_device_id rt5640_acpi_match[] = {
02b80773 2159 { "INT33CA", 0 },
b31b2b6d 2160 { "10EC5640", 0 },
3463667a 2161 { "10EC5642", 0 },
02b80773
LG		 2162 { },
2163};
2164MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
32fcb97b 2165#endif
02b80773 2166
dcad9f03
SW		 2167static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2168{
2169 rt5640->pdata.in1_diff = of_property_read_bool(np,
2170 "realtek,in1-differential");
2171 rt5640->pdata.in2_diff = of_property_read_bool(np,
2172 "realtek,in2-differential");
2173
2174 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2175 "realtek,ldo1-en-gpios", 0);
2176 /*
2177 * LDO1_EN is optional (it may be statically tied on the board).
2178 * -ENOENT means that the property doesn't exist, i.e. there is no
2179 * GPIO, so is not an error. Any other error code means the property
2180 * exists, but could not be parsed.
2181 */
2182 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2183 (rt5640->pdata.ldo1_en != -ENOENT))
2184 return rt5640->pdata.ldo1_en;
2185
2186 return 0;
2187}
2188
997b0520
BL		 2189static int rt5640_i2c_probe(struct i2c_client *i2c,
2190 const struct i2c_device_id *id)
2191{
2192 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2193 struct rt5640_priv *rt5640;
2194 int ret;
2195 unsigned int val;
2196
2197 rt5640 = devm_kzalloc(&i2c->dev,
2198 sizeof(struct rt5640_priv),
2199 GFP_KERNEL);
2200 if (NULL == rt5640)
2201 return -ENOMEM;
dcad9f03
SW		 2202 i2c_set_clientdata(i2c, rt5640);
2203
2204 if (pdata) {
2205 rt5640->pdata = *pdata;
2206 /*
2207 * Translate zero'd out (default) pdata value to an invalid
2208 * GPIO ID. This makes the pdata and DT paths consistent in
2209 * terms of the value left in this field when no GPIO is
2210 * specified, but means we can't actually use GPIO 0.
2211 */
2212 if (!rt5640->pdata.ldo1_en)
2213 rt5640->pdata.ldo1_en = -EINVAL;
2214 } else if (i2c->dev.of_node) {
2215 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2216 if (ret)
2217 return ret;
2218 } else
2219 rt5640->pdata.ldo1_en = -EINVAL;
997b0520
BL		 2220
2221 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2222 if (IS_ERR(rt5640->regmap)) {
2223 ret = PTR_ERR(rt5640->regmap);
2224 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2225 ret);
2226 return ret;
2227 }
2228
dcad9f03 2229 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
997b0520
BL		 2230 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2231 GPIOF_OUT_INIT_HIGH,
2232 "RT5640 LDO1_EN");
2233 if (ret < 0) {
2234 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2235 rt5640->pdata.ldo1_en, ret);
2236 return ret;
2237 }
2238 msleep(400);
2239 }
2240
2241 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
3441e524 2242 if (val != RT5640_DEVICE_ID) {
997b0520 2243 dev_err(&i2c->dev,
818454d1 2244 "Device with ID register %#x is not rt5640/39\n", val);
997b0520
BL		 2245 return -ENODEV;
2246 }
2247
2248 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2249
2250 ret = regmap_register_patch(rt5640->regmap, init_list,
2251 ARRAY_SIZE(init_list));
2252 if (ret != 0)
2253 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2254
2255 if (rt5640->pdata.in1_diff)
2256 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2257 RT5640_IN_DF1, RT5640_IN_DF1);
2258
2259 if (rt5640->pdata.in2_diff)
2260 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2261 RT5640_IN_DF2, RT5640_IN_DF2);
2262
246693ba
BL		 2263 rt5640->hp_mute = 1;
2264
1657caf5
AL		 2265 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2266 rt5640_dai, ARRAY_SIZE(rt5640_dai));
997b0520
BL		 2267}
2268
2269static int rt5640_i2c_remove(struct i2c_client *i2c)
2270{
2271 snd_soc_unregister_codec(&i2c->dev);
2272
2273 return 0;
2274}
2275
9be94aea 2276static struct i2c_driver rt5640_i2c_driver = {
997b0520
BL		 2277 .driver = {
2278 .name = "rt5640",
02b80773 2279 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
03a620d8 2280 .of_match_table = of_match_ptr(rt5640_of_match),
997b0520
BL		 2281 },
2282 .probe = rt5640_i2c_probe,
2283 .remove = rt5640_i2c_remove,
2284 .id_table = rt5640_i2c_id,
2285};
2286module_i2c_driver(rt5640_i2c_driver);
2287
b0c27846 2288MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
997b0520
BL		 2289MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2290MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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