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4fa89346 DM |
1 | /* |
2 | * TAS5086 ASoC codec driver | |
3 | * | |
4 | * Copyright (c) 2013 Daniel Mack <zonque@gmail.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * TODO: | |
17 | * - implement DAPM and input muxing | |
18 | * - implement modulation limit | |
19 | * - implement non-default PWM start | |
20 | * | |
21 | * Note that this chip has a very unusual register layout, specifically | |
22 | * because the registers are of unequal size, and multi-byte registers | |
23 | * require bulk writes to take effect. Regmap does not support that kind | |
24 | * of devices. | |
25 | * | |
26 | * Currently, the driver does not touch any of the registers >= 0x20, so | |
27 | * it doesn't matter because the entire map can be accessed as 8-bit | |
28 | * array. In case more features will be added in the future | |
29 | * that require access to higher registers, the entire regmap H/W I/O | |
30 | * routines have to be open-coded. | |
31 | */ | |
32 | ||
33 | #include <linux/module.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/gpio.h> | |
37 | #include <linux/i2c.h> | |
38 | #include <linux/regmap.h> | |
39 | #include <linux/spi/spi.h> | |
40 | #include <linux/of_device.h> | |
41 | #include <linux/of_gpio.h> | |
42 | #include <sound/pcm.h> | |
43 | #include <sound/pcm_params.h> | |
44 | #include <sound/soc.h> | |
45 | #include <sound/tlv.h> | |
46 | #include <sound/tas5086.h> | |
47 | ||
48 | #define TAS5086_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ | |
49 | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
50 | SNDRV_PCM_FMTBIT_S24_3LE) | |
51 | ||
52 | #define TAS5086_PCM_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ | |
53 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ | |
54 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \ | |
55 | SNDRV_PCM_RATE_192000) | |
56 | ||
57 | /* | |
58 | * TAS5086 registers | |
59 | */ | |
60 | #define TAS5086_CLOCK_CONTROL 0x00 /* Clock control register */ | |
61 | #define TAS5086_CLOCK_RATE(val) (val << 5) | |
62 | #define TAS5086_CLOCK_RATE_MASK (0x7 << 5) | |
63 | #define TAS5086_CLOCK_RATIO(val) (val << 2) | |
64 | #define TAS5086_CLOCK_RATIO_MASK (0x7 << 2) | |
65 | #define TAS5086_CLOCK_SCLK_RATIO_48 (1 << 1) | |
66 | #define TAS5086_CLOCK_VALID (1 << 0) | |
67 | ||
68 | #define TAS5086_DEEMPH_MASK 0x03 | |
69 | #define TAS5086_SOFT_MUTE_ALL 0x3f | |
70 | ||
71 | #define TAS5086_DEV_ID 0x01 /* Device ID register */ | |
72 | #define TAS5086_ERROR_STATUS 0x02 /* Error status register */ | |
73 | #define TAS5086_SYS_CONTROL_1 0x03 /* System control register 1 */ | |
74 | #define TAS5086_SERIAL_DATA_IF 0x04 /* Serial data interface register */ | |
75 | #define TAS5086_SYS_CONTROL_2 0x05 /* System control register 2 */ | |
76 | #define TAS5086_SOFT_MUTE 0x06 /* Soft mute register */ | |
77 | #define TAS5086_MASTER_VOL 0x07 /* Master volume */ | |
78 | #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */ | |
79 | #define TAS5086_VOLUME_CONTROL 0x09 /* Volume control register */ | |
80 | #define TAS5086_MOD_LIMIT 0x10 /* Modulation limit register */ | |
81 | #define TAS5086_PWM_START 0x18 /* PWM start register */ | |
82 | #define TAS5086_SURROUND 0x19 /* Surround register */ | |
83 | #define TAS5086_SPLIT_CAP_CHARGE 0x1a /* Split cap charge period register */ | |
84 | #define TAS5086_OSC_TRIM 0x1b /* Oscillator trim register */ | |
85 | #define TAS5086_BKNDERR 0x1c | |
86 | ||
87 | /* | |
88 | * Default TAS5086 power-up configuration | |
89 | */ | |
90 | static const struct reg_default tas5086_reg_defaults[] = { | |
91 | { 0x00, 0x6c }, | |
92 | { 0x01, 0x03 }, | |
93 | { 0x02, 0x00 }, | |
94 | { 0x03, 0xa0 }, | |
95 | { 0x04, 0x05 }, | |
96 | { 0x05, 0x60 }, | |
97 | { 0x06, 0x00 }, | |
98 | { 0x07, 0xff }, | |
99 | { 0x08, 0x30 }, | |
100 | { 0x09, 0x30 }, | |
101 | { 0x0a, 0x30 }, | |
102 | { 0x0b, 0x30 }, | |
103 | { 0x0c, 0x30 }, | |
104 | { 0x0d, 0x30 }, | |
105 | { 0x0e, 0xb1 }, | |
106 | { 0x0f, 0x00 }, | |
107 | { 0x10, 0x02 }, | |
108 | { 0x11, 0x00 }, | |
109 | { 0x12, 0x00 }, | |
110 | { 0x13, 0x00 }, | |
111 | { 0x14, 0x00 }, | |
112 | { 0x15, 0x00 }, | |
113 | { 0x16, 0x00 }, | |
114 | { 0x17, 0x00 }, | |
115 | { 0x18, 0x3f }, | |
116 | { 0x19, 0x00 }, | |
117 | { 0x1a, 0x18 }, | |
118 | { 0x1b, 0x82 }, | |
119 | { 0x1c, 0x05 }, | |
120 | }; | |
121 | ||
6b36d370 DM |
122 | static int tas5086_register_size(struct device *dev, unsigned int reg) |
123 | { | |
124 | switch (reg) { | |
125 | case TAS5086_DEV_ID ... TAS5086_BKNDERR: | |
126 | return 1; | |
127 | } | |
128 | ||
129 | dev_err(dev, "Unsupported register address: %d\n", reg); | |
130 | return 0; | |
131 | } | |
132 | ||
4fa89346 DM |
133 | static bool tas5086_accessible_reg(struct device *dev, unsigned int reg) |
134 | { | |
135 | return !((reg == 0x0f) || (reg >= 0x11 && reg <= 0x17)); | |
136 | } | |
137 | ||
138 | static bool tas5086_volatile_reg(struct device *dev, unsigned int reg) | |
139 | { | |
140 | switch (reg) { | |
141 | case TAS5086_DEV_ID: | |
142 | case TAS5086_ERROR_STATUS: | |
143 | return true; | |
144 | } | |
145 | ||
146 | return false; | |
147 | } | |
148 | ||
149 | static bool tas5086_writeable_reg(struct device *dev, unsigned int reg) | |
150 | { | |
151 | return tas5086_accessible_reg(dev, reg) && (reg != TAS5086_DEV_ID); | |
152 | } | |
153 | ||
6b36d370 DM |
154 | static int tas5086_reg_write(void *context, unsigned int reg, |
155 | unsigned int value) | |
156 | { | |
157 | struct i2c_client *client = context; | |
158 | unsigned int i, size; | |
159 | uint8_t buf[5]; | |
160 | int ret; | |
161 | ||
162 | size = tas5086_register_size(&client->dev, reg); | |
163 | if (size == 0) | |
164 | return -EINVAL; | |
165 | ||
166 | buf[0] = reg; | |
167 | ||
168 | for (i = size; i >= 1; --i) { | |
169 | buf[i] = value; | |
170 | value >>= 8; | |
171 | } | |
172 | ||
173 | ret = i2c_master_send(client, buf, size + 1); | |
174 | if (ret == size + 1) | |
175 | return 0; | |
176 | else if (ret < 0) | |
177 | return ret; | |
178 | else | |
179 | return -EIO; | |
180 | } | |
181 | ||
182 | static int tas5086_reg_read(void *context, unsigned int reg, | |
183 | unsigned int *value) | |
184 | { | |
185 | struct i2c_client *client = context; | |
186 | uint8_t send_buf, recv_buf[4]; | |
187 | struct i2c_msg msgs[2]; | |
188 | unsigned int size; | |
189 | unsigned int i; | |
190 | int ret; | |
191 | ||
192 | size = tas5086_register_size(&client->dev, reg); | |
193 | if (size == 0) | |
194 | return -EINVAL; | |
195 | ||
196 | send_buf = reg; | |
197 | ||
198 | msgs[0].addr = client->addr; | |
199 | msgs[0].len = sizeof(send_buf); | |
200 | msgs[0].buf = &send_buf; | |
201 | msgs[0].flags = 0; | |
202 | ||
203 | msgs[1].addr = client->addr; | |
204 | msgs[1].len = size; | |
205 | msgs[1].buf = recv_buf; | |
206 | msgs[1].flags = I2C_M_RD; | |
207 | ||
208 | ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); | |
209 | if (ret < 0) | |
210 | return ret; | |
211 | else if (ret != ARRAY_SIZE(msgs)) | |
212 | return -EIO; | |
213 | ||
214 | *value = 0; | |
215 | ||
216 | for (i = 0; i < size; i++) { | |
217 | *value <<= 8; | |
218 | *value |= recv_buf[i]; | |
219 | } | |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
4fa89346 DM |
224 | struct tas5086_private { |
225 | struct regmap *regmap; | |
226 | unsigned int mclk, sclk; | |
227 | unsigned int format; | |
228 | bool deemph; | |
229 | /* Current sample rate for de-emphasis control */ | |
230 | int rate; | |
231 | /* GPIO driving Reset pin, if any */ | |
232 | int gpio_nreset; | |
233 | }; | |
234 | ||
235 | static int tas5086_deemph[] = { 0, 32000, 44100, 48000 }; | |
236 | ||
237 | static int tas5086_set_deemph(struct snd_soc_codec *codec) | |
238 | { | |
239 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
240 | int i, val = 0; | |
241 | ||
242 | if (priv->deemph) | |
243 | for (i = 0; i < ARRAY_SIZE(tas5086_deemph); i++) | |
244 | if (tas5086_deemph[i] == priv->rate) | |
245 | val = i; | |
246 | ||
247 | return regmap_update_bits(priv->regmap, TAS5086_SYS_CONTROL_1, | |
248 | TAS5086_DEEMPH_MASK, val); | |
249 | } | |
250 | ||
251 | static int tas5086_get_deemph(struct snd_kcontrol *kcontrol, | |
252 | struct snd_ctl_elem_value *ucontrol) | |
253 | { | |
254 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
255 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
256 | ||
257 | ucontrol->value.enumerated.item[0] = priv->deemph; | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
262 | static int tas5086_put_deemph(struct snd_kcontrol *kcontrol, | |
263 | struct snd_ctl_elem_value *ucontrol) | |
264 | { | |
265 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
266 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
267 | ||
268 | priv->deemph = ucontrol->value.enumerated.item[0]; | |
269 | ||
270 | return tas5086_set_deemph(codec); | |
271 | } | |
272 | ||
273 | ||
274 | static int tas5086_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
275 | int clk_id, unsigned int freq, int dir) | |
276 | { | |
277 | struct snd_soc_codec *codec = codec_dai->codec; | |
278 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
279 | ||
280 | switch (clk_id) { | |
281 | case TAS5086_CLK_IDX_MCLK: | |
282 | priv->mclk = freq; | |
283 | break; | |
284 | case TAS5086_CLK_IDX_SCLK: | |
285 | priv->sclk = freq; | |
286 | break; | |
287 | } | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static int tas5086_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
293 | unsigned int format) | |
294 | { | |
295 | struct snd_soc_codec *codec = codec_dai->codec; | |
296 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
297 | ||
298 | /* The TAS5086 can only be slave to all clocks */ | |
299 | if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) { | |
300 | dev_err(codec->dev, "Invalid clocking mode\n"); | |
301 | return -EINVAL; | |
302 | } | |
303 | ||
304 | /* we need to refer to the data format from hw_params() */ | |
305 | priv->format = format; | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
310 | static const int tas5086_sample_rates[] = { | |
311 | 32000, 38000, 44100, 48000, 88200, 96000, 176400, 192000 | |
312 | }; | |
313 | ||
314 | static const int tas5086_ratios[] = { | |
315 | 64, 128, 192, 256, 384, 512 | |
316 | }; | |
317 | ||
318 | static int index_in_array(const int *array, int len, int needle) | |
319 | { | |
320 | int i; | |
321 | ||
322 | for (i = 0; i < len; i++) | |
323 | if (array[i] == needle) | |
324 | return i; | |
325 | ||
326 | return -ENOENT; | |
327 | } | |
328 | ||
329 | static int tas5086_hw_params(struct snd_pcm_substream *substream, | |
330 | struct snd_pcm_hw_params *params, | |
331 | struct snd_soc_dai *dai) | |
332 | { | |
333 | struct snd_soc_codec *codec = dai->codec; | |
334 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
28dbd161 | 335 | int val; |
4fa89346 DM |
336 | int ret; |
337 | ||
338 | priv->rate = params_rate(params); | |
339 | ||
340 | /* Look up the sample rate and refer to the offset in the list */ | |
341 | val = index_in_array(tas5086_sample_rates, | |
342 | ARRAY_SIZE(tas5086_sample_rates), priv->rate); | |
343 | ||
344 | if (val < 0) { | |
345 | dev_err(codec->dev, "Invalid sample rate\n"); | |
346 | return -EINVAL; | |
347 | } | |
348 | ||
349 | ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL, | |
350 | TAS5086_CLOCK_RATE_MASK, | |
351 | TAS5086_CLOCK_RATE(val)); | |
352 | if (ret < 0) | |
353 | return ret; | |
354 | ||
355 | /* MCLK / Fs ratio */ | |
356 | val = index_in_array(tas5086_ratios, ARRAY_SIZE(tas5086_ratios), | |
357 | priv->mclk / priv->rate); | |
358 | if (val < 0) { | |
359 | dev_err(codec->dev, "Inavlid MCLK / Fs ratio\n"); | |
360 | return -EINVAL; | |
361 | } | |
362 | ||
363 | ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL, | |
364 | TAS5086_CLOCK_RATIO_MASK, | |
365 | TAS5086_CLOCK_RATIO(val)); | |
366 | if (ret < 0) | |
367 | return ret; | |
368 | ||
369 | ||
370 | ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL, | |
371 | TAS5086_CLOCK_SCLK_RATIO_48, | |
372 | (priv->sclk == 48 * priv->rate) ? | |
373 | TAS5086_CLOCK_SCLK_RATIO_48 : 0); | |
374 | if (ret < 0) | |
375 | return ret; | |
376 | ||
377 | /* | |
378 | * The chip has a very unituitive register mapping and muxes information | |
379 | * about data format and sample depth into the same register, but not on | |
380 | * a logical bit-boundary. Hence, we have to refer to the format passed | |
381 | * in the set_dai_fmt() callback and set up everything from here. | |
382 | * | |
383 | * First, determine the 'base' value, using the format ... | |
384 | */ | |
385 | switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) { | |
386 | case SND_SOC_DAIFMT_RIGHT_J: | |
387 | val = 0x00; | |
388 | break; | |
389 | case SND_SOC_DAIFMT_I2S: | |
390 | val = 0x03; | |
391 | break; | |
392 | case SND_SOC_DAIFMT_LEFT_J: | |
393 | val = 0x06; | |
394 | break; | |
395 | default: | |
396 | dev_err(codec->dev, "Invalid DAI format\n"); | |
397 | return -EINVAL; | |
398 | } | |
399 | ||
400 | /* ... then add the offset for the sample bit depth. */ | |
401 | switch (params_format(params)) { | |
402 | case SNDRV_PCM_FORMAT_S16_LE: | |
403 | val += 0; | |
404 | break; | |
405 | case SNDRV_PCM_FORMAT_S20_3LE: | |
406 | val += 1; | |
407 | break; | |
408 | case SNDRV_PCM_FORMAT_S24_3LE: | |
409 | val += 2; | |
410 | break; | |
411 | default: | |
412 | dev_err(codec->dev, "Invalid bit width\n"); | |
413 | return -EINVAL; | |
414 | }; | |
415 | ||
416 | ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val); | |
417 | if (ret < 0) | |
418 | return ret; | |
419 | ||
420 | /* clock is considered valid now */ | |
421 | ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL, | |
422 | TAS5086_CLOCK_VALID, TAS5086_CLOCK_VALID); | |
423 | if (ret < 0) | |
424 | return ret; | |
425 | ||
426 | return tas5086_set_deemph(codec); | |
427 | } | |
428 | ||
429 | static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream) | |
430 | { | |
431 | struct snd_soc_codec *codec = dai->codec; | |
432 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
433 | unsigned int val = 0; | |
434 | ||
435 | if (mute) | |
436 | val = TAS5086_SOFT_MUTE_ALL; | |
437 | ||
438 | return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val); | |
439 | } | |
440 | ||
441 | /* TAS5086 controls */ | |
442 | static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1); | |
443 | ||
444 | static const struct snd_kcontrol_new tas5086_controls[] = { | |
445 | SOC_SINGLE_TLV("Master Playback Volume", TAS5086_MASTER_VOL, | |
446 | 0, 0xff, 1, tas5086_dac_tlv), | |
447 | SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume", | |
448 | TAS5086_CHANNEL_VOL(0), TAS5086_CHANNEL_VOL(1), | |
449 | 0, 0xff, 1, tas5086_dac_tlv), | |
450 | SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume", | |
451 | TAS5086_CHANNEL_VOL(2), TAS5086_CHANNEL_VOL(3), | |
452 | 0, 0xff, 1, tas5086_dac_tlv), | |
453 | SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume", | |
454 | TAS5086_CHANNEL_VOL(4), TAS5086_CHANNEL_VOL(5), | |
455 | 0, 0xff, 1, tas5086_dac_tlv), | |
456 | SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0, | |
457 | tas5086_get_deemph, tas5086_put_deemph), | |
458 | }; | |
459 | ||
460 | static const struct snd_soc_dai_ops tas5086_dai_ops = { | |
461 | .hw_params = tas5086_hw_params, | |
462 | .set_sysclk = tas5086_set_dai_sysclk, | |
463 | .set_fmt = tas5086_set_dai_fmt, | |
464 | .mute_stream = tas5086_mute_stream, | |
465 | }; | |
466 | ||
467 | static struct snd_soc_dai_driver tas5086_dai = { | |
468 | .name = "tas5086-hifi", | |
469 | .playback = { | |
470 | .stream_name = "Playback", | |
471 | .channels_min = 2, | |
472 | .channels_max = 6, | |
473 | .rates = TAS5086_PCM_RATES, | |
474 | .formats = TAS5086_PCM_FORMATS, | |
475 | }, | |
476 | .ops = &tas5086_dai_ops, | |
477 | }; | |
478 | ||
479 | #ifdef CONFIG_PM | |
480 | static int tas5086_soc_resume(struct snd_soc_codec *codec) | |
481 | { | |
482 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
483 | ||
484 | /* Restore codec state */ | |
485 | return regcache_sync(priv->regmap); | |
486 | } | |
487 | #else | |
488 | #define tas5086_soc_resume NULL | |
489 | #endif /* CONFIG_PM */ | |
490 | ||
491 | #ifdef CONFIG_OF | |
492 | static const struct of_device_id tas5086_dt_ids[] = { | |
493 | { .compatible = "ti,tas5086", }, | |
494 | { } | |
495 | }; | |
496 | MODULE_DEVICE_TABLE(of, tas5086_dt_ids); | |
497 | #endif | |
498 | ||
499 | /* charge period values in microseconds */ | |
500 | static const int tas5086_charge_period[] = { | |
501 | 13000, 16900, 23400, 31200, 41600, 54600, 72800, 96200, | |
502 | 130000, 156000, 234000, 312000, 416000, 546000, 728000, 962000, | |
503 | 1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000, | |
504 | }; | |
505 | ||
506 | static int tas5086_probe(struct snd_soc_codec *codec) | |
507 | { | |
508 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
509 | int charge_period = 1300000; /* hardware default is 1300 ms */ | |
510 | int i, ret; | |
511 | ||
512 | if (of_match_device(of_match_ptr(tas5086_dt_ids), codec->dev)) { | |
513 | struct device_node *of_node = codec->dev->of_node; | |
514 | of_property_read_u32(of_node, "ti,charge-period", &charge_period); | |
515 | } | |
516 | ||
517 | /* lookup and set split-capacitor charge period */ | |
518 | if (charge_period == 0) { | |
519 | regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0); | |
520 | } else { | |
521 | i = index_in_array(tas5086_charge_period, | |
522 | ARRAY_SIZE(tas5086_charge_period), | |
523 | charge_period); | |
524 | if (i >= 0) | |
525 | regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, | |
526 | i + 0x08); | |
527 | else | |
528 | dev_warn(codec->dev, | |
529 | "Invalid split-cap charge period of %d ns.\n", | |
530 | charge_period); | |
531 | } | |
532 | ||
533 | /* enable factory trim */ | |
534 | ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00); | |
535 | if (ret < 0) | |
536 | return ret; | |
537 | ||
538 | /* start all channels */ | |
539 | ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20); | |
540 | if (ret < 0) | |
541 | return ret; | |
542 | ||
543 | /* set master volume to 0 dB */ | |
544 | ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30); | |
545 | if (ret < 0) | |
546 | return ret; | |
547 | ||
548 | /* mute all channels for now */ | |
549 | ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE, | |
550 | TAS5086_SOFT_MUTE_ALL); | |
551 | if (ret < 0) | |
552 | return ret; | |
553 | ||
554 | return 0; | |
555 | } | |
556 | ||
557 | static int tas5086_remove(struct snd_soc_codec *codec) | |
558 | { | |
559 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
560 | ||
561 | if (gpio_is_valid(priv->gpio_nreset)) | |
562 | /* Set codec to the reset state */ | |
563 | gpio_set_value(priv->gpio_nreset, 0); | |
564 | ||
565 | return 0; | |
566 | }; | |
567 | ||
568 | static struct snd_soc_codec_driver soc_codec_dev_tas5086 = { | |
569 | .probe = tas5086_probe, | |
570 | .remove = tas5086_remove, | |
571 | .resume = tas5086_soc_resume, | |
572 | .controls = tas5086_controls, | |
573 | .num_controls = ARRAY_SIZE(tas5086_controls), | |
574 | }; | |
575 | ||
576 | static const struct i2c_device_id tas5086_i2c_id[] = { | |
577 | { "tas5086", 0 }, | |
578 | { } | |
579 | }; | |
580 | MODULE_DEVICE_TABLE(i2c, tas5086_i2c_id); | |
581 | ||
582 | static const struct regmap_config tas5086_regmap = { | |
583 | .reg_bits = 8, | |
584 | .val_bits = 8, | |
585 | .max_register = ARRAY_SIZE(tas5086_reg_defaults), | |
586 | .reg_defaults = tas5086_reg_defaults, | |
587 | .num_reg_defaults = ARRAY_SIZE(tas5086_reg_defaults), | |
588 | .cache_type = REGCACHE_RBTREE, | |
589 | .volatile_reg = tas5086_volatile_reg, | |
590 | .writeable_reg = tas5086_writeable_reg, | |
591 | .readable_reg = tas5086_accessible_reg, | |
6b36d370 DM |
592 | .reg_read = tas5086_reg_read, |
593 | .reg_write = tas5086_reg_write, | |
4fa89346 DM |
594 | }; |
595 | ||
596 | static int tas5086_i2c_probe(struct i2c_client *i2c, | |
597 | const struct i2c_device_id *id) | |
598 | { | |
599 | struct tas5086_private *priv; | |
600 | struct device *dev = &i2c->dev; | |
601 | int gpio_nreset = -EINVAL; | |
602 | int i, ret; | |
603 | ||
604 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | |
605 | if (!priv) | |
606 | return -ENOMEM; | |
607 | ||
6b36d370 | 608 | priv->regmap = devm_regmap_init(dev, NULL, i2c, &tas5086_regmap); |
4fa89346 DM |
609 | if (IS_ERR(priv->regmap)) { |
610 | ret = PTR_ERR(priv->regmap); | |
611 | dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret); | |
612 | return ret; | |
613 | } | |
614 | ||
615 | i2c_set_clientdata(i2c, priv); | |
616 | ||
617 | if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) { | |
618 | struct device_node *of_node = dev->of_node; | |
619 | gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0); | |
620 | } | |
621 | ||
622 | if (gpio_is_valid(gpio_nreset)) | |
623 | if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset")) | |
624 | gpio_nreset = -EINVAL; | |
625 | ||
626 | if (gpio_is_valid(gpio_nreset)) { | |
627 | /* Reset codec - minimum assertion time is 400ns */ | |
628 | gpio_direction_output(gpio_nreset, 0); | |
629 | udelay(1); | |
630 | gpio_set_value(gpio_nreset, 1); | |
631 | ||
632 | /* Codec needs ~15ms to wake up */ | |
633 | msleep(15); | |
634 | } | |
635 | ||
636 | priv->gpio_nreset = gpio_nreset; | |
637 | ||
638 | /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */ | |
639 | ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i); | |
640 | if (ret < 0) | |
641 | return ret; | |
642 | ||
643 | if (i != 0x3) { | |
644 | dev_err(dev, | |
645 | "Failed to identify TAS5086 codec (got %02x)\n", i); | |
646 | return -ENODEV; | |
647 | } | |
648 | ||
649 | return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086, | |
650 | &tas5086_dai, 1); | |
651 | } | |
652 | ||
653 | static int tas5086_i2c_remove(struct i2c_client *i2c) | |
654 | { | |
655 | snd_soc_unregister_codec(&i2c->dev); | |
656 | return 0; | |
657 | } | |
658 | ||
659 | static struct i2c_driver tas5086_i2c_driver = { | |
660 | .driver = { | |
661 | .name = "tas5086", | |
662 | .owner = THIS_MODULE, | |
663 | .of_match_table = of_match_ptr(tas5086_dt_ids), | |
664 | }, | |
665 | .id_table = tas5086_i2c_id, | |
666 | .probe = tas5086_i2c_probe, | |
667 | .remove = tas5086_i2c_remove, | |
668 | }; | |
669 | ||
c300d6de | 670 | module_i2c_driver(tas5086_i2c_driver); |
4fa89346 DM |
671 | |
672 | MODULE_AUTHOR("Daniel Mack <zonque@gmail.com>"); | |
673 | MODULE_DESCRIPTION("Texas Instruments TAS5086 ALSA SoC Codec Driver"); | |
674 | MODULE_LICENSE("GPL"); |