[deliverable/linux.git] / sound / soc / codecs / tlv320aic26.c

/*
 * Texas Instruments TLV320AIC26 low power audio CODEC
 * ALSA SoC CODEC driver
 *
 * Copyright (C) 2008 Secret Lab Technologies Ltd.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>

#include "tlv320aic26.h"

MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_LICENSE("GPL");

/* AIC26 driver private data */
struct aic26 {
	struct spi_device *spi;
	struct snd_soc_codec codec;
	u16 reg_cache[AIC26_NUM_REGS];	/* shadow registers */
	int master;
	int datfm;
	int mclk;

	/* Keyclick parameters */
	int keyclick_amplitude;
	int keyclick_freq;
	int keyclick_len;
};

/* ---------------------------------------------------------------------
 * Register access routines
 */
static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
				   unsigned int reg)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd, value;
	u8 buffer[2];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	/* Do SPI transfer; first 16bits are command; remaining is
	 * register contents */
	cmd = AIC26_READ_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}
	value = (buffer[0] << 8) | buffer[1];

	/* Update the cache before returning with the value */
	cache[reg] = value;
	return value;
}

static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
					 unsigned int reg)
{
	u16 *cache = codec->reg_cache;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	return cache[reg];
}

static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
			   unsigned int value)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd;
	u8 buffer[4];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return -EINVAL;
	}

	/* Do SPI transfer; first 16bits are command; remaining is data
	 * to write into register */
	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	buffer[2] = value >> 8;
	buffer[3] = value;
	rc = spi_write(aic26->spi, buffer, 4);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}

	/* update cache before returning */
	cache[reg] = value;
	return 0;
}

/* ---------------------------------------------------------------------
 * Digital Audio Interface Operations
 */
static int aic26_hw_params(struct snd_pcm_substream *substream,
			   struct snd_pcm_hw_params *params,
			   struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec = rtd->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	int fsref, divisor, wlen, pval, jval, dval, qval;
	u16 reg;

	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
		substream, params);
	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
		params_format(params));

	switch (params_rate(params)) {
	case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;
	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	}

	/* select data word length */
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S8:     wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	/* Configure PLL */
	pval = 1;
	jval = (fsref == 44100) ? 7 : 8;
	dval = (fsref == 44100) ? 5264 : 1920;
	qval = 0;
	reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
	aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
	reg = dval << 2;
	aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	if (aic26->master)
		reg |= 0x0800;
	if (fsref == 48000)
		reg |= 0x2000;
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Audio Control 1 (FSref divisor) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	reg &= ~0x0fff;
	reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);

	return 0;
}

/**
 * aic26_mute - Mute control to reduce noise when changing audio format
 */
static int aic26_mute(struct snd_soc_dai *dai, int mute)
{
	struct snd_soc_codec *codec = dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);

	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
		dai, mute);

	if (mute)
		reg |= 0x8080;
	else
		reg &= ~0x8080;
	aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);

	return 0;
}

static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
			    int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
		" freq=%i, dir=%i)\n",
		codec_dai, clk_id, freq, dir);

	/* MCLK needs to fall between 2MHz and 50 MHz */
	if ((freq < 2000000) || (freq > 50000000))
		return -EINVAL;

	aic26->mclk = freq;
	return 0;
}

static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
		codec_dai, fmt);

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	}

	/* interface format */
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:     aic26->datfm = AIC26_DATFM_I2S; break;
	case SND_SOC_DAIFMT_DSP_A:   aic26->datfm = AIC26_DATFM_DSP; break;
	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	case SND_SOC_DAIFMT_LEFT_J:  aic26->datfm = AIC26_DATFM_LEFTJ; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	return 0;
}

/* ---------------------------------------------------------------------
 * Digital Audio Interface Definition
 */
#define AIC26_RATES	(SNDRV_PCM_RATE_8000  | SNDRV_PCM_RATE_11025 |\
			 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
			 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
			 SNDRV_PCM_RATE_48000)
#define AIC26_FORMATS	(SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_BE |\
			 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)

static struct snd_soc_dai_ops aic26_dai_ops = {
	.hw_params	= aic26_hw_params,
	.digital_mute	= aic26_mute,
	.set_sysclk	= aic26_set_sysclk,
	.set_fmt	= aic26_set_fmt,
};

static struct snd_soc_dai_driver aic26_dai = {
	.name = "tlv320aic26-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.capture = {
		.stream_name = "Capture",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.ops = &aic26_dai_ops,
};

/* ---------------------------------------------------------------------
 * ALSA controls
 */
static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
static const struct soc_enum aic26_capture_src_enum =
	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);

static const struct snd_kcontrol_new aic26_snd_controls[] = {
	/* Output */
	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	SOC_ENUM("Capture Source", aic26_capture_src_enum),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: sysfs files for debugging
 */

static ssize_t aic26_keyclick_show(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val, amp, freq, len;

	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	amp = (val >> 12) & 0x7;
	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	len = 2 * (1 + ((val >> 4) & 0xf));

	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
}

/* Any write to the keyclick attribute will trigger the keyclick event */
static ssize_t aic26_keyclick_set(struct device *dev,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val;

	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	val |= 0x8000;
	aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);

	return count;
}

static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);

/* ---------------------------------------------------------------------
 * SoC CODEC portion of driver: probe and release routines
 */
static int aic26_probe(struct snd_soc_codec *codec)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	int ret, err, i, reg;

	dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");

	/* Reset the codec to power on defaults */
	aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);

	/* Power up CODEC */
	aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	reg |= 0x0800; /* set master mode */
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Fill register cache */
	for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
		aic26_reg_read(codec, i);

	/* Register the sysfs files for debugging */
	/* Create SysFS files */
	ret = device_create_file(codec->dev, &dev_attr_keyclick);
	if (ret)
		dev_info(codec->dev, "error creating sysfs files\n");

	/* register controls */
	dev_dbg(codec->dev, "Registering controls\n");
	err = snd_soc_add_controls(codec, aic26_snd_controls,
			ARRAY_SIZE(aic26_snd_controls));
	WARN_ON(err < 0);

	return 0;
}

static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	.probe = aic26_probe,
	.read = aic26_reg_read,
	.write = aic26_reg_write,
	.reg_cache_size = AIC26_NUM_REGS,
	.reg_word_size = sizeof(u16),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: probe and release routines and SPI
 * 				 driver registration.
 */
static int aic26_spi_probe(struct spi_device *spi)
{
	struct aic26 *aic26;
	int ret;

	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");

	/* Allocate driver data */
	aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
	if (!aic26)
		return -ENOMEM;

	/* Initialize the driver data */
	aic26->spi = spi;
	dev_set_drvdata(&spi->dev, aic26);
	aic26->master = 1;

	ret = snd_soc_register_codec(&spi->dev,
			&aic26_soc_codec_dev, &aic26_dai, 1);
	if (ret < 0)
		kfree(aic26);
	return ret;

	dev_dbg(&spi->dev, "SPI device initialized\n");
	return 0;
}

static int aic26_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_codec(&spi->dev);
	kfree(spi_get_drvdata(spi));
	return 0;
}

static struct spi_driver aic26_spi = {
	.driver = {
		.name = "tlv320aic26-codec",
		.owner = THIS_MODULE,
	},
	.probe = aic26_spi_probe,
	.remove = aic26_spi_remove,
};

static int __init aic26_init(void)
{
	return spi_register_driver(&aic26_spi);
}
module_init(aic26_init);

static void __exit aic26_exit(void)
{
	spi_unregister_driver(&aic26_spi);
}
module_exit(aic26_exit);
Commit	Line	Data
d8e3bb73 GL	1	/*
	2	* Texas Instruments TLV320AIC26 low power audio CODEC
	3	* ALSA SoC CODEC driver
	4	*
	5	* Copyright (C) 2008 Secret Lab Technologies Ltd.
	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/moduleparam.h>
	10	#include <linux/init.h>
	11	#include <linux/delay.h>
	12	#include <linux/pm.h>
	13	#include <linux/device.h>
	14	#include <linux/sysfs.h>
	15	#include <linux/spi/spi.h>
5a0e3ad6	16	#include <linux/slab.h>
d8e3bb73 GL	17	#include <sound/core.h>
	18	#include <sound/pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/soc.h>
	21	#include <sound/soc-dapm.h>
d8e3bb73 GL	22	#include <sound/initval.h>
	23
	24	#include "tlv320aic26.h"
	25
	26	MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
	27	MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
	28	MODULE_LICENSE("GPL");
	29
	30	/* AIC26 driver private data */
	31	struct aic26 {
	32	struct spi_device *spi;
	33	struct snd_soc_codec codec;
	34	u16 reg_cache[AIC26_NUM_REGS]; /* shadow registers */
	35	int master;
	36	int datfm;
	37	int mclk;
	38
	39	/* Keyclick parameters */
	40	int keyclick_amplitude;
	41	int keyclick_freq;
	42	int keyclick_len;
	43	};
	44
	45	/* ---------------------------------------------------------------------
	46	* Register access routines
	47	*/
	48	static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
	49	unsigned int reg)
	50	{
d4a8ca24	51	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	52	u16 *cache = codec->reg_cache;
	53	u16 cmd, value;
	54	u8 buffer[2];
	55	int rc;
	56
	57	if (reg >= AIC26_NUM_REGS) {
	58	WARN_ON_ONCE(1);
	59	return 0;
	60	}
	61
	62	/* Do SPI transfer; first 16bits are command; remaining is
	63	* register contents */
	64	cmd = AIC26_READ_COMMAND_WORD(reg);
	65	buffer[0] = (cmd >> 8) & 0xff;
	66	buffer[1] = cmd & 0xff;
	67	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	68	if (rc) {
	69	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	70	return -EIO;
	71	}
	72	value = (buffer[0] << 8) \| buffer[1];
	73
	74	/* Update the cache before returning with the value */
	75	cache[reg] = value;
	76	return value;
	77	}
	78
	79	static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
	80	unsigned int reg)
	81	{
	82	u16 *cache = codec->reg_cache;
	83
	84	if (reg >= AIC26_NUM_REGS) {
	85	WARN_ON_ONCE(1);
	86	return 0;
	87	}
	88
	89	return cache[reg];
	90	}
	91
	92	static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
	93	unsigned int value)
	94	{
d4a8ca24	95	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	96	u16 *cache = codec->reg_cache;
	97	u16 cmd;
	98	u8 buffer[4];
	99	int rc;
	100
	101	if (reg >= AIC26_NUM_REGS) {
	102	WARN_ON_ONCE(1);
	103	return -EINVAL;
	104	}
	105
	106	/* Do SPI transfer; first 16bits are command; remaining is data
	107	* to write into register */
	108	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	109	buffer[0] = (cmd >> 8) & 0xff;
	110	buffer[1] = cmd & 0xff;
	111	buffer[2] = value >> 8;
	112	buffer[3] = value;
	113	rc = spi_write(aic26->spi, buffer, 4);
	114	if (rc) {
	115	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	116	return -EIO;
	117	}
	118
	119	/* update cache before returning */
	120	cache[reg] = value;
	121	return 0;
	122	}
	123
	124	/* ---------------------------------------------------------------------
	125	* Digital Audio Interface Operations
	126	*/
	127	static int aic26_hw_params(struct snd_pcm_substream *substream,
dee89c4d MB	128	struct snd_pcm_hw_params *params,
dee89c4d MB	129	struct snd_soc_dai *dai)
d8e3bb73 GL	130	{
d8e3bb73 GL	131	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	132	struct snd_soc_codec *codec = rtd->codec;
d4a8ca24	133	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	134	int fsref, divisor, wlen, pval, jval, dval, qval;
	135	u16 reg;
	136
	137	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
	138	substream, params);
	139	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
	140	params_format(params));
	141
	142	switch (params_rate(params)) {
	143	case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
	144	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	145	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	146	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	147	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	148	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	149	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	150	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	151	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	152	default:
	153	dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	154	}
	155
	156	/* select data word length */
	157	switch (params_format(params)) {
	158	case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
	159	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	160	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	161	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	162	default:
	163	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	164	}
	165
	166	/* Configure PLL */
	167	pval = 1;
	168	jval = (fsref == 44100) ? 7 : 8;
	169	dval = (fsref == 44100) ? 5264 : 1920;
	170	qval = 0;
	171	reg = 0x8000 \| qval << 11 \| pval << 8 \| jval << 2;
	172	aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
	173	reg = dval << 2;
	174	aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
	175
	176	/* Audio Control 3 (master mode, fsref rate) */
	177	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	178	reg &= ~0xf800;
	179	if (aic26->master)
	180	reg \|= 0x0800;
	181	if (fsref == 48000)
	182	reg \|= 0x2000;
	183	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
	184
	185	/* Audio Control 1 (FSref divisor) */
	186	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	187	reg &= ~0x0fff;
	188	reg \|= wlen \| aic26->datfm \| (divisor << 3) \| divisor;
	189	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
	190
	191	return 0;
	192	}
	193
	194	/**
	195	* aic26_mute - Mute control to reduce noise when changing audio format
	196	*/
	197	static int aic26_mute(struct snd_soc_dai *dai, int mute)
198	{
199	struct snd_soc_codec *codec = dai->codec;
d4a8ca24	200	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	201	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
	202
	203	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
	204	dai, mute);
	205
	206	if (mute)
	207	reg \|= 0x8080;
	208	else
	209	reg &= ~0x8080;
	210	aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
	211
	212	return 0;
	213	}
	214
	215	static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
	216	int clk_id, unsigned int freq, int dir)
	217	{
	218	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	219	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	220
	221	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
	222	" freq=%i, dir=%i)\n",
	223	codec_dai, clk_id, freq, dir);
	224
	225	/* MCLK needs to fall between 2MHz and 50 MHz */
	226	if ((freq < 2000000) \|\| (freq > 50000000))
	227	return -EINVAL;
	228
	229	aic26->mclk = freq;
	230	return 0;
	231	}
	232
	233	static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
	234	{
	235	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	236	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	237
	238	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
	239	codec_dai, fmt);
	240
	241	/* set master/slave audio interface */
	242	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	243	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	244	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	245	default:
	246	dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	247	}
	248
	249	/* interface format */
	250	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	251	case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
	252	case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
	253	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	254	case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
	255	default:
	256	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	257	}
	258
	259	return 0;
	260	}
	261
	262	/* ---------------------------------------------------------------------
	263	* Digital Audio Interface Definition
	264	*/
	265	#define AIC26_RATES (SNDRV_PCM_RATE_8000 \| SNDRV_PCM_RATE_11025 \|\
	266	SNDRV_PCM_RATE_16000 \| SNDRV_PCM_RATE_22050 \|\
	267	SNDRV_PCM_RATE_32000 \| SNDRV_PCM_RATE_44100 \|\
	268	SNDRV_PCM_RATE_48000)
	269	#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 \| SNDRV_PCM_FMTBIT_S16_BE \|\
	270	SNDRV_PCM_FMTBIT_S24_BE \| SNDRV_PCM_FMTBIT_S32_BE)
	271
6335d055 EM	272	static struct snd_soc_dai_ops aic26_dai_ops = {
	273	.hw_params = aic26_hw_params,
	274	.digital_mute = aic26_mute,
	275	.set_sysclk = aic26_set_sysclk,
	276	.set_fmt = aic26_set_fmt,
	277	};
	278
f0fba2ad LG	279	static struct snd_soc_dai_driver aic26_dai = {
f0fba2ad LG	280	.name = "tlv320aic26-hifi",
d8e3bb73 GL	281	.playback = {
	282	.stream_name = "Playback",
	283	.channels_min = 2,
	284	.channels_max = 2,
	285	.rates = AIC26_RATES,
	286	.formats = AIC26_FORMATS,
	287	},
	288	.capture = {
	289	.stream_name = "Capture",
	290	.channels_min = 2,
	291	.channels_max = 2,
	292	.rates = AIC26_RATES,
	293	.formats = AIC26_FORMATS,
	294	},
6335d055	295	.ops = &aic26_dai_ops,
d8e3bb73	296	};
d8e3bb73 GL	297
	298	/* ---------------------------------------------------------------------
	299	* ALSA controls
	300	*/
	301	static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
	302	static const struct soc_enum aic26_capture_src_enum =
	303	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
	304
	305	static const struct snd_kcontrol_new aic26_snd_controls[] = {
	306	/* Output */
	307	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	308	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	309	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	310	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	311	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	312	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	313	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	314	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	315	SOC_ENUM("Capture Source", aic26_capture_src_enum),
	316	};
	317
d8e3bb73 GL	318	/* ---------------------------------------------------------------------
	319	* SPI device portion of driver: sysfs files for debugging
	320	*/
	321
	322	static ssize_t aic26_keyclick_show(struct device *dev,
	323	struct device_attribute attr, char buf)
	324	{
	325	struct aic26 *aic26 = dev_get_drvdata(dev);
	326	int val, amp, freq, len;
	327
	328	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	329	amp = (val >> 12) & 0x7;
	330	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	331	len = 2 * (1 + ((val >> 4) & 0xf));
	332
	333	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
	334	}
	335
	336	/* Any write to the keyclick attribute will trigger the keyclick event */
	337	static ssize_t aic26_keyclick_set(struct device *dev,
	338	struct device_attribute *attr,
	339	const char *buf, size_t count)
	340	{
	341	struct aic26 *aic26 = dev_get_drvdata(dev);
	342	int val;
	343
	344	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	345	val \|= 0x8000;
	346	aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
	347
	348	return count;
	349	}
	350
9cce39a1	351	static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
d8e3bb73 GL	352
d8e3bb73 GL	353	/* ---------------------------------------------------------------------
f0fba2ad	354	* SoC CODEC portion of driver: probe and release routines
d8e3bb73	355	*/
f0fba2ad	356	static int aic26_probe(struct snd_soc_codec *codec)
d8e3bb73	357	{
f0fba2ad LG	358	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
f0fba2ad LG	359	int ret, err, i, reg;
d8e3bb73	360
f0fba2ad	361	dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
64089b84	362
d8e3bb73	363	/* Reset the codec to power on defaults */
f0fba2ad	364	aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
d8e3bb73 GL	365
d8e3bb73 GL	366	/* Power up CODEC */
f0fba2ad	367	aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
d8e3bb73 GL	368
d8e3bb73 GL	369	/* Audio Control 3 (master mode, fsref rate) */
f0fba2ad	370	reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
d8e3bb73 GL	371	reg &= ~0xf800;
d8e3bb73 GL	372	reg \|= 0x0800; /* set master mode */
f0fba2ad	373	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
d8e3bb73 GL	374
	375	/* Fill register cache */
	376	for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
f0fba2ad	377	aic26_reg_read(codec, i);
d8e3bb73 GL	378
	379	/* Register the sysfs files for debugging */
	380	/* Create SysFS files */
f0fba2ad	381	ret = device_create_file(codec->dev, &dev_attr_keyclick);
64089b84	382	if (ret)
f0fba2ad	383	dev_info(codec->dev, "error creating sysfs files\n");
d8e3bb73	384
f0fba2ad LG	385	/* register controls */
	386	dev_dbg(codec->dev, "Registering controls\n");
	387	err = snd_soc_add_controls(codec, aic26_snd_controls,
	388	ARRAY_SIZE(aic26_snd_controls));
	389	WARN_ON(err < 0);
d8e3bb73	390
d8e3bb73 GL	391	return 0;
	392	}
	393
f0fba2ad LG	394	static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	395	.probe = aic26_probe,
	396	.read = aic26_reg_read,
	397	.write = aic26_reg_write,
	398	.reg_cache_size = AIC26_NUM_REGS,
	399	.reg_word_size = sizeof(u16),
	400	};
	401
	402	/* ---------------------------------------------------------------------
	403	* SPI device portion of driver: probe and release routines and SPI
	404	* driver registration.
	405	*/
	406	static int aic26_spi_probe(struct spi_device *spi)
d8e3bb73	407	{
f0fba2ad LG	408	struct aic26 *aic26;
f0fba2ad LG	409	int ret;
d8e3bb73	410
f0fba2ad LG	411	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
	412
	413	/* Allocate driver data */
	414	aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
	415	if (!aic26)
	416	return -ENOMEM;
d8e3bb73	417
f0fba2ad LG	418	/* Initialize the driver data */
	419	aic26->spi = spi;
	420	dev_set_drvdata(&spi->dev, aic26);
	421	aic26->master = 1;
	422
	423	ret = snd_soc_register_codec(&spi->dev,
	424	&aic26_soc_codec_dev, &aic26_dai, 1);
	425	if (ret < 0)
	426	kfree(aic26);
	427	return ret;
	428
	429	dev_dbg(&spi->dev, "SPI device initialized\n");
	430	return 0;
	431	}
	432
	433	static int aic26_spi_remove(struct spi_device *spi)
	434	{
	435	snd_soc_unregister_codec(&spi->dev);
	436	kfree(spi_get_drvdata(spi));
d8e3bb73 GL	437	return 0;
	438	}
	439
	440	static struct spi_driver aic26_spi = {
	441	.driver = {
f0fba2ad	442	.name = "tlv320aic26-codec",
d8e3bb73 GL	443	.owner = THIS_MODULE,
	444	},
	445	.probe = aic26_spi_probe,
	446	.remove = aic26_spi_remove,
	447	};
	448
	449	static int __init aic26_init(void)
	450	{
	451	return spi_register_driver(&aic26_spi);
	452	}
	453	module_init(aic26_init);
	454
	455	static void __exit aic26_exit(void)
	456	{
	457	spi_unregister_driver(&aic26_spi);
	458	}
	459	module_exit(aic26_exit);