[deliverable/linux.git] / sound / soc / codecs / tlv320aic26.c

/*
 * Texas Instruments TLV320AIC26 low power audio CODEC
 * ALSA SoC CODEC driver
 *
 * Copyright (C) 2008 Secret Lab Technologies Ltd.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>

#include "tlv320aic26.h"

MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_LICENSE("GPL");

/* AIC26 driver private data */
struct aic26 {
	struct spi_device *spi;
	struct snd_soc_codec *codec;
	int master;
	int datfm;
	int mclk;

	/* Keyclick parameters */
	int keyclick_amplitude;
	int keyclick_freq;
	int keyclick_len;
};

/* ---------------------------------------------------------------------
 * Register access routines
 */
static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
				   unsigned int reg)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd, value;
	u8 buffer[2];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	/* Do SPI transfer; first 16bits are command; remaining is
	 * register contents */
	cmd = AIC26_READ_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}
	value = (buffer[0] << 8) | buffer[1];

	/* Update the cache before returning with the value */
	cache[reg] = value;
	return value;
}

static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
					 unsigned int reg)
{
	u16 *cache = codec->reg_cache;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	return cache[reg];
}

static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
			   unsigned int value)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd;
	u8 buffer[4];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return -EINVAL;
	}

	/* Do SPI transfer; first 16bits are command; remaining is data
	 * to write into register */
	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	buffer[2] = value >> 8;
	buffer[3] = value;
	rc = spi_write(aic26->spi, buffer, 4);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}

	/* update cache before returning */
	cache[reg] = value;
	return 0;
}

static const struct snd_soc_dapm_widget tlv320aic26_dapm_widgets[] = {
SND_SOC_DAPM_INPUT("MICIN"),
SND_SOC_DAPM_INPUT("AUX"),

SND_SOC_DAPM_OUTPUT("HPL"),
SND_SOC_DAPM_OUTPUT("HPR"),
};

static const struct snd_soc_dapm_route tlv320aic26_dapm_routes[] = {
	{ "Capture", NULL, "MICIN" },
	{ "Capture", NULL, "AUX" },

	{ "HPL", NULL, "Playback" },
	{ "HPR", NULL, "Playback" },
};

/* ---------------------------------------------------------------------
 * Digital Audio Interface Operations
 */
static int aic26_hw_params(struct snd_pcm_substream *substream,
			   struct snd_pcm_hw_params *params,
			   struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	int fsref, divisor, wlen, pval, jval, dval, qval;
	u16 reg;

	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
		substream, params);
	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
		params_format(params));

	switch (params_rate(params)) {
	case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;
	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	}

	/* select data word length */
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S8:     wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	/**
	 * Configure PLL
	 * fsref = (mclk * PLLM) / 2048
	 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
	 */
	pval = 1;
	/* compute J portion of multiplier */
	jval = fsref / (aic26->mclk / 2048);
	/* compute fractional DDDD component of multiplier */
	dval = fsref - (jval * (aic26->mclk / 2048));
	dval = (10000 * dval) / (aic26->mclk / 2048);
	dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
	qval = 0;
	reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
	snd_soc_write(codec, AIC26_REG_PLL_PROG1, reg);
	reg = dval << 2;
	snd_soc_write(codec, AIC26_REG_PLL_PROG2, reg);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	if (aic26->master)
		reg |= 0x0800;
	if (fsref == 48000)
		reg |= 0x2000;
	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Audio Control 1 (FSref divisor) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	reg &= ~0x0fff;
	reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL1, reg);

	return 0;
}

/**
 * aic26_mute - Mute control to reduce noise when changing audio format
 */
static int aic26_mute(struct snd_soc_dai *dai, int mute)
{
	struct snd_soc_codec *codec = dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);

	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
		dai, mute);

	if (mute)
		reg |= 0x8080;
	else
		reg &= ~0x8080;
	snd_soc_write(codec, AIC26_REG_DAC_GAIN, reg);

	return 0;
}

static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
			    int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
		" freq=%i, dir=%i)\n",
		codec_dai, clk_id, freq, dir);

	/* MCLK needs to fall between 2MHz and 50 MHz */
	if ((freq < 2000000) || (freq > 50000000))
		return -EINVAL;

	aic26->mclk = freq;
	return 0;
}

static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
		codec_dai, fmt);

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	}

	/* interface format */
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:     aic26->datfm = AIC26_DATFM_I2S; break;
	case SND_SOC_DAIFMT_DSP_A:   aic26->datfm = AIC26_DATFM_DSP; break;
	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	case SND_SOC_DAIFMT_LEFT_J:  aic26->datfm = AIC26_DATFM_LEFTJ; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	return 0;
}

/* ---------------------------------------------------------------------
 * Digital Audio Interface Definition
 */
#define AIC26_RATES	(SNDRV_PCM_RATE_8000  | SNDRV_PCM_RATE_11025 |\
			 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
			 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
			 SNDRV_PCM_RATE_48000)
#define AIC26_FORMATS	(SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_BE |\
			 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)

static const struct snd_soc_dai_ops aic26_dai_ops = {
	.hw_params	= aic26_hw_params,
	.digital_mute	= aic26_mute,
	.set_sysclk	= aic26_set_sysclk,
	.set_fmt	= aic26_set_fmt,
};

static struct snd_soc_dai_driver aic26_dai = {
	.name = "tlv320aic26-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.capture = {
		.stream_name = "Capture",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.ops = &aic26_dai_ops,
};

/* ---------------------------------------------------------------------
 * ALSA controls
 */
static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
static const struct soc_enum aic26_capture_src_enum =
	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);

static const struct snd_kcontrol_new aic26_snd_controls[] = {
	/* Output */
	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	SOC_ENUM("Capture Source", aic26_capture_src_enum),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: sysfs files for debugging
 */

static ssize_t aic26_keyclick_show(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val, amp, freq, len;

	val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2);
	amp = (val >> 12) & 0x7;
	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	len = 2 * (1 + ((val >> 4) & 0xf));

	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
}

/* Any write to the keyclick attribute will trigger the keyclick event */
static ssize_t aic26_keyclick_set(struct device *dev,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val;

	val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2);
	val |= 0x8000;
	snd_soc_write(aic26->codec, AIC26_REG_AUDIO_CTRL2, val);

	return count;
}

static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);

/* ---------------------------------------------------------------------
 * SoC CODEC portion of driver: probe and release routines
 */
static int aic26_probe(struct snd_soc_codec *codec)
{
	struct aic26 *aic26 = dev_get_drvdata(codec->dev);
	int ret, err, i, reg;

	aic26->codec = codec;

	/* Reset the codec to power on defaults */
	snd_soc_write(codec, AIC26_REG_RESET, 0xBB00);

	/* Power up CODEC */
	snd_soc_write(codec, AIC26_REG_POWER_CTRL, 0);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = snd_soc_read(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	reg |= 0x0800; /* set master mode */
	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Fill register cache */
	for (i = 0; i < codec->driver->reg_cache_size; i++)
		snd_soc_read(codec, i);

	/* Register the sysfs files for debugging */
	/* Create SysFS files */
	ret = device_create_file(codec->dev, &dev_attr_keyclick);
	if (ret)
		dev_info(codec->dev, "error creating sysfs files\n");

	/* register controls */
	dev_dbg(codec->dev, "Registering controls\n");
	err = snd_soc_add_codec_controls(codec, aic26_snd_controls,
			ARRAY_SIZE(aic26_snd_controls));
	WARN_ON(err < 0);

	return 0;
}

static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	.probe = aic26_probe,
	.read = aic26_reg_read,
	.write = aic26_reg_write,
	.reg_cache_size = AIC26_NUM_REGS,
	.reg_word_size = sizeof(u16),
	.dapm_widgets = tlv320aic26_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(tlv320aic26_dapm_widgets),
	.dapm_routes = tlv320aic26_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(tlv320aic26_dapm_routes),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: probe and release routines and SPI
 * 				 driver registration.
 */
static int aic26_spi_probe(struct spi_device *spi)
{
	struct aic26 *aic26;
	int ret;

	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");

	/* Allocate driver data */
	aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
	if (!aic26)
		return -ENOMEM;

	/* Initialize the driver data */
	aic26->spi = spi;
	dev_set_drvdata(&spi->dev, aic26);
	aic26->master = 1;

	ret = snd_soc_register_codec(&spi->dev,
			&aic26_soc_codec_dev, &aic26_dai, 1);
	return ret;
}

static int aic26_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_codec(&spi->dev);
	return 0;
}

static struct spi_driver aic26_spi = {
	.driver = {
		.name = "tlv320aic26-codec",
		.owner = THIS_MODULE,
	},
	.probe = aic26_spi_probe,
	.remove = aic26_spi_remove,
};

module_spi_driver(aic26_spi);
Commit	Line	Data
d8e3bb73 GL	1	/*
	2	* Texas Instruments TLV320AIC26 low power audio CODEC
	3	* ALSA SoC CODEC driver
	4	*
	5	* Copyright (C) 2008 Secret Lab Technologies Ltd.
	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/moduleparam.h>
	10	#include <linux/init.h>
	11	#include <linux/delay.h>
	12	#include <linux/pm.h>
	13	#include <linux/device.h>
	14	#include <linux/sysfs.h>
	15	#include <linux/spi/spi.h>
5a0e3ad6	16	#include <linux/slab.h>
d8e3bb73 GL	17	#include <sound/core.h>
	18	#include <sound/pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/soc.h>
d8e3bb73 GL	21	#include <sound/initval.h>
	22
	23	#include "tlv320aic26.h"
	24
	25	MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
	26	MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
	27	MODULE_LICENSE("GPL");
	28
	29	/* AIC26 driver private data */
	30	struct aic26 {
	31	struct spi_device *spi;
f8f11795	32	struct snd_soc_codec *codec;
d8e3bb73 GL	33	int master;
	34	int datfm;
	35	int mclk;
	36
	37	/* Keyclick parameters */
	38	int keyclick_amplitude;
	39	int keyclick_freq;
	40	int keyclick_len;
	41	};
	42
	43	/* ---------------------------------------------------------------------
	44	* Register access routines
	45	*/
	46	static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
	47	unsigned int reg)
	48	{
d4a8ca24	49	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	50	u16 *cache = codec->reg_cache;
	51	u16 cmd, value;
	52	u8 buffer[2];
	53	int rc;
	54
	55	if (reg >= AIC26_NUM_REGS) {
	56	WARN_ON_ONCE(1);
	57	return 0;
	58	}
	59
	60	/* Do SPI transfer; first 16bits are command; remaining is
	61	* register contents */
	62	cmd = AIC26_READ_COMMAND_WORD(reg);
	63	buffer[0] = (cmd >> 8) & 0xff;
	64	buffer[1] = cmd & 0xff;
	65	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	66	if (rc) {
	67	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	68	return -EIO;
	69	}
	70	value = (buffer[0] << 8) \| buffer[1];
	71
	72	/* Update the cache before returning with the value */
	73	cache[reg] = value;
	74	return value;
	75	}
	76
	77	static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
	78	unsigned int reg)
	79	{
	80	u16 *cache = codec->reg_cache;
	81
	82	if (reg >= AIC26_NUM_REGS) {
	83	WARN_ON_ONCE(1);
	84	return 0;
	85	}
	86
	87	return cache[reg];
	88	}
	89
	90	static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
	91	unsigned int value)
	92	{
d4a8ca24	93	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	94	u16 *cache = codec->reg_cache;
	95	u16 cmd;
	96	u8 buffer[4];
	97	int rc;
	98
	99	if (reg >= AIC26_NUM_REGS) {
	100	WARN_ON_ONCE(1);
	101	return -EINVAL;
	102	}
	103
	104	/* Do SPI transfer; first 16bits are command; remaining is data
	105	* to write into register */
	106	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	107	buffer[0] = (cmd >> 8) & 0xff;
	108	buffer[1] = cmd & 0xff;
	109	buffer[2] = value >> 8;
	110	buffer[3] = value;
	111	rc = spi_write(aic26->spi, buffer, 4);
	112	if (rc) {
	113	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	114	return -EIO;
	115	}
	116
	117	/* update cache before returning */
	118	cache[reg] = value;
	119	return 0;
	120	}
	121
4a11bc2f MB	122	static const struct snd_soc_dapm_widget tlv320aic26_dapm_widgets[] = {
	123	SND_SOC_DAPM_INPUT("MICIN"),
	124	SND_SOC_DAPM_INPUT("AUX"),
	125
	126	SND_SOC_DAPM_OUTPUT("HPL"),
	127	SND_SOC_DAPM_OUTPUT("HPR"),
	128	};
	129
	130	static const struct snd_soc_dapm_route tlv320aic26_dapm_routes[] = {
	131	{ "Capture", NULL, "MICIN" },
	132	{ "Capture", NULL, "AUX" },
	133
	134	{ "HPL", NULL, "Playback" },
	135	{ "HPR", NULL, "Playback" },
	136	};
	137
d8e3bb73 GL	138	/* ---------------------------------------------------------------------
	139	* Digital Audio Interface Operations
	140	*/
	141	static int aic26_hw_params(struct snd_pcm_substream *substream,
dee89c4d MB	142	struct snd_pcm_hw_params *params,
dee89c4d MB	143	struct snd_soc_dai *dai)
d8e3bb73	144	{
e6968a17	145	struct snd_soc_codec *codec = dai->codec;
d4a8ca24	146	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	147	int fsref, divisor, wlen, pval, jval, dval, qval;
	148	u16 reg;
	149
	150	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
	151	substream, params);
	152	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
	153	params_format(params));
	154
	155	switch (params_rate(params)) {
	156	case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
	157	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	158	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	159	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	160	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	161	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	162	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	163	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	164	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	165	default:
	166	dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	167	}
	168
	169	/* select data word length */
	170	switch (params_format(params)) {
	171	case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
	172	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	173	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	174	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	175	default:
	176	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	177	}
	178
2aba76f0 MW	179	/**
	180	* Configure PLL
	181	* fsref = (mclk * PLLM) / 2048
	182	* where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
	183	*/
d8e3bb73	184	pval = 1;
2aba76f0 MW	185	/* compute J portion of multiplier */
	186	jval = fsref / (aic26->mclk / 2048);
	187	/* compute fractional DDDD component of multiplier */
	188	dval = fsref - (jval * (aic26->mclk / 2048));
	189	dval = (10000 * dval) / (aic26->mclk / 2048);
	190	dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
d8e3bb73 GL	191	qval = 0;
d8e3bb73 GL	192	reg = 0x8000 \| qval << 11 \| pval << 8 \| jval << 2;
12201398	193	snd_soc_write(codec, AIC26_REG_PLL_PROG1, reg);
d8e3bb73	194	reg = dval << 2;
12201398	195	snd_soc_write(codec, AIC26_REG_PLL_PROG2, reg);
d8e3bb73 GL	196
	197	/* Audio Control 3 (master mode, fsref rate) */
	198	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	199	reg &= ~0xf800;
	200	if (aic26->master)
	201	reg \|= 0x0800;
	202	if (fsref == 48000)
	203	reg \|= 0x2000;
12201398	204	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
d8e3bb73 GL	205
	206	/* Audio Control 1 (FSref divisor) */
	207	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	208	reg &= ~0x0fff;
	209	reg \|= wlen \| aic26->datfm \| (divisor << 3) \| divisor;
12201398	210	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
d8e3bb73 GL	211
	212	return 0;
	213	}
	214
	215	/**
	216	* aic26_mute - Mute control to reduce noise when changing audio format
	217	*/
	218	static int aic26_mute(struct snd_soc_dai *dai, int mute)
	219	{
	220	struct snd_soc_codec *codec = dai->codec;
d4a8ca24	221	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	222	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
	223
	224	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
	225	dai, mute);
	226
	227	if (mute)
	228	reg \|= 0x8080;
	229	else
	230	reg &= ~0x8080;
12201398	231	snd_soc_write(codec, AIC26_REG_DAC_GAIN, reg);
d8e3bb73 GL	232
	233	return 0;
	234	}
	235
	236	static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
	237	int clk_id, unsigned int freq, int dir)
	238	{
	239	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	240	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	241
	242	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
	243	" freq=%i, dir=%i)\n",
	244	codec_dai, clk_id, freq, dir);
	245
	246	/* MCLK needs to fall between 2MHz and 50 MHz */
	247	if ((freq < 2000000) \|\| (freq > 50000000))
	248	return -EINVAL;
	249
	250	aic26->mclk = freq;
	251	return 0;
	252	}
	253
	254	static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
	255	{
	256	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	257	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	258
	259	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
	260	codec_dai, fmt);
	261
	262	/* set master/slave audio interface */
	263	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	264	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	265	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	266	default:
	267	dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	268	}
	269
	270	/* interface format */
	271	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	272	case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
	273	case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
	274	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	275	case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
	276	default:
	277	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	278	}
	279
	280	return 0;
	281	}
	282
	283	/* ---------------------------------------------------------------------
	284	* Digital Audio Interface Definition
	285	*/
	286	#define AIC26_RATES (SNDRV_PCM_RATE_8000 \| SNDRV_PCM_RATE_11025 \|\
	287	SNDRV_PCM_RATE_16000 \| SNDRV_PCM_RATE_22050 \|\
	288	SNDRV_PCM_RATE_32000 \| SNDRV_PCM_RATE_44100 \|\
	289	SNDRV_PCM_RATE_48000)
	290	#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 \| SNDRV_PCM_FMTBIT_S16_BE \|\
	291	SNDRV_PCM_FMTBIT_S24_BE \| SNDRV_PCM_FMTBIT_S32_BE)
	292
85e7652d	293	static const struct snd_soc_dai_ops aic26_dai_ops = {
6335d055 EM	294	.hw_params = aic26_hw_params,
	295	.digital_mute = aic26_mute,
	296	.set_sysclk = aic26_set_sysclk,
	297	.set_fmt = aic26_set_fmt,
	298	};
	299
f0fba2ad LG	300	static struct snd_soc_dai_driver aic26_dai = {
f0fba2ad LG	301	.name = "tlv320aic26-hifi",
d8e3bb73 GL	302	.playback = {
	303	.stream_name = "Playback",
	304	.channels_min = 2,
	305	.channels_max = 2,
	306	.rates = AIC26_RATES,
	307	.formats = AIC26_FORMATS,
	308	},
	309	.capture = {
	310	.stream_name = "Capture",
	311	.channels_min = 2,
	312	.channels_max = 2,
	313	.rates = AIC26_RATES,
	314	.formats = AIC26_FORMATS,
	315	},
6335d055	316	.ops = &aic26_dai_ops,
d8e3bb73	317	};
d8e3bb73 GL	318
	319	/* ---------------------------------------------------------------------
	320	* ALSA controls
	321	*/
	322	static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
	323	static const struct soc_enum aic26_capture_src_enum =
	324	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
	325
	326	static const struct snd_kcontrol_new aic26_snd_controls[] = {
	327	/* Output */
	328	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	329	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	330	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	331	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	332	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	333	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	334	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	335	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	336	SOC_ENUM("Capture Source", aic26_capture_src_enum),
	337	};
	338
d8e3bb73 GL	339	/* ---------------------------------------------------------------------
	340	* SPI device portion of driver: sysfs files for debugging
	341	*/
	342
	343	static ssize_t aic26_keyclick_show(struct device *dev,
	344	struct device_attribute attr, char buf)
	345	{
	346	struct aic26 *aic26 = dev_get_drvdata(dev);
	347	int val, amp, freq, len;
	348
f8f11795	349	val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2);
d8e3bb73 GL	350	amp = (val >> 12) & 0x7;
	351	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	352	len = 2 * (1 + ((val >> 4) & 0xf));
	353
	354	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
	355	}
	356
	357	/* Any write to the keyclick attribute will trigger the keyclick event */
	358	static ssize_t aic26_keyclick_set(struct device *dev,
	359	struct device_attribute *attr,
	360	const char *buf, size_t count)
	361	{
	362	struct aic26 *aic26 = dev_get_drvdata(dev);
	363	int val;
	364
f8f11795	365	val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2);
d8e3bb73	366	val \|= 0x8000;
12201398	367	snd_soc_write(aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
d8e3bb73 GL	368
	369	return count;
	370	}
	371
9cce39a1	372	static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
d8e3bb73 GL	373
d8e3bb73 GL	374	/* ---------------------------------------------------------------------
f0fba2ad	375	* SoC CODEC portion of driver: probe and release routines
d8e3bb73	376	*/
f0fba2ad	377	static int aic26_probe(struct snd_soc_codec *codec)
d8e3bb73	378	{
f8f11795	379	struct aic26 *aic26 = dev_get_drvdata(codec->dev);
f0fba2ad	380	int ret, err, i, reg;
d8e3bb73	381
f8f11795 LPC	382	aic26->codec = codec;
f8f11795 LPC	383
d8e3bb73	384	/* Reset the codec to power on defaults */
12201398	385	snd_soc_write(codec, AIC26_REG_RESET, 0xBB00);
d8e3bb73 GL	386
d8e3bb73 GL	387	/* Power up CODEC */
12201398	388	snd_soc_write(codec, AIC26_REG_POWER_CTRL, 0);
d8e3bb73 GL	389
d8e3bb73 GL	390	/* Audio Control 3 (master mode, fsref rate) */
12201398	391	reg = snd_soc_read(codec, AIC26_REG_AUDIO_CTRL3);
d8e3bb73 GL	392	reg &= ~0xf800;
d8e3bb73 GL	393	reg \|= 0x0800; /* set master mode */
12201398	394	snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
d8e3bb73 GL	395
d8e3bb73 GL	396	/* Fill register cache */
839d271c	397	for (i = 0; i < codec->driver->reg_cache_size; i++)
12201398	398	snd_soc_read(codec, i);
d8e3bb73 GL	399
	400	/* Register the sysfs files for debugging */
	401	/* Create SysFS files */
f0fba2ad	402	ret = device_create_file(codec->dev, &dev_attr_keyclick);
64089b84	403	if (ret)
f0fba2ad	404	dev_info(codec->dev, "error creating sysfs files\n");
d8e3bb73	405
f0fba2ad LG	406	/* register controls */
f0fba2ad LG	407	dev_dbg(codec->dev, "Registering controls\n");
022658be	408	err = snd_soc_add_codec_controls(codec, aic26_snd_controls,
f0fba2ad LG	409	ARRAY_SIZE(aic26_snd_controls));
f0fba2ad LG	410	WARN_ON(err < 0);
d8e3bb73	411
d8e3bb73 GL	412	return 0;
	413	}
	414
f0fba2ad LG	415	static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	416	.probe = aic26_probe,
	417	.read = aic26_reg_read,
	418	.write = aic26_reg_write,
	419	.reg_cache_size = AIC26_NUM_REGS,
	420	.reg_word_size = sizeof(u16),
4a11bc2f MB	421	.dapm_widgets = tlv320aic26_dapm_widgets,
	422	.num_dapm_widgets = ARRAY_SIZE(tlv320aic26_dapm_widgets),
	423	.dapm_routes = tlv320aic26_dapm_routes,
	424	.num_dapm_routes = ARRAY_SIZE(tlv320aic26_dapm_routes),
f0fba2ad LG	425	};
	426
	427	/* ---------------------------------------------------------------------
	428	* SPI device portion of driver: probe and release routines and SPI
	429	* driver registration.
	430	*/
	431	static int aic26_spi_probe(struct spi_device *spi)
d8e3bb73	432	{
f0fba2ad LG	433	struct aic26 *aic26;
f0fba2ad LG	434	int ret;
d8e3bb73	435
f0fba2ad LG	436	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
	437
	438	/* Allocate driver data */
a8163023	439	aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
f0fba2ad LG	440	if (!aic26)
f0fba2ad LG	441	return -ENOMEM;
d8e3bb73	442
f0fba2ad LG	443	/* Initialize the driver data */
	444	aic26->spi = spi;
	445	dev_set_drvdata(&spi->dev, aic26);
	446	aic26->master = 1;
	447
	448	ret = snd_soc_register_codec(&spi->dev,
	449	&aic26_soc_codec_dev, &aic26_dai, 1);
f0fba2ad	450	return ret;
f0fba2ad LG	451	}
	452
	453	static int aic26_spi_remove(struct spi_device *spi)
	454	{
	455	snd_soc_unregister_codec(&spi->dev);
d8e3bb73 GL	456	return 0;
	457	}
	458
	459	static struct spi_driver aic26_spi = {
	460	.driver = {
f0fba2ad	461	.name = "tlv320aic26-codec",
d8e3bb73 GL	462	.owner = THIS_MODULE,
	463	},
	464	.probe = aic26_spi_probe,
	465	.remove = aic26_spi_remove,
	466	};
	467
9bb280a2	468	module_spi_driver(aic26_spi);