[deliverable/linux.git] / sound / soc / codecs / tlv320aic26.c

/*
 * Texas Instruments TLV320AIC26 low power audio CODEC
 * ALSA SoC CODEC driver
 *
 * Copyright (C) 2008 Secret Lab Technologies Ltd.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>

#include "tlv320aic26.h"

MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_LICENSE("GPL");

/* AIC26 driver private data */
struct aic26 {
	struct spi_device *spi;
	struct snd_soc_codec codec;
	u16 reg_cache[AIC26_NUM_REGS];	/* shadow registers */
	int master;
	int datfm;
	int mclk;

	/* Keyclick parameters */
	int keyclick_amplitude;
	int keyclick_freq;
	int keyclick_len;
};

/* ---------------------------------------------------------------------
 * Register access routines
 */
static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
				   unsigned int reg)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd, value;
	u8 buffer[2];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	/* Do SPI transfer; first 16bits are command; remaining is
	 * register contents */
	cmd = AIC26_READ_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}
	value = (buffer[0] << 8) | buffer[1];

	/* Update the cache before returning with the value */
	cache[reg] = value;
	return value;
}

static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
					 unsigned int reg)
{
	u16 *cache = codec->reg_cache;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return 0;
	}

	return cache[reg];
}

static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
			   unsigned int value)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 *cache = codec->reg_cache;
	u16 cmd;
	u8 buffer[4];
	int rc;

	if (reg >= AIC26_NUM_REGS) {
		WARN_ON_ONCE(1);
		return -EINVAL;
	}

	/* Do SPI transfer; first 16bits are command; remaining is data
	 * to write into register */
	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	buffer[0] = (cmd >> 8) & 0xff;
	buffer[1] = cmd & 0xff;
	buffer[2] = value >> 8;
	buffer[3] = value;
	rc = spi_write(aic26->spi, buffer, 4);
	if (rc) {
		dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
		return -EIO;
	}

	/* update cache before returning */
	cache[reg] = value;
	return 0;
}

/* ---------------------------------------------------------------------
 * Digital Audio Interface Operations
 */
static int aic26_hw_params(struct snd_pcm_substream *substream,
			   struct snd_pcm_hw_params *params,
			   struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_codec *codec = rtd->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	int fsref, divisor, wlen, pval, jval, dval, qval;
	u16 reg;

	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
		substream, params);
	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
		params_format(params));

	switch (params_rate(params)) {
	case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;
	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	}

	/* select data word length */
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S8:     wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	/* Configure PLL */
	pval = 1;
	jval = (fsref == 44100) ? 7 : 8;
	dval = (fsref == 44100) ? 5264 : 1920;
	qval = 0;
	reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
	aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
	reg = dval << 2;
	aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	if (aic26->master)
		reg |= 0x0800;
	if (fsref == 48000)
		reg |= 0x2000;
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Audio Control 1 (FSref divisor) */
	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	reg &= ~0x0fff;
	reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);

	return 0;
}

/**
 * aic26_mute - Mute control to reduce noise when changing audio format
 */
static int aic26_mute(struct snd_soc_dai *dai, int mute)
{
	struct snd_soc_codec *codec = dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);

	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
		dai, mute);

	if (mute)
		reg |= 0x8080;
	else
		reg &= ~0x8080;
	aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);

	return 0;
}

static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
			    int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
		" freq=%i, dir=%i)\n",
		codec_dai, clk_id, freq, dir);

	/* MCLK needs to fall between 2MHz and 50 MHz */
	if ((freq < 2000000) || (freq > 50000000))
		return -EINVAL;

	aic26->mclk = freq;
	return 0;
}

static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);

	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
		codec_dai, fmt);

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	}

	/* interface format */
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:     aic26->datfm = AIC26_DATFM_I2S; break;
	case SND_SOC_DAIFMT_DSP_A:   aic26->datfm = AIC26_DATFM_DSP; break;
	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	case SND_SOC_DAIFMT_LEFT_J:  aic26->datfm = AIC26_DATFM_LEFTJ; break;
	default:
		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	}

	return 0;
}

/* ---------------------------------------------------------------------
 * Digital Audio Interface Definition
 */
#define AIC26_RATES	(SNDRV_PCM_RATE_8000  | SNDRV_PCM_RATE_11025 |\
			 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
			 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
			 SNDRV_PCM_RATE_48000)
#define AIC26_FORMATS	(SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_BE |\
			 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)

static struct snd_soc_dai_ops aic26_dai_ops = {
	.hw_params	= aic26_hw_params,
	.digital_mute	= aic26_mute,
	.set_sysclk	= aic26_set_sysclk,
	.set_fmt	= aic26_set_fmt,
};

static struct snd_soc_dai_driver aic26_dai = {
	.name = "tlv320aic26-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.capture = {
		.stream_name = "Capture",
		.channels_min = 2,
		.channels_max = 2,
		.rates = AIC26_RATES,
		.formats = AIC26_FORMATS,
	},
	.ops = &aic26_dai_ops,
};

/* ---------------------------------------------------------------------
 * ALSA controls
 */
static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
static const struct soc_enum aic26_capture_src_enum =
	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);

static const struct snd_kcontrol_new aic26_snd_controls[] = {
	/* Output */
	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	SOC_ENUM("Capture Source", aic26_capture_src_enum),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: sysfs files for debugging
 */

static ssize_t aic26_keyclick_show(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val, amp, freq, len;

	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	amp = (val >> 12) & 0x7;
	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	len = 2 * (1 + ((val >> 4) & 0xf));

	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
}

/* Any write to the keyclick attribute will trigger the keyclick event */
static ssize_t aic26_keyclick_set(struct device *dev,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
	struct aic26 *aic26 = dev_get_drvdata(dev);
	int val;

	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	val |= 0x8000;
	aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);

	return count;
}

static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);

/* ---------------------------------------------------------------------
 * SoC CODEC portion of driver: probe and release routines
 */
static int aic26_probe(struct snd_soc_codec *codec)
{
	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
	int ret, err, i, reg;

	dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");

	/* Reset the codec to power on defaults */
	aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);

	/* Power up CODEC */
	aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);

	/* Audio Control 3 (master mode, fsref rate) */
	reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
	reg &= ~0xf800;
	reg |= 0x0800; /* set master mode */
	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);

	/* Fill register cache */
	for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
		aic26_reg_read(codec, i);

	/* Register the sysfs files for debugging */
	/* Create SysFS files */
	ret = device_create_file(codec->dev, &dev_attr_keyclick);
	if (ret)
		dev_info(codec->dev, "error creating sysfs files\n");

	/* register controls */
	dev_dbg(codec->dev, "Registering controls\n");
	err = snd_soc_add_controls(codec, aic26_snd_controls,
			ARRAY_SIZE(aic26_snd_controls));
	WARN_ON(err < 0);

	return 0;
}

static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	.probe = aic26_probe,
	.read = aic26_reg_read,
	.write = aic26_reg_write,
	.reg_cache_size = AIC26_NUM_REGS,
	.reg_word_size = sizeof(u16),
};

/* ---------------------------------------------------------------------
 * SPI device portion of driver: probe and release routines and SPI
 * 				 driver registration.
 */
static int aic26_spi_probe(struct spi_device *spi)
{
	struct aic26 *aic26;
	int ret;

	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");

	/* Allocate driver data */
	aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
	if (!aic26)
		return -ENOMEM;

	/* Initialize the driver data */
	aic26->spi = spi;
	dev_set_drvdata(&spi->dev, aic26);
	aic26->master = 1;

	ret = snd_soc_register_codec(&spi->dev,
			&aic26_soc_codec_dev, &aic26_dai, 1);
	if (ret < 0)
		kfree(aic26);
	return ret;

	dev_dbg(&spi->dev, "SPI device initialized\n");
	return 0;
}

static int aic26_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_codec(&spi->dev);
	kfree(spi_get_drvdata(spi));
	return 0;
}

static struct spi_driver aic26_spi = {
	.driver = {
		.name = "tlv320aic26-codec",
		.owner = THIS_MODULE,
	},
	.probe = aic26_spi_probe,
	.remove = aic26_spi_remove,
};

static int __init aic26_init(void)
{
	return spi_register_driver(&aic26_spi);
}
module_init(aic26_init);

static void __exit aic26_exit(void)
{
	spi_unregister_driver(&aic26_spi);
}
module_exit(aic26_exit);
Commit	Line	Data
d8e3bb73 GL	1	/*
	2	* Texas Instruments TLV320AIC26 low power audio CODEC
	3	* ALSA SoC CODEC driver
	4	*
	5	* Copyright (C) 2008 Secret Lab Technologies Ltd.
	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/moduleparam.h>
	10	#include <linux/init.h>
	11	#include <linux/delay.h>
	12	#include <linux/pm.h>
	13	#include <linux/device.h>
	14	#include <linux/sysfs.h>
	15	#include <linux/spi/spi.h>
5a0e3ad6	16	#include <linux/slab.h>
d8e3bb73 GL	17	#include <sound/core.h>
	18	#include <sound/pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/soc.h>
d8e3bb73 GL	21	#include <sound/initval.h>
	22
	23	#include "tlv320aic26.h"
	24
	25	MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
	26	MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
	27	MODULE_LICENSE("GPL");
	28
	29	/* AIC26 driver private data */
	30	struct aic26 {
	31	struct spi_device *spi;
	32	struct snd_soc_codec codec;
	33	u16 reg_cache[AIC26_NUM_REGS]; /* shadow registers */
	34	int master;
	35	int datfm;
	36	int mclk;
	37
	38	/* Keyclick parameters */
	39	int keyclick_amplitude;
	40	int keyclick_freq;
	41	int keyclick_len;
	42	};
	43
	44	/* ---------------------------------------------------------------------
	45	* Register access routines
	46	*/
	47	static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
	48	unsigned int reg)
	49	{
d4a8ca24	50	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	51	u16 *cache = codec->reg_cache;
	52	u16 cmd, value;
	53	u8 buffer[2];
	54	int rc;
	55
	56	if (reg >= AIC26_NUM_REGS) {
	57	WARN_ON_ONCE(1);
	58	return 0;
	59	}
	60
	61	/* Do SPI transfer; first 16bits are command; remaining is
	62	* register contents */
	63	cmd = AIC26_READ_COMMAND_WORD(reg);
	64	buffer[0] = (cmd >> 8) & 0xff;
	65	buffer[1] = cmd & 0xff;
	66	rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
	67	if (rc) {
	68	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	69	return -EIO;
	70	}
	71	value = (buffer[0] << 8) \| buffer[1];
	72
	73	/* Update the cache before returning with the value */
	74	cache[reg] = value;
	75	return value;
	76	}
	77
	78	static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
	79	unsigned int reg)
	80	{
	81	u16 *cache = codec->reg_cache;
	82
	83	if (reg >= AIC26_NUM_REGS) {
	84	WARN_ON_ONCE(1);
	85	return 0;
	86	}
	87
	88	return cache[reg];
	89	}
	90
	91	static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
	92	unsigned int value)
	93	{
d4a8ca24	94	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	95	u16 *cache = codec->reg_cache;
	96	u16 cmd;
	97	u8 buffer[4];
	98	int rc;
	99
	100	if (reg >= AIC26_NUM_REGS) {
	101	WARN_ON_ONCE(1);
	102	return -EINVAL;
	103	}
	104
	105	/* Do SPI transfer; first 16bits are command; remaining is data
	106	* to write into register */
	107	cmd = AIC26_WRITE_COMMAND_WORD(reg);
	108	buffer[0] = (cmd >> 8) & 0xff;
	109	buffer[1] = cmd & 0xff;
	110	buffer[2] = value >> 8;
	111	buffer[3] = value;
	112	rc = spi_write(aic26->spi, buffer, 4);
	113	if (rc) {
	114	dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
	115	return -EIO;
	116	}
	117
	118	/* update cache before returning */
	119	cache[reg] = value;
	120	return 0;
	121	}
	122
	123	/* ---------------------------------------------------------------------
	124	* Digital Audio Interface Operations
	125	*/
	126	static int aic26_hw_params(struct snd_pcm_substream *substream,
dee89c4d MB	127	struct snd_pcm_hw_params *params,
dee89c4d MB	128	struct snd_soc_dai *dai)
d8e3bb73 GL	129	{
d8e3bb73 GL	130	struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad	131	struct snd_soc_codec *codec = rtd->codec;
d4a8ca24	132	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	133	int fsref, divisor, wlen, pval, jval, dval, qval;
	134	u16 reg;
	135
	136	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
	137	substream, params);
	138	dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
	139	params_format(params));
	140
	141	switch (params_rate(params)) {
	142	case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
	143	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
	144	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
	145	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
	146	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
	147	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
	148	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
	149	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
	150	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
	151	default:
	152	dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
	153	}
	154
	155	/* select data word length */
	156	switch (params_format(params)) {
	157	case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
	158	case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
	159	case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
	160	case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
	161	default:
	162	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	163	}
	164
	165	/* Configure PLL */
	166	pval = 1;
	167	jval = (fsref == 44100) ? 7 : 8;
	168	dval = (fsref == 44100) ? 5264 : 1920;
	169	qval = 0;
	170	reg = 0x8000 \| qval << 11 \| pval << 8 \| jval << 2;
	171	aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
	172	reg = dval << 2;
	173	aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
	174
	175	/* Audio Control 3 (master mode, fsref rate) */
	176	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
	177	reg &= ~0xf800;
	178	if (aic26->master)
	179	reg \|= 0x0800;
	180	if (fsref == 48000)
	181	reg \|= 0x2000;
	182	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
	183
	184	/* Audio Control 1 (FSref divisor) */
	185	reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
	186	reg &= ~0x0fff;
	187	reg \|= wlen \| aic26->datfm \| (divisor << 3) \| divisor;
	188	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
	189
	190	return 0;
	191	}
	192
	193	/**
	194	* aic26_mute - Mute control to reduce noise when changing audio format
	195	*/
	196	static int aic26_mute(struct snd_soc_dai *dai, int mute)
197	{
198	struct snd_soc_codec *codec = dai->codec;
d4a8ca24	199	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	200	u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
	201
	202	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
	203	dai, mute);
	204
	205	if (mute)
	206	reg \|= 0x8080;
	207	else
	208	reg &= ~0x8080;
	209	aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
	210
	211	return 0;
	212	}
	213
	214	static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
	215	int clk_id, unsigned int freq, int dir)
	216	{
	217	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	218	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	219
	220	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
	221	" freq=%i, dir=%i)\n",
	222	codec_dai, clk_id, freq, dir);
	223
	224	/* MCLK needs to fall between 2MHz and 50 MHz */
	225	if ((freq < 2000000) \|\| (freq > 50000000))
	226	return -EINVAL;
	227
	228	aic26->mclk = freq;
	229	return 0;
	230	}
	231
	232	static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
	233	{
	234	struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24	235	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
d8e3bb73 GL	236
	237	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
	238	codec_dai, fmt);
	239
	240	/* set master/slave audio interface */
	241	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	242	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
	243	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
	244	default:
	245	dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
	246	}
	247
	248	/* interface format */
	249	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	250	case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
	251	case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
	252	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
	253	case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
	254	default:
	255	dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
	256	}
	257
	258	return 0;
	259	}
	260
	261	/* ---------------------------------------------------------------------
	262	* Digital Audio Interface Definition
	263	*/
	264	#define AIC26_RATES (SNDRV_PCM_RATE_8000 \| SNDRV_PCM_RATE_11025 \|\
	265	SNDRV_PCM_RATE_16000 \| SNDRV_PCM_RATE_22050 \|\
	266	SNDRV_PCM_RATE_32000 \| SNDRV_PCM_RATE_44100 \|\
	267	SNDRV_PCM_RATE_48000)
	268	#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 \| SNDRV_PCM_FMTBIT_S16_BE \|\
	269	SNDRV_PCM_FMTBIT_S24_BE \| SNDRV_PCM_FMTBIT_S32_BE)
	270
6335d055 EM	271	static struct snd_soc_dai_ops aic26_dai_ops = {
	272	.hw_params = aic26_hw_params,
	273	.digital_mute = aic26_mute,
	274	.set_sysclk = aic26_set_sysclk,
	275	.set_fmt = aic26_set_fmt,
	276	};
	277
f0fba2ad LG	278	static struct snd_soc_dai_driver aic26_dai = {
f0fba2ad LG	279	.name = "tlv320aic26-hifi",
d8e3bb73 GL	280	.playback = {
	281	.stream_name = "Playback",
	282	.channels_min = 2,
	283	.channels_max = 2,
	284	.rates = AIC26_RATES,
	285	.formats = AIC26_FORMATS,
	286	},
	287	.capture = {
	288	.stream_name = "Capture",
	289	.channels_min = 2,
	290	.channels_max = 2,
	291	.rates = AIC26_RATES,
	292	.formats = AIC26_FORMATS,
	293	},
6335d055	294	.ops = &aic26_dai_ops,
d8e3bb73	295	};
d8e3bb73 GL	296
	297	/* ---------------------------------------------------------------------
	298	* ALSA controls
	299	*/
	300	static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
	301	static const struct soc_enum aic26_capture_src_enum =
	302	SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
	303
	304	static const struct snd_kcontrol_new aic26_snd_controls[] = {
	305	/* Output */
	306	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
	307	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
	308	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
	309	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
	310	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
	311	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
	312	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
	313	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
	314	SOC_ENUM("Capture Source", aic26_capture_src_enum),
	315	};
	316
d8e3bb73 GL	317	/* ---------------------------------------------------------------------
	318	* SPI device portion of driver: sysfs files for debugging
	319	*/
	320
	321	static ssize_t aic26_keyclick_show(struct device *dev,
	322	struct device_attribute attr, char buf)
	323	{
	324	struct aic26 *aic26 = dev_get_drvdata(dev);
	325	int val, amp, freq, len;
	326
	327	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	328	amp = (val >> 12) & 0x7;
	329	freq = (125 << ((val >> 8) & 0x7)) >> 1;
	330	len = 2 * (1 + ((val >> 4) & 0xf));
	331
	332	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
	333	}
	334
	335	/* Any write to the keyclick attribute will trigger the keyclick event */
	336	static ssize_t aic26_keyclick_set(struct device *dev,
	337	struct device_attribute *attr,
	338	const char *buf, size_t count)
	339	{
	340	struct aic26 *aic26 = dev_get_drvdata(dev);
	341	int val;
	342
	343	val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
	344	val \|= 0x8000;
	345	aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
	346
	347	return count;
	348	}
	349
9cce39a1	350	static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
d8e3bb73 GL	351
d8e3bb73 GL	352	/* ---------------------------------------------------------------------
f0fba2ad	353	* SoC CODEC portion of driver: probe and release routines
d8e3bb73	354	*/
f0fba2ad	355	static int aic26_probe(struct snd_soc_codec *codec)
d8e3bb73	356	{
f0fba2ad LG	357	struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
f0fba2ad LG	358	int ret, err, i, reg;
d8e3bb73	359
f0fba2ad	360	dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
64089b84	361
d8e3bb73	362	/* Reset the codec to power on defaults */
f0fba2ad	363	aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
d8e3bb73 GL	364
d8e3bb73 GL	365	/* Power up CODEC */
f0fba2ad	366	aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
d8e3bb73 GL	367
d8e3bb73 GL	368	/* Audio Control 3 (master mode, fsref rate) */
f0fba2ad	369	reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
d8e3bb73 GL	370	reg &= ~0xf800;
d8e3bb73 GL	371	reg \|= 0x0800; /* set master mode */
f0fba2ad	372	aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
d8e3bb73 GL	373
	374	/* Fill register cache */
	375	for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
f0fba2ad	376	aic26_reg_read(codec, i);
d8e3bb73 GL	377
	378	/* Register the sysfs files for debugging */
	379	/* Create SysFS files */
f0fba2ad	380	ret = device_create_file(codec->dev, &dev_attr_keyclick);
64089b84	381	if (ret)
f0fba2ad	382	dev_info(codec->dev, "error creating sysfs files\n");
d8e3bb73	383
f0fba2ad LG	384	/* register controls */
	385	dev_dbg(codec->dev, "Registering controls\n");
	386	err = snd_soc_add_controls(codec, aic26_snd_controls,
	387	ARRAY_SIZE(aic26_snd_controls));
	388	WARN_ON(err < 0);
d8e3bb73	389
d8e3bb73 GL	390	return 0;
	391	}
	392
f0fba2ad LG	393	static struct snd_soc_codec_driver aic26_soc_codec_dev = {
	394	.probe = aic26_probe,
	395	.read = aic26_reg_read,
	396	.write = aic26_reg_write,
	397	.reg_cache_size = AIC26_NUM_REGS,
	398	.reg_word_size = sizeof(u16),
	399	};
	400
	401	/* ---------------------------------------------------------------------
	402	* SPI device portion of driver: probe and release routines and SPI
	403	* driver registration.
	404	*/
	405	static int aic26_spi_probe(struct spi_device *spi)
d8e3bb73	406	{
f0fba2ad LG	407	struct aic26 *aic26;
f0fba2ad LG	408	int ret;
d8e3bb73	409
f0fba2ad LG	410	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
	411
	412	/* Allocate driver data */
	413	aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
	414	if (!aic26)
	415	return -ENOMEM;
d8e3bb73	416
f0fba2ad LG	417	/* Initialize the driver data */
	418	aic26->spi = spi;
	419	dev_set_drvdata(&spi->dev, aic26);
	420	aic26->master = 1;
	421
	422	ret = snd_soc_register_codec(&spi->dev,
	423	&aic26_soc_codec_dev, &aic26_dai, 1);
	424	if (ret < 0)
	425	kfree(aic26);
	426	return ret;
	427
	428	dev_dbg(&spi->dev, "SPI device initialized\n");
	429	return 0;
	430	}
	431
	432	static int aic26_spi_remove(struct spi_device *spi)
	433	{
	434	snd_soc_unregister_codec(&spi->dev);
	435	kfree(spi_get_drvdata(spi));
d8e3bb73 GL	436	return 0;
	437	}
	438
	439	static struct spi_driver aic26_spi = {
	440	.driver = {
f0fba2ad	441	.name = "tlv320aic26-codec",
d8e3bb73 GL	442	.owner = THIS_MODULE,
	443	},
	444	.probe = aic26_spi_probe,
	445	.remove = aic26_spi_remove,
	446	};
	447
	448	static int __init aic26_init(void)
	449	{
	450	return spi_register_driver(&aic26_spi);
	451	}
	452	module_init(aic26_init);
	453
	454	static void __exit aic26_exit(void)
	455	{
	456	spi_unregister_driver(&aic26_spi);
	457	}
	458	module_exit(aic26_exit);