projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: twl6040: Fix PCM error handling ops
[deliverable/linux.git] / sound / soc / codecs / twl6040.c
CommitLineData
8ecbabd9
MLC		 1/*
2 * ALSA SoC TWL6040 codec driver
3 *
4 * Author: Misael Lopez Cruz <x0052729@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/gpio.h>
29#include <linux/platform_device.h>
68b40cc4 30#include <linux/slab.h>
8ecbabd9
MLC		 31#include <linux/i2c/twl.h>
32
33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/pcm_params.h>
36#include <sound/soc.h>
8ecbabd9
MLC		 37#include <sound/initval.h>
38#include <sound/tlv.h>
39
40#include "twl6040.h"
41
42#define TWL6040_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
43#define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
44
a2d2362e
JEC		 45struct twl6040_jack_data {
46 struct snd_soc_jack *jack;
47 int report;
48};
49
8ecbabd9
MLC		 50/* codec private data */
51struct twl6040_data {
8ecbabd9
MLC		 52 int audpwron;
53 int naudint;
54 int codec_powered;
55 int pll;
56 int non_lp;
57 unsigned int sysclk;
58 struct snd_pcm_hw_constraint_list *sysclk_constraints;
59 struct completion ready;
a2d2362e
JEC		 60 struct twl6040_jack_data hs_jack;
61 struct snd_soc_codec *codec;
62 struct workqueue_struct *workqueue;
63 struct delayed_work delayed_work;
64 struct mutex mutex;
8ecbabd9
MLC		 65};
66
67/*
68 * twl6040 register cache & default register settings
69 */
70static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
71 0x00, /* not used 0x00 */
72 0x4B, /* TWL6040_ASICID (ro) 0x01 */
73 0x00, /* TWL6040_ASICREV (ro) 0x02 */
74 0x00, /* TWL6040_INTID 0x03 */
75 0x00, /* TWL6040_INTMR 0x04 */
76 0x00, /* TWL6040_NCPCTRL 0x05 */
77 0x00, /* TWL6040_LDOCTL 0x06 */
78 0x60, /* TWL6040_HPPLLCTL 0x07 */
79 0x00, /* TWL6040_LPPLLCTL 0x08 */
80 0x4A, /* TWL6040_LPPLLDIV 0x09 */
81 0x00, /* TWL6040_AMICBCTL 0x0A */
82 0x00, /* TWL6040_DMICBCTL 0x0B */
83 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
84 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
85 0x00, /* TWL6040_MICGAIN 0x0E */
86 0x1B, /* TWL6040_LINEGAIN 0x0F */
87 0x00, /* TWL6040_HSLCTL 0x10 */
88 0x00, /* TWL6040_HSRCTL 0x11 */
89 0x00, /* TWL6040_HSGAIN 0x12 */
90 0x00, /* TWL6040_EARCTL 0x13 */
91 0x00, /* TWL6040_HFLCTL 0x14 */
92 0x00, /* TWL6040_HFLGAIN 0x15 */
93 0x00, /* TWL6040_HFRCTL 0x16 */
94 0x00, /* TWL6040_HFRGAIN 0x17 */
95 0x00, /* TWL6040_VIBCTLL 0x18 */
96 0x00, /* TWL6040_VIBDATL 0x19 */
97 0x00, /* TWL6040_VIBCTLR 0x1A */
98 0x00, /* TWL6040_VIBDATR 0x1B */
99 0x00, /* TWL6040_HKCTL1 0x1C */
100 0x00, /* TWL6040_HKCTL2 0x1D */
101 0x00, /* TWL6040_GPOCTL 0x1E */
102 0x00, /* TWL6040_ALB 0x1F */
103 0x00, /* TWL6040_DLB 0x20 */
104 0x00, /* not used 0x21 */
105 0x00, /* not used 0x22 */
106 0x00, /* not used 0x23 */
107 0x00, /* not used 0x24 */
108 0x00, /* not used 0x25 */
109 0x00, /* not used 0x26 */
110 0x00, /* not used 0x27 */
111 0x00, /* TWL6040_TRIM1 0x28 */
112 0x00, /* TWL6040_TRIM2 0x29 */
113 0x00, /* TWL6040_TRIM3 0x2A */
114 0x00, /* TWL6040_HSOTRIM 0x2B */
115 0x00, /* TWL6040_HFOTRIM 0x2C */
116 0x09, /* TWL6040_ACCCTL 0x2D */
117 0x00, /* TWL6040_STATUS (ro) 0x2E */
118};
119
120/*
121 * twl6040 vio/gnd registers:
122 * registers under vio/gnd supply can be accessed
123 * before the power-up sequence, after NRESPWRON goes high
124 */
125static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
126 TWL6040_REG_ASICID,
127 TWL6040_REG_ASICREV,
128 TWL6040_REG_INTID,
129 TWL6040_REG_INTMR,
130 TWL6040_REG_NCPCTL,
131 TWL6040_REG_LDOCTL,
132 TWL6040_REG_AMICBCTL,
133 TWL6040_REG_DMICBCTL,
134 TWL6040_REG_HKCTL1,
135 TWL6040_REG_HKCTL2,
136 TWL6040_REG_GPOCTL,
137 TWL6040_REG_TRIM1,
138 TWL6040_REG_TRIM2,
139 TWL6040_REG_TRIM3,
140 TWL6040_REG_HSOTRIM,
141 TWL6040_REG_HFOTRIM,
142 TWL6040_REG_ACCCTL,
143 TWL6040_REG_STATUS,
144};
145
146/*
147 * twl6040 vdd/vss registers:
148 * registers under vdd/vss supplies can only be accessed
149 * after the power-up sequence
150 */
151static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
152 TWL6040_REG_HPPLLCTL,
153 TWL6040_REG_LPPLLCTL,
154 TWL6040_REG_LPPLLDIV,
155 TWL6040_REG_MICLCTL,
156 TWL6040_REG_MICRCTL,
157 TWL6040_REG_MICGAIN,
158 TWL6040_REG_LINEGAIN,
159 TWL6040_REG_HSLCTL,
160 TWL6040_REG_HSRCTL,
161 TWL6040_REG_HSGAIN,
162 TWL6040_REG_EARCTL,
163 TWL6040_REG_HFLCTL,
164 TWL6040_REG_HFLGAIN,
165 TWL6040_REG_HFRCTL,
166 TWL6040_REG_HFRGAIN,
167 TWL6040_REG_VIBCTLL,
168 TWL6040_REG_VIBDATL,
169 TWL6040_REG_VIBCTLR,
170 TWL6040_REG_VIBDATR,
171 TWL6040_REG_ALB,
172 TWL6040_REG_DLB,
173};
174
175/*
176 * read twl6040 register cache
177 */
178static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
179 unsigned int reg)
180{
181 u8 *cache = codec->reg_cache;
182
183 if (reg >= TWL6040_CACHEREGNUM)
184 return -EIO;
185
186 return cache[reg];
187}
188
189/*
190 * write twl6040 register cache
191 */
192static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
193 u8 reg, u8 value)
194{
195 u8 *cache = codec->reg_cache;
196
197 if (reg >= TWL6040_CACHEREGNUM)
198 return;
199 cache[reg] = value;
200}
201
202/*
203 * read from twl6040 hardware register
204 */
205static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
206 unsigned int reg)
207{
208 u8 value;
209
210 if (reg >= TWL6040_CACHEREGNUM)
211 return -EIO;
212
0dec1ec7 213 twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &value, reg);
8ecbabd9
MLC		 214 twl6040_write_reg_cache(codec, reg, value);
215
216 return value;
217}
218
219/*
220 * write to the twl6040 register space
221 */
222static int twl6040_write(struct snd_soc_codec *codec,
223 unsigned int reg, unsigned int value)
224{
225 if (reg >= TWL6040_CACHEREGNUM)
226 return -EIO;
227
228 twl6040_write_reg_cache(codec, reg, value);
0dec1ec7 229 return twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, value, reg);
8ecbabd9
MLC		 230}
231
232static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
233{
234 u8 *cache = codec->reg_cache;
235 int reg, i;
236
237 /* allow registers to be accessed by i2c */
238 twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]);
239
240 for (i = 0; i < TWL6040_VIOREGNUM; i++) {
241 reg = twl6040_vio_reg[i];
242 /* skip read-only registers (ASICID, ASICREV, STATUS) */
243 switch (reg) {
244 case TWL6040_REG_ASICID:
245 case TWL6040_REG_ASICREV:
246 case TWL6040_REG_STATUS:
247 continue;
248 default:
249 break;
250 }
251 twl6040_write(codec, reg, cache[reg]);
252 }
253}
254
255static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
256{
257 u8 *cache = codec->reg_cache;
258 int reg, i;
259
260 for (i = 0; i < TWL6040_VDDREGNUM; i++) {
261 reg = twl6040_vdd_reg[i];
262 twl6040_write(codec, reg, cache[reg]);
263 }
264}
265
266/* twl6040 codec manual power-up sequence */
267static void twl6040_power_up(struct snd_soc_codec *codec)
268{
269 u8 ncpctl, ldoctl, lppllctl, accctl;
270
271 ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
272 ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
273 lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
274 accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
275
276 /* enable reference system */
277 ldoctl |= TWL6040_REFENA;
278 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
279 msleep(10);
280 /* enable internal oscillator */
281 ldoctl |= TWL6040_OSCENA;
282 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
283 udelay(10);
284 /* enable high-side ldo */
285 ldoctl |= TWL6040_HSLDOENA;
286 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
287 udelay(244);
288 /* enable negative charge pump */
289 ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN;
290 twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
291 udelay(488);
292 /* enable low-side ldo */
293 ldoctl |= TWL6040_LSLDOENA;
294 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
295 udelay(244);
296 /* enable low-power pll */
297 lppllctl |= TWL6040_LPLLENA;
298 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
299 /* reset state machine */
300 accctl |= TWL6040_RESETSPLIT;
301 twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
302 mdelay(5);
303 accctl &= ~TWL6040_RESETSPLIT;
304 twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
305 /* disable internal oscillator */
306 ldoctl &= ~TWL6040_OSCENA;
307 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
308}
309
310/* twl6040 codec manual power-down sequence */
311static void twl6040_power_down(struct snd_soc_codec *codec)
312{
313 u8 ncpctl, ldoctl, lppllctl, accctl;
314
315 ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
316 ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
317 lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
318 accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
319
320 /* enable internal oscillator */
321 ldoctl |= TWL6040_OSCENA;
322 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
323 udelay(10);
324 /* disable low-power pll */
325 lppllctl &= ~TWL6040_LPLLENA;
326 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
327 /* disable low-side ldo */
328 ldoctl &= ~TWL6040_LSLDOENA;
329 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
330 udelay(244);
331 /* disable negative charge pump */
332 ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN);
333 twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
334 udelay(488);
335 /* disable high-side ldo */
336 ldoctl &= ~TWL6040_HSLDOENA;
337 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
338 udelay(244);
339 /* disable internal oscillator */
340 ldoctl &= ~TWL6040_OSCENA;
341 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
342 /* disable reference system */
343 ldoctl &= ~TWL6040_REFENA;
344 twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
345 msleep(10);
346}
347
348/* set headset dac and driver power mode */
349static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
350{
351 int hslctl, hsrctl;
352 int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
353
354 hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
355 hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
356
357 if (high_perf) {
358 hslctl &= ~mask;
359 hsrctl &= ~mask;
360 } else {
361 hslctl |= mask;
362 hsrctl |= mask;
363 }
364
365 twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
366 twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
367
368 return 0;
369}
370
0fad4ed7
JEC		 371static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
372 struct snd_kcontrol *kcontrol, int event)
373{
374 msleep(1);
375 return 0;
376}
377
8ecbabd9
MLC		 378static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
379 struct snd_kcontrol *kcontrol, int event)
380{
381 struct snd_soc_codec *codec = w->codec;
d4a8ca24 382 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 383
384 if (SND_SOC_DAPM_EVENT_ON(event))
385 priv->non_lp++;
386 else
387 priv->non_lp--;
388
0fad4ed7
JEC		 389 msleep(1);
390
8ecbabd9
MLC		 391 return 0;
392}
393
a2d2362e
JEC		 394void twl6040_hs_jack_report(struct snd_soc_codec *codec,
395 struct snd_soc_jack *jack, int report)
396{
397 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
398 int status;
399
400 mutex_lock(&priv->mutex);
401
402 /* Sync status */
403 status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
404 if (status & TWL6040_PLUGCOMP)
405 snd_soc_jack_report(jack, report, report);
406 else
407 snd_soc_jack_report(jack, 0, report);
408
409 mutex_unlock(&priv->mutex);
410}
411
412void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
413 struct snd_soc_jack *jack, int report)
414{
415 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
416 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
417
418 hs_jack->jack = jack;
419 hs_jack->report = report;
420
421 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
422}
423EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
424
425static void twl6040_accessory_work(struct work_struct *work)
426{
427 struct twl6040_data *priv = container_of(work,
428 struct twl6040_data, delayed_work.work);
429 struct snd_soc_codec *codec = priv->codec;
430 struct twl6040_jack_data *hs_jack = &priv->hs_jack;
431
432 twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
433}
434
8ecbabd9
MLC		 435/* audio interrupt handler */
436static irqreturn_t twl6040_naudint_handler(int irq, void *data)
437{
438 struct snd_soc_codec *codec = data;
d4a8ca24 439 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 440 u8 intid;
441
0dec1ec7 442 twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID);
8ecbabd9 443
cf370a5a 444 if (intid & TWL6040_THINT)
8ecbabd9 445 dev_alert(codec->dev, "die temp over-limit detection\n");
cf370a5a
OM		 446
447 if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
a2d2362e
JEC		 448 queue_delayed_work(priv->workqueue, &priv->delayed_work,
449 msecs_to_jiffies(200));
cf370a5a
OM		 450
451 if (intid & TWL6040_HOOKINT)
452 dev_info(codec->dev, "hook detection\n");
453
454 if (intid & TWL6040_HFINT)
8ecbabd9 455 dev_alert(codec->dev, "hf drivers over current detection\n");
cf370a5a
OM		 456
457 if (intid & TWL6040_VIBINT)
8ecbabd9 458 dev_alert(codec->dev, "vib drivers over current detection\n");
cf370a5a
OM		 459
460 if (intid & TWL6040_READYINT)
8ecbabd9 461 complete(&priv->ready);
8ecbabd9
MLC		 462
463 return IRQ_HANDLED;
464}
465
466/*
467 * MICATT volume control:
468 * from -6 to 0 dB in 6 dB steps
469 */
470static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
471
472/*
473 * MICGAIN volume control:
474 * from 6 to 30 dB in 6 dB steps
475 */
476static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
477
370a0314
JEC		 478/*
479 * AFMGAIN volume control:
480 * from 18 to 24 dB in 6 dB steps
481 */
482static DECLARE_TLV_DB_SCALE(afm_amp_tlv, 1800, 600, 0);
483
8ecbabd9
MLC		 484/*
485 * HSGAIN volume control:
486 * from -30 to 0 dB in 2 dB steps
487 */
488static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
489
490/*
491 * HFGAIN volume control:
492 * from -52 to 6 dB in 2 dB steps
493 */
494static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
495
871a05a7
JEC		 496/*
497 * EPGAIN volume control:
498 * from -24 to 6 dB in 2 dB steps
499 */
500static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
501
8ecbabd9
MLC		 502/* Left analog microphone selection */
503static const char *twl6040_amicl_texts[] =
504 {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
505
506/* Right analog microphone selection */
507static const char *twl6040_amicr_texts[] =
508 {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
509
510static const struct soc_enum twl6040_enum[] = {
511 SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 3, twl6040_amicl_texts),
512 SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 3, twl6040_amicr_texts),
513};
514
370a0314
JEC		 515static const char *twl6040_hs_texts[] = {
516 "Off", "HS DAC", "Line-In amp"
517};
518
519static const struct soc_enum twl6040_hs_enum[] = {
520 SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
521 twl6040_hs_texts),
522 SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
523 twl6040_hs_texts),
524};
525
526static const char *twl6040_hf_texts[] = {
527 "Off", "HF DAC", "Line-In amp"
528};
529
530static const struct soc_enum twl6040_hf_enum[] = {
531 SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
532 twl6040_hf_texts),
533 SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
534 twl6040_hf_texts),
535};
536
8ecbabd9
MLC		 537static const struct snd_kcontrol_new amicl_control =
538 SOC_DAPM_ENUM("Route", twl6040_enum[0]);
539
540static const struct snd_kcontrol_new amicr_control =
541 SOC_DAPM_ENUM("Route", twl6040_enum[1]);
542
543/* Headset DAC playback switches */
370a0314
JEC		 544static const struct snd_kcontrol_new hsl_mux_controls =
545 SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
8ecbabd9 546
370a0314
JEC		 547static const struct snd_kcontrol_new hsr_mux_controls =
548 SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
8ecbabd9
MLC		 549
550/* Handsfree DAC playback switches */
370a0314
JEC		 551static const struct snd_kcontrol_new hfl_mux_controls =
552 SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
8ecbabd9 553
370a0314
JEC		 554static const struct snd_kcontrol_new hfr_mux_controls =
555 SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
8ecbabd9 556
871a05a7
JEC		 557static const struct snd_kcontrol_new ep_driver_switch_controls =
558 SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
559
8ecbabd9
MLC		 560static const struct snd_kcontrol_new twl6040_snd_controls[] = {
561 /* Capture gains */
562 SOC_DOUBLE_TLV("Capture Preamplifier Volume",
563 TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
564 SOC_DOUBLE_TLV("Capture Volume",
565 TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
566
370a0314
JEC		 567 /* AFM gains */
568 SOC_DOUBLE_TLV("Aux FM Volume",
569 TWL6040_REG_LINEGAIN, 0, 5, 0xF, 0, afm_amp_tlv),
570
8ecbabd9
MLC		 571 /* Playback gains */
572 SOC_DOUBLE_TLV("Headset Playback Volume",
573 TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
574 SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
575 TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
871a05a7
JEC		 576 SOC_SINGLE_TLV("Earphone Playback Volume",
577 TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
8ecbabd9
MLC		 578};
579
580static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
581 /* Inputs */
582 SND_SOC_DAPM_INPUT("MAINMIC"),
583 SND_SOC_DAPM_INPUT("HSMIC"),
584 SND_SOC_DAPM_INPUT("SUBMIC"),
585 SND_SOC_DAPM_INPUT("AFML"),
586 SND_SOC_DAPM_INPUT("AFMR"),
587
588 /* Outputs */
589 SND_SOC_DAPM_OUTPUT("HSOL"),
590 SND_SOC_DAPM_OUTPUT("HSOR"),
591 SND_SOC_DAPM_OUTPUT("HFL"),
592 SND_SOC_DAPM_OUTPUT("HFR"),
871a05a7 593 SND_SOC_DAPM_OUTPUT("EP"),
8ecbabd9
MLC		 594
595 /* Analog input muxes for the capture amplifiers */
596 SND_SOC_DAPM_MUX("Analog Left Capture Route",
597 SND_SOC_NOPM, 0, 0, &amicl_control),
598 SND_SOC_DAPM_MUX("Analog Right Capture Route",
599 SND_SOC_NOPM, 0, 0, &amicr_control),
600
601 /* Analog capture PGAs */
602 SND_SOC_DAPM_PGA("MicAmpL",
603 TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
604 SND_SOC_DAPM_PGA("MicAmpR",
605 TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
606
370a0314
JEC		 607 /* Auxiliary FM PGAs */
608 SND_SOC_DAPM_PGA("AFMAmpL",
609 TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
610 SND_SOC_DAPM_PGA("AFMAmpR",
611 TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
612
8ecbabd9
MLC		 613 /* ADCs */
614 SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
615 TWL6040_REG_MICLCTL, 2, 0),
616 SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
617 TWL6040_REG_MICRCTL, 2, 0),
618
619 /* Microphone bias */
620 SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
621 TWL6040_REG_AMICBCTL, 0, 0),
622 SND_SOC_DAPM_MICBIAS("Main Mic Bias",
623 TWL6040_REG_AMICBCTL, 4, 0),
624 SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
625 TWL6040_REG_DMICBCTL, 0, 0),
626 SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
627 TWL6040_REG_DMICBCTL, 4, 0),
628
629 /* DACs */
0fad4ed7
JEC		 630 SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
631 TWL6040_REG_HSLCTL, 0, 0,
632 twl6040_hs_dac_event,
633 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
634 SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
635 TWL6040_REG_HSRCTL, 0, 0,
636 twl6040_hs_dac_event,
637 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 638 SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
639 TWL6040_REG_HFLCTL, 0, 0,
640 twl6040_power_mode_event,
641 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
642 SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
643 TWL6040_REG_HFRCTL, 0, 0,
644 twl6040_power_mode_event,
645 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
646
370a0314
JEC		 647 SND_SOC_DAPM_MUX("HF Left Playback",
648 SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
649 SND_SOC_DAPM_MUX("HF Right Playback",
650 SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
651 /* Analog playback Muxes */
652 SND_SOC_DAPM_MUX("HS Left Playback",
653 SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
654 SND_SOC_DAPM_MUX("HS Right Playback",
655 SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
8ecbabd9 656
0fad4ed7
JEC		 657 /* Analog playback drivers */
658 SND_SOC_DAPM_PGA_E("Handsfree Left Driver",
659 TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
8ecbabd9
MLC		 660 twl6040_power_mode_event,
661 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0fad4ed7
JEC		 662 SND_SOC_DAPM_PGA_E("Handsfree Right Driver",
663 TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
8ecbabd9
MLC		 664 twl6040_power_mode_event,
665 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
0fad4ed7
JEC		 666 SND_SOC_DAPM_PGA("Headset Left Driver",
667 TWL6040_REG_HSLCTL, 2, 0, NULL, 0),
668 SND_SOC_DAPM_PGA("Headset Right Driver",
669 TWL6040_REG_HSRCTL, 2, 0, NULL, 0),
871a05a7
JEC		 670 SND_SOC_DAPM_SWITCH_E("Earphone Driver",
671 SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
672 twl6040_power_mode_event,
673 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
8ecbabd9
MLC		 674
675 /* Analog playback PGAs */
676 SND_SOC_DAPM_PGA("HFDAC Left PGA",
677 TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
678 SND_SOC_DAPM_PGA("HFDAC Right PGA",
679 TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
680
681};
682
683static const struct snd_soc_dapm_route intercon[] = {
684 /* Capture path */
685 {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
686 {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
687 {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
688
689 {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
690 {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
691 {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
692
693 {"MicAmpL", NULL, "Analog Left Capture Route"},
694 {"MicAmpR", NULL, "Analog Right Capture Route"},
695
696 {"ADC Left", NULL, "MicAmpL"},
697 {"ADC Right", NULL, "MicAmpR"},
698
370a0314
JEC		 699 /* AFM path */
700 {"AFMAmpL", "NULL", "AFML"},
701 {"AFMAmpR", "NULL", "AFMR"},
702
703 {"HS Left Playback", "HS DAC", "HSDAC Left"},
704 {"HS Left Playback", "Line-In amp", "AFMAmpL"},
8ecbabd9 705
370a0314
JEC		 706 {"HS Right Playback", "HS DAC", "HSDAC Right"},
707 {"HS Right Playback", "Line-In amp", "AFMAmpR"},
708
709 {"Headset Left Driver", "NULL", "HS Left Playback"},
710 {"Headset Right Driver", "NULL", "HS Right Playback"},
8ecbabd9
MLC		 711
712 {"HSOL", NULL, "Headset Left Driver"},
713 {"HSOR", NULL, "Headset Right Driver"},
714
871a05a7
JEC		 715 /* Earphone playback path */
716 {"Earphone Driver", "Switch", "HSDAC Left"},
717 {"EP", NULL, "Earphone Driver"},
718
370a0314
JEC		 719 {"HF Left Playback", "HF DAC", "HFDAC Left"},
720 {"HF Left Playback", "Line-In amp", "AFMAmpL"},
721
722 {"HF Right Playback", "HF DAC", "HFDAC Right"},
723 {"HF Right Playback", "Line-In amp", "AFMAmpR"},
8ecbabd9 724
370a0314
JEC		 725 {"HFDAC Left PGA", NULL, "HF Left Playback"},
726 {"HFDAC Right PGA", NULL, "HF Right Playback"},
8ecbabd9
MLC		 727
728 {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
729 {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
730
731 {"HFL", NULL, "Handsfree Left Driver"},
732 {"HFR", NULL, "Handsfree Right Driver"},
733};
734
735static int twl6040_add_widgets(struct snd_soc_codec *codec)
736{
ce6120cc 737 struct snd_soc_dapm_context *dapm = &codec->dapm;
8ecbabd9 738
ce6120cc
LG		 739 snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
740 ARRAY_SIZE(twl6040_dapm_widgets));
741 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
742 snd_soc_dapm_new_widgets(dapm);
8ecbabd9
MLC		 743
744 return 0;
745}
746
747static int twl6040_power_up_completion(struct snd_soc_codec *codec,
748 int naudint)
749{
d4a8ca24 750 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 751 int time_left;
752 u8 intid;
753
754 time_left = wait_for_completion_timeout(&priv->ready,
755 msecs_to_jiffies(48));
756
757 if (!time_left) {
0dec1ec7 758 twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid,
8ecbabd9
MLC		 759 TWL6040_REG_INTID);
760 if (!(intid & TWL6040_READYINT)) {
761 dev_err(codec->dev, "timeout waiting for READYINT\n");
762 return -ETIMEDOUT;
763 }
764 }
765
766 priv->codec_powered = 1;
767
768 return 0;
769}
770
771static int twl6040_set_bias_level(struct snd_soc_codec *codec,
772 enum snd_soc_bias_level level)
773{
d4a8ca24 774 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 775 int audpwron = priv->audpwron;
776 int naudint = priv->naudint;
777 int ret;
778
779 switch (level) {
780 case SND_SOC_BIAS_ON:
781 break;
782 case SND_SOC_BIAS_PREPARE:
783 break;
784 case SND_SOC_BIAS_STANDBY:
785 if (priv->codec_powered)
786 break;
787
788 if (gpio_is_valid(audpwron)) {
789 /* use AUDPWRON line */
790 gpio_set_value(audpwron, 1);
791
792 /* wait for power-up completion */
793 ret = twl6040_power_up_completion(codec, naudint);
794 if (ret)
795 return ret;
796
797 /* sync registers updated during power-up sequence */
798 twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
799 twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
800 twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL);
801 } else {
802 /* use manual power-up sequence */
803 twl6040_power_up(codec);
804 priv->codec_powered = 1;
805 }
806
807 /* initialize vdd/vss registers with reg_cache */
808 twl6040_init_vdd_regs(codec);
809 break;
810 case SND_SOC_BIAS_OFF:
811 if (!priv->codec_powered)
812 break;
813
814 if (gpio_is_valid(audpwron)) {
815 /* use AUDPWRON line */
816 gpio_set_value(audpwron, 0);
817
818 /* power-down sequence latency */
819 udelay(500);
820
821 /* sync registers updated during power-down sequence */
822 twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
823 twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
824 twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL,
825 0x00);
826 } else {
827 /* use manual power-down sequence */
828 twl6040_power_down(codec);
829 }
830
831 priv->codec_powered = 0;
832 break;
833 }
834
ce6120cc 835 codec->dapm.bias_level = level;
8ecbabd9
MLC		 836
837 return 0;
838}
839
840/* set of rates for each pll: low-power and high-performance */
841
842static unsigned int lp_rates[] = {
843 88200,
844 96000,
845};
846
847static struct snd_pcm_hw_constraint_list lp_constraints = {
848 .count = ARRAY_SIZE(lp_rates),
849 .list = lp_rates,
850};
851
852static unsigned int hp_rates[] = {
853 96000,
854};
855
856static struct snd_pcm_hw_constraint_list hp_constraints = {
857 .count = ARRAY_SIZE(hp_rates),
858 .list = hp_rates,
859};
860
861static int twl6040_startup(struct snd_pcm_substream *substream,
862 struct snd_soc_dai *dai)
863{
864 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 865 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 866 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 867
8ecbabd9
MLC		 868 snd_pcm_hw_constraint_list(substream->runtime, 0,
869 SNDRV_PCM_HW_PARAM_RATE,
870 priv->sysclk_constraints);
871
872 return 0;
873}
874
875static int twl6040_hw_params(struct snd_pcm_substream *substream,
876 struct snd_pcm_hw_params *params,
877 struct snd_soc_dai *dai)
878{
879 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 880 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 881 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 882 u8 lppllctl;
883 int rate;
884
885 /* nothing to do for high-perf pll, it supports only 48 kHz */
886 if (priv->pll == TWL6040_HPPLL_ID)
887 return 0;
888
889 lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
890
891 rate = params_rate(params);
892 switch (rate) {
893 case 88200:
894 lppllctl |= TWL6040_LPLLFIN;
895 priv->sysclk = 17640000;
896 break;
897 case 96000:
898 lppllctl &= ~TWL6040_LPLLFIN;
899 priv->sysclk = 19200000;
900 break;
901 default:
902 dev_err(codec->dev, "unsupported rate %d\n", rate);
903 return -EINVAL;
904 }
905
906 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
907
908 return 0;
909}
910
4e624d06
OM		 911static int twl6040_prepare(struct snd_pcm_substream *substream,
912 struct snd_soc_dai *dai)
8ecbabd9
MLC		 913{
914 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 915 struct snd_soc_codec *codec = rtd->codec;
d4a8ca24 916 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9 917
4e624d06
OM		 918 if (!priv->sysclk) {
919 dev_err(codec->dev,
920 "no mclk configured, call set_sysclk() on init\n");
921 return -EINVAL;
922 }
923
924 /*
925 * capture is not supported at 17.64 MHz,
926 * it's reserved for headset low-power playback scenario
927 */
928 if ((priv->sysclk == 17640000) &&
929 substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
930 dev_err(codec->dev,
931 "capture mode is not supported at %dHz\n",
932 priv->sysclk);
933 return -EINVAL;
934 }
935
936 if ((priv->sysclk == 17640000) && priv->non_lp) {
8ecbabd9
MLC		 937 dev_err(codec->dev,
938 "some enabled paths aren't supported at %dHz\n",
939 priv->sysclk);
940 return -EPERM;
8ecbabd9 941 }
8ecbabd9
MLC		 942 return 0;
943}
944
945static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
946 int clk_id, unsigned int freq, int dir)
947{
948 struct snd_soc_codec *codec = codec_dai->codec;
d4a8ca24 949 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 950 u8 hppllctl, lppllctl;
951
952 hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL);
953 lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
954
955 switch (clk_id) {
956 case TWL6040_SYSCLK_SEL_LPPLL:
957 switch (freq) {
958 case 32768:
959 /* headset dac and driver must be in low-power mode */
960 headset_power_mode(codec, 0);
961
962 /* clk32k input requires low-power pll */
963 lppllctl |= TWL6040_LPLLENA;
964 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
965 mdelay(5);
966 lppllctl &= ~TWL6040_HPLLSEL;
967 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
968 hppllctl &= ~TWL6040_HPLLENA;
969 twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
970 break;
971 default:
972 dev_err(codec->dev, "unknown mclk freq %d\n", freq);
973 return -EINVAL;
974 }
975
976 /* lppll divider */
977 switch (priv->sysclk) {
978 case 17640000:
979 lppllctl |= TWL6040_LPLLFIN;
980 break;
981 case 19200000:
982 lppllctl &= ~TWL6040_LPLLFIN;
983 break;
984 default:
985 /* sysclk not yet configured */
986 lppllctl &= ~TWL6040_LPLLFIN;
987 priv->sysclk = 19200000;
988 break;
989 }
990
991 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
992
993 priv->pll = TWL6040_LPPLL_ID;
994 priv->sysclk_constraints = &lp_constraints;
995 break;
996 case TWL6040_SYSCLK_SEL_HPPLL:
997 hppllctl &= ~TWL6040_MCLK_MSK;
998
999 switch (freq) {
1000 case 12000000:
1001 /* mclk input, pll enabled */
1002 hppllctl |= TWL6040_MCLK_12000KHZ |
1003 TWL6040_HPLLSQRBP |
1004 TWL6040_HPLLENA;
1005 break;
1006 case 19200000:
1007 /* mclk input, pll disabled */
1008 hppllctl |= TWL6040_MCLK_19200KHZ |
44ebaa5d 1009 TWL6040_HPLLSQRENA |
8ecbabd9
MLC		 1010 TWL6040_HPLLBP;
1011 break;
1012 case 26000000:
1013 /* mclk input, pll enabled */
1014 hppllctl |= TWL6040_MCLK_26000KHZ |
1015 TWL6040_HPLLSQRBP |
1016 TWL6040_HPLLENA;
1017 break;
1018 case 38400000:
1019 /* clk slicer, pll disabled */
1020 hppllctl |= TWL6040_MCLK_38400KHZ |
1021 TWL6040_HPLLSQRENA |
1022 TWL6040_HPLLBP;
1023 break;
1024 default:
1025 dev_err(codec->dev, "unknown mclk freq %d\n", freq);
1026 return -EINVAL;
1027 }
1028
1029 /* headset dac and driver must be in high-performance mode */
1030 headset_power_mode(codec, 1);
1031
1032 twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
1033 udelay(500);
1034 lppllctl |= TWL6040_HPLLSEL;
1035 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
1036 lppllctl &= ~TWL6040_LPLLENA;
1037 twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
1038
1039 /* high-performance pll can provide only 19.2 MHz */
1040 priv->pll = TWL6040_HPPLL_ID;
1041 priv->sysclk = 19200000;
1042 priv->sysclk_constraints = &hp_constraints;
1043 break;
1044 default:
1045 dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
1046 return -EINVAL;
1047 }
1048
1049 return 0;
1050}
1051
1052static struct snd_soc_dai_ops twl6040_dai_ops = {
1053 .startup = twl6040_startup,
1054 .hw_params = twl6040_hw_params,
4e624d06 1055 .prepare = twl6040_prepare,
8ecbabd9
MLC		 1056 .set_sysclk = twl6040_set_dai_sysclk,
1057};
1058
f0fba2ad
LG		 1059static struct snd_soc_dai_driver twl6040_dai = {
1060 .name = "twl6040-hifi",
8ecbabd9
MLC		 1061 .playback = {
1062 .stream_name = "Playback",
1063 .channels_min = 1,
1064 .channels_max = 4,
1065 .rates = TWL6040_RATES,
1066 .formats = TWL6040_FORMATS,
1067 },
1068 .capture = {
1069 .stream_name = "Capture",
1070 .channels_min = 1,
1071 .channels_max = 2,
1072 .rates = TWL6040_RATES,
1073 .formats = TWL6040_FORMATS,
1074 },
1075 .ops = &twl6040_dai_ops,
1076};
8ecbabd9
MLC		 1077
1078#ifdef CONFIG_PM
f0fba2ad 1079static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
8ecbabd9 1080{
8ecbabd9
MLC		 1081 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1082
1083 return 0;
1084}
1085
f0fba2ad 1086static int twl6040_resume(struct snd_soc_codec *codec)
8ecbabd9 1087{
8ecbabd9 1088 twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
6c311041 1089 twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
8ecbabd9
MLC		 1090
1091 return 0;
1092}
1093#else
1094#define twl6040_suspend NULL
1095#define twl6040_resume NULL
1096#endif
1097
f0fba2ad 1098static int twl6040_probe(struct snd_soc_codec *codec)
8ecbabd9 1099{
f0fba2ad 1100 struct twl4030_codec_data *twl_codec = codec->dev->platform_data;
8ecbabd9
MLC		 1101 struct twl6040_data *priv;
1102 int audpwron, naudint;
1103 int ret = 0;
1104
1105 priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
1106 if (priv == NULL)
1107 return -ENOMEM;
f0fba2ad 1108 snd_soc_codec_set_drvdata(codec, priv);
8ecbabd9 1109
a2d2362e
JEC		 1110 priv->codec = codec;
1111
8ecbabd9
MLC		 1112 if (twl_codec) {
1113 audpwron = twl_codec->audpwron_gpio;
1114 naudint = twl_codec->naudint_irq;
1115 } else {
1116 audpwron = -EINVAL;
1117 naudint = 0;
1118 }
1119
1120 priv->audpwron = audpwron;
1121 priv->naudint = naudint;
a2d2362e
JEC		 1122 priv->workqueue = create_singlethread_workqueue("twl6040-codec");
1123
1124 if (!priv->workqueue)
1125 goto work_err;
1126
1127 INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
1128
1129 mutex_init(&priv->mutex);
8ecbabd9 1130
8ecbabd9
MLC		 1131 init_completion(&priv->ready);
1132
1133 if (gpio_is_valid(audpwron)) {
1134 ret = gpio_request(audpwron, "audpwron");
1135 if (ret)
1136 goto gpio1_err;
1137
1138 ret = gpio_direction_output(audpwron, 0);
1139 if (ret)
1140 goto gpio2_err;
1141
1142 priv->codec_powered = 0;
1143 }
1144
1145 if (naudint) {
1146 /* audio interrupt */
1147 ret = request_threaded_irq(naudint, NULL,
1148 twl6040_naudint_handler,
1149 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1150 "twl6040_codec", codec);
1151 if (ret)
1152 goto gpio2_err;
1153 } else {
1154 if (gpio_is_valid(audpwron)) {
1155 /* enable only codec ready interrupt */
1156 twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1157 ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
1158 } else {
1159 /* no interrupts at all */
1160 twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1161 TWL6040_ALLINT_MSK);
1162 }
1163 }
1164
1165 /* init vio registers */
1166 twl6040_init_vio_regs(codec);
1167
1168 /* power on device */
1169 ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1170 if (ret)
1171 goto irq_err;
1172
f0fba2ad
LG		 1173 snd_soc_add_controls(codec, twl6040_snd_controls,
1174 ARRAY_SIZE(twl6040_snd_controls));
1175 twl6040_add_widgets(codec);
8ecbabd9
MLC		 1176
1177 return 0;
1178
8ecbabd9
MLC		 1179irq_err:
1180 if (naudint)
1181 free_irq(naudint, codec);
1182gpio2_err:
1183 if (gpio_is_valid(audpwron))
1184 gpio_free(audpwron);
1185gpio1_err:
a2d2362e
JEC		 1186 destroy_workqueue(priv->workqueue);
1187work_err:
8ecbabd9
MLC		 1188 kfree(priv);
1189 return ret;
1190}
1191
f0fba2ad 1192static int twl6040_remove(struct snd_soc_codec *codec)
8ecbabd9 1193{
f0fba2ad 1194 struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
8ecbabd9
MLC		 1195 int audpwron = priv->audpwron;
1196 int naudint = priv->naudint;
1197
f0fba2ad
LG		 1198 twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
1199
8ecbabd9
MLC		 1200 if (gpio_is_valid(audpwron))
1201 gpio_free(audpwron);
1202
1203 if (naudint)
f0fba2ad 1204 free_irq(naudint, codec);
8ecbabd9 1205
a2d2362e 1206 destroy_workqueue(priv->workqueue);
f0fba2ad 1207 kfree(priv);
8ecbabd9 1208
f0fba2ad
LG		 1209 return 0;
1210}
8ecbabd9 1211
f0fba2ad
LG		 1212static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
1213 .probe = twl6040_probe,
1214 .remove = twl6040_remove,
1215 .suspend = twl6040_suspend,
1216 .resume = twl6040_resume,
1217 .read = twl6040_read_reg_cache,
1218 .write = twl6040_write,
1219 .set_bias_level = twl6040_set_bias_level,
1220 .reg_cache_size = ARRAY_SIZE(twl6040_reg),
1221 .reg_word_size = sizeof(u8),
1222 .reg_cache_default = twl6040_reg,
1223};
1224
1225static int __devinit twl6040_codec_probe(struct platform_device *pdev)
1226{
1227 return snd_soc_register_codec(&pdev->dev,
1228 &soc_codec_dev_twl6040, &twl6040_dai, 1);
1229}
1230
1231static int __devexit twl6040_codec_remove(struct platform_device *pdev)
1232{
1233 snd_soc_unregister_codec(&pdev->dev);
8ecbabd9
MLC		 1234 return 0;
1235}
1236
1237static struct platform_driver twl6040_codec_driver = {
1238 .driver = {
f0fba2ad 1239 .name = "twl6040-codec",
8ecbabd9
MLC		 1240 .owner = THIS_MODULE,
1241 },
1242 .probe = twl6040_codec_probe,
1243 .remove = __devexit_p(twl6040_codec_remove),
1244};
1245
1246static int __init twl6040_codec_init(void)
1247{
1248 return platform_driver_register(&twl6040_codec_driver);
1249}
1250module_init(twl6040_codec_init);
1251
1252static void __exit twl6040_codec_exit(void)
1253{
1254 platform_driver_unregister(&twl6040_codec_driver);
1255}
1256module_exit(twl6040_codec_exit);
1257
1258MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
1259MODULE_AUTHOR("Misael Lopez Cruz");
1260MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.108349 seconds and 5 git commands to generate.